1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
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6  * GPL LICENSE SUMMARY
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8  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9  * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
10  * Copyright(c) 2018 - 2019 Intel Corporation
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62 #ifndef __IWL_CONFIG_H__
63 #define __IWL_CONFIG_H__
64 
65 #include <linux/types.h>
66 #include <linux/netdevice.h>
67 #include <linux/ieee80211.h>
68 #include <linux/nl80211.h>
69 #include "iwl-csr.h"
70 
71 enum iwl_device_family {
72 	IWL_DEVICE_FAMILY_UNDEFINED,
73 	IWL_DEVICE_FAMILY_1000,
74 	IWL_DEVICE_FAMILY_100,
75 	IWL_DEVICE_FAMILY_2000,
76 	IWL_DEVICE_FAMILY_2030,
77 	IWL_DEVICE_FAMILY_105,
78 	IWL_DEVICE_FAMILY_135,
79 	IWL_DEVICE_FAMILY_5000,
80 	IWL_DEVICE_FAMILY_5150,
81 	IWL_DEVICE_FAMILY_6000,
82 	IWL_DEVICE_FAMILY_6000i,
83 	IWL_DEVICE_FAMILY_6005,
84 	IWL_DEVICE_FAMILY_6030,
85 	IWL_DEVICE_FAMILY_6050,
86 	IWL_DEVICE_FAMILY_6150,
87 	IWL_DEVICE_FAMILY_7000,
88 	IWL_DEVICE_FAMILY_8000,
89 	IWL_DEVICE_FAMILY_9000,
90 	IWL_DEVICE_FAMILY_22000,
91 	IWL_DEVICE_FAMILY_AX210,
92 };
93 
94 /*
95  * LED mode
96  *    IWL_LED_DEFAULT:  use device default
97  *    IWL_LED_RF_STATE: turn LED on/off based on RF state
98  *			LED ON  = RF ON
99  *			LED OFF = RF OFF
100  *    IWL_LED_BLINK:    adjust led blink rate based on blink table
101  *    IWL_LED_DISABLE:	led disabled
102  */
103 enum iwl_led_mode {
104 	IWL_LED_DEFAULT,
105 	IWL_LED_RF_STATE,
106 	IWL_LED_BLINK,
107 	IWL_LED_DISABLE,
108 };
109 
110 /**
111  * enum iwl_nvm_type - nvm formats
112  * @IWL_NVM: the regular format
113  * @IWL_NVM_EXT: extended NVM format
114  * @IWL_NVM_SDP: NVM format used by 3168 series
115  */
116 enum iwl_nvm_type {
117 	IWL_NVM,
118 	IWL_NVM_EXT,
119 	IWL_NVM_SDP,
120 };
121 
122 /*
123  * This is the threshold value of plcp error rate per 100mSecs.  It is
124  * used to set and check for the validity of plcp_delta.
125  */
126 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN		1
127 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF		50
128 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	100
129 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	200
130 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX		255
131 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE	0
132 
133 /* TX queue watchdog timeouts in mSecs */
134 #define IWL_WATCHDOG_DISABLED	0
135 #define IWL_DEF_WD_TIMEOUT	2500
136 #define IWL_LONG_WD_TIMEOUT	10000
137 #define IWL_MAX_WD_TIMEOUT	120000
138 
139 #define IWL_DEFAULT_MAX_TX_POWER 22
140 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
141 				 NETIF_F_TSO | NETIF_F_TSO6)
142 
143 /* Antenna presence definitions */
144 #define	ANT_NONE	0x0
145 #define	ANT_INVALID	0xff
146 #define	ANT_A		BIT(0)
147 #define	ANT_B		BIT(1)
148 #define ANT_C		BIT(2)
149 #define	ANT_AB		(ANT_A | ANT_B)
150 #define	ANT_AC		(ANT_A | ANT_C)
151 #define ANT_BC		(ANT_B | ANT_C)
152 #define ANT_ABC		(ANT_A | ANT_B | ANT_C)
153 #define MAX_ANT_NUM 3
154 
155 
156 static inline u8 num_of_ant(u8 mask)
157 {
158 	return  !!((mask) & ANT_A) +
159 		!!((mask) & ANT_B) +
160 		!!((mask) & ANT_C);
161 }
162 
163 /**
164  * struct iwl_base_params - params not likely to change within a device family
165  * @max_ll_items: max number of OTP blocks
166  * @shadow_ram_support: shadow support for OTP memory
167  * @led_compensation: compensate on the led on/off time per HW according
168  *	to the deviation to achieve the desired led frequency.
169  *	The detail algorithm is described in iwl-led.c
170  * @wd_timeout: TX queues watchdog timeout
171  * @max_event_log_size: size of event log buffer size for ucode event logging
172  * @shadow_reg_enable: HW shadow register support
173  * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
174  *	is in flight. This is due to a HW bug in 7260, 3160 and 7265.
175  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
176  * @max_tfd_queue_size: max number of entries in tfd queue.
177  */
178 struct iwl_base_params {
179 	unsigned int wd_timeout;
180 
181 	u16 eeprom_size;
182 	u16 max_event_log_size;
183 
184 	u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
185 	   shadow_ram_support:1,
186 	   shadow_reg_enable:1,
187 	   pcie_l1_allowed:1,
188 	   apmg_wake_up_wa:1,
189 	   scd_chain_ext_wa:1;
190 
191 	u16 num_of_queues;	/* def: HW dependent */
192 	u32 max_tfd_queue_size;	/* def: HW dependent */
193 
194 	u8 max_ll_items;
195 	u8 led_compensation;
196 };
197 
198 /*
199  * @stbc: support Tx STBC and 1*SS Rx STBC
200  * @ldpc: support Tx/Rx with LDPC
201  * @use_rts_for_aggregation: use rts/cts protection for HT traffic
202  * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
203  */
204 struct iwl_ht_params {
205 	u8 ht_greenfield_support:1,
206 	   stbc:1,
207 	   ldpc:1,
208 	   use_rts_for_aggregation:1;
209 	u8 ht40_bands;
210 };
211 
212 /*
213  * Tx-backoff threshold
214  * @temperature: The threshold in Celsius
215  * @backoff: The tx-backoff in uSec
216  */
217 struct iwl_tt_tx_backoff {
218 	s32 temperature;
219 	u32 backoff;
220 };
221 
222 #define TT_TX_BACKOFF_SIZE 6
223 
224 /**
225  * struct iwl_tt_params - thermal throttling parameters
226  * @ct_kill_entry: CT Kill entry threshold
227  * @ct_kill_exit: CT Kill exit threshold
228  * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
229  *	to checks whether to exit CT Kill.
230  * @dynamic_smps_entry: Dynamic SMPS entry threshold
231  * @dynamic_smps_exit: Dynamic SMPS exit threshold
232  * @tx_protection_entry: TX protection entry threshold
233  * @tx_protection_exit: TX protection exit threshold
234  * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
235  * @support_ct_kill: Support CT Kill?
236  * @support_dynamic_smps: Support dynamic SMPS?
237  * @support_tx_protection: Support tx protection?
238  * @support_tx_backoff: Support tx-backoff?
239  */
240 struct iwl_tt_params {
241 	u32 ct_kill_entry;
242 	u32 ct_kill_exit;
243 	u32 ct_kill_duration;
244 	u32 dynamic_smps_entry;
245 	u32 dynamic_smps_exit;
246 	u32 tx_protection_entry;
247 	u32 tx_protection_exit;
248 	struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
249 	u8 support_ct_kill:1,
250 	   support_dynamic_smps:1,
251 	   support_tx_protection:1,
252 	   support_tx_backoff:1;
253 };
254 
255 /*
256  * information on how to parse the EEPROM
257  */
258 #define EEPROM_REG_BAND_1_CHANNELS		0x08
259 #define EEPROM_REG_BAND_2_CHANNELS		0x26
260 #define EEPROM_REG_BAND_3_CHANNELS		0x42
261 #define EEPROM_REG_BAND_4_CHANNELS		0x5C
262 #define EEPROM_REG_BAND_5_CHANNELS		0x74
263 #define EEPROM_REG_BAND_24_HT40_CHANNELS	0x82
264 #define EEPROM_REG_BAND_52_HT40_CHANNELS	0x92
265 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS	0x80
266 #define EEPROM_REGULATORY_BAND_NO_HT40		0
267 
268 /* lower blocks contain EEPROM image and calibration data */
269 #define OTP_LOW_IMAGE_SIZE_2K		(2 * 512 * sizeof(u16))  /*  2 KB */
270 #define OTP_LOW_IMAGE_SIZE_16K		(16 * 512 * sizeof(u16)) /* 16 KB */
271 #define OTP_LOW_IMAGE_SIZE_32K		(32 * 512 * sizeof(u16)) /* 32 KB */
272 
273 struct iwl_eeprom_params {
274 	const u8 regulatory_bands[7];
275 	bool enhanced_txpower;
276 };
277 
278 /* Tx-backoff power threshold
279  * @pwr: The power limit in mw
280  * @backoff: The tx-backoff in uSec
281  */
282 struct iwl_pwr_tx_backoff {
283 	u32 pwr;
284 	u32 backoff;
285 };
286 
287 /**
288  * struct iwl_cfg_trans - information needed to start the trans
289  *
290  * These values cannot be changed when multiple configs are used for a
291  * single PCI ID, because they are needed before the HW REV or RFID
292  * can be read.
293  *
294  * @base_params: pointer to basic parameters
295  * @csr: csr flags and addresses that are different across devices
296  * @device_family: the device family
297  * @umac_prph_offset: offset to add to UMAC periphery address
298  * @rf_id: need to read rf_id to determine the firmware image
299  * @use_tfh: use TFH
300  * @gen2: 22000 and on transport operation
301  * @mq_rx_supported: multi-queue rx support
302  */
303 struct iwl_cfg_trans_params {
304 	const struct iwl_base_params *base_params;
305 	enum iwl_device_family device_family;
306 	u32 umac_prph_offset;
307 	u32 rf_id:1,
308 	    use_tfh:1,
309 	    gen2:1,
310 	    mq_rx_supported:1,
311 	    bisr_workaround:1;
312 };
313 
314 /**
315  * struct iwl_fw_mon_reg - FW monitor register info
316  * @addr: register address
317  * @mask: register mask
318  */
319 struct iwl_fw_mon_reg {
320 	u32 addr;
321 	u32 mask;
322 };
323 
324 /**
325  * struct iwl_fw_mon_regs - FW monitor registers
326  * @write_ptr: write pointer register
327  * @cycle_cnt: cycle count register
328  * @cur_frag: current fragment in use
329  */
330 struct iwl_fw_mon_regs {
331 	struct iwl_fw_mon_reg write_ptr;
332 	struct iwl_fw_mon_reg cycle_cnt;
333 	struct iwl_fw_mon_reg cur_frag;
334 };
335 
336 /**
337  * struct iwl_cfg
338  * @trans: the trans-specific configuration part
339  * @name: Official name of the device
340  * @fw_name_pre: Firmware filename prefix. The api version and extension
341  *	(.ucode) will be added to filename before loading from disk. The
342  *	filename is constructed as fw_name_pre<api>.ucode.
343  * @ucode_api_max: Highest version of uCode API supported by driver.
344  * @ucode_api_min: Lowest version of uCode API supported by driver.
345  * @max_inst_size: The maximal length of the fw inst section (only DVM)
346  * @max_data_size: The maximal length of the fw data section (only DVM)
347  * @valid_tx_ant: valid transmit antenna
348  * @valid_rx_ant: valid receive antenna
349  * @non_shared_ant: the antenna that is for WiFi only
350  * @nvm_ver: NVM version
351  * @nvm_calib_ver: NVM calibration version
352  * @lib: pointer to the lib ops
353  * @ht_params: point to ht parameters
354  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
355  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
356  * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
357  * @internal_wimax_coex: internal wifi/wimax combo device
358  * @high_temp: Is this NIC is designated to be in high temperature.
359  * @host_interrupt_operation_mode: device needs host interrupt operation
360  *	mode set
361  * @nvm_hw_section_num: the ID of the HW NVM section
362  * @mac_addr_from_csr: read HW address from CSR registers
363  * @features: hw features, any combination of feature_whitelist
364  * @pwr_tx_backoffs: translation table between power limits and backoffs
365  * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
366  * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
367  *	station can receive in HT
368  * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
369  *	station can receive in VHT
370  * @dccm_offset: offset from which DCCM begins
371  * @dccm_len: length of DCCM (including runtime stack CCM)
372  * @dccm2_offset: offset from which the second DCCM begins
373  * @dccm2_len: length of the second DCCM
374  * @smem_offset: offset from which the SMEM begins
375  * @smem_len: the length of SMEM
376  * @vht_mu_mimo_supported: VHT MU-MIMO support
377  * @integrated: discrete or integrated
378  * @cdb: CDB support
379  * @nvm_type: see &enum iwl_nvm_type
380  * @d3_debug_data_base_addr: base address where D3 debug data is stored
381  * @d3_debug_data_length: length of the D3 debug data
382  * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
383  * @min_txq_size: minimum number of slots required in a TX queue
384  * @uhb_supported: ultra high band channels supported
385  * @min_256_ba_txq_size: minimum number of slots required in a TX queue which
386  *	supports 256 BA aggregation
387  * @num_rbds: number of receive buffer descriptors to use
388  *	(only used for multi-queue capable devices)
389  *
390  * We enable the driver to be backward compatible wrt. hardware features.
391  * API differences in uCode shouldn't be handled here but through TLVs
392  * and/or the uCode API version instead.
393  */
394 struct iwl_cfg {
395 	struct iwl_cfg_trans_params trans;
396 	/* params specific to an individual device within a device family */
397 	const char *name;
398 	const char *fw_name_pre;
399 	/* params likely to change within a device family */
400 	const struct iwl_ht_params *ht_params;
401 	const struct iwl_eeprom_params *eeprom_params;
402 	const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
403 	const char *default_nvm_file_C_step;
404 	const struct iwl_tt_params *thermal_params;
405 	enum iwl_led_mode led_mode;
406 	enum iwl_nvm_type nvm_type;
407 	u32 max_data_size;
408 	u32 max_inst_size;
409 	netdev_features_t features;
410 	u32 dccm_offset;
411 	u32 dccm_len;
412 	u32 dccm2_offset;
413 	u32 dccm2_len;
414 	u32 smem_offset;
415 	u32 smem_len;
416 	u32 soc_latency;
417 	u16 nvm_ver;
418 	u16 nvm_calib_ver;
419 	u32 rx_with_siso_diversity:1,
420 	    tx_with_siso_diversity:1,
421 	    bt_shared_single_ant:1,
422 	    internal_wimax_coex:1,
423 	    host_interrupt_operation_mode:1,
424 	    high_temp:1,
425 	    mac_addr_from_csr:1,
426 	    lp_xtal_workaround:1,
427 	    disable_dummy_notification:1,
428 	    apmg_not_supported:1,
429 	    vht_mu_mimo_supported:1,
430 	    integrated:1,
431 	    cdb:1,
432 	    dbgc_supported:1,
433 	    uhb_supported:1;
434 	u8 valid_tx_ant;
435 	u8 valid_rx_ant;
436 	u8 non_shared_ant;
437 	u8 nvm_hw_section_num;
438 	u8 max_tx_agg_size;
439 	u8 max_ht_ampdu_exponent;
440 	u8 max_vht_ampdu_exponent;
441 	u8 ucode_api_max;
442 	u8 ucode_api_min;
443 	u16 num_rbds;
444 	u32 min_umac_error_event_table;
445 	u32 extra_phy_cfg_flags;
446 	u32 d3_debug_data_base_addr;
447 	u32 d3_debug_data_length;
448 	u32 min_txq_size;
449 	u32 gp2_reg_addr;
450 	u32 min_256_ba_txq_size;
451 	const struct iwl_fw_mon_regs mon_dram_regs;
452 	const struct iwl_fw_mon_regs mon_smem_regs;
453 };
454 
455 #define IWL_CFG_ANY (~0)
456 
457 struct iwl_dev_info {
458 	u16 device;
459 	u16 subdevice;
460 	const struct iwl_cfg *cfg;
461 	const char *name;
462 };
463 
464 /*
465  * This list declares the config structures for all devices.
466  */
467 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
468 extern const char iwl9260_160_name[];
469 extern const char iwl9560_160_name[];
470 
471 #if IS_ENABLED(CONFIG_IWLDVM)
472 extern const struct iwl_cfg iwl5300_agn_cfg;
473 extern const struct iwl_cfg iwl5100_agn_cfg;
474 extern const struct iwl_cfg iwl5350_agn_cfg;
475 extern const struct iwl_cfg iwl5100_bgn_cfg;
476 extern const struct iwl_cfg iwl5100_abg_cfg;
477 extern const struct iwl_cfg iwl5150_agn_cfg;
478 extern const struct iwl_cfg iwl5150_abg_cfg;
479 extern const struct iwl_cfg iwl6005_2agn_cfg;
480 extern const struct iwl_cfg iwl6005_2abg_cfg;
481 extern const struct iwl_cfg iwl6005_2bg_cfg;
482 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
483 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
484 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
485 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
486 extern const struct iwl_cfg iwl1030_bgn_cfg;
487 extern const struct iwl_cfg iwl1030_bg_cfg;
488 extern const struct iwl_cfg iwl6030_2agn_cfg;
489 extern const struct iwl_cfg iwl6030_2abg_cfg;
490 extern const struct iwl_cfg iwl6030_2bgn_cfg;
491 extern const struct iwl_cfg iwl6030_2bg_cfg;
492 extern const struct iwl_cfg iwl6000i_2agn_cfg;
493 extern const struct iwl_cfg iwl6000i_2abg_cfg;
494 extern const struct iwl_cfg iwl6000i_2bg_cfg;
495 extern const struct iwl_cfg iwl6000_3agn_cfg;
496 extern const struct iwl_cfg iwl6050_2agn_cfg;
497 extern const struct iwl_cfg iwl6050_2abg_cfg;
498 extern const struct iwl_cfg iwl6150_bgn_cfg;
499 extern const struct iwl_cfg iwl6150_bg_cfg;
500 extern const struct iwl_cfg iwl1000_bgn_cfg;
501 extern const struct iwl_cfg iwl1000_bg_cfg;
502 extern const struct iwl_cfg iwl100_bgn_cfg;
503 extern const struct iwl_cfg iwl100_bg_cfg;
504 extern const struct iwl_cfg iwl130_bgn_cfg;
505 extern const struct iwl_cfg iwl130_bg_cfg;
506 extern const struct iwl_cfg iwl2000_2bgn_cfg;
507 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
508 extern const struct iwl_cfg iwl2030_2bgn_cfg;
509 extern const struct iwl_cfg iwl6035_2agn_cfg;
510 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
511 extern const struct iwl_cfg iwl105_bgn_cfg;
512 extern const struct iwl_cfg iwl105_bgn_d_cfg;
513 extern const struct iwl_cfg iwl135_bgn_cfg;
514 #endif /* CONFIG_IWLDVM */
515 #if IS_ENABLED(CONFIG_IWLMVM)
516 extern const struct iwl_cfg iwl7260_2ac_cfg;
517 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
518 extern const struct iwl_cfg iwl7260_2n_cfg;
519 extern const struct iwl_cfg iwl7260_n_cfg;
520 extern const struct iwl_cfg iwl3160_2ac_cfg;
521 extern const struct iwl_cfg iwl3160_2n_cfg;
522 extern const struct iwl_cfg iwl3160_n_cfg;
523 extern const struct iwl_cfg iwl3165_2ac_cfg;
524 extern const struct iwl_cfg iwl3168_2ac_cfg;
525 extern const struct iwl_cfg iwl7265_2ac_cfg;
526 extern const struct iwl_cfg iwl7265_2n_cfg;
527 extern const struct iwl_cfg iwl7265_n_cfg;
528 extern const struct iwl_cfg iwl7265d_2ac_cfg;
529 extern const struct iwl_cfg iwl7265d_2n_cfg;
530 extern const struct iwl_cfg iwl7265d_n_cfg;
531 extern const struct iwl_cfg iwl8260_2n_cfg;
532 extern const struct iwl_cfg iwl8260_2ac_cfg;
533 extern const struct iwl_cfg iwl8265_2ac_cfg;
534 extern const struct iwl_cfg iwl8275_2ac_cfg;
535 extern const struct iwl_cfg iwl4165_2ac_cfg;
536 extern const struct iwl_cfg iwl9160_2ac_cfg;
537 extern const struct iwl_cfg iwl9260_2ac_cfg;
538 extern const struct iwl_cfg iwl9260_2ac_160_cfg;
539 extern const struct iwl_cfg iwl9260_killer_2ac_cfg;
540 extern const struct iwl_cfg iwl9270_2ac_cfg;
541 extern const struct iwl_cfg iwl9460_2ac_cfg;
542 extern const struct iwl_cfg iwl9560_2ac_cfg;
543 extern const struct iwl_cfg iwl9560_2ac_cfg_quz_a0_jf_b0_soc;
544 extern const struct iwl_cfg iwl9560_2ac_160_cfg;
545 extern const struct iwl_cfg iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc;
546 extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
547 extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
548 extern const struct iwl_cfg iwl9461_2ac_cfg_quz_a0_jf_b0_soc;
549 extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
550 extern const struct iwl_cfg iwl9462_2ac_cfg_quz_a0_jf_b0_soc;
551 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
552 extern const struct iwl_cfg iwl9560_2ac_160_cfg_soc;
553 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc;
554 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc;
555 extern const struct iwl_cfg iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc;
556 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc;
557 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
558 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
559 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
560 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
561 extern const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk;
562 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk;
563 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk;
564 extern const struct iwl_cfg iwl_ax101_cfg_qu_hr;
565 extern const struct iwl_cfg iwl_ax101_cfg_qu_c0_hr_b0;
566 extern const struct iwl_cfg iwl_ax101_cfg_quz_hr;
567 extern const struct iwl_cfg iwl22000_2ax_cfg_hr;
568 extern const struct iwl_cfg iwl_ax200_cfg_cc;
569 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
570 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
571 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
572 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
573 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
574 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
575 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
576 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
577 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
578 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
579 extern const struct iwl_cfg killer1650x_2ax_cfg;
580 extern const struct iwl_cfg killer1650w_2ax_cfg;
581 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0;
582 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_b0_jf_b0;
583 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_b0_jf_b0;
584 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_b0_jf_b0;
585 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_c0_jf_b0;
586 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_c0_jf_b0;
587 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_c0_jf_b0;
588 extern const struct iwl_cfg iwl9560_2ac_160_cfg_qu_c0_jf_b0;
589 extern const struct iwl_cfg killer1550i_2ac_cfg_qu_b0_jf_b0;
590 extern const struct iwl_cfg killer1550s_2ac_cfg_qu_b0_jf_b0;
591 extern const struct iwl_cfg iwl22000_2ax_cfg_jf;
592 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0;
593 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0_f0;
594 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0;
595 extern const struct iwl_cfg iwl9560_2ac_cfg_qnj_jf_b0;
596 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0;
597 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0;
598 extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0;
599 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
600 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
601 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
602 extern const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0;
603 #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */
604 
605 #endif /* __IWL_CONFIG_H__ */
606