1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 9 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH 10 * Copyright(c) 2018 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 24 * USA 25 * 26 * The full GNU General Public License is included in this distribution 27 * in the file called COPYING. 28 * 29 * Contact Information: 30 * Intel Linux Wireless <linuxwifi@intel.com> 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 32 * 33 * BSD LICENSE 34 * 35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 36 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH 37 * Copyright(c) 2018 Intel Corporation 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 44 * * Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * * Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in 48 * the documentation and/or other materials provided with the 49 * distribution. 50 * * Neither the name Intel Corporation nor the names of its 51 * contributors may be used to endorse or promote products derived 52 * from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 *****************************************************************************/ 67 #ifndef __IWL_CONFIG_H__ 68 #define __IWL_CONFIG_H__ 69 70 #include <linux/types.h> 71 #include <linux/netdevice.h> 72 #include <linux/ieee80211.h> 73 #include <linux/nl80211.h> 74 #include "iwl-csr.h" 75 76 enum iwl_device_family { 77 IWL_DEVICE_FAMILY_UNDEFINED, 78 IWL_DEVICE_FAMILY_1000, 79 IWL_DEVICE_FAMILY_100, 80 IWL_DEVICE_FAMILY_2000, 81 IWL_DEVICE_FAMILY_2030, 82 IWL_DEVICE_FAMILY_105, 83 IWL_DEVICE_FAMILY_135, 84 IWL_DEVICE_FAMILY_5000, 85 IWL_DEVICE_FAMILY_5150, 86 IWL_DEVICE_FAMILY_6000, 87 IWL_DEVICE_FAMILY_6000i, 88 IWL_DEVICE_FAMILY_6005, 89 IWL_DEVICE_FAMILY_6030, 90 IWL_DEVICE_FAMILY_6050, 91 IWL_DEVICE_FAMILY_6150, 92 IWL_DEVICE_FAMILY_7000, 93 IWL_DEVICE_FAMILY_8000, 94 IWL_DEVICE_FAMILY_9000, 95 IWL_DEVICE_FAMILY_22000, 96 }; 97 98 /* 99 * LED mode 100 * IWL_LED_DEFAULT: use device default 101 * IWL_LED_RF_STATE: turn LED on/off based on RF state 102 * LED ON = RF ON 103 * LED OFF = RF OFF 104 * IWL_LED_BLINK: adjust led blink rate based on blink table 105 * IWL_LED_DISABLE: led disabled 106 */ 107 enum iwl_led_mode { 108 IWL_LED_DEFAULT, 109 IWL_LED_RF_STATE, 110 IWL_LED_BLINK, 111 IWL_LED_DISABLE, 112 }; 113 114 /** 115 * enum iwl_nvm_type - nvm formats 116 * @IWL_NVM: the regular format 117 * @IWL_NVM_EXT: extended NVM format 118 * @IWL_NVM_SDP: NVM format used by 3168 series 119 */ 120 enum iwl_nvm_type { 121 IWL_NVM, 122 IWL_NVM_EXT, 123 IWL_NVM_SDP, 124 }; 125 126 /* 127 * This is the threshold value of plcp error rate per 100mSecs. It is 128 * used to set and check for the validity of plcp_delta. 129 */ 130 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1 131 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50 132 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100 133 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200 134 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255 135 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0 136 137 /* TX queue watchdog timeouts in mSecs */ 138 #define IWL_WATCHDOG_DISABLED 0 139 #define IWL_DEF_WD_TIMEOUT 2500 140 #define IWL_LONG_WD_TIMEOUT 10000 141 #define IWL_MAX_WD_TIMEOUT 120000 142 143 #define IWL_DEFAULT_MAX_TX_POWER 22 144 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\ 145 NETIF_F_TSO | NETIF_F_TSO6) 146 147 /* Antenna presence definitions */ 148 #define ANT_NONE 0x0 149 #define ANT_INVALID 0xff 150 #define ANT_A BIT(0) 151 #define ANT_B BIT(1) 152 #define ANT_C BIT(2) 153 #define ANT_AB (ANT_A | ANT_B) 154 #define ANT_AC (ANT_A | ANT_C) 155 #define ANT_BC (ANT_B | ANT_C) 156 #define ANT_ABC (ANT_A | ANT_B | ANT_C) 157 #define MAX_ANT_NUM 3 158 159 160 static inline u8 num_of_ant(u8 mask) 161 { 162 return !!((mask) & ANT_A) + 163 !!((mask) & ANT_B) + 164 !!((mask) & ANT_C); 165 } 166 167 /* 168 * @max_ll_items: max number of OTP blocks 169 * @shadow_ram_support: shadow support for OTP memory 170 * @led_compensation: compensate on the led on/off time per HW according 171 * to the deviation to achieve the desired led frequency. 172 * The detail algorithm is described in iwl-led.c 173 * @wd_timeout: TX queues watchdog timeout 174 * @max_event_log_size: size of event log buffer size for ucode event logging 175 * @shadow_reg_enable: HW shadow register support 176 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command 177 * is in flight. This is due to a HW bug in 7260, 3160 and 7265. 178 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled. 179 */ 180 struct iwl_base_params { 181 unsigned int wd_timeout; 182 183 u16 eeprom_size; 184 u16 max_event_log_size; 185 186 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */ 187 shadow_ram_support:1, 188 shadow_reg_enable:1, 189 pcie_l1_allowed:1, 190 apmg_wake_up_wa:1, 191 scd_chain_ext_wa:1; 192 193 u16 num_of_queues; /* def: HW dependent */ 194 195 u8 max_ll_items; 196 u8 led_compensation; 197 }; 198 199 /* 200 * @stbc: support Tx STBC and 1*SS Rx STBC 201 * @ldpc: support Tx/Rx with LDPC 202 * @use_rts_for_aggregation: use rts/cts protection for HT traffic 203 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40 204 */ 205 struct iwl_ht_params { 206 u8 ht_greenfield_support:1, 207 stbc:1, 208 ldpc:1, 209 use_rts_for_aggregation:1; 210 u8 ht40_bands; 211 }; 212 213 /* 214 * Tx-backoff threshold 215 * @temperature: The threshold in Celsius 216 * @backoff: The tx-backoff in uSec 217 */ 218 struct iwl_tt_tx_backoff { 219 s32 temperature; 220 u32 backoff; 221 }; 222 223 #define TT_TX_BACKOFF_SIZE 6 224 225 /** 226 * struct iwl_tt_params - thermal throttling parameters 227 * @ct_kill_entry: CT Kill entry threshold 228 * @ct_kill_exit: CT Kill exit threshold 229 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs 230 * to checks whether to exit CT Kill. 231 * @dynamic_smps_entry: Dynamic SMPS entry threshold 232 * @dynamic_smps_exit: Dynamic SMPS exit threshold 233 * @tx_protection_entry: TX protection entry threshold 234 * @tx_protection_exit: TX protection exit threshold 235 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order. 236 * @support_ct_kill: Support CT Kill? 237 * @support_dynamic_smps: Support dynamic SMPS? 238 * @support_tx_protection: Support tx protection? 239 * @support_tx_backoff: Support tx-backoff? 240 */ 241 struct iwl_tt_params { 242 u32 ct_kill_entry; 243 u32 ct_kill_exit; 244 u32 ct_kill_duration; 245 u32 dynamic_smps_entry; 246 u32 dynamic_smps_exit; 247 u32 tx_protection_entry; 248 u32 tx_protection_exit; 249 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE]; 250 u8 support_ct_kill:1, 251 support_dynamic_smps:1, 252 support_tx_protection:1, 253 support_tx_backoff:1; 254 }; 255 256 /* 257 * information on how to parse the EEPROM 258 */ 259 #define EEPROM_REG_BAND_1_CHANNELS 0x08 260 #define EEPROM_REG_BAND_2_CHANNELS 0x26 261 #define EEPROM_REG_BAND_3_CHANNELS 0x42 262 #define EEPROM_REG_BAND_4_CHANNELS 0x5C 263 #define EEPROM_REG_BAND_5_CHANNELS 0x74 264 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82 265 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92 266 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80 267 #define EEPROM_REGULATORY_BAND_NO_HT40 0 268 269 /* lower blocks contain EEPROM image and calibration data */ 270 #define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */ 271 #define OTP_LOW_IMAGE_SIZE_FAMILY_7000 (16 * 512 * sizeof(u16)) /* 16 KB */ 272 #define OTP_LOW_IMAGE_SIZE_FAMILY_8000 (32 * 512 * sizeof(u16)) /* 32 KB */ 273 #define OTP_LOW_IMAGE_SIZE_FAMILY_9000 OTP_LOW_IMAGE_SIZE_FAMILY_8000 274 #define OTP_LOW_IMAGE_SIZE_FAMILY_22000 OTP_LOW_IMAGE_SIZE_FAMILY_9000 275 276 struct iwl_eeprom_params { 277 const u8 regulatory_bands[7]; 278 bool enhanced_txpower; 279 }; 280 281 /* Tx-backoff power threshold 282 * @pwr: The power limit in mw 283 * @backoff: The tx-backoff in uSec 284 */ 285 struct iwl_pwr_tx_backoff { 286 u32 pwr; 287 u32 backoff; 288 }; 289 290 /** 291 * struct iwl_csr_params 292 * 293 * @flag_sw_reset: reset the device 294 * @flag_mac_clock_ready: 295 * Indicates MAC (ucode processor, etc.) is powered up and can run. 296 * Internal resources are accessible. 297 * NOTE: This does not indicate that the processor is actually running. 298 * NOTE: This does not indicate that device has completed 299 * init or post-power-down restore of internal SRAM memory. 300 * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that 301 * SRAM is restored and uCode is in normal operation mode. 302 * This note is relevant only for pre 5xxx devices. 303 * NOTE: After device reset, this bit remains "0" until host sets 304 * INIT_DONE 305 * @flag_init_done: Host sets this to put device into fully operational 306 * D0 power mode. Host resets this after SW_RESET to put device into 307 * low power mode. 308 * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup, 309 * to allow host access to device-internal resources. Host must wait for 310 * mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device 311 * registers. 312 * @flag_val_mac_access_en: mac access is enabled 313 * @flag_master_dis: disable master 314 * @flag_stop_master: stop master 315 * @addr_sw_reset: address for resetting the device 316 * @mac_addr0_otp: first part of MAC address from OTP 317 * @mac_addr1_otp: second part of MAC address from OTP 318 * @mac_addr0_strap: first part of MAC address from strap 319 * @mac_addr1_strap: second part of MAC address from strap 320 */ 321 struct iwl_csr_params { 322 u8 flag_sw_reset; 323 u8 flag_mac_clock_ready; 324 u8 flag_init_done; 325 u8 flag_mac_access_req; 326 u8 flag_val_mac_access_en; 327 u8 flag_master_dis; 328 u8 flag_stop_master; 329 u8 addr_sw_reset; 330 u32 mac_addr0_otp; 331 u32 mac_addr1_otp; 332 u32 mac_addr0_strap; 333 u32 mac_addr1_strap; 334 }; 335 336 /** 337 * struct iwl_cfg 338 * @name: Official name of the device 339 * @fw_name_pre: Firmware filename prefix. The api version and extension 340 * (.ucode) will be added to filename before loading from disk. The 341 * filename is constructed as fw_name_pre<api>.ucode. 342 * @fw_name_pre_b_or_c_step: same as @fw_name_pre, only for b or c steps 343 * (if supported) 344 * @fw_name_pre_rf_next_step: same as @fw_name_pre_b_or_c_step, only for rf 345 * next step. Supported only in integrated solutions. 346 * @ucode_api_max: Highest version of uCode API supported by driver. 347 * @ucode_api_min: Lowest version of uCode API supported by driver. 348 * @max_inst_size: The maximal length of the fw inst section (only DVM) 349 * @max_data_size: The maximal length of the fw data section (only DVM) 350 * @valid_tx_ant: valid transmit antenna 351 * @valid_rx_ant: valid receive antenna 352 * @non_shared_ant: the antenna that is for WiFi only 353 * @nvm_ver: NVM version 354 * @nvm_calib_ver: NVM calibration version 355 * @lib: pointer to the lib ops 356 * @base_params: pointer to basic parameters 357 * @ht_params: point to ht parameters 358 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) 359 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 360 * @internal_wimax_coex: internal wifi/wimax combo device 361 * @high_temp: Is this NIC is designated to be in high temperature. 362 * @host_interrupt_operation_mode: device needs host interrupt operation 363 * mode set 364 * @nvm_hw_section_num: the ID of the HW NVM section 365 * @mac_addr_from_csr: read HW address from CSR registers 366 * @features: hw features, any combination of feature_whitelist 367 * @pwr_tx_backoffs: translation table between power limits and backoffs 368 * @csr: csr flags and addresses that are different across devices 369 * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response 370 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response 371 * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the 372 * station can receive in HT 373 * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the 374 * station can receive in VHT 375 * @dccm_offset: offset from which DCCM begins 376 * @dccm_len: length of DCCM (including runtime stack CCM) 377 * @dccm2_offset: offset from which the second DCCM begins 378 * @dccm2_len: length of the second DCCM 379 * @smem_offset: offset from which the SMEM begins 380 * @smem_len: the length of SMEM 381 * @mq_rx_supported: multi-queue rx support 382 * @vht_mu_mimo_supported: VHT MU-MIMO support 383 * @rf_id: need to read rf_id to determine the firmware image 384 * @integrated: discrete or integrated 385 * @gen2: 22000 and on transport operation 386 * @cdb: CDB support 387 * @nvm_type: see &enum iwl_nvm_type 388 * 389 * We enable the driver to be backward compatible wrt. hardware features. 390 * API differences in uCode shouldn't be handled here but through TLVs 391 * and/or the uCode API version instead. 392 */ 393 struct iwl_cfg { 394 /* params specific to an individual device within a device family */ 395 const char *name; 396 const char *fw_name_pre; 397 const char *fw_name_pre_b_or_c_step; 398 const char *fw_name_pre_rf_next_step; 399 /* params not likely to change within a device family */ 400 const struct iwl_base_params *base_params; 401 /* params likely to change within a device family */ 402 const struct iwl_ht_params *ht_params; 403 const struct iwl_eeprom_params *eeprom_params; 404 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; 405 const char *default_nvm_file_C_step; 406 const struct iwl_tt_params *thermal_params; 407 const struct iwl_csr_params *csr; 408 enum iwl_device_family device_family; 409 enum iwl_led_mode led_mode; 410 enum iwl_nvm_type nvm_type; 411 u32 max_data_size; 412 u32 max_inst_size; 413 netdev_features_t features; 414 u32 dccm_offset; 415 u32 dccm_len; 416 u32 dccm2_offset; 417 u32 dccm2_len; 418 u32 smem_offset; 419 u32 smem_len; 420 u32 soc_latency; 421 u16 nvm_ver; 422 u16 nvm_calib_ver; 423 u32 rx_with_siso_diversity:1, 424 bt_shared_single_ant:1, 425 internal_wimax_coex:1, 426 host_interrupt_operation_mode:1, 427 high_temp:1, 428 mac_addr_from_csr:1, 429 lp_xtal_workaround:1, 430 disable_dummy_notification:1, 431 apmg_not_supported:1, 432 mq_rx_supported:1, 433 vht_mu_mimo_supported:1, 434 rf_id:1, 435 integrated:1, 436 use_tfh:1, 437 gen2:1, 438 cdb:1, 439 dbgc_supported:1; 440 u8 valid_tx_ant; 441 u8 valid_rx_ant; 442 u8 non_shared_ant; 443 u8 nvm_hw_section_num; 444 u8 max_rx_agg_size; 445 u8 max_tx_agg_size; 446 u8 max_ht_ampdu_exponent; 447 u8 max_vht_ampdu_exponent; 448 u8 ucode_api_max; 449 u8 ucode_api_min; 450 u32 min_umac_error_event_table; 451 u32 extra_phy_cfg_flags; 452 }; 453 454 static const struct iwl_csr_params iwl_csr_v1 = { 455 .flag_mac_clock_ready = 0, 456 .flag_val_mac_access_en = 0, 457 .flag_init_done = 2, 458 .flag_mac_access_req = 3, 459 .flag_sw_reset = 7, 460 .flag_master_dis = 8, 461 .flag_stop_master = 9, 462 .addr_sw_reset = (CSR_BASE + 0x020), 463 .mac_addr0_otp = 0x380, 464 .mac_addr1_otp = 0x384, 465 .mac_addr0_strap = 0x388, 466 .mac_addr1_strap = 0x38C 467 }; 468 469 static const struct iwl_csr_params iwl_csr_v2 = { 470 .flag_init_done = 6, 471 .flag_mac_clock_ready = 20, 472 .flag_val_mac_access_en = 20, 473 .flag_mac_access_req = 21, 474 .flag_master_dis = 28, 475 .flag_stop_master = 29, 476 .flag_sw_reset = 31, 477 .addr_sw_reset = (CSR_BASE + 0x024), 478 .mac_addr0_otp = 0x30, 479 .mac_addr1_otp = 0x34, 480 .mac_addr0_strap = 0x38, 481 .mac_addr1_strap = 0x3C 482 }; 483 484 /* 485 * This list declares the config structures for all devices. 486 */ 487 #if IS_ENABLED(CONFIG_IWLDVM) 488 extern const struct iwl_cfg iwl5300_agn_cfg; 489 extern const struct iwl_cfg iwl5100_agn_cfg; 490 extern const struct iwl_cfg iwl5350_agn_cfg; 491 extern const struct iwl_cfg iwl5100_bgn_cfg; 492 extern const struct iwl_cfg iwl5100_abg_cfg; 493 extern const struct iwl_cfg iwl5150_agn_cfg; 494 extern const struct iwl_cfg iwl5150_abg_cfg; 495 extern const struct iwl_cfg iwl6005_2agn_cfg; 496 extern const struct iwl_cfg iwl6005_2abg_cfg; 497 extern const struct iwl_cfg iwl6005_2bg_cfg; 498 extern const struct iwl_cfg iwl6005_2agn_sff_cfg; 499 extern const struct iwl_cfg iwl6005_2agn_d_cfg; 500 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg; 501 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg; 502 extern const struct iwl_cfg iwl1030_bgn_cfg; 503 extern const struct iwl_cfg iwl1030_bg_cfg; 504 extern const struct iwl_cfg iwl6030_2agn_cfg; 505 extern const struct iwl_cfg iwl6030_2abg_cfg; 506 extern const struct iwl_cfg iwl6030_2bgn_cfg; 507 extern const struct iwl_cfg iwl6030_2bg_cfg; 508 extern const struct iwl_cfg iwl6000i_2agn_cfg; 509 extern const struct iwl_cfg iwl6000i_2abg_cfg; 510 extern const struct iwl_cfg iwl6000i_2bg_cfg; 511 extern const struct iwl_cfg iwl6000_3agn_cfg; 512 extern const struct iwl_cfg iwl6050_2agn_cfg; 513 extern const struct iwl_cfg iwl6050_2abg_cfg; 514 extern const struct iwl_cfg iwl6150_bgn_cfg; 515 extern const struct iwl_cfg iwl6150_bg_cfg; 516 extern const struct iwl_cfg iwl1000_bgn_cfg; 517 extern const struct iwl_cfg iwl1000_bg_cfg; 518 extern const struct iwl_cfg iwl100_bgn_cfg; 519 extern const struct iwl_cfg iwl100_bg_cfg; 520 extern const struct iwl_cfg iwl130_bgn_cfg; 521 extern const struct iwl_cfg iwl130_bg_cfg; 522 extern const struct iwl_cfg iwl2000_2bgn_cfg; 523 extern const struct iwl_cfg iwl2000_2bgn_d_cfg; 524 extern const struct iwl_cfg iwl2030_2bgn_cfg; 525 extern const struct iwl_cfg iwl6035_2agn_cfg; 526 extern const struct iwl_cfg iwl6035_2agn_sff_cfg; 527 extern const struct iwl_cfg iwl105_bgn_cfg; 528 extern const struct iwl_cfg iwl105_bgn_d_cfg; 529 extern const struct iwl_cfg iwl135_bgn_cfg; 530 #endif /* CONFIG_IWLDVM */ 531 #if IS_ENABLED(CONFIG_IWLMVM) 532 extern const struct iwl_cfg iwl7260_2ac_cfg; 533 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp; 534 extern const struct iwl_cfg iwl7260_2n_cfg; 535 extern const struct iwl_cfg iwl7260_n_cfg; 536 extern const struct iwl_cfg iwl3160_2ac_cfg; 537 extern const struct iwl_cfg iwl3160_2n_cfg; 538 extern const struct iwl_cfg iwl3160_n_cfg; 539 extern const struct iwl_cfg iwl3165_2ac_cfg; 540 extern const struct iwl_cfg iwl3168_2ac_cfg; 541 extern const struct iwl_cfg iwl7265_2ac_cfg; 542 extern const struct iwl_cfg iwl7265_2n_cfg; 543 extern const struct iwl_cfg iwl7265_n_cfg; 544 extern const struct iwl_cfg iwl7265d_2ac_cfg; 545 extern const struct iwl_cfg iwl7265d_2n_cfg; 546 extern const struct iwl_cfg iwl7265d_n_cfg; 547 extern const struct iwl_cfg iwl8260_2n_cfg; 548 extern const struct iwl_cfg iwl8260_2ac_cfg; 549 extern const struct iwl_cfg iwl8265_2ac_cfg; 550 extern const struct iwl_cfg iwl8275_2ac_cfg; 551 extern const struct iwl_cfg iwl4165_2ac_cfg; 552 extern const struct iwl_cfg iwl9160_2ac_cfg; 553 extern const struct iwl_cfg iwl9260_2ac_cfg; 554 extern const struct iwl_cfg iwl9270_2ac_cfg; 555 extern const struct iwl_cfg iwl9460_2ac_cfg; 556 extern const struct iwl_cfg iwl9560_2ac_cfg; 557 extern const struct iwl_cfg iwl9460_2ac_cfg_soc; 558 extern const struct iwl_cfg iwl9461_2ac_cfg_soc; 559 extern const struct iwl_cfg iwl9462_2ac_cfg_soc; 560 extern const struct iwl_cfg iwl9560_2ac_cfg_soc; 561 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk; 562 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk; 563 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk; 564 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk; 565 extern const struct iwl_cfg iwl22000_2ac_cfg_hr; 566 extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb; 567 extern const struct iwl_cfg iwl22000_2ac_cfg_jf; 568 extern const struct iwl_cfg iwl22000_2ax_cfg_hr; 569 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_f0; 570 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0; 571 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0; 572 #endif /* CONFIG_IWLMVM */ 573 574 #endif /* __IWL_CONFIG_H__ */ 575