1 /******************************************************************************
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3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
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6  * GPL LICENSE SUMMARY
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62 #ifndef __IWL_CONFIG_H__
63 #define __IWL_CONFIG_H__
64 
65 #include <linux/types.h>
66 #include <linux/netdevice.h>
67 #include <linux/ieee80211.h>
68 #include <linux/nl80211.h>
69 #include "iwl-csr.h"
70 
71 enum iwl_device_family {
72 	IWL_DEVICE_FAMILY_UNDEFINED,
73 	IWL_DEVICE_FAMILY_1000,
74 	IWL_DEVICE_FAMILY_100,
75 	IWL_DEVICE_FAMILY_2000,
76 	IWL_DEVICE_FAMILY_2030,
77 	IWL_DEVICE_FAMILY_105,
78 	IWL_DEVICE_FAMILY_135,
79 	IWL_DEVICE_FAMILY_5000,
80 	IWL_DEVICE_FAMILY_5150,
81 	IWL_DEVICE_FAMILY_6000,
82 	IWL_DEVICE_FAMILY_6000i,
83 	IWL_DEVICE_FAMILY_6005,
84 	IWL_DEVICE_FAMILY_6030,
85 	IWL_DEVICE_FAMILY_6050,
86 	IWL_DEVICE_FAMILY_6150,
87 	IWL_DEVICE_FAMILY_7000,
88 	IWL_DEVICE_FAMILY_8000,
89 	IWL_DEVICE_FAMILY_9000,
90 	IWL_DEVICE_FAMILY_22000,
91 	IWL_DEVICE_FAMILY_22560,
92 };
93 
94 /*
95  * LED mode
96  *    IWL_LED_DEFAULT:  use device default
97  *    IWL_LED_RF_STATE: turn LED on/off based on RF state
98  *			LED ON  = RF ON
99  *			LED OFF = RF OFF
100  *    IWL_LED_BLINK:    adjust led blink rate based on blink table
101  *    IWL_LED_DISABLE:	led disabled
102  */
103 enum iwl_led_mode {
104 	IWL_LED_DEFAULT,
105 	IWL_LED_RF_STATE,
106 	IWL_LED_BLINK,
107 	IWL_LED_DISABLE,
108 };
109 
110 /**
111  * enum iwl_nvm_type - nvm formats
112  * @IWL_NVM: the regular format
113  * @IWL_NVM_EXT: extended NVM format
114  * @IWL_NVM_SDP: NVM format used by 3168 series
115  */
116 enum iwl_nvm_type {
117 	IWL_NVM,
118 	IWL_NVM_EXT,
119 	IWL_NVM_SDP,
120 };
121 
122 /*
123  * This is the threshold value of plcp error rate per 100mSecs.  It is
124  * used to set and check for the validity of plcp_delta.
125  */
126 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN		1
127 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF		50
128 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	100
129 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	200
130 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX		255
131 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE	0
132 
133 /* TX queue watchdog timeouts in mSecs */
134 #define IWL_WATCHDOG_DISABLED	0
135 #define IWL_DEF_WD_TIMEOUT	2500
136 #define IWL_LONG_WD_TIMEOUT	10000
137 #define IWL_MAX_WD_TIMEOUT	120000
138 
139 #define IWL_DEFAULT_MAX_TX_POWER 22
140 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
141 				 NETIF_F_TSO | NETIF_F_TSO6)
142 
143 /* Antenna presence definitions */
144 #define	ANT_NONE	0x0
145 #define	ANT_INVALID	0xff
146 #define	ANT_A		BIT(0)
147 #define	ANT_B		BIT(1)
148 #define ANT_C		BIT(2)
149 #define	ANT_AB		(ANT_A | ANT_B)
150 #define	ANT_AC		(ANT_A | ANT_C)
151 #define ANT_BC		(ANT_B | ANT_C)
152 #define ANT_ABC		(ANT_A | ANT_B | ANT_C)
153 #define MAX_ANT_NUM 3
154 
155 
156 static inline u8 num_of_ant(u8 mask)
157 {
158 	return  !!((mask) & ANT_A) +
159 		!!((mask) & ANT_B) +
160 		!!((mask) & ANT_C);
161 }
162 
163 /*
164  * @max_ll_items: max number of OTP blocks
165  * @shadow_ram_support: shadow support for OTP memory
166  * @led_compensation: compensate on the led on/off time per HW according
167  *	to the deviation to achieve the desired led frequency.
168  *	The detail algorithm is described in iwl-led.c
169  * @wd_timeout: TX queues watchdog timeout
170  * @max_event_log_size: size of event log buffer size for ucode event logging
171  * @shadow_reg_enable: HW shadow register support
172  * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
173  *	is in flight. This is due to a HW bug in 7260, 3160 and 7265.
174  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
175  * @max_tfd_queue_size: max number of entries in tfd queue.
176  */
177 struct iwl_base_params {
178 	unsigned int wd_timeout;
179 
180 	u16 eeprom_size;
181 	u16 max_event_log_size;
182 
183 	u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
184 	   shadow_ram_support:1,
185 	   shadow_reg_enable:1,
186 	   pcie_l1_allowed:1,
187 	   apmg_wake_up_wa:1,
188 	   scd_chain_ext_wa:1;
189 
190 	u16 num_of_queues;	/* def: HW dependent */
191 	u32 max_tfd_queue_size;	/* def: HW dependent */
192 
193 	u8 max_ll_items;
194 	u8 led_compensation;
195 };
196 
197 /*
198  * @stbc: support Tx STBC and 1*SS Rx STBC
199  * @ldpc: support Tx/Rx with LDPC
200  * @use_rts_for_aggregation: use rts/cts protection for HT traffic
201  * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
202  */
203 struct iwl_ht_params {
204 	u8 ht_greenfield_support:1,
205 	   stbc:1,
206 	   ldpc:1,
207 	   use_rts_for_aggregation:1;
208 	u8 ht40_bands;
209 };
210 
211 /*
212  * Tx-backoff threshold
213  * @temperature: The threshold in Celsius
214  * @backoff: The tx-backoff in uSec
215  */
216 struct iwl_tt_tx_backoff {
217 	s32 temperature;
218 	u32 backoff;
219 };
220 
221 #define TT_TX_BACKOFF_SIZE 6
222 
223 /**
224  * struct iwl_tt_params - thermal throttling parameters
225  * @ct_kill_entry: CT Kill entry threshold
226  * @ct_kill_exit: CT Kill exit threshold
227  * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
228  *	to checks whether to exit CT Kill.
229  * @dynamic_smps_entry: Dynamic SMPS entry threshold
230  * @dynamic_smps_exit: Dynamic SMPS exit threshold
231  * @tx_protection_entry: TX protection entry threshold
232  * @tx_protection_exit: TX protection exit threshold
233  * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
234  * @support_ct_kill: Support CT Kill?
235  * @support_dynamic_smps: Support dynamic SMPS?
236  * @support_tx_protection: Support tx protection?
237  * @support_tx_backoff: Support tx-backoff?
238  */
239 struct iwl_tt_params {
240 	u32 ct_kill_entry;
241 	u32 ct_kill_exit;
242 	u32 ct_kill_duration;
243 	u32 dynamic_smps_entry;
244 	u32 dynamic_smps_exit;
245 	u32 tx_protection_entry;
246 	u32 tx_protection_exit;
247 	struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
248 	u8 support_ct_kill:1,
249 	   support_dynamic_smps:1,
250 	   support_tx_protection:1,
251 	   support_tx_backoff:1;
252 };
253 
254 /*
255  * information on how to parse the EEPROM
256  */
257 #define EEPROM_REG_BAND_1_CHANNELS		0x08
258 #define EEPROM_REG_BAND_2_CHANNELS		0x26
259 #define EEPROM_REG_BAND_3_CHANNELS		0x42
260 #define EEPROM_REG_BAND_4_CHANNELS		0x5C
261 #define EEPROM_REG_BAND_5_CHANNELS		0x74
262 #define EEPROM_REG_BAND_24_HT40_CHANNELS	0x82
263 #define EEPROM_REG_BAND_52_HT40_CHANNELS	0x92
264 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS	0x80
265 #define EEPROM_REGULATORY_BAND_NO_HT40		0
266 
267 /* lower blocks contain EEPROM image and calibration data */
268 #define OTP_LOW_IMAGE_SIZE_2K		(2 * 512 * sizeof(u16))  /*  2 KB */
269 #define OTP_LOW_IMAGE_SIZE_16K		(16 * 512 * sizeof(u16)) /* 16 KB */
270 #define OTP_LOW_IMAGE_SIZE_32K		(32 * 512 * sizeof(u16)) /* 32 KB */
271 
272 struct iwl_eeprom_params {
273 	const u8 regulatory_bands[7];
274 	bool enhanced_txpower;
275 };
276 
277 /* Tx-backoff power threshold
278  * @pwr: The power limit in mw
279  * @backoff: The tx-backoff in uSec
280  */
281 struct iwl_pwr_tx_backoff {
282 	u32 pwr;
283 	u32 backoff;
284 };
285 
286 /**
287  * struct iwl_csr_params
288  *
289  * @flag_sw_reset: reset the device
290  * @flag_mac_clock_ready:
291  *	Indicates MAC (ucode processor, etc.) is powered up and can run.
292  *	Internal resources are accessible.
293  *	NOTE:  This does not indicate that the processor is actually running.
294  *	NOTE:  This does not indicate that device has completed
295  *	       init or post-power-down restore of internal SRAM memory.
296  *	       Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
297  *	       SRAM is restored and uCode is in normal operation mode.
298  *	       This note is relevant only for pre 5xxx devices.
299  *	NOTE:  After device reset, this bit remains "0" until host sets
300  *	       INIT_DONE
301  * @flag_init_done: Host sets this to put device into fully operational
302  *	D0 power mode. Host resets this after SW_RESET to put device into
303  *	low power mode.
304  * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
305  *	to allow host access to device-internal resources. Host must wait for
306  *	mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
307  *	registers.
308  * @flag_val_mac_access_en: mac access is enabled
309  * @flag_master_dis: disable master
310  * @flag_stop_master: stop master
311  * @addr_sw_reset: address for resetting the device
312  * @mac_addr0_otp: first part of MAC address from OTP
313  * @mac_addr1_otp: second part of MAC address from OTP
314  * @mac_addr0_strap: first part of MAC address from strap
315  * @mac_addr1_strap: second part of MAC address from strap
316  */
317 struct iwl_csr_params {
318 	u8 flag_sw_reset;
319 	u8 flag_mac_clock_ready;
320 	u8 flag_init_done;
321 	u8 flag_mac_access_req;
322 	u8 flag_val_mac_access_en;
323 	u8 flag_master_dis;
324 	u8 flag_stop_master;
325 	u8 addr_sw_reset;
326 	u32 mac_addr0_otp;
327 	u32 mac_addr1_otp;
328 	u32 mac_addr0_strap;
329 	u32 mac_addr1_strap;
330 };
331 
332 /**
333  * struct iwl_cfg
334  * @name: Official name of the device
335  * @fw_name_pre: Firmware filename prefix. The api version and extension
336  *	(.ucode) will be added to filename before loading from disk. The
337  *	filename is constructed as fw_name_pre<api>.ucode.
338  * @fw_name_pre_b_or_c_step: same as @fw_name_pre, only for b or c steps
339  *	(if supported)
340  * @fw_name_pre_rf_next_step: same as @fw_name_pre_b_or_c_step, only for rf
341  *	next step. Supported only in integrated solutions.
342  * @ucode_api_max: Highest version of uCode API supported by driver.
343  * @ucode_api_min: Lowest version of uCode API supported by driver.
344  * @max_inst_size: The maximal length of the fw inst section (only DVM)
345  * @max_data_size: The maximal length of the fw data section (only DVM)
346  * @valid_tx_ant: valid transmit antenna
347  * @valid_rx_ant: valid receive antenna
348  * @non_shared_ant: the antenna that is for WiFi only
349  * @nvm_ver: NVM version
350  * @nvm_calib_ver: NVM calibration version
351  * @lib: pointer to the lib ops
352  * @base_params: pointer to basic parameters
353  * @ht_params: point to ht parameters
354  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
355  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
356  * @internal_wimax_coex: internal wifi/wimax combo device
357  * @high_temp: Is this NIC is designated to be in high temperature.
358  * @host_interrupt_operation_mode: device needs host interrupt operation
359  *	mode set
360  * @nvm_hw_section_num: the ID of the HW NVM section
361  * @mac_addr_from_csr: read HW address from CSR registers
362  * @features: hw features, any combination of feature_whitelist
363  * @pwr_tx_backoffs: translation table between power limits and backoffs
364  * @csr: csr flags and addresses that are different across devices
365  * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
366  * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
367  * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
368  *	station can receive in HT
369  * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
370  *	station can receive in VHT
371  * @dccm_offset: offset from which DCCM begins
372  * @dccm_len: length of DCCM (including runtime stack CCM)
373  * @dccm2_offset: offset from which the second DCCM begins
374  * @dccm2_len: length of the second DCCM
375  * @smem_offset: offset from which the SMEM begins
376  * @smem_len: the length of SMEM
377  * @mq_rx_supported: multi-queue rx support
378  * @vht_mu_mimo_supported: VHT MU-MIMO support
379  * @rf_id: need to read rf_id to determine the firmware image
380  * @integrated: discrete or integrated
381  * @gen2: 22000 and on transport operation
382  * @cdb: CDB support
383  * @nvm_type: see &enum iwl_nvm_type
384  * @d3_debug_data_base_addr: base address where D3 debug data is stored
385  * @d3_debug_data_length: length of the D3 debug data
386  *
387  * We enable the driver to be backward compatible wrt. hardware features.
388  * API differences in uCode shouldn't be handled here but through TLVs
389  * and/or the uCode API version instead.
390  */
391 struct iwl_cfg {
392 	/* params specific to an individual device within a device family */
393 	const char *name;
394 	const char *fw_name_pre;
395 	const char *fw_name_pre_b_or_c_step;
396 	const char *fw_name_pre_rf_next_step;
397 	/* params not likely to change within a device family */
398 	const struct iwl_base_params *base_params;
399 	/* params likely to change within a device family */
400 	const struct iwl_ht_params *ht_params;
401 	const struct iwl_eeprom_params *eeprom_params;
402 	const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
403 	const char *default_nvm_file_C_step;
404 	const struct iwl_tt_params *thermal_params;
405 	const struct iwl_csr_params *csr;
406 	enum iwl_device_family device_family;
407 	enum iwl_led_mode led_mode;
408 	enum iwl_nvm_type nvm_type;
409 	u32 max_data_size;
410 	u32 max_inst_size;
411 	netdev_features_t features;
412 	u32 dccm_offset;
413 	u32 dccm_len;
414 	u32 dccm2_offset;
415 	u32 dccm2_len;
416 	u32 smem_offset;
417 	u32 smem_len;
418 	u32 soc_latency;
419 	u16 nvm_ver;
420 	u16 nvm_calib_ver;
421 	u32 rx_with_siso_diversity:1,
422 	    bt_shared_single_ant:1,
423 	    internal_wimax_coex:1,
424 	    host_interrupt_operation_mode:1,
425 	    high_temp:1,
426 	    mac_addr_from_csr:1,
427 	    lp_xtal_workaround:1,
428 	    disable_dummy_notification:1,
429 	    apmg_not_supported:1,
430 	    mq_rx_supported:1,
431 	    vht_mu_mimo_supported:1,
432 	    rf_id:1,
433 	    integrated:1,
434 	    use_tfh:1,
435 	    gen2:1,
436 	    cdb:1,
437 	    dbgc_supported:1;
438 	u8 valid_tx_ant;
439 	u8 valid_rx_ant;
440 	u8 non_shared_ant;
441 	u8 nvm_hw_section_num;
442 	u8 max_rx_agg_size;
443 	u8 max_tx_agg_size;
444 	u8 max_ht_ampdu_exponent;
445 	u8 max_vht_ampdu_exponent;
446 	u8 ucode_api_max;
447 	u8 ucode_api_min;
448 	u32 min_umac_error_event_table;
449 	u32 extra_phy_cfg_flags;
450 	u32 d3_debug_data_base_addr;
451 	u32 d3_debug_data_length;
452 };
453 
454 static const struct iwl_csr_params iwl_csr_v1 = {
455 	.flag_mac_clock_ready = 0,
456 	.flag_val_mac_access_en = 0,
457 	.flag_init_done = 2,
458 	.flag_mac_access_req = 3,
459 	.flag_sw_reset = 7,
460 	.flag_master_dis = 8,
461 	.flag_stop_master = 9,
462 	.addr_sw_reset = (CSR_BASE + 0x020),
463 	.mac_addr0_otp = 0x380,
464 	.mac_addr1_otp = 0x384,
465 	.mac_addr0_strap = 0x388,
466 	.mac_addr1_strap = 0x38C
467 };
468 
469 static const struct iwl_csr_params iwl_csr_v2 = {
470 	.flag_init_done = 6,
471 	.flag_mac_clock_ready = 20,
472 	.flag_val_mac_access_en = 20,
473 	.flag_mac_access_req = 21,
474 	.flag_master_dis = 28,
475 	.flag_stop_master = 29,
476 	.flag_sw_reset = 31,
477 	.addr_sw_reset = (CSR_BASE + 0x024),
478 	.mac_addr0_otp = 0x30,
479 	.mac_addr1_otp = 0x34,
480 	.mac_addr0_strap = 0x38,
481 	.mac_addr1_strap = 0x3C
482 };
483 
484 /*
485  * This list declares the config structures for all devices.
486  */
487 #if IS_ENABLED(CONFIG_IWLDVM)
488 extern const struct iwl_cfg iwl5300_agn_cfg;
489 extern const struct iwl_cfg iwl5100_agn_cfg;
490 extern const struct iwl_cfg iwl5350_agn_cfg;
491 extern const struct iwl_cfg iwl5100_bgn_cfg;
492 extern const struct iwl_cfg iwl5100_abg_cfg;
493 extern const struct iwl_cfg iwl5150_agn_cfg;
494 extern const struct iwl_cfg iwl5150_abg_cfg;
495 extern const struct iwl_cfg iwl6005_2agn_cfg;
496 extern const struct iwl_cfg iwl6005_2abg_cfg;
497 extern const struct iwl_cfg iwl6005_2bg_cfg;
498 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
499 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
500 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
501 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
502 extern const struct iwl_cfg iwl1030_bgn_cfg;
503 extern const struct iwl_cfg iwl1030_bg_cfg;
504 extern const struct iwl_cfg iwl6030_2agn_cfg;
505 extern const struct iwl_cfg iwl6030_2abg_cfg;
506 extern const struct iwl_cfg iwl6030_2bgn_cfg;
507 extern const struct iwl_cfg iwl6030_2bg_cfg;
508 extern const struct iwl_cfg iwl6000i_2agn_cfg;
509 extern const struct iwl_cfg iwl6000i_2abg_cfg;
510 extern const struct iwl_cfg iwl6000i_2bg_cfg;
511 extern const struct iwl_cfg iwl6000_3agn_cfg;
512 extern const struct iwl_cfg iwl6050_2agn_cfg;
513 extern const struct iwl_cfg iwl6050_2abg_cfg;
514 extern const struct iwl_cfg iwl6150_bgn_cfg;
515 extern const struct iwl_cfg iwl6150_bg_cfg;
516 extern const struct iwl_cfg iwl1000_bgn_cfg;
517 extern const struct iwl_cfg iwl1000_bg_cfg;
518 extern const struct iwl_cfg iwl100_bgn_cfg;
519 extern const struct iwl_cfg iwl100_bg_cfg;
520 extern const struct iwl_cfg iwl130_bgn_cfg;
521 extern const struct iwl_cfg iwl130_bg_cfg;
522 extern const struct iwl_cfg iwl2000_2bgn_cfg;
523 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
524 extern const struct iwl_cfg iwl2030_2bgn_cfg;
525 extern const struct iwl_cfg iwl6035_2agn_cfg;
526 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
527 extern const struct iwl_cfg iwl105_bgn_cfg;
528 extern const struct iwl_cfg iwl105_bgn_d_cfg;
529 extern const struct iwl_cfg iwl135_bgn_cfg;
530 #endif /* CONFIG_IWLDVM */
531 #if IS_ENABLED(CONFIG_IWLMVM)
532 extern const struct iwl_cfg iwl7260_2ac_cfg;
533 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
534 extern const struct iwl_cfg iwl7260_2n_cfg;
535 extern const struct iwl_cfg iwl7260_n_cfg;
536 extern const struct iwl_cfg iwl3160_2ac_cfg;
537 extern const struct iwl_cfg iwl3160_2n_cfg;
538 extern const struct iwl_cfg iwl3160_n_cfg;
539 extern const struct iwl_cfg iwl3165_2ac_cfg;
540 extern const struct iwl_cfg iwl3168_2ac_cfg;
541 extern const struct iwl_cfg iwl7265_2ac_cfg;
542 extern const struct iwl_cfg iwl7265_2n_cfg;
543 extern const struct iwl_cfg iwl7265_n_cfg;
544 extern const struct iwl_cfg iwl7265d_2ac_cfg;
545 extern const struct iwl_cfg iwl7265d_2n_cfg;
546 extern const struct iwl_cfg iwl7265d_n_cfg;
547 extern const struct iwl_cfg iwl8260_2n_cfg;
548 extern const struct iwl_cfg iwl8260_2ac_cfg;
549 extern const struct iwl_cfg iwl8265_2ac_cfg;
550 extern const struct iwl_cfg iwl8275_2ac_cfg;
551 extern const struct iwl_cfg iwl4165_2ac_cfg;
552 extern const struct iwl_cfg iwl9160_2ac_cfg;
553 extern const struct iwl_cfg iwl9260_2ac_cfg;
554 extern const struct iwl_cfg iwl9260_killer_2ac_cfg;
555 extern const struct iwl_cfg iwl9270_2ac_cfg;
556 extern const struct iwl_cfg iwl9460_2ac_cfg;
557 extern const struct iwl_cfg iwl9560_2ac_cfg;
558 extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
559 extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
560 extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
561 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
562 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc;
563 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc;
564 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
565 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
566 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
567 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
568 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk;
569 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk;
570 extern const struct iwl_cfg iwl22000_2ac_cfg_hr;
571 extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb;
572 extern const struct iwl_cfg iwl22000_2ac_cfg_jf;
573 extern const struct iwl_cfg iwl22000_2ax_cfg_hr;
574 extern const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0;
575 extern const struct iwl_cfg iwl9462_2ac_cfg_qu_b0_jf_b0;
576 extern const struct iwl_cfg iwl9560_2ac_cfg_qu_b0_jf_b0;
577 extern const struct iwl_cfg killer1550i_2ac_cfg_qu_b0_jf_b0;
578 extern const struct iwl_cfg killer1550s_2ac_cfg_qu_b0_jf_b0;
579 extern const struct iwl_cfg iwl22000_2ax_cfg_jf;
580 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0;
581 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0_f0;
582 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0;
583 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0;
584 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0;
585 extern const struct iwl_cfg iwl22560_2ax_cfg_su_cdb;
586 #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */
587 
588 #endif /* __IWL_CONFIG_H__ */
589