1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2008-2014, 2018-2020 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9 
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12 
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 	__le32 ver;	/* major/minor/API/serial */
16 	union {
17 		struct {
18 			__le32 inst_size;	/* bytes of runtime code */
19 			__le32 data_size;	/* bytes of runtime data */
20 			__le32 init_size;	/* bytes of init code */
21 			__le32 init_data_size;	/* bytes of init data */
22 			__le32 boot_size;	/* bytes of bootstrap code */
23 			u8 data[0];		/* in same order as sizes */
24 		} v1;
25 		struct {
26 			__le32 build;		/* build number */
27 			__le32 inst_size;	/* bytes of runtime code */
28 			__le32 data_size;	/* bytes of runtime data */
29 			__le32 init_size;	/* bytes of init code */
30 			__le32 init_data_size;	/* bytes of init data */
31 			__le32 boot_size;	/* bytes of bootstrap code */
32 			u8 data[0];		/* in same order as sizes */
33 		} v2;
34 	} u;
35 };
36 
37 #define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE	0x100
39 
40 /*
41  * new TLV uCode file layout
42  *
43  * The new TLV file format contains TLVs, that each specify
44  * some piece of data.
45  */
46 
47 enum iwl_ucode_tlv_type {
48 	IWL_UCODE_TLV_INVALID		= 0, /* unused */
49 	IWL_UCODE_TLV_INST		= 1,
50 	IWL_UCODE_TLV_DATA		= 2,
51 	IWL_UCODE_TLV_INIT		= 3,
52 	IWL_UCODE_TLV_INIT_DATA		= 4,
53 	IWL_UCODE_TLV_BOOT		= 5,
54 	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
55 	IWL_UCODE_TLV_PAN		= 7,
56 	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
57 	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
58 	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
59 	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
60 	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
61 	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
62 	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
63 	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
64 	IWL_UCODE_TLV_WOWLAN_INST	= 16,
65 	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
66 	IWL_UCODE_TLV_FLAGS		= 18,
67 	IWL_UCODE_TLV_SEC_RT		= 19,
68 	IWL_UCODE_TLV_SEC_INIT		= 20,
69 	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
70 	IWL_UCODE_TLV_DEF_CALIB		= 22,
71 	IWL_UCODE_TLV_PHY_SKU		= 23,
72 	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
73 	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
74 	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
75 	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
76 	IWL_UCODE_TLV_CSCHEME		= 28,
77 	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
78 	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
79 	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
80 	IWL_UCODE_TLV_PAGING		= 32,
81 	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
82 	/* 35 is unused */
83 	IWL_UCODE_TLV_FW_VERSION	= 36,
84 	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
85 	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
86 	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
87 	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
88 	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
89 	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
90 	IWL_UCODE_TLV_IML		= 52,
91 	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
92 	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
93 	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
94 	IWL_UCODE_TLV_HW_TYPE			= 58,
95 	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
96 
97 	IWL_UCODE_TLV_PNVM_VERSION		= 62,
98 	IWL_UCODE_TLV_PNVM_SKU			= 64,
99 
100 	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
101 
102 	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
103 	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
104 	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
105 	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
106 	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
107 	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
108 
109 	/* TLVs 0x1000-0x2000 are for internal driver usage */
110 	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
111 };
112 
113 struct iwl_ucode_tlv {
114 	__le32 type;		/* see above */
115 	__le32 length;		/* not including type/length fields */
116 	u8 data[0];
117 };
118 
119 #define IWL_TLV_UCODE_MAGIC		0x0a4c5749
120 #define FW_VER_HUMAN_READABLE_SZ	64
121 
122 struct iwl_tlv_ucode_header {
123 	/*
124 	 * The TLV style ucode header is distinguished from
125 	 * the v1/v2 style header by first four bytes being
126 	 * zero, as such is an invalid combination of
127 	 * major/minor/API/serial versions.
128 	 */
129 	__le32 zero;
130 	__le32 magic;
131 	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
132 	/* major/minor/API/serial or major in new format */
133 	__le32 ver;
134 	__le32 build;
135 	__le64 ignore;
136 	/*
137 	 * The data contained herein has a TLV layout,
138 	 * see above for the TLV header and types.
139 	 * Note that each TLV is padded to a length
140 	 * that is a multiple of 4 for alignment.
141 	 */
142 	u8 data[0];
143 };
144 
145 /*
146  * ucode TLVs
147  *
148  * ability to get extension for: flags & capabilities from ucode binaries files
149  */
150 struct iwl_ucode_api {
151 	__le32 api_index;
152 	__le32 api_flags;
153 } __packed;
154 
155 struct iwl_ucode_capa {
156 	__le32 api_index;
157 	__le32 api_capa;
158 } __packed;
159 
160 /**
161  * enum iwl_ucode_tlv_flag - ucode API flags
162  * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
163  *	was a separate TLV but moved here to save space.
164  * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
165  *	treats good CRC threshold as a boolean
166  * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
167  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
168  * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
169  *	offload profile config command.
170  * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
171  *	(rather than two) IPv6 addresses
172  * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
173  *	from the probe request template.
174  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
175  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
176  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
177  * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
178  * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
179  * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
180  */
181 enum iwl_ucode_tlv_flag {
182 	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
183 	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
184 	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
185 	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
186 	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
187 	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
188 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
189 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
190 	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
191 	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
192 	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
193 	IWL_UCODE_TLV_FLAGS_BCAST_FILTERING	= BIT(29),
194 };
195 
196 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
197 
198 /**
199  * enum iwl_ucode_tlv_api - ucode api
200  * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
201  *	longer than the passive one, which is essential for fragmented scan.
202  * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
203  * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
204  * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
205  * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
206  *	iteration complete notification, and the timestamp reported for RX
207  *	received during scan, are reported in TSF of the mac specified in the
208  *	scan request.
209  * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
210  *	ADD_MODIFY_STA_KEY_API_S_VER_2.
211  * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
212  * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
213  * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
214  * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
215  *	indicating low latency direction.
216  * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
217  *	deprecated.
218  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
219  *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
220  * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
221  * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
222  *	the REDUCE_TX_POWER_CMD.
223  * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
224  *	version of the beacon notification.
225  * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
226  *	BEACON_FILTER_CONFIG_API_S_VER_4.
227  * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
228  *	REGULATORY_NVM_GET_INFO_RSP_API_S.
229  * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
230  *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
231  * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
232  *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
233  *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
234  * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
235  *	STA_CONTEXT_DOT11AX_API_S
236  * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
237  *	version tables.
238  * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
239  *  SCAN_CONFIG_DB_CMD_API_S.
240  *
241  * @NUM_IWL_UCODE_TLV_API: number of bits used
242  */
243 enum iwl_ucode_tlv_api {
244 	/* API Set 0 */
245 	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
246 	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
247 	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
248 	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
249 	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
250 	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
251 	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
252 	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
253 	/* API Set 1 */
254 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
255 	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
256 	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
257 	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
258 	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
259 	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
260 	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
261 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
262 	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
263 	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
264 	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
265 	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
266 	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
267 	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
268 	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
269 	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
270 	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
271 	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
272 	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
273 	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
274 	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
275 	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
276 	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
277 
278 
279 	NUM_IWL_UCODE_TLV_API
280 #ifdef __CHECKER__
281 		/* sparse says it cannot increment the previous enum member */
282 		= 128
283 #endif
284 };
285 
286 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
287 
288 /**
289  * enum iwl_ucode_tlv_capa - ucode capabilities
290  * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
291  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
292  * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
293  * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
294  * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
295  * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
296  *	tx power value into TPC Report action frame and Link Measurement Report
297  *	action frame
298  * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
299  *	channel in DS parameter set element in probe requests.
300  * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
301  *	probe requests.
302  * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
303  * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
304  *	which also implies support for the scheduler configuration command
305  * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
306  * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
307  * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
308  * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
309  * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
310  * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
311  * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
312  *	is standalone or with a BSS station interface in the same binding.
313  * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
314  * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
315  *	sources for the MCC. This TLV bit is a future replacement to
316  *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
317  *	is supported.
318  * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
319  * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
320  * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
321  *	stabilization latency for SoCs.
322  * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
323  * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
324  * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
325  * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
326  * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
327  * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
328  *	(6 GHz).
329  * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
330  * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
331  * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
332  * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
333  * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
334  *	countdown offloading. Beacon notifications are not sent to the host.
335  *	The fw also offloads TBTT alignment.
336  * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
337  *	antenna the beacon should be transmitted
338  * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
339  *	from AP and will send it upon d0i3 exit.
340  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
341  * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
342  * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
343  *	thresholds reporting
344  * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
345  * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
346  *	regular image.
347  * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
348  *	memory addresses from the firmware.
349  * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
350  * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
351  *	command size (command version 4) that supports toggling ACK TX
352  *	power reduction.
353  * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
354  * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
355  *	capability.
356  * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
357  *	to report the CSI information with (certain) RX frames
358  * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
359  *	initiator and responder
360  * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
361  * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
362  * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
363  *	reset flow
364  *
365  * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
366  */
367 enum iwl_ucode_tlv_capa {
368 	/* set 0 */
369 	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
370 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
371 	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
372 	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
373 	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
374 	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
375 	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
376 	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
377 	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
378 	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
379 	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
380 	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
381 	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
382 	IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)19,
383 	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
384 	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
385 	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
386 	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
387 	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
388 	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
389 	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
390 
391 	/* set 1 */
392 	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
393 	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
394 	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
395 	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
396 	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
397 	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
398 	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
399 	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
400 	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
401 	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
402 	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
403 	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
404 	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
405 	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
406 	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
407 	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
408 	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
409 	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
410 
411 	/* set 2 */
412 	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
413 	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
414 	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
415 	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
416 	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
417 	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
418 	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
419 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
420 	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
421 	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
422 	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
423 	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
424 	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
425 	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
426 	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
427 	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
428 	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
429 	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
430 	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
431 	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
432 	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
433 
434 	/* set 3 */
435 	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
436 
437 	/*
438 	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
439 	 */
440 	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
441 
442 	NUM_IWL_UCODE_TLV_CAPA
443 #ifdef __CHECKER__
444 		/* sparse says it cannot increment the previous enum member */
445 		= 128
446 #endif
447 };
448 
449 /* The default calibrate table size if not specified by firmware file */
450 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
451 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
452 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
453 
454 /* The default max probe length if not specified by the firmware file */
455 #define IWL_DEFAULT_MAX_PROBE_LENGTH	200
456 
457 /*
458  * For 16.0 uCode and above, there is no differentiation between sections,
459  * just an offset to the HW address.
460  */
461 #define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
462 #define PAGING_SEPARATOR_SECTION	0xAAAABBBB
463 
464 /* uCode version contains 4 values: Major/Minor/API/Serial */
465 #define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
466 #define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
467 #define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
468 #define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
469 
470 /**
471  * struct iwl_tlv_calib_ctrl - Calibration control struct.
472  * Sent as part of the phy configuration command.
473  * @flow_trigger: bitmap for which calibrations to perform according to
474  *		flow triggers.
475  * @event_trigger: bitmap for which calibrations to perform according to
476  *		event triggers.
477  */
478 struct iwl_tlv_calib_ctrl {
479 	__le32 flow_trigger;
480 	__le32 event_trigger;
481 } __packed;
482 
483 enum iwl_fw_phy_cfg {
484 	FW_PHY_CFG_RADIO_TYPE_POS = 0,
485 	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
486 	FW_PHY_CFG_RADIO_STEP_POS = 2,
487 	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
488 	FW_PHY_CFG_RADIO_DASH_POS = 4,
489 	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
490 	FW_PHY_CFG_TX_CHAIN_POS = 16,
491 	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
492 	FW_PHY_CFG_RX_CHAIN_POS = 20,
493 	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
494 	FW_PHY_CFG_CHAIN_SAD_POS = 23,
495 	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
496 	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
497 	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
498 	FW_PHY_CFG_SHARED_CLK = BIT(31),
499 };
500 
501 #define IWL_UCODE_MAX_CS		1
502 
503 /**
504  * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
505  * @cipher: a cipher suite selector
506  * @flags: cipher scheme flags (currently reserved for a future use)
507  * @hdr_len: a size of MPDU security header
508  * @pn_len: a size of PN
509  * @pn_off: an offset of pn from the beginning of the security header
510  * @key_idx_off: an offset of key index byte in the security header
511  * @key_idx_mask: a bit mask of key_idx bits
512  * @key_idx_shift: bit shift needed to get key_idx
513  * @mic_len: mic length in bytes
514  * @hw_cipher: a HW cipher index used in host commands
515  */
516 struct iwl_fw_cipher_scheme {
517 	__le32 cipher;
518 	u8 flags;
519 	u8 hdr_len;
520 	u8 pn_len;
521 	u8 pn_off;
522 	u8 key_idx_off;
523 	u8 key_idx_mask;
524 	u8 key_idx_shift;
525 	u8 mic_len;
526 	u8 hw_cipher;
527 } __packed;
528 
529 enum iwl_fw_dbg_reg_operator {
530 	CSR_ASSIGN,
531 	CSR_SETBIT,
532 	CSR_CLEARBIT,
533 
534 	PRPH_ASSIGN,
535 	PRPH_SETBIT,
536 	PRPH_CLEARBIT,
537 
538 	INDIRECT_ASSIGN,
539 	INDIRECT_SETBIT,
540 	INDIRECT_CLEARBIT,
541 
542 	PRPH_BLOCKBIT,
543 };
544 
545 /**
546  * struct iwl_fw_dbg_reg_op - an operation on a register
547  *
548  * @op: &enum iwl_fw_dbg_reg_operator
549  * @addr: offset of the register
550  * @val: value
551  */
552 struct iwl_fw_dbg_reg_op {
553 	u8 op;
554 	u8 reserved[3];
555 	__le32 addr;
556 	__le32 val;
557 } __packed;
558 
559 /**
560  * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
561  *
562  * @SMEM_MODE: monitor stores the data in SMEM
563  * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
564  * @MARBH_MODE: monitor stores the data in MARBH buffer
565  * @MIPI_MODE: monitor outputs the data through the MIPI interface
566  */
567 enum iwl_fw_dbg_monitor_mode {
568 	SMEM_MODE = 0,
569 	EXTERNAL_MODE = 1,
570 	MARBH_MODE = 2,
571 	MIPI_MODE = 3,
572 };
573 
574 /**
575  * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
576  *
577  * @data_type: the memory segment type to record
578  * @ofs: the memory segment offset
579  * @len: the memory segment length, in bytes
580  *
581  * This parses IWL_UCODE_TLV_FW_MEM_SEG
582  */
583 struct iwl_fw_dbg_mem_seg_tlv {
584 	__le32 data_type;
585 	__le32 ofs;
586 	__le32 len;
587 } __packed;
588 
589 /**
590  * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
591  *
592  * @version: version of the TLV - currently 0
593  * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
594  * @size_power: buffer size will be 2^(size_power + 11)
595  * @base_reg: addr of the base addr register (PRPH)
596  * @end_reg:  addr of the end addr register (PRPH)
597  * @write_ptr_reg: the addr of the reg of the write pointer
598  * @wrap_count: the addr of the reg of the wrap_count
599  * @base_shift: shift right of the base addr reg
600  * @end_shift: shift right of the end addr reg
601  * @reg_ops: array of registers operations
602  *
603  * This parses IWL_UCODE_TLV_FW_DBG_DEST
604  */
605 struct iwl_fw_dbg_dest_tlv_v1 {
606 	u8 version;
607 	u8 monitor_mode;
608 	u8 size_power;
609 	u8 reserved;
610 	__le32 base_reg;
611 	__le32 end_reg;
612 	__le32 write_ptr_reg;
613 	__le32 wrap_count;
614 	u8 base_shift;
615 	u8 end_shift;
616 	struct iwl_fw_dbg_reg_op reg_ops[0];
617 } __packed;
618 
619 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
620 #define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
621 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
622 #define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
623 /* The smem buffer chunks are in units of 256 bits */
624 #define IWL_M2S_UNIT_SIZE			0x100
625 
626 struct iwl_fw_dbg_dest_tlv {
627 	u8 version;
628 	u8 monitor_mode;
629 	u8 size_power;
630 	u8 reserved;
631 	__le32 cfg_reg;
632 	__le32 write_ptr_reg;
633 	__le32 wrap_count;
634 	u8 base_shift;
635 	u8 size_shift;
636 	struct iwl_fw_dbg_reg_op reg_ops[0];
637 } __packed;
638 
639 struct iwl_fw_dbg_conf_hcmd {
640 	u8 id;
641 	u8 reserved;
642 	__le16 len;
643 	u8 data[0];
644 } __packed;
645 
646 /**
647  * enum iwl_fw_dbg_trigger_mode - triggers functionalities
648  *
649  * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
650  * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
651  * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
652  *	collect only monitor data
653  */
654 enum iwl_fw_dbg_trigger_mode {
655 	IWL_FW_DBG_TRIGGER_START = BIT(0),
656 	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
657 	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
658 };
659 
660 /**
661  * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
662  * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
663  */
664 enum iwl_fw_dbg_trigger_flags {
665 	IWL_FW_DBG_FORCE_RESTART = BIT(0),
666 };
667 
668 /**
669  * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
670  * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
671  * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
672  * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
673  * @IWL_FW_DBG_CONF_VIF_AP: AP mode
674  * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
675  * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
676  * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
677  */
678 enum iwl_fw_dbg_trigger_vif_type {
679 	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
680 	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
681 	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
682 	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
683 	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
684 	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
685 	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
686 };
687 
688 /**
689  * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
690  * @id: &enum iwl_fw_dbg_trigger
691  * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
692  * @stop_conf_ids: bitmap of configurations this trigger relates to.
693  *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
694  *	to the currently running configuration is set, the data should be
695  *	collected.
696  * @stop_delay: how many milliseconds to wait before collecting the data
697  *	after the STOP trigger fires.
698  * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
699  * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
700  *	configuration should be applied when the triggers kicks in.
701  * @occurrences: number of occurrences. 0 means the trigger will never fire.
702  * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
703  *	trigger in which another occurrence should be ignored.
704  * @flags: &enum iwl_fw_dbg_trigger_flags
705  */
706 struct iwl_fw_dbg_trigger_tlv {
707 	__le32 id;
708 	__le32 vif_type;
709 	__le32 stop_conf_ids;
710 	__le32 stop_delay;
711 	u8 mode;
712 	u8 start_conf_id;
713 	__le16 occurrences;
714 	__le16 trig_dis_ms;
715 	u8 flags;
716 	u8 reserved[5];
717 
718 	u8 data[0];
719 } __packed;
720 
721 #define FW_DBG_START_FROM_ALIVE	0
722 #define FW_DBG_CONF_MAX		32
723 #define FW_DBG_INVALID		0xff
724 
725 /**
726  * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
727  * @stop_consec_missed_bcon: stop recording if threshold is crossed.
728  * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
729  * @start_consec_missed_bcon: start recording if threshold is crossed.
730  * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
731  * @reserved1: reserved
732  * @reserved2: reserved
733  */
734 struct iwl_fw_dbg_trigger_missed_bcon {
735 	__le32 stop_consec_missed_bcon;
736 	__le32 stop_consec_missed_bcon_since_rx;
737 	__le32 reserved2[2];
738 	__le32 start_consec_missed_bcon;
739 	__le32 start_consec_missed_bcon_since_rx;
740 	__le32 reserved1[2];
741 } __packed;
742 
743 /**
744  * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
745  * cmds: the list of commands to trigger the collection on
746  */
747 struct iwl_fw_dbg_trigger_cmd {
748 	struct cmd {
749 		u8 cmd_id;
750 		u8 group_id;
751 	} __packed cmds[16];
752 } __packed;
753 
754 /**
755  * iwl_fw_dbg_trigger_stats - configures trigger for statistics
756  * @stop_offset: the offset of the value to be monitored
757  * @stop_threshold: the threshold above which to collect
758  * @start_offset: the offset of the value to be monitored
759  * @start_threshold: the threshold above which to start recording
760  */
761 struct iwl_fw_dbg_trigger_stats {
762 	__le32 stop_offset;
763 	__le32 stop_threshold;
764 	__le32 start_offset;
765 	__le32 start_threshold;
766 } __packed;
767 
768 /**
769  * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
770  * @rssi: RSSI value to trigger at
771  */
772 struct iwl_fw_dbg_trigger_low_rssi {
773 	__le32 rssi;
774 } __packed;
775 
776 /**
777  * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
778  * @stop_auth_denied: number of denied authentication to collect
779  * @stop_auth_timeout: number of authentication timeout to collect
780  * @stop_rx_deauth: number of Rx deauth before to collect
781  * @stop_tx_deauth: number of Tx deauth before to collect
782  * @stop_assoc_denied: number of denied association to collect
783  * @stop_assoc_timeout: number of association timeout to collect
784  * @stop_connection_loss: number of connection loss to collect
785  * @start_auth_denied: number of denied authentication to start recording
786  * @start_auth_timeout: number of authentication timeout to start recording
787  * @start_rx_deauth: number of Rx deauth to start recording
788  * @start_tx_deauth: number of Tx deauth to start recording
789  * @start_assoc_denied: number of denied association to start recording
790  * @start_assoc_timeout: number of association timeout to start recording
791  * @start_connection_loss: number of connection loss to start recording
792  */
793 struct iwl_fw_dbg_trigger_mlme {
794 	u8 stop_auth_denied;
795 	u8 stop_auth_timeout;
796 	u8 stop_rx_deauth;
797 	u8 stop_tx_deauth;
798 
799 	u8 stop_assoc_denied;
800 	u8 stop_assoc_timeout;
801 	u8 stop_connection_loss;
802 	u8 reserved;
803 
804 	u8 start_auth_denied;
805 	u8 start_auth_timeout;
806 	u8 start_rx_deauth;
807 	u8 start_tx_deauth;
808 
809 	u8 start_assoc_denied;
810 	u8 start_assoc_timeout;
811 	u8 start_connection_loss;
812 	u8 reserved2;
813 } __packed;
814 
815 /**
816  * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
817  * @command_queue: timeout for the command queue in ms
818  * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
819  * @softap: timeout for the queues of a softAP in ms
820  * @p2p_go: timeout for the queues of a P2P GO in ms
821  * @p2p_client: timeout for the queues of a P2P client in ms
822  * @p2p_device: timeout for the queues of a P2P device in ms
823  * @ibss: timeout for the queues of an IBSS in ms
824  * @tdls: timeout for the queues of a TDLS station in ms
825  */
826 struct iwl_fw_dbg_trigger_txq_timer {
827 	__le32 command_queue;
828 	__le32 bss;
829 	__le32 softap;
830 	__le32 p2p_go;
831 	__le32 p2p_client;
832 	__le32 p2p_device;
833 	__le32 ibss;
834 	__le32 tdls;
835 	__le32 reserved[4];
836 } __packed;
837 
838 /**
839  * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
840  * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
841  *	trigger each time a time event notification that relates to time event
842  *	id with one of the actions in the bitmap is received and
843  *	BIT(notif->status) is set in status_bitmap.
844  *
845  */
846 struct iwl_fw_dbg_trigger_time_event {
847 	struct {
848 		__le32 id;
849 		__le32 action_bitmap;
850 		__le32 status_bitmap;
851 	} __packed time_events[16];
852 } __packed;
853 
854 /**
855  * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
856  * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
857  *	when an Rx BlockAck session is started.
858  * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
859  *	when an Rx BlockAck session is stopped.
860  * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
861  *	when a Tx BlockAck session is started.
862  * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
863  *	when a Tx BlockAck session is stopped.
864  * rx_bar: tid bitmap to configure on what tid the trigger should occur
865  *	when a BAR is received (for a Tx BlockAck session).
866  * tx_bar: tid bitmap to configure on what tid the trigger should occur
867  *	when a BAR is send (for an Rx BlocAck session).
868  * frame_timeout: tid bitmap to configure on what tid the trigger should occur
869  *	when a frame times out in the reodering buffer.
870  */
871 struct iwl_fw_dbg_trigger_ba {
872 	__le16 rx_ba_start;
873 	__le16 rx_ba_stop;
874 	__le16 tx_ba_start;
875 	__le16 tx_ba_stop;
876 	__le16 rx_bar;
877 	__le16 tx_bar;
878 	__le16 frame_timeout;
879 } __packed;
880 
881 /**
882  * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
883  * @action_bitmap: the TDLS action to trigger the collection upon
884  * @peer_mode: trigger on specific peer or all
885  * @peer: the TDLS peer to trigger the collection on
886  */
887 struct iwl_fw_dbg_trigger_tdls {
888 	u8 action_bitmap;
889 	u8 peer_mode;
890 	u8 peer[ETH_ALEN];
891 	u8 reserved[4];
892 } __packed;
893 
894 /**
895  * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
896  *  status.
897  * @statuses: the list of statuses to trigger the collection on
898  */
899 struct iwl_fw_dbg_trigger_tx_status {
900 	struct tx_status {
901 		u8 status;
902 		u8 reserved[3];
903 	} __packed statuses[16];
904 	__le32 reserved[2];
905 } __packed;
906 
907 /**
908  * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
909  * @id: conf id
910  * @usniffer: should the uSniffer image be used
911  * @num_of_hcmds: how many HCMDs to send are present here
912  * @hcmd: a variable length host command to be sent to apply the configuration.
913  *	If there is more than one HCMD to send, they will appear one after the
914  *	other and be sent in the order that they appear in.
915  * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
916  * %FW_DBG_CONF_MAX configuration per run.
917  */
918 struct iwl_fw_dbg_conf_tlv {
919 	u8 id;
920 	u8 usniffer;
921 	u8 reserved;
922 	u8 num_of_hcmds;
923 	struct iwl_fw_dbg_conf_hcmd hcmd;
924 } __packed;
925 
926 #define IWL_FW_CMD_VER_UNKNOWN 99
927 
928 /**
929  * struct iwl_fw_cmd_version - firmware command version entry
930  * @cmd: command ID
931  * @group: group ID
932  * @cmd_ver: command version
933  * @notif_ver: notification version
934  */
935 struct iwl_fw_cmd_version {
936 	u8 cmd;
937 	u8 group;
938 	u8 cmd_ver;
939 	u8 notif_ver;
940 } __packed;
941 
942 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
943 					size_t fixed_size, size_t var_size)
944 {
945 	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
946 
947 	if (WARN_ON(var_len % var_size))
948 		return 0;
949 
950 	return var_len / var_size;
951 }
952 
953 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
954 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
955 			   sizeof(_struct_ptr->_memb[0]))
956 
957 #endif  /* __iwl_fw_file_h__ */
958