1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2008-2014, 2018-2021 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 6 */ 7 #ifndef __iwl_fw_file_h__ 8 #define __iwl_fw_file_h__ 9 10 #include <linux/netdevice.h> 11 #include <linux/nl80211.h> 12 13 /* v1/v2 uCode file layout */ 14 struct iwl_ucode_header { 15 __le32 ver; /* major/minor/API/serial */ 16 union { 17 struct { 18 __le32 inst_size; /* bytes of runtime code */ 19 __le32 data_size; /* bytes of runtime data */ 20 __le32 init_size; /* bytes of init code */ 21 __le32 init_data_size; /* bytes of init data */ 22 __le32 boot_size; /* bytes of bootstrap code */ 23 u8 data[0]; /* in same order as sizes */ 24 } v1; 25 struct { 26 __le32 build; /* build number */ 27 __le32 inst_size; /* bytes of runtime code */ 28 __le32 data_size; /* bytes of runtime data */ 29 __le32 init_size; /* bytes of init code */ 30 __le32 init_data_size; /* bytes of init data */ 31 __le32 boot_size; /* bytes of bootstrap code */ 32 u8 data[0]; /* in same order as sizes */ 33 } v2; 34 } u; 35 }; 36 37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005 38 #define IWL_UCODE_TLV_CONST_BASE 0x100 39 40 /* 41 * new TLV uCode file layout 42 * 43 * The new TLV file format contains TLVs, that each specify 44 * some piece of data. 45 */ 46 47 enum iwl_ucode_tlv_type { 48 IWL_UCODE_TLV_INVALID = 0, /* unused */ 49 IWL_UCODE_TLV_INST = 1, 50 IWL_UCODE_TLV_DATA = 2, 51 IWL_UCODE_TLV_INIT = 3, 52 IWL_UCODE_TLV_INIT_DATA = 4, 53 IWL_UCODE_TLV_BOOT = 5, 54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */ 56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */ 57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 65 IWL_UCODE_TLV_WOWLAN_INST = 16, 66 IWL_UCODE_TLV_WOWLAN_DATA = 17, 67 IWL_UCODE_TLV_FLAGS = 18, 68 IWL_UCODE_TLV_SEC_RT = 19, 69 IWL_UCODE_TLV_SEC_INIT = 20, 70 IWL_UCODE_TLV_SEC_WOWLAN = 21, 71 IWL_UCODE_TLV_DEF_CALIB = 22, 72 IWL_UCODE_TLV_PHY_SKU = 23, 73 IWL_UCODE_TLV_SECURE_SEC_RT = 24, 74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25, 75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26, 76 IWL_UCODE_TLV_NUM_OF_CPU = 27, 77 IWL_UCODE_TLV_CSCHEME = 28, 78 IWL_UCODE_TLV_API_CHANGES_SET = 29, 79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30, 80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31, 81 IWL_UCODE_TLV_PAGING = 32, 82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34, 83 /* 35 is unused */ 84 IWL_UCODE_TLV_FW_VERSION = 36, 85 IWL_UCODE_TLV_FW_DBG_DEST = 38, 86 IWL_UCODE_TLV_FW_DBG_CONF = 39, 87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40, 88 IWL_UCODE_TLV_CMD_VERSIONS = 48, 89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50, 90 IWL_UCODE_TLV_FW_MEM_SEG = 51, 91 IWL_UCODE_TLV_IML = 52, 92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54, 93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55, 94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57, 95 IWL_UCODE_TLV_HW_TYPE = 58, 96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60, 97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61, 98 99 IWL_UCODE_TLV_PNVM_VERSION = 62, 100 IWL_UCODE_TLV_PNVM_SKU = 64, 101 IWL_UCODE_TLV_TCM_DEBUG_ADDRS = 65, 102 103 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0, 104 105 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0, 106 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1, 107 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2, 108 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3, 109 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4, 110 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS, 111 112 /* TLVs 0x1000-0x2000 are for internal driver usage */ 113 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000, 114 }; 115 116 struct iwl_ucode_tlv { 117 __le32 type; /* see above */ 118 __le32 length; /* not including type/length fields */ 119 u8 data[0]; 120 }; 121 122 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 123 #define FW_VER_HUMAN_READABLE_SZ 64 124 125 struct iwl_tlv_ucode_header { 126 /* 127 * The TLV style ucode header is distinguished from 128 * the v1/v2 style header by first four bytes being 129 * zero, as such is an invalid combination of 130 * major/minor/API/serial versions. 131 */ 132 __le32 zero; 133 __le32 magic; 134 u8 human_readable[FW_VER_HUMAN_READABLE_SZ]; 135 /* major/minor/API/serial or major in new format */ 136 __le32 ver; 137 __le32 build; 138 __le64 ignore; 139 /* 140 * The data contained herein has a TLV layout, 141 * see above for the TLV header and types. 142 * Note that each TLV is padded to a length 143 * that is a multiple of 4 for alignment. 144 */ 145 u8 data[0]; 146 }; 147 148 /* 149 * ucode TLVs 150 * 151 * ability to get extension for: flags & capabilities from ucode binaries files 152 */ 153 struct iwl_ucode_api { 154 __le32 api_index; 155 __le32 api_flags; 156 } __packed; 157 158 struct iwl_ucode_capa { 159 __le32 api_index; 160 __le32 api_capa; 161 } __packed; 162 163 /** 164 * enum iwl_ucode_tlv_flag - ucode API flags 165 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously 166 * was a separate TLV but moved here to save space. 167 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID, 168 * treats good CRC threshold as a boolean 169 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w). 170 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD 171 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan 172 * offload profile config command. 173 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six 174 * (rather than two) IPv6 addresses 175 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element 176 * from the probe request template. 177 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version) 178 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version) 179 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD 180 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save 181 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering. 182 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS. 183 */ 184 enum iwl_ucode_tlv_flag { 185 IWL_UCODE_TLV_FLAGS_PAN = BIT(0), 186 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1), 187 IWL_UCODE_TLV_FLAGS_MFP = BIT(2), 188 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7), 189 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10), 190 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12), 191 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15), 192 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16), 193 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24), 194 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25), 195 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26), 196 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29), 197 }; 198 199 typedef unsigned int __bitwise iwl_ucode_tlv_api_t; 200 201 /** 202 * enum iwl_ucode_tlv_api - ucode api 203 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time 204 * longer than the passive one, which is essential for fragmented scan. 205 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source. 206 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params 207 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format 208 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan 209 * iteration complete notification, and the timestamp reported for RX 210 * received during scan, are reported in TSF of the mac specified in the 211 * scan request. 212 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of 213 * ADD_MODIFY_STA_KEY_API_S_VER_2. 214 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement. 215 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2 216 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used 217 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field 218 * indicating low latency direction. 219 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is 220 * deprecated. 221 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8 222 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8 223 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS 224 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of 225 * the REDUCE_TX_POWER_CMD. 226 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short 227 * version of the beacon notification. 228 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of 229 * BEACON_FILTER_CONFIG_API_S_VER_4. 230 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of 231 * REGULATORY_NVM_GET_INFO_RSP_API_S. 232 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of 233 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S. 234 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of 235 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of 236 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S. 237 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of 238 * STA_CONTEXT_DOT11AX_API_S 239 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar 240 * version tables. 241 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of 242 * SCAN_CONFIG_DB_CMD_API_S. 243 * 244 * @NUM_IWL_UCODE_TLV_API: number of bits used 245 */ 246 enum iwl_ucode_tlv_api { 247 /* API Set 0 */ 248 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8, 249 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9, 250 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18, 251 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20, 252 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28, 253 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29, 254 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30, 255 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31, 256 /* API Set 1 */ 257 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32, 258 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33, 259 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34, 260 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35, 261 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36, 262 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38, 263 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41, 264 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42, 265 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44, 266 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45, 267 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46, 268 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47, 269 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48, 270 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49, 271 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50, 272 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52, 273 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53, 274 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54, 275 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55, 276 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56, 277 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57, 278 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58, 279 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59, 280 281 282 #ifdef __CHECKER__ 283 /* sparse says it cannot increment the previous enum member */ 284 #define NUM_IWL_UCODE_TLV_API 128 285 #else 286 NUM_IWL_UCODE_TLV_API 287 #endif 288 }; 289 290 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t; 291 292 /** 293 * enum iwl_ucode_tlv_capa - ucode capabilities 294 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3 295 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory 296 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan. 297 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer 298 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality 299 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current 300 * tx power value into TPC Report action frame and Link Measurement Report 301 * action frame 302 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current 303 * channel in DS parameter set element in probe requests. 304 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in 305 * probe requests. 306 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests 307 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA), 308 * which also implies support for the scheduler configuration command 309 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching 310 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image 311 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command 312 * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command 313 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload 314 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics 315 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it 316 * is standalone or with a BSS station interface in the same binding. 317 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running 318 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different 319 * sources for the MCC. This TLV bit is a future replacement to 320 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR 321 * is supported. 322 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC 323 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used) 324 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting 325 * stabilization latency for SoCs. 326 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification 327 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm 328 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related 329 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2 330 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command 331 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band 332 * (6 GHz). 333 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command 334 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement 335 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts 336 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT 337 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA 338 * countdown offloading. Beacon notifications are not sent to the host. 339 * The fw also offloads TBTT alignment. 340 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what 341 * antenna the beacon should be transmitted 342 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon 343 * from AP and will send it upon d0i3 exit. 344 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3 345 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill 346 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature 347 * thresholds reporting 348 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command 349 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in 350 * regular image. 351 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared 352 * memory addresses from the firmware. 353 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement 354 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger 355 * command size (command version 4) that supports toggling ACK TX 356 * power reduction. 357 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3 358 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax 359 * capability. 360 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured 361 * to report the CSI information with (certain) RX frames 362 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both 363 * initiator and responder 364 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload 365 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames 366 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in 367 * reset flow 368 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC 369 * channels even when these are not enabled. 370 * 371 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used 372 */ 373 enum iwl_ucode_tlv_capa { 374 /* set 0 */ 375 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0, 376 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1, 377 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2, 378 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3, 379 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6, 380 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8, 381 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9, 382 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10, 383 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11, 384 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12, 385 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13, 386 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17, 387 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18, 388 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19, 389 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21, 390 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22, 391 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26, 392 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28, 393 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29, 394 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30, 395 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31, 396 397 /* set 1 */ 398 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37, 399 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38, 400 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39, 401 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40, 402 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41, 403 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43, 404 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44, 405 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45, 406 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46, 407 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47, 408 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48, 409 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49, 410 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50, 411 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52, 412 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53, 413 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54, 414 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56, 415 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57, 416 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58, 417 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60, 418 419 /* set 2 */ 420 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64, 421 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65, 422 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67, 423 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68, 424 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70, 425 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71, 426 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72, 427 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73, 428 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74, 429 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75, 430 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76, 431 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77, 432 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80, 433 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81, 434 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84, 435 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87, 436 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88, 437 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89, 438 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90, 439 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92, 440 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93, 441 442 /* set 3 */ 443 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96, 444 445 /* 446 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels 447 */ 448 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98, 449 450 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100, 451 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)102, 452 453 #ifdef __CHECKER__ 454 /* sparse says it cannot increment the previous enum member */ 455 #define NUM_IWL_UCODE_TLV_CAPA 128 456 #else 457 NUM_IWL_UCODE_TLV_CAPA 458 #endif 459 }; 460 461 /* The default calibrate table size if not specified by firmware file */ 462 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 463 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19 464 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253 465 466 /* The default max probe length if not specified by the firmware file */ 467 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200 468 469 /* 470 * For 16.0 uCode and above, there is no differentiation between sections, 471 * just an offset to the HW address. 472 */ 473 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC 474 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB 475 476 /* uCode version contains 4 values: Major/Minor/API/Serial */ 477 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) 478 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) 479 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) 480 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) 481 482 /** 483 * struct iwl_tlv_calib_ctrl - Calibration control struct. 484 * Sent as part of the phy configuration command. 485 * @flow_trigger: bitmap for which calibrations to perform according to 486 * flow triggers. 487 * @event_trigger: bitmap for which calibrations to perform according to 488 * event triggers. 489 */ 490 struct iwl_tlv_calib_ctrl { 491 __le32 flow_trigger; 492 __le32 event_trigger; 493 } __packed; 494 495 enum iwl_fw_phy_cfg { 496 FW_PHY_CFG_RADIO_TYPE_POS = 0, 497 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS, 498 FW_PHY_CFG_RADIO_STEP_POS = 2, 499 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS, 500 FW_PHY_CFG_RADIO_DASH_POS = 4, 501 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS, 502 FW_PHY_CFG_TX_CHAIN_POS = 16, 503 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS, 504 FW_PHY_CFG_RX_CHAIN_POS = 20, 505 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS, 506 FW_PHY_CFG_CHAIN_SAD_POS = 23, 507 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS, 508 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS, 509 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS, 510 FW_PHY_CFG_SHARED_CLK = BIT(31), 511 }; 512 513 #define IWL_UCODE_MAX_CS 1 514 515 /** 516 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW. 517 * @cipher: a cipher suite selector 518 * @flags: cipher scheme flags (currently reserved for a future use) 519 * @hdr_len: a size of MPDU security header 520 * @pn_len: a size of PN 521 * @pn_off: an offset of pn from the beginning of the security header 522 * @key_idx_off: an offset of key index byte in the security header 523 * @key_idx_mask: a bit mask of key_idx bits 524 * @key_idx_shift: bit shift needed to get key_idx 525 * @mic_len: mic length in bytes 526 * @hw_cipher: a HW cipher index used in host commands 527 */ 528 struct iwl_fw_cipher_scheme { 529 __le32 cipher; 530 u8 flags; 531 u8 hdr_len; 532 u8 pn_len; 533 u8 pn_off; 534 u8 key_idx_off; 535 u8 key_idx_mask; 536 u8 key_idx_shift; 537 u8 mic_len; 538 u8 hw_cipher; 539 } __packed; 540 541 enum iwl_fw_dbg_reg_operator { 542 CSR_ASSIGN, 543 CSR_SETBIT, 544 CSR_CLEARBIT, 545 546 PRPH_ASSIGN, 547 PRPH_SETBIT, 548 PRPH_CLEARBIT, 549 550 INDIRECT_ASSIGN, 551 INDIRECT_SETBIT, 552 INDIRECT_CLEARBIT, 553 554 PRPH_BLOCKBIT, 555 }; 556 557 /** 558 * struct iwl_fw_dbg_reg_op - an operation on a register 559 * 560 * @op: &enum iwl_fw_dbg_reg_operator 561 * @addr: offset of the register 562 * @val: value 563 */ 564 struct iwl_fw_dbg_reg_op { 565 u8 op; 566 u8 reserved[3]; 567 __le32 addr; 568 __le32 val; 569 } __packed; 570 571 /** 572 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes 573 * 574 * @SMEM_MODE: monitor stores the data in SMEM 575 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM 576 * @MARBH_MODE: monitor stores the data in MARBH buffer 577 * @MIPI_MODE: monitor outputs the data through the MIPI interface 578 */ 579 enum iwl_fw_dbg_monitor_mode { 580 SMEM_MODE = 0, 581 EXTERNAL_MODE = 1, 582 MARBH_MODE = 2, 583 MIPI_MODE = 3, 584 }; 585 586 /** 587 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments 588 * 589 * @data_type: the memory segment type to record 590 * @ofs: the memory segment offset 591 * @len: the memory segment length, in bytes 592 * 593 * This parses IWL_UCODE_TLV_FW_MEM_SEG 594 */ 595 struct iwl_fw_dbg_mem_seg_tlv { 596 __le32 data_type; 597 __le32 ofs; 598 __le32 len; 599 } __packed; 600 601 /** 602 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data 603 * 604 * @version: version of the TLV - currently 0 605 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode 606 * @size_power: buffer size will be 2^(size_power + 11) 607 * @base_reg: addr of the base addr register (PRPH) 608 * @end_reg: addr of the end addr register (PRPH) 609 * @write_ptr_reg: the addr of the reg of the write pointer 610 * @wrap_count: the addr of the reg of the wrap_count 611 * @base_shift: shift right of the base addr reg 612 * @end_shift: shift right of the end addr reg 613 * @reg_ops: array of registers operations 614 * 615 * This parses IWL_UCODE_TLV_FW_DBG_DEST 616 */ 617 struct iwl_fw_dbg_dest_tlv_v1 { 618 u8 version; 619 u8 monitor_mode; 620 u8 size_power; 621 u8 reserved; 622 __le32 base_reg; 623 __le32 end_reg; 624 __le32 write_ptr_reg; 625 __le32 wrap_count; 626 u8 base_shift; 627 u8 end_shift; 628 struct iwl_fw_dbg_reg_op reg_ops[0]; 629 } __packed; 630 631 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */ 632 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000 633 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */ 634 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff 635 /* The smem buffer chunks are in units of 256 bits */ 636 #define IWL_M2S_UNIT_SIZE 0x100 637 638 struct iwl_fw_dbg_dest_tlv { 639 u8 version; 640 u8 monitor_mode; 641 u8 size_power; 642 u8 reserved; 643 __le32 cfg_reg; 644 __le32 write_ptr_reg; 645 __le32 wrap_count; 646 u8 base_shift; 647 u8 size_shift; 648 struct iwl_fw_dbg_reg_op reg_ops[0]; 649 } __packed; 650 651 struct iwl_fw_dbg_conf_hcmd { 652 u8 id; 653 u8 reserved; 654 __le16 len; 655 u8 data[0]; 656 } __packed; 657 658 /** 659 * enum iwl_fw_dbg_trigger_mode - triggers functionalities 660 * 661 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism 662 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data 663 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to 664 * collect only monitor data 665 */ 666 enum iwl_fw_dbg_trigger_mode { 667 IWL_FW_DBG_TRIGGER_START = BIT(0), 668 IWL_FW_DBG_TRIGGER_STOP = BIT(1), 669 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2), 670 }; 671 672 /** 673 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers 674 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart 675 */ 676 enum iwl_fw_dbg_trigger_flags { 677 IWL_FW_DBG_FORCE_RESTART = BIT(0), 678 }; 679 680 /** 681 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger 682 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type 683 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode 684 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode 685 * @IWL_FW_DBG_CONF_VIF_AP: AP mode 686 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode 687 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode 688 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device 689 */ 690 enum iwl_fw_dbg_trigger_vif_type { 691 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED, 692 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC, 693 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION, 694 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP, 695 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT, 696 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO, 697 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE, 698 }; 699 700 /** 701 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger 702 * @id: &enum iwl_fw_dbg_trigger 703 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type 704 * @stop_conf_ids: bitmap of configurations this trigger relates to. 705 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding 706 * to the currently running configuration is set, the data should be 707 * collected. 708 * @stop_delay: how many milliseconds to wait before collecting the data 709 * after the STOP trigger fires. 710 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both 711 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what 712 * configuration should be applied when the triggers kicks in. 713 * @occurrences: number of occurrences. 0 means the trigger will never fire. 714 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this 715 * trigger in which another occurrence should be ignored. 716 * @flags: &enum iwl_fw_dbg_trigger_flags 717 */ 718 struct iwl_fw_dbg_trigger_tlv { 719 __le32 id; 720 __le32 vif_type; 721 __le32 stop_conf_ids; 722 __le32 stop_delay; 723 u8 mode; 724 u8 start_conf_id; 725 __le16 occurrences; 726 __le16 trig_dis_ms; 727 u8 flags; 728 u8 reserved[5]; 729 730 u8 data[0]; 731 } __packed; 732 733 #define FW_DBG_START_FROM_ALIVE 0 734 #define FW_DBG_CONF_MAX 32 735 #define FW_DBG_INVALID 0xff 736 737 /** 738 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons 739 * @stop_consec_missed_bcon: stop recording if threshold is crossed. 740 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed. 741 * @start_consec_missed_bcon: start recording if threshold is crossed. 742 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed. 743 * @reserved1: reserved 744 * @reserved2: reserved 745 */ 746 struct iwl_fw_dbg_trigger_missed_bcon { 747 __le32 stop_consec_missed_bcon; 748 __le32 stop_consec_missed_bcon_since_rx; 749 __le32 reserved2[2]; 750 __le32 start_consec_missed_bcon; 751 __le32 start_consec_missed_bcon_since_rx; 752 __le32 reserved1[2]; 753 } __packed; 754 755 /** 756 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW. 757 * cmds: the list of commands to trigger the collection on 758 */ 759 struct iwl_fw_dbg_trigger_cmd { 760 struct cmd { 761 u8 cmd_id; 762 u8 group_id; 763 } __packed cmds[16]; 764 } __packed; 765 766 /** 767 * iwl_fw_dbg_trigger_stats - configures trigger for statistics 768 * @stop_offset: the offset of the value to be monitored 769 * @stop_threshold: the threshold above which to collect 770 * @start_offset: the offset of the value to be monitored 771 * @start_threshold: the threshold above which to start recording 772 */ 773 struct iwl_fw_dbg_trigger_stats { 774 __le32 stop_offset; 775 __le32 stop_threshold; 776 __le32 start_offset; 777 __le32 start_threshold; 778 } __packed; 779 780 /** 781 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI 782 * @rssi: RSSI value to trigger at 783 */ 784 struct iwl_fw_dbg_trigger_low_rssi { 785 __le32 rssi; 786 } __packed; 787 788 /** 789 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events 790 * @stop_auth_denied: number of denied authentication to collect 791 * @stop_auth_timeout: number of authentication timeout to collect 792 * @stop_rx_deauth: number of Rx deauth before to collect 793 * @stop_tx_deauth: number of Tx deauth before to collect 794 * @stop_assoc_denied: number of denied association to collect 795 * @stop_assoc_timeout: number of association timeout to collect 796 * @stop_connection_loss: number of connection loss to collect 797 * @start_auth_denied: number of denied authentication to start recording 798 * @start_auth_timeout: number of authentication timeout to start recording 799 * @start_rx_deauth: number of Rx deauth to start recording 800 * @start_tx_deauth: number of Tx deauth to start recording 801 * @start_assoc_denied: number of denied association to start recording 802 * @start_assoc_timeout: number of association timeout to start recording 803 * @start_connection_loss: number of connection loss to start recording 804 */ 805 struct iwl_fw_dbg_trigger_mlme { 806 u8 stop_auth_denied; 807 u8 stop_auth_timeout; 808 u8 stop_rx_deauth; 809 u8 stop_tx_deauth; 810 811 u8 stop_assoc_denied; 812 u8 stop_assoc_timeout; 813 u8 stop_connection_loss; 814 u8 reserved; 815 816 u8 start_auth_denied; 817 u8 start_auth_timeout; 818 u8 start_rx_deauth; 819 u8 start_tx_deauth; 820 821 u8 start_assoc_denied; 822 u8 start_assoc_timeout; 823 u8 start_connection_loss; 824 u8 reserved2; 825 } __packed; 826 827 /** 828 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer 829 * @command_queue: timeout for the command queue in ms 830 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms 831 * @softap: timeout for the queues of a softAP in ms 832 * @p2p_go: timeout for the queues of a P2P GO in ms 833 * @p2p_client: timeout for the queues of a P2P client in ms 834 * @p2p_device: timeout for the queues of a P2P device in ms 835 * @ibss: timeout for the queues of an IBSS in ms 836 * @tdls: timeout for the queues of a TDLS station in ms 837 */ 838 struct iwl_fw_dbg_trigger_txq_timer { 839 __le32 command_queue; 840 __le32 bss; 841 __le32 softap; 842 __le32 p2p_go; 843 __le32 p2p_client; 844 __le32 p2p_device; 845 __le32 ibss; 846 __le32 tdls; 847 __le32 reserved[4]; 848 } __packed; 849 850 /** 851 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger 852 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a 853 * trigger each time a time event notification that relates to time event 854 * id with one of the actions in the bitmap is received and 855 * BIT(notif->status) is set in status_bitmap. 856 * 857 */ 858 struct iwl_fw_dbg_trigger_time_event { 859 struct { 860 __le32 id; 861 __le32 action_bitmap; 862 __le32 status_bitmap; 863 } __packed time_events[16]; 864 } __packed; 865 866 /** 867 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger 868 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur 869 * when an Rx BlockAck session is started. 870 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur 871 * when an Rx BlockAck session is stopped. 872 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur 873 * when a Tx BlockAck session is started. 874 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur 875 * when a Tx BlockAck session is stopped. 876 * rx_bar: tid bitmap to configure on what tid the trigger should occur 877 * when a BAR is received (for a Tx BlockAck session). 878 * tx_bar: tid bitmap to configure on what tid the trigger should occur 879 * when a BAR is send (for an Rx BlocAck session). 880 * frame_timeout: tid bitmap to configure on what tid the trigger should occur 881 * when a frame times out in the reordering buffer. 882 */ 883 struct iwl_fw_dbg_trigger_ba { 884 __le16 rx_ba_start; 885 __le16 rx_ba_stop; 886 __le16 tx_ba_start; 887 __le16 tx_ba_stop; 888 __le16 rx_bar; 889 __le16 tx_bar; 890 __le16 frame_timeout; 891 } __packed; 892 893 /** 894 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events. 895 * @action_bitmap: the TDLS action to trigger the collection upon 896 * @peer_mode: trigger on specific peer or all 897 * @peer: the TDLS peer to trigger the collection on 898 */ 899 struct iwl_fw_dbg_trigger_tdls { 900 u8 action_bitmap; 901 u8 peer_mode; 902 u8 peer[ETH_ALEN]; 903 u8 reserved[4]; 904 } __packed; 905 906 /** 907 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response 908 * status. 909 * @statuses: the list of statuses to trigger the collection on 910 */ 911 struct iwl_fw_dbg_trigger_tx_status { 912 struct tx_status { 913 u8 status; 914 u8 reserved[3]; 915 } __packed statuses[16]; 916 __le32 reserved[2]; 917 } __packed; 918 919 /** 920 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration. 921 * @id: conf id 922 * @usniffer: should the uSniffer image be used 923 * @num_of_hcmds: how many HCMDs to send are present here 924 * @hcmd: a variable length host command to be sent to apply the configuration. 925 * If there is more than one HCMD to send, they will appear one after the 926 * other and be sent in the order that they appear in. 927 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to 928 * %FW_DBG_CONF_MAX configuration per run. 929 */ 930 struct iwl_fw_dbg_conf_tlv { 931 u8 id; 932 u8 usniffer; 933 u8 reserved; 934 u8 num_of_hcmds; 935 struct iwl_fw_dbg_conf_hcmd hcmd; 936 } __packed; 937 938 #define IWL_FW_CMD_VER_UNKNOWN 99 939 940 /** 941 * struct iwl_fw_cmd_version - firmware command version entry 942 * @cmd: command ID 943 * @group: group ID 944 * @cmd_ver: command version 945 * @notif_ver: notification version 946 */ 947 struct iwl_fw_cmd_version { 948 u8 cmd; 949 u8 group; 950 u8 cmd_ver; 951 u8 notif_ver; 952 } __packed; 953 954 struct iwl_fw_tcm_error_addr { 955 __le32 addr; 956 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */ 957 958 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv, 959 size_t fixed_size, size_t var_size) 960 { 961 size_t var_len = le32_to_cpu(tlv->length) - fixed_size; 962 963 if (WARN_ON(var_len % var_size)) 964 return 0; 965 966 return var_len / var_size; 967 } 968 969 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \ 970 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \ 971 sizeof(_struct_ptr->_memb[0])) 972 973 #endif /* __iwl_fw_file_h__ */ 974