1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
10  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11  * Copyright (C) 2018 - 2019 Intel Corporation
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of version 2 of the GNU General Public License as
15  * published by the Free Software Foundation.
16  *
17  * This program is distributed in the hope that it will be useful, but
18  * WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
20  * General Public License for more details.
21  *
22  * The full GNU General Public License is included in this distribution
23  * in the file called COPYING.
24  *
25  * Contact Information:
26  *  Intel Linux Wireless <linuxwifi@intel.com>
27  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28  *
29  * BSD LICENSE
30  *
31  * Copyright(c) 2014 Intel Corporation. All rights reserved.
32  * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
33  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34  * Copyright (C) 2018 - 2019 Intel Corporation
35  * All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  *
41  *  * Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  *  * Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in
45  *    the documentation and/or other materials provided with the
46  *    distribution.
47  *  * Neither the name Intel Corporation nor the names of its
48  *    contributors may be used to endorse or promote products derived
49  *    from this software without specific prior written permission.
50  *
51  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62  *****************************************************************************/
63 
64 #ifndef __fw_error_dump_h__
65 #define __fw_error_dump_h__
66 
67 #include <linux/types.h>
68 
69 #define IWL_FW_ERROR_DUMP_BARKER	0x14789632
70 
71 /**
72  * enum iwl_fw_error_dump_type - types of data in the dump file
73  * @IWL_FW_ERROR_DUMP_CSR: Control Status Registers - from offset 0
74  * @IWL_FW_ERROR_DUMP_RXF:
75  * @IWL_FW_ERROR_DUMP_TXCMD: last TX command data, structured as
76  *	&struct iwl_fw_error_dump_txcmd packets
77  * @IWL_FW_ERROR_DUMP_DEV_FW_INFO:  struct %iwl_fw_error_dump_info
78  *	info on the device / firmware.
79  * @IWL_FW_ERROR_DUMP_FW_MONITOR: firmware monitor
80  * @IWL_FW_ERROR_DUMP_PRPH: range of periphery registers - there can be several
81  *	sections like this in a single file.
82  * @IWL_FW_ERROR_DUMP_FH_REGS: range of FH registers
83  * @IWL_FW_ERROR_DUMP_MEM: chunk of memory
84  * @IWL_FW_ERROR_DUMP_ERROR_INFO: description of what triggered this dump.
85  *	Structured as &struct iwl_fw_error_dump_trigger_desc.
86  * @IWL_FW_ERROR_DUMP_RB: the content of an RB structured as
87  *	&struct iwl_fw_error_dump_rb
88  * @IWL_FW_ERROR_PAGING: UMAC's image memory segments which were
89  *	paged to the DRAM.
90  * @IWL_FW_ERROR_DUMP_RADIO_REG: Dump the radio registers.
91  * @IWL_FW_ERROR_DUMP_EXTERNAL: used only by external code utilities, and
92  *	for that reason is not in use in any other place in the Linux Wi-Fi
93  *	stack.
94  * @IWL_FW_ERROR_DUMP_MEM_CFG: the addresses and sizes of fifos in the smem,
95  *	which we get from the fw after ALIVE. The content is structured as
96  *	&struct iwl_fw_error_dump_smem_cfg.
97  */
98 enum iwl_fw_error_dump_type {
99 	/* 0 is deprecated */
100 	IWL_FW_ERROR_DUMP_CSR = 1,
101 	IWL_FW_ERROR_DUMP_RXF = 2,
102 	IWL_FW_ERROR_DUMP_TXCMD = 3,
103 	IWL_FW_ERROR_DUMP_DEV_FW_INFO = 4,
104 	IWL_FW_ERROR_DUMP_FW_MONITOR = 5,
105 	IWL_FW_ERROR_DUMP_PRPH = 6,
106 	IWL_FW_ERROR_DUMP_TXF = 7,
107 	IWL_FW_ERROR_DUMP_FH_REGS = 8,
108 	IWL_FW_ERROR_DUMP_MEM = 9,
109 	IWL_FW_ERROR_DUMP_ERROR_INFO = 10,
110 	IWL_FW_ERROR_DUMP_RB = 11,
111 	IWL_FW_ERROR_DUMP_PAGING = 12,
112 	IWL_FW_ERROR_DUMP_RADIO_REG = 13,
113 	IWL_FW_ERROR_DUMP_INTERNAL_TXF = 14,
114 	IWL_FW_ERROR_DUMP_EXTERNAL = 15, /* Do not move */
115 	IWL_FW_ERROR_DUMP_MEM_CFG = 16,
116 	IWL_FW_ERROR_DUMP_D3_DEBUG_DATA = 17,
117 
118 	IWL_FW_ERROR_DUMP_MAX,
119 };
120 
121 /**
122  * struct iwl_fw_error_dump_data - data for one type
123  * @type: &enum iwl_fw_error_dump_type
124  * @len: the length starting from %data
125  * @data: the data itself
126  */
127 struct iwl_fw_error_dump_data {
128 	__le32 type;
129 	__le32 len;
130 	__u8 data[];
131 } __packed;
132 
133 /**
134  * struct iwl_fw_error_dump_file - the layout of the header of the file
135  * @barker: must be %IWL_FW_ERROR_DUMP_BARKER
136  * @file_len: the length of all the file starting from %barker
137  * @data: array of &struct iwl_fw_error_dump_data
138  */
139 struct iwl_fw_error_dump_file {
140 	__le32 barker;
141 	__le32 file_len;
142 	u8 data[0];
143 } __packed;
144 
145 /**
146  * struct iwl_fw_error_dump_txcmd - TX command data
147  * @cmdlen: original length of command
148  * @caplen: captured length of command (may be less)
149  * @data: captured command data, @caplen bytes
150  */
151 struct iwl_fw_error_dump_txcmd {
152 	__le32 cmdlen;
153 	__le32 caplen;
154 	u8 data[];
155 } __packed;
156 
157 /**
158  * struct iwl_fw_error_dump_fifo - RX/TX FIFO data
159  * @fifo_num: number of FIFO (starting from 0)
160  * @available_bytes: num of bytes available in FIFO (may be less than FIFO size)
161  * @wr_ptr: position of write pointer
162  * @rd_ptr: position of read pointer
163  * @fence_ptr: position of fence pointer
164  * @fence_mode: the current mode of the fence (before locking) -
165  *	0=follow RD pointer ; 1 = freeze
166  * @data: all of the FIFO's data
167  */
168 struct iwl_fw_error_dump_fifo {
169 	__le32 fifo_num;
170 	__le32 available_bytes;
171 	__le32 wr_ptr;
172 	__le32 rd_ptr;
173 	__le32 fence_ptr;
174 	__le32 fence_mode;
175 	u8 data[];
176 } __packed;
177 
178 enum iwl_fw_error_dump_family {
179 	IWL_FW_ERROR_DUMP_FAMILY_7 = 7,
180 	IWL_FW_ERROR_DUMP_FAMILY_8 = 8,
181 };
182 
183 #define MAX_NUM_LMAC 2
184 
185 /**
186  * struct iwl_fw_error_dump_info - info on the device / firmware
187  * @hw_type: the type of the device
188  * @hw_step: the step of the device
189  * @fw_human_readable: human readable FW version
190  * @dev_human_readable: name of the device
191  * @bus_human_readable: name of the bus used
192  * @num_of_lmacs: the number of lmacs
193  * @lmac_err_id: the lmac 0/1 error_id/rt_status that triggered the latest dump
194  *	if the dump collection was not initiated by an assert, the value is 0
195  * @umac_err_id: the umac error_id/rt_status that triggered the latest dump
196  *	if the dump collection was not initiated by an assert, the value is 0
197  */
198 struct iwl_fw_error_dump_info {
199 	__le32 hw_type;
200 	__le32 hw_step;
201 	u8 fw_human_readable[FW_VER_HUMAN_READABLE_SZ];
202 	u8 dev_human_readable[64];
203 	u8 bus_human_readable[8];
204 	u8 num_of_lmacs;
205 	__le32 umac_err_id;
206 	__le32 lmac_err_id[MAX_NUM_LMAC];
207 } __packed;
208 
209 /**
210  * struct iwl_fw_error_dump_fw_mon - FW monitor data
211  * @fw_mon_wr_ptr: the position of the write pointer in the cyclic buffer
212  * @fw_mon_base_ptr: base pointer of the data
213  * @fw_mon_cycle_cnt: number of wraparounds
214  * @fw_mon_base_high_ptr: used in AX210 devices, the base adderss is 64 bit
215  *	so fw_mon_base_ptr holds LSB 32 bits and fw_mon_base_high_ptr hold
216  *	MSB 32 bits
217  * @reserved: for future use
218  * @data: captured data
219  */
220 struct iwl_fw_error_dump_fw_mon {
221 	__le32 fw_mon_wr_ptr;
222 	__le32 fw_mon_base_ptr;
223 	__le32 fw_mon_cycle_cnt;
224 	__le32 fw_mon_base_high_ptr;
225 	__le32 reserved[2];
226 	u8 data[];
227 } __packed;
228 
229 #define MAX_NUM_LMAC 2
230 #define TX_FIFO_INTERNAL_MAX_NUM	6
231 #define TX_FIFO_MAX_NUM			15
232 /**
233  * struct iwl_fw_error_dump_smem_cfg - Dump SMEM configuration
234  *	This must follow &struct iwl_fwrt_shared_mem_cfg.
235  * @num_lmacs: number of lmacs
236  * @num_txfifo_entries: number of tx fifos
237  * @lmac: sizes of lmacs txfifos and rxfifo1
238  * @rxfifo2_size: size of rxfifo2
239  * @internal_txfifo_addr: address of internal tx fifo
240  * @internal_txfifo_size: size of internal tx fifo
241  */
242 struct iwl_fw_error_dump_smem_cfg {
243 	__le32 num_lmacs;
244 	__le32 num_txfifo_entries;
245 	struct {
246 		__le32 txfifo_size[TX_FIFO_MAX_NUM];
247 		__le32 rxfifo1_size;
248 	} lmac[MAX_NUM_LMAC];
249 	__le32 rxfifo2_size;
250 	__le32 internal_txfifo_addr;
251 	__le32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
252 } __packed;
253 /**
254  * struct iwl_fw_error_dump_prph - periphery registers data
255  * @prph_start: address of the first register in this chunk
256  * @data: the content of the registers
257  */
258 struct iwl_fw_error_dump_prph {
259 	__le32 prph_start;
260 	__le32 data[];
261 };
262 
263 enum iwl_fw_error_dump_mem_type {
264 	IWL_FW_ERROR_DUMP_MEM_SRAM,
265 	IWL_FW_ERROR_DUMP_MEM_SMEM,
266 	IWL_FW_ERROR_DUMP_MEM_NAMED_MEM = 10,
267 };
268 
269 /**
270  * struct iwl_fw_error_dump_mem - chunk of memory
271  * @type: &enum iwl_fw_error_dump_mem_type
272  * @offset: the offset from which the memory was read
273  * @data: the content of the memory
274  */
275 struct iwl_fw_error_dump_mem {
276 	__le32 type;
277 	__le32 offset;
278 	u8 data[];
279 };
280 
281 #define IWL_INI_DUMP_MEM_VER 1
282 #define IWL_INI_DUMP_MONITOR_VER 1
283 #define IWL_INI_DUMP_FIFO_VER 1
284 
285 /**
286  * struct iwl_fw_ini_error_dump_range - range of memory
287  * @range_data_size: the size of this range, in bytes
288  * @start_addr: the start address of this range
289  * @data: the actual memory
290  */
291 struct iwl_fw_ini_error_dump_range {
292 	__le32 range_data_size;
293 	__le64 start_addr;
294 	__le32 data[];
295 } __packed;
296 
297 /**
298  * struct iwl_fw_ini_error_dump_header - ini region dump header
299  * @version: dump version
300  * @region_id: id of the region
301  * @num_of_ranges: number of ranges in this region
302  * @name_len: number of bytes allocated to the name string of this region
303  * @name: name of the region
304  */
305 struct iwl_fw_ini_error_dump_header {
306 	__le32 version;
307 	__le32 region_id;
308 	__le32 num_of_ranges;
309 	__le32 name_len;
310 	u8 name[IWL_FW_INI_MAX_NAME];
311 };
312 
313 /**
314  * struct iwl_fw_ini_error_dump - ini region dump
315  * @header: the header of this region
316  * @ranges: the memory ranges of this region
317  */
318 struct iwl_fw_ini_error_dump {
319 	struct iwl_fw_ini_error_dump_header header;
320 	struct iwl_fw_ini_error_dump_range ranges[];
321 } __packed;
322 
323 /* This bit is used to differentiate between lmac and umac rxf */
324 #define IWL_RXF_UMAC_BIT BIT(31)
325 
326 /**
327  * struct iwl_fw_ini_error_dump_register - ini register dump
328  * @addr: address of the register
329  * @data: data of the register
330  */
331 struct iwl_fw_ini_error_dump_register {
332 	__le32 addr;
333 	__le32 data;
334 } __packed;
335 
336 /**
337  * struct iwl_fw_ini_fifo_error_dump_range - ini fifo range dump
338  * @fifo_num: the fifo num. In case of rxf and umac rxf, set BIT(31) to
339  *	distinguish between lmac and umac
340  * @num_of_registers: num of registers to dump, dword size each
341  * @range_data_size: the size of the data
342  * @data: consist of
343  *	num_of_registers * (register address + register value) + fifo data
344  */
345 struct iwl_fw_ini_fifo_error_dump_range {
346 	__le32 fifo_num;
347 	__le32 num_of_registers;
348 	__le32 range_data_size;
349 	__le32 data[];
350 } __packed;
351 
352 /**
353  * struct iwl_fw_ini_fifo_error_dump - ini fifo region dump
354  * @header: the header of this region
355  * @ranges: the memory ranges of this region
356  */
357 struct iwl_fw_ini_fifo_error_dump {
358 	struct iwl_fw_ini_error_dump_header header;
359 	struct iwl_fw_ini_fifo_error_dump_range ranges[];
360 } __packed;
361 
362 /**
363  * struct iwl_fw_error_dump_rb - content of an Receive Buffer
364  * @index: the index of the Receive Buffer in the Rx queue
365  * @rxq: the RB's Rx queue
366  * @reserved:
367  * @data: the content of the Receive Buffer
368  */
369 struct iwl_fw_error_dump_rb {
370 	__le32 index;
371 	__le32 rxq;
372 	__le32 reserved;
373 	u8 data[];
374 };
375 
376 /**
377  * struct iwl_fw_ini_monitor_dump - ini monitor dump
378  * @header - header of the region
379  * @write_ptr - write pointer position in the buffer
380  * @cycle_cnt - cycles count
381  * @ranges - the memory ranges of this this region
382  */
383 struct iwl_fw_ini_monitor_dump {
384 	struct iwl_fw_ini_error_dump_header header;
385 	__le32 write_ptr;
386 	__le32 cycle_cnt;
387 	struct iwl_fw_ini_error_dump_range ranges[];
388 } __packed;
389 
390 /**
391  * struct iwl_fw_error_dump_paging - content of the UMAC's image page
392  *	block on DRAM
393  * @index: the index of the page block
394  * @reserved:
395  * @data: the content of the page block
396  */
397 struct iwl_fw_error_dump_paging {
398 	__le32 index;
399 	__le32 reserved;
400 	u8 data[];
401 };
402 
403 /**
404  * iwl_fw_error_next_data - advance fw error dump data pointer
405  * @data: previous data block
406  * Returns: next data block
407  */
408 static inline struct iwl_fw_error_dump_data *
409 iwl_fw_error_next_data(struct iwl_fw_error_dump_data *data)
410 {
411 	return (void *)(data->data + le32_to_cpu(data->len));
412 }
413 
414 /**
415  * enum iwl_fw_dbg_trigger - triggers available
416  *
417  * @FW_DBG_TRIGGER_USER: trigger log collection by user
418  *	This should not be defined as a trigger to the driver, but a value the
419  *	driver should set to indicate that the trigger was initiated by the
420  *	user.
421  * @FW_DBG_TRIGGER_FW_ASSERT: trigger log collection when the firmware asserts
422  * @FW_DBG_TRIGGER_MISSED_BEACONS: trigger log collection when beacons are
423  *	missed.
424  * @FW_DBG_TRIGGER_CHANNEL_SWITCH: trigger log collection upon channel switch.
425  * @FW_DBG_TRIGGER_FW_NOTIF: trigger log collection when the firmware sends a
426  *	command response or a notification.
427  * @FW_DBG_TRIGGER_MLME: trigger log collection upon MLME event.
428  * @FW_DBG_TRIGGER_STATS: trigger log collection upon statistics threshold.
429  * @FW_DBG_TRIGGER_RSSI: trigger log collection when the rssi of the beacon
430  *	goes below a threshold.
431  * @FW_DBG_TRIGGER_TXQ_TIMERS: configures the timers for the Tx queue hang
432  *	detection.
433  * @FW_DBG_TRIGGER_TIME_EVENT: trigger log collection upon time events related
434  *	events.
435  * @FW_DBG_TRIGGER_BA: trigger log collection upon BlockAck related events.
436  * @FW_DBG_TX_LATENCY: trigger log collection when the tx latency goes above a
437  *	threshold.
438  * @FW_DBG_TDLS: trigger log collection upon TDLS related events.
439  * @FW_DBG_TRIGGER_TX_STATUS: trigger log collection upon tx status when
440  *  the firmware sends a tx reply.
441  * @FW_DBG_TRIGGER_ALIVE_TIMEOUT: trigger log collection if alive flow timeouts
442  * @FW_DBG_TRIGGER_DRIVER: trigger log collection upon a flow failure
443  *	in the driver.
444  */
445 enum iwl_fw_dbg_trigger {
446 	FW_DBG_TRIGGER_INVALID = 0,
447 	FW_DBG_TRIGGER_USER,
448 	FW_DBG_TRIGGER_FW_ASSERT,
449 	FW_DBG_TRIGGER_MISSED_BEACONS,
450 	FW_DBG_TRIGGER_CHANNEL_SWITCH,
451 	FW_DBG_TRIGGER_FW_NOTIF,
452 	FW_DBG_TRIGGER_MLME,
453 	FW_DBG_TRIGGER_STATS,
454 	FW_DBG_TRIGGER_RSSI,
455 	FW_DBG_TRIGGER_TXQ_TIMERS,
456 	FW_DBG_TRIGGER_TIME_EVENT,
457 	FW_DBG_TRIGGER_BA,
458 	FW_DBG_TRIGGER_TX_LATENCY,
459 	FW_DBG_TRIGGER_TDLS,
460 	FW_DBG_TRIGGER_TX_STATUS,
461 	FW_DBG_TRIGGER_ALIVE_TIMEOUT,
462 	FW_DBG_TRIGGER_DRIVER,
463 
464 	/* must be last */
465 	FW_DBG_TRIGGER_MAX,
466 };
467 
468 /**
469  * struct iwl_fw_error_dump_trigger_desc - describes the trigger condition
470  * @type: &enum iwl_fw_dbg_trigger
471  * @data: raw data about what happened
472  */
473 struct iwl_fw_error_dump_trigger_desc {
474 	__le32 type;
475 	u8 data[];
476 };
477 
478 #endif /* __fw_error_dump_h__ */
479