1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2017 Intel Deutschland GmbH 10 * Copyright(c) 2018 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <linuxwifi@intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 * BSD LICENSE 29 * 30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 31 * Copyright(c) 2017 Intel Deutschland GmbH 32 * Copyright(c) 2018 Intel Corporation 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 39 * * Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * * Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * * Neither the name Intel Corporation nor the names of its 46 * contributors may be used to endorse or promote products derived 47 * from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 *****************************************************************************/ 61 62 #ifndef __iwl_fw_api_rs_h__ 63 #define __iwl_fw_api_rs_h__ 64 65 #include "mac.h" 66 67 /** 68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 69 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC 70 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 71 */ 72 enum iwl_tlc_mng_cfg_flags { 73 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 74 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 75 }; 76 77 /** 78 * enum iwl_tlc_mng_cfg_cw - channel width options 79 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 80 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 81 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 82 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 83 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 84 */ 85 enum iwl_tlc_mng_cfg_cw { 86 IWL_TLC_MNG_CH_WIDTH_20MHZ, 87 IWL_TLC_MNG_CH_WIDTH_40MHZ, 88 IWL_TLC_MNG_CH_WIDTH_80MHZ, 89 IWL_TLC_MNG_CH_WIDTH_160MHZ, 90 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 91 }; 92 93 /** 94 * enum iwl_tlc_mng_cfg_chains - possible chains 95 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 96 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 97 */ 98 enum iwl_tlc_mng_cfg_chains { 99 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 100 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 101 }; 102 103 /** 104 * enum iwl_tlc_mng_cfg_mode - supported modes 105 * @IWL_TLC_MNG_MODE_CCK: enable CCK 106 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 107 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 108 * @IWL_TLC_MNG_MODE_HT: enable HT 109 * @IWL_TLC_MNG_MODE_VHT: enable VHT 110 * @IWL_TLC_MNG_MODE_HE: enable HE 111 * @IWL_TLC_MNG_MODE_INVALID: invalid value 112 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 113 */ 114 enum iwl_tlc_mng_cfg_mode { 115 IWL_TLC_MNG_MODE_CCK = 0, 116 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 117 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 118 IWL_TLC_MNG_MODE_HT, 119 IWL_TLC_MNG_MODE_VHT, 120 IWL_TLC_MNG_MODE_HE, 121 IWL_TLC_MNG_MODE_INVALID, 122 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 123 }; 124 125 /** 126 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 127 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 128 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 129 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 130 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 131 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 132 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 133 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 134 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 135 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 136 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 137 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 138 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 139 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 140 */ 141 enum iwl_tlc_mng_ht_rates { 142 IWL_TLC_MNG_HT_RATE_MCS0 = 0, 143 IWL_TLC_MNG_HT_RATE_MCS1, 144 IWL_TLC_MNG_HT_RATE_MCS2, 145 IWL_TLC_MNG_HT_RATE_MCS3, 146 IWL_TLC_MNG_HT_RATE_MCS4, 147 IWL_TLC_MNG_HT_RATE_MCS5, 148 IWL_TLC_MNG_HT_RATE_MCS6, 149 IWL_TLC_MNG_HT_RATE_MCS7, 150 IWL_TLC_MNG_HT_RATE_MCS8, 151 IWL_TLC_MNG_HT_RATE_MCS9, 152 IWL_TLC_MNG_HT_RATE_MCS10, 153 IWL_TLC_MNG_HT_RATE_MCS11, 154 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 155 }; 156 157 /* Maximum supported tx antennas number */ 158 #define MAX_NSS 2 159 160 /** 161 * struct tlc_config_cmd - TLC configuration 162 * @sta_id: station id 163 * @reserved1: reserved 164 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 165 * @mode: &enum iwl_tlc_mng_cfg_mode 166 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 167 * @amsdu: TX amsdu is supported 168 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 169 * @non_ht_rates: bitmap of supported legacy rates 170 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 171 * pair (0 - 80mhz width and below, 1 - 160mhz). 172 * @max_mpdu_len: max MPDU length, in bytes 173 * @sgi_ch_width_supp: bitmap of SGI support per channel width 174 * use BIT(@enum iwl_tlc_mng_cfg_cw) 175 * @reserved2: reserved 176 */ 177 struct iwl_tlc_config_cmd { 178 u8 sta_id; 179 u8 reserved1[3]; 180 u8 max_ch_width; 181 u8 mode; 182 u8 chains; 183 u8 amsdu; 184 __le16 flags; 185 __le16 non_ht_rates; 186 __le16 ht_rates[MAX_NSS][2]; 187 __le16 max_mpdu_len; 188 u8 sgi_ch_width_supp; 189 u8 reserved2[1]; 190 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */ 191 192 /** 193 * enum iwl_tlc_update_flags - updated fields 194 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 195 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 196 */ 197 enum iwl_tlc_update_flags { 198 IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 199 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 200 }; 201 202 /** 203 * struct iwl_tlc_update_notif - TLC notification from FW 204 * @sta_id: station id 205 * @reserved: reserved 206 * @flags: bitmap of notifications reported 207 * @rate: current initial rate 208 * @amsdu_size: Max AMSDU size, in bytes 209 * @amsdu_enabled: bitmap for per-TID AMSDU enablement 210 */ 211 struct iwl_tlc_update_notif { 212 u8 sta_id; 213 u8 reserved[3]; 214 __le32 flags; 215 __le32 rate; 216 __le32 amsdu_size; 217 __le32 amsdu_enabled; 218 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 219 220 /** 221 * enum iwl_tlc_debug_flags - debug options 222 * @IWL_TLC_DEBUG_FIXED_RATE: set fixed rate for rate scaling 223 * @IWL_TLC_DEBUG_STATS_TH: threshold for sending statistics to the driver, in 224 * frames 225 * @IWL_TLC_DEBUG_STATS_TIME_TH: threshold for sending statistics to the 226 * driver, in msec 227 * @IWL_TLC_DEBUG_AGG_TIME_LIM: time limit for a BA session 228 * @IWL_TLC_DEBUG_AGG_DIS_START_TH: frame with try-count greater than this 229 * threshold should not start an aggregation session 230 * @IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM: set max number of frames in an aggregation 231 * @IWL_TLC_DEBUG_RENEW_ADDBA_DELAY: delay between retries of ADD BA 232 * @IWL_TLC_DEBUG_START_AC_RATE_IDX: frames per second to start a BA session 233 * @IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK: disable BW scaling 234 */ 235 enum iwl_tlc_debug_flags { 236 IWL_TLC_DEBUG_FIXED_RATE, 237 IWL_TLC_DEBUG_STATS_TH, 238 IWL_TLC_DEBUG_STATS_TIME_TH, 239 IWL_TLC_DEBUG_AGG_TIME_LIM, 240 IWL_TLC_DEBUG_AGG_DIS_START_TH, 241 IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM, 242 IWL_TLC_DEBUG_RENEW_ADDBA_DELAY, 243 IWL_TLC_DEBUG_START_AC_RATE_IDX, 244 IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK, 245 }; /* TLC_MNG_DEBUG_FLAGS_API_E_VER_1 */ 246 247 /** 248 * struct iwl_dhc_tlc_dbg - fixed debug config 249 * @sta_id: bit 0 - enable/disable, bits 1 - 7 hold station id 250 * @reserved1: reserved 251 * @flags: bitmap of %IWL_TLC_DEBUG_\* 252 * @fixed_rate: rate value 253 * @stats_threshold: if number of tx-ed frames is greater, send statistics 254 * @time_threshold: statistics threshold in usec 255 * @agg_time_lim: max agg time 256 * @agg_dis_start_threshold: frames with try-cont greater than this count will 257 * not be aggregated 258 * @agg_frame_count_lim: agg size 259 * @addba_retry_delay: delay between retries of ADD BA 260 * @start_ac_rate_idx: frames per second to start a BA session 261 * @no_far_range_tweak: disable BW scaling 262 * @reserved2: reserved 263 */ 264 struct iwl_dhc_tlc_cmd { 265 u8 sta_id; 266 u8 reserved1[3]; 267 __le32 flags; 268 __le32 fixed_rate; 269 __le16 stats_threshold; 270 __le16 time_threshold; 271 __le16 agg_time_lim; 272 __le16 agg_dis_start_threshold; 273 __le16 agg_frame_count_lim; 274 __le16 addba_retry_delay; 275 u8 start_ac_rate_idx[IEEE80211_NUM_ACS]; 276 u8 no_far_range_tweak; 277 u8 reserved2[3]; 278 } __packed; 279 280 /* 281 * These serve as indexes into 282 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 283 * TODO: avoid overlap between legacy and HT rates 284 */ 285 enum { 286 IWL_RATE_1M_INDEX = 0, 287 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 288 IWL_RATE_2M_INDEX, 289 IWL_RATE_5M_INDEX, 290 IWL_RATE_11M_INDEX, 291 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 292 IWL_RATE_6M_INDEX, 293 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 294 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 295 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 296 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 297 IWL_RATE_9M_INDEX, 298 IWL_RATE_12M_INDEX, 299 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 300 IWL_RATE_18M_INDEX, 301 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 302 IWL_RATE_24M_INDEX, 303 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 304 IWL_RATE_36M_INDEX, 305 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 306 IWL_RATE_48M_INDEX, 307 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 308 IWL_RATE_54M_INDEX, 309 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 310 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 311 IWL_RATE_60M_INDEX, 312 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 313 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 314 IWL_RATE_MCS_8_INDEX, 315 IWL_RATE_MCS_9_INDEX, 316 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 317 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 318 IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1, 319 }; 320 321 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 322 323 /* fw API values for legacy bit rates, both OFDM and CCK */ 324 enum { 325 IWL_RATE_6M_PLCP = 13, 326 IWL_RATE_9M_PLCP = 15, 327 IWL_RATE_12M_PLCP = 5, 328 IWL_RATE_18M_PLCP = 7, 329 IWL_RATE_24M_PLCP = 9, 330 IWL_RATE_36M_PLCP = 11, 331 IWL_RATE_48M_PLCP = 1, 332 IWL_RATE_54M_PLCP = 3, 333 IWL_RATE_1M_PLCP = 10, 334 IWL_RATE_2M_PLCP = 20, 335 IWL_RATE_5M_PLCP = 55, 336 IWL_RATE_11M_PLCP = 110, 337 IWL_RATE_INVM_PLCP = -1, 338 }; 339 340 /* 341 * rate_n_flags bit fields 342 * 343 * The 32-bit value has different layouts in the low 8 bites depending on the 344 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 345 * for CCK and OFDM). 346 * 347 * High-throughput (HT) rate format 348 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 349 * Very High-throughput (VHT) rate format 350 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 351 * Legacy OFDM rate format for bits 7:0 352 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 353 * Legacy CCK rate format for bits 7:0: 354 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 355 */ 356 357 /* Bit 8: (1) HT format, (0) legacy or VHT format */ 358 #define RATE_MCS_HT_POS 8 359 #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS) 360 361 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 362 #define RATE_MCS_CCK_POS 9 363 #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS) 364 365 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 366 #define RATE_MCS_VHT_POS 26 367 #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS) 368 369 370 /* 371 * High-throughput (HT) rate format for bits 7:0 372 * 373 * 2-0: MCS rate base 374 * 0) 6 Mbps 375 * 1) 12 Mbps 376 * 2) 18 Mbps 377 * 3) 24 Mbps 378 * 4) 36 Mbps 379 * 5) 48 Mbps 380 * 6) 54 Mbps 381 * 7) 60 Mbps 382 * 4-3: 0) Single stream (SISO) 383 * 1) Dual stream (MIMO) 384 * 2) Triple stream (MIMO) 385 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 386 * (bits 7-6 are zero) 387 * 388 * Together the low 5 bits work out to the MCS index because we don't 389 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 390 * streams and 16-23 have three streams. We could also support MCS 32 391 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 392 */ 393 #define RATE_HT_MCS_RATE_CODE_MSK 0x7 394 #define RATE_HT_MCS_NSS_POS 3 395 #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS) 396 397 /* Bit 10: (1) Use Green Field preamble */ 398 #define RATE_HT_MCS_GF_POS 10 399 #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 400 401 #define RATE_HT_MCS_INDEX_MSK 0x3f 402 403 /* 404 * Very High-throughput (VHT) rate format for bits 7:0 405 * 406 * 3-0: VHT MCS (0-9) 407 * 5-4: number of streams - 1: 408 * 0) Single stream (SISO) 409 * 1) Dual stream (MIMO) 410 * 2) Triple stream (MIMO) 411 */ 412 413 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 414 #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 415 #define RATE_VHT_MCS_NSS_POS 4 416 #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 417 418 /* 419 * Legacy OFDM rate format for bits 7:0 420 * 421 * 3-0: 0xD) 6 Mbps 422 * 0xF) 9 Mbps 423 * 0x5) 12 Mbps 424 * 0x7) 18 Mbps 425 * 0x9) 24 Mbps 426 * 0xB) 36 Mbps 427 * 0x1) 48 Mbps 428 * 0x3) 54 Mbps 429 * (bits 7-4 are 0) 430 * 431 * Legacy CCK rate format for bits 7:0: 432 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 433 * 434 * 6-0: 10) 1 Mbps 435 * 20) 2 Mbps 436 * 55) 5.5 Mbps 437 * 110) 11 Mbps 438 * (bit 7 is 0) 439 */ 440 #define RATE_LEGACY_RATE_MSK 0xff 441 442 /* Bit 10 - OFDM HE */ 443 #define RATE_MCS_OFDM_HE_POS 10 444 #define RATE_MCS_OFDM_HE_MSK BIT(RATE_MCS_OFDM_HE_POS) 445 446 /* 447 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 448 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 449 */ 450 #define RATE_MCS_CHAN_WIDTH_POS 11 451 #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS) 452 #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 453 #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 454 #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 455 #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 456 457 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 458 #define RATE_MCS_SGI_POS 13 459 #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 460 461 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 462 #define RATE_MCS_ANT_POS 14 463 #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 464 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 465 #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS) 466 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 467 RATE_MCS_ANT_B_MSK) 468 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \ 469 RATE_MCS_ANT_C_MSK) 470 #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK 471 472 /* Bit 17: (0) SS, (1) SS*2 */ 473 #define RATE_MCS_STBC_POS 17 474 #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 475 476 /* Bit 18: OFDM-HE dual carrier mode */ 477 #define RATE_HE_DUAL_CARRIER_MODE 18 478 #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 479 480 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 481 #define RATE_MCS_BF_POS 19 482 #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 483 484 /* 485 * Bit 20-21: HE guard interval and LTF type. 486 * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us, 487 * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us 488 */ 489 #define RATE_MCS_HE_GI_LTF_POS 20 490 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) 491 492 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 493 #define RATE_MCS_HE_TYPE_POS 22 494 #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 495 496 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 497 #define RATE_MCS_DUP_POS 24 498 #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS) 499 500 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 501 #define RATE_MCS_LDPC_POS 27 502 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 503 504 505 /* Link Quality definitions */ 506 507 /* # entries in rate scale table to support Tx retries */ 508 #define LQ_MAX_RETRY_NUM 16 509 510 /* Link quality command flags bit fields */ 511 512 /* Bit 0: (0) Don't use RTS (1) Use RTS */ 513 #define LQ_FLAG_USE_RTS_POS 0 514 #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 515 516 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 517 #define LQ_FLAG_COLOR_POS 1 518 #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 519 #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 520 LQ_FLAG_COLOR_POS) 521 #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 522 LQ_FLAG_COLOR_MSK) 523 #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 524 525 /* Bit 4-5: Tx RTS BW Signalling 526 * (0) No RTS BW signalling 527 * (1) Static BW signalling 528 * (2) Dynamic BW signalling 529 */ 530 #define LQ_FLAG_RTS_BW_SIG_POS 4 531 #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 532 #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 533 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 534 535 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 536 * Dyanmic BW selection allows Tx with narrower BW then requested in rates 537 */ 538 #define LQ_FLAG_DYNAMIC_BW_POS 6 539 #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 540 541 /* Single Stream Tx Parameters (lq_cmd->ss_params) 542 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 543 * used for single stream Tx. 544 */ 545 546 /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 547 * (0) - No STBC allowed 548 * (1) - 2x1 STBC allowed (HT/VHT) 549 * (2) - 4x2 STBC allowed (HT/VHT) 550 * (3) - 3x2 STBC allowed (HT only) 551 * All our chips are at most 2 antennas so only (1) is valid for now. 552 */ 553 #define LQ_SS_STBC_ALLOWED_POS 0 554 #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 555 556 /* 2x1 STBC is allowed */ 557 #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 558 559 /* Bit 2: Beamformer (VHT only) is allowed */ 560 #define LQ_SS_BFER_ALLOWED_POS 2 561 #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 562 563 /* Bit 3: Force BFER or STBC for testing 564 * If this is set: 565 * If BFER is allowed then force the ucode to choose BFER else 566 * If STBC is allowed then force the ucode to choose STBC over SISO 567 */ 568 #define LQ_SS_FORCE_POS 3 569 #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 570 571 /* Bit 31: ss_params field is valid. Used for FW backward compatibility 572 * with other drivers which don't support the ss_params API yet 573 */ 574 #define LQ_SS_PARAMS_VALID_POS 31 575 #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 576 577 /** 578 * struct iwl_lq_cmd - link quality command 579 * @sta_id: station to update 580 * @reduced_tpc: reduced transmit power control value 581 * @control: not used 582 * @flags: combination of LQ_FLAG_* 583 * @mimo_delim: the first SISO index in rs_table, which separates MIMO 584 * and SISO rates 585 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 586 * Should be ANT_[ABC] 587 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 588 * @initial_rate_index: first index from rs_table per AC category 589 * @agg_time_limit: aggregation max time threshold in usec/100, meaning 590 * value of 100 is one usec. Range is 100 to 8000 591 * @agg_disable_start_th: try-count threshold for starting aggregation. 592 * If a frame has higher try-count, it should not be selected for 593 * starting an aggregation sequence. 594 * @agg_frame_cnt_limit: max frame count in an aggregation. 595 * 0: no limit 596 * 1: no aggregation (one frame per aggregation) 597 * 2 - 0x3f: maximal number of frames (up to 3f == 63) 598 * @reserved2: reserved 599 * @rs_table: array of rates for each TX try, each is rate_n_flags, 600 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 601 * @ss_params: single stream features. declare whether STBC or BFER are allowed. 602 */ 603 struct iwl_lq_cmd { 604 u8 sta_id; 605 u8 reduced_tpc; 606 __le16 control; 607 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 608 u8 flags; 609 u8 mimo_delim; 610 u8 single_stream_ant_msk; 611 u8 dual_stream_ant_msk; 612 u8 initial_rate_index[AC_NUM]; 613 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 614 __le16 agg_time_limit; 615 u8 agg_disable_start_th; 616 u8 agg_frame_cnt_limit; 617 __le32 reserved2; 618 __le32 rs_table[LQ_MAX_RETRY_NUM]; 619 __le32 ss_params; 620 }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 621 622 #endif /* __iwl_fw_api_rs_h__ */ 623