1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2012-2014, 2018-2020 Intel Corporation
4  * Copyright (C) 2017 Intel Deutschland GmbH
5  */
6 #ifndef __iwl_fw_api_rs_h__
7 #define __iwl_fw_api_rs_h__
8 
9 #include "mac.h"
10 
11 /**
12  * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
13  * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for
14  *				    bandwidths <= 80MHz
15  * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
16  * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
17  *					      bandwidth
18  * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
19  *					    for BPSK (MCS 0) with 1 spatial
20  *					    stream
21  * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation
22  *					    for BPSK (MCS 0) with 2 spatial
23  *					    streams
24  */
25 enum iwl_tlc_mng_cfg_flags {
26 	IWL_TLC_MNG_CFG_FLAGS_STBC_MSK			= BIT(0),
27 	IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK			= BIT(1),
28 	IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK	= BIT(2),
29 	IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK		= BIT(3),
30 	IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK		= BIT(4),
31 };
32 
33 /**
34  * enum iwl_tlc_mng_cfg_cw - channel width options
35  * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
36  * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
37  * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
38  * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
39  * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value
40  */
41 enum iwl_tlc_mng_cfg_cw {
42 	IWL_TLC_MNG_CH_WIDTH_20MHZ,
43 	IWL_TLC_MNG_CH_WIDTH_40MHZ,
44 	IWL_TLC_MNG_CH_WIDTH_80MHZ,
45 	IWL_TLC_MNG_CH_WIDTH_160MHZ,
46 	IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ,
47 };
48 
49 /**
50  * enum iwl_tlc_mng_cfg_chains - possible chains
51  * @IWL_TLC_MNG_CHAIN_A_MSK: chain A
52  * @IWL_TLC_MNG_CHAIN_B_MSK: chain B
53  */
54 enum iwl_tlc_mng_cfg_chains {
55 	IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
56 	IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
57 };
58 
59 /**
60  * enum iwl_tlc_mng_cfg_mode - supported modes
61  * @IWL_TLC_MNG_MODE_CCK: enable CCK
62  * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
63  * @IWL_TLC_MNG_MODE_NON_HT: enable non HT
64  * @IWL_TLC_MNG_MODE_HT: enable HT
65  * @IWL_TLC_MNG_MODE_VHT: enable VHT
66  * @IWL_TLC_MNG_MODE_HE: enable HE
67  * @IWL_TLC_MNG_MODE_INVALID: invalid value
68  * @IWL_TLC_MNG_MODE_NUM: a count of possible modes
69  */
70 enum iwl_tlc_mng_cfg_mode {
71 	IWL_TLC_MNG_MODE_CCK = 0,
72 	IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK,
73 	IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK,
74 	IWL_TLC_MNG_MODE_HT,
75 	IWL_TLC_MNG_MODE_VHT,
76 	IWL_TLC_MNG_MODE_HE,
77 	IWL_TLC_MNG_MODE_INVALID,
78 	IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID,
79 };
80 
81 /**
82  * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates
83  * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0
84  * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1
85  * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2
86  * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3
87  * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4
88  * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5
89  * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6
90  * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7
91  * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8
92  * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9
93  * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10
94  * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11
95  * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT
96  */
97 enum iwl_tlc_mng_ht_rates {
98 	IWL_TLC_MNG_HT_RATE_MCS0 = 0,
99 	IWL_TLC_MNG_HT_RATE_MCS1,
100 	IWL_TLC_MNG_HT_RATE_MCS2,
101 	IWL_TLC_MNG_HT_RATE_MCS3,
102 	IWL_TLC_MNG_HT_RATE_MCS4,
103 	IWL_TLC_MNG_HT_RATE_MCS5,
104 	IWL_TLC_MNG_HT_RATE_MCS6,
105 	IWL_TLC_MNG_HT_RATE_MCS7,
106 	IWL_TLC_MNG_HT_RATE_MCS8,
107 	IWL_TLC_MNG_HT_RATE_MCS9,
108 	IWL_TLC_MNG_HT_RATE_MCS10,
109 	IWL_TLC_MNG_HT_RATE_MCS11,
110 	IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11,
111 };
112 
113 enum IWL_TLC_MNG_NSS {
114 	IWL_TLC_NSS_1,
115 	IWL_TLC_NSS_2,
116 	IWL_TLC_NSS_MAX
117 };
118 
119 enum IWL_TLC_HT_BW_RATES {
120 	IWL_TLC_HT_BW_NONE_160,
121 	IWL_TLC_HT_BW_160,
122 };
123 
124 /**
125  * struct tlc_config_cmd - TLC configuration
126  * @sta_id: station id
127  * @reserved1: reserved
128  * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw
129  * @mode: &enum iwl_tlc_mng_cfg_mode
130  * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
131  * @amsdu: TX amsdu is supported
132  * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
133  * @non_ht_rates: bitmap of supported legacy rates
134  * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width>
135  *	      pair (0 - 80mhz width and below, 1 - 160mhz).
136  * @max_mpdu_len: max MPDU length, in bytes
137  * @sgi_ch_width_supp: bitmap of SGI support per channel width
138  *		       use BIT(@enum iwl_tlc_mng_cfg_cw)
139  * @reserved2: reserved
140  * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI),
141  *	       set zero for no limit.
142  */
143 struct iwl_tlc_config_cmd {
144 	u8 sta_id;
145 	u8 reserved1[3];
146 	u8 max_ch_width;
147 	u8 mode;
148 	u8 chains;
149 	u8 amsdu;
150 	__le16 flags;
151 	__le16 non_ht_rates;
152 	__le16 ht_rates[IWL_TLC_NSS_MAX][2];
153 	__le16 max_mpdu_len;
154 	u8 sgi_ch_width_supp;
155 	u8 reserved2;
156 	__le32 max_tx_op;
157 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */
158 
159 /**
160  * enum iwl_tlc_update_flags - updated fields
161  * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update
162  * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update
163  */
164 enum iwl_tlc_update_flags {
165 	IWL_TLC_NOTIF_FLAG_RATE  = BIT(0),
166 	IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1),
167 };
168 
169 /**
170  * struct iwl_tlc_update_notif - TLC notification from FW
171  * @sta_id: station id
172  * @reserved: reserved
173  * @flags: bitmap of notifications reported
174  * @rate: current initial rate
175  * @amsdu_size: Max AMSDU size, in bytes
176  * @amsdu_enabled: bitmap for per-TID AMSDU enablement
177  */
178 struct iwl_tlc_update_notif {
179 	u8 sta_id;
180 	u8 reserved[3];
181 	__le32 flags;
182 	__le32 rate;
183 	__le32 amsdu_size;
184 	__le32 amsdu_enabled;
185 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */
186 
187 
188 #define IWL_MAX_MCS_DISPLAY_SIZE        12
189 
190 struct iwl_rate_mcs_info {
191 	char    mbps[IWL_MAX_MCS_DISPLAY_SIZE];
192 	char    mcs[IWL_MAX_MCS_DISPLAY_SIZE];
193 };
194 
195 /*
196  * These serve as indexes into
197  * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
198  * TODO: avoid overlap between legacy and HT rates
199  */
200 enum {
201 	IWL_RATE_1M_INDEX = 0,
202 	IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
203 	IWL_RATE_2M_INDEX,
204 	IWL_RATE_5M_INDEX,
205 	IWL_RATE_11M_INDEX,
206 	IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
207 	IWL_RATE_6M_INDEX,
208 	IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
209 	IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
210 	IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
211 	IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
212 	IWL_RATE_9M_INDEX,
213 	IWL_RATE_12M_INDEX,
214 	IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
215 	IWL_RATE_18M_INDEX,
216 	IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
217 	IWL_RATE_24M_INDEX,
218 	IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
219 	IWL_RATE_36M_INDEX,
220 	IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
221 	IWL_RATE_48M_INDEX,
222 	IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
223 	IWL_RATE_54M_INDEX,
224 	IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
225 	IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
226 	IWL_RATE_60M_INDEX,
227 	IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
228 	IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
229 	IWL_RATE_MCS_8_INDEX,
230 	IWL_RATE_MCS_9_INDEX,
231 	IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
232 	IWL_RATE_MCS_10_INDEX,
233 	IWL_RATE_MCS_11_INDEX,
234 	IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX,
235 	IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
236 	IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1,
237 	IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
238 	IWL_RATE_INVALID = IWL_RATE_COUNT,
239 };
240 
241 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
242 
243 /* fw API values for legacy bit rates, both OFDM and CCK */
244 enum {
245 	IWL_RATE_6M_PLCP  = 13,
246 	IWL_RATE_9M_PLCP  = 15,
247 	IWL_RATE_12M_PLCP = 5,
248 	IWL_RATE_18M_PLCP = 7,
249 	IWL_RATE_24M_PLCP = 9,
250 	IWL_RATE_36M_PLCP = 11,
251 	IWL_RATE_48M_PLCP = 1,
252 	IWL_RATE_54M_PLCP = 3,
253 	IWL_RATE_1M_PLCP  = 10,
254 	IWL_RATE_2M_PLCP  = 20,
255 	IWL_RATE_5M_PLCP  = 55,
256 	IWL_RATE_11M_PLCP = 110,
257 	IWL_RATE_INVM_PLCP = -1,
258 };
259 
260 /*
261  * rate_n_flags bit fields version 1
262  *
263  * The 32-bit value has different layouts in the low 8 bites depending on the
264  * format. There are three formats, HT, VHT and legacy (11abg, with subformats
265  * for CCK and OFDM).
266  *
267  * High-throughput (HT) rate format
268  *	bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
269  * Very High-throughput (VHT) rate format
270  *	bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
271  * Legacy OFDM rate format for bits 7:0
272  *	bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
273  * Legacy CCK rate format for bits 7:0:
274  *	bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
275  */
276 
277 /* Bit 8: (1) HT format, (0) legacy or VHT format */
278 #define RATE_MCS_HT_POS 8
279 #define RATE_MCS_HT_MSK_V1 BIT(RATE_MCS_HT_POS)
280 
281 /* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
282 #define RATE_MCS_CCK_POS_V1 9
283 #define RATE_MCS_CCK_MSK_V1 BIT(RATE_MCS_CCK_POS_V1)
284 
285 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
286 #define RATE_MCS_VHT_POS_V1 26
287 #define RATE_MCS_VHT_MSK_V1 BIT(RATE_MCS_VHT_POS_V1)
288 
289 
290 /*
291  * High-throughput (HT) rate format for bits 7:0
292  *
293  *  2-0:  MCS rate base
294  *        0)   6 Mbps
295  *        1)  12 Mbps
296  *        2)  18 Mbps
297  *        3)  24 Mbps
298  *        4)  36 Mbps
299  *        5)  48 Mbps
300  *        6)  54 Mbps
301  *        7)  60 Mbps
302  *  4-3:  0)  Single stream (SISO)
303  *        1)  Dual stream (MIMO)
304  *        2)  Triple stream (MIMO)
305  *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
306  *  (bits 7-6 are zero)
307  *
308  * Together the low 5 bits work out to the MCS index because we don't
309  * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
310  * streams and 16-23 have three streams. We could also support MCS 32
311  * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
312  */
313 #define RATE_HT_MCS_RATE_CODE_MSK_V1	0x7
314 #define RATE_HT_MCS_NSS_POS_V1          3
315 #define RATE_HT_MCS_NSS_MSK_V1          (3 << RATE_HT_MCS_NSS_POS_V1)
316 #define RATE_HT_MCS_MIMO2_MSK		BIT(RATE_HT_MCS_NSS_POS_V1)
317 
318 /* Bit 10: (1) Use Green Field preamble */
319 #define RATE_HT_MCS_GF_POS		10
320 #define RATE_HT_MCS_GF_MSK		(1 << RATE_HT_MCS_GF_POS)
321 
322 #define RATE_HT_MCS_INDEX_MSK_V1	0x3f
323 
324 /*
325  * Very High-throughput (VHT) rate format for bits 7:0
326  *
327  *  3-0:  VHT MCS (0-9)
328  *  5-4:  number of streams - 1:
329  *        0)  Single stream (SISO)
330  *        1)  Dual stream (MIMO)
331  *        2)  Triple stream (MIMO)
332  */
333 
334 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
335 #define RATE_VHT_MCS_RATE_CODE_MSK	0xf
336 #define RATE_VHT_MCS_NSS_POS		4
337 #define RATE_VHT_MCS_NSS_MSK		(3 << RATE_VHT_MCS_NSS_POS)
338 #define RATE_VHT_MCS_MIMO2_MSK		BIT(RATE_VHT_MCS_NSS_POS)
339 
340 /*
341  * Legacy OFDM rate format for bits 7:0
342  *
343  *  3-0:  0xD)   6 Mbps
344  *        0xF)   9 Mbps
345  *        0x5)  12 Mbps
346  *        0x7)  18 Mbps
347  *        0x9)  24 Mbps
348  *        0xB)  36 Mbps
349  *        0x1)  48 Mbps
350  *        0x3)  54 Mbps
351  * (bits 7-4 are 0)
352  *
353  * Legacy CCK rate format for bits 7:0:
354  * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
355  *
356  *  6-0:   10)  1 Mbps
357  *         20)  2 Mbps
358  *         55)  5.5 Mbps
359  *        110)  11 Mbps
360  * (bit 7 is 0)
361  */
362 #define RATE_LEGACY_RATE_MSK_V1 0xff
363 
364 /* Bit 10 - OFDM HE */
365 #define RATE_MCS_HE_POS_V1	10
366 #define RATE_MCS_HE_MSK_V1	BIT(RATE_MCS_HE_POS_V1)
367 
368 /*
369  * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
370  * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
371  */
372 #define RATE_MCS_CHAN_WIDTH_POS		11
373 #define RATE_MCS_CHAN_WIDTH_MSK_V1	(3 << RATE_MCS_CHAN_WIDTH_POS)
374 
375 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
376 #define RATE_MCS_SGI_POS_V1		13
377 #define RATE_MCS_SGI_MSK_V1		BIT(RATE_MCS_SGI_POS_V1)
378 
379 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
380 #define RATE_MCS_ANT_POS		14
381 #define RATE_MCS_ANT_A_MSK		(1 << RATE_MCS_ANT_POS)
382 #define RATE_MCS_ANT_B_MSK		(2 << RATE_MCS_ANT_POS)
383 #define RATE_MCS_ANT_AB_MSK		(RATE_MCS_ANT_A_MSK | \
384 					 RATE_MCS_ANT_B_MSK)
385 #define RATE_MCS_ANT_MSK		RATE_MCS_ANT_AB_MSK
386 
387 /* Bit 17: (0) SS, (1) SS*2 */
388 #define RATE_MCS_STBC_POS		17
389 #define RATE_MCS_STBC_MSK		BIT(RATE_MCS_STBC_POS)
390 
391 /* Bit 18: OFDM-HE dual carrier mode */
392 #define RATE_HE_DUAL_CARRIER_MODE	18
393 #define RATE_HE_DUAL_CARRIER_MODE_MSK	BIT(RATE_HE_DUAL_CARRIER_MODE)
394 
395 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
396 #define RATE_MCS_BF_POS			19
397 #define RATE_MCS_BF_MSK			(1 << RATE_MCS_BF_POS)
398 
399 /*
400  * Bit 20-21: HE LTF type and guard interval
401  * HE (ext) SU:
402  *	0			1xLTF+0.8us
403  *	1			2xLTF+0.8us
404  *	2			2xLTF+1.6us
405  *	3 & SGI (bit 13) clear	4xLTF+3.2us
406  *	3 & SGI (bit 13) set	4xLTF+0.8us
407  * HE MU:
408  *	0			4xLTF+0.8us
409  *	1			2xLTF+0.8us
410  *	2			2xLTF+1.6us
411  *	3			4xLTF+3.2us
412  * HE TRIG:
413  *	0			1xLTF+1.6us
414  *	1			2xLTF+1.6us
415  *	2			4xLTF+3.2us
416  *	3			(does not occur)
417  */
418 #define RATE_MCS_HE_GI_LTF_POS		20
419 #define RATE_MCS_HE_GI_LTF_MSK_V1		(3 << RATE_MCS_HE_GI_LTF_POS)
420 
421 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
422 #define RATE_MCS_HE_TYPE_POS_V1		22
423 #define RATE_MCS_HE_TYPE_SU_V1		(0 << RATE_MCS_HE_TYPE_POS_V1)
424 #define RATE_MCS_HE_TYPE_EXT_SU_V1		BIT(RATE_MCS_HE_TYPE_POS_V1)
425 #define RATE_MCS_HE_TYPE_MU_V1		(2 << RATE_MCS_HE_TYPE_POS_V1)
426 #define RATE_MCS_HE_TYPE_TRIG_V1	(3 << RATE_MCS_HE_TYPE_POS_V1)
427 #define RATE_MCS_HE_TYPE_MSK_V1		(3 << RATE_MCS_HE_TYPE_POS_V1)
428 
429 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
430 #define RATE_MCS_DUP_POS_V1		24
431 #define RATE_MCS_DUP_MSK_V1		(3 << RATE_MCS_DUP_POS_V1)
432 
433 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
434 #define RATE_MCS_LDPC_POS_V1		27
435 #define RATE_MCS_LDPC_MSK_V1		BIT(RATE_MCS_LDPC_POS_V1)
436 
437 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
438 #define RATE_MCS_HE_106T_POS_V1		28
439 #define RATE_MCS_HE_106T_MSK_V1		BIT(RATE_MCS_HE_106T_POS_V1)
440 
441 /* Bit 30-31: (1) RTS, (2) CTS */
442 #define RATE_MCS_RTS_REQUIRED_POS  (30)
443 #define RATE_MCS_RTS_REQUIRED_MSK  (0x1 << RATE_MCS_RTS_REQUIRED_POS)
444 
445 #define RATE_MCS_CTS_REQUIRED_POS  (31)
446 #define RATE_MCS_CTS_REQUIRED_MSK  (0x1 << RATE_MCS_CTS_REQUIRED_POS)
447 
448 /* rate_n_flags bit field version 2
449  *
450  * The 32-bit value has different layouts in the low 8 bits depending on the
451  * format. There are three formats, HT, VHT and legacy (11abg, with subformats
452  * for CCK and OFDM).
453  *
454  */
455 
456 /* Bits 10-8: rate format
457  * (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT)
458  * (3) Very High-throughput (VHT) (4) High-efficiency (HE)
459  * (5) Extremely High-throughput (EHT)
460  */
461 #define RATE_MCS_MOD_TYPE_POS		8
462 #define RATE_MCS_MOD_TYPE_MSK		(0x7 << RATE_MCS_MOD_TYPE_POS)
463 #define RATE_MCS_CCK_MSK		(0 << RATE_MCS_MOD_TYPE_POS)
464 #define RATE_MCS_LEGACY_OFDM_MSK	(1 << RATE_MCS_MOD_TYPE_POS)
465 #define RATE_MCS_HT_MSK			(2 << RATE_MCS_MOD_TYPE_POS)
466 #define RATE_MCS_VHT_MSK		(3 << RATE_MCS_MOD_TYPE_POS)
467 #define RATE_MCS_HE_MSK			(4 << RATE_MCS_MOD_TYPE_POS)
468 #define RATE_MCS_EHT_MSK		(5 << RATE_MCS_MOD_TYPE_POS)
469 
470 /*
471  * Legacy CCK rate format for bits 0:3:
472  *
473  * (0) 0xa - 1 Mbps
474  * (1) 0x14 - 2 Mbps
475  * (2) 0x37 - 5.5 Mbps
476  * (3) 0x6e - 11 nbps
477  *
478  * Legacy OFDM rate format for bis 3:0:
479  *
480  * (0) 6 Mbps
481  * (1) 9 Mbps
482  * (2) 12 Mbps
483  * (3) 18 Mbps
484  * (4) 24 Mbps
485  * (5) 36 Mbps
486  * (6) 48 Mbps
487  * (7) 54 Mbps
488  *
489  */
490 #define RATE_LEGACY_RATE_MSK		0x7
491 
492 /*
493  * HT, VHT, HE, EHT rate format for bits 3:0
494  * 3-0: MCS
495  *
496  */
497 #define RATE_HT_MCS_CODE_MSK		0x7
498 #define RATE_MCS_NSS_POS		4
499 #define RATE_MCS_NSS_MSK		(1 << RATE_MCS_NSS_POS)
500 #define RATE_MCS_CODE_MSK		0xf
501 #define RATE_HT_MCS_INDEX(r)		((((r) & RATE_MCS_NSS_MSK) >> 1) | \
502 					 ((r) & RATE_HT_MCS_CODE_MSK))
503 
504 /* Bits 7-5: reserved */
505 
506 /*
507  * Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz
508  */
509 #define RATE_MCS_CHAN_WIDTH_MSK			(0x7 << RATE_MCS_CHAN_WIDTH_POS)
510 #define RATE_MCS_CHAN_WIDTH_20			(0 << RATE_MCS_CHAN_WIDTH_POS)
511 #define RATE_MCS_CHAN_WIDTH_40			(1 << RATE_MCS_CHAN_WIDTH_POS)
512 #define RATE_MCS_CHAN_WIDTH_80			(2 << RATE_MCS_CHAN_WIDTH_POS)
513 #define RATE_MCS_CHAN_WIDTH_160			(3 << RATE_MCS_CHAN_WIDTH_POS)
514 #define RATE_MCS_CHAN_WIDTH_320			(4 << RATE_MCS_CHAN_WIDTH_POS)
515 
516 /* Bit 15-14: Antenna selection:
517  * Bit 14: Ant A active
518  * Bit 15: Ant B active
519  *
520  * All relevant definitions are same as in v1
521  */
522 
523 /* Bit 16 (1) LDPC enables, (0) LDPC disabled */
524 #define RATE_MCS_LDPC_POS	16
525 #define RATE_MCS_LDPC_MSK	(1 << RATE_MCS_LDPC_POS)
526 
527 /* Bit 17: (0) SS, (1) SS*2 (same as v1) */
528 
529 /* Bit 18: OFDM-HE dual carrier mode (same as v1) */
530 
531 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on (same as v1) */
532 
533 /*
534  * Bit 22-20: HE LTF type and guard interval
535  * CCK:
536  *	0			long preamble
537  *	1			short preamble
538  * HT/VHT:
539  *	0			0.8us
540  *	1			0.4us
541  * HE (ext) SU:
542  *	0			1xLTF+0.8us
543  *	1			2xLTF+0.8us
544  *	2			2xLTF+1.6us
545  *	3			4xLTF+3.2us
546  *	4			4xLTF+0.8us
547  * HE MU:
548  *	0			4xLTF+0.8us
549  *	1			2xLTF+0.8us
550  *	2			2xLTF+1.6us
551  *	3			4xLTF+3.2us
552  * HE TRIG:
553  *	0			1xLTF+1.6us
554  *	1			2xLTF+1.6us
555  *	2			4xLTF+3.2us
556  * */
557 #define RATE_MCS_HE_GI_LTF_MSK		(0x7 << RATE_MCS_HE_GI_LTF_POS)
558 #define RATE_MCS_SGI_POS		RATE_MCS_HE_GI_LTF_POS
559 #define RATE_MCS_SGI_MSK		(1 << RATE_MCS_SGI_POS)
560 #define RATE_MCS_HE_SU_4_LTF		3
561 #define RATE_MCS_HE_SU_4_LTF_08_GI	4
562 
563 /* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
564 #define RATE_MCS_HE_TYPE_POS		23
565 #define RATE_MCS_HE_TYPE_SU		(0 << RATE_MCS_HE_TYPE_POS)
566 #define RATE_MCS_HE_TYPE_EXT_SU		(1 << RATE_MCS_HE_TYPE_POS)
567 #define RATE_MCS_HE_TYPE_MU		(2 << RATE_MCS_HE_TYPE_POS)
568 #define RATE_MCS_HE_TYPE_TRIG		(3 << RATE_MCS_HE_TYPE_POS)
569 #define RATE_MCS_HE_TYPE_MSK		(3 << RATE_MCS_HE_TYPE_POS)
570 
571 /* Bit 25: duplicate channel enabled
572  *
573  * if this bit is set, duplicate is according to BW (bits 11-13):
574  *
575  * CCK:  2x 20MHz
576  * OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16)
577  * EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160)
578  * */
579 #define RATE_MCS_DUP_POS		25
580 #define RATE_MCS_DUP_MSK		(1 << RATE_MCS_DUP_POS)
581 
582 /* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */
583 #define RATE_MCS_HE_106T_POS		26
584 #define RATE_MCS_HE_106T_MSK		(1 << RATE_MCS_HE_106T_POS)
585 
586 /* Bit 27: EHT extra LTF:
587  * instead of 1 LTF for SISO use 2 LTFs,
588  * instead of 2 LTFs for NSTS=2 use 4 LTFs*/
589 #define RATE_MCS_EHT_EXTRA_LTF_POS	27
590 #define RATE_MCS_EHT_EXTRA_LTF_MSK	(1 << RATE_MCS_EHT_EXTRA_LTF_POS)
591 
592 /* Bit 31-28: reserved */
593 
594 /* Link Quality definitions */
595 
596 /* # entries in rate scale table to support Tx retries */
597 #define  LQ_MAX_RETRY_NUM 16
598 
599 /* Link quality command flags bit fields */
600 
601 /* Bit 0: (0) Don't use RTS (1) Use RTS */
602 #define LQ_FLAG_USE_RTS_POS             0
603 #define LQ_FLAG_USE_RTS_MSK	        (1 << LQ_FLAG_USE_RTS_POS)
604 
605 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */
606 #define LQ_FLAG_COLOR_POS               1
607 #define LQ_FLAG_COLOR_MSK               (7 << LQ_FLAG_COLOR_POS)
608 #define LQ_FLAG_COLOR_GET(_f)		(((_f) & LQ_FLAG_COLOR_MSK) >>\
609 					 LQ_FLAG_COLOR_POS)
610 #define LQ_FLAGS_COLOR_INC(_c)		((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
611 					 LQ_FLAG_COLOR_MSK)
612 #define LQ_FLAG_COLOR_SET(_f, _c)	((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))
613 
614 /* Bit 4-5: Tx RTS BW Signalling
615  * (0) No RTS BW signalling
616  * (1) Static BW signalling
617  * (2) Dynamic BW signalling
618  */
619 #define LQ_FLAG_RTS_BW_SIG_POS          4
620 #define LQ_FLAG_RTS_BW_SIG_NONE         (0 << LQ_FLAG_RTS_BW_SIG_POS)
621 #define LQ_FLAG_RTS_BW_SIG_STATIC       (1 << LQ_FLAG_RTS_BW_SIG_POS)
622 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC      (2 << LQ_FLAG_RTS_BW_SIG_POS)
623 
624 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
625  * Dyanmic BW selection allows Tx with narrower BW then requested in rates
626  */
627 #define LQ_FLAG_DYNAMIC_BW_POS          6
628 #define LQ_FLAG_DYNAMIC_BW_MSK          (1 << LQ_FLAG_DYNAMIC_BW_POS)
629 
630 /* Single Stream Tx Parameters (lq_cmd->ss_params)
631  * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
632  * used for single stream Tx.
633  */
634 
635 /* Bit 0-1: Max STBC streams allowed. Can be 0-3.
636  * (0) - No STBC allowed
637  * (1) - 2x1 STBC allowed (HT/VHT)
638  * (2) - 4x2 STBC allowed (HT/VHT)
639  * (3) - 3x2 STBC allowed (HT only)
640  * All our chips are at most 2 antennas so only (1) is valid for now.
641  */
642 #define LQ_SS_STBC_ALLOWED_POS          0
643 #define LQ_SS_STBC_ALLOWED_MSK		(3 << LQ_SS_STBC_ALLOWED_MSK)
644 
645 /* 2x1 STBC is allowed */
646 #define LQ_SS_STBC_1SS_ALLOWED		(1 << LQ_SS_STBC_ALLOWED_POS)
647 
648 /* Bit 2: Beamformer (VHT only) is allowed */
649 #define LQ_SS_BFER_ALLOWED_POS		2
650 #define LQ_SS_BFER_ALLOWED		(1 << LQ_SS_BFER_ALLOWED_POS)
651 
652 /* Bit 3: Force BFER or STBC for testing
653  * If this is set:
654  * If BFER is allowed then force the ucode to choose BFER else
655  * If STBC is allowed then force the ucode to choose STBC over SISO
656  */
657 #define LQ_SS_FORCE_POS			3
658 #define LQ_SS_FORCE			(1 << LQ_SS_FORCE_POS)
659 
660 /* Bit 31: ss_params field is valid. Used for FW backward compatibility
661  * with other drivers which don't support the ss_params API yet
662  */
663 #define LQ_SS_PARAMS_VALID_POS		31
664 #define LQ_SS_PARAMS_VALID		(1 << LQ_SS_PARAMS_VALID_POS)
665 
666 /**
667  * struct iwl_lq_cmd - link quality command
668  * @sta_id: station to update
669  * @reduced_tpc: reduced transmit power control value
670  * @control: not used
671  * @flags: combination of LQ_FLAG_*
672  * @mimo_delim: the first SISO index in rs_table, which separates MIMO
673  *	and SISO rates
674  * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
675  *	Should be ANT_[ABC]
676  * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
677  * @initial_rate_index: first index from rs_table per AC category
678  * @agg_time_limit: aggregation max time threshold in usec/100, meaning
679  *	value of 100 is one usec. Range is 100 to 8000
680  * @agg_disable_start_th: try-count threshold for starting aggregation.
681  *	If a frame has higher try-count, it should not be selected for
682  *	starting an aggregation sequence.
683  * @agg_frame_cnt_limit: max frame count in an aggregation.
684  *	0: no limit
685  *	1: no aggregation (one frame per aggregation)
686  *	2 - 0x3f: maximal number of frames (up to 3f == 63)
687  * @reserved2: reserved
688  * @rs_table: array of rates for each TX try, each is rate_n_flags,
689  *	meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
690  * @ss_params: single stream features. declare whether STBC or BFER are allowed.
691  */
692 struct iwl_lq_cmd {
693 	u8 sta_id;
694 	u8 reduced_tpc;
695 	__le16 control;
696 	/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
697 	u8 flags;
698 	u8 mimo_delim;
699 	u8 single_stream_ant_msk;
700 	u8 dual_stream_ant_msk;
701 	u8 initial_rate_index[AC_NUM];
702 	/* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
703 	__le16 agg_time_limit;
704 	u8 agg_disable_start_th;
705 	u8 agg_frame_cnt_limit;
706 	__le32 reserved2;
707 	__le32 rs_table[LQ_MAX_RETRY_NUM];
708 	__le32 ss_params;
709 }; /* LINK_QUALITY_CMD_API_S_VER_1 */
710 
711 u8 iwl_fw_rate_idx_to_plcp(int idx);
712 u32 iwl_new_rate_from_v1(u32 rate_v1);
713 u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags);
714 const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx);
715 const char *iwl_rs_pretty_ant(u8 ant);
716 const char *iwl_rs_pretty_bw(int bw);
717 int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);
718 bool iwl_he_is_sgi(u32 rate_n_flags);
719 
720 #endif /* __iwl_fw_api_rs_h__ */
721