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59 
60 #ifndef __iwl_fw_api_rs_h__
61 #define __iwl_fw_api_rs_h__
62 
63 #include "mac.h"
64 
65 /**
66  * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags
67  * @IWL_TLC_MNG_CFG_FLAGS_CCK_MSK: CCK support
68  * @IWL_TLC_MNG_CFG_FLAGS_DD_MSK: enable DD
69  * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC
70  * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC
71  * @IWL_TLC_MNG_CFG_FLAGS_BF_MSK: enable BFER
72  * @IWL_TLC_MNG_CFG_FLAGS_DCM_MSK: enable DCM
73  */
74 enum iwl_tlc_mng_cfg_flags {
75 	IWL_TLC_MNG_CFG_FLAGS_CCK_MSK	= BIT(0),
76 	IWL_TLC_MNG_CFG_FLAGS_DD_MSK	= BIT(1),
77 	IWL_TLC_MNG_CFG_FLAGS_STBC_MSK	= BIT(2),
78 	IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK	= BIT(3),
79 	IWL_TLC_MNG_CFG_FLAGS_BF_MSK	= BIT(4),
80 	IWL_TLC_MNG_CFG_FLAGS_DCM_MSK	= BIT(5),
81 };
82 
83 /**
84  * enum iwl_tlc_mng_cfg_cw - channel width options
85  * @IWL_TLC_MNG_MAX_CH_WIDTH_20MHZ: 20MHZ channel
86  * @IWL_TLC_MNG_MAX_CH_WIDTH_40MHZ: 40MHZ channel
87  * @IWL_TLC_MNG_MAX_CH_WIDTH_80MHZ: 80MHZ channel
88  * @IWL_TLC_MNG_MAX_CH_WIDTH_160MHZ: 160MHZ channel
89  * @IWL_TLC_MNG_MAX_CH_WIDTH_LAST: maximum value
90  */
91 enum iwl_tlc_mng_cfg_cw {
92 	IWL_TLC_MNG_MAX_CH_WIDTH_20MHZ,
93 	IWL_TLC_MNG_MAX_CH_WIDTH_40MHZ,
94 	IWL_TLC_MNG_MAX_CH_WIDTH_80MHZ,
95 	IWL_TLC_MNG_MAX_CH_WIDTH_160MHZ,
96 	IWL_TLC_MNG_MAX_CH_WIDTH_LAST = IWL_TLC_MNG_MAX_CH_WIDTH_160MHZ,
97 };
98 
99 /**
100  * enum iwl_tlc_mng_cfg_chains - possible chains
101  * @IWL_TLC_MNG_CHAIN_A_MSK: chain A
102  * @IWL_TLC_MNG_CHAIN_B_MSK: chain B
103  * @IWL_TLC_MNG_CHAIN_C_MSK: chain C
104  */
105 enum iwl_tlc_mng_cfg_chains {
106 	IWL_TLC_MNG_CHAIN_A_MSK = BIT(0),
107 	IWL_TLC_MNG_CHAIN_B_MSK = BIT(1),
108 	IWL_TLC_MNG_CHAIN_C_MSK = BIT(2),
109 };
110 
111 /**
112  * enum iwl_tlc_mng_cfg_gi - guard interval options
113  * @IWL_TLC_MNG_SGI_20MHZ_MSK: enable short GI for 20MHZ
114  * @IWL_TLC_MNG_SGI_40MHZ_MSK: enable short GI for 40MHZ
115  * @IWL_TLC_MNG_SGI_80MHZ_MSK: enable short GI for 80MHZ
116  * @IWL_TLC_MNG_SGI_160MHZ_MSK: enable short GI for 160MHZ
117  */
118 enum iwl_tlc_mng_cfg_gi {
119 	IWL_TLC_MNG_SGI_20MHZ_MSK  = BIT(0),
120 	IWL_TLC_MNG_SGI_40MHZ_MSK  = BIT(1),
121 	IWL_TLC_MNG_SGI_80MHZ_MSK  = BIT(2),
122 	IWL_TLC_MNG_SGI_160MHZ_MSK = BIT(3),
123 };
124 
125 /**
126  * enum iwl_tlc_mng_cfg_mode - supported modes
127  * @IWL_TLC_MNG_MODE_CCK: enable CCK
128  * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT)
129  * @IWL_TLC_MNG_MODE_NON_HT: enable non HT
130  * @IWL_TLC_MNG_MODE_HT: enable HT
131  * @IWL_TLC_MNG_MODE_VHT: enable VHT
132  * @IWL_TLC_MNG_MODE_HE: enable HE
133  * @IWL_TLC_MNG_MODE_INVALID: invalid value
134  * @IWL_TLC_MNG_MODE_NUM: a count of possible modes
135  */
136 enum iwl_tlc_mng_cfg_mode {
137 	IWL_TLC_MNG_MODE_CCK = 0,
138 	IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK,
139 	IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK,
140 	IWL_TLC_MNG_MODE_HT,
141 	IWL_TLC_MNG_MODE_VHT,
142 	IWL_TLC_MNG_MODE_HE,
143 	IWL_TLC_MNG_MODE_INVALID,
144 	IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID,
145 };
146 
147 /**
148  * enum iwl_tlc_mng_vht_he_types - VHT HE types
149  * @IWL_TLC_MNG_VALID_VHT_HE_TYPES_SU: VHT HT single user
150  * @IWL_TLC_MNG_VALID_VHT_HE_TYPES_SU_EXT: VHT HT single user extended
151  * @IWL_TLC_MNG_VALID_VHT_HE_TYPES_MU: VHT HT multiple users
152  * @IWL_TLC_MNG_VALID_VHT_HE_TYPES_TRIG_BASED: trigger based
153  * @IWL_TLC_MNG_VALID_VHT_HE_TYPES_NUM: a count of possible types
154  */
155 enum iwl_tlc_mng_vht_he_types {
156 	IWL_TLC_MNG_VALID_VHT_HE_TYPES_SU = 0,
157 	IWL_TLC_MNG_VALID_VHT_HE_TYPES_SU_EXT,
158 	IWL_TLC_MNG_VALID_VHT_HE_TYPES_MU,
159 	IWL_TLC_MNG_VALID_VHT_HE_TYPES_TRIG_BASED,
160 	IWL_TLC_MNG_VALID_VHT_HE_TYPES_NUM =
161 		IWL_TLC_MNG_VALID_VHT_HE_TYPES_TRIG_BASED,
162 
163 };
164 
165 /**
166  * enum iwl_tlc_mng_ht_rates - HT/VHT rates
167  * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0
168  * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1
169  * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2
170  * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3
171  * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4
172  * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5
173  * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6
174  * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7
175  * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8
176  * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9
177  * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT
178  */
179 enum iwl_tlc_mng_ht_rates {
180 	IWL_TLC_MNG_HT_RATE_MCS0 = 0,
181 	IWL_TLC_MNG_HT_RATE_MCS1,
182 	IWL_TLC_MNG_HT_RATE_MCS2,
183 	IWL_TLC_MNG_HT_RATE_MCS3,
184 	IWL_TLC_MNG_HT_RATE_MCS4,
185 	IWL_TLC_MNG_HT_RATE_MCS5,
186 	IWL_TLC_MNG_HT_RATE_MCS6,
187 	IWL_TLC_MNG_HT_RATE_MCS7,
188 	IWL_TLC_MNG_HT_RATE_MCS8,
189 	IWL_TLC_MNG_HT_RATE_MCS9,
190 	IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS9,
191 };
192 
193 /* Maximum supported tx antennas number */
194 #define MAX_RS_ANT_NUM 3
195 
196 /**
197  * struct tlc_config_cmd - TLC configuration
198  * @sta_id: station id
199  * @reserved1: reserved
200  * @max_supp_ch_width: channel width
201  * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags
202  * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains
203  * @max_supp_ss: valid values are 0-3, 0 - spatial streams are not supported
204  * @valid_vht_he_types: bitmap of &enum iwl_tlc_mng_vht_he_types
205  * @non_ht_supp_rates: bitmap of supported legacy rates
206  * @ht_supp_rates: bitmap of supported HT/VHT rates, valid bits are 0-9
207  * @mode: &enum iwl_tlc_mng_cfg_mode
208  * @reserved2: reserved
209  * @he_supp_rates: bitmap of supported HE rates
210  * @sgi_ch_width_supp: bitmap of SGI support per channel width
211  * @he_gi_support: 11ax HE guard interval
212  * @max_ampdu_cnt: max AMPDU size (frames count)
213  */
214 struct iwl_tlc_config_cmd {
215 	u8 sta_id;
216 	u8 reserved1[3];
217 	u8 max_supp_ch_width;
218 	u8 chains;
219 	u8 max_supp_ss;
220 	u8 valid_vht_he_types;
221 	__le16 flags;
222 	__le16 non_ht_supp_rates;
223 	__le16 ht_supp_rates[MAX_RS_ANT_NUM];
224 	u8 mode;
225 	u8 reserved2;
226 	__le16 he_supp_rates;
227 	u8 sgi_ch_width_supp;
228 	u8 he_gi_support;
229 	__le32 max_ampdu_cnt;
230 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_1 */
231 
232 #define IWL_TLC_NOTIF_INIT_RATE_POS 0
233 #define IWL_TLC_NOTIF_INIT_RATE_MSK BIT(IWL_TLC_NOTIF_INIT_RATE_POS)
234 #define IWL_TLC_NOTIF_REQ_INTERVAL (500)
235 
236 /**
237  * struct iwl_tlc_notif_req_config_cmd - request notif on specific changes
238  * @sta_id: relevant station
239  * @reserved1: reserved
240  * @flags: bitmap of requested notifications %IWL_TLC_NOTIF_INIT_\*
241  * @interval: minimum time between notifications from TLC to the driver (msec)
242  * @reserved2: reserved
243  */
244 struct iwl_tlc_notif_req_config_cmd {
245 	u8 sta_id;
246 	u8 reserved1;
247 	__le16 flags;
248 	__le16 interval;
249 	__le16 reserved2;
250 } __packed; /* TLC_MNG_NOTIF_REQ_CMD_API_S_VER_1 */
251 
252 /**
253  * struct iwl_tlc_update_notif - TLC notification from FW
254  * @sta_id: station id
255  * @reserved: reserved
256  * @flags: bitmap of notifications reported
257  * @values: field per flag in struct iwl_tlc_notif_req_config_cmd
258  */
259 struct iwl_tlc_update_notif {
260 	u8 sta_id;
261 	u8 reserved;
262 	__le16 flags;
263 	__le32 values[16];
264 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_1 */
265 
266 /**
267  * enum iwl_tlc_debug_flags - debug options
268  * @IWL_TLC_DEBUG_FIXED_RATE: set fixed rate for rate scaling
269  * @IWL_TLC_DEBUG_STATS_TH: threshold for sending statistics to the driver, in
270  *	frames
271  * @IWL_TLC_DEBUG_STATS_TIME_TH: threshold for sending statistics to the
272  *	driver, in msec
273  * @IWL_TLC_DEBUG_AGG_TIME_LIM: time limit for a BA session
274  * @IWL_TLC_DEBUG_AGG_DIS_START_TH: frame with try-count greater than this
275  *	threshold should not start an aggregation session
276  * @IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM: set max number of frames in an aggregation
277  * @IWL_TLC_DEBUG_RENEW_ADDBA_DELAY: delay between retries of ADD BA
278  * @IWL_TLC_DEBUG_START_AC_RATE_IDX: frames per second to start a BA session
279  * @IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK: disable BW scaling
280  */
281 enum iwl_tlc_debug_flags {
282 	IWL_TLC_DEBUG_FIXED_RATE,
283 	IWL_TLC_DEBUG_STATS_TH,
284 	IWL_TLC_DEBUG_STATS_TIME_TH,
285 	IWL_TLC_DEBUG_AGG_TIME_LIM,
286 	IWL_TLC_DEBUG_AGG_DIS_START_TH,
287 	IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM,
288 	IWL_TLC_DEBUG_RENEW_ADDBA_DELAY,
289 	IWL_TLC_DEBUG_START_AC_RATE_IDX,
290 	IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK,
291 }; /* TLC_MNG_DEBUG_FLAGS_API_E_VER_1 */
292 
293 /**
294  * struct iwl_dhc_tlc_dbg - fixed debug config
295  * @sta_id: bit 0 - enable/disable, bits 1 - 7 hold station id
296  * @reserved1: reserved
297  * @flags: bitmap of %IWL_TLC_DEBUG_\*
298  * @fixed_rate: rate value
299  * @stats_threshold: if number of tx-ed frames is greater, send statistics
300  * @time_threshold: statistics threshold in usec
301  * @agg_time_lim: max agg time
302  * @agg_dis_start_threshold: frames with try-cont greater than this count will
303  *			     not be aggregated
304  * @agg_frame_count_lim: agg size
305  * @addba_retry_delay: delay between retries of ADD BA
306  * @start_ac_rate_idx: frames per second to start a BA session
307  * @no_far_range_tweak: disable BW scaling
308  * @reserved2: reserved
309  */
310 struct iwl_dhc_tlc_cmd {
311 	u8 sta_id;
312 	u8 reserved1[3];
313 	__le32 flags;
314 	__le32 fixed_rate;
315 	__le16 stats_threshold;
316 	__le16 time_threshold;
317 	__le16 agg_time_lim;
318 	__le16 agg_dis_start_threshold;
319 	__le16 agg_frame_count_lim;
320 	__le16 addba_retry_delay;
321 	u8 start_ac_rate_idx[IEEE80211_NUM_ACS];
322 	u8 no_far_range_tweak;
323 	u8 reserved2[3];
324 } __packed;
325 
326 /*
327  * These serve as indexes into
328  * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
329  * TODO: avoid overlap between legacy and HT rates
330  */
331 enum {
332 	IWL_RATE_1M_INDEX = 0,
333 	IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
334 	IWL_RATE_2M_INDEX,
335 	IWL_RATE_5M_INDEX,
336 	IWL_RATE_11M_INDEX,
337 	IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
338 	IWL_RATE_6M_INDEX,
339 	IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
340 	IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
341 	IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
342 	IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
343 	IWL_RATE_9M_INDEX,
344 	IWL_RATE_12M_INDEX,
345 	IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
346 	IWL_RATE_18M_INDEX,
347 	IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
348 	IWL_RATE_24M_INDEX,
349 	IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
350 	IWL_RATE_36M_INDEX,
351 	IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
352 	IWL_RATE_48M_INDEX,
353 	IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
354 	IWL_RATE_54M_INDEX,
355 	IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
356 	IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
357 	IWL_RATE_60M_INDEX,
358 	IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
359 	IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
360 	IWL_RATE_MCS_8_INDEX,
361 	IWL_RATE_MCS_9_INDEX,
362 	IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
363 	IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
364 	IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1,
365 };
366 
367 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
368 
369 /* fw API values for legacy bit rates, both OFDM and CCK */
370 enum {
371 	IWL_RATE_6M_PLCP  = 13,
372 	IWL_RATE_9M_PLCP  = 15,
373 	IWL_RATE_12M_PLCP = 5,
374 	IWL_RATE_18M_PLCP = 7,
375 	IWL_RATE_24M_PLCP = 9,
376 	IWL_RATE_36M_PLCP = 11,
377 	IWL_RATE_48M_PLCP = 1,
378 	IWL_RATE_54M_PLCP = 3,
379 	IWL_RATE_1M_PLCP  = 10,
380 	IWL_RATE_2M_PLCP  = 20,
381 	IWL_RATE_5M_PLCP  = 55,
382 	IWL_RATE_11M_PLCP = 110,
383 	IWL_RATE_INVM_PLCP = -1,
384 };
385 
386 /*
387  * rate_n_flags bit fields
388  *
389  * The 32-bit value has different layouts in the low 8 bites depending on the
390  * format. There are three formats, HT, VHT and legacy (11abg, with subformats
391  * for CCK and OFDM).
392  *
393  * High-throughput (HT) rate format
394  *	bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
395  * Very High-throughput (VHT) rate format
396  *	bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
397  * Legacy OFDM rate format for bits 7:0
398  *	bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
399  * Legacy CCK rate format for bits 7:0:
400  *	bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
401  */
402 
403 /* Bit 8: (1) HT format, (0) legacy or VHT format */
404 #define RATE_MCS_HT_POS 8
405 #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
406 
407 /* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
408 #define RATE_MCS_CCK_POS 9
409 #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
410 
411 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
412 #define RATE_MCS_VHT_POS 26
413 #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
414 
415 
416 /*
417  * High-throughput (HT) rate format for bits 7:0
418  *
419  *  2-0:  MCS rate base
420  *        0)   6 Mbps
421  *        1)  12 Mbps
422  *        2)  18 Mbps
423  *        3)  24 Mbps
424  *        4)  36 Mbps
425  *        5)  48 Mbps
426  *        6)  54 Mbps
427  *        7)  60 Mbps
428  *  4-3:  0)  Single stream (SISO)
429  *        1)  Dual stream (MIMO)
430  *        2)  Triple stream (MIMO)
431  *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
432  *  (bits 7-6 are zero)
433  *
434  * Together the low 5 bits work out to the MCS index because we don't
435  * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
436  * streams and 16-23 have three streams. We could also support MCS 32
437  * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
438  */
439 #define RATE_HT_MCS_RATE_CODE_MSK	0x7
440 #define RATE_HT_MCS_NSS_POS             3
441 #define RATE_HT_MCS_NSS_MSK             (3 << RATE_HT_MCS_NSS_POS)
442 
443 /* Bit 10: (1) Use Green Field preamble */
444 #define RATE_HT_MCS_GF_POS		10
445 #define RATE_HT_MCS_GF_MSK		(1 << RATE_HT_MCS_GF_POS)
446 
447 #define RATE_HT_MCS_INDEX_MSK		0x3f
448 
449 /*
450  * Very High-throughput (VHT) rate format for bits 7:0
451  *
452  *  3-0:  VHT MCS (0-9)
453  *  5-4:  number of streams - 1:
454  *        0)  Single stream (SISO)
455  *        1)  Dual stream (MIMO)
456  *        2)  Triple stream (MIMO)
457  */
458 
459 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
460 #define RATE_VHT_MCS_RATE_CODE_MSK	0xf
461 #define RATE_VHT_MCS_NSS_POS		4
462 #define RATE_VHT_MCS_NSS_MSK		(3 << RATE_VHT_MCS_NSS_POS)
463 
464 /*
465  * Legacy OFDM rate format for bits 7:0
466  *
467  *  3-0:  0xD)   6 Mbps
468  *        0xF)   9 Mbps
469  *        0x5)  12 Mbps
470  *        0x7)  18 Mbps
471  *        0x9)  24 Mbps
472  *        0xB)  36 Mbps
473  *        0x1)  48 Mbps
474  *        0x3)  54 Mbps
475  * (bits 7-4 are 0)
476  *
477  * Legacy CCK rate format for bits 7:0:
478  * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
479  *
480  *  6-0:   10)  1 Mbps
481  *         20)  2 Mbps
482  *         55)  5.5 Mbps
483  *        110)  11 Mbps
484  * (bit 7 is 0)
485  */
486 #define RATE_LEGACY_RATE_MSK 0xff
487 
488 /* Bit 10 - OFDM HE */
489 #define RATE_MCS_OFDM_HE_POS		10
490 #define RATE_MCS_OFDM_HE_MSK		BIT(RATE_MCS_OFDM_HE_POS)
491 
492 /*
493  * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
494  * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
495  */
496 #define RATE_MCS_CHAN_WIDTH_POS		11
497 #define RATE_MCS_CHAN_WIDTH_MSK		(3 << RATE_MCS_CHAN_WIDTH_POS)
498 #define RATE_MCS_CHAN_WIDTH_20		(0 << RATE_MCS_CHAN_WIDTH_POS)
499 #define RATE_MCS_CHAN_WIDTH_40		(1 << RATE_MCS_CHAN_WIDTH_POS)
500 #define RATE_MCS_CHAN_WIDTH_80		(2 << RATE_MCS_CHAN_WIDTH_POS)
501 #define RATE_MCS_CHAN_WIDTH_160		(3 << RATE_MCS_CHAN_WIDTH_POS)
502 
503 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
504 #define RATE_MCS_SGI_POS		13
505 #define RATE_MCS_SGI_MSK		(1 << RATE_MCS_SGI_POS)
506 
507 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
508 #define RATE_MCS_ANT_POS		14
509 #define RATE_MCS_ANT_A_MSK		(1 << RATE_MCS_ANT_POS)
510 #define RATE_MCS_ANT_B_MSK		(2 << RATE_MCS_ANT_POS)
511 #define RATE_MCS_ANT_C_MSK		(4 << RATE_MCS_ANT_POS)
512 #define RATE_MCS_ANT_AB_MSK		(RATE_MCS_ANT_A_MSK | \
513 					 RATE_MCS_ANT_B_MSK)
514 #define RATE_MCS_ANT_ABC_MSK		(RATE_MCS_ANT_AB_MSK | \
515 					 RATE_MCS_ANT_C_MSK)
516 #define RATE_MCS_ANT_MSK		RATE_MCS_ANT_ABC_MSK
517 
518 /* Bit 17: (0) SS, (1) SS*2 */
519 #define RATE_MCS_STBC_POS		17
520 #define RATE_MCS_STBC_MSK		BIT(RATE_MCS_STBC_POS)
521 
522 /* Bit 18: OFDM-HE dual carrier mode */
523 #define RATE_HE_DUAL_CARRIER_MODE	18
524 #define RATE_HE_DUAL_CARRIER_MODE_MSK	BIT(RATE_HE_DUAL_CARRIER_MODE)
525 
526 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
527 #define RATE_MCS_BF_POS			19
528 #define RATE_MCS_BF_MSK			(1 << RATE_MCS_BF_POS)
529 
530 /*
531  * Bit 20-21: HE guard interval and LTF type.
532  * (0) 1xLTF+1.6us, (1) 2xLTF+0.8us,
533  * (2) 2xLTF+1.6us, (3) 4xLTF+3.2us
534  */
535 #define RATE_MCS_HE_GI_LTF_POS		20
536 #define RATE_MCS_HE_GI_LTF_MSK		(3 << RATE_MCS_HE_GI_LTF_POS)
537 
538 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */
539 #define RATE_MCS_HE_TYPE_POS		22
540 #define RATE_MCS_HE_TYPE_MSK		(3 << RATE_MCS_HE_TYPE_POS)
541 
542 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
543 #define RATE_MCS_DUP_POS		24
544 #define RATE_MCS_DUP_MSK		(3 << RATE_MCS_DUP_POS)
545 
546 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
547 #define RATE_MCS_LDPC_POS		27
548 #define RATE_MCS_LDPC_MSK		(1 << RATE_MCS_LDPC_POS)
549 
550 
551 /* Link Quality definitions */
552 
553 /* # entries in rate scale table to support Tx retries */
554 #define  LQ_MAX_RETRY_NUM 16
555 
556 /* Link quality command flags bit fields */
557 
558 /* Bit 0: (0) Don't use RTS (1) Use RTS */
559 #define LQ_FLAG_USE_RTS_POS             0
560 #define LQ_FLAG_USE_RTS_MSK	        (1 << LQ_FLAG_USE_RTS_POS)
561 
562 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */
563 #define LQ_FLAG_COLOR_POS               1
564 #define LQ_FLAG_COLOR_MSK               (7 << LQ_FLAG_COLOR_POS)
565 #define LQ_FLAG_COLOR_GET(_f)		(((_f) & LQ_FLAG_COLOR_MSK) >>\
566 					 LQ_FLAG_COLOR_POS)
567 #define LQ_FLAGS_COLOR_INC(_c)		((((_c) + 1) << LQ_FLAG_COLOR_POS) &\
568 					 LQ_FLAG_COLOR_MSK)
569 #define LQ_FLAG_COLOR_SET(_f, _c)	((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK))
570 
571 /* Bit 4-5: Tx RTS BW Signalling
572  * (0) No RTS BW signalling
573  * (1) Static BW signalling
574  * (2) Dynamic BW signalling
575  */
576 #define LQ_FLAG_RTS_BW_SIG_POS          4
577 #define LQ_FLAG_RTS_BW_SIG_NONE         (0 << LQ_FLAG_RTS_BW_SIG_POS)
578 #define LQ_FLAG_RTS_BW_SIG_STATIC       (1 << LQ_FLAG_RTS_BW_SIG_POS)
579 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC      (2 << LQ_FLAG_RTS_BW_SIG_POS)
580 
581 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
582  * Dyanmic BW selection allows Tx with narrower BW then requested in rates
583  */
584 #define LQ_FLAG_DYNAMIC_BW_POS          6
585 #define LQ_FLAG_DYNAMIC_BW_MSK          (1 << LQ_FLAG_DYNAMIC_BW_POS)
586 
587 /* Single Stream Tx Parameters (lq_cmd->ss_params)
588  * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
589  * used for single stream Tx.
590  */
591 
592 /* Bit 0-1: Max STBC streams allowed. Can be 0-3.
593  * (0) - No STBC allowed
594  * (1) - 2x1 STBC allowed (HT/VHT)
595  * (2) - 4x2 STBC allowed (HT/VHT)
596  * (3) - 3x2 STBC allowed (HT only)
597  * All our chips are at most 2 antennas so only (1) is valid for now.
598  */
599 #define LQ_SS_STBC_ALLOWED_POS          0
600 #define LQ_SS_STBC_ALLOWED_MSK		(3 << LQ_SS_STBC_ALLOWED_MSK)
601 
602 /* 2x1 STBC is allowed */
603 #define LQ_SS_STBC_1SS_ALLOWED		(1 << LQ_SS_STBC_ALLOWED_POS)
604 
605 /* Bit 2: Beamformer (VHT only) is allowed */
606 #define LQ_SS_BFER_ALLOWED_POS		2
607 #define LQ_SS_BFER_ALLOWED		(1 << LQ_SS_BFER_ALLOWED_POS)
608 
609 /* Bit 3: Force BFER or STBC for testing
610  * If this is set:
611  * If BFER is allowed then force the ucode to choose BFER else
612  * If STBC is allowed then force the ucode to choose STBC over SISO
613  */
614 #define LQ_SS_FORCE_POS			3
615 #define LQ_SS_FORCE			(1 << LQ_SS_FORCE_POS)
616 
617 /* Bit 31: ss_params field is valid. Used for FW backward compatibility
618  * with other drivers which don't support the ss_params API yet
619  */
620 #define LQ_SS_PARAMS_VALID_POS		31
621 #define LQ_SS_PARAMS_VALID		(1 << LQ_SS_PARAMS_VALID_POS)
622 
623 /**
624  * struct iwl_lq_cmd - link quality command
625  * @sta_id: station to update
626  * @reduced_tpc: reduced transmit power control value
627  * @control: not used
628  * @flags: combination of LQ_FLAG_*
629  * @mimo_delim: the first SISO index in rs_table, which separates MIMO
630  *	and SISO rates
631  * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
632  *	Should be ANT_[ABC]
633  * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
634  * @initial_rate_index: first index from rs_table per AC category
635  * @agg_time_limit: aggregation max time threshold in usec/100, meaning
636  *	value of 100 is one usec. Range is 100 to 8000
637  * @agg_disable_start_th: try-count threshold for starting aggregation.
638  *	If a frame has higher try-count, it should not be selected for
639  *	starting an aggregation sequence.
640  * @agg_frame_cnt_limit: max frame count in an aggregation.
641  *	0: no limit
642  *	1: no aggregation (one frame per aggregation)
643  *	2 - 0x3f: maximal number of frames (up to 3f == 63)
644  * @reserved2: reserved
645  * @rs_table: array of rates for each TX try, each is rate_n_flags,
646  *	meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
647  * @ss_params: single stream features. declare whether STBC or BFER are allowed.
648  */
649 struct iwl_lq_cmd {
650 	u8 sta_id;
651 	u8 reduced_tpc;
652 	__le16 control;
653 	/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
654 	u8 flags;
655 	u8 mimo_delim;
656 	u8 single_stream_ant_msk;
657 	u8 dual_stream_ant_msk;
658 	u8 initial_rate_index[AC_NUM];
659 	/* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
660 	__le16 agg_time_limit;
661 	u8 agg_disable_start_th;
662 	u8 agg_frame_cnt_limit;
663 	__le32 reserved2;
664 	__le32 rs_table[LQ_MAX_RETRY_NUM];
665 	__le32 ss_params;
666 }; /* LINK_QUALITY_CMD_API_S_VER_1 */
667 
668 #endif /* __iwl_fw_api_rs_h__ */
669