1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 9 * Copyright(c) 2017 Intel Deutschland GmbH 10 * Copyright(c) 2018 Intel Corporation 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of version 2 of the GNU General Public License as 14 * published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <linuxwifi@intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 * BSD LICENSE 29 * 30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. 31 * Copyright(c) 2017 Intel Deutschland GmbH 32 * Copyright(c) 2018 Intel Corporation 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 39 * * Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * * Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * * Neither the name Intel Corporation nor the names of its 46 * contributors may be used to endorse or promote products derived 47 * from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 *****************************************************************************/ 61 62 #ifndef __iwl_fw_api_rs_h__ 63 #define __iwl_fw_api_rs_h__ 64 65 #include "mac.h" 66 67 /** 68 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 69 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for 70 * bandwidths <= 80MHz 71 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 72 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz 73 * bandwidth 74 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation 75 * for BPSK (MCS 0) with 1 spatial 76 * stream 77 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation 78 * for BPSK (MCS 0) with 2 spatial 79 * streams 80 */ 81 enum iwl_tlc_mng_cfg_flags { 82 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 83 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 84 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2), 85 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3), 86 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4), 87 }; 88 89 /** 90 * enum iwl_tlc_mng_cfg_cw - channel width options 91 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 92 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 93 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 94 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 95 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 96 */ 97 enum iwl_tlc_mng_cfg_cw { 98 IWL_TLC_MNG_CH_WIDTH_20MHZ, 99 IWL_TLC_MNG_CH_WIDTH_40MHZ, 100 IWL_TLC_MNG_CH_WIDTH_80MHZ, 101 IWL_TLC_MNG_CH_WIDTH_160MHZ, 102 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 103 }; 104 105 /** 106 * enum iwl_tlc_mng_cfg_chains - possible chains 107 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 108 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 109 */ 110 enum iwl_tlc_mng_cfg_chains { 111 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 112 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 113 }; 114 115 /** 116 * enum iwl_tlc_mng_cfg_mode - supported modes 117 * @IWL_TLC_MNG_MODE_CCK: enable CCK 118 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 119 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 120 * @IWL_TLC_MNG_MODE_HT: enable HT 121 * @IWL_TLC_MNG_MODE_VHT: enable VHT 122 * @IWL_TLC_MNG_MODE_HE: enable HE 123 * @IWL_TLC_MNG_MODE_INVALID: invalid value 124 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 125 */ 126 enum iwl_tlc_mng_cfg_mode { 127 IWL_TLC_MNG_MODE_CCK = 0, 128 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 129 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 130 IWL_TLC_MNG_MODE_HT, 131 IWL_TLC_MNG_MODE_VHT, 132 IWL_TLC_MNG_MODE_HE, 133 IWL_TLC_MNG_MODE_INVALID, 134 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 135 }; 136 137 /** 138 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 139 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 140 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 141 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 142 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 143 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 144 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 145 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 146 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 147 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 148 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 149 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 150 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 151 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 152 */ 153 enum iwl_tlc_mng_ht_rates { 154 IWL_TLC_MNG_HT_RATE_MCS0 = 0, 155 IWL_TLC_MNG_HT_RATE_MCS1, 156 IWL_TLC_MNG_HT_RATE_MCS2, 157 IWL_TLC_MNG_HT_RATE_MCS3, 158 IWL_TLC_MNG_HT_RATE_MCS4, 159 IWL_TLC_MNG_HT_RATE_MCS5, 160 IWL_TLC_MNG_HT_RATE_MCS6, 161 IWL_TLC_MNG_HT_RATE_MCS7, 162 IWL_TLC_MNG_HT_RATE_MCS8, 163 IWL_TLC_MNG_HT_RATE_MCS9, 164 IWL_TLC_MNG_HT_RATE_MCS10, 165 IWL_TLC_MNG_HT_RATE_MCS11, 166 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 167 }; 168 169 /* Maximum supported tx antennas number */ 170 #define MAX_NSS 2 171 172 /** 173 * struct tlc_config_cmd - TLC configuration 174 * @sta_id: station id 175 * @reserved1: reserved 176 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 177 * @mode: &enum iwl_tlc_mng_cfg_mode 178 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 179 * @amsdu: TX amsdu is supported 180 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 181 * @non_ht_rates: bitmap of supported legacy rates 182 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 183 * pair (0 - 80mhz width and below, 1 - 160mhz). 184 * @max_mpdu_len: max MPDU length, in bytes 185 * @sgi_ch_width_supp: bitmap of SGI support per channel width 186 * use BIT(@enum iwl_tlc_mng_cfg_cw) 187 * @reserved2: reserved 188 */ 189 struct iwl_tlc_config_cmd { 190 u8 sta_id; 191 u8 reserved1[3]; 192 u8 max_ch_width; 193 u8 mode; 194 u8 chains; 195 u8 amsdu; 196 __le16 flags; 197 __le16 non_ht_rates; 198 __le16 ht_rates[MAX_NSS][2]; 199 __le16 max_mpdu_len; 200 u8 sgi_ch_width_supp; 201 u8 reserved2[1]; 202 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */ 203 204 /** 205 * enum iwl_tlc_update_flags - updated fields 206 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 207 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 208 */ 209 enum iwl_tlc_update_flags { 210 IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 211 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 212 }; 213 214 /** 215 * struct iwl_tlc_update_notif - TLC notification from FW 216 * @sta_id: station id 217 * @reserved: reserved 218 * @flags: bitmap of notifications reported 219 * @rate: current initial rate 220 * @amsdu_size: Max AMSDU size, in bytes 221 * @amsdu_enabled: bitmap for per-TID AMSDU enablement 222 */ 223 struct iwl_tlc_update_notif { 224 u8 sta_id; 225 u8 reserved[3]; 226 __le32 flags; 227 __le32 rate; 228 __le32 amsdu_size; 229 __le32 amsdu_enabled; 230 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 231 232 /* 233 * These serve as indexes into 234 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 235 * TODO: avoid overlap between legacy and HT rates 236 */ 237 enum { 238 IWL_RATE_1M_INDEX = 0, 239 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 240 IWL_RATE_2M_INDEX, 241 IWL_RATE_5M_INDEX, 242 IWL_RATE_11M_INDEX, 243 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 244 IWL_RATE_6M_INDEX, 245 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 246 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 247 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 248 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 249 IWL_RATE_9M_INDEX, 250 IWL_RATE_12M_INDEX, 251 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 252 IWL_RATE_18M_INDEX, 253 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 254 IWL_RATE_24M_INDEX, 255 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 256 IWL_RATE_36M_INDEX, 257 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 258 IWL_RATE_48M_INDEX, 259 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 260 IWL_RATE_54M_INDEX, 261 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 262 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 263 IWL_RATE_60M_INDEX, 264 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 265 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 266 IWL_RATE_MCS_8_INDEX, 267 IWL_RATE_MCS_9_INDEX, 268 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 269 IWL_RATE_MCS_10_INDEX, 270 IWL_RATE_MCS_11_INDEX, 271 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, 272 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 273 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, 274 }; 275 276 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 277 278 /* fw API values for legacy bit rates, both OFDM and CCK */ 279 enum { 280 IWL_RATE_6M_PLCP = 13, 281 IWL_RATE_9M_PLCP = 15, 282 IWL_RATE_12M_PLCP = 5, 283 IWL_RATE_18M_PLCP = 7, 284 IWL_RATE_24M_PLCP = 9, 285 IWL_RATE_36M_PLCP = 11, 286 IWL_RATE_48M_PLCP = 1, 287 IWL_RATE_54M_PLCP = 3, 288 IWL_RATE_1M_PLCP = 10, 289 IWL_RATE_2M_PLCP = 20, 290 IWL_RATE_5M_PLCP = 55, 291 IWL_RATE_11M_PLCP = 110, 292 IWL_RATE_INVM_PLCP = -1, 293 }; 294 295 /* 296 * rate_n_flags bit fields 297 * 298 * The 32-bit value has different layouts in the low 8 bites depending on the 299 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 300 * for CCK and OFDM). 301 * 302 * High-throughput (HT) rate format 303 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 304 * Very High-throughput (VHT) rate format 305 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 306 * Legacy OFDM rate format for bits 7:0 307 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 308 * Legacy CCK rate format for bits 7:0: 309 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 310 */ 311 312 /* Bit 8: (1) HT format, (0) legacy or VHT format */ 313 #define RATE_MCS_HT_POS 8 314 #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS) 315 316 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 317 #define RATE_MCS_CCK_POS 9 318 #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS) 319 320 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 321 #define RATE_MCS_VHT_POS 26 322 #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS) 323 324 325 /* 326 * High-throughput (HT) rate format for bits 7:0 327 * 328 * 2-0: MCS rate base 329 * 0) 6 Mbps 330 * 1) 12 Mbps 331 * 2) 18 Mbps 332 * 3) 24 Mbps 333 * 4) 36 Mbps 334 * 5) 48 Mbps 335 * 6) 54 Mbps 336 * 7) 60 Mbps 337 * 4-3: 0) Single stream (SISO) 338 * 1) Dual stream (MIMO) 339 * 2) Triple stream (MIMO) 340 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 341 * (bits 7-6 are zero) 342 * 343 * Together the low 5 bits work out to the MCS index because we don't 344 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 345 * streams and 16-23 have three streams. We could also support MCS 32 346 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 347 */ 348 #define RATE_HT_MCS_RATE_CODE_MSK 0x7 349 #define RATE_HT_MCS_NSS_POS 3 350 #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS) 351 352 /* Bit 10: (1) Use Green Field preamble */ 353 #define RATE_HT_MCS_GF_POS 10 354 #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 355 356 #define RATE_HT_MCS_INDEX_MSK 0x3f 357 358 /* 359 * Very High-throughput (VHT) rate format for bits 7:0 360 * 361 * 3-0: VHT MCS (0-9) 362 * 5-4: number of streams - 1: 363 * 0) Single stream (SISO) 364 * 1) Dual stream (MIMO) 365 * 2) Triple stream (MIMO) 366 */ 367 368 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 369 #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 370 #define RATE_VHT_MCS_NSS_POS 4 371 #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 372 373 /* 374 * Legacy OFDM rate format for bits 7:0 375 * 376 * 3-0: 0xD) 6 Mbps 377 * 0xF) 9 Mbps 378 * 0x5) 12 Mbps 379 * 0x7) 18 Mbps 380 * 0x9) 24 Mbps 381 * 0xB) 36 Mbps 382 * 0x1) 48 Mbps 383 * 0x3) 54 Mbps 384 * (bits 7-4 are 0) 385 * 386 * Legacy CCK rate format for bits 7:0: 387 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 388 * 389 * 6-0: 10) 1 Mbps 390 * 20) 2 Mbps 391 * 55) 5.5 Mbps 392 * 110) 11 Mbps 393 * (bit 7 is 0) 394 */ 395 #define RATE_LEGACY_RATE_MSK 0xff 396 397 /* Bit 10 - OFDM HE */ 398 #define RATE_MCS_HE_POS 10 399 #define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS) 400 401 /* 402 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 403 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 404 */ 405 #define RATE_MCS_CHAN_WIDTH_POS 11 406 #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS) 407 #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 408 #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 409 #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 410 #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 411 412 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 413 #define RATE_MCS_SGI_POS 13 414 #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 415 416 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 417 #define RATE_MCS_ANT_POS 14 418 #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 419 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 420 #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS) 421 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 422 RATE_MCS_ANT_B_MSK) 423 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \ 424 RATE_MCS_ANT_C_MSK) 425 #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK 426 427 /* Bit 17: (0) SS, (1) SS*2 */ 428 #define RATE_MCS_STBC_POS 17 429 #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 430 431 /* Bit 18: OFDM-HE dual carrier mode */ 432 #define RATE_HE_DUAL_CARRIER_MODE 18 433 #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 434 435 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 436 #define RATE_MCS_BF_POS 19 437 #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 438 439 /* 440 * Bit 20-21: HE LTF type and guard interval 441 * HE (ext) SU: 442 * 0 1xLTF+0.8us 443 * 1 2xLTF+0.8us 444 * 2 2xLTF+1.6us 445 * 3 & SGI (bit 13) clear 4xLTF+3.2us 446 * 3 & SGI (bit 13) set 4xLTF+0.8us 447 * HE MU: 448 * 0 4xLTF+0.8us 449 * 1 2xLTF+0.8us 450 * 2 2xLTF+1.6us 451 * 3 4xLTF+3.2us 452 * HE TRIG: 453 * 0 1xLTF+1.6us 454 * 1 2xLTF+1.6us 455 * 2 4xLTF+3.2us 456 * 3 (does not occur) 457 */ 458 #define RATE_MCS_HE_GI_LTF_POS 20 459 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) 460 461 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 462 #define RATE_MCS_HE_TYPE_POS 22 463 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) 464 #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) 465 #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) 466 #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) 467 #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 468 469 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 470 #define RATE_MCS_DUP_POS 24 471 #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS) 472 473 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 474 #define RATE_MCS_LDPC_POS 27 475 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 476 477 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 478 #define RATE_MCS_HE_106T_POS 28 479 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) 480 481 /* Link Quality definitions */ 482 483 /* # entries in rate scale table to support Tx retries */ 484 #define LQ_MAX_RETRY_NUM 16 485 486 /* Link quality command flags bit fields */ 487 488 /* Bit 0: (0) Don't use RTS (1) Use RTS */ 489 #define LQ_FLAG_USE_RTS_POS 0 490 #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 491 492 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 493 #define LQ_FLAG_COLOR_POS 1 494 #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 495 #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 496 LQ_FLAG_COLOR_POS) 497 #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 498 LQ_FLAG_COLOR_MSK) 499 #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 500 501 /* Bit 4-5: Tx RTS BW Signalling 502 * (0) No RTS BW signalling 503 * (1) Static BW signalling 504 * (2) Dynamic BW signalling 505 */ 506 #define LQ_FLAG_RTS_BW_SIG_POS 4 507 #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 508 #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 509 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 510 511 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 512 * Dyanmic BW selection allows Tx with narrower BW then requested in rates 513 */ 514 #define LQ_FLAG_DYNAMIC_BW_POS 6 515 #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 516 517 /* Single Stream Tx Parameters (lq_cmd->ss_params) 518 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 519 * used for single stream Tx. 520 */ 521 522 /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 523 * (0) - No STBC allowed 524 * (1) - 2x1 STBC allowed (HT/VHT) 525 * (2) - 4x2 STBC allowed (HT/VHT) 526 * (3) - 3x2 STBC allowed (HT only) 527 * All our chips are at most 2 antennas so only (1) is valid for now. 528 */ 529 #define LQ_SS_STBC_ALLOWED_POS 0 530 #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 531 532 /* 2x1 STBC is allowed */ 533 #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 534 535 /* Bit 2: Beamformer (VHT only) is allowed */ 536 #define LQ_SS_BFER_ALLOWED_POS 2 537 #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 538 539 /* Bit 3: Force BFER or STBC for testing 540 * If this is set: 541 * If BFER is allowed then force the ucode to choose BFER else 542 * If STBC is allowed then force the ucode to choose STBC over SISO 543 */ 544 #define LQ_SS_FORCE_POS 3 545 #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 546 547 /* Bit 31: ss_params field is valid. Used for FW backward compatibility 548 * with other drivers which don't support the ss_params API yet 549 */ 550 #define LQ_SS_PARAMS_VALID_POS 31 551 #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 552 553 /** 554 * struct iwl_lq_cmd - link quality command 555 * @sta_id: station to update 556 * @reduced_tpc: reduced transmit power control value 557 * @control: not used 558 * @flags: combination of LQ_FLAG_* 559 * @mimo_delim: the first SISO index in rs_table, which separates MIMO 560 * and SISO rates 561 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 562 * Should be ANT_[ABC] 563 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 564 * @initial_rate_index: first index from rs_table per AC category 565 * @agg_time_limit: aggregation max time threshold in usec/100, meaning 566 * value of 100 is one usec. Range is 100 to 8000 567 * @agg_disable_start_th: try-count threshold for starting aggregation. 568 * If a frame has higher try-count, it should not be selected for 569 * starting an aggregation sequence. 570 * @agg_frame_cnt_limit: max frame count in an aggregation. 571 * 0: no limit 572 * 1: no aggregation (one frame per aggregation) 573 * 2 - 0x3f: maximal number of frames (up to 3f == 63) 574 * @reserved2: reserved 575 * @rs_table: array of rates for each TX try, each is rate_n_flags, 576 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 577 * @ss_params: single stream features. declare whether STBC or BFER are allowed. 578 */ 579 struct iwl_lq_cmd { 580 u8 sta_id; 581 u8 reduced_tpc; 582 __le16 control; 583 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 584 u8 flags; 585 u8 mimo_delim; 586 u8 single_stream_ant_msk; 587 u8 dual_stream_ant_msk; 588 u8 initial_rate_index[AC_NUM]; 589 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 590 __le16 agg_time_limit; 591 u8 agg_disable_start_th; 592 u8 agg_frame_cnt_limit; 593 __le32 reserved2; 594 __le32 rs_table[LQ_MAX_RETRY_NUM]; 595 __le32 ss_params; 596 }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 597 598 #endif /* __iwl_fw_api_rs_h__ */ 599