18e99ea8dSJohannes Berg /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 28e99ea8dSJohannes Berg /* 3a451b823SMukesh Sisodiya * Copyright (C) 2018-2021 Intel Corporation 48e99ea8dSJohannes Berg */ 5bd294466SSara Sharon #ifndef __iwl_fw_dbg_tlv_h__ 6bd294466SSara Sharon #define __iwl_fw_dbg_tlv_h__ 7bd294466SSara Sharon 8bd294466SSara Sharon #include <linux/bitops.h> 9bd294466SSara Sharon 10*fdb70083SJohannes Berg #define IWL_FW_INI_HW_SMEM_REGION_ID 15 11b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_REGION_ID 64 12b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_NAME 32 13677d25b2SShahar S Matityahu #define IWL_FW_INI_MAX_CFG_NAME 64 14cf29c5b6SShahar S Matityahu #define IWL_FW_INI_DOMAIN_ALWAYS_ON 0 15a451b823SMukesh Sisodiya #define IWL_FW_INI_REGION_V2_MASK 0x0000FFFF 16fe63f21bSShahar S Matityahu 17fe63f21bSShahar S Matityahu /** 18fe63f21bSShahar S Matityahu * struct iwl_fw_ini_hcmd 19bd294466SSara Sharon * 20bd294466SSara Sharon * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC 21bd294466SSara Sharon * @group: the desired cmd group 22fe63f21bSShahar S Matityahu * @reserved: to align to FW struct 23fe63f21bSShahar S Matityahu * @data: all of the relevant command data to be sent 24bd294466SSara Sharon */ 25bd294466SSara Sharon struct iwl_fw_ini_hcmd { 26bd294466SSara Sharon u8 id; 27bd294466SSara Sharon u8 group; 28fe63f21bSShahar S Matityahu __le16 reserved; 29bd294466SSara Sharon u8 data[0]; 30fe63f21bSShahar S Matityahu } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */ 31bd294466SSara Sharon 32bd294466SSara Sharon /** 33a9248de4SShahar S Matityahu * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures 34fe63f21bSShahar S Matityahu * 35a9248de4SShahar S Matityahu * @version: TLV version 36a9248de4SShahar S Matityahu * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain 37bd294466SSara Sharon */ 38a9248de4SShahar S Matityahu struct iwl_fw_ini_header { 39a9248de4SShahar S Matityahu __le32 version; 40fe63f21bSShahar S Matityahu __le32 domain; 41394f4192SJohannes Berg /* followed by the data */ 42a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */ 43bd294466SSara Sharon 44bd294466SSara Sharon /** 45c9fe75e9SShahar S Matityahu * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses 46fe63f21bSShahar S Matityahu * 47c9fe75e9SShahar S Matityahu * @size: size of each memory chunk 48c9fe75e9SShahar S Matityahu * @offset: offset to add to the base address of each chunk 49c9fe75e9SShahar S Matityahu */ 50c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_dev_addr { 51c9fe75e9SShahar S Matityahu __le32 size; 52c9fe75e9SShahar S Matityahu __le32 offset; 53c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */ 54c9fe75e9SShahar S Matityahu 55c9fe75e9SShahar S Matityahu /** 56c9fe75e9SShahar S Matityahu * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos 57c9fe75e9SShahar S Matityahu * 58c9fe75e9SShahar S Matityahu * @fid: fifos ids array. Used to determine what fifos to collect 59c9fe75e9SShahar S Matityahu * @hdr_only: if non zero, collect only the registers 60c9fe75e9SShahar S Matityahu * @offset: offset to add to the registers addresses 61c9fe75e9SShahar S Matityahu */ 62c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_fifos { 63c9fe75e9SShahar S Matityahu __le32 fid[2]; 64c9fe75e9SShahar S Matityahu __le32 hdr_only; 65c9fe75e9SShahar S Matityahu __le32 offset; 66c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */ 67c9fe75e9SShahar S Matityahu 68c9fe75e9SShahar S Matityahu /** 69c9fe75e9SShahar S Matityahu * struct iwl_fw_ini_region_err_table - error table region data 70c9fe75e9SShahar S Matityahu * 71c9fe75e9SShahar S Matityahu * Configuration to read Umac/Lmac error table 72c9fe75e9SShahar S Matityahu * 73c9fe75e9SShahar S Matityahu * @version: version of the error table 74c9fe75e9SShahar S Matityahu * @base_addr: base address of the error table 75c9fe75e9SShahar S Matityahu * @size: size of the error table 76c9fe75e9SShahar S Matityahu * @offset: offset to add to &base_addr 77c9fe75e9SShahar S Matityahu */ 78c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_err_table { 79c9fe75e9SShahar S Matityahu __le32 version; 80c9fe75e9SShahar S Matityahu __le32 base_addr; 81c9fe75e9SShahar S Matityahu __le32 size; 82c9fe75e9SShahar S Matityahu __le32 offset; 83c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */ 84c9fe75e9SShahar S Matityahu 85c9fe75e9SShahar S Matityahu /** 86ba8f6f4aSMordechay Goodstein * struct iwl_fw_ini_region_special_device_memory - special device memory 87ba8f6f4aSMordechay Goodstein * 88ba8f6f4aSMordechay Goodstein * Configuration to read a special memory 89ba8f6f4aSMordechay Goodstein * 90ba8f6f4aSMordechay Goodstein * @type: type of the special memory 91ba8f6f4aSMordechay Goodstein * @version: version of the special memory 92ba8f6f4aSMordechay Goodstein * @base_addr: base address of the error table 93ba8f6f4aSMordechay Goodstein * @size: size of the error table 94ba8f6f4aSMordechay Goodstein * @offset: offset to add to &base_addr 95ba8f6f4aSMordechay Goodstein */ 96ba8f6f4aSMordechay Goodstein struct iwl_fw_ini_region_special_device_memory { 97ba8f6f4aSMordechay Goodstein __le16 type; 98ba8f6f4aSMordechay Goodstein __le16 version; 99ba8f6f4aSMordechay Goodstein __le32 base_addr; 100ba8f6f4aSMordechay Goodstein __le32 size; 101ba8f6f4aSMordechay Goodstein __le32 offset; 102ba8f6f4aSMordechay Goodstein } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */ 103ba8f6f4aSMordechay Goodstein 104ba8f6f4aSMordechay Goodstein /** 105c9fe75e9SShahar S Matityahu * struct iwl_fw_ini_region_internal_buffer - internal buffer region data 106c9fe75e9SShahar S Matityahu * 107c9fe75e9SShahar S Matityahu * Configuration to read internal monitor buffer 108c9fe75e9SShahar S Matityahu * 109c9fe75e9SShahar S Matityahu * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id 110c9fe75e9SShahar S Matityahu * @base_addr: internal buffer base address 111c9fe75e9SShahar S Matityahu * @size: size internal buffer size 112c9fe75e9SShahar S Matityahu */ 113c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_internal_buffer { 114c9fe75e9SShahar S Matityahu __le32 alloc_id; 115c9fe75e9SShahar S Matityahu __le32 base_addr; 116c9fe75e9SShahar S Matityahu __le32 size; 117c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */ 118c9fe75e9SShahar S Matityahu 119c9fe75e9SShahar S Matityahu /** 120c9fe75e9SShahar S Matityahu * struct iwl_fw_ini_region_tlv - region TLV 121c9fe75e9SShahar S Matityahu * 122c9fe75e9SShahar S Matityahu * Configures parameters for region data collection 123c9fe75e9SShahar S Matityahu * 124c9fe75e9SShahar S Matityahu * @hdr: debug header 125c9fe75e9SShahar S Matityahu * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID 126c9fe75e9SShahar S Matityahu * @type: region type. One of &enum iwl_fw_ini_region_type 127c9fe75e9SShahar S Matityahu * @name: region name 128c9fe75e9SShahar S Matityahu * @dev_addr: device address configuration. Used by 129c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC, 130c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX, 131c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR, 132c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG 13389639e06SMukesh Sisodiya * &IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM, 134c9fe75e9SShahar S Matityahu * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and 135c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_RXF 136c9fe75e9SShahar S Matityahu * @err_table: error table configuration. Used by 137c9fe75e9SShahar S Matityahu * IWL_FW_INI_REGION_LMAC_ERROR_TABLE and 138c9fe75e9SShahar S Matityahu * IWL_FW_INI_REGION_UMAC_ERROR_TABLE 139c9fe75e9SShahar S Matityahu * @internal_buffer: internal monitor buffer configuration. Used by 140c9fe75e9SShahar S Matityahu * &IWL_FW_INI_REGION_INTERNAL_BUFFER 141c9fe75e9SShahar S Matityahu * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id. 142c9fe75e9SShahar S Matityahu * Used by &IWL_FW_INI_REGION_DRAM_BUFFER 143c9fe75e9SShahar S Matityahu * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV 144c9fe75e9SShahar S Matityahu * @addrs: array of addresses attached to the end of the region tlv 145bd294466SSara Sharon */ 146bd294466SSara Sharon struct iwl_fw_ini_region_tlv { 147c9fe75e9SShahar S Matityahu struct iwl_fw_ini_header hdr; 148c9fe75e9SShahar S Matityahu __le32 id; 149c9fe75e9SShahar S Matityahu __le32 type; 150c9fe75e9SShahar S Matityahu u8 name[IWL_FW_INI_MAX_NAME]; 151c9fe75e9SShahar S Matityahu union { 152c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_dev_addr dev_addr; 153c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_fifos fifos; 154c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_err_table err_table; 155c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_internal_buffer internal_buffer; 156ba8f6f4aSMordechay Goodstein struct iwl_fw_ini_region_special_device_memory special_mem; 157c9fe75e9SShahar S Matityahu __le32 dram_alloc_id; 158c9fe75e9SShahar S Matityahu __le32 tlv_mask; 159c9fe75e9SShahar S Matityahu }; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */ 160c9fe75e9SShahar S Matityahu __le32 addrs[]; 161c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */ 162bd294466SSara Sharon 163bd294466SSara Sharon /** 164677d25b2SShahar S Matityahu * struct iwl_fw_ini_debug_info_tlv 165677d25b2SShahar S Matityahu * 166677d25b2SShahar S Matityahu * debug configuration name for a specific image 167677d25b2SShahar S Matityahu * 168677d25b2SShahar S Matityahu * @hdr: debug header 169677d25b2SShahar S Matityahu * @image_type: image type 170677d25b2SShahar S Matityahu * @debug_cfg_name: debug configuration name 171677d25b2SShahar S Matityahu */ 172677d25b2SShahar S Matityahu struct iwl_fw_ini_debug_info_tlv { 173677d25b2SShahar S Matityahu struct iwl_fw_ini_header hdr; 174677d25b2SShahar S Matityahu __le32 image_type; 175677d25b2SShahar S Matityahu u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME]; 176677d25b2SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */ 177677d25b2SShahar S Matityahu 178677d25b2SShahar S Matityahu /** 179593fae3eSShahar S Matityahu * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers 180593fae3eSShahar S Matityahu * 181593fae3eSShahar S Matityahu * @hdr: debug header 182593fae3eSShahar S Matityahu * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id 183593fae3eSShahar S Matityahu * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location 184593fae3eSShahar S Matityahu * @req_size: requested buffer size 185593fae3eSShahar S Matityahu * @max_frags_num: maximum number of fragments 186593fae3eSShahar S Matityahu * @min_size: minimum buffer size 187593fae3eSShahar S Matityahu */ 188593fae3eSShahar S Matityahu struct iwl_fw_ini_allocation_tlv { 189593fae3eSShahar S Matityahu struct iwl_fw_ini_header hdr; 190593fae3eSShahar S Matityahu __le32 alloc_id; 191593fae3eSShahar S Matityahu __le32 buf_location; 192593fae3eSShahar S Matityahu __le32 req_size; 193593fae3eSShahar S Matityahu __le32 max_frags_num; 194593fae3eSShahar S Matityahu __le32 min_size; 195593fae3eSShahar S Matityahu } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */ 196593fae3eSShahar S Matityahu 197593fae3eSShahar S Matityahu /** 1983b589d56SShahar S Matityahu * struct iwl_fw_ini_trigger_tlv - trigger TLV 199bd294466SSara Sharon * 2003b589d56SShahar S Matityahu * Trigger that upon firing, determines what regions to collect 2013b589d56SShahar S Matityahu * 2023b589d56SShahar S Matityahu * @hdr: debug header 2033b589d56SShahar S Matityahu * @time_point: time point. One of &enum iwl_fw_ini_time_point 2043b589d56SShahar S Matityahu * @trigger_reason: trigger reason 2053b589d56SShahar S Matityahu * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy 2063b589d56SShahar S Matityahu * @dump_delay: delay from trigger fire to dump, in usec 2073b589d56SShahar S Matityahu * @occurrences: max trigger fire occurrences allowed 2083b589d56SShahar S Matityahu * @reserved: unused 2093b589d56SShahar S Matityahu * @ignore_consec: ignore consecutive triggers, in usec 2103b589d56SShahar S Matityahu * @reset_fw: if non zero, will reset and reload the FW 2113b589d56SShahar S Matityahu * @multi_dut: initiate debug dump data on several DUTs 2123b589d56SShahar S Matityahu * @regions_mask: mask of regions to collect 2133b589d56SShahar S Matityahu * @data: trigger data 214bd294466SSara Sharon */ 215bd294466SSara Sharon struct iwl_fw_ini_trigger_tlv { 2163b589d56SShahar S Matityahu struct iwl_fw_ini_header hdr; 2173b589d56SShahar S Matityahu __le32 time_point; 2183b589d56SShahar S Matityahu __le32 trigger_reason; 2193b589d56SShahar S Matityahu __le32 apply_policy; 2203b589d56SShahar S Matityahu __le32 dump_delay; 2213b589d56SShahar S Matityahu __le32 occurrences; 2223b589d56SShahar S Matityahu __le32 reserved; 2233b589d56SShahar S Matityahu __le32 ignore_consec; 2243b589d56SShahar S Matityahu __le32 reset_fw; 2253b589d56SShahar S Matityahu __le32 multi_dut; 2263b589d56SShahar S Matityahu __le64 regions_mask; 2273b589d56SShahar S Matityahu __le32 data[]; 2283b589d56SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */ 229bd294466SSara Sharon 230bd294466SSara Sharon /** 231a9248de4SShahar S Matityahu * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV 232a9248de4SShahar S Matityahu * 233a9248de4SShahar S Matityahu * @hdr: debug header 234a9248de4SShahar S Matityahu * @time_point: time point. One of &enum iwl_fw_ini_time_point 235a9248de4SShahar S Matityahu * @period_msec: interval at which the hcmd will be sent to the FW. 236a9248de4SShahar S Matityahu * Measured in msec (0 = one time command) 237a9248de4SShahar S Matityahu * @hcmd: a variable length host-command to be sent to apply the configuration 238a9248de4SShahar S Matityahu */ 239a9248de4SShahar S Matityahu struct iwl_fw_ini_hcmd_tlv { 240a9248de4SShahar S Matityahu struct iwl_fw_ini_header hdr; 241a9248de4SShahar S Matityahu __le32 time_point; 242a9248de4SShahar S Matityahu __le32 period_msec; 243a9248de4SShahar S Matityahu struct iwl_fw_ini_hcmd hcmd; 244a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */ 245a9248de4SShahar S Matityahu 246a9248de4SShahar S Matityahu /** 247bd294466SSara Sharon * enum iwl_fw_ini_allocation_id 248fe63f21bSShahar S Matityahu * 249bd294466SSara Sharon * @IWL_FW_INI_ALLOCATION_INVALID: invalid 250bd294466SSara Sharon * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration 251bd294466SSara Sharon * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration 252bd294466SSara Sharon * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration 253ccdc3d6dSShahar S Matityahu * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids 254bd294466SSara Sharon */ 255bd294466SSara Sharon enum iwl_fw_ini_allocation_id { 256bd294466SSara Sharon IWL_FW_INI_ALLOCATION_INVALID, 257bd294466SSara Sharon IWL_FW_INI_ALLOCATION_ID_DBGC1, 258bd294466SSara Sharon IWL_FW_INI_ALLOCATION_ID_DBGC2, 259bd294466SSara Sharon IWL_FW_INI_ALLOCATION_ID_DBGC3, 260ccdc3d6dSShahar S Matityahu IWL_FW_INI_ALLOCATION_NUM, 261d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */ 262bd294466SSara Sharon 263bd294466SSara Sharon /** 264bd294466SSara Sharon * enum iwl_fw_ini_buffer_location 265fe63f21bSShahar S Matityahu * 266bd294466SSara Sharon * @IWL_FW_INI_LOCATION_INVALID: invalid 267bd294466SSara Sharon * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location 268bd294466SSara Sharon * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location 269fe63f21bSShahar S Matityahu * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location 270bd294466SSara Sharon */ 271bd294466SSara Sharon enum iwl_fw_ini_buffer_location { 27256ea8e3bSShahar S Matityahu IWL_FW_INI_LOCATION_INVALID, 273bd294466SSara Sharon IWL_FW_INI_LOCATION_SRAM_PATH, 274bd294466SSara Sharon IWL_FW_INI_LOCATION_DRAM_PATH, 275fe63f21bSShahar S Matityahu IWL_FW_INI_LOCATION_NPK_PATH, 2760c9e025eSMordechay Goodstein IWL_FW_INI_LOCATION_NUM, 277d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */ 278bd294466SSara Sharon 279bd294466SSara Sharon /** 280bd294466SSara Sharon * enum iwl_fw_ini_region_type 281fe63f21bSShahar S Matityahu * 282bd294466SSara Sharon * @IWL_FW_INI_REGION_INVALID: invalid 283c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs 284c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer 285c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer 286c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_TXF: TX fifos 287c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_RXF: RX fifo 288c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table 289c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table 290c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data 291bd294466SSara Sharon * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory 292bd294466SSara Sharon * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC 293bd294466SSara Sharon * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY 294bd294466SSara Sharon * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX 295bd294466SSara Sharon * @IWL_FW_INI_REGION_PAGING: paging memory 296bd294466SSara Sharon * @IWL_FW_INI_REGION_CSR: CSR registers 297c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory 298c9fe75e9SShahar S Matityahu * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config 29916b2afe0SMordechay Goodstein * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory 30089639e06SMukesh Sisodiya * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM 301bd294466SSara Sharon * @IWL_FW_INI_REGION_NUM: number of region types 302bd294466SSara Sharon */ 303bd294466SSara Sharon enum iwl_fw_ini_region_type { 304bd294466SSara Sharon IWL_FW_INI_REGION_INVALID, 305c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_TLV, 306c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_INTERNAL_BUFFER, 307c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_DRAM_BUFFER, 308c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_TXF, 309c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_RXF, 310c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_LMAC_ERROR_TABLE, 311c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_UMAC_ERROR_TABLE, 312c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_RSP_OR_NOTIF, 313bd294466SSara Sharon IWL_FW_INI_REGION_DEVICE_MEMORY, 314bd294466SSara Sharon IWL_FW_INI_REGION_PERIPHERY_MAC, 315bd294466SSara Sharon IWL_FW_INI_REGION_PERIPHERY_PHY, 316bd294466SSara Sharon IWL_FW_INI_REGION_PERIPHERY_AUX, 317bd294466SSara Sharon IWL_FW_INI_REGION_PAGING, 318bd294466SSara Sharon IWL_FW_INI_REGION_CSR, 319c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_DRAM_IMR, 320c9fe75e9SShahar S Matityahu IWL_FW_INI_REGION_PCI_IOSF_CONFIG, 321ba8f6f4aSMordechay Goodstein IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY, 32289639e06SMukesh Sisodiya IWL_FW_INI_REGION_DBGI_SRAM, 323bd294466SSara Sharon IWL_FW_INI_REGION_NUM 324c9fe75e9SShahar S Matityahu }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */ 325bd294466SSara Sharon 326b108d8c7SShahar S Matityahu /** 327b108d8c7SShahar S Matityahu * enum iwl_fw_ini_time_point 328b108d8c7SShahar S Matityahu * 329b108d8c7SShahar S Matityahu * Hard coded time points in which the driver can send hcmd or perform dump 330b108d8c7SShahar S Matityahu * collection 331b108d8c7SShahar S Matityahu * 332b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW 333b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif 334b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence 335b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert 336b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error 337b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang 3384bf3d7cfSMordechay Goodstein * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif 339b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification. 340b108d8c7SShahar S Matityahu * data field holds id and group 341b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point 342b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant 343b108d8c7SShahar S Matityahu * intervals. data field holds the interval time in msec 3444c447cfaSLuca Coelho * @IWL_FW_INI_TIME_POINT_RESERVED: reserved 345b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused 346b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout 347b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable 348b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable 349b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start 350b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end 351b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons 352b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure 353b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed 354b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action 355b108d8c7SShahar S Matityahu * frame failed 356b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold 357b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred 358b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed 359b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx 360b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_DEASSOC: de association 361b108d8c7SShahar S Matityahu * @IWL_FW_INI_TIME_POINT_NUM: number of time points 362b108d8c7SShahar S Matityahu */ 363b108d8c7SShahar S Matityahu enum iwl_fw_ini_time_point { 364b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_INVALID, 365b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_EARLY, 366b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 367b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_POST_INIT, 368b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_FW_ASSERT, 369b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_FW_HW_ERROR, 370b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG, 3714bf3d7cfSMordechay Goodstein IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION, 372b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF, 373b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_USER_TRIGGER, 374b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_PERIODIC, 3754c447cfaSLuca Coelho IWL_FW_INI_TIME_POINT_RESERVED, 376b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_ASSERT, 377b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT, 378b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE, 379b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE, 380b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_D3_START, 381b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HOST_D3_END, 382b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_MISSED_BEACONS, 383b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_ASSOC_FAILED, 384b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_TX_FAILED, 385b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED, 386b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD, 387b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_HANG_OCCURRED, 388b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_EAPOL_FAILED, 389b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_FAKE_TX, 390b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_DEASSOC, 391b108d8c7SShahar S Matityahu IWL_FW_INI_TIME_POINT_NUM, 392b108d8c7SShahar S Matityahu }; /* FW_TLV_DEBUG_TIME_POINT_API_E */ 393b108d8c7SShahar S Matityahu 394cf29c5b6SShahar S Matityahu /** 395cf29c5b6SShahar S Matityahu * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers 396cf29c5b6SShahar S Matityahu * 397cf29c5b6SShahar S Matityahu * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point 398cf29c5b6SShahar S Matityahu * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data 399cf29c5b6SShahar S Matityahu * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask. 400cf29c5b6SShahar S Matityahu * Append otherwise 401cf29c5b6SShahar S Matityahu * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration 402cf29c5b6SShahar S Matityahu * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data. 403cf29c5b6SShahar S Matityahu * Append otherwise 404cf29c5b6SShahar S Matityahu */ 405cf29c5b6SShahar S Matityahu enum iwl_fw_ini_trigger_apply_policy { 406cf29c5b6SShahar S Matityahu IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0), 407cf29c5b6SShahar S Matityahu IWL_FW_INI_APPLY_POLICY_MATCH_DATA = BIT(1), 408cf29c5b6SShahar S Matityahu IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS = BIT(8), 409cf29c5b6SShahar S Matityahu IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9), 410cf29c5b6SShahar S Matityahu IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10), 411cf29c5b6SShahar S Matityahu }; 412bd294466SSara Sharon #endif 413