18e99ea8dSJohannes Berg /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28e99ea8dSJohannes Berg /*
3a451b823SMukesh Sisodiya  * Copyright (C) 2018-2021 Intel Corporation
48e99ea8dSJohannes Berg  */
5bd294466SSara Sharon #ifndef __iwl_fw_dbg_tlv_h__
6bd294466SSara Sharon #define __iwl_fw_dbg_tlv_h__
7bd294466SSara Sharon 
8bd294466SSara Sharon #include <linux/bitops.h>
9bd294466SSara Sharon 
10fdb70083SJohannes Berg #define IWL_FW_INI_HW_SMEM_REGION_ID		15
11b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_REGION_ID		64
12b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_NAME			32
13677d25b2SShahar S Matityahu #define IWL_FW_INI_MAX_CFG_NAME			64
14cf29c5b6SShahar S Matityahu #define IWL_FW_INI_DOMAIN_ALWAYS_ON		0
15a451b823SMukesh Sisodiya #define IWL_FW_INI_REGION_V2_MASK		0x0000FFFF
16fe63f21bSShahar S Matityahu 
17fe63f21bSShahar S Matityahu /**
18fe63f21bSShahar S Matityahu  * struct iwl_fw_ini_hcmd
19bd294466SSara Sharon  *
20bd294466SSara Sharon  * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC
21bd294466SSara Sharon  * @group: the desired cmd group
22fe63f21bSShahar S Matityahu  * @reserved: to align to FW struct
23fe63f21bSShahar S Matityahu  * @data: all of the relevant command data to be sent
24bd294466SSara Sharon  */
25bd294466SSara Sharon struct iwl_fw_ini_hcmd {
26bd294466SSara Sharon 	u8 id;
27bd294466SSara Sharon 	u8 group;
28fe63f21bSShahar S Matityahu 	__le16 reserved;
29bd294466SSara Sharon 	u8 data[0];
30fe63f21bSShahar S Matityahu } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */
31bd294466SSara Sharon 
32bd294466SSara Sharon /**
33a9248de4SShahar S Matityahu  * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures
34fe63f21bSShahar S Matityahu  *
35a9248de4SShahar S Matityahu  * @version: TLV version
36a9248de4SShahar S Matityahu  * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain
37bd294466SSara Sharon  */
38a9248de4SShahar S Matityahu struct iwl_fw_ini_header {
39a9248de4SShahar S Matityahu 	__le32 version;
40fe63f21bSShahar S Matityahu 	__le32 domain;
41394f4192SJohannes Berg 	/* followed by the data */
42a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */
43bd294466SSara Sharon 
44bd294466SSara Sharon /**
45c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses
46fe63f21bSShahar S Matityahu  *
47c9fe75e9SShahar S Matityahu  * @size: size of each memory chunk
48c9fe75e9SShahar S Matityahu  * @offset: offset to add to the base address of each chunk
49c9fe75e9SShahar S Matityahu  */
50c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_dev_addr {
51c9fe75e9SShahar S Matityahu 	__le32 size;
52c9fe75e9SShahar S Matityahu 	__le32 offset;
53c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */
54c9fe75e9SShahar S Matityahu 
55c9fe75e9SShahar S Matityahu /**
56c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos
57c9fe75e9SShahar S Matityahu  *
58c9fe75e9SShahar S Matityahu  * @fid: fifos ids array. Used to determine what fifos to collect
59c9fe75e9SShahar S Matityahu  * @hdr_only: if non zero, collect only the registers
60c9fe75e9SShahar S Matityahu  * @offset: offset to add to the registers addresses
61c9fe75e9SShahar S Matityahu  */
62c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_fifos {
63c9fe75e9SShahar S Matityahu 	__le32 fid[2];
64c9fe75e9SShahar S Matityahu 	__le32 hdr_only;
65c9fe75e9SShahar S Matityahu 	__le32 offset;
66c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */
67c9fe75e9SShahar S Matityahu 
68c9fe75e9SShahar S Matityahu /**
69c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_err_table - error table region data
70c9fe75e9SShahar S Matityahu  *
71c9fe75e9SShahar S Matityahu  * Configuration to read Umac/Lmac error table
72c9fe75e9SShahar S Matityahu  *
73c9fe75e9SShahar S Matityahu  * @version: version of the error table
74c9fe75e9SShahar S Matityahu  * @base_addr: base address of the error table
75c9fe75e9SShahar S Matityahu  * @size: size of the error table
76c9fe75e9SShahar S Matityahu  * @offset: offset to add to &base_addr
77c9fe75e9SShahar S Matityahu  */
78c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_err_table {
79c9fe75e9SShahar S Matityahu 	__le32 version;
80c9fe75e9SShahar S Matityahu 	__le32 base_addr;
81c9fe75e9SShahar S Matityahu 	__le32 size;
82c9fe75e9SShahar S Matityahu 	__le32 offset;
83c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */
84c9fe75e9SShahar S Matityahu 
85c9fe75e9SShahar S Matityahu /**
86ba8f6f4aSMordechay Goodstein  * struct iwl_fw_ini_region_special_device_memory - special device memory
87ba8f6f4aSMordechay Goodstein  *
88ba8f6f4aSMordechay Goodstein  * Configuration to read a special memory
89ba8f6f4aSMordechay Goodstein  *
90ba8f6f4aSMordechay Goodstein  * @type: type of the special memory
91ba8f6f4aSMordechay Goodstein  * @version: version of the special memory
92ba8f6f4aSMordechay Goodstein  * @base_addr: base address of the error table
93ba8f6f4aSMordechay Goodstein  * @size: size of the error table
94ba8f6f4aSMordechay Goodstein  * @offset: offset to add to &base_addr
95ba8f6f4aSMordechay Goodstein  */
96ba8f6f4aSMordechay Goodstein struct iwl_fw_ini_region_special_device_memory {
97ba8f6f4aSMordechay Goodstein 	__le16 type;
98ba8f6f4aSMordechay Goodstein 	__le16 version;
99ba8f6f4aSMordechay Goodstein 	__le32 base_addr;
100ba8f6f4aSMordechay Goodstein 	__le32 size;
101ba8f6f4aSMordechay Goodstein 	__le32 offset;
102ba8f6f4aSMordechay Goodstein } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */
103ba8f6f4aSMordechay Goodstein 
104ba8f6f4aSMordechay Goodstein /**
105c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_internal_buffer - internal buffer region data
106c9fe75e9SShahar S Matityahu  *
107c9fe75e9SShahar S Matityahu  * Configuration to read internal monitor buffer
108c9fe75e9SShahar S Matityahu  *
109c9fe75e9SShahar S Matityahu  * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id
110c9fe75e9SShahar S Matityahu  * @base_addr: internal buffer base address
111c9fe75e9SShahar S Matityahu  * @size: size internal buffer size
112c9fe75e9SShahar S Matityahu  */
113c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_internal_buffer {
114c9fe75e9SShahar S Matityahu 	__le32 alloc_id;
115c9fe75e9SShahar S Matityahu 	__le32 base_addr;
116c9fe75e9SShahar S Matityahu 	__le32 size;
117c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */
118c9fe75e9SShahar S Matityahu 
119c9fe75e9SShahar S Matityahu /**
120c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_tlv - region TLV
121c9fe75e9SShahar S Matityahu  *
122c9fe75e9SShahar S Matityahu  * Configures parameters for region data collection
123c9fe75e9SShahar S Matityahu  *
124c9fe75e9SShahar S Matityahu  * @hdr: debug header
125c9fe75e9SShahar S Matityahu  * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID
126c9fe75e9SShahar S Matityahu  * @type: region type. One of &enum iwl_fw_ini_region_type
127*62ed5d90SMordechay Goodstein  * @sub_type: region sub type
128*62ed5d90SMordechay Goodstein  * @sub_type_ver: region sub type
129*62ed5d90SMordechay Goodstein  * @reserved: not in use
130c9fe75e9SShahar S Matityahu  * @name: region name
131c9fe75e9SShahar S Matityahu  * @dev_addr: device address configuration. Used by
132c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC,
133c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
134c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
135c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
13689639e06SMukesh Sisodiya  *	&IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,
137c9fe75e9SShahar S Matityahu  * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
138c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_RXF
139c9fe75e9SShahar S Matityahu  * @err_table: error table configuration. Used by
140c9fe75e9SShahar S Matityahu  *	IWL_FW_INI_REGION_LMAC_ERROR_TABLE and
141c9fe75e9SShahar S Matityahu  *	IWL_FW_INI_REGION_UMAC_ERROR_TABLE
142c9fe75e9SShahar S Matityahu  * @internal_buffer: internal monitor buffer configuration. Used by
143c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_INTERNAL_BUFFER
144c9fe75e9SShahar S Matityahu  * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id.
145c9fe75e9SShahar S Matityahu  *	Used by &IWL_FW_INI_REGION_DRAM_BUFFER
146c9fe75e9SShahar S Matityahu  * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV
147c9fe75e9SShahar S Matityahu  * @addrs: array of addresses attached to the end of the region tlv
148bd294466SSara Sharon  */
149bd294466SSara Sharon struct iwl_fw_ini_region_tlv {
150c9fe75e9SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
151c9fe75e9SShahar S Matityahu 	__le32 id;
152*62ed5d90SMordechay Goodstein 	u8 type;
153*62ed5d90SMordechay Goodstein 	u8 sub_type;
154*62ed5d90SMordechay Goodstein 	u8 sub_type_ver;
155*62ed5d90SMordechay Goodstein 	u8 reserved;
156c9fe75e9SShahar S Matityahu 	u8 name[IWL_FW_INI_MAX_NAME];
157c9fe75e9SShahar S Matityahu 	union {
158c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_dev_addr dev_addr;
159c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_fifos fifos;
160c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_err_table err_table;
161c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_internal_buffer internal_buffer;
162ba8f6f4aSMordechay Goodstein 		struct iwl_fw_ini_region_special_device_memory special_mem;
163c9fe75e9SShahar S Matityahu 		__le32 dram_alloc_id;
164c9fe75e9SShahar S Matityahu 		__le32 tlv_mask;
165c9fe75e9SShahar S Matityahu 	}; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */
166c9fe75e9SShahar S Matityahu 	__le32 addrs[];
167c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */
168bd294466SSara Sharon 
169bd294466SSara Sharon /**
170677d25b2SShahar S Matityahu  * struct iwl_fw_ini_debug_info_tlv
171677d25b2SShahar S Matityahu  *
172677d25b2SShahar S Matityahu  * debug configuration name for a specific image
173677d25b2SShahar S Matityahu  *
174677d25b2SShahar S Matityahu  * @hdr: debug header
175677d25b2SShahar S Matityahu  * @image_type: image type
176677d25b2SShahar S Matityahu  * @debug_cfg_name: debug configuration name
177677d25b2SShahar S Matityahu  */
178677d25b2SShahar S Matityahu struct iwl_fw_ini_debug_info_tlv {
179677d25b2SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
180677d25b2SShahar S Matityahu 	__le32 image_type;
181677d25b2SShahar S Matityahu 	u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME];
182677d25b2SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */
183677d25b2SShahar S Matityahu 
184677d25b2SShahar S Matityahu /**
185593fae3eSShahar S Matityahu  * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers
186593fae3eSShahar S Matityahu  *
187593fae3eSShahar S Matityahu  * @hdr: debug header
188593fae3eSShahar S Matityahu  * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id
189593fae3eSShahar S Matityahu  * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location
190593fae3eSShahar S Matityahu  * @req_size: requested buffer size
191593fae3eSShahar S Matityahu  * @max_frags_num: maximum number of fragments
192593fae3eSShahar S Matityahu  * @min_size: minimum buffer size
193593fae3eSShahar S Matityahu  */
194593fae3eSShahar S Matityahu struct iwl_fw_ini_allocation_tlv {
195593fae3eSShahar S Matityahu 	struct iwl_fw_ini_header hdr;
196593fae3eSShahar S Matityahu 	__le32 alloc_id;
197593fae3eSShahar S Matityahu 	__le32 buf_location;
198593fae3eSShahar S Matityahu 	__le32 req_size;
199593fae3eSShahar S Matityahu 	__le32 max_frags_num;
200593fae3eSShahar S Matityahu 	__le32 min_size;
201593fae3eSShahar S Matityahu } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */
202593fae3eSShahar S Matityahu 
203593fae3eSShahar S Matityahu /**
2043b589d56SShahar S Matityahu  * struct iwl_fw_ini_trigger_tlv - trigger TLV
205bd294466SSara Sharon  *
2063b589d56SShahar S Matityahu  * Trigger that upon firing, determines what regions to collect
2073b589d56SShahar S Matityahu  *
2083b589d56SShahar S Matityahu  * @hdr: debug header
2093b589d56SShahar S Matityahu  * @time_point: time point. One of &enum iwl_fw_ini_time_point
2103b589d56SShahar S Matityahu  * @trigger_reason: trigger reason
2113b589d56SShahar S Matityahu  * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy
2123b589d56SShahar S Matityahu  * @dump_delay: delay from trigger fire to dump, in usec
2133b589d56SShahar S Matityahu  * @occurrences: max trigger fire occurrences allowed
2143b589d56SShahar S Matityahu  * @reserved: unused
2153b589d56SShahar S Matityahu  * @ignore_consec: ignore consecutive triggers, in usec
2163b589d56SShahar S Matityahu  * @reset_fw: if non zero, will reset and reload the FW
2173b589d56SShahar S Matityahu  * @multi_dut: initiate debug dump data on several DUTs
2183b589d56SShahar S Matityahu  * @regions_mask: mask of regions to collect
2193b589d56SShahar S Matityahu  * @data: trigger data
220bd294466SSara Sharon  */
221bd294466SSara Sharon struct iwl_fw_ini_trigger_tlv {
2223b589d56SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
2233b589d56SShahar S Matityahu 	__le32 time_point;
2243b589d56SShahar S Matityahu 	__le32 trigger_reason;
2253b589d56SShahar S Matityahu 	__le32 apply_policy;
2263b589d56SShahar S Matityahu 	__le32 dump_delay;
2273b589d56SShahar S Matityahu 	__le32 occurrences;
2283b589d56SShahar S Matityahu 	__le32 reserved;
2293b589d56SShahar S Matityahu 	__le32 ignore_consec;
2303b589d56SShahar S Matityahu 	__le32 reset_fw;
2313b589d56SShahar S Matityahu 	__le32 multi_dut;
2323b589d56SShahar S Matityahu 	__le64 regions_mask;
2333b589d56SShahar S Matityahu 	__le32 data[];
2343b589d56SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */
235bd294466SSara Sharon 
236bd294466SSara Sharon /**
237a9248de4SShahar S Matityahu  * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV
238a9248de4SShahar S Matityahu  *
239a9248de4SShahar S Matityahu  * @hdr: debug header
240a9248de4SShahar S Matityahu  * @time_point: time point. One of &enum iwl_fw_ini_time_point
241a9248de4SShahar S Matityahu  * @period_msec: interval at which the hcmd will be sent to the FW.
242a9248de4SShahar S Matityahu  *	Measured in msec (0 = one time command)
243a9248de4SShahar S Matityahu  * @hcmd: a variable length host-command to be sent to apply the configuration
244a9248de4SShahar S Matityahu  */
245a9248de4SShahar S Matityahu struct iwl_fw_ini_hcmd_tlv {
246a9248de4SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
247a9248de4SShahar S Matityahu 	__le32 time_point;
248a9248de4SShahar S Matityahu 	__le32 period_msec;
249a9248de4SShahar S Matityahu 	struct iwl_fw_ini_hcmd hcmd;
250a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */
251a9248de4SShahar S Matityahu 
252a9248de4SShahar S Matityahu /**
253f21baf24SMukesh Sisodiya * struct iwl_fw_ini_conf_tlv - preset configuration TLV
254f21baf24SMukesh Sisodiya *
255f21baf24SMukesh Sisodiya * @address: the base address
256f21baf24SMukesh Sisodiya * @value: value to set at address
257f21baf24SMukesh Sisodiya 
258f21baf24SMukesh Sisodiya */
259f21baf24SMukesh Sisodiya struct iwl_fw_ini_addr_val {
260f21baf24SMukesh Sisodiya 	__le32 address;
261f21baf24SMukesh Sisodiya 	__le32 value;
262f21baf24SMukesh Sisodiya } __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */
263f21baf24SMukesh Sisodiya 
264f21baf24SMukesh Sisodiya /**
265f21baf24SMukesh Sisodiya  * struct iwl_fw_ini_conf_tlv - configuration TLV to set register/memory.
266f21baf24SMukesh Sisodiya  *
267f21baf24SMukesh Sisodiya  * @hdr: debug header
268f21baf24SMukesh Sisodiya  * @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point
269f21baf24SMukesh Sisodiya  * @set_type: write access type preset token for time point.
270f21baf24SMukesh Sisodiya  *  one of &enum iwl_fw_ini_config_set_type
271f21baf24SMukesh Sisodiya  * @addr_offset: the offset to add to any item in address[0] field
272f21baf24SMukesh Sisodiya  * @addr_val: address value pair
273f21baf24SMukesh Sisodiya  */
274f21baf24SMukesh Sisodiya struct iwl_fw_ini_conf_set_tlv {
275f21baf24SMukesh Sisodiya 	struct iwl_fw_ini_header hdr;
276f21baf24SMukesh Sisodiya 	__le32 time_point;
277f21baf24SMukesh Sisodiya 	__le32 set_type;
278f21baf24SMukesh Sisodiya 	__le32 addr_offset;
279f21baf24SMukesh Sisodiya 	struct iwl_fw_ini_addr_val addr_val[0];
280f21baf24SMukesh Sisodiya } __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */
281f21baf24SMukesh Sisodiya 
282f21baf24SMukesh Sisodiya /**
283f21baf24SMukesh Sisodiya  * enum iwl_fw_ini_config_set_type
284f21baf24SMukesh Sisodiya  *
285f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set
286f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration
287f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration
288f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration
289f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration
290f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration
291f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration
292f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration
293f21baf24SMukesh Sisodiya  * @IWL_FW_INI_ALLOCATION_NUM: max number of configuration supported
294f21baf24SMukesh Sisodiya */
295f21baf24SMukesh Sisodiya 
296f21baf24SMukesh Sisodiya enum iwl_fw_ini_config_set_type {
297f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0,
298f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC,
299f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY,
300f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX,
301f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY,
302f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_CSR,
303f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR,
304f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM,
305f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM,
306f21baf24SMukesh Sisodiya } __packed;
307f21baf24SMukesh Sisodiya 
308f21baf24SMukesh Sisodiya /**
309bd294466SSara Sharon  * enum iwl_fw_ini_allocation_id
310fe63f21bSShahar S Matityahu  *
311bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_INVALID: invalid
312bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration
313bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration
314bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration
315020cde47SMukesh Sisodiya  * @IWL_FW_INI_ALLOCATION_ID_DBGC4: allocation meant for DBGC4 configuration
316ccdc3d6dSShahar S Matityahu  * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids
317bd294466SSara Sharon */
318bd294466SSara Sharon enum iwl_fw_ini_allocation_id {
319bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_INVALID,
320bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC1,
321bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC2,
322bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC3,
323020cde47SMukesh Sisodiya 	IWL_FW_INI_ALLOCATION_ID_DBGC4,
324ccdc3d6dSShahar S Matityahu 	IWL_FW_INI_ALLOCATION_NUM,
325d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */
326bd294466SSara Sharon 
327bd294466SSara Sharon /**
328bd294466SSara Sharon  * enum iwl_fw_ini_buffer_location
329fe63f21bSShahar S Matityahu  *
330bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_INVALID: invalid
331bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location
332bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location
333fe63f21bSShahar S Matityahu  * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location
334bd294466SSara Sharon  */
335bd294466SSara Sharon enum iwl_fw_ini_buffer_location {
33656ea8e3bSShahar S Matityahu 	IWL_FW_INI_LOCATION_INVALID,
337bd294466SSara Sharon 	IWL_FW_INI_LOCATION_SRAM_PATH,
338bd294466SSara Sharon 	IWL_FW_INI_LOCATION_DRAM_PATH,
339fe63f21bSShahar S Matityahu 	IWL_FW_INI_LOCATION_NPK_PATH,
3400c9e025eSMordechay Goodstein 	IWL_FW_INI_LOCATION_NUM,
341d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */
342bd294466SSara Sharon 
343bd294466SSara Sharon /**
344bd294466SSara Sharon  * enum iwl_fw_ini_region_type
345fe63f21bSShahar S Matityahu  *
346bd294466SSara Sharon  * @IWL_FW_INI_REGION_INVALID: invalid
347c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs
348c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer
349c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer
350c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_TXF: TX fifos
351c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_RXF: RX fifo
352c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table
353c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table
354c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data
355bd294466SSara Sharon  * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory
356bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC
357bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY
358bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX
359bd294466SSara Sharon  * @IWL_FW_INI_REGION_PAGING: paging memory
360bd294466SSara Sharon  * @IWL_FW_INI_REGION_CSR: CSR registers
361c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
362c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
36316b2afe0SMordechay Goodstein  * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
36489639e06SMukesh Sisodiya  * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM
365bd294466SSara Sharon  * @IWL_FW_INI_REGION_NUM: number of region types
366bd294466SSara Sharon  */
367bd294466SSara Sharon enum iwl_fw_ini_region_type {
368bd294466SSara Sharon 	IWL_FW_INI_REGION_INVALID,
369c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_TLV,
370c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_INTERNAL_BUFFER,
371c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_DRAM_BUFFER,
372c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_TXF,
373c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_RXF,
374c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_LMAC_ERROR_TABLE,
375c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_UMAC_ERROR_TABLE,
376c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_RSP_OR_NOTIF,
377bd294466SSara Sharon 	IWL_FW_INI_REGION_DEVICE_MEMORY,
378bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_MAC,
379bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_PHY,
380bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_AUX,
381bd294466SSara Sharon 	IWL_FW_INI_REGION_PAGING,
382bd294466SSara Sharon 	IWL_FW_INI_REGION_CSR,
383c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_DRAM_IMR,
384c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
385ba8f6f4aSMordechay Goodstein 	IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
38689639e06SMukesh Sisodiya 	IWL_FW_INI_REGION_DBGI_SRAM,
387bd294466SSara Sharon 	IWL_FW_INI_REGION_NUM
388c9fe75e9SShahar S Matityahu }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
389bd294466SSara Sharon 
390b108d8c7SShahar S Matityahu /**
391b108d8c7SShahar S Matityahu  * enum iwl_fw_ini_time_point
392b108d8c7SShahar S Matityahu  *
393b108d8c7SShahar S Matityahu  * Hard coded time points in which the driver can send hcmd or perform dump
394b108d8c7SShahar S Matityahu  * collection
395b108d8c7SShahar S Matityahu  *
396b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW
397b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif
398b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence
399b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert
400b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error
401b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang
4024bf3d7cfSMordechay Goodstein  * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif
403b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification.
404b108d8c7SShahar S Matityahu  *	data field holds id and group
405b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point
406b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant
407b108d8c7SShahar S Matityahu  *	intervals. data field holds the interval time in msec
4084c447cfaSLuca Coelho  * @IWL_FW_INI_TIME_POINT_RESERVED: reserved
409b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused
410b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout
411b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable
412b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable
413b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start
414b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end
415b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons
416b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure
417b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed
418b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action
419b108d8c7SShahar S Matityahu  *	frame failed
420b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold
421b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred
422b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed
423b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx
424b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_DEASSOC: de association
425b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_NUM: number of time points
426b108d8c7SShahar S Matityahu  */
427b108d8c7SShahar S Matityahu enum iwl_fw_ini_time_point {
428b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_INVALID,
429b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_EARLY,
430b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
431b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_POST_INIT,
432b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_ASSERT,
433b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_HW_ERROR,
434b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG,
4354bf3d7cfSMordechay Goodstein 	IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION,
436b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF,
437b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_USER_TRIGGER,
438b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_PERIODIC,
4394c447cfaSLuca Coelho 	IWL_FW_INI_TIME_POINT_RESERVED,
440b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_ASSERT,
441b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
442b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE,
443b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE,
444b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_D3_START,
445b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_D3_END,
446b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_MISSED_BEACONS,
447b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_ASSOC_FAILED,
448b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_FAILED,
449b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED,
450b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD,
451b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HANG_OCCURRED,
452b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_EAPOL_FAILED,
453b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FAKE_TX,
454b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_DEASSOC,
455b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_NUM,
456b108d8c7SShahar S Matityahu }; /* FW_TLV_DEBUG_TIME_POINT_API_E */
457b108d8c7SShahar S Matityahu 
458cf29c5b6SShahar S Matityahu /**
459cf29c5b6SShahar S Matityahu  * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers
460cf29c5b6SShahar S Matityahu  *
461cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point
462cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data
463cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask.
464cf29c5b6SShahar S Matityahu  *	Append otherwise
465cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration
466cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data.
467cf29c5b6SShahar S Matityahu  *	Append otherwise
468cf29c5b6SShahar S Matityahu  */
469cf29c5b6SShahar S Matityahu enum iwl_fw_ini_trigger_apply_policy {
470cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT	= BIT(0),
471cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_MATCH_DATA		= BIT(1),
472cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS	= BIT(8),
473cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG		= BIT(9),
474cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA		= BIT(10),
475cf29c5b6SShahar S Matityahu };
476bd294466SSara Sharon #endif
477