18e99ea8dSJohannes Berg /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28e99ea8dSJohannes Berg /*
3a451b823SMukesh Sisodiya  * Copyright (C) 2018-2021 Intel Corporation
48e99ea8dSJohannes Berg  */
5bd294466SSara Sharon #ifndef __iwl_fw_dbg_tlv_h__
6bd294466SSara Sharon #define __iwl_fw_dbg_tlv_h__
7bd294466SSara Sharon 
8bd294466SSara Sharon #include <linux/bitops.h>
9bd294466SSara Sharon 
10b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_REGION_ID		64
11b87384afSShahar S Matityahu #define IWL_FW_INI_MAX_NAME			32
12677d25b2SShahar S Matityahu #define IWL_FW_INI_MAX_CFG_NAME			64
13cf29c5b6SShahar S Matityahu #define IWL_FW_INI_DOMAIN_ALWAYS_ON		0
14a451b823SMukesh Sisodiya #define IWL_FW_INI_REGION_V2_MASK		0x0000FFFF
15fe63f21bSShahar S Matityahu 
16fe63f21bSShahar S Matityahu /**
17fe63f21bSShahar S Matityahu  * struct iwl_fw_ini_hcmd
18bd294466SSara Sharon  *
19bd294466SSara Sharon  * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC
20bd294466SSara Sharon  * @group: the desired cmd group
21fe63f21bSShahar S Matityahu  * @reserved: to align to FW struct
22fe63f21bSShahar S Matityahu  * @data: all of the relevant command data to be sent
23bd294466SSara Sharon  */
24bd294466SSara Sharon struct iwl_fw_ini_hcmd {
25bd294466SSara Sharon 	u8 id;
26bd294466SSara Sharon 	u8 group;
27fe63f21bSShahar S Matityahu 	__le16 reserved;
28bd294466SSara Sharon 	u8 data[0];
29fe63f21bSShahar S Matityahu } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */
30bd294466SSara Sharon 
31bd294466SSara Sharon /**
32a9248de4SShahar S Matityahu  * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures
33fe63f21bSShahar S Matityahu  *
34a9248de4SShahar S Matityahu  * @version: TLV version
35a9248de4SShahar S Matityahu  * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain
36bd294466SSara Sharon  */
37a9248de4SShahar S Matityahu struct iwl_fw_ini_header {
38a9248de4SShahar S Matityahu 	__le32 version;
39fe63f21bSShahar S Matityahu 	__le32 domain;
40394f4192SJohannes Berg 	/* followed by the data */
41a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */
42bd294466SSara Sharon 
43bd294466SSara Sharon /**
44c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses
45fe63f21bSShahar S Matityahu  *
46c9fe75e9SShahar S Matityahu  * @size: size of each memory chunk
47c9fe75e9SShahar S Matityahu  * @offset: offset to add to the base address of each chunk
48c9fe75e9SShahar S Matityahu  */
49c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_dev_addr {
50c9fe75e9SShahar S Matityahu 	__le32 size;
51c9fe75e9SShahar S Matityahu 	__le32 offset;
52c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */
53c9fe75e9SShahar S Matityahu 
54c9fe75e9SShahar S Matityahu /**
55c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos
56c9fe75e9SShahar S Matityahu  *
57c9fe75e9SShahar S Matityahu  * @fid: fifos ids array. Used to determine what fifos to collect
58c9fe75e9SShahar S Matityahu  * @hdr_only: if non zero, collect only the registers
59c9fe75e9SShahar S Matityahu  * @offset: offset to add to the registers addresses
60c9fe75e9SShahar S Matityahu  */
61c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_fifos {
62c9fe75e9SShahar S Matityahu 	__le32 fid[2];
63c9fe75e9SShahar S Matityahu 	__le32 hdr_only;
64c9fe75e9SShahar S Matityahu 	__le32 offset;
65c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */
66c9fe75e9SShahar S Matityahu 
67c9fe75e9SShahar S Matityahu /**
68c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_err_table - error table region data
69c9fe75e9SShahar S Matityahu  *
70c9fe75e9SShahar S Matityahu  * Configuration to read Umac/Lmac error table
71c9fe75e9SShahar S Matityahu  *
72c9fe75e9SShahar S Matityahu  * @version: version of the error table
73c9fe75e9SShahar S Matityahu  * @base_addr: base address of the error table
74c9fe75e9SShahar S Matityahu  * @size: size of the error table
75c9fe75e9SShahar S Matityahu  * @offset: offset to add to &base_addr
76c9fe75e9SShahar S Matityahu  */
77c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_err_table {
78c9fe75e9SShahar S Matityahu 	__le32 version;
79c9fe75e9SShahar S Matityahu 	__le32 base_addr;
80c9fe75e9SShahar S Matityahu 	__le32 size;
81c9fe75e9SShahar S Matityahu 	__le32 offset;
82c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */
83c9fe75e9SShahar S Matityahu 
84c9fe75e9SShahar S Matityahu /**
85ba8f6f4aSMordechay Goodstein  * struct iwl_fw_ini_region_special_device_memory - special device memory
86ba8f6f4aSMordechay Goodstein  *
87ba8f6f4aSMordechay Goodstein  * Configuration to read a special memory
88ba8f6f4aSMordechay Goodstein  *
89ba8f6f4aSMordechay Goodstein  * @type: type of the special memory
90ba8f6f4aSMordechay Goodstein  * @version: version of the special memory
91ba8f6f4aSMordechay Goodstein  * @base_addr: base address of the error table
92ba8f6f4aSMordechay Goodstein  * @size: size of the error table
93ba8f6f4aSMordechay Goodstein  * @offset: offset to add to &base_addr
94ba8f6f4aSMordechay Goodstein  */
95ba8f6f4aSMordechay Goodstein struct iwl_fw_ini_region_special_device_memory {
96ba8f6f4aSMordechay Goodstein 	__le16 type;
97ba8f6f4aSMordechay Goodstein 	__le16 version;
98ba8f6f4aSMordechay Goodstein 	__le32 base_addr;
99ba8f6f4aSMordechay Goodstein 	__le32 size;
100ba8f6f4aSMordechay Goodstein 	__le32 offset;
101ba8f6f4aSMordechay Goodstein } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */
102ba8f6f4aSMordechay Goodstein 
103ba8f6f4aSMordechay Goodstein /**
104c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_internal_buffer - internal buffer region data
105c9fe75e9SShahar S Matityahu  *
106c9fe75e9SShahar S Matityahu  * Configuration to read internal monitor buffer
107c9fe75e9SShahar S Matityahu  *
108c9fe75e9SShahar S Matityahu  * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id
109c9fe75e9SShahar S Matityahu  * @base_addr: internal buffer base address
110c9fe75e9SShahar S Matityahu  * @size: size internal buffer size
111c9fe75e9SShahar S Matityahu  */
112c9fe75e9SShahar S Matityahu struct iwl_fw_ini_region_internal_buffer {
113c9fe75e9SShahar S Matityahu 	__le32 alloc_id;
114c9fe75e9SShahar S Matityahu 	__le32 base_addr;
115c9fe75e9SShahar S Matityahu 	__le32 size;
116c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */
117c9fe75e9SShahar S Matityahu 
118c9fe75e9SShahar S Matityahu /**
119c9fe75e9SShahar S Matityahu  * struct iwl_fw_ini_region_tlv - region TLV
120c9fe75e9SShahar S Matityahu  *
121c9fe75e9SShahar S Matityahu  * Configures parameters for region data collection
122c9fe75e9SShahar S Matityahu  *
123c9fe75e9SShahar S Matityahu  * @hdr: debug header
124c9fe75e9SShahar S Matityahu  * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID
125c9fe75e9SShahar S Matityahu  * @type: region type. One of &enum iwl_fw_ini_region_type
12662ed5d90SMordechay Goodstein  * @sub_type: region sub type
12762ed5d90SMordechay Goodstein  * @sub_type_ver: region sub type
12862ed5d90SMordechay Goodstein  * @reserved: not in use
129c9fe75e9SShahar S Matityahu  * @name: region name
130c9fe75e9SShahar S Matityahu  * @dev_addr: device address configuration. Used by
131c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC,
132c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
133c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
134c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
13589639e06SMukesh Sisodiya  *	&IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,
136c9fe75e9SShahar S Matityahu  * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
137c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_RXF
138c9fe75e9SShahar S Matityahu  * @err_table: error table configuration. Used by
139c9fe75e9SShahar S Matityahu  *	IWL_FW_INI_REGION_LMAC_ERROR_TABLE and
140c9fe75e9SShahar S Matityahu  *	IWL_FW_INI_REGION_UMAC_ERROR_TABLE
141c9fe75e9SShahar S Matityahu  * @internal_buffer: internal monitor buffer configuration. Used by
142c9fe75e9SShahar S Matityahu  *	&IWL_FW_INI_REGION_INTERNAL_BUFFER
143c9fe75e9SShahar S Matityahu  * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id.
144c9fe75e9SShahar S Matityahu  *	Used by &IWL_FW_INI_REGION_DRAM_BUFFER
145c9fe75e9SShahar S Matityahu  * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV
146c9fe75e9SShahar S Matityahu  * @addrs: array of addresses attached to the end of the region tlv
147bd294466SSara Sharon  */
148bd294466SSara Sharon struct iwl_fw_ini_region_tlv {
149c9fe75e9SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
150c9fe75e9SShahar S Matityahu 	__le32 id;
15162ed5d90SMordechay Goodstein 	u8 type;
15262ed5d90SMordechay Goodstein 	u8 sub_type;
15362ed5d90SMordechay Goodstein 	u8 sub_type_ver;
15462ed5d90SMordechay Goodstein 	u8 reserved;
155c9fe75e9SShahar S Matityahu 	u8 name[IWL_FW_INI_MAX_NAME];
156c9fe75e9SShahar S Matityahu 	union {
157c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_dev_addr dev_addr;
158c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_fifos fifos;
159c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_err_table err_table;
160c9fe75e9SShahar S Matityahu 		struct iwl_fw_ini_region_internal_buffer internal_buffer;
161ba8f6f4aSMordechay Goodstein 		struct iwl_fw_ini_region_special_device_memory special_mem;
162c9fe75e9SShahar S Matityahu 		__le32 dram_alloc_id;
163c9fe75e9SShahar S Matityahu 		__le32 tlv_mask;
164c9fe75e9SShahar S Matityahu 	}; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */
165c9fe75e9SShahar S Matityahu 	__le32 addrs[];
166c9fe75e9SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */
167bd294466SSara Sharon 
168bd294466SSara Sharon /**
169677d25b2SShahar S Matityahu  * struct iwl_fw_ini_debug_info_tlv
170677d25b2SShahar S Matityahu  *
171677d25b2SShahar S Matityahu  * debug configuration name for a specific image
172677d25b2SShahar S Matityahu  *
173677d25b2SShahar S Matityahu  * @hdr: debug header
174677d25b2SShahar S Matityahu  * @image_type: image type
175677d25b2SShahar S Matityahu  * @debug_cfg_name: debug configuration name
176677d25b2SShahar S Matityahu  */
177677d25b2SShahar S Matityahu struct iwl_fw_ini_debug_info_tlv {
178677d25b2SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
179677d25b2SShahar S Matityahu 	__le32 image_type;
180677d25b2SShahar S Matityahu 	u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME];
181677d25b2SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */
182677d25b2SShahar S Matityahu 
183677d25b2SShahar S Matityahu /**
184593fae3eSShahar S Matityahu  * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers
185593fae3eSShahar S Matityahu  *
186593fae3eSShahar S Matityahu  * @hdr: debug header
187593fae3eSShahar S Matityahu  * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id
188593fae3eSShahar S Matityahu  * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location
189593fae3eSShahar S Matityahu  * @req_size: requested buffer size
190593fae3eSShahar S Matityahu  * @max_frags_num: maximum number of fragments
191593fae3eSShahar S Matityahu  * @min_size: minimum buffer size
192593fae3eSShahar S Matityahu  */
193593fae3eSShahar S Matityahu struct iwl_fw_ini_allocation_tlv {
194593fae3eSShahar S Matityahu 	struct iwl_fw_ini_header hdr;
195593fae3eSShahar S Matityahu 	__le32 alloc_id;
196593fae3eSShahar S Matityahu 	__le32 buf_location;
197593fae3eSShahar S Matityahu 	__le32 req_size;
198593fae3eSShahar S Matityahu 	__le32 max_frags_num;
199593fae3eSShahar S Matityahu 	__le32 min_size;
200593fae3eSShahar S Matityahu } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */
201593fae3eSShahar S Matityahu 
202593fae3eSShahar S Matityahu /**
2033b589d56SShahar S Matityahu  * struct iwl_fw_ini_trigger_tlv - trigger TLV
204bd294466SSara Sharon  *
2053b589d56SShahar S Matityahu  * Trigger that upon firing, determines what regions to collect
2063b589d56SShahar S Matityahu  *
2073b589d56SShahar S Matityahu  * @hdr: debug header
2083b589d56SShahar S Matityahu  * @time_point: time point. One of &enum iwl_fw_ini_time_point
2093b589d56SShahar S Matityahu  * @trigger_reason: trigger reason
2103b589d56SShahar S Matityahu  * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy
2113b589d56SShahar S Matityahu  * @dump_delay: delay from trigger fire to dump, in usec
2123b589d56SShahar S Matityahu  * @occurrences: max trigger fire occurrences allowed
2133b589d56SShahar S Matityahu  * @reserved: unused
2143b589d56SShahar S Matityahu  * @ignore_consec: ignore consecutive triggers, in usec
2153b589d56SShahar S Matityahu  * @reset_fw: if non zero, will reset and reload the FW
2163b589d56SShahar S Matityahu  * @multi_dut: initiate debug dump data on several DUTs
2173b589d56SShahar S Matityahu  * @regions_mask: mask of regions to collect
2183b589d56SShahar S Matityahu  * @data: trigger data
219bd294466SSara Sharon  */
220bd294466SSara Sharon struct iwl_fw_ini_trigger_tlv {
2213b589d56SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
2223b589d56SShahar S Matityahu 	__le32 time_point;
2233b589d56SShahar S Matityahu 	__le32 trigger_reason;
2243b589d56SShahar S Matityahu 	__le32 apply_policy;
2253b589d56SShahar S Matityahu 	__le32 dump_delay;
2263b589d56SShahar S Matityahu 	__le32 occurrences;
2273b589d56SShahar S Matityahu 	__le32 reserved;
2283b589d56SShahar S Matityahu 	__le32 ignore_consec;
2293b589d56SShahar S Matityahu 	__le32 reset_fw;
2303b589d56SShahar S Matityahu 	__le32 multi_dut;
2313b589d56SShahar S Matityahu 	__le64 regions_mask;
2323b589d56SShahar S Matityahu 	__le32 data[];
2333b589d56SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */
234bd294466SSara Sharon 
235bd294466SSara Sharon /**
236a9248de4SShahar S Matityahu  * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV
237a9248de4SShahar S Matityahu  *
238a9248de4SShahar S Matityahu  * @hdr: debug header
239a9248de4SShahar S Matityahu  * @time_point: time point. One of &enum iwl_fw_ini_time_point
240a9248de4SShahar S Matityahu  * @period_msec: interval at which the hcmd will be sent to the FW.
241a9248de4SShahar S Matityahu  *	Measured in msec (0 = one time command)
242a9248de4SShahar S Matityahu  * @hcmd: a variable length host-command to be sent to apply the configuration
243a9248de4SShahar S Matityahu  */
244a9248de4SShahar S Matityahu struct iwl_fw_ini_hcmd_tlv {
245a9248de4SShahar S Matityahu 	struct iwl_fw_ini_header hdr;
246a9248de4SShahar S Matityahu 	__le32 time_point;
247a9248de4SShahar S Matityahu 	__le32 period_msec;
248a9248de4SShahar S Matityahu 	struct iwl_fw_ini_hcmd hcmd;
249a9248de4SShahar S Matityahu } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */
250a9248de4SShahar S Matityahu 
251a9248de4SShahar S Matityahu /**
252f21baf24SMukesh Sisodiya * struct iwl_fw_ini_conf_tlv - preset configuration TLV
253f21baf24SMukesh Sisodiya *
254f21baf24SMukesh Sisodiya * @address: the base address
255f21baf24SMukesh Sisodiya * @value: value to set at address
256f21baf24SMukesh Sisodiya 
257f21baf24SMukesh Sisodiya */
258f21baf24SMukesh Sisodiya struct iwl_fw_ini_addr_val {
259f21baf24SMukesh Sisodiya 	__le32 address;
260f21baf24SMukesh Sisodiya 	__le32 value;
261f21baf24SMukesh Sisodiya } __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */
262f21baf24SMukesh Sisodiya 
263f21baf24SMukesh Sisodiya /**
264f21baf24SMukesh Sisodiya  * struct iwl_fw_ini_conf_tlv - configuration TLV to set register/memory.
265f21baf24SMukesh Sisodiya  *
266f21baf24SMukesh Sisodiya  * @hdr: debug header
267f21baf24SMukesh Sisodiya  * @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point
268f21baf24SMukesh Sisodiya  * @set_type: write access type preset token for time point.
269f21baf24SMukesh Sisodiya  *  one of &enum iwl_fw_ini_config_set_type
270f21baf24SMukesh Sisodiya  * @addr_offset: the offset to add to any item in address[0] field
271f21baf24SMukesh Sisodiya  * @addr_val: address value pair
272f21baf24SMukesh Sisodiya  */
273f21baf24SMukesh Sisodiya struct iwl_fw_ini_conf_set_tlv {
274f21baf24SMukesh Sisodiya 	struct iwl_fw_ini_header hdr;
275f21baf24SMukesh Sisodiya 	__le32 time_point;
276f21baf24SMukesh Sisodiya 	__le32 set_type;
277f21baf24SMukesh Sisodiya 	__le32 addr_offset;
278f21baf24SMukesh Sisodiya 	struct iwl_fw_ini_addr_val addr_val[0];
279f21baf24SMukesh Sisodiya } __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */
280f21baf24SMukesh Sisodiya 
281f21baf24SMukesh Sisodiya /**
282f21baf24SMukesh Sisodiya  * enum iwl_fw_ini_config_set_type
283f21baf24SMukesh Sisodiya  *
284f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set
285f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration
286f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration
287f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration
288f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration
289f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration
290f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration
291f21baf24SMukesh Sisodiya  * @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration
292f21baf24SMukesh Sisodiya  * @IWL_FW_INI_ALLOCATION_NUM: max number of configuration supported
293f21baf24SMukesh Sisodiya */
294f21baf24SMukesh Sisodiya 
295f21baf24SMukesh Sisodiya enum iwl_fw_ini_config_set_type {
296f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0,
297f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC,
298f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY,
299f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX,
300f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY,
301f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_CSR,
302f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR,
303f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM,
304f21baf24SMukesh Sisodiya 	IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM,
305f21baf24SMukesh Sisodiya } __packed;
306f21baf24SMukesh Sisodiya 
307f21baf24SMukesh Sisodiya /**
308bd294466SSara Sharon  * enum iwl_fw_ini_allocation_id
309fe63f21bSShahar S Matityahu  *
310bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_INVALID: invalid
311bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration
312bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration
313bd294466SSara Sharon  * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration
314020cde47SMukesh Sisodiya  * @IWL_FW_INI_ALLOCATION_ID_DBGC4: allocation meant for DBGC4 configuration
315ccdc3d6dSShahar S Matityahu  * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids
316bd294466SSara Sharon */
317bd294466SSara Sharon enum iwl_fw_ini_allocation_id {
318bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_INVALID,
319bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC1,
320bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC2,
321bd294466SSara Sharon 	IWL_FW_INI_ALLOCATION_ID_DBGC3,
322020cde47SMukesh Sisodiya 	IWL_FW_INI_ALLOCATION_ID_DBGC4,
323ccdc3d6dSShahar S Matityahu 	IWL_FW_INI_ALLOCATION_NUM,
324d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */
325bd294466SSara Sharon 
326bd294466SSara Sharon /**
327bd294466SSara Sharon  * enum iwl_fw_ini_buffer_location
328fe63f21bSShahar S Matityahu  *
329bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_INVALID: invalid
330bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location
331bd294466SSara Sharon  * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location
332fe63f21bSShahar S Matityahu  * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location
333bd294466SSara Sharon  */
334bd294466SSara Sharon enum iwl_fw_ini_buffer_location {
33556ea8e3bSShahar S Matityahu 	IWL_FW_INI_LOCATION_INVALID,
336bd294466SSara Sharon 	IWL_FW_INI_LOCATION_SRAM_PATH,
337bd294466SSara Sharon 	IWL_FW_INI_LOCATION_DRAM_PATH,
338fe63f21bSShahar S Matityahu 	IWL_FW_INI_LOCATION_NPK_PATH,
3390c9e025eSMordechay Goodstein 	IWL_FW_INI_LOCATION_NUM,
340d7febc2eSShahar S Matityahu }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */
341bd294466SSara Sharon 
342bd294466SSara Sharon /**
343bd294466SSara Sharon  * enum iwl_fw_ini_region_type
344fe63f21bSShahar S Matityahu  *
345bd294466SSara Sharon  * @IWL_FW_INI_REGION_INVALID: invalid
346c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs
347c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer
348c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer
349c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_TXF: TX fifos
350c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_RXF: RX fifo
351c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table
352c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table
353c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data
354bd294466SSara Sharon  * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory
355bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC
356bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY
357bd294466SSara Sharon  * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX
358bd294466SSara Sharon  * @IWL_FW_INI_REGION_PAGING: paging memory
359bd294466SSara Sharon  * @IWL_FW_INI_REGION_CSR: CSR registers
360c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
361c9fe75e9SShahar S Matityahu  * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
36216b2afe0SMordechay Goodstein  * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
36389639e06SMukesh Sisodiya  * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM
364bd294466SSara Sharon  * @IWL_FW_INI_REGION_NUM: number of region types
365bd294466SSara Sharon  */
366bd294466SSara Sharon enum iwl_fw_ini_region_type {
367bd294466SSara Sharon 	IWL_FW_INI_REGION_INVALID,
368c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_TLV,
369c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_INTERNAL_BUFFER,
370c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_DRAM_BUFFER,
371c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_TXF,
372c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_RXF,
373c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_LMAC_ERROR_TABLE,
374c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_UMAC_ERROR_TABLE,
375c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_RSP_OR_NOTIF,
376bd294466SSara Sharon 	IWL_FW_INI_REGION_DEVICE_MEMORY,
377bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_MAC,
378bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_PHY,
379bd294466SSara Sharon 	IWL_FW_INI_REGION_PERIPHERY_AUX,
380bd294466SSara Sharon 	IWL_FW_INI_REGION_PAGING,
381bd294466SSara Sharon 	IWL_FW_INI_REGION_CSR,
382c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_DRAM_IMR,
383c9fe75e9SShahar S Matityahu 	IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
384ba8f6f4aSMordechay Goodstein 	IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
38589639e06SMukesh Sisodiya 	IWL_FW_INI_REGION_DBGI_SRAM,
386bd294466SSara Sharon 	IWL_FW_INI_REGION_NUM
387c9fe75e9SShahar S Matityahu }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
388bd294466SSara Sharon 
389*04f1ee24SJohannes Berg #define IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM	1
390*04f1ee24SJohannes Berg 
391b108d8c7SShahar S Matityahu /**
392b108d8c7SShahar S Matityahu  * enum iwl_fw_ini_time_point
393b108d8c7SShahar S Matityahu  *
394b108d8c7SShahar S Matityahu  * Hard coded time points in which the driver can send hcmd or perform dump
395b108d8c7SShahar S Matityahu  * collection
396b108d8c7SShahar S Matityahu  *
397b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW
398b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif
399b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence
400b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert
401b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error
402b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang
4034bf3d7cfSMordechay Goodstein  * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif
404b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification.
405b108d8c7SShahar S Matityahu  *	data field holds id and group
406b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point
407b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant
408b108d8c7SShahar S Matityahu  *	intervals. data field holds the interval time in msec
4094c447cfaSLuca Coelho  * @IWL_FW_INI_TIME_POINT_RESERVED: reserved
410b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused
411b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout
412b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable
413b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable
414b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start
415b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end
416b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons
417b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure
418b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed
419b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action
420b108d8c7SShahar S Matityahu  *	frame failed
421b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold
422b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred
423b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed
424b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx
425b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_DEASSOC: de association
426b108d8c7SShahar S Matityahu  * @IWL_FW_INI_TIME_POINT_NUM: number of time points
427b108d8c7SShahar S Matityahu  */
428b108d8c7SShahar S Matityahu enum iwl_fw_ini_time_point {
429b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_INVALID,
430b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_EARLY,
431b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
432b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_POST_INIT,
433b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_ASSERT,
434b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_HW_ERROR,
435b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG,
4364bf3d7cfSMordechay Goodstein 	IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION,
437b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF,
438b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_USER_TRIGGER,
439b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_PERIODIC,
4404c447cfaSLuca Coelho 	IWL_FW_INI_TIME_POINT_RESERVED,
441b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_ASSERT,
442b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
443b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE,
444b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE,
445b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_D3_START,
446b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HOST_D3_END,
447b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_MISSED_BEACONS,
448b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_ASSOC_FAILED,
449b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_FAILED,
450b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED,
451b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD,
452b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_HANG_OCCURRED,
453b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_EAPOL_FAILED,
454b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_FAKE_TX,
455b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_DEASSOC,
456b108d8c7SShahar S Matityahu 	IWL_FW_INI_TIME_POINT_NUM,
457b108d8c7SShahar S Matityahu }; /* FW_TLV_DEBUG_TIME_POINT_API_E */
458b108d8c7SShahar S Matityahu 
459cf29c5b6SShahar S Matityahu /**
460cf29c5b6SShahar S Matityahu  * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers
461cf29c5b6SShahar S Matityahu  *
462cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point
463cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data
464cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask.
465cf29c5b6SShahar S Matityahu  *	Append otherwise
466cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration
467cf29c5b6SShahar S Matityahu  * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data.
468cf29c5b6SShahar S Matityahu  *	Append otherwise
469cf29c5b6SShahar S Matityahu  */
470cf29c5b6SShahar S Matityahu enum iwl_fw_ini_trigger_apply_policy {
471cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT	= BIT(0),
472cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_MATCH_DATA		= BIT(1),
473cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS	= BIT(8),
474cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG		= BIT(9),
475cf29c5b6SShahar S Matityahu 	IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA		= BIT(10),
476cf29c5b6SShahar S Matityahu };
477bd294466SSara Sharon #endif
478