1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2012-2014, 2018-2019, 2023 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_fw_api_config_h__
8 #define __iwl_fw_api_config_h__
9 
10 /*
11  * struct iwl_dqa_enable_cmd
12  * @cmd_queue: the TXQ number of the command queue
13  */
14 struct iwl_dqa_enable_cmd {
15 	__le32 cmd_queue;
16 } __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */
17 
18 /*
19  * struct iwl_tx_ant_cfg_cmd
20  * @valid: valid antenna configuration
21  */
22 struct iwl_tx_ant_cfg_cmd {
23 	__le32 valid;
24 } __packed;
25 
26 /**
27  * struct iwl_calib_ctrl - Calibration control struct.
28  * Sent as part of the phy configuration command.
29  * @flow_trigger: bitmap for which calibrations to perform according to
30  *		flow triggers, using &enum iwl_calib_cfg
31  * @event_trigger: bitmap for which calibrations to perform according to
32  *		event triggers, using &enum iwl_calib_cfg
33  */
34 struct iwl_calib_ctrl {
35 	__le32 flow_trigger;
36 	__le32 event_trigger;
37 } __packed;
38 
39 /* This enum defines the bitmap of various calibrations to enable in both
40  * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
41  */
42 enum iwl_calib_cfg {
43 	IWL_CALIB_CFG_XTAL_IDX			= BIT(0),
44 	IWL_CALIB_CFG_TEMPERATURE_IDX		= BIT(1),
45 	IWL_CALIB_CFG_VOLTAGE_READ_IDX		= BIT(2),
46 	IWL_CALIB_CFG_PAPD_IDX			= BIT(3),
47 	IWL_CALIB_CFG_TX_PWR_IDX		= BIT(4),
48 	IWL_CALIB_CFG_DC_IDX			= BIT(5),
49 	IWL_CALIB_CFG_BB_FILTER_IDX		= BIT(6),
50 	IWL_CALIB_CFG_LO_LEAKAGE_IDX		= BIT(7),
51 	IWL_CALIB_CFG_TX_IQ_IDX			= BIT(8),
52 	IWL_CALIB_CFG_TX_IQ_SKEW_IDX		= BIT(9),
53 	IWL_CALIB_CFG_RX_IQ_IDX			= BIT(10),
54 	IWL_CALIB_CFG_RX_IQ_SKEW_IDX		= BIT(11),
55 	IWL_CALIB_CFG_SENSITIVITY_IDX		= BIT(12),
56 	IWL_CALIB_CFG_CHAIN_NOISE_IDX		= BIT(13),
57 	IWL_CALIB_CFG_DISCONNECTED_ANT_IDX	= BIT(14),
58 	IWL_CALIB_CFG_ANT_COUPLING_IDX		= BIT(15),
59 	IWL_CALIB_CFG_DAC_IDX			= BIT(16),
60 	IWL_CALIB_CFG_ABS_IDX			= BIT(17),
61 	IWL_CALIB_CFG_AGC_IDX			= BIT(18),
62 };
63 
64 /**
65  * struct iwl_phy_specific_cfg - specific PHY filter configuration
66  *
67  * Sent as part of the phy configuration command (v3) to configure specific FW
68  * defined PHY filters that can be applied to each antenna.
69  *
70  * @filter_cfg_chains: filter config id for LMAC1 chain A, LMAC1 chain B,
71  *	LMAC2 chain A, LMAC2 chain B (in that order)
72  *	values: 0: no filter; 0xffffffff: reserved; otherwise: filter id
73  */
74 struct iwl_phy_specific_cfg {
75 	__le32 filter_cfg_chains[4];
76 } __packed; /* PHY_SPECIFIC_CONFIGURATION_API_VER_1*/
77 
78 /**
79  * struct iwl_phy_cfg_cmd - Phy configuration command
80  *
81  * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
82  * @calib_control: calibration control data
83  */
84 struct iwl_phy_cfg_cmd_v1 {
85 	__le32	phy_cfg;
86 	struct iwl_calib_ctrl calib_control;
87 } __packed;
88 
89 /**
90  * struct iwl_phy_cfg_cmd_v3 - Phy configuration command (v3)
91  *
92  * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
93  * @calib_control: calibration control data
94  * @phy_specific_cfg: configure predefined PHY filters
95  */
96 struct iwl_phy_cfg_cmd_v3 {
97 	__le32	phy_cfg;
98 	struct iwl_calib_ctrl calib_control;
99 	struct iwl_phy_specific_cfg phy_specific_cfg;
100 } __packed; /* PHY_CONFIGURATION_CMD_API_S_VER_3 */
101 
102 /*
103  * enum iwl_dc2dc_config_id - flag ids
104  *
105  * Ids of dc2dc configuration flags
106  */
107 enum iwl_dc2dc_config_id {
108 	DCDC_LOW_POWER_MODE_MSK_SET  = 0x1, /* not used */
109 	DCDC_FREQ_TUNE_SET = 0x2,
110 }; /* MARKER_ID_API_E_VER_1 */
111 
112 #endif /* __iwl_fw_api_config_h__ */
113