1 // SPDX-License-Identifier: GPL-2.0-only
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
5  * Copyright (C) 2019 Intel Corporation
6  *
7  * Portions of this file are derived from the ipw3945 project, as well
8  * as portions of the ieee80211 subsystem header files.
9  *
10  * Contact Information:
11  *  Intel Linux Wireless <linuxwifi@intel.com>
12  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
13  *****************************************************************************/
14 
15 
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <net/mac80211.h>
20 #include "iwl-io.h"
21 #include "iwl-debug.h"
22 #include "iwl-trans.h"
23 #include "iwl-modparams.h"
24 #include "dev.h"
25 #include "agn.h"
26 #include "commands.h"
27 #include "power.h"
28 
29 static bool force_cam = true;
30 module_param(force_cam, bool, 0644);
31 MODULE_PARM_DESC(force_cam, "force continuously aware mode (no power saving at all)");
32 
33 /*
34  * Setting power level allows the card to go to sleep when not busy.
35  *
36  * We calculate a sleep command based on the required latency, which
37  * we get from mac80211. In order to handle thermal throttling, we can
38  * also use pre-defined power levels.
39  */
40 
41 /*
42  * This defines the old power levels. They are still used by default
43  * (level 1) and for thermal throttle (levels 3 through 5)
44  */
45 
46 struct iwl_power_vec_entry {
47 	struct iwl_powertable_cmd cmd;
48 	u8 no_dtim;	/* number of skip dtim */
49 };
50 
51 #define IWL_DTIM_RANGE_0_MAX	2
52 #define IWL_DTIM_RANGE_1_MAX	10
53 
54 #define NOSLP cpu_to_le16(0), 0, 0
55 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
56 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK |	\
57 		IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
58 		IWL_POWER_ADVANCE_PM_ENA_MSK)
59 #define ASLP_TOUT(T) cpu_to_le32(T)
60 #define TU_TO_USEC 1024
61 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
62 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
63 				     cpu_to_le32(X1), \
64 				     cpu_to_le32(X2), \
65 				     cpu_to_le32(X3), \
66 				     cpu_to_le32(X4)}
67 /* default power management (not Tx power) table values */
68 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
69 /* DTIM 0 - 2 */
70 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
71 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
72 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
73 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
74 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
75 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
76 };
77 
78 
79 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
80 /* DTIM 3 - 10 */
81 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
82 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
83 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
84 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
85 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
86 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
87 };
88 
89 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
90 /* DTIM 11 - */
91 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
92 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
93 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
94 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
95 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
96 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
97 };
98 
99 /* advance power management */
100 /* DTIM 0 - 2 */
101 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
102 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
103 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
104 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
105 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
106 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
107 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
108 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
109 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
110 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
111 		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
112 };
113 
114 
115 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
116 /* DTIM 3 - 10 */
117 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
118 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
119 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
120 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
121 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
122 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
123 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
124 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
125 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
126 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
127 		SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
128 };
129 
130 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
131 /* DTIM 11 - */
132 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
133 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
134 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
135 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
136 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
137 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
138 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
139 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
140 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
141 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
142 		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
143 };
144 
145 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
146 				 struct iwl_powertable_cmd *cmd,
147 				 enum iwl_power_level lvl, int period)
148 {
149 	const struct iwl_power_vec_entry *table;
150 	int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
151 	int i;
152 	u8 skip;
153 	u32 slp_itrvl;
154 
155 	if (priv->lib->adv_pm) {
156 		table = apm_range_2;
157 		if (period <= IWL_DTIM_RANGE_1_MAX)
158 			table = apm_range_1;
159 		if (period <= IWL_DTIM_RANGE_0_MAX)
160 			table = apm_range_0;
161 	} else {
162 		table = range_2;
163 		if (period <= IWL_DTIM_RANGE_1_MAX)
164 			table = range_1;
165 		if (period <= IWL_DTIM_RANGE_0_MAX)
166 			table = range_0;
167 	}
168 
169 	if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
170 		memset(cmd, 0, sizeof(*cmd));
171 	else
172 		*cmd = table[lvl].cmd;
173 
174 	if (period == 0) {
175 		skip = 0;
176 		period = 1;
177 		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
178 			max_sleep[i] =  1;
179 
180 	} else {
181 		skip = table[lvl].no_dtim;
182 		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
183 			max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
184 		max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
185 	}
186 
187 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
188 	/* figure out the listen interval based on dtim period and skip */
189 	if (slp_itrvl == 0xFF)
190 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
191 			cpu_to_le32(period * (skip + 1));
192 
193 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
194 	if (slp_itrvl > period)
195 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
196 			cpu_to_le32((slp_itrvl / period) * period);
197 
198 	if (skip)
199 		cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
200 	else
201 		cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
202 
203 	if (priv->trans->trans_cfg->base_params->shadow_reg_enable)
204 		cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
205 	else
206 		cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
207 
208 	if (iwl_advanced_bt_coexist(priv)) {
209 		if (!priv->lib->bt_params->bt_sco_disable)
210 			cmd->flags |= IWL_POWER_BT_SCO_ENA;
211 		else
212 			cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
213 	}
214 
215 
216 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
217 	if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
218 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
219 			cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
220 
221 	/* enforce max sleep interval */
222 	for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
223 		if (le32_to_cpu(cmd->sleep_interval[i]) >
224 		    (max_sleep[i] * period))
225 			cmd->sleep_interval[i] =
226 				cpu_to_le32(max_sleep[i] * period);
227 		if (i != (IWL_POWER_VEC_SIZE - 1)) {
228 			if (le32_to_cpu(cmd->sleep_interval[i]) >
229 			    le32_to_cpu(cmd->sleep_interval[i+1]))
230 				cmd->sleep_interval[i] =
231 					cmd->sleep_interval[i+1];
232 		}
233 	}
234 
235 	if (priv->power_data.bus_pm)
236 		cmd->flags |= IWL_POWER_PCI_PM_MSK;
237 	else
238 		cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
239 
240 	IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
241 			skip, period);
242 	/* The power level here is 0-4 (used as array index), but user expects
243 	to see 1-5 (according to spec). */
244 	IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
245 }
246 
247 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
248 				    struct iwl_powertable_cmd *cmd)
249 {
250 	memset(cmd, 0, sizeof(*cmd));
251 
252 	if (priv->power_data.bus_pm)
253 		cmd->flags |= IWL_POWER_PCI_PM_MSK;
254 
255 	IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
256 }
257 
258 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
259 {
260 	IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
261 	IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
262 	IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
263 	IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
264 	IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
265 			le32_to_cpu(cmd->sleep_interval[0]),
266 			le32_to_cpu(cmd->sleep_interval[1]),
267 			le32_to_cpu(cmd->sleep_interval[2]),
268 			le32_to_cpu(cmd->sleep_interval[3]),
269 			le32_to_cpu(cmd->sleep_interval[4]));
270 
271 	return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0,
272 				sizeof(struct iwl_powertable_cmd), cmd);
273 }
274 
275 static void iwl_power_build_cmd(struct iwl_priv *priv,
276 				struct iwl_powertable_cmd *cmd)
277 {
278 	bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
279 	int dtimper;
280 
281 	if (force_cam) {
282 		iwl_power_sleep_cam_cmd(priv, cmd);
283 		return;
284 	}
285 
286 	dtimper = priv->hw->conf.ps_dtim_period ?: 1;
287 
288 	if (priv->wowlan)
289 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
290 	else if (!priv->lib->no_idle_support &&
291 		 priv->hw->conf.flags & IEEE80211_CONF_IDLE)
292 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
293 	else if (iwl_tt_is_low_power_state(priv)) {
294 		/* in thermal throttling low power state */
295 		iwl_static_sleep_cmd(priv, cmd,
296 		    iwl_tt_current_power_mode(priv), dtimper);
297 	} else if (!enabled)
298 		iwl_power_sleep_cam_cmd(priv, cmd);
299 	else if (priv->power_data.debug_sleep_level_override >= 0)
300 		iwl_static_sleep_cmd(priv, cmd,
301 				     priv->power_data.debug_sleep_level_override,
302 				     dtimper);
303 	else {
304 		/* Note that the user parameter is 1-5 (according to spec),
305 		but we pass 0-4 because it acts as an array index. */
306 		if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
307 		    iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
308 			iwl_static_sleep_cmd(priv, cmd,
309 				iwlwifi_mod_params.power_level - 1, dtimper);
310 		else
311 			iwl_static_sleep_cmd(priv, cmd,
312 				IWL_POWER_INDEX_1, dtimper);
313 	}
314 }
315 
316 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
317 		       bool force)
318 {
319 	int ret;
320 	bool update_chains;
321 
322 	lockdep_assert_held(&priv->mutex);
323 
324 	/* Don't update the RX chain when chain noise calibration is running */
325 	update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
326 			priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
327 
328 	if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
329 		return 0;
330 
331 	if (!iwl_is_ready_rf(priv))
332 		return -EIO;
333 
334 	/* scan complete use sleep_power_next, need to be updated */
335 	memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
336 	if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
337 		IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
338 		return 0;
339 	}
340 
341 	if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
342 		iwl_dvm_set_pmi(priv, true);
343 
344 	ret = iwl_set_power(priv, cmd);
345 	if (!ret) {
346 		if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
347 			iwl_dvm_set_pmi(priv, false);
348 
349 		if (update_chains)
350 			iwl_update_chain_flags(priv);
351 		else
352 			IWL_DEBUG_POWER(priv,
353 					"Cannot update the power, chain noise "
354 					"calibration running: %d\n",
355 					priv->chain_noise_data.state);
356 
357 		memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
358 	} else
359 		IWL_ERR(priv, "set power fail, ret = %d\n", ret);
360 
361 	return ret;
362 }
363 
364 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
365 {
366 	struct iwl_powertable_cmd cmd;
367 
368 	iwl_power_build_cmd(priv, &cmd);
369 	return iwl_power_set_mode(priv, &cmd, force);
370 }
371 
372 /* initialize to default */
373 void iwl_power_initialize(struct iwl_priv *priv)
374 {
375 	priv->power_data.bus_pm = priv->trans->pm_support;
376 
377 	priv->power_data.debug_sleep_level_override = -1;
378 
379 	memset(&priv->power_data.sleep_cmd, 0,
380 		sizeof(priv->power_data.sleep_cmd));
381 }
382