1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * The full GNU General Public License is included in this distribution in the
18  * file called LICENSE.
19  *
20  * Contact Information:
21  *  Intel Linux Wireless <linuxwifi@intel.com>
22  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
23  *****************************************************************************/
24 
25 
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/slab.h>
29 #include <net/mac80211.h>
30 #include "iwl-io.h"
31 #include "iwl-debug.h"
32 #include "iwl-trans.h"
33 #include "iwl-modparams.h"
34 #include "dev.h"
35 #include "agn.h"
36 #include "commands.h"
37 #include "power.h"
38 
39 static bool force_cam = true;
40 module_param(force_cam, bool, 0644);
41 MODULE_PARM_DESC(force_cam, "force continuously aware mode (no power saving at all)");
42 
43 /*
44  * Setting power level allows the card to go to sleep when not busy.
45  *
46  * We calculate a sleep command based on the required latency, which
47  * we get from mac80211. In order to handle thermal throttling, we can
48  * also use pre-defined power levels.
49  */
50 
51 /*
52  * This defines the old power levels. They are still used by default
53  * (level 1) and for thermal throttle (levels 3 through 5)
54  */
55 
56 struct iwl_power_vec_entry {
57 	struct iwl_powertable_cmd cmd;
58 	u8 no_dtim;	/* number of skip dtim */
59 };
60 
61 #define IWL_DTIM_RANGE_0_MAX	2
62 #define IWL_DTIM_RANGE_1_MAX	10
63 
64 #define NOSLP cpu_to_le16(0), 0, 0
65 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
66 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK |	\
67 		IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
68 		IWL_POWER_ADVANCE_PM_ENA_MSK)
69 #define ASLP_TOUT(T) cpu_to_le32(T)
70 #define TU_TO_USEC 1024
71 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
72 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
73 				     cpu_to_le32(X1), \
74 				     cpu_to_le32(X2), \
75 				     cpu_to_le32(X3), \
76 				     cpu_to_le32(X4)}
77 /* default power management (not Tx power) table values */
78 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
79 /* DTIM 0 - 2 */
80 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
81 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
82 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
83 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
84 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
85 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
86 };
87 
88 
89 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
90 /* DTIM 3 - 10 */
91 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
92 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
93 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
94 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
95 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
96 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
97 };
98 
99 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
100 /* DTIM 11 - */
101 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
102 	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
103 	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
104 	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
105 	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
106 	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
107 };
108 
109 /* advance power management */
110 /* DTIM 0 - 2 */
111 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
112 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
113 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
114 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
115 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
116 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
117 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
118 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
119 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
120 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
121 		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
122 };
123 
124 
125 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
126 /* DTIM 3 - 10 */
127 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
128 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
129 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
130 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
131 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
132 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
133 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
134 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
135 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
136 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
137 		SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
138 };
139 
140 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
141 /* DTIM 11 - */
142 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
143 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
144 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
145 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
146 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
147 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
148 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
149 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
150 		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
151 	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
152 		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
153 };
154 
155 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
156 				 struct iwl_powertable_cmd *cmd,
157 				 enum iwl_power_level lvl, int period)
158 {
159 	const struct iwl_power_vec_entry *table;
160 	int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
161 	int i;
162 	u8 skip;
163 	u32 slp_itrvl;
164 
165 	if (priv->lib->adv_pm) {
166 		table = apm_range_2;
167 		if (period <= IWL_DTIM_RANGE_1_MAX)
168 			table = apm_range_1;
169 		if (period <= IWL_DTIM_RANGE_0_MAX)
170 			table = apm_range_0;
171 	} else {
172 		table = range_2;
173 		if (period <= IWL_DTIM_RANGE_1_MAX)
174 			table = range_1;
175 		if (period <= IWL_DTIM_RANGE_0_MAX)
176 			table = range_0;
177 	}
178 
179 	if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
180 		memset(cmd, 0, sizeof(*cmd));
181 	else
182 		*cmd = table[lvl].cmd;
183 
184 	if (period == 0) {
185 		skip = 0;
186 		period = 1;
187 		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
188 			max_sleep[i] =  1;
189 
190 	} else {
191 		skip = table[lvl].no_dtim;
192 		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
193 			max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
194 		max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
195 	}
196 
197 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
198 	/* figure out the listen interval based on dtim period and skip */
199 	if (slp_itrvl == 0xFF)
200 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
201 			cpu_to_le32(period * (skip + 1));
202 
203 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
204 	if (slp_itrvl > period)
205 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
206 			cpu_to_le32((slp_itrvl / period) * period);
207 
208 	if (skip)
209 		cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
210 	else
211 		cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
212 
213 	if (priv->cfg->base_params->shadow_reg_enable)
214 		cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
215 	else
216 		cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
217 
218 	if (iwl_advanced_bt_coexist(priv)) {
219 		if (!priv->lib->bt_params->bt_sco_disable)
220 			cmd->flags |= IWL_POWER_BT_SCO_ENA;
221 		else
222 			cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
223 	}
224 
225 
226 	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
227 	if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
228 		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
229 			cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
230 
231 	/* enforce max sleep interval */
232 	for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
233 		if (le32_to_cpu(cmd->sleep_interval[i]) >
234 		    (max_sleep[i] * period))
235 			cmd->sleep_interval[i] =
236 				cpu_to_le32(max_sleep[i] * period);
237 		if (i != (IWL_POWER_VEC_SIZE - 1)) {
238 			if (le32_to_cpu(cmd->sleep_interval[i]) >
239 			    le32_to_cpu(cmd->sleep_interval[i+1]))
240 				cmd->sleep_interval[i] =
241 					cmd->sleep_interval[i+1];
242 		}
243 	}
244 
245 	if (priv->power_data.bus_pm)
246 		cmd->flags |= IWL_POWER_PCI_PM_MSK;
247 	else
248 		cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
249 
250 	IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
251 			skip, period);
252 	/* The power level here is 0-4 (used as array index), but user expects
253 	to see 1-5 (according to spec). */
254 	IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
255 }
256 
257 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
258 				    struct iwl_powertable_cmd *cmd)
259 {
260 	memset(cmd, 0, sizeof(*cmd));
261 
262 	if (priv->power_data.bus_pm)
263 		cmd->flags |= IWL_POWER_PCI_PM_MSK;
264 
265 	IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
266 }
267 
268 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
269 {
270 	IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
271 	IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
272 	IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
273 	IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
274 	IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
275 			le32_to_cpu(cmd->sleep_interval[0]),
276 			le32_to_cpu(cmd->sleep_interval[1]),
277 			le32_to_cpu(cmd->sleep_interval[2]),
278 			le32_to_cpu(cmd->sleep_interval[3]),
279 			le32_to_cpu(cmd->sleep_interval[4]));
280 
281 	return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0,
282 				sizeof(struct iwl_powertable_cmd), cmd);
283 }
284 
285 static void iwl_power_build_cmd(struct iwl_priv *priv,
286 				struct iwl_powertable_cmd *cmd)
287 {
288 	bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
289 	int dtimper;
290 
291 	if (force_cam) {
292 		iwl_power_sleep_cam_cmd(priv, cmd);
293 		return;
294 	}
295 
296 	dtimper = priv->hw->conf.ps_dtim_period ?: 1;
297 
298 	if (priv->wowlan)
299 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
300 	else if (!priv->lib->no_idle_support &&
301 		 priv->hw->conf.flags & IEEE80211_CONF_IDLE)
302 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
303 	else if (iwl_tt_is_low_power_state(priv)) {
304 		/* in thermal throttling low power state */
305 		iwl_static_sleep_cmd(priv, cmd,
306 		    iwl_tt_current_power_mode(priv), dtimper);
307 	} else if (!enabled)
308 		iwl_power_sleep_cam_cmd(priv, cmd);
309 	else if (priv->power_data.debug_sleep_level_override >= 0)
310 		iwl_static_sleep_cmd(priv, cmd,
311 				     priv->power_data.debug_sleep_level_override,
312 				     dtimper);
313 	else {
314 		/* Note that the user parameter is 1-5 (according to spec),
315 		but we pass 0-4 because it acts as an array index. */
316 		if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
317 		    iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
318 			iwl_static_sleep_cmd(priv, cmd,
319 				iwlwifi_mod_params.power_level - 1, dtimper);
320 		else
321 			iwl_static_sleep_cmd(priv, cmd,
322 				IWL_POWER_INDEX_1, dtimper);
323 	}
324 }
325 
326 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
327 		       bool force)
328 {
329 	int ret;
330 	bool update_chains;
331 
332 	lockdep_assert_held(&priv->mutex);
333 
334 	/* Don't update the RX chain when chain noise calibration is running */
335 	update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
336 			priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
337 
338 	if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
339 		return 0;
340 
341 	if (!iwl_is_ready_rf(priv))
342 		return -EIO;
343 
344 	/* scan complete use sleep_power_next, need to be updated */
345 	memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
346 	if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
347 		IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
348 		return 0;
349 	}
350 
351 	if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
352 		iwl_dvm_set_pmi(priv, true);
353 
354 	ret = iwl_set_power(priv, cmd);
355 	if (!ret) {
356 		if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
357 			iwl_dvm_set_pmi(priv, false);
358 
359 		if (update_chains)
360 			iwl_update_chain_flags(priv);
361 		else
362 			IWL_DEBUG_POWER(priv,
363 					"Cannot update the power, chain noise "
364 					"calibration running: %d\n",
365 					priv->chain_noise_data.state);
366 
367 		memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
368 	} else
369 		IWL_ERR(priv, "set power fail, ret = %d\n", ret);
370 
371 	return ret;
372 }
373 
374 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
375 {
376 	struct iwl_powertable_cmd cmd;
377 
378 	iwl_power_build_cmd(priv, &cmd);
379 	return iwl_power_set_mode(priv, &cmd, force);
380 }
381 
382 /* initialize to default */
383 void iwl_power_initialize(struct iwl_priv *priv)
384 {
385 	priv->power_data.bus_pm = priv->trans->pm_support;
386 
387 	priv->power_data.debug_sleep_level_override = -1;
388 
389 	memset(&priv->power_data.sleep_cmd, 0,
390 		sizeof(priv->power_data.sleep_cmd));
391 }
392