1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. 5 * 6 * Portions of this file are derived from the ipw3945 project, as well 7 * as portions of the ieee80211 subsystem header files. 8 * 9 * Contact Information: 10 * Intel Linux Wireless <linuxwifi@intel.com> 11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12 *****************************************************************************/ 13 14 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/slab.h> 18 #include <net/mac80211.h> 19 #include "iwl-io.h" 20 #include "iwl-debug.h" 21 #include "iwl-trans.h" 22 #include "iwl-modparams.h" 23 #include "dev.h" 24 #include "agn.h" 25 #include "commands.h" 26 #include "power.h" 27 28 static bool force_cam = true; 29 module_param(force_cam, bool, 0644); 30 MODULE_PARM_DESC(force_cam, "force continuously aware mode (no power saving at all)"); 31 32 /* 33 * Setting power level allows the card to go to sleep when not busy. 34 * 35 * We calculate a sleep command based on the required latency, which 36 * we get from mac80211. In order to handle thermal throttling, we can 37 * also use pre-defined power levels. 38 */ 39 40 /* 41 * This defines the old power levels. They are still used by default 42 * (level 1) and for thermal throttle (levels 3 through 5) 43 */ 44 45 struct iwl_power_vec_entry { 46 struct iwl_powertable_cmd cmd; 47 u8 no_dtim; /* number of skip dtim */ 48 }; 49 50 #define IWL_DTIM_RANGE_0_MAX 2 51 #define IWL_DTIM_RANGE_1_MAX 10 52 53 #define NOSLP cpu_to_le16(0), 0, 0 54 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 55 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \ 56 IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \ 57 IWL_POWER_ADVANCE_PM_ENA_MSK) 58 #define ASLP_TOUT(T) cpu_to_le32(T) 59 #define TU_TO_USEC 1024 60 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC) 61 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \ 62 cpu_to_le32(X1), \ 63 cpu_to_le32(X2), \ 64 cpu_to_le32(X3), \ 65 cpu_to_le32(X4)} 66 /* default power management (not Tx power) table values */ 67 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */ 68 /* DTIM 0 - 2 */ 69 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = { 70 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0}, 71 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, 72 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0}, 73 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1}, 74 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2} 75 }; 76 77 78 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */ 79 /* DTIM 3 - 10 */ 80 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = { 81 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, 82 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0}, 83 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0}, 84 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1}, 85 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2} 86 }; 87 88 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */ 89 /* DTIM 11 - */ 90 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = { 91 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, 92 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, 93 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, 94 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, 95 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} 96 }; 97 98 /* advance power management */ 99 /* DTIM 0 - 2 */ 100 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = { 101 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 102 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 103 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 104 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 105 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 106 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 107 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 108 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 109 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 110 SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2} 111 }; 112 113 114 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */ 115 /* DTIM 3 - 10 */ 116 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = { 117 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 118 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 119 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 120 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 121 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 122 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 123 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 124 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 125 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 126 SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2} 127 }; 128 129 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */ 130 /* DTIM 11 - */ 131 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = { 132 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 133 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 134 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 135 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 136 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 137 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 138 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 139 SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, 140 {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), 141 SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2} 142 }; 143 144 static void iwl_static_sleep_cmd(struct iwl_priv *priv, 145 struct iwl_powertable_cmd *cmd, 146 enum iwl_power_level lvl, int period) 147 { 148 const struct iwl_power_vec_entry *table; 149 int max_sleep[IWL_POWER_VEC_SIZE] = { 0 }; 150 int i; 151 u8 skip; 152 u32 slp_itrvl; 153 154 if (priv->lib->adv_pm) { 155 table = apm_range_2; 156 if (period <= IWL_DTIM_RANGE_1_MAX) 157 table = apm_range_1; 158 if (period <= IWL_DTIM_RANGE_0_MAX) 159 table = apm_range_0; 160 } else { 161 table = range_2; 162 if (period <= IWL_DTIM_RANGE_1_MAX) 163 table = range_1; 164 if (period <= IWL_DTIM_RANGE_0_MAX) 165 table = range_0; 166 } 167 168 if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM)) 169 memset(cmd, 0, sizeof(*cmd)); 170 else 171 *cmd = table[lvl].cmd; 172 173 if (period == 0) { 174 skip = 0; 175 period = 1; 176 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) 177 max_sleep[i] = 1; 178 179 } else { 180 skip = table[lvl].no_dtim; 181 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) 182 max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]); 183 max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1; 184 } 185 186 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); 187 /* figure out the listen interval based on dtim period and skip */ 188 if (slp_itrvl == 0xFF) 189 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = 190 cpu_to_le32(period * (skip + 1)); 191 192 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); 193 if (slp_itrvl > period) 194 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = 195 cpu_to_le32((slp_itrvl / period) * period); 196 197 if (skip) 198 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; 199 else 200 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; 201 202 if (priv->cfg->base_params->shadow_reg_enable) 203 cmd->flags |= IWL_POWER_SHADOW_REG_ENA; 204 else 205 cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA; 206 207 if (iwl_advanced_bt_coexist(priv)) { 208 if (!priv->lib->bt_params->bt_sco_disable) 209 cmd->flags |= IWL_POWER_BT_SCO_ENA; 210 else 211 cmd->flags &= ~IWL_POWER_BT_SCO_ENA; 212 } 213 214 215 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); 216 if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL) 217 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = 218 cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL); 219 220 /* enforce max sleep interval */ 221 for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) { 222 if (le32_to_cpu(cmd->sleep_interval[i]) > 223 (max_sleep[i] * period)) 224 cmd->sleep_interval[i] = 225 cpu_to_le32(max_sleep[i] * period); 226 if (i != (IWL_POWER_VEC_SIZE - 1)) { 227 if (le32_to_cpu(cmd->sleep_interval[i]) > 228 le32_to_cpu(cmd->sleep_interval[i+1])) 229 cmd->sleep_interval[i] = 230 cmd->sleep_interval[i+1]; 231 } 232 } 233 234 if (priv->power_data.bus_pm) 235 cmd->flags |= IWL_POWER_PCI_PM_MSK; 236 else 237 cmd->flags &= ~IWL_POWER_PCI_PM_MSK; 238 239 IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n", 240 skip, period); 241 /* The power level here is 0-4 (used as array index), but user expects 242 to see 1-5 (according to spec). */ 243 IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1); 244 } 245 246 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv, 247 struct iwl_powertable_cmd *cmd) 248 { 249 memset(cmd, 0, sizeof(*cmd)); 250 251 if (priv->power_data.bus_pm) 252 cmd->flags |= IWL_POWER_PCI_PM_MSK; 253 254 IWL_DEBUG_POWER(priv, "Sleep command for CAM\n"); 255 } 256 257 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd) 258 { 259 IWL_DEBUG_POWER(priv, "Sending power/sleep command\n"); 260 IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags); 261 IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); 262 IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout)); 263 IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n", 264 le32_to_cpu(cmd->sleep_interval[0]), 265 le32_to_cpu(cmd->sleep_interval[1]), 266 le32_to_cpu(cmd->sleep_interval[2]), 267 le32_to_cpu(cmd->sleep_interval[3]), 268 le32_to_cpu(cmd->sleep_interval[4])); 269 270 return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0, 271 sizeof(struct iwl_powertable_cmd), cmd); 272 } 273 274 static void iwl_power_build_cmd(struct iwl_priv *priv, 275 struct iwl_powertable_cmd *cmd) 276 { 277 bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS; 278 int dtimper; 279 280 if (force_cam) { 281 iwl_power_sleep_cam_cmd(priv, cmd); 282 return; 283 } 284 285 dtimper = priv->hw->conf.ps_dtim_period ?: 1; 286 287 if (priv->wowlan) 288 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper); 289 else if (!priv->lib->no_idle_support && 290 priv->hw->conf.flags & IEEE80211_CONF_IDLE) 291 iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20); 292 else if (iwl_tt_is_low_power_state(priv)) { 293 /* in thermal throttling low power state */ 294 iwl_static_sleep_cmd(priv, cmd, 295 iwl_tt_current_power_mode(priv), dtimper); 296 } else if (!enabled) 297 iwl_power_sleep_cam_cmd(priv, cmd); 298 else if (priv->power_data.debug_sleep_level_override >= 0) 299 iwl_static_sleep_cmd(priv, cmd, 300 priv->power_data.debug_sleep_level_override, 301 dtimper); 302 else { 303 /* Note that the user parameter is 1-5 (according to spec), 304 but we pass 0-4 because it acts as an array index. */ 305 if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 && 306 iwlwifi_mod_params.power_level <= IWL_POWER_NUM) 307 iwl_static_sleep_cmd(priv, cmd, 308 iwlwifi_mod_params.power_level - 1, dtimper); 309 else 310 iwl_static_sleep_cmd(priv, cmd, 311 IWL_POWER_INDEX_1, dtimper); 312 } 313 } 314 315 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd, 316 bool force) 317 { 318 int ret; 319 bool update_chains; 320 321 lockdep_assert_held(&priv->mutex); 322 323 /* Don't update the RX chain when chain noise calibration is running */ 324 update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE || 325 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE; 326 327 if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force) 328 return 0; 329 330 if (!iwl_is_ready_rf(priv)) 331 return -EIO; 332 333 /* scan complete use sleep_power_next, need to be updated */ 334 memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd)); 335 if (test_bit(STATUS_SCANNING, &priv->status) && !force) { 336 IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n"); 337 return 0; 338 } 339 340 if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK) 341 iwl_dvm_set_pmi(priv, true); 342 343 ret = iwl_set_power(priv, cmd); 344 if (!ret) { 345 if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)) 346 iwl_dvm_set_pmi(priv, false); 347 348 if (update_chains) 349 iwl_update_chain_flags(priv); 350 else 351 IWL_DEBUG_POWER(priv, 352 "Cannot update the power, chain noise " 353 "calibration running: %d\n", 354 priv->chain_noise_data.state); 355 356 memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)); 357 } else 358 IWL_ERR(priv, "set power fail, ret = %d\n", ret); 359 360 return ret; 361 } 362 363 int iwl_power_update_mode(struct iwl_priv *priv, bool force) 364 { 365 struct iwl_powertable_cmd cmd; 366 367 iwl_power_build_cmd(priv, &cmd); 368 return iwl_power_set_mode(priv, &cmd, force); 369 } 370 371 /* initialize to default */ 372 void iwl_power_initialize(struct iwl_priv *priv) 373 { 374 priv->power_data.bus_pm = priv->trans->pm_support; 375 376 priv->power_data.debug_sleep_level_override = -1; 377 378 memset(&priv->power_data.sleep_cmd, 0, 379 sizeof(priv->power_data.sleep_cmd)); 380 } 381