1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2015-2017 Intel Deutschland GmbH 9 * Copyright (C) 2018-2020 Intel Corporation 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * BSD LICENSE 21 * 22 * Copyright(c) 2015-2017 Intel Deutschland GmbH 23 * Copyright (C) 2018-2020 Intel Corporation 24 * All rights reserved. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 30 * * Redistributions of source code must retain the above copyright 31 * notice, this list of conditions and the following disclaimer. 32 * * Redistributions in binary form must reproduce the above copyright 33 * notice, this list of conditions and the following disclaimer in 34 * the documentation and/or other materials provided with the 35 * distribution. 36 * * Neither the name Intel Corporation nor the names of its 37 * contributors may be used to endorse or promote products derived 38 * from this software without specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 *****************************************************************************/ 53 54 #include <linux/module.h> 55 #include <linux/stringify.h> 56 #include "iwl-config.h" 57 #include "iwl-prph.h" 58 59 /* Highest firmware API version supported */ 60 #define IWL_22000_UCODE_API_MAX 56 61 62 /* Lowest firmware API version supported */ 63 #define IWL_22000_UCODE_API_MIN 39 64 65 /* NVM versions */ 66 #define IWL_22000_NVM_VERSION 0x0a1d 67 68 /* Memory offsets and lengths */ 69 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 70 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 71 #define IWL_22000_DCCM2_OFFSET 0x880000 72 #define IWL_22000_DCCM2_LEN 0x8000 73 #define IWL_22000_SMEM_OFFSET 0x400000 74 #define IWL_22000_SMEM_LEN 0xD0000 75 76 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 77 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 78 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 79 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 80 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 81 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 82 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 83 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 84 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 85 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 86 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 87 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 88 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 89 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 90 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 91 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 92 93 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 94 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 95 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 96 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 97 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 98 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 99 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 100 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 101 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 102 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 103 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 104 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 105 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 106 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 107 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 108 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 109 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 110 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 111 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 112 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 113 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 114 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 115 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 116 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 117 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 118 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 119 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 120 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 121 122 static const struct iwl_base_params iwl_22000_base_params = { 123 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 124 .num_of_queues = 512, 125 .max_tfd_queue_size = 256, 126 .shadow_ram_support = true, 127 .led_compensation = 57, 128 .wd_timeout = IWL_LONG_WD_TIMEOUT, 129 .max_event_log_size = 512, 130 .shadow_reg_enable = true, 131 .pcie_l1_allowed = true, 132 }; 133 134 static const struct iwl_base_params iwl_ax210_base_params = { 135 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 136 .num_of_queues = 512, 137 .max_tfd_queue_size = 65536, 138 .shadow_ram_support = true, 139 .led_compensation = 57, 140 .wd_timeout = IWL_LONG_WD_TIMEOUT, 141 .max_event_log_size = 512, 142 .shadow_reg_enable = true, 143 .pcie_l1_allowed = true, 144 }; 145 146 static const struct iwl_ht_params iwl_22000_ht_params = { 147 .stbc = true, 148 .ldpc = true, 149 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ), 150 }; 151 152 #define IWL_DEVICE_22000_COMMON \ 153 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 154 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 155 .led_mode = IWL_LED_RF_STATE, \ 156 .nvm_hw_section_num = 10, \ 157 .non_shared_ant = ANT_B, \ 158 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 159 .dccm_len = IWL_22000_DCCM_LEN, \ 160 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 161 .dccm2_len = IWL_22000_DCCM2_LEN, \ 162 .smem_offset = IWL_22000_SMEM_OFFSET, \ 163 .smem_len = IWL_22000_SMEM_LEN, \ 164 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 165 .apmg_not_supported = true, \ 166 .trans.mq_rx_supported = true, \ 167 .vht_mu_mimo_supported = true, \ 168 .mac_addr_from_csr = true, \ 169 .ht_params = &iwl_22000_ht_params, \ 170 .nvm_ver = IWL_22000_NVM_VERSION, \ 171 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ 172 .trans.use_tfh = true, \ 173 .trans.rf_id = true, \ 174 .trans.gen2 = true, \ 175 .nvm_type = IWL_NVM_EXT, \ 176 .dbgc_supported = true, \ 177 .min_umac_error_event_table = 0x400000, \ 178 .d3_debug_data_base_addr = 0x401000, \ 179 .d3_debug_data_length = 60 * 1024, \ 180 .mon_smem_regs = { \ 181 .write_ptr = { \ 182 .addr = LDBG_M2S_BUF_WPTR, \ 183 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 184 }, \ 185 .cycle_cnt = { \ 186 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 187 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 188 }, \ 189 } 190 191 #define IWL_DEVICE_22500 \ 192 IWL_DEVICE_22000_COMMON, \ 193 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 194 .trans.base_params = &iwl_22000_base_params, \ 195 .gp2_reg_addr = 0xa02c68, \ 196 .mon_dram_regs = { \ 197 .write_ptr = { \ 198 .addr = MON_BUFF_WRPTR_VER2, \ 199 .mask = 0xffffffff, \ 200 }, \ 201 .cycle_cnt = { \ 202 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 203 .mask = 0xffffffff, \ 204 }, \ 205 } 206 207 #define IWL_DEVICE_AX210 \ 208 IWL_DEVICE_22000_COMMON, \ 209 .trans.umac_prph_offset = 0x300000, \ 210 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 211 .trans.base_params = &iwl_ax210_base_params, \ 212 .min_txq_size = 128, \ 213 .gp2_reg_addr = 0xd02c68, \ 214 .min_256_ba_txq_size = 1024, \ 215 .mon_dram_regs = { \ 216 .write_ptr = { \ 217 .addr = DBGC_CUR_DBGBUF_STATUS, \ 218 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 219 }, \ 220 .cycle_cnt = { \ 221 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 222 .mask = 0xffffffff, \ 223 }, \ 224 .cur_frag = { \ 225 .addr = DBGC_CUR_DBGBUF_STATUS, \ 226 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 227 }, \ 228 } 229 230 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 231 .mq_rx_supported = true, 232 .use_tfh = true, 233 .rf_id = true, 234 .gen2 = true, 235 .device_family = IWL_DEVICE_FAMILY_22000, 236 .base_params = &iwl_22000_base_params, 237 }; 238 239 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 240 .mq_rx_supported = true, 241 .use_tfh = true, 242 .rf_id = true, 243 .gen2 = true, 244 .device_family = IWL_DEVICE_FAMILY_22000, 245 .base_params = &iwl_22000_base_params, 246 .integrated = true, 247 .xtal_latency = 5000, 248 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 249 }; 250 251 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 252 .mq_rx_supported = true, 253 .use_tfh = true, 254 .rf_id = true, 255 .gen2 = true, 256 .device_family = IWL_DEVICE_FAMILY_22000, 257 .base_params = &iwl_22000_base_params, 258 .integrated = true, 259 .xtal_latency = 1820, 260 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 261 }; 262 263 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 264 .mq_rx_supported = true, 265 .use_tfh = true, 266 .rf_id = true, 267 .gen2 = true, 268 .device_family = IWL_DEVICE_FAMILY_22000, 269 .base_params = &iwl_22000_base_params, 270 .integrated = true, 271 .xtal_latency = 12000, 272 .low_latency_xtal = true, 273 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 274 }; 275 276 /* 277 * If the device doesn't support HE, no need to have that many buffers. 278 * 22000 devices can split multiple frames into a single RB, so fewer are 279 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 280 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 281 * additional overhead to account for processing time. 282 */ 283 #define IWL_NUM_RBDS_NON_HE 512 284 #define IWL_NUM_RBDS_22000_HE 2048 285 #define IWL_NUM_RBDS_AX210_HE 4096 286 287 /* 288 * All JF radio modules are part of the 9000 series, but the MAC part 289 * looks more like 22000. That's why this device is here, but called 290 * 9560 nevertheless. 291 */ 292 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 293 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 294 IWL_DEVICE_22500, 295 .num_rbds = IWL_NUM_RBDS_NON_HE, 296 }; 297 298 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 299 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 300 IWL_DEVICE_22500, 301 .num_rbds = IWL_NUM_RBDS_NON_HE, 302 }; 303 304 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 305 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 306 IWL_DEVICE_22500, 307 /* 308 * This device doesn't support receiving BlockAck with a large bitmap 309 * so we need to restrict the size of transmitted aggregation to the 310 * HT size; mac80211 would otherwise pick the HE max (256) by default. 311 */ 312 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 313 .num_rbds = IWL_NUM_RBDS_NON_HE, 314 }; 315 316 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 317 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 318 IWL_DEVICE_22500, 319 /* 320 * This device doesn't support receiving BlockAck with a large bitmap 321 * so we need to restrict the size of transmitted aggregation to the 322 * HT size; mac80211 would otherwise pick the HE max (256) by default. 323 */ 324 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 325 .num_rbds = IWL_NUM_RBDS_NON_HE, 326 }; 327 328 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 329 .device_family = IWL_DEVICE_FAMILY_22000, 330 .base_params = &iwl_22000_base_params, 331 .mq_rx_supported = true, 332 .use_tfh = true, 333 .rf_id = true, 334 .gen2 = true, 335 .bisr_workaround = 1, 336 }; 337 338 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 339 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 340 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 341 342 const char iwl_ax200_killer_1650w_name[] = 343 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 344 const char iwl_ax200_killer_1650x_name[] = 345 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 346 347 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 348 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 349 IWL_DEVICE_22500, 350 /* 351 * This device doesn't support receiving BlockAck with a large bitmap 352 * so we need to restrict the size of transmitted aggregation to the 353 * HT size; mac80211 would otherwise pick the HE max (256) by default. 354 */ 355 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 356 .tx_with_siso_diversity = true, 357 .num_rbds = IWL_NUM_RBDS_22000_HE, 358 }; 359 360 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 361 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 362 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 363 IWL_DEVICE_22500, 364 /* 365 * This device doesn't support receiving BlockAck with a large bitmap 366 * so we need to restrict the size of transmitted aggregation to the 367 * HT size; mac80211 would otherwise pick the HE max (256) by default. 368 */ 369 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 370 .num_rbds = IWL_NUM_RBDS_22000_HE, 371 }; 372 373 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 374 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 375 IWL_DEVICE_22500, 376 /* 377 * This device doesn't support receiving BlockAck with a large bitmap 378 * so we need to restrict the size of transmitted aggregation to the 379 * HT size; mac80211 would otherwise pick the HE max (256) by default. 380 */ 381 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 382 .tx_with_siso_diversity = true, 383 .num_rbds = IWL_NUM_RBDS_22000_HE, 384 }; 385 386 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 387 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 388 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 389 IWL_DEVICE_22500, 390 /* 391 * This device doesn't support receiving BlockAck with a large bitmap 392 * so we need to restrict the size of transmitted aggregation to the 393 * HT size; mac80211 would otherwise pick the HE max (256) by default. 394 */ 395 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 396 .num_rbds = IWL_NUM_RBDS_22000_HE, 397 }; 398 399 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 400 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 401 IWL_DEVICE_22500, 402 /* 403 * This device doesn't support receiving BlockAck with a large bitmap 404 * so we need to restrict the size of transmitted aggregation to the 405 * HT size; mac80211 would otherwise pick the HE max (256) by default. 406 */ 407 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 408 .tx_with_siso_diversity = true, 409 .num_rbds = IWL_NUM_RBDS_22000_HE, 410 }; 411 412 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 413 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 414 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 415 IWL_DEVICE_22500, 416 /* 417 * This device doesn't support receiving BlockAck with a large bitmap 418 * so we need to restrict the size of transmitted aggregation to the 419 * HT size; mac80211 would otherwise pick the HE max (256) by default. 420 */ 421 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 422 .num_rbds = IWL_NUM_RBDS_22000_HE, 423 }; 424 425 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 426 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 427 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 428 IWL_DEVICE_22500, 429 /* 430 * This device doesn't support receiving BlockAck with a large bitmap 431 * so we need to restrict the size of transmitted aggregation to the 432 * HT size; mac80211 would otherwise pick the HE max (256) by default. 433 */ 434 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 435 .num_rbds = IWL_NUM_RBDS_22000_HE, 436 }; 437 438 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 439 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 440 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 441 IWL_DEVICE_22500, 442 /* 443 * This device doesn't support receiving BlockAck with a large bitmap 444 * so we need to restrict the size of transmitted aggregation to the 445 * HT size; mac80211 would otherwise pick the HE max (256) by default. 446 */ 447 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 448 .num_rbds = IWL_NUM_RBDS_22000_HE, 449 }; 450 451 const struct iwl_cfg iwl_ax200_cfg_cc = { 452 .fw_name_pre = IWL_CC_A_FW_PRE, 453 IWL_DEVICE_22500, 454 /* 455 * This device doesn't support receiving BlockAck with a large bitmap 456 * so we need to restrict the size of transmitted aggregation to the 457 * HT size; mac80211 would otherwise pick the HE max (256) by default. 458 */ 459 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 460 .num_rbds = IWL_NUM_RBDS_22000_HE, 461 }; 462 463 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 464 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 465 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 466 IWL_DEVICE_22500, 467 /* 468 * This device doesn't support receiving BlockAck with a large bitmap 469 * so we need to restrict the size of transmitted aggregation to the 470 * HT size; mac80211 would otherwise pick the HE max (256) by default. 471 */ 472 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 473 .num_rbds = IWL_NUM_RBDS_22000_HE, 474 }; 475 476 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 477 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 478 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 479 IWL_DEVICE_22500, 480 /* 481 * This device doesn't support receiving BlockAck with a large bitmap 482 * so we need to restrict the size of transmitted aggregation to the 483 * HT size; mac80211 would otherwise pick the HE max (256) by default. 484 */ 485 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 486 .num_rbds = IWL_NUM_RBDS_22000_HE, 487 }; 488 489 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 490 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 491 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 492 IWL_DEVICE_22500, 493 /* 494 * This device doesn't support receiving BlockAck with a large bitmap 495 * so we need to restrict the size of transmitted aggregation to the 496 * HT size; mac80211 would otherwise pick the HE max (256) by default. 497 */ 498 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 499 .num_rbds = IWL_NUM_RBDS_22000_HE, 500 }; 501 502 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 503 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 504 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 505 IWL_DEVICE_22500, 506 /* 507 * This device doesn't support receiving BlockAck with a large bitmap 508 * so we need to restrict the size of transmitted aggregation to the 509 * HT size; mac80211 would otherwise pick the HE max (256) by default. 510 */ 511 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 512 .num_rbds = IWL_NUM_RBDS_22000_HE, 513 }; 514 515 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 516 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 517 IWL_DEVICE_22500, 518 /* 519 * This device doesn't support receiving BlockAck with a large bitmap 520 * so we need to restrict the size of transmitted aggregation to the 521 * HT size; mac80211 would otherwise pick the HE max (256) by default. 522 */ 523 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 524 .num_rbds = IWL_NUM_RBDS_22000_HE, 525 }; 526 527 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = { 528 .name = "Intel(R) Wireless-AC 9560 160MHz", 529 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 530 IWL_DEVICE_AX210, 531 .num_rbds = IWL_NUM_RBDS_NON_HE, 532 }; 533 534 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 535 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 536 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 537 IWL_DEVICE_AX210, 538 .num_rbds = IWL_NUM_RBDS_AX210_HE, 539 }; 540 541 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 542 .name = "Intel(R) Wi-Fi 6 AX211 160MHz", 543 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 544 .uhb_supported = true, 545 IWL_DEVICE_AX210, 546 .num_rbds = IWL_NUM_RBDS_AX210_HE, 547 }; 548 549 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 550 .name = "Intel(R) Wi-Fi 6 AX211 160MHz", 551 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 552 .uhb_supported = true, 553 IWL_DEVICE_AX210, 554 .num_rbds = IWL_NUM_RBDS_AX210_HE, 555 .trans.xtal_latency = 12000, 556 .trans.low_latency_xtal = true, 557 }; 558 559 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 560 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 561 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 562 .uhb_supported = true, 563 IWL_DEVICE_AX210, 564 .num_rbds = IWL_NUM_RBDS_AX210_HE, 565 }; 566 567 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 568 .name = "Intel(R) Wi-Fi 6 AX411 160MHz", 569 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 570 .uhb_supported = true, 571 IWL_DEVICE_AX210, 572 .num_rbds = IWL_NUM_RBDS_AX210_HE, 573 }; 574 575 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 576 .name = "Intel(R) Wi-Fi 6 AX411 160MHz", 577 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 578 .uhb_supported = true, 579 IWL_DEVICE_AX210, 580 .num_rbds = IWL_NUM_RBDS_AX210_HE, 581 .trans.xtal_latency = 12000, 582 .trans.low_latency_xtal = true, 583 }; 584 585 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 586 .name = "Intel(R) Wi-Fi 6 AX411 160MHz", 587 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 588 .uhb_supported = true, 589 IWL_DEVICE_AX210, 590 .num_rbds = IWL_NUM_RBDS_AX210_HE, 591 }; 592 593 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 594 .name = "Intel(R) Wi-Fi 6 AX211 160MHz", 595 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 596 .uhb_supported = true, 597 IWL_DEVICE_AX210, 598 .num_rbds = IWL_NUM_RBDS_AX210_HE, 599 }; 600 601 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 602 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 603 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 604 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 605 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 606 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 607 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 608 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 609 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 610 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 611 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 612 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 613 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 614 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 615