1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2015-2017 Intel Deutschland GmbH 9 * Copyright (C) 2018-2020 Intel Corporation 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * BSD LICENSE 21 * 22 * Copyright(c) 2015-2017 Intel Deutschland GmbH 23 * Copyright (C) 2018-2020 Intel Corporation 24 * All rights reserved. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 30 * * Redistributions of source code must retain the above copyright 31 * notice, this list of conditions and the following disclaimer. 32 * * Redistributions in binary form must reproduce the above copyright 33 * notice, this list of conditions and the following disclaimer in 34 * the documentation and/or other materials provided with the 35 * distribution. 36 * * Neither the name Intel Corporation nor the names of its 37 * contributors may be used to endorse or promote products derived 38 * from this software without specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 *****************************************************************************/ 53 54 #include <linux/module.h> 55 #include <linux/stringify.h> 56 #include "iwl-config.h" 57 #include "iwl-prph.h" 58 59 /* Highest firmware API version supported */ 60 #define IWL_22000_UCODE_API_MAX 57 61 62 /* Lowest firmware API version supported */ 63 #define IWL_22000_UCODE_API_MIN 39 64 65 /* NVM versions */ 66 #define IWL_22000_NVM_VERSION 0x0a1d 67 68 /* Memory offsets and lengths */ 69 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 70 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 71 #define IWL_22000_DCCM2_OFFSET 0x880000 72 #define IWL_22000_DCCM2_LEN 0x8000 73 #define IWL_22000_SMEM_OFFSET 0x400000 74 #define IWL_22000_SMEM_LEN 0xD0000 75 76 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 77 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 78 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 79 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 80 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 81 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 82 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 83 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 84 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 85 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 86 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 87 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 88 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 89 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 90 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 91 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 92 #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 93 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 94 #define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 95 96 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 97 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 98 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 99 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 100 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 101 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 102 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 103 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 104 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 105 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 106 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 107 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 108 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 109 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 110 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 111 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 112 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 113 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 114 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 115 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 116 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 117 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 118 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 119 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 120 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 121 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 122 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 123 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 124 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 125 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 126 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 127 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 128 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 129 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 130 131 static const struct iwl_base_params iwl_22000_base_params = { 132 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 133 .num_of_queues = 512, 134 .max_tfd_queue_size = 256, 135 .shadow_ram_support = true, 136 .led_compensation = 57, 137 .wd_timeout = IWL_LONG_WD_TIMEOUT, 138 .max_event_log_size = 512, 139 .shadow_reg_enable = true, 140 .pcie_l1_allowed = true, 141 }; 142 143 static const struct iwl_base_params iwl_ax210_base_params = { 144 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 145 .num_of_queues = 512, 146 .max_tfd_queue_size = 65536, 147 .shadow_ram_support = true, 148 .led_compensation = 57, 149 .wd_timeout = IWL_LONG_WD_TIMEOUT, 150 .max_event_log_size = 512, 151 .shadow_reg_enable = true, 152 .pcie_l1_allowed = true, 153 }; 154 155 static const struct iwl_ht_params iwl_22000_ht_params = { 156 .stbc = true, 157 .ldpc = true, 158 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ), 159 }; 160 161 #define IWL_DEVICE_22000_COMMON \ 162 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 163 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 164 .led_mode = IWL_LED_RF_STATE, \ 165 .nvm_hw_section_num = 10, \ 166 .non_shared_ant = ANT_B, \ 167 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 168 .dccm_len = IWL_22000_DCCM_LEN, \ 169 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 170 .dccm2_len = IWL_22000_DCCM2_LEN, \ 171 .smem_offset = IWL_22000_SMEM_OFFSET, \ 172 .smem_len = IWL_22000_SMEM_LEN, \ 173 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 174 .apmg_not_supported = true, \ 175 .trans.mq_rx_supported = true, \ 176 .vht_mu_mimo_supported = true, \ 177 .mac_addr_from_csr = true, \ 178 .ht_params = &iwl_22000_ht_params, \ 179 .nvm_ver = IWL_22000_NVM_VERSION, \ 180 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ 181 .trans.use_tfh = true, \ 182 .trans.rf_id = true, \ 183 .trans.gen2 = true, \ 184 .nvm_type = IWL_NVM_EXT, \ 185 .dbgc_supported = true, \ 186 .min_umac_error_event_table = 0x400000, \ 187 .d3_debug_data_base_addr = 0x401000, \ 188 .d3_debug_data_length = 60 * 1024, \ 189 .mon_smem_regs = { \ 190 .write_ptr = { \ 191 .addr = LDBG_M2S_BUF_WPTR, \ 192 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 193 }, \ 194 .cycle_cnt = { \ 195 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 196 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 197 }, \ 198 } 199 200 #define IWL_DEVICE_22500 \ 201 IWL_DEVICE_22000_COMMON, \ 202 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 203 .trans.base_params = &iwl_22000_base_params, \ 204 .gp2_reg_addr = 0xa02c68, \ 205 .mon_dram_regs = { \ 206 .write_ptr = { \ 207 .addr = MON_BUFF_WRPTR_VER2, \ 208 .mask = 0xffffffff, \ 209 }, \ 210 .cycle_cnt = { \ 211 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 212 .mask = 0xffffffff, \ 213 }, \ 214 } 215 216 #define IWL_DEVICE_AX210 \ 217 IWL_DEVICE_22000_COMMON, \ 218 .trans.umac_prph_offset = 0x300000, \ 219 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 220 .trans.base_params = &iwl_ax210_base_params, \ 221 .min_txq_size = 128, \ 222 .gp2_reg_addr = 0xd02c68, \ 223 .min_256_ba_txq_size = 1024, \ 224 .mon_dram_regs = { \ 225 .write_ptr = { \ 226 .addr = DBGC_CUR_DBGBUF_STATUS, \ 227 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 228 }, \ 229 .cycle_cnt = { \ 230 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 231 .mask = 0xffffffff, \ 232 }, \ 233 .cur_frag = { \ 234 .addr = DBGC_CUR_DBGBUF_STATUS, \ 235 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 236 }, \ 237 } 238 239 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 240 .mq_rx_supported = true, 241 .use_tfh = true, 242 .rf_id = true, 243 .gen2 = true, 244 .device_family = IWL_DEVICE_FAMILY_22000, 245 .base_params = &iwl_22000_base_params, 246 }; 247 248 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 249 .mq_rx_supported = true, 250 .use_tfh = true, 251 .rf_id = true, 252 .gen2 = true, 253 .device_family = IWL_DEVICE_FAMILY_22000, 254 .base_params = &iwl_22000_base_params, 255 .integrated = true, 256 .xtal_latency = 500, 257 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 258 }; 259 260 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 261 .mq_rx_supported = true, 262 .use_tfh = true, 263 .rf_id = true, 264 .gen2 = true, 265 .device_family = IWL_DEVICE_FAMILY_22000, 266 .base_params = &iwl_22000_base_params, 267 .integrated = true, 268 .xtal_latency = 1820, 269 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 270 }; 271 272 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 273 .mq_rx_supported = true, 274 .use_tfh = true, 275 .rf_id = true, 276 .gen2 = true, 277 .device_family = IWL_DEVICE_FAMILY_22000, 278 .base_params = &iwl_22000_base_params, 279 .integrated = true, 280 .xtal_latency = 12000, 281 .low_latency_xtal = true, 282 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 283 }; 284 285 /* 286 * If the device doesn't support HE, no need to have that many buffers. 287 * 22000 devices can split multiple frames into a single RB, so fewer are 288 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 289 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 290 * additional overhead to account for processing time. 291 */ 292 #define IWL_NUM_RBDS_NON_HE 512 293 #define IWL_NUM_RBDS_22000_HE 2048 294 #define IWL_NUM_RBDS_AX210_HE 4096 295 296 /* 297 * All JF radio modules are part of the 9000 series, but the MAC part 298 * looks more like 22000. That's why this device is here, but called 299 * 9560 nevertheless. 300 */ 301 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 302 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 303 IWL_DEVICE_22500, 304 .num_rbds = IWL_NUM_RBDS_NON_HE, 305 }; 306 307 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 308 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 309 IWL_DEVICE_22500, 310 .num_rbds = IWL_NUM_RBDS_NON_HE, 311 }; 312 313 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 314 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 315 IWL_DEVICE_22500, 316 /* 317 * This device doesn't support receiving BlockAck with a large bitmap 318 * so we need to restrict the size of transmitted aggregation to the 319 * HT size; mac80211 would otherwise pick the HE max (256) by default. 320 */ 321 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 322 .num_rbds = IWL_NUM_RBDS_NON_HE, 323 }; 324 325 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 326 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 327 IWL_DEVICE_22500, 328 /* 329 * This device doesn't support receiving BlockAck with a large bitmap 330 * so we need to restrict the size of transmitted aggregation to the 331 * HT size; mac80211 would otherwise pick the HE max (256) by default. 332 */ 333 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 334 .num_rbds = IWL_NUM_RBDS_NON_HE, 335 }; 336 337 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 338 .device_family = IWL_DEVICE_FAMILY_22000, 339 .base_params = &iwl_22000_base_params, 340 .mq_rx_supported = true, 341 .use_tfh = true, 342 .rf_id = true, 343 .gen2 = true, 344 .bisr_workaround = 1, 345 }; 346 347 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 348 .device_family = IWL_DEVICE_FAMILY_AX210, 349 .base_params = &iwl_ax210_base_params, 350 .mq_rx_supported = true, 351 .use_tfh = true, 352 .rf_id = true, 353 .gen2 = true, 354 .integrated = true, 355 .umac_prph_offset = 0x300000 356 }; 357 358 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 359 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 360 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 361 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz"; 362 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz"; 363 const char iwl_ma_name[] = "Intel(R) Wi-Fi 6"; 364 365 const char iwl_ax200_killer_1650w_name[] = 366 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 367 const char iwl_ax200_killer_1650x_name[] = 368 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 369 const char iwl_ax201_killer_1650s_name[] = 370 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 371 const char iwl_ax201_killer_1650i_name[] = 372 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 373 374 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 375 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 376 IWL_DEVICE_22500, 377 /* 378 * This device doesn't support receiving BlockAck with a large bitmap 379 * so we need to restrict the size of transmitted aggregation to the 380 * HT size; mac80211 would otherwise pick the HE max (256) by default. 381 */ 382 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 383 .tx_with_siso_diversity = true, 384 .num_rbds = IWL_NUM_RBDS_22000_HE, 385 }; 386 387 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 388 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 389 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 390 IWL_DEVICE_22500, 391 /* 392 * This device doesn't support receiving BlockAck with a large bitmap 393 * so we need to restrict the size of transmitted aggregation to the 394 * HT size; mac80211 would otherwise pick the HE max (256) by default. 395 */ 396 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 397 .num_rbds = IWL_NUM_RBDS_22000_HE, 398 }; 399 400 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 401 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 402 IWL_DEVICE_22500, 403 /* 404 * This device doesn't support receiving BlockAck with a large bitmap 405 * so we need to restrict the size of transmitted aggregation to the 406 * HT size; mac80211 would otherwise pick the HE max (256) by default. 407 */ 408 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 409 .tx_with_siso_diversity = true, 410 .num_rbds = IWL_NUM_RBDS_22000_HE, 411 }; 412 413 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 414 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 415 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 416 IWL_DEVICE_22500, 417 /* 418 * This device doesn't support receiving BlockAck with a large bitmap 419 * so we need to restrict the size of transmitted aggregation to the 420 * HT size; mac80211 would otherwise pick the HE max (256) by default. 421 */ 422 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 423 .num_rbds = IWL_NUM_RBDS_22000_HE, 424 }; 425 426 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 427 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 428 IWL_DEVICE_22500, 429 /* 430 * This device doesn't support receiving BlockAck with a large bitmap 431 * so we need to restrict the size of transmitted aggregation to the 432 * HT size; mac80211 would otherwise pick the HE max (256) by default. 433 */ 434 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 435 .tx_with_siso_diversity = true, 436 .num_rbds = IWL_NUM_RBDS_22000_HE, 437 }; 438 439 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 440 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 441 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 442 IWL_DEVICE_22500, 443 /* 444 * This device doesn't support receiving BlockAck with a large bitmap 445 * so we need to restrict the size of transmitted aggregation to the 446 * HT size; mac80211 would otherwise pick the HE max (256) by default. 447 */ 448 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 449 .num_rbds = IWL_NUM_RBDS_22000_HE, 450 }; 451 452 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 453 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 454 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 455 IWL_DEVICE_22500, 456 /* 457 * This device doesn't support receiving BlockAck with a large bitmap 458 * so we need to restrict the size of transmitted aggregation to the 459 * HT size; mac80211 would otherwise pick the HE max (256) by default. 460 */ 461 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 462 .num_rbds = IWL_NUM_RBDS_22000_HE, 463 }; 464 465 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 466 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 467 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 468 IWL_DEVICE_22500, 469 /* 470 * This device doesn't support receiving BlockAck with a large bitmap 471 * so we need to restrict the size of transmitted aggregation to the 472 * HT size; mac80211 would otherwise pick the HE max (256) by default. 473 */ 474 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 475 .num_rbds = IWL_NUM_RBDS_22000_HE, 476 }; 477 478 const struct iwl_cfg iwl_ax200_cfg_cc = { 479 .fw_name_pre = IWL_CC_A_FW_PRE, 480 IWL_DEVICE_22500, 481 /* 482 * This device doesn't support receiving BlockAck with a large bitmap 483 * so we need to restrict the size of transmitted aggregation to the 484 * HT size; mac80211 would otherwise pick the HE max (256) by default. 485 */ 486 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 487 .num_rbds = IWL_NUM_RBDS_22000_HE, 488 }; 489 490 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 491 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 492 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 493 IWL_DEVICE_22500, 494 /* 495 * This device doesn't support receiving BlockAck with a large bitmap 496 * so we need to restrict the size of transmitted aggregation to the 497 * HT size; mac80211 would otherwise pick the HE max (256) by default. 498 */ 499 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 500 .num_rbds = IWL_NUM_RBDS_22000_HE, 501 }; 502 503 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 504 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 505 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 506 IWL_DEVICE_22500, 507 /* 508 * This device doesn't support receiving BlockAck with a large bitmap 509 * so we need to restrict the size of transmitted aggregation to the 510 * HT size; mac80211 would otherwise pick the HE max (256) by default. 511 */ 512 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 513 .num_rbds = IWL_NUM_RBDS_22000_HE, 514 }; 515 516 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 517 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 518 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 519 IWL_DEVICE_22500, 520 /* 521 * This device doesn't support receiving BlockAck with a large bitmap 522 * so we need to restrict the size of transmitted aggregation to the 523 * HT size; mac80211 would otherwise pick the HE max (256) by default. 524 */ 525 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 526 .num_rbds = IWL_NUM_RBDS_22000_HE, 527 }; 528 529 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 530 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 531 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 532 IWL_DEVICE_22500, 533 /* 534 * This device doesn't support receiving BlockAck with a large bitmap 535 * so we need to restrict the size of transmitted aggregation to the 536 * HT size; mac80211 would otherwise pick the HE max (256) by default. 537 */ 538 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 539 .num_rbds = IWL_NUM_RBDS_22000_HE, 540 }; 541 542 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 543 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 544 IWL_DEVICE_22500, 545 /* 546 * This device doesn't support receiving BlockAck with a large bitmap 547 * so we need to restrict the size of transmitted aggregation to the 548 * HT size; mac80211 would otherwise pick the HE max (256) by default. 549 */ 550 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 551 .num_rbds = IWL_NUM_RBDS_22000_HE, 552 }; 553 554 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = { 555 .name = "Intel(R) Wireless-AC 9560 160MHz", 556 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 557 IWL_DEVICE_AX210, 558 .num_rbds = IWL_NUM_RBDS_NON_HE, 559 }; 560 561 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 562 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 563 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 564 IWL_DEVICE_AX210, 565 .num_rbds = IWL_NUM_RBDS_AX210_HE, 566 }; 567 568 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 569 .name = iwl_ax211_name, 570 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 571 .uhb_supported = true, 572 IWL_DEVICE_AX210, 573 .num_rbds = IWL_NUM_RBDS_AX210_HE, 574 }; 575 576 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 577 .name = iwl_ax211_name, 578 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 579 .uhb_supported = true, 580 IWL_DEVICE_AX210, 581 .num_rbds = IWL_NUM_RBDS_AX210_HE, 582 .trans.xtal_latency = 12000, 583 .trans.low_latency_xtal = true, 584 }; 585 586 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 587 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 588 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 589 .uhb_supported = true, 590 IWL_DEVICE_AX210, 591 .num_rbds = IWL_NUM_RBDS_AX210_HE, 592 }; 593 594 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 595 .name = iwl_ax411_name, 596 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 597 .uhb_supported = true, 598 IWL_DEVICE_AX210, 599 .num_rbds = IWL_NUM_RBDS_AX210_HE, 600 }; 601 602 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 603 .name = iwl_ax411_name, 604 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 605 .uhb_supported = true, 606 IWL_DEVICE_AX210, 607 .num_rbds = IWL_NUM_RBDS_AX210_HE, 608 .trans.xtal_latency = 12000, 609 .trans.low_latency_xtal = true, 610 }; 611 612 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 613 .name = iwl_ax411_name, 614 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 615 .uhb_supported = true, 616 IWL_DEVICE_AX210, 617 .num_rbds = IWL_NUM_RBDS_AX210_HE, 618 }; 619 620 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 621 .name = iwl_ax211_name, 622 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 623 .uhb_supported = true, 624 IWL_DEVICE_AX210, 625 .num_rbds = IWL_NUM_RBDS_AX210_HE, 626 }; 627 628 const struct iwl_cfg iwlax201_cfg_snj_hr_b0 = { 629 .name = iwl_ax201_name, 630 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 631 .uhb_supported = true, 632 IWL_DEVICE_AX210, 633 .num_rbds = IWL_NUM_RBDS_AX210_HE, 634 }; 635 636 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 637 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 638 .uhb_supported = true, 639 IWL_DEVICE_AX210, 640 .num_rbds = IWL_NUM_RBDS_AX210_HE, 641 }; 642 643 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 644 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 645 .uhb_supported = true, 646 IWL_DEVICE_AX210, 647 .num_rbds = IWL_NUM_RBDS_AX210_HE, 648 }; 649 650 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 651 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 652 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 653 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 654 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 655 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 656 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 657 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 658 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 659 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 660 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 661 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 662 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 663 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 664 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 665 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 666 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 667