1 /****************************************************************************** 2 * 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * GPL LICENSE SUMMARY 7 * 8 * Copyright(c) 2015-2017 Intel Deutschland GmbH 9 * Copyright (C) 2018 Intel Corporation 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * BSD LICENSE 21 * 22 * Copyright(c) 2015-2017 Intel Deutschland GmbH 23 * Copyright (C) 2018 Intel Corporation 24 * All rights reserved. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 30 * * Redistributions of source code must retain the above copyright 31 * notice, this list of conditions and the following disclaimer. 32 * * Redistributions in binary form must reproduce the above copyright 33 * notice, this list of conditions and the following disclaimer in 34 * the documentation and/or other materials provided with the 35 * distribution. 36 * * Neither the name Intel Corporation nor the names of its 37 * contributors may be used to endorse or promote products derived 38 * from this software without specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 * 52 *****************************************************************************/ 53 54 #include <linux/module.h> 55 #include <linux/stringify.h> 56 #include "iwl-config.h" 57 58 /* Highest firmware API version supported */ 59 #define IWL_22000_UCODE_API_MAX 38 60 61 /* Lowest firmware API version supported */ 62 #define IWL_22000_UCODE_API_MIN 39 63 64 /* NVM versions */ 65 #define IWL_22000_NVM_VERSION 0x0a1d 66 #define IWL_22000_TX_POWER_VERSION 0xffff /* meaningless */ 67 68 /* Memory offsets and lengths */ 69 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 70 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 71 #define IWL_22000_DCCM2_OFFSET 0x880000 72 #define IWL_22000_DCCM2_LEN 0x8000 73 #define IWL_22000_SMEM_OFFSET 0x400000 74 #define IWL_22000_SMEM_LEN 0xD0000 75 76 #define IWL_22000_JF_FW_PRE "iwlwifi-Qu-a0-jf-b0-" 77 #define IWL_22000_HR_FW_PRE "iwlwifi-Qu-a0-hr-a0-" 78 #define IWL_22000_HR_CDB_FW_PRE "iwlwifi-QuIcp-z0-hrcdb-a0-" 79 #define IWL_22000_HR_A_F0_FW_PRE "iwlwifi-QuQnj-f0-hr-a0-" 80 #define IWL_22000_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 81 #define IWL_22000_JF_B0_FW_PRE "iwlwifi-QuQnj-a0-jf-b0-" 82 #define IWL_22000_HR_A0_FW_PRE "iwlwifi-QuQnj-a0-hr-a0-" 83 #define IWL_22000_SU_Z0_FW_PRE "iwlwifi-su-z0-" 84 85 #define IWL_22000_HR_MODULE_FIRMWARE(api) \ 86 IWL_22000_HR_FW_PRE __stringify(api) ".ucode" 87 #define IWL_22000_JF_MODULE_FIRMWARE(api) \ 88 IWL_22000_JF_FW_PRE __stringify(api) ".ucode" 89 #define IWL_22000_HR_A_F0_QNJ_MODULE_FIRMWARE(api) \ 90 IWL_22000_HR_A_F0_FW_PRE __stringify(api) ".ucode" 91 #define IWL_22000_HR_B_QNJ_MODULE_FIRMWARE(api) \ 92 IWL_22000_HR_B_FW_PRE __stringify(api) ".ucode" 93 #define IWL_22000_JF_B0_QNJ_MODULE_FIRMWARE(api) \ 94 IWL_22000_JF_B0_FW_PRE __stringify(api) ".ucode" 95 #define IWL_22000_HR_A0_QNJ_MODULE_FIRMWARE(api) \ 96 IWL_22000_HR_A0_FW_PRE __stringify(api) ".ucode" 97 #define IWL_22000_SU_Z0_MODULE_FIRMWARE(api) \ 98 IWL_22000_SU_Z0_FW_PRE __stringify(api) ".ucode" 99 100 #define NVM_HW_SECTION_NUM_FAMILY_22000 10 101 102 static const struct iwl_base_params iwl_22000_base_params = { 103 .eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_22000, 104 .num_of_queues = 512, 105 .max_tfd_queue_size = 256, 106 .shadow_ram_support = true, 107 .led_compensation = 57, 108 .wd_timeout = IWL_LONG_WD_TIMEOUT, 109 .max_event_log_size = 512, 110 .shadow_reg_enable = true, 111 .pcie_l1_allowed = true, 112 }; 113 114 static const struct iwl_base_params iwl_22560_base_params = { 115 .eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_22000, 116 .num_of_queues = 512, 117 .max_tfd_queue_size = 65536, 118 .shadow_ram_support = true, 119 .led_compensation = 57, 120 .wd_timeout = IWL_LONG_WD_TIMEOUT, 121 .max_event_log_size = 512, 122 .shadow_reg_enable = true, 123 .pcie_l1_allowed = true, 124 }; 125 126 static const struct iwl_ht_params iwl_22000_ht_params = { 127 .stbc = true, 128 .ldpc = true, 129 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ), 130 }; 131 132 #define IWL_DEVICE_22000_COMMON \ 133 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 134 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 135 .led_mode = IWL_LED_RF_STATE, \ 136 .nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_22000, \ 137 .non_shared_ant = ANT_A, \ 138 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 139 .dccm_len = IWL_22000_DCCM_LEN, \ 140 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 141 .dccm2_len = IWL_22000_DCCM2_LEN, \ 142 .smem_offset = IWL_22000_SMEM_OFFSET, \ 143 .smem_len = IWL_22000_SMEM_LEN, \ 144 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 145 .apmg_not_supported = true, \ 146 .mq_rx_supported = true, \ 147 .vht_mu_mimo_supported = true, \ 148 .mac_addr_from_csr = true, \ 149 .ht_params = &iwl_22000_ht_params, \ 150 .nvm_ver = IWL_22000_NVM_VERSION, \ 151 .nvm_calib_ver = IWL_22000_TX_POWER_VERSION, \ 152 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ 153 .use_tfh = true, \ 154 .rf_id = true, \ 155 .gen2 = true, \ 156 .nvm_type = IWL_NVM_EXT, \ 157 .dbgc_supported = true, \ 158 .min_umac_error_event_table = 0x400000 159 160 #define IWL_DEVICE_22500 \ 161 IWL_DEVICE_22000_COMMON, \ 162 .device_family = IWL_DEVICE_FAMILY_22000, \ 163 .base_params = &iwl_22000_base_params, \ 164 .csr = &iwl_csr_v1 165 166 #define IWL_DEVICE_22560 \ 167 IWL_DEVICE_22000_COMMON, \ 168 .device_family = IWL_DEVICE_FAMILY_22560, \ 169 .base_params = &iwl_22560_base_params, \ 170 .csr = &iwl_csr_v2 171 172 const struct iwl_cfg iwl22000_2ac_cfg_hr = { 173 .name = "Intel(R) Dual Band Wireless AC 22000", 174 .fw_name_pre = IWL_22000_HR_FW_PRE, 175 IWL_DEVICE_22500, 176 }; 177 178 const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb = { 179 .name = "Intel(R) Dual Band Wireless AC 22000", 180 .fw_name_pre = IWL_22000_HR_CDB_FW_PRE, 181 IWL_DEVICE_22500, 182 .cdb = true, 183 }; 184 185 const struct iwl_cfg iwl22000_2ac_cfg_jf = { 186 .name = "Intel(R) Dual Band Wireless AC 22000", 187 .fw_name_pre = IWL_22000_JF_FW_PRE, 188 IWL_DEVICE_22500, 189 }; 190 191 const struct iwl_cfg iwl22000_2ax_cfg_hr = { 192 .name = "Intel(R) Dual Band Wireless AX 22000", 193 .fw_name_pre = IWL_22000_HR_FW_PRE, 194 IWL_DEVICE_22500, 195 /* 196 * This device doesn't support receiving BlockAck with a large bitmap 197 * so we need to restrict the size of transmitted aggregation to the 198 * HT size; mac80211 would otherwise pick the HE max (256) by default. 199 */ 200 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 201 }; 202 203 const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0 = { 204 .name = "Intel(R) Dual Band Wireless AX 22000", 205 .fw_name_pre = IWL_22000_HR_A_F0_FW_PRE, 206 IWL_DEVICE_22500, 207 /* 208 * This device doesn't support receiving BlockAck with a large bitmap 209 * so we need to restrict the size of transmitted aggregation to the 210 * HT size; mac80211 would otherwise pick the HE max (256) by default. 211 */ 212 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 213 }; 214 215 const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0 = { 216 .name = "Intel(R) Dual Band Wireless AX 22000", 217 .fw_name_pre = IWL_22000_HR_B_FW_PRE, 218 IWL_DEVICE_22500, 219 /* 220 * This device doesn't support receiving BlockAck with a large bitmap 221 * so we need to restrict the size of transmitted aggregation to the 222 * HT size; mac80211 would otherwise pick the HE max (256) by default. 223 */ 224 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 225 }; 226 227 const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0 = { 228 .name = "Intel(R) Dual Band Wireless AX 22000", 229 .fw_name_pre = IWL_22000_JF_B0_FW_PRE, 230 IWL_DEVICE_22500, 231 /* 232 * This device doesn't support receiving BlockAck with a large bitmap 233 * so we need to restrict the size of transmitted aggregation to the 234 * HT size; mac80211 would otherwise pick the HE max (256) by default. 235 */ 236 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 237 }; 238 239 const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0 = { 240 .name = "Intel(R) Dual Band Wireless AX 22000", 241 .fw_name_pre = IWL_22000_HR_A0_FW_PRE, 242 IWL_DEVICE_22500, 243 /* 244 * This device doesn't support receiving BlockAck with a large bitmap 245 * so we need to restrict the size of transmitted aggregation to the 246 * HT size; mac80211 would otherwise pick the HE max (256) by default. 247 */ 248 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 249 }; 250 251 const struct iwl_cfg iwl22560_2ax_cfg_su_cdb = { 252 .name = "Intel(R) Dual Band Wireless AX 22560", 253 .fw_name_pre = IWL_22000_SU_Z0_FW_PRE, 254 IWL_DEVICE_22560, 255 .cdb = true, 256 /* 257 * This device doesn't support receiving BlockAck with a large bitmap 258 * so we need to restrict the size of transmitted aggregation to the 259 * HT size; mac80211 would otherwise pick the HE max (256) by default. 260 */ 261 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 262 }; 263 264 MODULE_FIRMWARE(IWL_22000_HR_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 265 MODULE_FIRMWARE(IWL_22000_JF_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 266 MODULE_FIRMWARE(IWL_22000_HR_A_F0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 267 MODULE_FIRMWARE(IWL_22000_HR_B_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 268 MODULE_FIRMWARE(IWL_22000_JF_B0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 269 MODULE_FIRMWARE(IWL_22000_HR_A0_QNJ_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 270 MODULE_FIRMWARE(IWL_22000_SU_Z0_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 271