1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2020 Intel Corporation 5 */ 6 #include <linux/module.h> 7 #include <linux/stringify.h> 8 #include "iwl-config.h" 9 #include "iwl-prph.h" 10 11 /* Highest firmware API version supported */ 12 #define IWL_22000_UCODE_API_MAX 63 13 14 /* Lowest firmware API version supported */ 15 #define IWL_22000_UCODE_API_MIN 39 16 17 /* NVM versions */ 18 #define IWL_22000_NVM_VERSION 0x0a1d 19 20 /* Memory offsets and lengths */ 21 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 22 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 23 #define IWL_22000_DCCM2_OFFSET 0x880000 24 #define IWL_22000_DCCM2_LEN 0x8000 25 #define IWL_22000_SMEM_OFFSET 0x400000 26 #define IWL_22000_SMEM_LEN 0xD0000 27 28 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 29 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 30 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 31 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 32 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 33 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 34 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 35 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 36 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 37 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 38 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 39 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 40 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 41 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 42 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 43 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 44 #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 45 #define IWL_SNJ_A_JF_B_FW_PRE "iwlwifi-SoSnj-a0-jf-b0-" 46 #define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0-" 47 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 48 #define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0-" 49 #define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 50 #define IWL_MA_A_FM_A_FW_PRE "iwlwifi-ma-a0-fm-a0-" 51 #define IWL_SNJ_A_MR_A_FW_PRE "iwlwifi-SoSnj-a0-mr-a0-" 52 #define IWL_BZ_A_HR_B_FW_PRE "iwlwifi-bz-a0-hr-b0-" 53 #define IWL_BZ_A_GF_A_FW_PRE "iwlwifi-bz-a0-gf-a0-" 54 #define IWL_BZ_A_GF4_A_FW_PRE "iwlwifi-bz-a0-gf4-a0-" 55 #define IWL_BZ_A_MR_A_FW_PRE "iwlwifi-bz-a0-mr-a0-" 56 57 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 58 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 59 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 60 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 61 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 62 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 63 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 64 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 65 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 66 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 67 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 68 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 69 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 70 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 71 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 72 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 73 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 74 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 75 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 76 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 77 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 78 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 79 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 80 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 81 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 82 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 83 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 84 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 85 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 86 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 87 #define IWL_SNJ_A_JF_B_MODULE_FIRMWARE(api) \ 88 IWL_SNJ_A_JF_B_FW_PRE __stringify(api) ".ucode" 89 #define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \ 90 IWL_MA_A_HR_B_FW_PRE __stringify(api) ".ucode" 91 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 92 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 93 #define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \ 94 IWL_MA_A_GF4_A_FW_PRE __stringify(api) ".ucode" 95 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 96 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 97 #define IWL_MA_A_FM_A_FW_MODULE_FIRMWARE(api) \ 98 IWL_MA_A_FM_A_FW_PRE __stringify(api) ".ucode" 99 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \ 100 IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode" 101 #define IWL_BZ_A_HR_B_MODULE_FIRMWARE(api) \ 102 IWL_BZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 103 #define IWL_BZ_A_GF_A_MODULE_FIRMWARE(api) \ 104 IWL_BZ_A_GF_A_FW_PRE __stringify(api) ".ucode" 105 #define IWL_BZ_A_GF4_A_MODULE_FIRMWARE(api) \ 106 IWL_BZ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 107 #define IWL_BZ_A_MR_A_MODULE_FIRMWARE(api) \ 108 IWL_BZ_A_MR_A_FW_PRE __stringify(api) ".ucode" 109 110 static const struct iwl_base_params iwl_22000_base_params = { 111 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 112 .num_of_queues = 512, 113 .max_tfd_queue_size = 256, 114 .shadow_ram_support = true, 115 .led_compensation = 57, 116 .wd_timeout = IWL_LONG_WD_TIMEOUT, 117 .max_event_log_size = 512, 118 .shadow_reg_enable = true, 119 .pcie_l1_allowed = true, 120 }; 121 122 static const struct iwl_base_params iwl_ax210_base_params = { 123 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 124 .num_of_queues = 512, 125 .max_tfd_queue_size = 65536, 126 .shadow_ram_support = true, 127 .led_compensation = 57, 128 .wd_timeout = IWL_LONG_WD_TIMEOUT, 129 .max_event_log_size = 512, 130 .shadow_reg_enable = true, 131 .pcie_l1_allowed = true, 132 }; 133 134 static const struct iwl_ht_params iwl_22000_ht_params = { 135 .stbc = true, 136 .ldpc = true, 137 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) | 138 BIT(NL80211_BAND_6GHZ), 139 }; 140 141 #define IWL_DEVICE_22000_COMMON \ 142 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 143 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 144 .led_mode = IWL_LED_RF_STATE, \ 145 .nvm_hw_section_num = 10, \ 146 .non_shared_ant = ANT_B, \ 147 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 148 .dccm_len = IWL_22000_DCCM_LEN, \ 149 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 150 .dccm2_len = IWL_22000_DCCM2_LEN, \ 151 .smem_offset = IWL_22000_SMEM_OFFSET, \ 152 .smem_len = IWL_22000_SMEM_LEN, \ 153 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 154 .apmg_not_supported = true, \ 155 .trans.mq_rx_supported = true, \ 156 .vht_mu_mimo_supported = true, \ 157 .mac_addr_from_csr = true, \ 158 .ht_params = &iwl_22000_ht_params, \ 159 .nvm_ver = IWL_22000_NVM_VERSION, \ 160 .trans.use_tfh = true, \ 161 .trans.rf_id = true, \ 162 .trans.gen2 = true, \ 163 .nvm_type = IWL_NVM_EXT, \ 164 .dbgc_supported = true, \ 165 .min_umac_error_event_table = 0x400000, \ 166 .d3_debug_data_base_addr = 0x401000, \ 167 .d3_debug_data_length = 60 * 1024, \ 168 .mon_smem_regs = { \ 169 .write_ptr = { \ 170 .addr = LDBG_M2S_BUF_WPTR, \ 171 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 172 }, \ 173 .cycle_cnt = { \ 174 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 175 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 176 }, \ 177 } 178 179 #define IWL_DEVICE_22500 \ 180 IWL_DEVICE_22000_COMMON, \ 181 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 182 .trans.base_params = &iwl_22000_base_params, \ 183 .gp2_reg_addr = 0xa02c68, \ 184 .mon_dram_regs = { \ 185 .write_ptr = { \ 186 .addr = MON_BUFF_WRPTR_VER2, \ 187 .mask = 0xffffffff, \ 188 }, \ 189 .cycle_cnt = { \ 190 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 191 .mask = 0xffffffff, \ 192 }, \ 193 } 194 195 #define IWL_DEVICE_AX210 \ 196 IWL_DEVICE_22000_COMMON, \ 197 .trans.umac_prph_offset = 0x300000, \ 198 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 199 .trans.base_params = &iwl_ax210_base_params, \ 200 .min_txq_size = 128, \ 201 .gp2_reg_addr = 0xd02c68, \ 202 .min_256_ba_txq_size = 1024, \ 203 .mon_dram_regs = { \ 204 .write_ptr = { \ 205 .addr = DBGC_CUR_DBGBUF_STATUS, \ 206 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 207 }, \ 208 .cycle_cnt = { \ 209 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 210 .mask = 0xffffffff, \ 211 }, \ 212 .cur_frag = { \ 213 .addr = DBGC_CUR_DBGBUF_STATUS, \ 214 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 215 }, \ 216 } 217 218 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 219 .mq_rx_supported = true, 220 .use_tfh = true, 221 .rf_id = true, 222 .gen2 = true, 223 .device_family = IWL_DEVICE_FAMILY_22000, 224 .base_params = &iwl_22000_base_params, 225 }; 226 227 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 228 .mq_rx_supported = true, 229 .use_tfh = true, 230 .rf_id = true, 231 .gen2 = true, 232 .device_family = IWL_DEVICE_FAMILY_22000, 233 .base_params = &iwl_22000_base_params, 234 .integrated = true, 235 .xtal_latency = 500, 236 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 237 }; 238 239 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 240 .mq_rx_supported = true, 241 .use_tfh = true, 242 .rf_id = true, 243 .gen2 = true, 244 .device_family = IWL_DEVICE_FAMILY_22000, 245 .base_params = &iwl_22000_base_params, 246 .integrated = true, 247 .xtal_latency = 1820, 248 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 249 }; 250 251 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 252 .mq_rx_supported = true, 253 .use_tfh = true, 254 .rf_id = true, 255 .gen2 = true, 256 .device_family = IWL_DEVICE_FAMILY_22000, 257 .base_params = &iwl_22000_base_params, 258 .integrated = true, 259 .xtal_latency = 12000, 260 .low_latency_xtal = true, 261 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 262 }; 263 264 const struct iwl_cfg_trans_params iwl_snj_trans_cfg = { 265 .mq_rx_supported = true, 266 .use_tfh = true, 267 .rf_id = true, 268 .gen2 = true, 269 .device_family = IWL_DEVICE_FAMILY_AX210, 270 .base_params = &iwl_ax210_base_params, 271 .umac_prph_offset = 0x300000, 272 }; 273 274 const struct iwl_cfg_trans_params iwl_so_trans_cfg = { 275 .mq_rx_supported = true, 276 .use_tfh = true, 277 .rf_id = true, 278 .gen2 = true, 279 .device_family = IWL_DEVICE_FAMILY_AX210, 280 .base_params = &iwl_ax210_base_params, 281 .umac_prph_offset = 0x300000, 282 .integrated = true, 283 /* TODO: the following values need to be checked */ 284 .xtal_latency = 500, 285 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 286 }; 287 288 const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { 289 .mq_rx_supported = true, 290 .use_tfh = true, 291 .rf_id = true, 292 .gen2 = true, 293 .device_family = IWL_DEVICE_FAMILY_AX210, 294 .base_params = &iwl_ax210_base_params, 295 .umac_prph_offset = 0x300000, 296 .integrated = true, 297 /* TODO: the following values need to be checked */ 298 .xtal_latency = 12000, 299 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 300 }; 301 302 /* 303 * If the device doesn't support HE, no need to have that many buffers. 304 * 22000 devices can split multiple frames into a single RB, so fewer are 305 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 306 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 307 * additional overhead to account for processing time. 308 */ 309 #define IWL_NUM_RBDS_NON_HE 512 310 #define IWL_NUM_RBDS_22000_HE 2048 311 #define IWL_NUM_RBDS_AX210_HE 4096 312 313 /* 314 * All JF radio modules are part of the 9000 series, but the MAC part 315 * looks more like 22000. That's why this device is here, but called 316 * 9560 nevertheless. 317 */ 318 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 319 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 320 IWL_DEVICE_22500, 321 .num_rbds = IWL_NUM_RBDS_NON_HE, 322 }; 323 324 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 325 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 326 IWL_DEVICE_22500, 327 .num_rbds = IWL_NUM_RBDS_NON_HE, 328 }; 329 330 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 331 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 332 IWL_DEVICE_22500, 333 /* 334 * This device doesn't support receiving BlockAck with a large bitmap 335 * so we need to restrict the size of transmitted aggregation to the 336 * HT size; mac80211 would otherwise pick the HE max (256) by default. 337 */ 338 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 339 .num_rbds = IWL_NUM_RBDS_NON_HE, 340 }; 341 342 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 343 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 344 IWL_DEVICE_22500, 345 /* 346 * This device doesn't support receiving BlockAck with a large bitmap 347 * so we need to restrict the size of transmitted aggregation to the 348 * HT size; mac80211 would otherwise pick the HE max (256) by default. 349 */ 350 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 351 .num_rbds = IWL_NUM_RBDS_NON_HE, 352 }; 353 354 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 355 .device_family = IWL_DEVICE_FAMILY_22000, 356 .base_params = &iwl_22000_base_params, 357 .mq_rx_supported = true, 358 .use_tfh = true, 359 .rf_id = true, 360 .gen2 = true, 361 .bisr_workaround = 1, 362 }; 363 364 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 365 .device_family = IWL_DEVICE_FAMILY_AX210, 366 .base_params = &iwl_ax210_base_params, 367 .mq_rx_supported = true, 368 .use_tfh = true, 369 .rf_id = true, 370 .gen2 = true, 371 .integrated = true, 372 .umac_prph_offset = 0x300000 373 }; 374 375 const struct iwl_cfg_trans_params iwl_bz_trans_cfg = { 376 .device_family = IWL_DEVICE_FAMILY_AX210, 377 .base_params = &iwl_ax210_base_params, 378 .mq_rx_supported = true, 379 .use_tfh = true, 380 .rf_id = true, 381 .gen2 = true, 382 .integrated = true, 383 .umac_prph_offset = 0x300000, 384 .xtal_latency = 12000, 385 .low_latency_xtal = true, 386 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 387 }; 388 389 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 390 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 391 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 392 const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 393 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz"; 394 const char iwl_ax221_name[] = "Intel(R) Wi-Fi 6E AX221 160MHz"; 395 const char iwl_ax231_name[] = "Intel(R) Wi-Fi 6E AX231 160MHz"; 396 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6E AX411 160MHz"; 397 398 const char iwl_ax200_killer_1650w_name[] = 399 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 400 const char iwl_ax200_killer_1650x_name[] = 401 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 402 const char iwl_ax201_killer_1650s_name[] = 403 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 404 const char iwl_ax201_killer_1650i_name[] = 405 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 406 const char iwl_ax210_killer_1675w_name[] = 407 "Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)"; 408 const char iwl_ax210_killer_1675x_name[] = 409 "Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)"; 410 411 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 412 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 413 IWL_DEVICE_22500, 414 /* 415 * This device doesn't support receiving BlockAck with a large bitmap 416 * so we need to restrict the size of transmitted aggregation to the 417 * HT size; mac80211 would otherwise pick the HE max (256) by default. 418 */ 419 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 420 .tx_with_siso_diversity = true, 421 .num_rbds = IWL_NUM_RBDS_22000_HE, 422 }; 423 424 const struct iwl_cfg iwl_qu_b0_hr_b0 = { 425 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 426 IWL_DEVICE_22500, 427 /* 428 * This device doesn't support receiving BlockAck with a large bitmap 429 * so we need to restrict the size of transmitted aggregation to the 430 * HT size; mac80211 would otherwise pick the HE max (256) by default. 431 */ 432 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 433 .num_rbds = IWL_NUM_RBDS_22000_HE, 434 }; 435 436 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 437 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 438 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 439 IWL_DEVICE_22500, 440 /* 441 * This device doesn't support receiving BlockAck with a large bitmap 442 * so we need to restrict the size of transmitted aggregation to the 443 * HT size; mac80211 would otherwise pick the HE max (256) by default. 444 */ 445 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 446 .num_rbds = IWL_NUM_RBDS_22000_HE, 447 }; 448 449 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 450 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 451 IWL_DEVICE_22500, 452 /* 453 * This device doesn't support receiving BlockAck with a large bitmap 454 * so we need to restrict the size of transmitted aggregation to the 455 * HT size; mac80211 would otherwise pick the HE max (256) by default. 456 */ 457 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 458 .tx_with_siso_diversity = true, 459 .num_rbds = IWL_NUM_RBDS_22000_HE, 460 }; 461 462 const struct iwl_cfg iwl_qu_c0_hr_b0 = { 463 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 464 IWL_DEVICE_22500, 465 /* 466 * This device doesn't support receiving BlockAck with a large bitmap 467 * so we need to restrict the size of transmitted aggregation to the 468 * HT size; mac80211 would otherwise pick the HE max (256) by default. 469 */ 470 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 471 .num_rbds = IWL_NUM_RBDS_22000_HE, 472 }; 473 474 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 475 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 476 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 477 IWL_DEVICE_22500, 478 /* 479 * This device doesn't support receiving BlockAck with a large bitmap 480 * so we need to restrict the size of transmitted aggregation to the 481 * HT size; mac80211 would otherwise pick the HE max (256) by default. 482 */ 483 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 484 .num_rbds = IWL_NUM_RBDS_22000_HE, 485 }; 486 487 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 488 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 489 IWL_DEVICE_22500, 490 /* 491 * This device doesn't support receiving BlockAck with a large bitmap 492 * so we need to restrict the size of transmitted aggregation to the 493 * HT size; mac80211 would otherwise pick the HE max (256) by default. 494 */ 495 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 496 .tx_with_siso_diversity = true, 497 .num_rbds = IWL_NUM_RBDS_22000_HE, 498 }; 499 500 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 501 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 502 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 503 IWL_DEVICE_22500, 504 /* 505 * This device doesn't support receiving BlockAck with a large bitmap 506 * so we need to restrict the size of transmitted aggregation to the 507 * HT size; mac80211 would otherwise pick the HE max (256) by default. 508 */ 509 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 510 .num_rbds = IWL_NUM_RBDS_22000_HE, 511 }; 512 513 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 514 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 515 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 516 IWL_DEVICE_22500, 517 /* 518 * This device doesn't support receiving BlockAck with a large bitmap 519 * so we need to restrict the size of transmitted aggregation to the 520 * HT size; mac80211 would otherwise pick the HE max (256) by default. 521 */ 522 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 523 .num_rbds = IWL_NUM_RBDS_22000_HE, 524 }; 525 526 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 527 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 528 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 529 IWL_DEVICE_22500, 530 /* 531 * This device doesn't support receiving BlockAck with a large bitmap 532 * so we need to restrict the size of transmitted aggregation to the 533 * HT size; mac80211 would otherwise pick the HE max (256) by default. 534 */ 535 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 536 .num_rbds = IWL_NUM_RBDS_22000_HE, 537 }; 538 539 const struct iwl_cfg iwl_ax200_cfg_cc = { 540 .fw_name_pre = IWL_CC_A_FW_PRE, 541 IWL_DEVICE_22500, 542 /* 543 * This device doesn't support receiving BlockAck with a large bitmap 544 * so we need to restrict the size of transmitted aggregation to the 545 * HT size; mac80211 would otherwise pick the HE max (256) by default. 546 */ 547 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 548 .num_rbds = IWL_NUM_RBDS_22000_HE, 549 }; 550 551 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 552 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 553 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 554 IWL_DEVICE_22500, 555 /* 556 * This device doesn't support receiving BlockAck with a large bitmap 557 * so we need to restrict the size of transmitted aggregation to the 558 * HT size; mac80211 would otherwise pick the HE max (256) by default. 559 */ 560 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 561 .num_rbds = IWL_NUM_RBDS_22000_HE, 562 }; 563 564 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 565 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 566 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 567 IWL_DEVICE_22500, 568 /* 569 * This device doesn't support receiving BlockAck with a large bitmap 570 * so we need to restrict the size of transmitted aggregation to the 571 * HT size; mac80211 would otherwise pick the HE max (256) by default. 572 */ 573 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 574 .num_rbds = IWL_NUM_RBDS_22000_HE, 575 }; 576 577 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 578 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 579 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 580 IWL_DEVICE_22500, 581 /* 582 * This device doesn't support receiving BlockAck with a large bitmap 583 * so we need to restrict the size of transmitted aggregation to the 584 * HT size; mac80211 would otherwise pick the HE max (256) by default. 585 */ 586 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 587 .num_rbds = IWL_NUM_RBDS_22000_HE, 588 }; 589 590 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 591 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 592 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 593 IWL_DEVICE_22500, 594 /* 595 * This device doesn't support receiving BlockAck with a large bitmap 596 * so we need to restrict the size of transmitted aggregation to the 597 * HT size; mac80211 would otherwise pick the HE max (256) by default. 598 */ 599 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 600 .num_rbds = IWL_NUM_RBDS_22000_HE, 601 }; 602 603 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 604 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 605 IWL_DEVICE_22500, 606 /* 607 * This device doesn't support receiving BlockAck with a large bitmap 608 * so we need to restrict the size of transmitted aggregation to the 609 * HT size; mac80211 would otherwise pick the HE max (256) by default. 610 */ 611 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 612 .num_rbds = IWL_NUM_RBDS_22000_HE, 613 }; 614 615 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0 = { 616 .name = "Intel(R) Wireless-AC 9560 160MHz", 617 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 618 IWL_DEVICE_AX210, 619 .num_rbds = IWL_NUM_RBDS_NON_HE, 620 }; 621 622 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 623 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 624 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 625 IWL_DEVICE_AX210, 626 .num_rbds = IWL_NUM_RBDS_AX210_HE, 627 }; 628 629 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 630 .name = iwl_ax211_name, 631 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 632 .uhb_supported = true, 633 IWL_DEVICE_AX210, 634 .num_rbds = IWL_NUM_RBDS_AX210_HE, 635 }; 636 637 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 638 .name = iwl_ax211_name, 639 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 640 .uhb_supported = true, 641 IWL_DEVICE_AX210, 642 .num_rbds = IWL_NUM_RBDS_AX210_HE, 643 .trans.xtal_latency = 12000, 644 .trans.low_latency_xtal = true, 645 }; 646 647 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 648 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 649 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 650 .uhb_supported = true, 651 IWL_DEVICE_AX210, 652 .num_rbds = IWL_NUM_RBDS_AX210_HE, 653 }; 654 655 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 656 .name = iwl_ax411_name, 657 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 658 .uhb_supported = true, 659 IWL_DEVICE_AX210, 660 .num_rbds = IWL_NUM_RBDS_AX210_HE, 661 }; 662 663 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 664 .name = iwl_ax411_name, 665 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 666 .uhb_supported = true, 667 IWL_DEVICE_AX210, 668 .num_rbds = IWL_NUM_RBDS_AX210_HE, 669 .trans.xtal_latency = 12000, 670 .trans.low_latency_xtal = true, 671 }; 672 673 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 674 .name = iwl_ax411_name, 675 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 676 .uhb_supported = true, 677 IWL_DEVICE_AX210, 678 .num_rbds = IWL_NUM_RBDS_AX210_HE, 679 }; 680 681 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 682 .name = iwl_ax211_name, 683 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 684 .uhb_supported = true, 685 IWL_DEVICE_AX210, 686 .num_rbds = IWL_NUM_RBDS_AX210_HE, 687 }; 688 689 const struct iwl_cfg iwl_cfg_snj_hr_b0 = { 690 .fw_name_pre = IWL_SNJ_A_HR_B_FW_PRE, 691 .uhb_supported = true, 692 IWL_DEVICE_AX210, 693 .num_rbds = IWL_NUM_RBDS_AX210_HE, 694 }; 695 696 const struct iwl_cfg iwl_cfg_snj_a0_jf_b0 = { 697 .fw_name_pre = IWL_SNJ_A_JF_B_FW_PRE, 698 .uhb_supported = true, 699 IWL_DEVICE_AX210, 700 .num_rbds = IWL_NUM_RBDS_AX210_HE, 701 }; 702 703 const struct iwl_cfg iwl_cfg_ma_a0_hr_b0 = { 704 .fw_name_pre = IWL_MA_A_HR_B_FW_PRE, 705 .uhb_supported = true, 706 IWL_DEVICE_AX210, 707 .num_rbds = IWL_NUM_RBDS_AX210_HE, 708 }; 709 710 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 711 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 712 .uhb_supported = true, 713 IWL_DEVICE_AX210, 714 .num_rbds = IWL_NUM_RBDS_AX210_HE, 715 }; 716 717 const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0 = { 718 .fw_name_pre = IWL_MA_A_GF4_A_FW_PRE, 719 .uhb_supported = true, 720 IWL_DEVICE_AX210, 721 .num_rbds = IWL_NUM_RBDS_AX210_HE, 722 }; 723 724 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 725 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 726 .uhb_supported = true, 727 IWL_DEVICE_AX210, 728 .num_rbds = IWL_NUM_RBDS_AX210_HE, 729 }; 730 731 const struct iwl_cfg iwl_cfg_ma_a0_fm_a0 = { 732 .fw_name_pre = IWL_MA_A_FM_A_FW_PRE, 733 .uhb_supported = true, 734 IWL_DEVICE_AX210, 735 .num_rbds = IWL_NUM_RBDS_AX210_HE, 736 }; 737 738 const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { 739 .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, 740 .uhb_supported = true, 741 IWL_DEVICE_AX210, 742 .num_rbds = IWL_NUM_RBDS_AX210_HE, 743 }; 744 745 const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { 746 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 747 IWL_DEVICE_AX210, 748 .num_rbds = IWL_NUM_RBDS_AX210_HE, 749 }; 750 751 const struct iwl_cfg iwl_cfg_quz_a0_hr_b0 = { 752 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 753 IWL_DEVICE_22500, 754 /* 755 * This device doesn't support receiving BlockAck with a large bitmap 756 * so we need to restrict the size of transmitted aggregation to the 757 * HT size; mac80211 would otherwise pick the HE max (256) by default. 758 */ 759 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 760 .num_rbds = IWL_NUM_RBDS_22000_HE, 761 }; 762 763 const struct iwl_cfg iwl_cfg_bz_a0_hr_b0 = { 764 .fw_name_pre = IWL_BZ_A_HR_B_FW_PRE, 765 .uhb_supported = true, 766 IWL_DEVICE_AX210, 767 .num_rbds = IWL_NUM_RBDS_AX210_HE, 768 }; 769 770 const struct iwl_cfg iwl_cfg_bz_a0_gf_a0 = { 771 .fw_name_pre = IWL_BZ_A_GF_A_FW_PRE, 772 .uhb_supported = true, 773 IWL_DEVICE_AX210, 774 .num_rbds = IWL_NUM_RBDS_AX210_HE, 775 }; 776 777 const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0 = { 778 .fw_name_pre = IWL_BZ_A_GF4_A_FW_PRE, 779 .uhb_supported = true, 780 IWL_DEVICE_AX210, 781 .num_rbds = IWL_NUM_RBDS_AX210_HE, 782 }; 783 784 const struct iwl_cfg iwl_cfg_bz_a0_mr_a0 = { 785 .fw_name_pre = IWL_BZ_A_MR_A_FW_PRE, 786 .uhb_supported = true, 787 IWL_DEVICE_AX210, 788 .num_rbds = IWL_NUM_RBDS_AX210_HE, 789 }; 790 791 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 792 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 793 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 794 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 795 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 796 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 797 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 798 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 799 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 800 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 801 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 802 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 803 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 804 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 805 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 806 MODULE_FIRMWARE(IWL_SNJ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 807 MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 808 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 809 MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 810 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 811 MODULE_FIRMWARE(IWL_MA_A_FM_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 812 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 813 MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 814 MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 815 MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 816 MODULE_FIRMWARE(IWL_BZ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 817