1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2020 Intel Corporation 5 */ 6 #include <linux/module.h> 7 #include <linux/stringify.h> 8 #include "iwl-config.h" 9 #include "iwl-prph.h" 10 11 /* Highest firmware API version supported */ 12 #define IWL_22000_UCODE_API_MAX 63 13 14 /* Lowest firmware API version supported */ 15 #define IWL_22000_UCODE_API_MIN 39 16 17 /* NVM versions */ 18 #define IWL_22000_NVM_VERSION 0x0a1d 19 20 /* Memory offsets and lengths */ 21 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 22 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 23 #define IWL_22000_DCCM2_OFFSET 0x880000 24 #define IWL_22000_DCCM2_LEN 0x8000 25 #define IWL_22000_SMEM_OFFSET 0x400000 26 #define IWL_22000_SMEM_LEN 0xD0000 27 28 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 29 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 30 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 31 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 32 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 33 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 34 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 35 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 36 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 37 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 38 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 39 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 40 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 41 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 42 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 43 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 44 #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 45 #define IWL_SNJ_A_JF_B_FW_PRE "iwlwifi-SoSnj-a0-jf-b0-" 46 #define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0-" 47 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 48 #define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0-" 49 #define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 50 #define IWL_SNJ_A_MR_A_FW_PRE "iwlwifi-SoSnj-a0-mr-a0-" 51 #define IWL_BZ_A_HR_B_FW_PRE "iwlwifi-bz-a0-hr-b0-" 52 #define IWL_BZ_A_GF_A_FW_PRE "iwlwifi-bz-a0-gf-a0-" 53 #define IWL_BZ_A_GF4_A_FW_PRE "iwlwifi-bz-a0-gf4-a0-" 54 #define IWL_BZ_A_MR_A_FW_PRE "iwlwifi-bz-a0-mr-a0-" 55 56 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 57 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 58 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 59 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 60 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 61 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 62 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 63 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 64 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 65 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 66 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 67 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 68 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 69 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 70 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 71 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 72 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 73 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 74 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 75 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 76 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 77 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 78 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 79 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 80 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 81 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 82 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 83 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 84 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 85 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 86 #define IWL_SNJ_A_JF_B_MODULE_FIRMWARE(api) \ 87 IWL_SNJ_A_JF_B_FW_PRE __stringify(api) ".ucode" 88 #define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \ 89 IWL_MA_A_HR_B_FW_PRE __stringify(api) ".ucode" 90 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 91 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 92 #define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \ 93 IWL_MA_A_GF4_A_FW_PRE __stringify(api) ".ucode" 94 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 95 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 96 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \ 97 IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode" 98 #define IWL_BZ_A_HR_B_MODULE_FIRMWARE(api) \ 99 IWL_BZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 100 #define IWL_BZ_A_GF_A_MODULE_FIRMWARE(api) \ 101 IWL_BZ_A_GF_A_FW_PRE __stringify(api) ".ucode" 102 #define IWL_BZ_A_GF4_A_MODULE_FIRMWARE(api) \ 103 IWL_BZ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 104 #define IWL_BZ_A_MR_A_MODULE_FIRMWARE(api) \ 105 IWL_BZ_A_MR_A_FW_PRE __stringify(api) ".ucode" 106 107 static const struct iwl_base_params iwl_22000_base_params = { 108 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 109 .num_of_queues = 512, 110 .max_tfd_queue_size = 256, 111 .shadow_ram_support = true, 112 .led_compensation = 57, 113 .wd_timeout = IWL_LONG_WD_TIMEOUT, 114 .max_event_log_size = 512, 115 .shadow_reg_enable = true, 116 .pcie_l1_allowed = true, 117 }; 118 119 static const struct iwl_base_params iwl_ax210_base_params = { 120 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 121 .num_of_queues = 512, 122 .max_tfd_queue_size = 65536, 123 .shadow_ram_support = true, 124 .led_compensation = 57, 125 .wd_timeout = IWL_LONG_WD_TIMEOUT, 126 .max_event_log_size = 512, 127 .shadow_reg_enable = true, 128 .pcie_l1_allowed = true, 129 }; 130 131 static const struct iwl_ht_params iwl_22000_ht_params = { 132 .stbc = true, 133 .ldpc = true, 134 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) | 135 BIT(NL80211_BAND_6GHZ), 136 }; 137 138 #define IWL_DEVICE_22000_COMMON \ 139 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 140 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 141 .led_mode = IWL_LED_RF_STATE, \ 142 .nvm_hw_section_num = 10, \ 143 .non_shared_ant = ANT_B, \ 144 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 145 .dccm_len = IWL_22000_DCCM_LEN, \ 146 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 147 .dccm2_len = IWL_22000_DCCM2_LEN, \ 148 .smem_offset = IWL_22000_SMEM_OFFSET, \ 149 .smem_len = IWL_22000_SMEM_LEN, \ 150 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 151 .apmg_not_supported = true, \ 152 .trans.mq_rx_supported = true, \ 153 .vht_mu_mimo_supported = true, \ 154 .mac_addr_from_csr = true, \ 155 .ht_params = &iwl_22000_ht_params, \ 156 .nvm_ver = IWL_22000_NVM_VERSION, \ 157 .trans.use_tfh = true, \ 158 .trans.rf_id = true, \ 159 .trans.gen2 = true, \ 160 .nvm_type = IWL_NVM_EXT, \ 161 .dbgc_supported = true, \ 162 .min_umac_error_event_table = 0x400000, \ 163 .d3_debug_data_base_addr = 0x401000, \ 164 .d3_debug_data_length = 60 * 1024, \ 165 .mon_smem_regs = { \ 166 .write_ptr = { \ 167 .addr = LDBG_M2S_BUF_WPTR, \ 168 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 169 }, \ 170 .cycle_cnt = { \ 171 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 172 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 173 }, \ 174 } 175 176 #define IWL_DEVICE_22500 \ 177 IWL_DEVICE_22000_COMMON, \ 178 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 179 .trans.base_params = &iwl_22000_base_params, \ 180 .gp2_reg_addr = 0xa02c68, \ 181 .mon_dram_regs = { \ 182 .write_ptr = { \ 183 .addr = MON_BUFF_WRPTR_VER2, \ 184 .mask = 0xffffffff, \ 185 }, \ 186 .cycle_cnt = { \ 187 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 188 .mask = 0xffffffff, \ 189 }, \ 190 } 191 192 #define IWL_DEVICE_AX210 \ 193 IWL_DEVICE_22000_COMMON, \ 194 .trans.umac_prph_offset = 0x300000, \ 195 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 196 .trans.base_params = &iwl_ax210_base_params, \ 197 .min_txq_size = 128, \ 198 .gp2_reg_addr = 0xd02c68, \ 199 .min_256_ba_txq_size = 1024, \ 200 .mon_dram_regs = { \ 201 .write_ptr = { \ 202 .addr = DBGC_CUR_DBGBUF_STATUS, \ 203 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 204 }, \ 205 .cycle_cnt = { \ 206 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 207 .mask = 0xffffffff, \ 208 }, \ 209 .cur_frag = { \ 210 .addr = DBGC_CUR_DBGBUF_STATUS, \ 211 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 212 }, \ 213 } 214 215 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 216 .mq_rx_supported = true, 217 .use_tfh = true, 218 .rf_id = true, 219 .gen2 = true, 220 .device_family = IWL_DEVICE_FAMILY_22000, 221 .base_params = &iwl_22000_base_params, 222 }; 223 224 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 225 .mq_rx_supported = true, 226 .use_tfh = true, 227 .rf_id = true, 228 .gen2 = true, 229 .device_family = IWL_DEVICE_FAMILY_22000, 230 .base_params = &iwl_22000_base_params, 231 .integrated = true, 232 .xtal_latency = 500, 233 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 234 }; 235 236 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 237 .mq_rx_supported = true, 238 .use_tfh = true, 239 .rf_id = true, 240 .gen2 = true, 241 .device_family = IWL_DEVICE_FAMILY_22000, 242 .base_params = &iwl_22000_base_params, 243 .integrated = true, 244 .xtal_latency = 1820, 245 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 246 }; 247 248 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 249 .mq_rx_supported = true, 250 .use_tfh = true, 251 .rf_id = true, 252 .gen2 = true, 253 .device_family = IWL_DEVICE_FAMILY_22000, 254 .base_params = &iwl_22000_base_params, 255 .integrated = true, 256 .xtal_latency = 12000, 257 .low_latency_xtal = true, 258 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 259 }; 260 261 const struct iwl_cfg_trans_params iwl_snj_trans_cfg = { 262 .mq_rx_supported = true, 263 .use_tfh = true, 264 .rf_id = true, 265 .gen2 = true, 266 .device_family = IWL_DEVICE_FAMILY_AX210, 267 .base_params = &iwl_ax210_base_params, 268 .umac_prph_offset = 0x300000, 269 }; 270 271 const struct iwl_cfg_trans_params iwl_so_trans_cfg = { 272 .mq_rx_supported = true, 273 .use_tfh = true, 274 .rf_id = true, 275 .gen2 = true, 276 .device_family = IWL_DEVICE_FAMILY_AX210, 277 .base_params = &iwl_ax210_base_params, 278 .umac_prph_offset = 0x300000, 279 .integrated = true, 280 /* TODO: the following values need to be checked */ 281 .xtal_latency = 500, 282 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 283 }; 284 285 const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { 286 .mq_rx_supported = true, 287 .use_tfh = true, 288 .rf_id = true, 289 .gen2 = true, 290 .device_family = IWL_DEVICE_FAMILY_AX210, 291 .base_params = &iwl_ax210_base_params, 292 .umac_prph_offset = 0x300000, 293 .integrated = true, 294 /* TODO: the following values need to be checked */ 295 .xtal_latency = 12000, 296 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 297 }; 298 299 /* 300 * If the device doesn't support HE, no need to have that many buffers. 301 * 22000 devices can split multiple frames into a single RB, so fewer are 302 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 303 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 304 * additional overhead to account for processing time. 305 */ 306 #define IWL_NUM_RBDS_NON_HE 512 307 #define IWL_NUM_RBDS_22000_HE 2048 308 #define IWL_NUM_RBDS_AX210_HE 4096 309 310 /* 311 * All JF radio modules are part of the 9000 series, but the MAC part 312 * looks more like 22000. That's why this device is here, but called 313 * 9560 nevertheless. 314 */ 315 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 316 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 317 IWL_DEVICE_22500, 318 .num_rbds = IWL_NUM_RBDS_NON_HE, 319 }; 320 321 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 322 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 323 IWL_DEVICE_22500, 324 .num_rbds = IWL_NUM_RBDS_NON_HE, 325 }; 326 327 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 328 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 329 IWL_DEVICE_22500, 330 /* 331 * This device doesn't support receiving BlockAck with a large bitmap 332 * so we need to restrict the size of transmitted aggregation to the 333 * HT size; mac80211 would otherwise pick the HE max (256) by default. 334 */ 335 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 336 .num_rbds = IWL_NUM_RBDS_NON_HE, 337 }; 338 339 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 340 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 341 IWL_DEVICE_22500, 342 /* 343 * This device doesn't support receiving BlockAck with a large bitmap 344 * so we need to restrict the size of transmitted aggregation to the 345 * HT size; mac80211 would otherwise pick the HE max (256) by default. 346 */ 347 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 348 .num_rbds = IWL_NUM_RBDS_NON_HE, 349 }; 350 351 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 352 .device_family = IWL_DEVICE_FAMILY_22000, 353 .base_params = &iwl_22000_base_params, 354 .mq_rx_supported = true, 355 .use_tfh = true, 356 .rf_id = true, 357 .gen2 = true, 358 .bisr_workaround = 1, 359 }; 360 361 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 362 .device_family = IWL_DEVICE_FAMILY_AX210, 363 .base_params = &iwl_ax210_base_params, 364 .mq_rx_supported = true, 365 .use_tfh = true, 366 .rf_id = true, 367 .gen2 = true, 368 .integrated = true, 369 .umac_prph_offset = 0x300000 370 }; 371 372 const struct iwl_cfg_trans_params iwl_bz_trans_cfg = { 373 .device_family = IWL_DEVICE_FAMILY_AX210, 374 .base_params = &iwl_ax210_base_params, 375 .mq_rx_supported = true, 376 .use_tfh = true, 377 .rf_id = true, 378 .gen2 = true, 379 .integrated = true, 380 .umac_prph_offset = 0x300000, 381 .xtal_latency = 12000, 382 .low_latency_xtal = true, 383 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 384 }; 385 386 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 387 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 388 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 389 const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 390 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz"; 391 const char iwl_ax221_name[] = "Intel(R) Wi-Fi 6E AX221 160MHz"; 392 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6E AX411 160MHz"; 393 394 const char iwl_ax200_killer_1650w_name[] = 395 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 396 const char iwl_ax200_killer_1650x_name[] = 397 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 398 const char iwl_ax201_killer_1650s_name[] = 399 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 400 const char iwl_ax201_killer_1650i_name[] = 401 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 402 const char iwl_ax210_killer_1675w_name[] = 403 "Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)"; 404 const char iwl_ax210_killer_1675x_name[] = 405 "Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)"; 406 407 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 408 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 409 IWL_DEVICE_22500, 410 /* 411 * This device doesn't support receiving BlockAck with a large bitmap 412 * so we need to restrict the size of transmitted aggregation to the 413 * HT size; mac80211 would otherwise pick the HE max (256) by default. 414 */ 415 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 416 .tx_with_siso_diversity = true, 417 .num_rbds = IWL_NUM_RBDS_22000_HE, 418 }; 419 420 const struct iwl_cfg iwl_qu_b0_hr_b0 = { 421 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 422 IWL_DEVICE_22500, 423 /* 424 * This device doesn't support receiving BlockAck with a large bitmap 425 * so we need to restrict the size of transmitted aggregation to the 426 * HT size; mac80211 would otherwise pick the HE max (256) by default. 427 */ 428 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 429 .num_rbds = IWL_NUM_RBDS_22000_HE, 430 }; 431 432 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 433 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 434 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 435 IWL_DEVICE_22500, 436 /* 437 * This device doesn't support receiving BlockAck with a large bitmap 438 * so we need to restrict the size of transmitted aggregation to the 439 * HT size; mac80211 would otherwise pick the HE max (256) by default. 440 */ 441 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 442 .num_rbds = IWL_NUM_RBDS_22000_HE, 443 }; 444 445 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 446 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 447 IWL_DEVICE_22500, 448 /* 449 * This device doesn't support receiving BlockAck with a large bitmap 450 * so we need to restrict the size of transmitted aggregation to the 451 * HT size; mac80211 would otherwise pick the HE max (256) by default. 452 */ 453 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 454 .tx_with_siso_diversity = true, 455 .num_rbds = IWL_NUM_RBDS_22000_HE, 456 }; 457 458 const struct iwl_cfg iwl_qu_c0_hr_b0 = { 459 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 460 IWL_DEVICE_22500, 461 /* 462 * This device doesn't support receiving BlockAck with a large bitmap 463 * so we need to restrict the size of transmitted aggregation to the 464 * HT size; mac80211 would otherwise pick the HE max (256) by default. 465 */ 466 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 467 .num_rbds = IWL_NUM_RBDS_22000_HE, 468 }; 469 470 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 471 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 472 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 473 IWL_DEVICE_22500, 474 /* 475 * This device doesn't support receiving BlockAck with a large bitmap 476 * so we need to restrict the size of transmitted aggregation to the 477 * HT size; mac80211 would otherwise pick the HE max (256) by default. 478 */ 479 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 480 .num_rbds = IWL_NUM_RBDS_22000_HE, 481 }; 482 483 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 484 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 485 IWL_DEVICE_22500, 486 /* 487 * This device doesn't support receiving BlockAck with a large bitmap 488 * so we need to restrict the size of transmitted aggregation to the 489 * HT size; mac80211 would otherwise pick the HE max (256) by default. 490 */ 491 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 492 .tx_with_siso_diversity = true, 493 .num_rbds = IWL_NUM_RBDS_22000_HE, 494 }; 495 496 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 497 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 498 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 499 IWL_DEVICE_22500, 500 /* 501 * This device doesn't support receiving BlockAck with a large bitmap 502 * so we need to restrict the size of transmitted aggregation to the 503 * HT size; mac80211 would otherwise pick the HE max (256) by default. 504 */ 505 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 506 .num_rbds = IWL_NUM_RBDS_22000_HE, 507 }; 508 509 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 510 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 511 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 512 IWL_DEVICE_22500, 513 /* 514 * This device doesn't support receiving BlockAck with a large bitmap 515 * so we need to restrict the size of transmitted aggregation to the 516 * HT size; mac80211 would otherwise pick the HE max (256) by default. 517 */ 518 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 519 .num_rbds = IWL_NUM_RBDS_22000_HE, 520 }; 521 522 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 523 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 524 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 525 IWL_DEVICE_22500, 526 /* 527 * This device doesn't support receiving BlockAck with a large bitmap 528 * so we need to restrict the size of transmitted aggregation to the 529 * HT size; mac80211 would otherwise pick the HE max (256) by default. 530 */ 531 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 532 .num_rbds = IWL_NUM_RBDS_22000_HE, 533 }; 534 535 const struct iwl_cfg iwl_ax200_cfg_cc = { 536 .fw_name_pre = IWL_CC_A_FW_PRE, 537 IWL_DEVICE_22500, 538 /* 539 * This device doesn't support receiving BlockAck with a large bitmap 540 * so we need to restrict the size of transmitted aggregation to the 541 * HT size; mac80211 would otherwise pick the HE max (256) by default. 542 */ 543 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 544 .num_rbds = IWL_NUM_RBDS_22000_HE, 545 }; 546 547 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 548 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 549 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 550 IWL_DEVICE_22500, 551 /* 552 * This device doesn't support receiving BlockAck with a large bitmap 553 * so we need to restrict the size of transmitted aggregation to the 554 * HT size; mac80211 would otherwise pick the HE max (256) by default. 555 */ 556 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 557 .num_rbds = IWL_NUM_RBDS_22000_HE, 558 }; 559 560 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 561 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 562 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 563 IWL_DEVICE_22500, 564 /* 565 * This device doesn't support receiving BlockAck with a large bitmap 566 * so we need to restrict the size of transmitted aggregation to the 567 * HT size; mac80211 would otherwise pick the HE max (256) by default. 568 */ 569 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 570 .num_rbds = IWL_NUM_RBDS_22000_HE, 571 }; 572 573 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 574 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 575 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 576 IWL_DEVICE_22500, 577 /* 578 * This device doesn't support receiving BlockAck with a large bitmap 579 * so we need to restrict the size of transmitted aggregation to the 580 * HT size; mac80211 would otherwise pick the HE max (256) by default. 581 */ 582 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 583 .num_rbds = IWL_NUM_RBDS_22000_HE, 584 }; 585 586 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 587 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 588 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 589 IWL_DEVICE_22500, 590 /* 591 * This device doesn't support receiving BlockAck with a large bitmap 592 * so we need to restrict the size of transmitted aggregation to the 593 * HT size; mac80211 would otherwise pick the HE max (256) by default. 594 */ 595 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 596 .num_rbds = IWL_NUM_RBDS_22000_HE, 597 }; 598 599 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 600 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 601 IWL_DEVICE_22500, 602 /* 603 * This device doesn't support receiving BlockAck with a large bitmap 604 * so we need to restrict the size of transmitted aggregation to the 605 * HT size; mac80211 would otherwise pick the HE max (256) by default. 606 */ 607 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 608 .num_rbds = IWL_NUM_RBDS_22000_HE, 609 }; 610 611 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0 = { 612 .name = "Intel(R) Wireless-AC 9560 160MHz", 613 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 614 IWL_DEVICE_AX210, 615 .num_rbds = IWL_NUM_RBDS_NON_HE, 616 }; 617 618 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 619 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 620 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 621 IWL_DEVICE_AX210, 622 .num_rbds = IWL_NUM_RBDS_AX210_HE, 623 }; 624 625 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 626 .name = iwl_ax211_name, 627 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 628 .uhb_supported = true, 629 IWL_DEVICE_AX210, 630 .num_rbds = IWL_NUM_RBDS_AX210_HE, 631 }; 632 633 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 634 .name = iwl_ax211_name, 635 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 636 .uhb_supported = true, 637 IWL_DEVICE_AX210, 638 .num_rbds = IWL_NUM_RBDS_AX210_HE, 639 .trans.xtal_latency = 12000, 640 .trans.low_latency_xtal = true, 641 }; 642 643 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 644 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 645 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 646 .uhb_supported = true, 647 IWL_DEVICE_AX210, 648 .num_rbds = IWL_NUM_RBDS_AX210_HE, 649 }; 650 651 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 652 .name = iwl_ax411_name, 653 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 654 .uhb_supported = true, 655 IWL_DEVICE_AX210, 656 .num_rbds = IWL_NUM_RBDS_AX210_HE, 657 }; 658 659 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 660 .name = iwl_ax411_name, 661 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 662 .uhb_supported = true, 663 IWL_DEVICE_AX210, 664 .num_rbds = IWL_NUM_RBDS_AX210_HE, 665 .trans.xtal_latency = 12000, 666 .trans.low_latency_xtal = true, 667 }; 668 669 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 670 .name = iwl_ax411_name, 671 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 672 .uhb_supported = true, 673 IWL_DEVICE_AX210, 674 .num_rbds = IWL_NUM_RBDS_AX210_HE, 675 }; 676 677 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 678 .name = iwl_ax211_name, 679 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 680 .uhb_supported = true, 681 IWL_DEVICE_AX210, 682 .num_rbds = IWL_NUM_RBDS_AX210_HE, 683 }; 684 685 const struct iwl_cfg iwl_cfg_snj_hr_b0 = { 686 .fw_name_pre = IWL_SNJ_A_HR_B_FW_PRE, 687 .uhb_supported = true, 688 IWL_DEVICE_AX210, 689 .num_rbds = IWL_NUM_RBDS_AX210_HE, 690 }; 691 692 const struct iwl_cfg iwl_cfg_snj_a0_jf_b0 = { 693 .fw_name_pre = IWL_SNJ_A_JF_B_FW_PRE, 694 .uhb_supported = true, 695 IWL_DEVICE_AX210, 696 .num_rbds = IWL_NUM_RBDS_AX210_HE, 697 }; 698 699 const struct iwl_cfg iwl_cfg_ma_a0_hr_b0 = { 700 .fw_name_pre = IWL_MA_A_HR_B_FW_PRE, 701 .uhb_supported = true, 702 IWL_DEVICE_AX210, 703 .num_rbds = IWL_NUM_RBDS_AX210_HE, 704 }; 705 706 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 707 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 708 .uhb_supported = true, 709 IWL_DEVICE_AX210, 710 .num_rbds = IWL_NUM_RBDS_AX210_HE, 711 }; 712 713 const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0 = { 714 .fw_name_pre = IWL_MA_A_GF4_A_FW_PRE, 715 .uhb_supported = true, 716 IWL_DEVICE_AX210, 717 .num_rbds = IWL_NUM_RBDS_AX210_HE, 718 }; 719 720 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 721 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 722 .uhb_supported = true, 723 IWL_DEVICE_AX210, 724 .num_rbds = IWL_NUM_RBDS_AX210_HE, 725 }; 726 727 const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { 728 .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, 729 .uhb_supported = true, 730 IWL_DEVICE_AX210, 731 .num_rbds = IWL_NUM_RBDS_AX210_HE, 732 }; 733 734 const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { 735 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 736 IWL_DEVICE_AX210, 737 .num_rbds = IWL_NUM_RBDS_AX210_HE, 738 }; 739 740 const struct iwl_cfg iwl_cfg_quz_a0_hr_b0 = { 741 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 742 IWL_DEVICE_22500, 743 /* 744 * This device doesn't support receiving BlockAck with a large bitmap 745 * so we need to restrict the size of transmitted aggregation to the 746 * HT size; mac80211 would otherwise pick the HE max (256) by default. 747 */ 748 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 749 .num_rbds = IWL_NUM_RBDS_22000_HE, 750 }; 751 752 const struct iwl_cfg iwl_cfg_bz_a0_hr_b0 = { 753 .fw_name_pre = IWL_BZ_A_HR_B_FW_PRE, 754 .uhb_supported = true, 755 IWL_DEVICE_AX210, 756 .num_rbds = IWL_NUM_RBDS_AX210_HE, 757 }; 758 759 const struct iwl_cfg iwl_cfg_bz_a0_gf_a0 = { 760 .fw_name_pre = IWL_BZ_A_GF_A_FW_PRE, 761 .uhb_supported = true, 762 IWL_DEVICE_AX210, 763 .num_rbds = IWL_NUM_RBDS_AX210_HE, 764 }; 765 766 const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0 = { 767 .fw_name_pre = IWL_BZ_A_GF4_A_FW_PRE, 768 .uhb_supported = true, 769 IWL_DEVICE_AX210, 770 .num_rbds = IWL_NUM_RBDS_AX210_HE, 771 }; 772 773 const struct iwl_cfg iwl_cfg_bz_a0_mr_a0 = { 774 .fw_name_pre = IWL_BZ_A_MR_A_FW_PRE, 775 .uhb_supported = true, 776 IWL_DEVICE_AX210, 777 .num_rbds = IWL_NUM_RBDS_AX210_HE, 778 }; 779 780 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 781 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 782 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 783 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 784 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 785 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 786 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 787 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 788 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 789 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 790 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 791 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 792 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 793 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 794 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 795 MODULE_FIRMWARE(IWL_SNJ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 796 MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 797 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 798 MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 799 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 800 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 801 MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 802 MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 803 MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 804 MODULE_FIRMWARE(IWL_BZ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 805