1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2020 Intel Corporation 5 */ 6 #include <linux/module.h> 7 #include <linux/stringify.h> 8 #include "iwl-config.h" 9 #include "iwl-prph.h" 10 11 /* Highest firmware API version supported */ 12 #define IWL_22000_UCODE_API_MAX 62 13 14 /* Lowest firmware API version supported */ 15 #define IWL_22000_UCODE_API_MIN 39 16 17 /* NVM versions */ 18 #define IWL_22000_NVM_VERSION 0x0a1d 19 20 /* Memory offsets and lengths */ 21 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 22 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 23 #define IWL_22000_DCCM2_OFFSET 0x880000 24 #define IWL_22000_DCCM2_LEN 0x8000 25 #define IWL_22000_SMEM_OFFSET 0x400000 26 #define IWL_22000_SMEM_LEN 0xD0000 27 28 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 29 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 30 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 31 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 32 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 33 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 34 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 35 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 36 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 37 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 38 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 39 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 40 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 41 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 42 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 43 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 44 #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 45 #define IWL_SNJ_A_JF_B_FW_PRE "iwlwifi-SoSnj-a0-jf-b0-" 46 #define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0-" 47 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 48 #define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0-" 49 #define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 50 #define IWL_SNJ_A_MR_A_FW_PRE "iwlwifi-SoSnj-a0-mr-a0-" 51 52 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 53 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 54 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 55 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 56 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 57 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 58 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 59 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 60 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 61 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 62 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 63 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 64 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 65 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 66 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 67 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 68 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 69 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 70 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 71 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 72 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 73 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 74 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 75 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 76 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 77 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 78 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 79 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 80 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 81 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 82 #define IWL_SNJ_A_JF_B_MODULE_FIRMWARE(api) \ 83 IWL_SNJ_A_JF_B_FW_PRE __stringify(api) ".ucode" 84 #define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \ 85 IWL_MA_A_HR_B_FW_PRE __stringify(api) ".ucode" 86 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 87 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 88 #define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \ 89 IWL_MA_A_GF4_A_FW_PRE __stringify(api) ".ucode" 90 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 91 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 92 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \ 93 IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode" 94 95 static const struct iwl_base_params iwl_22000_base_params = { 96 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 97 .num_of_queues = 512, 98 .max_tfd_queue_size = 256, 99 .shadow_ram_support = true, 100 .led_compensation = 57, 101 .wd_timeout = IWL_LONG_WD_TIMEOUT, 102 .max_event_log_size = 512, 103 .shadow_reg_enable = true, 104 .pcie_l1_allowed = true, 105 }; 106 107 static const struct iwl_base_params iwl_ax210_base_params = { 108 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 109 .num_of_queues = 512, 110 .max_tfd_queue_size = 65536, 111 .shadow_ram_support = true, 112 .led_compensation = 57, 113 .wd_timeout = IWL_LONG_WD_TIMEOUT, 114 .max_event_log_size = 512, 115 .shadow_reg_enable = true, 116 .pcie_l1_allowed = true, 117 }; 118 119 static const struct iwl_ht_params iwl_22000_ht_params = { 120 .stbc = true, 121 .ldpc = true, 122 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) | 123 BIT(NL80211_BAND_6GHZ), 124 }; 125 126 #define IWL_DEVICE_22000_COMMON \ 127 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 128 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 129 .led_mode = IWL_LED_RF_STATE, \ 130 .nvm_hw_section_num = 10, \ 131 .non_shared_ant = ANT_B, \ 132 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 133 .dccm_len = IWL_22000_DCCM_LEN, \ 134 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 135 .dccm2_len = IWL_22000_DCCM2_LEN, \ 136 .smem_offset = IWL_22000_SMEM_OFFSET, \ 137 .smem_len = IWL_22000_SMEM_LEN, \ 138 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 139 .apmg_not_supported = true, \ 140 .trans.mq_rx_supported = true, \ 141 .vht_mu_mimo_supported = true, \ 142 .mac_addr_from_csr = true, \ 143 .ht_params = &iwl_22000_ht_params, \ 144 .nvm_ver = IWL_22000_NVM_VERSION, \ 145 .trans.use_tfh = true, \ 146 .trans.rf_id = true, \ 147 .trans.gen2 = true, \ 148 .nvm_type = IWL_NVM_EXT, \ 149 .dbgc_supported = true, \ 150 .min_umac_error_event_table = 0x400000, \ 151 .d3_debug_data_base_addr = 0x401000, \ 152 .d3_debug_data_length = 60 * 1024, \ 153 .mon_smem_regs = { \ 154 .write_ptr = { \ 155 .addr = LDBG_M2S_BUF_WPTR, \ 156 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 157 }, \ 158 .cycle_cnt = { \ 159 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 160 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 161 }, \ 162 } 163 164 #define IWL_DEVICE_22500 \ 165 IWL_DEVICE_22000_COMMON, \ 166 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 167 .trans.base_params = &iwl_22000_base_params, \ 168 .gp2_reg_addr = 0xa02c68, \ 169 .mon_dram_regs = { \ 170 .write_ptr = { \ 171 .addr = MON_BUFF_WRPTR_VER2, \ 172 .mask = 0xffffffff, \ 173 }, \ 174 .cycle_cnt = { \ 175 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 176 .mask = 0xffffffff, \ 177 }, \ 178 } 179 180 #define IWL_DEVICE_AX210 \ 181 IWL_DEVICE_22000_COMMON, \ 182 .trans.umac_prph_offset = 0x300000, \ 183 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 184 .trans.base_params = &iwl_ax210_base_params, \ 185 .min_txq_size = 128, \ 186 .gp2_reg_addr = 0xd02c68, \ 187 .min_256_ba_txq_size = 1024, \ 188 .mon_dram_regs = { \ 189 .write_ptr = { \ 190 .addr = DBGC_CUR_DBGBUF_STATUS, \ 191 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 192 }, \ 193 .cycle_cnt = { \ 194 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 195 .mask = 0xffffffff, \ 196 }, \ 197 .cur_frag = { \ 198 .addr = DBGC_CUR_DBGBUF_STATUS, \ 199 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 200 }, \ 201 } 202 203 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 204 .mq_rx_supported = true, 205 .use_tfh = true, 206 .rf_id = true, 207 .gen2 = true, 208 .device_family = IWL_DEVICE_FAMILY_22000, 209 .base_params = &iwl_22000_base_params, 210 }; 211 212 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 213 .mq_rx_supported = true, 214 .use_tfh = true, 215 .rf_id = true, 216 .gen2 = true, 217 .device_family = IWL_DEVICE_FAMILY_22000, 218 .base_params = &iwl_22000_base_params, 219 .integrated = true, 220 .xtal_latency = 500, 221 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 222 }; 223 224 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 225 .mq_rx_supported = true, 226 .use_tfh = true, 227 .rf_id = true, 228 .gen2 = true, 229 .device_family = IWL_DEVICE_FAMILY_22000, 230 .base_params = &iwl_22000_base_params, 231 .integrated = true, 232 .xtal_latency = 1820, 233 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 234 }; 235 236 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 237 .mq_rx_supported = true, 238 .use_tfh = true, 239 .rf_id = true, 240 .gen2 = true, 241 .device_family = IWL_DEVICE_FAMILY_22000, 242 .base_params = &iwl_22000_base_params, 243 .integrated = true, 244 .xtal_latency = 12000, 245 .low_latency_xtal = true, 246 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 247 }; 248 249 const struct iwl_cfg_trans_params iwl_snj_trans_cfg = { 250 .mq_rx_supported = true, 251 .use_tfh = true, 252 .rf_id = true, 253 .gen2 = true, 254 .device_family = IWL_DEVICE_FAMILY_AX210, 255 .base_params = &iwl_ax210_base_params, 256 .umac_prph_offset = 0x300000, 257 }; 258 259 const struct iwl_cfg_trans_params iwl_so_trans_cfg = { 260 .mq_rx_supported = true, 261 .use_tfh = true, 262 .rf_id = true, 263 .gen2 = true, 264 .device_family = IWL_DEVICE_FAMILY_AX210, 265 .base_params = &iwl_ax210_base_params, 266 .umac_prph_offset = 0x300000, 267 .integrated = true, 268 /* TODO: the following values need to be checked */ 269 .xtal_latency = 500, 270 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 271 }; 272 273 const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { 274 .mq_rx_supported = true, 275 .use_tfh = true, 276 .rf_id = true, 277 .gen2 = true, 278 .device_family = IWL_DEVICE_FAMILY_AX210, 279 .base_params = &iwl_ax210_base_params, 280 .umac_prph_offset = 0x300000, 281 .integrated = true, 282 /* TODO: the following values need to be checked */ 283 .xtal_latency = 12000, 284 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 285 }; 286 287 /* 288 * If the device doesn't support HE, no need to have that many buffers. 289 * 22000 devices can split multiple frames into a single RB, so fewer are 290 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 291 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 292 * additional overhead to account for processing time. 293 */ 294 #define IWL_NUM_RBDS_NON_HE 512 295 #define IWL_NUM_RBDS_22000_HE 2048 296 #define IWL_NUM_RBDS_AX210_HE 4096 297 298 /* 299 * All JF radio modules are part of the 9000 series, but the MAC part 300 * looks more like 22000. That's why this device is here, but called 301 * 9560 nevertheless. 302 */ 303 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 304 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 305 IWL_DEVICE_22500, 306 .num_rbds = IWL_NUM_RBDS_NON_HE, 307 }; 308 309 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 310 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 311 IWL_DEVICE_22500, 312 .num_rbds = IWL_NUM_RBDS_NON_HE, 313 }; 314 315 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 316 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 317 IWL_DEVICE_22500, 318 /* 319 * This device doesn't support receiving BlockAck with a large bitmap 320 * so we need to restrict the size of transmitted aggregation to the 321 * HT size; mac80211 would otherwise pick the HE max (256) by default. 322 */ 323 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 324 .num_rbds = IWL_NUM_RBDS_NON_HE, 325 }; 326 327 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 328 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 329 IWL_DEVICE_22500, 330 /* 331 * This device doesn't support receiving BlockAck with a large bitmap 332 * so we need to restrict the size of transmitted aggregation to the 333 * HT size; mac80211 would otherwise pick the HE max (256) by default. 334 */ 335 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 336 .num_rbds = IWL_NUM_RBDS_NON_HE, 337 }; 338 339 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 340 .device_family = IWL_DEVICE_FAMILY_22000, 341 .base_params = &iwl_22000_base_params, 342 .mq_rx_supported = true, 343 .use_tfh = true, 344 .rf_id = true, 345 .gen2 = true, 346 .bisr_workaround = 1, 347 }; 348 349 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 350 .device_family = IWL_DEVICE_FAMILY_AX210, 351 .base_params = &iwl_ax210_base_params, 352 .mq_rx_supported = true, 353 .use_tfh = true, 354 .rf_id = true, 355 .gen2 = true, 356 .integrated = true, 357 .umac_prph_offset = 0x300000 358 }; 359 360 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 361 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 362 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 363 const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 364 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz"; 365 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz"; 366 const char iwl_ma_name[] = "Intel(R) Wi-Fi 6"; 367 368 const char iwl_ax200_killer_1650w_name[] = 369 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 370 const char iwl_ax200_killer_1650x_name[] = 371 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 372 const char iwl_ax201_killer_1650s_name[] = 373 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 374 const char iwl_ax201_killer_1650i_name[] = 375 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 376 377 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 378 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 379 IWL_DEVICE_22500, 380 /* 381 * This device doesn't support receiving BlockAck with a large bitmap 382 * so we need to restrict the size of transmitted aggregation to the 383 * HT size; mac80211 would otherwise pick the HE max (256) by default. 384 */ 385 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 386 .tx_with_siso_diversity = true, 387 .num_rbds = IWL_NUM_RBDS_22000_HE, 388 }; 389 390 const struct iwl_cfg iwl_qu_b0_hr_b0 = { 391 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 392 IWL_DEVICE_22500, 393 /* 394 * This device doesn't support receiving BlockAck with a large bitmap 395 * so we need to restrict the size of transmitted aggregation to the 396 * HT size; mac80211 would otherwise pick the HE max (256) by default. 397 */ 398 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 399 .num_rbds = IWL_NUM_RBDS_22000_HE, 400 }; 401 402 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 403 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 404 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 405 IWL_DEVICE_22500, 406 /* 407 * This device doesn't support receiving BlockAck with a large bitmap 408 * so we need to restrict the size of transmitted aggregation to the 409 * HT size; mac80211 would otherwise pick the HE max (256) by default. 410 */ 411 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 412 .num_rbds = IWL_NUM_RBDS_22000_HE, 413 }; 414 415 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 416 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 417 IWL_DEVICE_22500, 418 /* 419 * This device doesn't support receiving BlockAck with a large bitmap 420 * so we need to restrict the size of transmitted aggregation to the 421 * HT size; mac80211 would otherwise pick the HE max (256) by default. 422 */ 423 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 424 .tx_with_siso_diversity = true, 425 .num_rbds = IWL_NUM_RBDS_22000_HE, 426 }; 427 428 const struct iwl_cfg iwl_qu_c0_hr_b0 = { 429 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 430 IWL_DEVICE_22500, 431 /* 432 * This device doesn't support receiving BlockAck with a large bitmap 433 * so we need to restrict the size of transmitted aggregation to the 434 * HT size; mac80211 would otherwise pick the HE max (256) by default. 435 */ 436 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 437 .num_rbds = IWL_NUM_RBDS_22000_HE, 438 }; 439 440 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 441 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 442 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 443 IWL_DEVICE_22500, 444 /* 445 * This device doesn't support receiving BlockAck with a large bitmap 446 * so we need to restrict the size of transmitted aggregation to the 447 * HT size; mac80211 would otherwise pick the HE max (256) by default. 448 */ 449 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 450 .num_rbds = IWL_NUM_RBDS_22000_HE, 451 }; 452 453 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 454 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 455 IWL_DEVICE_22500, 456 /* 457 * This device doesn't support receiving BlockAck with a large bitmap 458 * so we need to restrict the size of transmitted aggregation to the 459 * HT size; mac80211 would otherwise pick the HE max (256) by default. 460 */ 461 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 462 .tx_with_siso_diversity = true, 463 .num_rbds = IWL_NUM_RBDS_22000_HE, 464 }; 465 466 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 467 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 468 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 469 IWL_DEVICE_22500, 470 /* 471 * This device doesn't support receiving BlockAck with a large bitmap 472 * so we need to restrict the size of transmitted aggregation to the 473 * HT size; mac80211 would otherwise pick the HE max (256) by default. 474 */ 475 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 476 .num_rbds = IWL_NUM_RBDS_22000_HE, 477 }; 478 479 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 480 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 481 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 482 IWL_DEVICE_22500, 483 /* 484 * This device doesn't support receiving BlockAck with a large bitmap 485 * so we need to restrict the size of transmitted aggregation to the 486 * HT size; mac80211 would otherwise pick the HE max (256) by default. 487 */ 488 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 489 .num_rbds = IWL_NUM_RBDS_22000_HE, 490 }; 491 492 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 493 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 494 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 495 IWL_DEVICE_22500, 496 /* 497 * This device doesn't support receiving BlockAck with a large bitmap 498 * so we need to restrict the size of transmitted aggregation to the 499 * HT size; mac80211 would otherwise pick the HE max (256) by default. 500 */ 501 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 502 .num_rbds = IWL_NUM_RBDS_22000_HE, 503 }; 504 505 const struct iwl_cfg iwl_ax200_cfg_cc = { 506 .fw_name_pre = IWL_CC_A_FW_PRE, 507 IWL_DEVICE_22500, 508 /* 509 * This device doesn't support receiving BlockAck with a large bitmap 510 * so we need to restrict the size of transmitted aggregation to the 511 * HT size; mac80211 would otherwise pick the HE max (256) by default. 512 */ 513 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 514 .num_rbds = IWL_NUM_RBDS_22000_HE, 515 }; 516 517 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 518 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 519 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 520 IWL_DEVICE_22500, 521 /* 522 * This device doesn't support receiving BlockAck with a large bitmap 523 * so we need to restrict the size of transmitted aggregation to the 524 * HT size; mac80211 would otherwise pick the HE max (256) by default. 525 */ 526 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 527 .num_rbds = IWL_NUM_RBDS_22000_HE, 528 }; 529 530 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 531 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 532 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 533 IWL_DEVICE_22500, 534 /* 535 * This device doesn't support receiving BlockAck with a large bitmap 536 * so we need to restrict the size of transmitted aggregation to the 537 * HT size; mac80211 would otherwise pick the HE max (256) by default. 538 */ 539 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 540 .num_rbds = IWL_NUM_RBDS_22000_HE, 541 }; 542 543 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 544 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 545 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 546 IWL_DEVICE_22500, 547 /* 548 * This device doesn't support receiving BlockAck with a large bitmap 549 * so we need to restrict the size of transmitted aggregation to the 550 * HT size; mac80211 would otherwise pick the HE max (256) by default. 551 */ 552 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 553 .num_rbds = IWL_NUM_RBDS_22000_HE, 554 }; 555 556 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 557 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 558 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 559 IWL_DEVICE_22500, 560 /* 561 * This device doesn't support receiving BlockAck with a large bitmap 562 * so we need to restrict the size of transmitted aggregation to the 563 * HT size; mac80211 would otherwise pick the HE max (256) by default. 564 */ 565 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 566 .num_rbds = IWL_NUM_RBDS_22000_HE, 567 }; 568 569 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 570 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 571 IWL_DEVICE_22500, 572 /* 573 * This device doesn't support receiving BlockAck with a large bitmap 574 * so we need to restrict the size of transmitted aggregation to the 575 * HT size; mac80211 would otherwise pick the HE max (256) by default. 576 */ 577 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 578 .num_rbds = IWL_NUM_RBDS_22000_HE, 579 }; 580 581 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = { 582 .name = "Intel(R) Wireless-AC 9560 160MHz", 583 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 584 IWL_DEVICE_AX210, 585 .num_rbds = IWL_NUM_RBDS_NON_HE, 586 }; 587 588 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 589 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 590 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 591 IWL_DEVICE_AX210, 592 .num_rbds = IWL_NUM_RBDS_AX210_HE, 593 }; 594 595 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 596 .name = iwl_ax211_name, 597 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 598 .uhb_supported = true, 599 IWL_DEVICE_AX210, 600 .num_rbds = IWL_NUM_RBDS_AX210_HE, 601 }; 602 603 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 604 .name = iwl_ax211_name, 605 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 606 .uhb_supported = true, 607 IWL_DEVICE_AX210, 608 .num_rbds = IWL_NUM_RBDS_AX210_HE, 609 .trans.xtal_latency = 12000, 610 .trans.low_latency_xtal = true, 611 }; 612 613 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 614 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 615 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 616 .uhb_supported = true, 617 IWL_DEVICE_AX210, 618 .num_rbds = IWL_NUM_RBDS_AX210_HE, 619 }; 620 621 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 622 .name = iwl_ax411_name, 623 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 624 .uhb_supported = true, 625 IWL_DEVICE_AX210, 626 .num_rbds = IWL_NUM_RBDS_AX210_HE, 627 }; 628 629 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 630 .name = iwl_ax411_name, 631 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 632 .uhb_supported = true, 633 IWL_DEVICE_AX210, 634 .num_rbds = IWL_NUM_RBDS_AX210_HE, 635 .trans.xtal_latency = 12000, 636 .trans.low_latency_xtal = true, 637 }; 638 639 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 640 .name = iwl_ax411_name, 641 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 642 .uhb_supported = true, 643 IWL_DEVICE_AX210, 644 .num_rbds = IWL_NUM_RBDS_AX210_HE, 645 }; 646 647 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 648 .name = iwl_ax211_name, 649 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 650 .uhb_supported = true, 651 IWL_DEVICE_AX210, 652 .num_rbds = IWL_NUM_RBDS_AX210_HE, 653 }; 654 655 const struct iwl_cfg iwl_cfg_snj_hr_b0 = { 656 .fw_name_pre = IWL_SNJ_A_HR_B_FW_PRE, 657 .uhb_supported = true, 658 IWL_DEVICE_AX210, 659 .num_rbds = IWL_NUM_RBDS_AX210_HE, 660 }; 661 662 const struct iwl_cfg iwl_cfg_snj_a0_jf_b0 = { 663 .fw_name_pre = IWL_SNJ_A_JF_B_FW_PRE, 664 .uhb_supported = true, 665 IWL_DEVICE_AX210, 666 .num_rbds = IWL_NUM_RBDS_AX210_HE, 667 }; 668 669 const struct iwl_cfg iwl_cfg_ma_a0_hr_b0 = { 670 .fw_name_pre = IWL_MA_A_HR_B_FW_PRE, 671 .uhb_supported = true, 672 IWL_DEVICE_AX210, 673 .num_rbds = IWL_NUM_RBDS_AX210_HE, 674 }; 675 676 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 677 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 678 .uhb_supported = true, 679 IWL_DEVICE_AX210, 680 .num_rbds = IWL_NUM_RBDS_AX210_HE, 681 }; 682 683 const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0 = { 684 .fw_name_pre = IWL_MA_A_GF4_A_FW_PRE, 685 .uhb_supported = true, 686 IWL_DEVICE_AX210, 687 .num_rbds = IWL_NUM_RBDS_AX210_HE, 688 }; 689 690 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 691 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 692 .uhb_supported = true, 693 IWL_DEVICE_AX210, 694 .num_rbds = IWL_NUM_RBDS_AX210_HE, 695 }; 696 697 const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { 698 .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, 699 .uhb_supported = true, 700 IWL_DEVICE_AX210, 701 .num_rbds = IWL_NUM_RBDS_AX210_HE, 702 }; 703 704 const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { 705 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 706 IWL_DEVICE_AX210, 707 .num_rbds = IWL_NUM_RBDS_AX210_HE, 708 }; 709 710 const struct iwl_cfg iwl_cfg_quz_a0_hr_b0 = { 711 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 712 IWL_DEVICE_22500, 713 /* 714 * This device doesn't support receiving BlockAck with a large bitmap 715 * so we need to restrict the size of transmitted aggregation to the 716 * HT size; mac80211 would otherwise pick the HE max (256) by default. 717 */ 718 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 719 .num_rbds = IWL_NUM_RBDS_22000_HE, 720 }; 721 722 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 723 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 724 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 725 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 726 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 727 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 728 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 729 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 730 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 731 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 732 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 733 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 734 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 735 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 736 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 737 MODULE_FIRMWARE(IWL_SNJ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 738 MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 739 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 740 MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 741 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 742 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 743