1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2015-2017 Intel Deutschland GmbH
4  * Copyright (C) 2018-2020 Intel Corporation
5  */
6 #include <linux/module.h>
7 #include <linux/stringify.h>
8 #include "iwl-config.h"
9 #include "iwl-prph.h"
10 
11 /* Highest firmware API version supported */
12 #define IWL_22000_UCODE_API_MAX	59
13 
14 /* Lowest firmware API version supported */
15 #define IWL_22000_UCODE_API_MIN	39
16 
17 /* NVM versions */
18 #define IWL_22000_NVM_VERSION		0x0a1d
19 
20 /* Memory offsets and lengths */
21 #define IWL_22000_DCCM_OFFSET		0x800000 /* LMAC1 */
22 #define IWL_22000_DCCM_LEN		0x10000 /* LMAC1 */
23 #define IWL_22000_DCCM2_OFFSET		0x880000
24 #define IWL_22000_DCCM2_LEN		0x8000
25 #define IWL_22000_SMEM_OFFSET		0x400000
26 #define IWL_22000_SMEM_LEN		0xD0000
27 
28 #define IWL_QU_B_HR_B_FW_PRE		"iwlwifi-Qu-b0-hr-b0-"
29 #define IWL_QNJ_B_HR_B_FW_PRE		"iwlwifi-QuQnj-b0-hr-b0-"
30 #define IWL_QU_C_HR_B_FW_PRE		"iwlwifi-Qu-c0-hr-b0-"
31 #define IWL_QU_B_JF_B_FW_PRE		"iwlwifi-Qu-b0-jf-b0-"
32 #define IWL_QU_C_JF_B_FW_PRE		"iwlwifi-Qu-c0-jf-b0-"
33 #define IWL_QUZ_A_HR_B_FW_PRE		"iwlwifi-QuZ-a0-hr-b0-"
34 #define IWL_QUZ_A_JF_B_FW_PRE		"iwlwifi-QuZ-a0-jf-b0-"
35 #define IWL_QNJ_B_JF_B_FW_PRE		"iwlwifi-QuQnj-b0-jf-b0-"
36 #define IWL_CC_A_FW_PRE			"iwlwifi-cc-a0-"
37 #define IWL_SO_A_JF_B_FW_PRE		"iwlwifi-so-a0-jf-b0-"
38 #define IWL_SO_A_HR_B_FW_PRE		"iwlwifi-so-a0-hr-b0-"
39 #define IWL_SO_A_GF_A_FW_PRE		"iwlwifi-so-a0-gf-a0-"
40 #define IWL_TY_A_GF_A_FW_PRE		"iwlwifi-ty-a0-gf-a0-"
41 #define IWL_SO_A_GF4_A_FW_PRE		"iwlwifi-so-a0-gf4-a0-"
42 #define IWL_SNJ_A_GF4_A_FW_PRE		"iwlwifi-SoSnj-a0-gf4-a0-"
43 #define IWL_SNJ_A_GF_A_FW_PRE		"iwlwifi-SoSnj-a0-gf-a0-"
44 #define IWL_SNJ_A_HR_B_FW_PRE		"iwlwifi-SoSnj-a0-hr-b0-"
45 #define IWL_MA_A_GF_A_FW_PRE		"iwlwifi-ma-a0-gf-a0-"
46 #define IWL_MA_A_MR_A_FW_PRE		"iwlwifi-ma-a0-mr-a0-"
47 #define IWL_SNJ_A_MR_A_FW_PRE		"iwlwifi-SoSnj-a0-mr-a0-"
48 
49 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \
50 	IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode"
51 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api)	\
52 	IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode"
53 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \
54 	IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode"
55 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \
56 	IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode"
57 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \
58 	IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode"
59 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \
60 	IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode"
61 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api)		\
62 	IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode"
63 #define IWL_CC_A_MODULE_FIRMWARE(api)			\
64 	IWL_CC_A_FW_PRE __stringify(api) ".ucode"
65 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \
66 	IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode"
67 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \
68 	IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode"
69 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \
70 	IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode"
71 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \
72 	IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode"
73 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \
74 	IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode"
75 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \
76 	IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode"
77 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \
78 	IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode"
79 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \
80 	IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode"
81 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \
82 	IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode"
83 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \
84 	IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode"
85 
86 static const struct iwl_base_params iwl_22000_base_params = {
87 	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
88 	.num_of_queues = 512,
89 	.max_tfd_queue_size = 256,
90 	.shadow_ram_support = true,
91 	.led_compensation = 57,
92 	.wd_timeout = IWL_LONG_WD_TIMEOUT,
93 	.max_event_log_size = 512,
94 	.shadow_reg_enable = true,
95 	.pcie_l1_allowed = true,
96 };
97 
98 static const struct iwl_base_params iwl_ax210_base_params = {
99 	.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
100 	.num_of_queues = 512,
101 	.max_tfd_queue_size = 65536,
102 	.shadow_ram_support = true,
103 	.led_compensation = 57,
104 	.wd_timeout = IWL_LONG_WD_TIMEOUT,
105 	.max_event_log_size = 512,
106 	.shadow_reg_enable = true,
107 	.pcie_l1_allowed = true,
108 };
109 
110 static const struct iwl_ht_params iwl_22000_ht_params = {
111 	.stbc = true,
112 	.ldpc = true,
113 	.ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) |
114 		      BIT(NL80211_BAND_6GHZ),
115 };
116 
117 #define IWL_DEVICE_22000_COMMON						\
118 	.ucode_api_max = IWL_22000_UCODE_API_MAX,			\
119 	.ucode_api_min = IWL_22000_UCODE_API_MIN,			\
120 	.led_mode = IWL_LED_RF_STATE,					\
121 	.nvm_hw_section_num = 10,					\
122 	.non_shared_ant = ANT_B,					\
123 	.dccm_offset = IWL_22000_DCCM_OFFSET,				\
124 	.dccm_len = IWL_22000_DCCM_LEN,					\
125 	.dccm2_offset = IWL_22000_DCCM2_OFFSET,				\
126 	.dccm2_len = IWL_22000_DCCM2_LEN,				\
127 	.smem_offset = IWL_22000_SMEM_OFFSET,				\
128 	.smem_len = IWL_22000_SMEM_LEN,					\
129 	.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,		\
130 	.apmg_not_supported = true,					\
131 	.trans.mq_rx_supported = true,					\
132 	.vht_mu_mimo_supported = true,					\
133 	.mac_addr_from_csr = true,					\
134 	.ht_params = &iwl_22000_ht_params,				\
135 	.nvm_ver = IWL_22000_NVM_VERSION,				\
136 	.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K,		\
137 	.trans.use_tfh = true,						\
138 	.trans.rf_id = true,						\
139 	.trans.gen2 = true,						\
140 	.nvm_type = IWL_NVM_EXT,					\
141 	.dbgc_supported = true,						\
142 	.min_umac_error_event_table = 0x400000,				\
143 	.d3_debug_data_base_addr = 0x401000,				\
144 	.d3_debug_data_length = 60 * 1024,				\
145 	.mon_smem_regs = {						\
146 		.write_ptr = {						\
147 			.addr = LDBG_M2S_BUF_WPTR,			\
148 			.mask = LDBG_M2S_BUF_WPTR_VAL_MSK,		\
149 	},								\
150 		.cycle_cnt = {						\
151 			.addr = LDBG_M2S_BUF_WRAP_CNT,			\
152 			.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,		\
153 		},							\
154 	}
155 
156 #define IWL_DEVICE_22500						\
157 	IWL_DEVICE_22000_COMMON,					\
158 	.trans.device_family = IWL_DEVICE_FAMILY_22000,			\
159 	.trans.base_params = &iwl_22000_base_params,			\
160 	.gp2_reg_addr = 0xa02c68,					\
161 	.mon_dram_regs = {						\
162 		.write_ptr = {						\
163 			.addr = MON_BUFF_WRPTR_VER2,			\
164 			.mask = 0xffffffff,				\
165 		},							\
166 		.cycle_cnt = {						\
167 			.addr = MON_BUFF_CYCLE_CNT_VER2,		\
168 			.mask = 0xffffffff,				\
169 		},							\
170 	}
171 
172 #define IWL_DEVICE_AX210						\
173 	IWL_DEVICE_22000_COMMON,					\
174 	.trans.umac_prph_offset = 0x300000,				\
175 	.trans.device_family = IWL_DEVICE_FAMILY_AX210,			\
176 	.trans.base_params = &iwl_ax210_base_params,			\
177 	.min_txq_size = 128,						\
178 	.gp2_reg_addr = 0xd02c68,					\
179 	.min_256_ba_txq_size = 1024,					\
180 	.mon_dram_regs = {						\
181 		.write_ptr = {						\
182 			.addr = DBGC_CUR_DBGBUF_STATUS,			\
183 			.mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK,	\
184 		},							\
185 		.cycle_cnt = {						\
186 			.addr = DBGC_DBGBUF_WRAP_AROUND,		\
187 			.mask = 0xffffffff,				\
188 		},							\
189 		.cur_frag = {						\
190 			.addr = DBGC_CUR_DBGBUF_STATUS,			\
191 			.mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK,		\
192 		},							\
193 	}
194 
195 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = {
196 	.mq_rx_supported = true,
197 	.use_tfh = true,
198 	.rf_id = true,
199 	.gen2 = true,
200 	.device_family = IWL_DEVICE_FAMILY_22000,
201 	.base_params = &iwl_22000_base_params,
202 };
203 
204 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = {
205 	.mq_rx_supported = true,
206 	.use_tfh = true,
207 	.rf_id = true,
208 	.gen2 = true,
209 	.device_family = IWL_DEVICE_FAMILY_22000,
210 	.base_params = &iwl_22000_base_params,
211 	.integrated = true,
212 	.xtal_latency = 500,
213 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
214 };
215 
216 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = {
217 	.mq_rx_supported = true,
218 	.use_tfh = true,
219 	.rf_id = true,
220 	.gen2 = true,
221 	.device_family = IWL_DEVICE_FAMILY_22000,
222 	.base_params = &iwl_22000_base_params,
223 	.integrated = true,
224 	.xtal_latency = 1820,
225 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US,
226 };
227 
228 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = {
229 	.mq_rx_supported = true,
230 	.use_tfh = true,
231 	.rf_id = true,
232 	.gen2 = true,
233 	.device_family = IWL_DEVICE_FAMILY_22000,
234 	.base_params = &iwl_22000_base_params,
235 	.integrated = true,
236 	.xtal_latency = 12000,
237 	.low_latency_xtal = true,
238 	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
239 };
240 
241 /*
242  * If the device doesn't support HE, no need to have that many buffers.
243  * 22000 devices can split multiple frames into a single RB, so fewer are
244  * needed; AX210 cannot (but use smaller RBs by default) - these sizes
245  * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
246  * additional overhead to account for processing time.
247  */
248 #define IWL_NUM_RBDS_NON_HE		512
249 #define IWL_NUM_RBDS_22000_HE		2048
250 #define IWL_NUM_RBDS_AX210_HE		4096
251 
252 /*
253  * All JF radio modules are part of the 9000 series, but the MAC part
254  * looks more like 22000.  That's why this device is here, but called
255  * 9560 nevertheless.
256  */
257 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = {
258 	.fw_name_pre = IWL_QU_B_JF_B_FW_PRE,
259 	IWL_DEVICE_22500,
260 	.num_rbds = IWL_NUM_RBDS_NON_HE,
261 };
262 
263 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = {
264 	.fw_name_pre = IWL_QU_C_JF_B_FW_PRE,
265 	IWL_DEVICE_22500,
266 	.num_rbds = IWL_NUM_RBDS_NON_HE,
267 };
268 
269 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = {
270 	.fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE,
271 	IWL_DEVICE_22500,
272 	/*
273 	 * This device doesn't support receiving BlockAck with a large bitmap
274 	 * so we need to restrict the size of transmitted aggregation to the
275 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
276 	 */
277 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
278 	.num_rbds = IWL_NUM_RBDS_NON_HE,
279 };
280 
281 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = {
282 	.fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE,
283 	IWL_DEVICE_22500,
284 	/*
285 	 * This device doesn't support receiving BlockAck with a large bitmap
286 	 * so we need to restrict the size of transmitted aggregation to the
287 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
288 	 */
289 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
290 	.num_rbds = IWL_NUM_RBDS_NON_HE,
291 };
292 
293 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = {
294 	.device_family = IWL_DEVICE_FAMILY_22000,
295 	.base_params = &iwl_22000_base_params,
296 	.mq_rx_supported = true,
297 	.use_tfh = true,
298 	.rf_id = true,
299 	.gen2 = true,
300 	.bisr_workaround = 1,
301 };
302 
303 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = {
304 	.device_family = IWL_DEVICE_FAMILY_AX210,
305 	.base_params = &iwl_ax210_base_params,
306 	.mq_rx_supported = true,
307 	.use_tfh = true,
308 	.rf_id = true,
309 	.gen2 = true,
310 	.integrated = true,
311 	.umac_prph_offset = 0x300000
312 };
313 
314 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101";
315 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz";
316 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz";
317 const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203";
318 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz";
319 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz";
320 const char iwl_ma_name[] = "Intel(R) Wi-Fi 6";
321 
322 const char iwl_ax200_killer_1650w_name[] =
323 	"Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)";
324 const char iwl_ax200_killer_1650x_name[] =
325 	"Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)";
326 const char iwl_ax201_killer_1650s_name[] =
327 	"Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)";
328 const char iwl_ax201_killer_1650i_name[] =
329 	"Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)";
330 
331 const struct iwl_cfg iwl_qu_b0_hr1_b0 = {
332 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
333 	IWL_DEVICE_22500,
334 	/*
335 	 * This device doesn't support receiving BlockAck with a large bitmap
336 	 * so we need to restrict the size of transmitted aggregation to the
337 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
338 	 */
339 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
340 	.tx_with_siso_diversity = true,
341 	.num_rbds = IWL_NUM_RBDS_22000_HE,
342 };
343 
344 const struct iwl_cfg iwl_qu_b0_hr_b0 = {
345 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
346 	IWL_DEVICE_22500,
347 	/*
348 	 * This device doesn't support receiving BlockAck with a large bitmap
349 	 * so we need to restrict the size of transmitted aggregation to the
350 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
351 	 */
352 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
353 	.num_rbds = IWL_NUM_RBDS_22000_HE,
354 };
355 
356 const struct iwl_cfg iwl_ax201_cfg_qu_hr = {
357 	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
358 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
359 	IWL_DEVICE_22500,
360 	/*
361 	 * This device doesn't support receiving BlockAck with a large bitmap
362 	 * so we need to restrict the size of transmitted aggregation to the
363 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
364 	 */
365 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
366 	.num_rbds = IWL_NUM_RBDS_22000_HE,
367 };
368 
369 const struct iwl_cfg iwl_qu_c0_hr1_b0 = {
370 	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
371 	IWL_DEVICE_22500,
372 	/*
373 	 * This device doesn't support receiving BlockAck with a large bitmap
374 	 * so we need to restrict the size of transmitted aggregation to the
375 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
376 	 */
377 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
378 	.tx_with_siso_diversity = true,
379 	.num_rbds = IWL_NUM_RBDS_22000_HE,
380 };
381 
382 const struct iwl_cfg iwl_qu_c0_hr_b0 = {
383 	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
384 	IWL_DEVICE_22500,
385 	/*
386 	 * This device doesn't support receiving BlockAck with a large bitmap
387 	 * so we need to restrict the size of transmitted aggregation to the
388 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
389 	 */
390 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
391 	.num_rbds = IWL_NUM_RBDS_22000_HE,
392 };
393 
394 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = {
395 	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
396 	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
397 	IWL_DEVICE_22500,
398 	/*
399 	 * This device doesn't support receiving BlockAck with a large bitmap
400 	 * so we need to restrict the size of transmitted aggregation to the
401 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
402 	 */
403 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
404 	.num_rbds = IWL_NUM_RBDS_22000_HE,
405 };
406 
407 const struct iwl_cfg iwl_quz_a0_hr1_b0 = {
408 	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
409 	IWL_DEVICE_22500,
410 	/*
411 	 * This device doesn't support receiving BlockAck with a large bitmap
412 	 * so we need to restrict the size of transmitted aggregation to the
413 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
414 	 */
415 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
416 	.tx_with_siso_diversity = true,
417 	.num_rbds = IWL_NUM_RBDS_22000_HE,
418 };
419 
420 const struct iwl_cfg iwl_ax201_cfg_quz_hr = {
421 	.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
422 	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
423 	IWL_DEVICE_22500,
424 	/*
425          * This device doesn't support receiving BlockAck with a large bitmap
426          * so we need to restrict the size of transmitted aggregation to the
427          * HT size; mac80211 would otherwise pick the HE max (256) by default.
428          */
429 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
430 	.num_rbds = IWL_NUM_RBDS_22000_HE,
431 };
432 
433 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = {
434 	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
435 	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
436 	IWL_DEVICE_22500,
437 	/*
438          * This device doesn't support receiving BlockAck with a large bitmap
439          * so we need to restrict the size of transmitted aggregation to the
440          * HT size; mac80211 would otherwise pick the HE max (256) by default.
441          */
442 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
443 	.num_rbds = IWL_NUM_RBDS_22000_HE,
444 };
445 
446 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = {
447 	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
448 	.fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE,
449 	IWL_DEVICE_22500,
450 	/*
451          * This device doesn't support receiving BlockAck with a large bitmap
452          * so we need to restrict the size of transmitted aggregation to the
453          * HT size; mac80211 would otherwise pick the HE max (256) by default.
454          */
455 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
456 	.num_rbds = IWL_NUM_RBDS_22000_HE,
457 };
458 
459 const struct iwl_cfg iwl_ax200_cfg_cc = {
460 	.fw_name_pre = IWL_CC_A_FW_PRE,
461 	IWL_DEVICE_22500,
462 	/*
463 	 * This device doesn't support receiving BlockAck with a large bitmap
464 	 * so we need to restrict the size of transmitted aggregation to the
465 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
466 	 */
467 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
468 	.num_rbds = IWL_NUM_RBDS_22000_HE,
469 };
470 
471 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = {
472 	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
473 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
474 	IWL_DEVICE_22500,
475 	/*
476 	 * This device doesn't support receiving BlockAck with a large bitmap
477 	 * so we need to restrict the size of transmitted aggregation to the
478 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
479 	 */
480 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
481 	.num_rbds = IWL_NUM_RBDS_22000_HE,
482 };
483 
484 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = {
485 	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
486 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
487 	IWL_DEVICE_22500,
488 	/*
489 	 * This device doesn't support receiving BlockAck with a large bitmap
490 	 * so we need to restrict the size of transmitted aggregation to the
491 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
492 	 */
493 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
494 	.num_rbds = IWL_NUM_RBDS_22000_HE,
495 };
496 
497 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = {
498 	.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
499 	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
500 	IWL_DEVICE_22500,
501 	/*
502 	 * This device doesn't support receiving BlockAck with a large bitmap
503 	 * so we need to restrict the size of transmitted aggregation to the
504 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
505 	 */
506 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
507 	.num_rbds = IWL_NUM_RBDS_22000_HE,
508 };
509 
510 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = {
511 	.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
512 	.fw_name_pre = IWL_QU_C_HR_B_FW_PRE,
513 	IWL_DEVICE_22500,
514 	/*
515 	 * This device doesn't support receiving BlockAck with a large bitmap
516 	 * so we need to restrict the size of transmitted aggregation to the
517 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
518 	 */
519 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
520 	.num_rbds = IWL_NUM_RBDS_22000_HE,
521 };
522 
523 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = {
524 	.fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE,
525 	IWL_DEVICE_22500,
526 	/*
527 	 * This device doesn't support receiving BlockAck with a large bitmap
528 	 * so we need to restrict the size of transmitted aggregation to the
529 	 * HT size; mac80211 would otherwise pick the HE max (256) by default.
530 	 */
531 	.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
532 	.num_rbds = IWL_NUM_RBDS_22000_HE,
533 };
534 
535 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = {
536 	.name = "Intel(R) Wireless-AC 9560 160MHz",
537 	.fw_name_pre = IWL_SO_A_JF_B_FW_PRE,
538 	IWL_DEVICE_AX210,
539 	.num_rbds = IWL_NUM_RBDS_NON_HE,
540 };
541 
542 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = {
543 	.name = "Intel(R) Wi-Fi 6 AX210 160MHz",
544 	.fw_name_pre = IWL_SO_A_HR_B_FW_PRE,
545 	IWL_DEVICE_AX210,
546 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
547 };
548 
549 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = {
550 	.name = iwl_ax211_name,
551 	.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
552 	.uhb_supported = true,
553 	IWL_DEVICE_AX210,
554 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
555 };
556 
557 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = {
558 	.name = iwl_ax211_name,
559 	.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
560 	.uhb_supported = true,
561 	IWL_DEVICE_AX210,
562 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
563 	.trans.xtal_latency = 12000,
564 	.trans.low_latency_xtal = true,
565 };
566 
567 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = {
568 	.name = "Intel(R) Wi-Fi 6 AX210 160MHz",
569 	.fw_name_pre = IWL_TY_A_GF_A_FW_PRE,
570 	.uhb_supported = true,
571 	IWL_DEVICE_AX210,
572 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
573 };
574 
575 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = {
576 	.name = iwl_ax411_name,
577 	.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
578 	.uhb_supported = true,
579 	IWL_DEVICE_AX210,
580 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
581 };
582 
583 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = {
584 	.name = iwl_ax411_name,
585 	.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
586 	.uhb_supported = true,
587 	IWL_DEVICE_AX210,
588 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
589 	.trans.xtal_latency = 12000,
590 	.trans.low_latency_xtal = true,
591 };
592 
593 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = {
594 	.name = iwl_ax411_name,
595 	.fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE,
596 	.uhb_supported = true,
597 	IWL_DEVICE_AX210,
598 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
599 };
600 
601 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = {
602 	.name = iwl_ax211_name,
603 	.fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE,
604 	.uhb_supported = true,
605 	IWL_DEVICE_AX210,
606 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
607 };
608 
609 const struct iwl_cfg iwlax201_cfg_snj_hr_b0 = {
610 	.name = iwl_ax201_name,
611 	.fw_name_pre = IWL_QU_B_HR_B_FW_PRE,
612 	.uhb_supported = true,
613 	IWL_DEVICE_AX210,
614 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
615 };
616 
617 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = {
618 	.fw_name_pre = IWL_MA_A_GF_A_FW_PRE,
619 	.uhb_supported = true,
620 	IWL_DEVICE_AX210,
621 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
622 };
623 
624 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = {
625 	.fw_name_pre = IWL_MA_A_MR_A_FW_PRE,
626 	.uhb_supported = true,
627 	IWL_DEVICE_AX210,
628 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
629 };
630 
631 const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = {
632 	.fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE,
633 	.uhb_supported = true,
634 	IWL_DEVICE_AX210,
635 	.num_rbds = IWL_NUM_RBDS_AX210_HE,
636 };
637 
638 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
639 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
640 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
641 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
642 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
643 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
644 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
645 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
646 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
647 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
648 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
649 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
650 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
651 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
652 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
653 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
654 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
655 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
656