1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2020 Intel Corporation 5 */ 6 #include <linux/module.h> 7 #include <linux/stringify.h> 8 #include "iwl-config.h" 9 #include "iwl-prph.h" 10 11 /* Highest firmware API version supported */ 12 #define IWL_22000_UCODE_API_MAX 61 13 14 /* Lowest firmware API version supported */ 15 #define IWL_22000_UCODE_API_MIN 39 16 17 /* NVM versions */ 18 #define IWL_22000_NVM_VERSION 0x0a1d 19 20 /* Memory offsets and lengths */ 21 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 22 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 23 #define IWL_22000_DCCM2_OFFSET 0x880000 24 #define IWL_22000_DCCM2_LEN 0x8000 25 #define IWL_22000_SMEM_OFFSET 0x400000 26 #define IWL_22000_SMEM_LEN 0xD0000 27 28 #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0-" 29 #define IWL_QNJ_B_HR_B_FW_PRE "iwlwifi-QuQnj-b0-hr-b0-" 30 #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0-" 31 #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0-" 32 #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0-" 33 #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0-" 34 #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0-" 35 #define IWL_QNJ_B_JF_B_FW_PRE "iwlwifi-QuQnj-b0-jf-b0-" 36 #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0-" 37 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0-" 38 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0-" 39 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" 40 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" 41 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" 42 #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" 43 #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" 44 #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" 45 #define IWL_SNJ_A_JF_B_FW_PRE "iwlwifi-SoSnj-a0-jf-b0-" 46 #define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0-" 47 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0-" 48 #define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0-" 49 #define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0-" 50 #define IWL_SNJ_A_MR_A_FW_PRE "iwlwifi-SoSnj-a0-mr-a0-" 51 52 #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 53 IWL_QU_B_HR_B_FW_PRE __stringify(api) ".ucode" 54 #define IWL_QNJ_B_HR_B_MODULE_FIRMWARE(api) \ 55 IWL_QNJ_B_HR_B_FW_PRE __stringify(api) ".ucode" 56 #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 57 IWL_QUZ_A_HR_B_FW_PRE __stringify(api) ".ucode" 58 #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 59 IWL_QUZ_A_JF_B_FW_PRE __stringify(api) ".ucode" 60 #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 61 IWL_QU_C_HR_B_FW_PRE __stringify(api) ".ucode" 62 #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 63 IWL_QU_B_JF_B_FW_PRE __stringify(api) ".ucode" 64 #define IWL_QNJ_B_JF_B_MODULE_FIRMWARE(api) \ 65 IWL_QNJ_B_JF_B_FW_PRE __stringify(api) ".ucode" 66 #define IWL_CC_A_MODULE_FIRMWARE(api) \ 67 IWL_CC_A_FW_PRE __stringify(api) ".ucode" 68 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 69 IWL_SO_A_JF_B_FW_PRE __stringify(api) ".ucode" 70 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 71 IWL_SO_A_HR_B_FW_PRE __stringify(api) ".ucode" 72 #define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \ 73 IWL_SO_A_GF_A_FW_PRE __stringify(api) ".ucode" 74 #define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \ 75 IWL_TY_A_GF_A_FW_PRE __stringify(api) ".ucode" 76 #define IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(api) \ 77 IWL_SNJ_A_GF4_A_FW_PRE __stringify(api) ".ucode" 78 #define IWL_SNJ_A_GF_A_MODULE_FIRMWARE(api) \ 79 IWL_SNJ_A_GF_A_FW_PRE __stringify(api) ".ucode" 80 #define IWL_SNJ_A_HR_B_MODULE_FIRMWARE(api) \ 81 IWL_SNJ_A_HR_B_FW_PRE __stringify(api) ".ucode" 82 #define IWL_SNJ_A_JF_B_MODULE_FIRMWARE(api) \ 83 IWL_SNJ_A_JF_B_FW_PRE __stringify(api) ".ucode" 84 #define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \ 85 IWL_MA_A_HR_B_FW_PRE __stringify(api) ".ucode" 86 #define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \ 87 IWL_MA_A_GF_A_FW_PRE __stringify(api) ".ucode" 88 #define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \ 89 IWL_MA_A_GF4_A_FW_PRE __stringify(api) ".ucode" 90 #define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \ 91 IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode" 92 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \ 93 IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode" 94 95 static const struct iwl_base_params iwl_22000_base_params = { 96 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 97 .num_of_queues = 512, 98 .max_tfd_queue_size = 256, 99 .shadow_ram_support = true, 100 .led_compensation = 57, 101 .wd_timeout = IWL_LONG_WD_TIMEOUT, 102 .max_event_log_size = 512, 103 .shadow_reg_enable = true, 104 .pcie_l1_allowed = true, 105 }; 106 107 static const struct iwl_base_params iwl_ax210_base_params = { 108 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 109 .num_of_queues = 512, 110 .max_tfd_queue_size = 65536, 111 .shadow_ram_support = true, 112 .led_compensation = 57, 113 .wd_timeout = IWL_LONG_WD_TIMEOUT, 114 .max_event_log_size = 512, 115 .shadow_reg_enable = true, 116 .pcie_l1_allowed = true, 117 }; 118 119 static const struct iwl_ht_params iwl_22000_ht_params = { 120 .stbc = true, 121 .ldpc = true, 122 .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) | 123 BIT(NL80211_BAND_6GHZ), 124 }; 125 126 #define IWL_DEVICE_22000_COMMON \ 127 .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 128 .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 129 .led_mode = IWL_LED_RF_STATE, \ 130 .nvm_hw_section_num = 10, \ 131 .non_shared_ant = ANT_B, \ 132 .dccm_offset = IWL_22000_DCCM_OFFSET, \ 133 .dccm_len = IWL_22000_DCCM_LEN, \ 134 .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 135 .dccm2_len = IWL_22000_DCCM2_LEN, \ 136 .smem_offset = IWL_22000_SMEM_OFFSET, \ 137 .smem_len = IWL_22000_SMEM_LEN, \ 138 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 139 .apmg_not_supported = true, \ 140 .trans.mq_rx_supported = true, \ 141 .vht_mu_mimo_supported = true, \ 142 .mac_addr_from_csr = true, \ 143 .ht_params = &iwl_22000_ht_params, \ 144 .nvm_ver = IWL_22000_NVM_VERSION, \ 145 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ 146 .trans.use_tfh = true, \ 147 .trans.rf_id = true, \ 148 .trans.gen2 = true, \ 149 .nvm_type = IWL_NVM_EXT, \ 150 .dbgc_supported = true, \ 151 .min_umac_error_event_table = 0x400000, \ 152 .d3_debug_data_base_addr = 0x401000, \ 153 .d3_debug_data_length = 60 * 1024, \ 154 .mon_smem_regs = { \ 155 .write_ptr = { \ 156 .addr = LDBG_M2S_BUF_WPTR, \ 157 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 158 }, \ 159 .cycle_cnt = { \ 160 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 161 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 162 }, \ 163 } 164 165 #define IWL_DEVICE_22500 \ 166 IWL_DEVICE_22000_COMMON, \ 167 .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 168 .trans.base_params = &iwl_22000_base_params, \ 169 .gp2_reg_addr = 0xa02c68, \ 170 .mon_dram_regs = { \ 171 .write_ptr = { \ 172 .addr = MON_BUFF_WRPTR_VER2, \ 173 .mask = 0xffffffff, \ 174 }, \ 175 .cycle_cnt = { \ 176 .addr = MON_BUFF_CYCLE_CNT_VER2, \ 177 .mask = 0xffffffff, \ 178 }, \ 179 } 180 181 #define IWL_DEVICE_AX210 \ 182 IWL_DEVICE_22000_COMMON, \ 183 .trans.umac_prph_offset = 0x300000, \ 184 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \ 185 .trans.base_params = &iwl_ax210_base_params, \ 186 .min_txq_size = 128, \ 187 .gp2_reg_addr = 0xd02c68, \ 188 .min_256_ba_txq_size = 1024, \ 189 .mon_dram_regs = { \ 190 .write_ptr = { \ 191 .addr = DBGC_CUR_DBGBUF_STATUS, \ 192 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 193 }, \ 194 .cycle_cnt = { \ 195 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 196 .mask = 0xffffffff, \ 197 }, \ 198 .cur_frag = { \ 199 .addr = DBGC_CUR_DBGBUF_STATUS, \ 200 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 201 }, \ 202 } 203 204 const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { 205 .mq_rx_supported = true, 206 .use_tfh = true, 207 .rf_id = true, 208 .gen2 = true, 209 .device_family = IWL_DEVICE_FAMILY_22000, 210 .base_params = &iwl_22000_base_params, 211 }; 212 213 const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 214 .mq_rx_supported = true, 215 .use_tfh = true, 216 .rf_id = true, 217 .gen2 = true, 218 .device_family = IWL_DEVICE_FAMILY_22000, 219 .base_params = &iwl_22000_base_params, 220 .integrated = true, 221 .xtal_latency = 500, 222 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 223 }; 224 225 const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 226 .mq_rx_supported = true, 227 .use_tfh = true, 228 .rf_id = true, 229 .gen2 = true, 230 .device_family = IWL_DEVICE_FAMILY_22000, 231 .base_params = &iwl_22000_base_params, 232 .integrated = true, 233 .xtal_latency = 1820, 234 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 235 }; 236 237 const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 238 .mq_rx_supported = true, 239 .use_tfh = true, 240 .rf_id = true, 241 .gen2 = true, 242 .device_family = IWL_DEVICE_FAMILY_22000, 243 .base_params = &iwl_22000_base_params, 244 .integrated = true, 245 .xtal_latency = 12000, 246 .low_latency_xtal = true, 247 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 248 }; 249 250 const struct iwl_cfg_trans_params iwl_snj_trans_cfg = { 251 .mq_rx_supported = true, 252 .use_tfh = true, 253 .rf_id = true, 254 .gen2 = true, 255 .device_family = IWL_DEVICE_FAMILY_AX210, 256 .base_params = &iwl_ax210_base_params, 257 .umac_prph_offset = 0x300000, 258 }; 259 260 const struct iwl_cfg_trans_params iwl_so_trans_cfg = { 261 .mq_rx_supported = true, 262 .use_tfh = true, 263 .rf_id = true, 264 .gen2 = true, 265 .device_family = IWL_DEVICE_FAMILY_AX210, 266 .base_params = &iwl_ax210_base_params, 267 .umac_prph_offset = 0x300000, 268 .integrated = true, 269 /* TODO: the following values need to be checked */ 270 .xtal_latency = 500, 271 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 272 }; 273 274 const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { 275 .mq_rx_supported = true, 276 .use_tfh = true, 277 .rf_id = true, 278 .gen2 = true, 279 .device_family = IWL_DEVICE_FAMILY_AX210, 280 .base_params = &iwl_ax210_base_params, 281 .umac_prph_offset = 0x300000, 282 .integrated = true, 283 /* TODO: the following values need to be checked */ 284 .xtal_latency = 12000, 285 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 286 }; 287 288 /* 289 * If the device doesn't support HE, no need to have that many buffers. 290 * 22000 devices can split multiple frames into a single RB, so fewer are 291 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 292 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 293 * additional overhead to account for processing time. 294 */ 295 #define IWL_NUM_RBDS_NON_HE 512 296 #define IWL_NUM_RBDS_22000_HE 2048 297 #define IWL_NUM_RBDS_AX210_HE 4096 298 299 /* 300 * All JF radio modules are part of the 9000 series, but the MAC part 301 * looks more like 22000. That's why this device is here, but called 302 * 9560 nevertheless. 303 */ 304 const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 305 .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 306 IWL_DEVICE_22500, 307 .num_rbds = IWL_NUM_RBDS_NON_HE, 308 }; 309 310 const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 311 .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 312 IWL_DEVICE_22500, 313 .num_rbds = IWL_NUM_RBDS_NON_HE, 314 }; 315 316 const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 317 .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 318 IWL_DEVICE_22500, 319 /* 320 * This device doesn't support receiving BlockAck with a large bitmap 321 * so we need to restrict the size of transmitted aggregation to the 322 * HT size; mac80211 would otherwise pick the HE max (256) by default. 323 */ 324 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 325 .num_rbds = IWL_NUM_RBDS_NON_HE, 326 }; 327 328 const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg = { 329 .fw_name_pre = IWL_QNJ_B_JF_B_FW_PRE, 330 IWL_DEVICE_22500, 331 /* 332 * This device doesn't support receiving BlockAck with a large bitmap 333 * so we need to restrict the size of transmitted aggregation to the 334 * HT size; mac80211 would otherwise pick the HE max (256) by default. 335 */ 336 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 337 .num_rbds = IWL_NUM_RBDS_NON_HE, 338 }; 339 340 const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 341 .device_family = IWL_DEVICE_FAMILY_22000, 342 .base_params = &iwl_22000_base_params, 343 .mq_rx_supported = true, 344 .use_tfh = true, 345 .rf_id = true, 346 .gen2 = true, 347 .bisr_workaround = 1, 348 }; 349 350 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 351 .device_family = IWL_DEVICE_FAMILY_AX210, 352 .base_params = &iwl_ax210_base_params, 353 .mq_rx_supported = true, 354 .use_tfh = true, 355 .rf_id = true, 356 .gen2 = true, 357 .integrated = true, 358 .umac_prph_offset = 0x300000 359 }; 360 361 const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 362 const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 363 const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 364 const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 365 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6 AX211 160MHz"; 366 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6 AX411 160MHz"; 367 const char iwl_ma_name[] = "Intel(R) Wi-Fi 6"; 368 369 const char iwl_ax200_killer_1650w_name[] = 370 "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 371 const char iwl_ax200_killer_1650x_name[] = 372 "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 373 const char iwl_ax201_killer_1650s_name[] = 374 "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 375 const char iwl_ax201_killer_1650i_name[] = 376 "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 377 378 const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 379 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 380 IWL_DEVICE_22500, 381 /* 382 * This device doesn't support receiving BlockAck with a large bitmap 383 * so we need to restrict the size of transmitted aggregation to the 384 * HT size; mac80211 would otherwise pick the HE max (256) by default. 385 */ 386 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 387 .tx_with_siso_diversity = true, 388 .num_rbds = IWL_NUM_RBDS_22000_HE, 389 }; 390 391 const struct iwl_cfg iwl_qu_b0_hr_b0 = { 392 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 393 IWL_DEVICE_22500, 394 /* 395 * This device doesn't support receiving BlockAck with a large bitmap 396 * so we need to restrict the size of transmitted aggregation to the 397 * HT size; mac80211 would otherwise pick the HE max (256) by default. 398 */ 399 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 400 .num_rbds = IWL_NUM_RBDS_22000_HE, 401 }; 402 403 const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 404 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 405 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 406 IWL_DEVICE_22500, 407 /* 408 * This device doesn't support receiving BlockAck with a large bitmap 409 * so we need to restrict the size of transmitted aggregation to the 410 * HT size; mac80211 would otherwise pick the HE max (256) by default. 411 */ 412 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 413 .num_rbds = IWL_NUM_RBDS_22000_HE, 414 }; 415 416 const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 417 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 418 IWL_DEVICE_22500, 419 /* 420 * This device doesn't support receiving BlockAck with a large bitmap 421 * so we need to restrict the size of transmitted aggregation to the 422 * HT size; mac80211 would otherwise pick the HE max (256) by default. 423 */ 424 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 425 .tx_with_siso_diversity = true, 426 .num_rbds = IWL_NUM_RBDS_22000_HE, 427 }; 428 429 const struct iwl_cfg iwl_qu_c0_hr_b0 = { 430 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 431 IWL_DEVICE_22500, 432 /* 433 * This device doesn't support receiving BlockAck with a large bitmap 434 * so we need to restrict the size of transmitted aggregation to the 435 * HT size; mac80211 would otherwise pick the HE max (256) by default. 436 */ 437 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 438 .num_rbds = IWL_NUM_RBDS_22000_HE, 439 }; 440 441 const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 442 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 443 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 444 IWL_DEVICE_22500, 445 /* 446 * This device doesn't support receiving BlockAck with a large bitmap 447 * so we need to restrict the size of transmitted aggregation to the 448 * HT size; mac80211 would otherwise pick the HE max (256) by default. 449 */ 450 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 451 .num_rbds = IWL_NUM_RBDS_22000_HE, 452 }; 453 454 const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 455 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 456 IWL_DEVICE_22500, 457 /* 458 * This device doesn't support receiving BlockAck with a large bitmap 459 * so we need to restrict the size of transmitted aggregation to the 460 * HT size; mac80211 would otherwise pick the HE max (256) by default. 461 */ 462 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 463 .tx_with_siso_diversity = true, 464 .num_rbds = IWL_NUM_RBDS_22000_HE, 465 }; 466 467 const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 468 .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 469 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 470 IWL_DEVICE_22500, 471 /* 472 * This device doesn't support receiving BlockAck with a large bitmap 473 * so we need to restrict the size of transmitted aggregation to the 474 * HT size; mac80211 would otherwise pick the HE max (256) by default. 475 */ 476 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 477 .num_rbds = IWL_NUM_RBDS_22000_HE, 478 }; 479 480 const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 481 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 482 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 483 IWL_DEVICE_22500, 484 /* 485 * This device doesn't support receiving BlockAck with a large bitmap 486 * so we need to restrict the size of transmitted aggregation to the 487 * HT size; mac80211 would otherwise pick the HE max (256) by default. 488 */ 489 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 490 .num_rbds = IWL_NUM_RBDS_22000_HE, 491 }; 492 493 const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 494 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 495 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 496 IWL_DEVICE_22500, 497 /* 498 * This device doesn't support receiving BlockAck with a large bitmap 499 * so we need to restrict the size of transmitted aggregation to the 500 * HT size; mac80211 would otherwise pick the HE max (256) by default. 501 */ 502 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 503 .num_rbds = IWL_NUM_RBDS_22000_HE, 504 }; 505 506 const struct iwl_cfg iwl_ax200_cfg_cc = { 507 .fw_name_pre = IWL_CC_A_FW_PRE, 508 IWL_DEVICE_22500, 509 /* 510 * This device doesn't support receiving BlockAck with a large bitmap 511 * so we need to restrict the size of transmitted aggregation to the 512 * HT size; mac80211 would otherwise pick the HE max (256) by default. 513 */ 514 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 515 .num_rbds = IWL_NUM_RBDS_22000_HE, 516 }; 517 518 const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 519 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 520 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 521 IWL_DEVICE_22500, 522 /* 523 * This device doesn't support receiving BlockAck with a large bitmap 524 * so we need to restrict the size of transmitted aggregation to the 525 * HT size; mac80211 would otherwise pick the HE max (256) by default. 526 */ 527 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 528 .num_rbds = IWL_NUM_RBDS_22000_HE, 529 }; 530 531 const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 532 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 533 .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 534 IWL_DEVICE_22500, 535 /* 536 * This device doesn't support receiving BlockAck with a large bitmap 537 * so we need to restrict the size of transmitted aggregation to the 538 * HT size; mac80211 would otherwise pick the HE max (256) by default. 539 */ 540 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 541 .num_rbds = IWL_NUM_RBDS_22000_HE, 542 }; 543 544 const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 545 .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 546 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 547 IWL_DEVICE_22500, 548 /* 549 * This device doesn't support receiving BlockAck with a large bitmap 550 * so we need to restrict the size of transmitted aggregation to the 551 * HT size; mac80211 would otherwise pick the HE max (256) by default. 552 */ 553 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 554 .num_rbds = IWL_NUM_RBDS_22000_HE, 555 }; 556 557 const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 558 .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 559 .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 560 IWL_DEVICE_22500, 561 /* 562 * This device doesn't support receiving BlockAck with a large bitmap 563 * so we need to restrict the size of transmitted aggregation to the 564 * HT size; mac80211 would otherwise pick the HE max (256) by default. 565 */ 566 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 567 .num_rbds = IWL_NUM_RBDS_22000_HE, 568 }; 569 570 const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg = { 571 .fw_name_pre = IWL_QNJ_B_HR_B_FW_PRE, 572 IWL_DEVICE_22500, 573 /* 574 * This device doesn't support receiving BlockAck with a large bitmap 575 * so we need to restrict the size of transmitted aggregation to the 576 * HT size; mac80211 would otherwise pick the HE max (256) by default. 577 */ 578 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 579 .num_rbds = IWL_NUM_RBDS_22000_HE, 580 }; 581 582 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_a0 = { 583 .name = "Intel(R) Wireless-AC 9560 160MHz", 584 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 585 IWL_DEVICE_AX210, 586 .num_rbds = IWL_NUM_RBDS_NON_HE, 587 }; 588 589 const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = { 590 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 591 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 592 IWL_DEVICE_AX210, 593 .num_rbds = IWL_NUM_RBDS_AX210_HE, 594 }; 595 596 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 597 .name = iwl_ax211_name, 598 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 599 .uhb_supported = true, 600 IWL_DEVICE_AX210, 601 .num_rbds = IWL_NUM_RBDS_AX210_HE, 602 }; 603 604 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = { 605 .name = iwl_ax211_name, 606 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 607 .uhb_supported = true, 608 IWL_DEVICE_AX210, 609 .num_rbds = IWL_NUM_RBDS_AX210_HE, 610 .trans.xtal_latency = 12000, 611 .trans.low_latency_xtal = true, 612 }; 613 614 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 615 .name = "Intel(R) Wi-Fi 6 AX210 160MHz", 616 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 617 .uhb_supported = true, 618 IWL_DEVICE_AX210, 619 .num_rbds = IWL_NUM_RBDS_AX210_HE, 620 }; 621 622 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 623 .name = iwl_ax411_name, 624 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 625 .uhb_supported = true, 626 IWL_DEVICE_AX210, 627 .num_rbds = IWL_NUM_RBDS_AX210_HE, 628 }; 629 630 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = { 631 .name = iwl_ax411_name, 632 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 633 .uhb_supported = true, 634 IWL_DEVICE_AX210, 635 .num_rbds = IWL_NUM_RBDS_AX210_HE, 636 .trans.xtal_latency = 12000, 637 .trans.low_latency_xtal = true, 638 }; 639 640 const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0 = { 641 .name = iwl_ax411_name, 642 .fw_name_pre = IWL_SNJ_A_GF4_A_FW_PRE, 643 .uhb_supported = true, 644 IWL_DEVICE_AX210, 645 .num_rbds = IWL_NUM_RBDS_AX210_HE, 646 }; 647 648 const struct iwl_cfg iwlax211_cfg_snj_gf_a0 = { 649 .name = iwl_ax211_name, 650 .fw_name_pre = IWL_SNJ_A_GF_A_FW_PRE, 651 .uhb_supported = true, 652 IWL_DEVICE_AX210, 653 .num_rbds = IWL_NUM_RBDS_AX210_HE, 654 }; 655 656 const struct iwl_cfg iwl_cfg_snj_hr_b0 = { 657 .fw_name_pre = IWL_SNJ_A_HR_B_FW_PRE, 658 .uhb_supported = true, 659 IWL_DEVICE_AX210, 660 .num_rbds = IWL_NUM_RBDS_AX210_HE, 661 }; 662 663 const struct iwl_cfg iwl_cfg_snj_a0_jf_b0 = { 664 .fw_name_pre = IWL_SNJ_A_JF_B_FW_PRE, 665 .uhb_supported = true, 666 IWL_DEVICE_AX210, 667 .num_rbds = IWL_NUM_RBDS_AX210_HE, 668 }; 669 670 const struct iwl_cfg iwl_cfg_ma_a0_hr_b0 = { 671 .fw_name_pre = IWL_MA_A_HR_B_FW_PRE, 672 .uhb_supported = true, 673 IWL_DEVICE_AX210, 674 .num_rbds = IWL_NUM_RBDS_AX210_HE, 675 }; 676 677 const struct iwl_cfg iwl_cfg_ma_a0_gf_a0 = { 678 .fw_name_pre = IWL_MA_A_GF_A_FW_PRE, 679 .uhb_supported = true, 680 IWL_DEVICE_AX210, 681 .num_rbds = IWL_NUM_RBDS_AX210_HE, 682 }; 683 684 const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0 = { 685 .fw_name_pre = IWL_MA_A_GF4_A_FW_PRE, 686 .uhb_supported = true, 687 IWL_DEVICE_AX210, 688 .num_rbds = IWL_NUM_RBDS_AX210_HE, 689 }; 690 691 const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { 692 .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, 693 .uhb_supported = true, 694 IWL_DEVICE_AX210, 695 .num_rbds = IWL_NUM_RBDS_AX210_HE, 696 }; 697 698 const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { 699 .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, 700 .uhb_supported = true, 701 IWL_DEVICE_AX210, 702 .num_rbds = IWL_NUM_RBDS_AX210_HE, 703 }; 704 705 const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { 706 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 707 IWL_DEVICE_AX210, 708 .num_rbds = IWL_NUM_RBDS_AX210_HE, 709 }; 710 711 const struct iwl_cfg iwl_cfg_quz_a0_hr_b0 = { 712 .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 713 IWL_DEVICE_22500, 714 /* 715 * This device doesn't support receiving BlockAck with a large bitmap 716 * so we need to restrict the size of transmitted aggregation to the 717 * HT size; mac80211 would otherwise pick the HE max (256) by default. 718 */ 719 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 720 .num_rbds = IWL_NUM_RBDS_22000_HE, 721 }; 722 723 MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 724 MODULE_FIRMWARE(IWL_QNJ_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 725 MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 726 MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 727 MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 728 MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 729 MODULE_FIRMWARE(IWL_QNJ_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 730 MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 731 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 732 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 733 MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 734 MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 735 MODULE_FIRMWARE(IWL_SNJ_A_GF4_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 736 MODULE_FIRMWARE(IWL_SNJ_A_GF_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 737 MODULE_FIRMWARE(IWL_SNJ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 738 MODULE_FIRMWARE(IWL_SNJ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 739 MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 740 MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 741 MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 742 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 743 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 744