1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Contact Information: 7 * Intel Linux Wireless <ilw@linux.intel.com> 8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 9 * 10 *****************************************************************************/ 11 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/pci.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/delay.h> 17 #include <linux/sched.h> 18 #include <linux/skbuff.h> 19 #include <linux/netdevice.h> 20 #include <linux/units.h> 21 #include <net/mac80211.h> 22 #include <linux/etherdevice.h> 23 #include <asm/unaligned.h> 24 25 #include "common.h" 26 #include "4965.h" 27 28 /** 29 * il_verify_inst_sparse - verify runtime uCode image in card vs. host, 30 * using sample data 100 bytes apart. If these sample points are good, 31 * it's a pretty good bet that everything between them is good, too. 32 */ 33 static int 34 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) 35 { 36 u32 val; 37 int ret = 0; 38 u32 errcnt = 0; 39 u32 i; 40 41 D_INFO("ucode inst image size is %u\n", len); 42 43 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { 44 /* read data comes through single port, auto-incr addr */ 45 /* NOTE: Use the debugless read so we don't flood kernel log 46 * if IL_DL_IO is set */ 47 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND); 48 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 49 if (val != le32_to_cpu(*image)) { 50 ret = -EIO; 51 errcnt++; 52 if (errcnt >= 3) 53 break; 54 } 55 } 56 57 return ret; 58 } 59 60 /** 61 * il4965_verify_inst_full - verify runtime uCode image in card vs. host, 62 * looking at all data. 63 */ 64 static int 65 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) 66 { 67 u32 val; 68 u32 save_len = len; 69 int ret = 0; 70 u32 errcnt; 71 72 D_INFO("ucode inst image size is %u\n", len); 73 74 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND); 75 76 errcnt = 0; 77 for (; len > 0; len -= sizeof(u32), image++) { 78 /* read data comes through single port, auto-incr addr */ 79 /* NOTE: Use the debugless read so we don't flood kernel log 80 * if IL_DL_IO is set */ 81 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 82 if (val != le32_to_cpu(*image)) { 83 IL_ERR("uCode INST section is invalid at " 84 "offset 0x%x, is 0x%x, s/b 0x%x\n", 85 save_len - len, val, le32_to_cpu(*image)); 86 ret = -EIO; 87 errcnt++; 88 if (errcnt >= 20) 89 break; 90 } 91 } 92 93 if (!errcnt) 94 D_INFO("ucode image in INSTRUCTION memory is good\n"); 95 96 return ret; 97 } 98 99 /** 100 * il4965_verify_ucode - determine which instruction image is in SRAM, 101 * and verify its contents 102 */ 103 int 104 il4965_verify_ucode(struct il_priv *il) 105 { 106 __le32 *image; 107 u32 len; 108 int ret; 109 110 /* Try bootstrap */ 111 image = (__le32 *) il->ucode_boot.v_addr; 112 len = il->ucode_boot.len; 113 ret = il4965_verify_inst_sparse(il, image, len); 114 if (!ret) { 115 D_INFO("Bootstrap uCode is good in inst SRAM\n"); 116 return 0; 117 } 118 119 /* Try initialize */ 120 image = (__le32 *) il->ucode_init.v_addr; 121 len = il->ucode_init.len; 122 ret = il4965_verify_inst_sparse(il, image, len); 123 if (!ret) { 124 D_INFO("Initialize uCode is good in inst SRAM\n"); 125 return 0; 126 } 127 128 /* Try runtime/protocol */ 129 image = (__le32 *) il->ucode_code.v_addr; 130 len = il->ucode_code.len; 131 ret = il4965_verify_inst_sparse(il, image, len); 132 if (!ret) { 133 D_INFO("Runtime uCode is good in inst SRAM\n"); 134 return 0; 135 } 136 137 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); 138 139 /* Since nothing seems to match, show first several data entries in 140 * instruction SRAM, so maybe visual inspection will give a clue. 141 * Selection of bootstrap image (vs. other images) is arbitrary. */ 142 image = (__le32 *) il->ucode_boot.v_addr; 143 len = il->ucode_boot.len; 144 ret = il4965_verify_inst_full(il, image, len); 145 146 return ret; 147 } 148 149 /****************************************************************************** 150 * 151 * EEPROM related functions 152 * 153 ******************************************************************************/ 154 155 /* 156 * The device's EEPROM semaphore prevents conflicts between driver and uCode 157 * when accessing the EEPROM; each access is a series of pulses to/from the 158 * EEPROM chip, not a single event, so even reads could conflict if they 159 * weren't arbitrated by the semaphore. 160 */ 161 int 162 il4965_eeprom_acquire_semaphore(struct il_priv *il) 163 { 164 u16 count; 165 int ret; 166 167 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { 168 /* Request semaphore */ 169 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 170 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 171 172 /* See if we got it */ 173 ret = 174 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, 175 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 176 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 177 EEPROM_SEM_TIMEOUT); 178 if (ret >= 0) 179 return ret; 180 } 181 182 return ret; 183 } 184 185 void 186 il4965_eeprom_release_semaphore(struct il_priv *il) 187 { 188 il_clear_bit(il, CSR_HW_IF_CONFIG_REG, 189 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 190 191 } 192 193 int 194 il4965_eeprom_check_version(struct il_priv *il) 195 { 196 u16 eeprom_ver; 197 u16 calib_ver; 198 199 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); 200 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET); 201 202 if (eeprom_ver < il->cfg->eeprom_ver || 203 calib_ver < il->cfg->eeprom_calib_ver) 204 goto err; 205 206 IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver); 207 208 return 0; 209 err: 210 IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x " 211 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver, 212 calib_ver, il->cfg->eeprom_calib_ver); 213 return -EINVAL; 214 215 } 216 217 void 218 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac) 219 { 220 const u8 *addr = il_eeprom_query_addr(il, 221 EEPROM_MAC_ADDRESS); 222 memcpy(mac, addr, ETH_ALEN); 223 } 224 225 /* Send led command */ 226 static int 227 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) 228 { 229 struct il_host_cmd cmd = { 230 .id = C_LEDS, 231 .len = sizeof(struct il_led_cmd), 232 .data = led_cmd, 233 .flags = CMD_ASYNC, 234 .callback = NULL, 235 }; 236 u32 reg; 237 238 reg = _il_rd(il, CSR_LED_REG); 239 if (reg != (reg & CSR_LED_BSM_CTRL_MSK)) 240 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK); 241 242 return il_send_cmd(il, &cmd); 243 } 244 245 /* Set led register off */ 246 void 247 il4965_led_enable(struct il_priv *il) 248 { 249 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON); 250 } 251 252 static int il4965_send_tx_power(struct il_priv *il); 253 static int il4965_hw_get_temperature(struct il_priv *il); 254 255 /* Highest firmware API version supported */ 256 #define IL4965_UCODE_API_MAX 2 257 258 /* Lowest firmware API version supported */ 259 #define IL4965_UCODE_API_MIN 2 260 261 #define IL4965_FW_PRE "iwlwifi-4965-" 262 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode" 263 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api) 264 265 /* check contents of special bootstrap uCode SRAM */ 266 static int 267 il4965_verify_bsm(struct il_priv *il) 268 { 269 __le32 *image = il->ucode_boot.v_addr; 270 u32 len = il->ucode_boot.len; 271 u32 reg; 272 u32 val; 273 274 D_INFO("Begin verify bsm\n"); 275 276 /* verify BSM SRAM contents */ 277 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); 278 for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len; 279 reg += sizeof(u32), image++) { 280 val = il_rd_prph(il, reg); 281 if (val != le32_to_cpu(*image)) { 282 IL_ERR("BSM uCode verification failed at " 283 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", 284 BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND, 285 len, val, le32_to_cpu(*image)); 286 return -EIO; 287 } 288 } 289 290 D_INFO("BSM bootstrap uCode image OK\n"); 291 292 return 0; 293 } 294 295 /** 296 * il4965_load_bsm - Load bootstrap instructions 297 * 298 * BSM operation: 299 * 300 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program 301 * in special SRAM that does not power down during RFKILL. When powering back 302 * up after power-saving sleeps (or during initial uCode load), the BSM loads 303 * the bootstrap program into the on-board processor, and starts it. 304 * 305 * The bootstrap program loads (via DMA) instructions and data for a new 306 * program from host DRAM locations indicated by the host driver in the 307 * BSM_DRAM_* registers. Once the new program is loaded, it starts 308 * automatically. 309 * 310 * When initializing the NIC, the host driver points the BSM to the 311 * "initialize" uCode image. This uCode sets up some internal data, then 312 * notifies host via "initialize alive" that it is complete. 313 * 314 * The host then replaces the BSM_DRAM_* pointer values to point to the 315 * normal runtime uCode instructions and a backup uCode data cache buffer 316 * (filled initially with starting data values for the on-board processor), 317 * then triggers the "initialize" uCode to load and launch the runtime uCode, 318 * which begins normal operation. 319 * 320 * When doing a power-save shutdown, runtime uCode saves data SRAM into 321 * the backup data cache in DRAM before SRAM is powered down. 322 * 323 * When powering back up, the BSM loads the bootstrap program. This reloads 324 * the runtime uCode instructions and the backup data cache into SRAM, 325 * and re-launches the runtime uCode from where it left off. 326 */ 327 static int 328 il4965_load_bsm(struct il_priv *il) 329 { 330 __le32 *image = il->ucode_boot.v_addr; 331 u32 len = il->ucode_boot.len; 332 dma_addr_t pinst; 333 dma_addr_t pdata; 334 u32 inst_len; 335 u32 data_len; 336 int i; 337 u32 done; 338 u32 reg_offset; 339 int ret; 340 341 D_INFO("Begin load bsm\n"); 342 343 il->ucode_type = UCODE_RT; 344 345 /* make sure bootstrap program is no larger than BSM's SRAM size */ 346 if (len > IL49_MAX_BSM_SIZE) 347 return -EINVAL; 348 349 /* Tell bootstrap uCode where to find the "Initialize" uCode 350 * in host DRAM ... host DRAM physical address bits 35:4 for 4965. 351 * NOTE: il_init_alive_start() will replace these values, 352 * after the "initialize" uCode has run, to point to 353 * runtime/protocol instructions and backup data cache. 354 */ 355 pinst = il->ucode_init.p_addr >> 4; 356 pdata = il->ucode_init_data.p_addr >> 4; 357 inst_len = il->ucode_init.len; 358 data_len = il->ucode_init_data.len; 359 360 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 361 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 362 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); 363 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); 364 365 /* Fill BSM memory with bootstrap instructions */ 366 for (reg_offset = BSM_SRAM_LOWER_BOUND; 367 reg_offset < BSM_SRAM_LOWER_BOUND + len; 368 reg_offset += sizeof(u32), image++) 369 _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); 370 371 ret = il4965_verify_bsm(il); 372 if (ret) 373 return ret; 374 375 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ 376 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); 377 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND); 378 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); 379 380 /* Load bootstrap code into instruction SRAM now, 381 * to prepare to load "initialize" uCode */ 382 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); 383 384 /* Wait for load of bootstrap uCode to finish */ 385 for (i = 0; i < 100; i++) { 386 done = il_rd_prph(il, BSM_WR_CTRL_REG); 387 if (!(done & BSM_WR_CTRL_REG_BIT_START)) 388 break; 389 udelay(10); 390 } 391 if (i < 100) 392 D_INFO("BSM write complete, poll %d iterations\n", i); 393 else { 394 IL_ERR("BSM write did not complete!\n"); 395 return -EIO; 396 } 397 398 /* Enable future boot loads whenever power management unit triggers it 399 * (e.g. when powering back up after power-save shutdown) */ 400 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); 401 402 return 0; 403 } 404 405 /** 406 * il4965_set_ucode_ptrs - Set uCode address location 407 * 408 * Tell initialization uCode where to find runtime uCode. 409 * 410 * BSM registers initially contain pointers to initialization uCode. 411 * We need to replace them to load runtime uCode inst and data, 412 * and to save runtime data when powering down. 413 */ 414 static int 415 il4965_set_ucode_ptrs(struct il_priv *il) 416 { 417 dma_addr_t pinst; 418 dma_addr_t pdata; 419 int ret = 0; 420 421 /* bits 35:4 for 4965 */ 422 pinst = il->ucode_code.p_addr >> 4; 423 pdata = il->ucode_data_backup.p_addr >> 4; 424 425 /* Tell bootstrap uCode where to find image to load */ 426 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 427 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 428 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); 429 430 /* Inst byte count must be last to set up, bit 31 signals uCode 431 * that all new ptr/size info is in place */ 432 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, 433 il->ucode_code.len | BSM_DRAM_INST_LOAD); 434 D_INFO("Runtime uCode pointers are set.\n"); 435 436 return ret; 437 } 438 439 /** 440 * il4965_init_alive_start - Called after N_ALIVE notification received 441 * 442 * Called after N_ALIVE notification received from "initialize" uCode. 443 * 444 * The 4965 "initialize" ALIVE reply contains calibration data for: 445 * Voltage, temperature, and MIMO tx gain correction, now stored in il 446 * (3945 does not contain this data). 447 * 448 * Tell "initialize" uCode to go ahead and load the runtime uCode. 449 */ 450 static void 451 il4965_init_alive_start(struct il_priv *il) 452 { 453 /* Bootstrap uCode has loaded initialize uCode ... verify inst image. 454 * This is a paranoid check, because we would not have gotten the 455 * "initialize" alive if code weren't properly loaded. */ 456 if (il4965_verify_ucode(il)) { 457 /* Runtime instruction load was bad; 458 * take it all the way back down so we can try again */ 459 D_INFO("Bad \"initialize\" uCode load.\n"); 460 goto restart; 461 } 462 463 /* Calculate temperature */ 464 il->temperature = il4965_hw_get_temperature(il); 465 466 /* Send pointers to protocol/runtime uCode image ... init code will 467 * load and launch runtime uCode, which will send us another "Alive" 468 * notification. */ 469 D_INFO("Initialization Alive received.\n"); 470 if (il4965_set_ucode_ptrs(il)) { 471 /* Runtime instruction load won't happen; 472 * take it all the way back down so we can try again */ 473 D_INFO("Couldn't set up uCode pointers.\n"); 474 goto restart; 475 } 476 return; 477 478 restart: 479 queue_work(il->workqueue, &il->restart); 480 } 481 482 static bool 483 iw4965_is_ht40_channel(__le32 rxon_flags) 484 { 485 int chan_mod = 486 le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >> 487 RXON_FLG_CHANNEL_MODE_POS; 488 return (chan_mod == CHANNEL_MODE_PURE_40 || 489 chan_mod == CHANNEL_MODE_MIXED); 490 } 491 492 void 493 il4965_nic_config(struct il_priv *il) 494 { 495 unsigned long flags; 496 u16 radio_cfg; 497 498 spin_lock_irqsave(&il->lock, flags); 499 500 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG); 501 502 /* write radio config values to register */ 503 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX) 504 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 505 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | 506 EEPROM_RF_CFG_STEP_MSK(radio_cfg) | 507 EEPROM_RF_CFG_DASH_MSK(radio_cfg)); 508 509 /* set CSR_HW_CONFIG_REG for uCode use */ 510 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 511 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | 512 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); 513 514 il->calib_info = 515 (struct il_eeprom_calib_info *) 516 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET); 517 518 spin_unlock_irqrestore(&il->lock, flags); 519 } 520 521 /* Reset differential Rx gains in NIC to prepare for chain noise calibration. 522 * Called after every association, but this runs only once! 523 * ... once chain noise is calibrated the first time, it's good forever. */ 524 static void 525 il4965_chain_noise_reset(struct il_priv *il) 526 { 527 struct il_chain_noise_data *data = &(il->chain_noise_data); 528 529 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) { 530 struct il_calib_diff_gain_cmd cmd; 531 532 /* clear data for chain noise calibration algorithm */ 533 data->chain_noise_a = 0; 534 data->chain_noise_b = 0; 535 data->chain_noise_c = 0; 536 data->chain_signal_a = 0; 537 data->chain_signal_b = 0; 538 data->chain_signal_c = 0; 539 data->beacon_count = 0; 540 541 memset(&cmd, 0, sizeof(cmd)); 542 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD; 543 cmd.diff_gain_a = 0; 544 cmd.diff_gain_b = 0; 545 cmd.diff_gain_c = 0; 546 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd)) 547 IL_ERR("Could not send C_PHY_CALIBRATION\n"); 548 data->state = IL_CHAIN_NOISE_ACCUMULATE; 549 D_CALIB("Run chain_noise_calibrate\n"); 550 } 551 } 552 553 static s32 554 il4965_math_div_round(s32 num, s32 denom, s32 * res) 555 { 556 s32 sign = 1; 557 558 if (num < 0) { 559 sign = -sign; 560 num = -num; 561 } 562 if (denom < 0) { 563 sign = -sign; 564 denom = -denom; 565 } 566 *res = ((num * 2 + denom) / (denom * 2)) * sign; 567 568 return 1; 569 } 570 571 /** 572 * il4965_get_voltage_compensation - Power supply voltage comp for txpower 573 * 574 * Determines power supply voltage compensation for txpower calculations. 575 * Returns number of 1/2-dB steps to subtract from gain table idx, 576 * to compensate for difference between power supply voltage during 577 * factory measurements, vs. current power supply voltage. 578 * 579 * Voltage indication is higher for lower voltage. 580 * Lower voltage requires more gain (lower gain table idx). 581 */ 582 static s32 583 il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage) 584 { 585 s32 comp = 0; 586 587 if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage || 588 TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage) 589 return 0; 590 591 il4965_math_div_round(current_voltage - eeprom_voltage, 592 TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp); 593 594 if (current_voltage > eeprom_voltage) 595 comp *= 2; 596 if ((comp < -2) || (comp > 2)) 597 comp = 0; 598 599 return comp; 600 } 601 602 static s32 603 il4965_get_tx_atten_grp(u16 channel) 604 { 605 if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH && 606 channel <= CALIB_IL_TX_ATTEN_GR5_LCH) 607 return CALIB_CH_GROUP_5; 608 609 if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH && 610 channel <= CALIB_IL_TX_ATTEN_GR1_LCH) 611 return CALIB_CH_GROUP_1; 612 613 if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH && 614 channel <= CALIB_IL_TX_ATTEN_GR2_LCH) 615 return CALIB_CH_GROUP_2; 616 617 if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH && 618 channel <= CALIB_IL_TX_ATTEN_GR3_LCH) 619 return CALIB_CH_GROUP_3; 620 621 if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH && 622 channel <= CALIB_IL_TX_ATTEN_GR4_LCH) 623 return CALIB_CH_GROUP_4; 624 625 return -EINVAL; 626 } 627 628 static u32 629 il4965_get_sub_band(const struct il_priv *il, u32 channel) 630 { 631 s32 b = -1; 632 633 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) { 634 if (il->calib_info->band_info[b].ch_from == 0) 635 continue; 636 637 if (channel >= il->calib_info->band_info[b].ch_from && 638 channel <= il->calib_info->band_info[b].ch_to) 639 break; 640 } 641 642 return b; 643 } 644 645 static s32 646 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) 647 { 648 s32 val; 649 650 if (x2 == x1) 651 return y1; 652 else { 653 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val); 654 return val + y2; 655 } 656 } 657 658 /** 659 * il4965_interpolate_chan - Interpolate factory measurements for one channel 660 * 661 * Interpolates factory measurements from the two sample channels within a 662 * sub-band, to apply to channel of interest. Interpolation is proportional to 663 * differences in channel frequencies, which is proportional to differences 664 * in channel number. 665 */ 666 static int 667 il4965_interpolate_chan(struct il_priv *il, u32 channel, 668 struct il_eeprom_calib_ch_info *chan_info) 669 { 670 s32 s = -1; 671 u32 c; 672 u32 m; 673 const struct il_eeprom_calib_measure *m1; 674 const struct il_eeprom_calib_measure *m2; 675 struct il_eeprom_calib_measure *omeas; 676 u32 ch_i1; 677 u32 ch_i2; 678 679 s = il4965_get_sub_band(il, channel); 680 if (s >= EEPROM_TX_POWER_BANDS) { 681 IL_ERR("Tx Power can not find channel %d\n", channel); 682 return -1; 683 } 684 685 ch_i1 = il->calib_info->band_info[s].ch1.ch_num; 686 ch_i2 = il->calib_info->band_info[s].ch2.ch_num; 687 chan_info->ch_num = (u8) channel; 688 689 D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s, 690 ch_i1, ch_i2); 691 692 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { 693 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { 694 m1 = &(il->calib_info->band_info[s].ch1. 695 measurements[c][m]); 696 m2 = &(il->calib_info->band_info[s].ch2. 697 measurements[c][m]); 698 omeas = &(chan_info->measurements[c][m]); 699 700 omeas->actual_pow = 701 (u8) il4965_interpolate_value(channel, ch_i1, 702 m1->actual_pow, ch_i2, 703 m2->actual_pow); 704 omeas->gain_idx = 705 (u8) il4965_interpolate_value(channel, ch_i1, 706 m1->gain_idx, ch_i2, 707 m2->gain_idx); 708 omeas->temperature = 709 (u8) il4965_interpolate_value(channel, ch_i1, 710 m1->temperature, 711 ch_i2, 712 m2->temperature); 713 omeas->pa_det = 714 (s8) il4965_interpolate_value(channel, ch_i1, 715 m1->pa_det, ch_i2, 716 m2->pa_det); 717 718 D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, 719 m, m1->actual_pow, m2->actual_pow, 720 omeas->actual_pow); 721 D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, 722 m, m1->gain_idx, m2->gain_idx, 723 omeas->gain_idx); 724 D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, 725 m, m1->pa_det, m2->pa_det, omeas->pa_det); 726 D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c, 727 m, m1->temperature, m2->temperature, 728 omeas->temperature); 729 } 730 } 731 732 return 0; 733 } 734 735 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units, 736 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */ 737 static s32 back_off_table[] = { 738 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */ 739 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */ 740 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */ 741 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */ 742 10 /* CCK */ 743 }; 744 745 /* Thermal compensation values for txpower for various frequency ranges ... 746 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */ 747 static struct il4965_txpower_comp_entry { 748 s32 degrees_per_05db_a; 749 s32 degrees_per_05db_a_denom; 750 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { 751 { 752 9, 2}, /* group 0 5.2, ch 34-43 */ 753 { 754 4, 1}, /* group 1 5.2, ch 44-70 */ 755 { 756 4, 1}, /* group 2 5.2, ch 71-124 */ 757 { 758 4, 1}, /* group 3 5.2, ch 125-200 */ 759 { 760 3, 1} /* group 4 2.4, ch all */ 761 }; 762 763 static s32 764 get_min_power_idx(s32 rate_power_idx, u32 band) 765 { 766 if (!band) { 767 if ((rate_power_idx & 7) <= 4) 768 return MIN_TX_GAIN_IDX_52GHZ_EXT; 769 } 770 return MIN_TX_GAIN_IDX; 771 } 772 773 struct gain_entry { 774 u8 dsp; 775 u8 radio; 776 }; 777 778 static const struct gain_entry gain_table[2][108] = { 779 /* 5.2GHz power gain idx table */ 780 { 781 {123, 0x3F}, /* highest txpower */ 782 {117, 0x3F}, 783 {110, 0x3F}, 784 {104, 0x3F}, 785 {98, 0x3F}, 786 {110, 0x3E}, 787 {104, 0x3E}, 788 {98, 0x3E}, 789 {110, 0x3D}, 790 {104, 0x3D}, 791 {98, 0x3D}, 792 {110, 0x3C}, 793 {104, 0x3C}, 794 {98, 0x3C}, 795 {110, 0x3B}, 796 {104, 0x3B}, 797 {98, 0x3B}, 798 {110, 0x3A}, 799 {104, 0x3A}, 800 {98, 0x3A}, 801 {110, 0x39}, 802 {104, 0x39}, 803 {98, 0x39}, 804 {110, 0x38}, 805 {104, 0x38}, 806 {98, 0x38}, 807 {110, 0x37}, 808 {104, 0x37}, 809 {98, 0x37}, 810 {110, 0x36}, 811 {104, 0x36}, 812 {98, 0x36}, 813 {110, 0x35}, 814 {104, 0x35}, 815 {98, 0x35}, 816 {110, 0x34}, 817 {104, 0x34}, 818 {98, 0x34}, 819 {110, 0x33}, 820 {104, 0x33}, 821 {98, 0x33}, 822 {110, 0x32}, 823 {104, 0x32}, 824 {98, 0x32}, 825 {110, 0x31}, 826 {104, 0x31}, 827 {98, 0x31}, 828 {110, 0x30}, 829 {104, 0x30}, 830 {98, 0x30}, 831 {110, 0x25}, 832 {104, 0x25}, 833 {98, 0x25}, 834 {110, 0x24}, 835 {104, 0x24}, 836 {98, 0x24}, 837 {110, 0x23}, 838 {104, 0x23}, 839 {98, 0x23}, 840 {110, 0x22}, 841 {104, 0x18}, 842 {98, 0x18}, 843 {110, 0x17}, 844 {104, 0x17}, 845 {98, 0x17}, 846 {110, 0x16}, 847 {104, 0x16}, 848 {98, 0x16}, 849 {110, 0x15}, 850 {104, 0x15}, 851 {98, 0x15}, 852 {110, 0x14}, 853 {104, 0x14}, 854 {98, 0x14}, 855 {110, 0x13}, 856 {104, 0x13}, 857 {98, 0x13}, 858 {110, 0x12}, 859 {104, 0x08}, 860 {98, 0x08}, 861 {110, 0x07}, 862 {104, 0x07}, 863 {98, 0x07}, 864 {110, 0x06}, 865 {104, 0x06}, 866 {98, 0x06}, 867 {110, 0x05}, 868 {104, 0x05}, 869 {98, 0x05}, 870 {110, 0x04}, 871 {104, 0x04}, 872 {98, 0x04}, 873 {110, 0x03}, 874 {104, 0x03}, 875 {98, 0x03}, 876 {110, 0x02}, 877 {104, 0x02}, 878 {98, 0x02}, 879 {110, 0x01}, 880 {104, 0x01}, 881 {98, 0x01}, 882 {110, 0x00}, 883 {104, 0x00}, 884 {98, 0x00}, 885 {93, 0x00}, 886 {88, 0x00}, 887 {83, 0x00}, 888 {78, 0x00}, 889 }, 890 /* 2.4GHz power gain idx table */ 891 { 892 {110, 0x3f}, /* highest txpower */ 893 {104, 0x3f}, 894 {98, 0x3f}, 895 {110, 0x3e}, 896 {104, 0x3e}, 897 {98, 0x3e}, 898 {110, 0x3d}, 899 {104, 0x3d}, 900 {98, 0x3d}, 901 {110, 0x3c}, 902 {104, 0x3c}, 903 {98, 0x3c}, 904 {110, 0x3b}, 905 {104, 0x3b}, 906 {98, 0x3b}, 907 {110, 0x3a}, 908 {104, 0x3a}, 909 {98, 0x3a}, 910 {110, 0x39}, 911 {104, 0x39}, 912 {98, 0x39}, 913 {110, 0x38}, 914 {104, 0x38}, 915 {98, 0x38}, 916 {110, 0x37}, 917 {104, 0x37}, 918 {98, 0x37}, 919 {110, 0x36}, 920 {104, 0x36}, 921 {98, 0x36}, 922 {110, 0x35}, 923 {104, 0x35}, 924 {98, 0x35}, 925 {110, 0x34}, 926 {104, 0x34}, 927 {98, 0x34}, 928 {110, 0x33}, 929 {104, 0x33}, 930 {98, 0x33}, 931 {110, 0x32}, 932 {104, 0x32}, 933 {98, 0x32}, 934 {110, 0x31}, 935 {104, 0x31}, 936 {98, 0x31}, 937 {110, 0x30}, 938 {104, 0x30}, 939 {98, 0x30}, 940 {110, 0x6}, 941 {104, 0x6}, 942 {98, 0x6}, 943 {110, 0x5}, 944 {104, 0x5}, 945 {98, 0x5}, 946 {110, 0x4}, 947 {104, 0x4}, 948 {98, 0x4}, 949 {110, 0x3}, 950 {104, 0x3}, 951 {98, 0x3}, 952 {110, 0x2}, 953 {104, 0x2}, 954 {98, 0x2}, 955 {110, 0x1}, 956 {104, 0x1}, 957 {98, 0x1}, 958 {110, 0x0}, 959 {104, 0x0}, 960 {98, 0x0}, 961 {97, 0}, 962 {96, 0}, 963 {95, 0}, 964 {94, 0}, 965 {93, 0}, 966 {92, 0}, 967 {91, 0}, 968 {90, 0}, 969 {89, 0}, 970 {88, 0}, 971 {87, 0}, 972 {86, 0}, 973 {85, 0}, 974 {84, 0}, 975 {83, 0}, 976 {82, 0}, 977 {81, 0}, 978 {80, 0}, 979 {79, 0}, 980 {78, 0}, 981 {77, 0}, 982 {76, 0}, 983 {75, 0}, 984 {74, 0}, 985 {73, 0}, 986 {72, 0}, 987 {71, 0}, 988 {70, 0}, 989 {69, 0}, 990 {68, 0}, 991 {67, 0}, 992 {66, 0}, 993 {65, 0}, 994 {64, 0}, 995 {63, 0}, 996 {62, 0}, 997 {61, 0}, 998 {60, 0}, 999 {59, 0}, 1000 } 1001 }; 1002 1003 static int 1004 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40, 1005 u8 ctrl_chan_high, 1006 struct il4965_tx_power_db *tx_power_tbl) 1007 { 1008 u8 saturation_power; 1009 s32 target_power; 1010 s32 user_target_power; 1011 s32 power_limit; 1012 s32 current_temp; 1013 s32 reg_limit; 1014 s32 current_regulatory; 1015 s32 txatten_grp = CALIB_CH_GROUP_MAX; 1016 int i; 1017 int c; 1018 const struct il_channel_info *ch_info = NULL; 1019 struct il_eeprom_calib_ch_info ch_eeprom_info; 1020 const struct il_eeprom_calib_measure *measurement; 1021 s16 voltage; 1022 s32 init_voltage; 1023 s32 voltage_compensation; 1024 s32 degrees_per_05db_num; 1025 s32 degrees_per_05db_denom; 1026 s32 factory_temp; 1027 s32 temperature_comp[2]; 1028 s32 factory_gain_idx[2]; 1029 s32 factory_actual_pwr[2]; 1030 s32 power_idx; 1031 1032 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units 1033 * are used for idxing into txpower table) */ 1034 user_target_power = 2 * il->tx_power_user_lmt; 1035 1036 /* Get current (RXON) channel, band, width */ 1037 D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40); 1038 1039 ch_info = il_get_channel_info(il, il->band, channel); 1040 1041 if (!il_is_channel_valid(ch_info)) 1042 return -EINVAL; 1043 1044 /* get txatten group, used to select 1) thermal txpower adjustment 1045 * and 2) mimo txpower balance between Tx chains. */ 1046 txatten_grp = il4965_get_tx_atten_grp(channel); 1047 if (txatten_grp < 0) { 1048 IL_ERR("Can't find txatten group for channel %d.\n", channel); 1049 return txatten_grp; 1050 } 1051 1052 D_TXPOWER("channel %d belongs to txatten group %d\n", channel, 1053 txatten_grp); 1054 1055 if (is_ht40) { 1056 if (ctrl_chan_high) 1057 channel -= 2; 1058 else 1059 channel += 2; 1060 } 1061 1062 /* hardware txpower limits ... 1063 * saturation (clipping distortion) txpowers are in half-dBm */ 1064 if (band) 1065 saturation_power = il->calib_info->saturation_power24; 1066 else 1067 saturation_power = il->calib_info->saturation_power52; 1068 1069 if (saturation_power < IL_TX_POWER_SATURATION_MIN || 1070 saturation_power > IL_TX_POWER_SATURATION_MAX) { 1071 if (band) 1072 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24; 1073 else 1074 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52; 1075 } 1076 1077 /* regulatory txpower limits ... reg_limit values are in half-dBm, 1078 * max_power_avg values are in dBm, convert * 2 */ 1079 if (is_ht40) 1080 reg_limit = ch_info->ht40_max_power_avg * 2; 1081 else 1082 reg_limit = ch_info->max_power_avg * 2; 1083 1084 if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) || 1085 (reg_limit > IL_TX_POWER_REGULATORY_MAX)) { 1086 if (band) 1087 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24; 1088 else 1089 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52; 1090 } 1091 1092 /* Interpolate txpower calibration values for this channel, 1093 * based on factory calibration tests on spaced channels. */ 1094 il4965_interpolate_chan(il, channel, &ch_eeprom_info); 1095 1096 /* calculate tx gain adjustment based on power supply voltage */ 1097 voltage = le16_to_cpu(il->calib_info->voltage); 1098 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage); 1099 voltage_compensation = 1100 il4965_get_voltage_compensation(voltage, init_voltage); 1101 1102 D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage, 1103 voltage, voltage_compensation); 1104 1105 /* get current temperature (Celsius) */ 1106 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN); 1107 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX); 1108 current_temp = kelvin_to_celsius(current_temp); 1109 1110 /* select thermal txpower adjustment params, based on channel group 1111 * (same frequency group used for mimo txatten adjustment) */ 1112 degrees_per_05db_num = 1113 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a; 1114 degrees_per_05db_denom = 1115 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom; 1116 1117 /* get per-chain txpower values from factory measurements */ 1118 for (c = 0; c < 2; c++) { 1119 measurement = &ch_eeprom_info.measurements[c][1]; 1120 1121 /* txgain adjustment (in half-dB steps) based on difference 1122 * between factory and current temperature */ 1123 factory_temp = measurement->temperature; 1124 il4965_math_div_round((current_temp - 1125 factory_temp) * degrees_per_05db_denom, 1126 degrees_per_05db_num, 1127 &temperature_comp[c]); 1128 1129 factory_gain_idx[c] = measurement->gain_idx; 1130 factory_actual_pwr[c] = measurement->actual_pow; 1131 1132 D_TXPOWER("chain = %d\n", c); 1133 D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n", 1134 factory_temp, current_temp, temperature_comp[c]); 1135 1136 D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c], 1137 factory_actual_pwr[c]); 1138 } 1139 1140 /* for each of 33 bit-rates (including 1 for CCK) */ 1141 for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) { 1142 u8 is_mimo_rate; 1143 union il4965_tx_power_dual_stream tx_power; 1144 1145 /* for mimo, reduce each chain's txpower by half 1146 * (3dB, 6 steps), so total output power is regulatory 1147 * compliant. */ 1148 if (i & 0x8) { 1149 current_regulatory = 1150 reg_limit - 1151 IL_TX_POWER_MIMO_REGULATORY_COMPENSATION; 1152 is_mimo_rate = 1; 1153 } else { 1154 current_regulatory = reg_limit; 1155 is_mimo_rate = 0; 1156 } 1157 1158 /* find txpower limit, either hardware or regulatory */ 1159 power_limit = saturation_power - back_off_table[i]; 1160 if (power_limit > current_regulatory) 1161 power_limit = current_regulatory; 1162 1163 /* reduce user's txpower request if necessary 1164 * for this rate on this channel */ 1165 target_power = user_target_power; 1166 if (target_power > power_limit) 1167 target_power = power_limit; 1168 1169 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i, 1170 saturation_power - back_off_table[i], 1171 current_regulatory, user_target_power, target_power); 1172 1173 /* for each of 2 Tx chains (radio transmitters) */ 1174 for (c = 0; c < 2; c++) { 1175 s32 atten_value; 1176 1177 if (is_mimo_rate) 1178 atten_value = 1179 (s32) le32_to_cpu(il->card_alive_init. 1180 tx_atten[txatten_grp][c]); 1181 else 1182 atten_value = 0; 1183 1184 /* calculate idx; higher idx means lower txpower */ 1185 power_idx = 1186 (u8) (factory_gain_idx[c] - 1187 (target_power - factory_actual_pwr[c]) - 1188 temperature_comp[c] - voltage_compensation + 1189 atten_value); 1190 1191 /* D_TXPOWER("calculated txpower idx %d\n", 1192 power_idx); */ 1193 1194 if (power_idx < get_min_power_idx(i, band)) 1195 power_idx = get_min_power_idx(i, band); 1196 1197 /* adjust 5 GHz idx to support negative idxes */ 1198 if (!band) 1199 power_idx += 9; 1200 1201 /* CCK, rate 32, reduce txpower for CCK */ 1202 if (i == POWER_TBL_CCK_ENTRY) 1203 power_idx += 1204 IL_TX_POWER_CCK_COMPENSATION_C_STEP; 1205 1206 /* stay within the table! */ 1207 if (power_idx > 107) { 1208 IL_WARN("txpower idx %d > 107\n", power_idx); 1209 power_idx = 107; 1210 } 1211 if (power_idx < 0) { 1212 IL_WARN("txpower idx %d < 0\n", power_idx); 1213 power_idx = 0; 1214 } 1215 1216 /* fill txpower command for this rate/chain */ 1217 tx_power.s.radio_tx_gain[c] = 1218 gain_table[band][power_idx].radio; 1219 tx_power.s.dsp_predis_atten[c] = 1220 gain_table[band][power_idx].dsp; 1221 1222 D_TXPOWER("chain %d mimo %d idx %d " 1223 "gain 0x%02x dsp %d\n", c, atten_value, 1224 power_idx, tx_power.s.radio_tx_gain[c], 1225 tx_power.s.dsp_predis_atten[c]); 1226 } /* for each chain */ 1227 1228 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); 1229 1230 } /* for each rate */ 1231 1232 return 0; 1233 } 1234 1235 /** 1236 * il4965_send_tx_power - Configure the TXPOWER level user limit 1237 * 1238 * Uses the active RXON for channel, band, and characteristics (ht40, high) 1239 * The power limit is taken from il->tx_power_user_lmt. 1240 */ 1241 static int 1242 il4965_send_tx_power(struct il_priv *il) 1243 { 1244 struct il4965_txpowertable_cmd cmd = { 0 }; 1245 int ret; 1246 u8 band = 0; 1247 bool is_ht40 = false; 1248 u8 ctrl_chan_high = 0; 1249 1250 if (WARN_ONCE 1251 (test_bit(S_SCAN_HW, &il->status), 1252 "TX Power requested while scanning!\n")) 1253 return -EAGAIN; 1254 1255 band = il->band == NL80211_BAND_2GHZ; 1256 1257 is_ht40 = iw4965_is_ht40_channel(il->active.flags); 1258 1259 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) 1260 ctrl_chan_high = 1; 1261 1262 cmd.band = band; 1263 cmd.channel = il->active.channel; 1264 1265 ret = 1266 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel), 1267 is_ht40, ctrl_chan_high, &cmd.tx_power); 1268 if (ret) 1269 goto out; 1270 1271 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd); 1272 1273 out: 1274 return ret; 1275 } 1276 1277 static int 1278 il4965_send_rxon_assoc(struct il_priv *il) 1279 { 1280 int ret = 0; 1281 struct il4965_rxon_assoc_cmd rxon_assoc; 1282 const struct il_rxon_cmd *rxon1 = &il->staging; 1283 const struct il_rxon_cmd *rxon2 = &il->active; 1284 1285 lockdep_assert_held(&il->mutex); 1286 1287 if (rxon1->flags == rxon2->flags && 1288 rxon1->filter_flags == rxon2->filter_flags && 1289 rxon1->cck_basic_rates == rxon2->cck_basic_rates && 1290 rxon1->ofdm_ht_single_stream_basic_rates == 1291 rxon2->ofdm_ht_single_stream_basic_rates && 1292 rxon1->ofdm_ht_dual_stream_basic_rates == 1293 rxon2->ofdm_ht_dual_stream_basic_rates && 1294 rxon1->rx_chain == rxon2->rx_chain && 1295 rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) { 1296 D_INFO("Using current RXON_ASSOC. Not resending.\n"); 1297 return 0; 1298 } 1299 1300 rxon_assoc.flags = il->staging.flags; 1301 rxon_assoc.filter_flags = il->staging.filter_flags; 1302 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates; 1303 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates; 1304 rxon_assoc.reserved = 0; 1305 rxon_assoc.ofdm_ht_single_stream_basic_rates = 1306 il->staging.ofdm_ht_single_stream_basic_rates; 1307 rxon_assoc.ofdm_ht_dual_stream_basic_rates = 1308 il->staging.ofdm_ht_dual_stream_basic_rates; 1309 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain; 1310 1311 ret = 1312 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc), 1313 &rxon_assoc, NULL); 1314 1315 return ret; 1316 } 1317 1318 static int 1319 il4965_commit_rxon(struct il_priv *il) 1320 { 1321 /* cast away the const for active_rxon in this function */ 1322 struct il_rxon_cmd *active_rxon = (void *)&il->active; 1323 int ret; 1324 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK); 1325 1326 if (!il_is_alive(il)) 1327 return -EBUSY; 1328 1329 /* always get timestamp with Rx frame */ 1330 il->staging.flags |= RXON_FLG_TSF2HOST_MSK; 1331 1332 ret = il_check_rxon_cmd(il); 1333 if (ret) { 1334 IL_ERR("Invalid RXON configuration. Not committing.\n"); 1335 return -EINVAL; 1336 } 1337 1338 /* 1339 * receive commit_rxon request 1340 * abort any previous channel switch if still in process 1341 */ 1342 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) && 1343 il->switch_channel != il->staging.channel) { 1344 D_11H("abort channel switch on %d\n", 1345 le16_to_cpu(il->switch_channel)); 1346 il_chswitch_done(il, false); 1347 } 1348 1349 /* If we don't need to send a full RXON, we can use 1350 * il_rxon_assoc_cmd which is used to reconfigure filter 1351 * and other flags for the current radio configuration. */ 1352 if (!il_full_rxon_required(il)) { 1353 ret = il_send_rxon_assoc(il); 1354 if (ret) { 1355 IL_ERR("Error setting RXON_ASSOC (%d)\n", ret); 1356 return ret; 1357 } 1358 1359 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); 1360 il_print_rx_config_cmd(il); 1361 /* 1362 * We do not commit tx power settings while channel changing, 1363 * do it now if tx power changed. 1364 */ 1365 il_set_tx_power(il, il->tx_power_next, false); 1366 return 0; 1367 } 1368 1369 /* If we are currently associated and the new config requires 1370 * an RXON_ASSOC and the new config wants the associated mask enabled, 1371 * we must clear the associated from the active configuration 1372 * before we apply the new config */ 1373 if (il_is_associated(il) && new_assoc) { 1374 D_INFO("Toggling associated bit on current RXON\n"); 1375 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 1376 1377 ret = 1378 il_send_cmd_pdu(il, C_RXON, 1379 sizeof(struct il_rxon_cmd), active_rxon); 1380 1381 /* If the mask clearing failed then we set 1382 * active_rxon back to what it was previously */ 1383 if (ret) { 1384 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; 1385 IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret); 1386 return ret; 1387 } 1388 il_clear_ucode_stations(il); 1389 il_restore_stations(il); 1390 ret = il4965_restore_default_wep_keys(il); 1391 if (ret) { 1392 IL_ERR("Failed to restore WEP keys (%d)\n", ret); 1393 return ret; 1394 } 1395 } 1396 1397 D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n" 1398 "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"), 1399 le16_to_cpu(il->staging.channel), il->staging.bssid_addr); 1400 1401 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto); 1402 1403 /* Apply the new configuration 1404 * RXON unassoc clears the station table in uCode so restoration of 1405 * stations is needed after it (the RXON command) completes 1406 */ 1407 if (!new_assoc) { 1408 ret = 1409 il_send_cmd_pdu(il, C_RXON, 1410 sizeof(struct il_rxon_cmd), &il->staging); 1411 if (ret) { 1412 IL_ERR("Error setting new RXON (%d)\n", ret); 1413 return ret; 1414 } 1415 D_INFO("Return from !new_assoc RXON.\n"); 1416 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); 1417 il_clear_ucode_stations(il); 1418 il_restore_stations(il); 1419 ret = il4965_restore_default_wep_keys(il); 1420 if (ret) { 1421 IL_ERR("Failed to restore WEP keys (%d)\n", ret); 1422 return ret; 1423 } 1424 } 1425 if (new_assoc) { 1426 il->start_calib = 0; 1427 /* Apply the new configuration 1428 * RXON assoc doesn't clear the station table in uCode, 1429 */ 1430 ret = 1431 il_send_cmd_pdu(il, C_RXON, 1432 sizeof(struct il_rxon_cmd), &il->staging); 1433 if (ret) { 1434 IL_ERR("Error setting new RXON (%d)\n", ret); 1435 return ret; 1436 } 1437 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); 1438 } 1439 il_print_rx_config_cmd(il); 1440 1441 il4965_init_sensitivity(il); 1442 1443 /* If we issue a new RXON command which required a tune then we must 1444 * send a new TXPOWER command or we won't be able to Tx any frames */ 1445 ret = il_set_tx_power(il, il->tx_power_next, true); 1446 if (ret) { 1447 IL_ERR("Error sending TX power (%d)\n", ret); 1448 return ret; 1449 } 1450 1451 return 0; 1452 } 1453 1454 static int 1455 il4965_hw_channel_switch(struct il_priv *il, 1456 struct ieee80211_channel_switch *ch_switch) 1457 { 1458 int rc; 1459 u8 band = 0; 1460 bool is_ht40 = false; 1461 u8 ctrl_chan_high = 0; 1462 struct il4965_channel_switch_cmd cmd; 1463 const struct il_channel_info *ch_info; 1464 u32 switch_time_in_usec, ucode_switch_time; 1465 u16 ch; 1466 u32 tsf_low; 1467 u8 switch_count; 1468 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval); 1469 struct ieee80211_vif *vif = il->vif; 1470 band = (il->band == NL80211_BAND_2GHZ); 1471 1472 if (WARN_ON_ONCE(vif == NULL)) 1473 return -EIO; 1474 1475 is_ht40 = iw4965_is_ht40_channel(il->staging.flags); 1476 1477 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) 1478 ctrl_chan_high = 1; 1479 1480 cmd.band = band; 1481 cmd.expect_beacon = 0; 1482 ch = ch_switch->chandef.chan->hw_value; 1483 cmd.channel = cpu_to_le16(ch); 1484 cmd.rxon_flags = il->staging.flags; 1485 cmd.rxon_filter_flags = il->staging.filter_flags; 1486 switch_count = ch_switch->count; 1487 tsf_low = ch_switch->timestamp & 0x0ffffffff; 1488 /* 1489 * calculate the ucode channel switch time 1490 * adding TSF as one of the factor for when to switch 1491 */ 1492 if (il->ucode_beacon_time > tsf_low && beacon_interval) { 1493 if (switch_count > 1494 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) { 1495 switch_count -= 1496 (il->ucode_beacon_time - tsf_low) / beacon_interval; 1497 } else 1498 switch_count = 0; 1499 } 1500 if (switch_count <= 1) 1501 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time); 1502 else { 1503 switch_time_in_usec = 1504 vif->bss_conf.beacon_int * switch_count * TIME_UNIT; 1505 ucode_switch_time = 1506 il_usecs_to_beacons(il, switch_time_in_usec, 1507 beacon_interval); 1508 cmd.switch_time = 1509 il_add_beacon_time(il, il->ucode_beacon_time, 1510 ucode_switch_time, beacon_interval); 1511 } 1512 D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time); 1513 ch_info = il_get_channel_info(il, il->band, ch); 1514 if (ch_info) 1515 cmd.expect_beacon = il_is_channel_radar(ch_info); 1516 else { 1517 IL_ERR("invalid channel switch from %u to %u\n", 1518 il->active.channel, ch); 1519 return -EFAULT; 1520 } 1521 1522 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high, 1523 &cmd.tx_power); 1524 if (rc) { 1525 D_11H("error:%d fill txpower_tbl\n", rc); 1526 return rc; 1527 } 1528 1529 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd); 1530 } 1531 1532 /** 1533 * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array 1534 */ 1535 static void 1536 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq, 1537 u16 byte_cnt) 1538 { 1539 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr; 1540 int txq_id = txq->q.id; 1541 int write_ptr = txq->q.write_ptr; 1542 int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE; 1543 __le16 bc_ent; 1544 1545 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); 1546 1547 bc_ent = cpu_to_le16(len & 0xFFF); 1548 /* Set up byte count within first 256 entries */ 1549 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; 1550 1551 /* If within first 64 entries, duplicate at end */ 1552 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) 1553 scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = 1554 bc_ent; 1555 } 1556 1557 /** 1558 * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin) 1559 * @stats: Provides the temperature reading from the uCode 1560 * 1561 * A return of <0 indicates bogus data in the stats 1562 */ 1563 static int 1564 il4965_hw_get_temperature(struct il_priv *il) 1565 { 1566 s32 temperature; 1567 s32 vt; 1568 s32 R1, R2, R3; 1569 u32 R4; 1570 1571 if (test_bit(S_TEMPERATURE, &il->status) && 1572 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) { 1573 D_TEMP("Running HT40 temperature calibration\n"); 1574 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]); 1575 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]); 1576 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]); 1577 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); 1578 } else { 1579 D_TEMP("Running temperature calibration\n"); 1580 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]); 1581 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]); 1582 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]); 1583 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); 1584 } 1585 1586 /* 1587 * Temperature is only 23 bits, so sign extend out to 32. 1588 * 1589 * NOTE If we haven't received a stats notification yet 1590 * with an updated temperature, use R4 provided to us in the 1591 * "initialize" ALIVE response. 1592 */ 1593 if (!test_bit(S_TEMPERATURE, &il->status)) 1594 vt = sign_extend32(R4, 23); 1595 else 1596 vt = sign_extend32(le32_to_cpu 1597 (il->_4965.stats.general.common.temperature), 1598 23); 1599 1600 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); 1601 1602 if (R3 == R1) { 1603 IL_ERR("Calibration conflict R1 == R3\n"); 1604 return -1; 1605 } 1606 1607 /* Calculate temperature in degrees Kelvin, adjust by 97%. 1608 * Add offset to center the adjustment around 0 degrees Centigrade. */ 1609 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); 1610 temperature /= (R3 - R1); 1611 temperature = 1612 (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET; 1613 1614 D_TEMP("Calibrated temperature: %dK, %ldC\n", temperature, 1615 kelvin_to_celsius(temperature)); 1616 1617 return temperature; 1618 } 1619 1620 /* Adjust Txpower only if temperature variance is greater than threshold. */ 1621 #define IL_TEMPERATURE_THRESHOLD 3 1622 1623 /** 1624 * il4965_is_temp_calib_needed - determines if new calibration is needed 1625 * 1626 * If the temperature changed has changed sufficiently, then a recalibration 1627 * is needed. 1628 * 1629 * Assumes caller will replace il->last_temperature once calibration 1630 * executed. 1631 */ 1632 static int 1633 il4965_is_temp_calib_needed(struct il_priv *il) 1634 { 1635 int temp_diff; 1636 1637 if (!test_bit(S_STATS, &il->status)) { 1638 D_TEMP("Temperature not updated -- no stats.\n"); 1639 return 0; 1640 } 1641 1642 temp_diff = il->temperature - il->last_temperature; 1643 1644 /* get absolute value */ 1645 if (temp_diff < 0) { 1646 D_POWER("Getting cooler, delta %d\n", temp_diff); 1647 temp_diff = -temp_diff; 1648 } else if (temp_diff == 0) 1649 D_POWER("Temperature unchanged\n"); 1650 else 1651 D_POWER("Getting warmer, delta %d\n", temp_diff); 1652 1653 if (temp_diff < IL_TEMPERATURE_THRESHOLD) { 1654 D_POWER(" => thermal txpower calib not needed\n"); 1655 return 0; 1656 } 1657 1658 D_POWER(" => thermal txpower calib needed\n"); 1659 1660 return 1; 1661 } 1662 1663 void 1664 il4965_temperature_calib(struct il_priv *il) 1665 { 1666 s32 temp; 1667 1668 temp = il4965_hw_get_temperature(il); 1669 if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp)) 1670 return; 1671 1672 if (il->temperature != temp) { 1673 if (il->temperature) 1674 D_TEMP("Temperature changed " "from %ldC to %ldC\n", 1675 kelvin_to_celsius(il->temperature), 1676 kelvin_to_celsius(temp)); 1677 else 1678 D_TEMP("Temperature " "initialized to %ldC\n", 1679 kelvin_to_celsius(temp)); 1680 } 1681 1682 il->temperature = temp; 1683 set_bit(S_TEMPERATURE, &il->status); 1684 1685 if (!il->disable_tx_power_cal && 1686 unlikely(!test_bit(S_SCANNING, &il->status)) && 1687 il4965_is_temp_calib_needed(il)) 1688 queue_work(il->workqueue, &il->txpower_work); 1689 } 1690 1691 static u16 1692 il4965_get_hcmd_size(u8 cmd_id, u16 len) 1693 { 1694 switch (cmd_id) { 1695 case C_RXON: 1696 return (u16) sizeof(struct il4965_rxon_cmd); 1697 default: 1698 return len; 1699 } 1700 } 1701 1702 static u16 1703 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data) 1704 { 1705 struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data; 1706 addsta->mode = cmd->mode; 1707 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify)); 1708 memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo)); 1709 addsta->station_flags = cmd->station_flags; 1710 addsta->station_flags_msk = cmd->station_flags_msk; 1711 addsta->tid_disable_tx = cmd->tid_disable_tx; 1712 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid; 1713 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; 1714 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; 1715 addsta->sleep_tx_count = cmd->sleep_tx_count; 1716 addsta->reserved1 = cpu_to_le16(0); 1717 addsta->reserved2 = cpu_to_le16(0); 1718 1719 return (u16) sizeof(struct il4965_addsta_cmd); 1720 } 1721 1722 static void 1723 il4965_post_scan(struct il_priv *il) 1724 { 1725 /* 1726 * Since setting the RXON may have been deferred while 1727 * performing the scan, fire one off if needed 1728 */ 1729 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) 1730 il_commit_rxon(il); 1731 } 1732 1733 static void 1734 il4965_post_associate(struct il_priv *il) 1735 { 1736 struct ieee80211_vif *vif = il->vif; 1737 int ret = 0; 1738 1739 if (!vif || !il->is_open) 1740 return; 1741 1742 if (test_bit(S_EXIT_PENDING, &il->status)) 1743 return; 1744 1745 il_scan_cancel_timeout(il, 200); 1746 1747 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 1748 il_commit_rxon(il); 1749 1750 ret = il_send_rxon_timing(il); 1751 if (ret) 1752 IL_WARN("RXON timing - " "Attempting to continue.\n"); 1753 1754 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 1755 1756 il_set_rxon_ht(il, &il->current_ht_config); 1757 1758 if (il->ops->set_rxon_chain) 1759 il->ops->set_rxon_chain(il); 1760 1761 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); 1762 1763 D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid, 1764 vif->bss_conf.beacon_int); 1765 1766 if (vif->bss_conf.use_short_preamble) 1767 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 1768 else 1769 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 1770 1771 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 1772 if (vif->bss_conf.use_short_slot) 1773 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 1774 else 1775 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 1776 } 1777 1778 il_commit_rxon(il); 1779 1780 D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid, 1781 il->active.bssid_addr); 1782 1783 switch (vif->type) { 1784 case NL80211_IFTYPE_STATION: 1785 break; 1786 case NL80211_IFTYPE_ADHOC: 1787 il4965_send_beacon_cmd(il); 1788 break; 1789 default: 1790 IL_ERR("%s Should not be called in %d mode\n", __func__, 1791 vif->type); 1792 break; 1793 } 1794 1795 /* the chain noise calibration will enabled PM upon completion 1796 * If chain noise has already been run, then we need to enable 1797 * power management here */ 1798 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE) 1799 il_power_update_mode(il, false); 1800 1801 /* Enable Rx differential gain and sensitivity calibrations */ 1802 il4965_chain_noise_reset(il); 1803 il->start_calib = 1; 1804 } 1805 1806 static void 1807 il4965_config_ap(struct il_priv *il) 1808 { 1809 struct ieee80211_vif *vif = il->vif; 1810 int ret = 0; 1811 1812 lockdep_assert_held(&il->mutex); 1813 1814 if (test_bit(S_EXIT_PENDING, &il->status)) 1815 return; 1816 1817 /* The following should be done only at AP bring up */ 1818 if (!il_is_associated(il)) { 1819 1820 /* RXON - unassoc (to set timing command) */ 1821 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 1822 il_commit_rxon(il); 1823 1824 /* RXON Timing */ 1825 ret = il_send_rxon_timing(il); 1826 if (ret) 1827 IL_WARN("RXON timing failed - " 1828 "Attempting to continue.\n"); 1829 1830 /* AP has all antennas */ 1831 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant; 1832 il_set_rxon_ht(il, &il->current_ht_config); 1833 if (il->ops->set_rxon_chain) 1834 il->ops->set_rxon_chain(il); 1835 1836 il->staging.assoc_id = 0; 1837 1838 if (vif->bss_conf.use_short_preamble) 1839 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 1840 else 1841 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 1842 1843 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 1844 if (vif->bss_conf.use_short_slot) 1845 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 1846 else 1847 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 1848 } 1849 /* need to send beacon cmd before committing assoc RXON! */ 1850 il4965_send_beacon_cmd(il); 1851 /* restore RXON assoc */ 1852 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 1853 il_commit_rxon(il); 1854 } 1855 il4965_send_beacon_cmd(il); 1856 } 1857 1858 const struct il_ops il4965_ops = { 1859 .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl, 1860 .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd, 1861 .txq_free_tfd = il4965_hw_txq_free_tfd, 1862 .txq_init = il4965_hw_tx_queue_init, 1863 .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr, 1864 .init_alive_start = il4965_init_alive_start, 1865 .load_ucode = il4965_load_bsm, 1866 .dump_nic_error_log = il4965_dump_nic_error_log, 1867 .dump_fh = il4965_dump_fh, 1868 .set_channel_switch = il4965_hw_channel_switch, 1869 .apm_init = il_apm_init, 1870 .send_tx_power = il4965_send_tx_power, 1871 .update_chain_flags = il4965_update_chain_flags, 1872 .eeprom_acquire_semaphore = il4965_eeprom_acquire_semaphore, 1873 .eeprom_release_semaphore = il4965_eeprom_release_semaphore, 1874 1875 .rxon_assoc = il4965_send_rxon_assoc, 1876 .commit_rxon = il4965_commit_rxon, 1877 .set_rxon_chain = il4965_set_rxon_chain, 1878 1879 .get_hcmd_size = il4965_get_hcmd_size, 1880 .build_addsta_hcmd = il4965_build_addsta_hcmd, 1881 .request_scan = il4965_request_scan, 1882 .post_scan = il4965_post_scan, 1883 1884 .post_associate = il4965_post_associate, 1885 .config_ap = il4965_config_ap, 1886 .manage_ibss_station = il4965_manage_ibss_station, 1887 .update_bcast_stations = il4965_update_bcast_stations, 1888 1889 .send_led_cmd = il4965_send_led_cmd, 1890 }; 1891 1892 struct il_cfg il4965_cfg = { 1893 .name = "Intel(R) Wireless WiFi Link 4965AGN", 1894 .fw_name_pre = IL4965_FW_PRE, 1895 .ucode_api_max = IL4965_UCODE_API_MAX, 1896 .ucode_api_min = IL4965_UCODE_API_MIN, 1897 .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N, 1898 .valid_tx_ant = ANT_AB, 1899 .valid_rx_ant = ANT_ABC, 1900 .eeprom_ver = EEPROM_4965_EEPROM_VERSION, 1901 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, 1902 .mod_params = &il4965_mod_params, 1903 .led_mode = IL_LED_BLINK, 1904 /* 1905 * Force use of chains B and C for scan RX on 5 GHz band 1906 * because the device has off-channel reception on chain A. 1907 */ 1908 .scan_rx_antennas[NL80211_BAND_5GHZ] = ANT_BC, 1909 1910 .eeprom_size = IL4965_EEPROM_IMG_SIZE, 1911 .num_of_queues = IL49_NUM_QUEUES, 1912 .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES, 1913 .pll_cfg_val = 0, 1914 .set_l0s = true, 1915 .use_bsm = true, 1916 .led_compensation = 61, 1917 .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS, 1918 .wd_timeout = IL_DEF_WD_TIMEOUT, 1919 .temperature_kelvin = true, 1920 .ucode_tracing = true, 1921 .sensitivity_calib_by_driver = true, 1922 .chain_noise_calib_by_driver = true, 1923 1924 .regulatory_bands = { 1925 EEPROM_REGULATORY_BAND_1_CHANNELS, 1926 EEPROM_REGULATORY_BAND_2_CHANNELS, 1927 EEPROM_REGULATORY_BAND_3_CHANNELS, 1928 EEPROM_REGULATORY_BAND_4_CHANNELS, 1929 EEPROM_REGULATORY_BAND_5_CHANNELS, 1930 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS, 1931 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS 1932 }, 1933 1934 }; 1935 1936 /* Module firmware */ 1937 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX)); 1938