1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Portions of this file are derived from the ipw3945 project, as well 7 * as portions of the ieee80211 subsystem header files. 8 * 9 * Contact Information: 10 * Intel Linux Wireless <ilw@linux.intel.com> 11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12 * 13 *****************************************************************************/ 14 15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/pci.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/delay.h> 24 #include <linux/sched.h> 25 #include <linux/skbuff.h> 26 #include <linux/netdevice.h> 27 #include <linux/firmware.h> 28 #include <linux/etherdevice.h> 29 #include <linux/if_arp.h> 30 31 #include <net/ieee80211_radiotap.h> 32 #include <net/mac80211.h> 33 34 #include <asm/div64.h> 35 36 #define DRV_NAME "iwl3945" 37 38 #include "commands.h" 39 #include "common.h" 40 #include "3945.h" 41 #include "iwl-spectrum.h" 42 43 /* 44 * module name, copyright, version, etc. 45 */ 46 47 #define DRV_DESCRIPTION \ 48 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" 49 50 #ifdef CONFIG_IWLEGACY_DEBUG 51 #define VD "d" 52 #else 53 #define VD 54 #endif 55 56 /* 57 * add "s" to indicate spectrum measurement included. 58 * we add it here to be consistent with previous releases in which 59 * this was configurable. 60 */ 61 #define DRV_VERSION IWLWIFI_VERSION VD "s" 62 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation" 63 #define DRV_AUTHOR "<ilw@linux.intel.com>" 64 65 MODULE_DESCRIPTION(DRV_DESCRIPTION); 66 MODULE_VERSION(DRV_VERSION); 67 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 68 MODULE_LICENSE("GPL"); 69 70 /* module parameters */ 71 struct il_mod_params il3945_mod_params = { 72 .sw_crypto = 1, 73 .restart_fw = 1, 74 .disable_hw_scan = 1, 75 /* the rest are 0 by default */ 76 }; 77 78 /** 79 * il3945_get_antenna_flags - Get antenna flags for RXON command 80 * @il: eeprom and antenna fields are used to determine antenna flags 81 * 82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed 83 * il3945_mod_params.antenna specifies the antenna diversity mode: 84 * 85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself 86 * IL_ANTENNA_MAIN - Force MAIN antenna 87 * IL_ANTENNA_AUX - Force AUX antenna 88 */ 89 __le32 90 il3945_get_antenna_flags(const struct il_priv *il) 91 { 92 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 93 94 switch (il3945_mod_params.antenna) { 95 case IL_ANTENNA_DIVERSITY: 96 return 0; 97 98 case IL_ANTENNA_MAIN: 99 if (eeprom->antenna_switch_type) 100 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 102 103 case IL_ANTENNA_AUX: 104 if (eeprom->antenna_switch_type) 105 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 107 } 108 109 /* bad antenna selector value */ 110 IL_ERR("Bad antenna selector value (0x%x)\n", 111 il3945_mod_params.antenna); 112 113 return 0; /* "diversity" is default if error */ 114 } 115 116 static int 117 il3945_set_ccmp_dynamic_key_info(struct il_priv *il, 118 struct ieee80211_key_conf *keyconf, u8 sta_id) 119 { 120 unsigned long flags; 121 __le16 key_flags = 0; 122 int ret; 123 124 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); 125 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); 126 127 if (sta_id == il->hw_params.bcast_id) 128 key_flags |= STA_KEY_MULTICAST_MSK; 129 130 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 131 keyconf->hw_key_idx = keyconf->keyidx; 132 key_flags &= ~STA_KEY_FLG_INVALID; 133 134 spin_lock_irqsave(&il->sta_lock, flags); 135 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 136 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 137 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); 138 139 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); 140 141 if ((il->stations[sta_id].sta.key. 142 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) 143 il->stations[sta_id].sta.key.key_offset = 144 il_get_free_ucode_key_idx(il); 145 /* else, we are overriding an existing key => no need to allocated room 146 * in uCode. */ 147 148 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 149 "no space for a new key"); 150 151 il->stations[sta_id].sta.key.key_flags = key_flags; 152 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 153 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 154 155 D_INFO("hwcrypto: modify ucode station key info\n"); 156 157 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); 158 159 spin_unlock_irqrestore(&il->sta_lock, flags); 160 161 return ret; 162 } 163 164 static int 165 il3945_set_tkip_dynamic_key_info(struct il_priv *il, 166 struct ieee80211_key_conf *keyconf, u8 sta_id) 167 { 168 return -EOPNOTSUPP; 169 } 170 171 static int 172 il3945_set_wep_dynamic_key_info(struct il_priv *il, 173 struct ieee80211_key_conf *keyconf, u8 sta_id) 174 { 175 return -EOPNOTSUPP; 176 } 177 178 static int 179 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) 180 { 181 unsigned long flags; 182 struct il_addsta_cmd sta_cmd; 183 184 spin_lock_irqsave(&il->sta_lock, flags); 185 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); 186 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); 187 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; 188 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 189 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 190 memcpy(&sta_cmd, &il->stations[sta_id].sta, 191 sizeof(struct il_addsta_cmd)); 192 spin_unlock_irqrestore(&il->sta_lock, flags); 193 194 D_INFO("hwcrypto: clear ucode station key info\n"); 195 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 196 } 197 198 static int 199 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, 200 u8 sta_id) 201 { 202 int ret = 0; 203 204 keyconf->hw_key_idx = HW_KEY_DYNAMIC; 205 206 switch (keyconf->cipher) { 207 case WLAN_CIPHER_SUITE_CCMP: 208 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id); 209 break; 210 case WLAN_CIPHER_SUITE_TKIP: 211 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id); 212 break; 213 case WLAN_CIPHER_SUITE_WEP40: 214 case WLAN_CIPHER_SUITE_WEP104: 215 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); 216 break; 217 default: 218 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher); 219 ret = -EINVAL; 220 } 221 222 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", 223 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); 224 225 return ret; 226 } 227 228 static int 229 il3945_remove_static_key(struct il_priv *il) 230 { 231 int ret = -EOPNOTSUPP; 232 233 return ret; 234 } 235 236 static int 237 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) 238 { 239 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || 240 key->cipher == WLAN_CIPHER_SUITE_WEP104) 241 return -EOPNOTSUPP; 242 243 IL_ERR("Static key invalid: cipher %x\n", key->cipher); 244 return -EINVAL; 245 } 246 247 static void 248 il3945_clear_free_frames(struct il_priv *il) 249 { 250 struct list_head *element; 251 252 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); 253 254 while (!list_empty(&il->free_frames)) { 255 element = il->free_frames.next; 256 list_del(element); 257 kfree(list_entry(element, struct il3945_frame, list)); 258 il->frames_count--; 259 } 260 261 if (il->frames_count) { 262 IL_WARN("%d frames still in use. Did we lose one?\n", 263 il->frames_count); 264 il->frames_count = 0; 265 } 266 } 267 268 static struct il3945_frame * 269 il3945_get_free_frame(struct il_priv *il) 270 { 271 struct il3945_frame *frame; 272 struct list_head *element; 273 if (list_empty(&il->free_frames)) { 274 frame = kzalloc(sizeof(*frame), GFP_KERNEL); 275 if (!frame) { 276 IL_ERR("Could not allocate frame!\n"); 277 return NULL; 278 } 279 280 il->frames_count++; 281 return frame; 282 } 283 284 element = il->free_frames.next; 285 list_del(element); 286 return list_entry(element, struct il3945_frame, list); 287 } 288 289 static void 290 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) 291 { 292 memset(frame, 0, sizeof(*frame)); 293 list_add(&frame->list, &il->free_frames); 294 } 295 296 unsigned int 297 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, 298 int left) 299 { 300 301 if (!il_is_associated(il) || !il->beacon_skb) 302 return 0; 303 304 if (il->beacon_skb->len > left) 305 return 0; 306 307 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); 308 309 return il->beacon_skb->len; 310 } 311 312 static int 313 il3945_send_beacon_cmd(struct il_priv *il) 314 { 315 struct il3945_frame *frame; 316 unsigned int frame_size; 317 int rc; 318 u8 rate; 319 320 frame = il3945_get_free_frame(il); 321 322 if (!frame) { 323 IL_ERR("Could not obtain free frame buffer for beacon " 324 "command.\n"); 325 return -ENOMEM; 326 } 327 328 rate = il_get_lowest_plcp(il); 329 330 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); 331 332 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); 333 334 il3945_free_frame(il, frame); 335 336 return rc; 337 } 338 339 static void 340 il3945_unset_hw_params(struct il_priv *il) 341 { 342 if (il->_3945.shared_virt) 343 dma_free_coherent(&il->pci_dev->dev, 344 sizeof(struct il3945_shared), 345 il->_3945.shared_virt, il->_3945.shared_phys); 346 } 347 348 static void 349 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, 350 struct il_device_cmd *cmd, 351 struct sk_buff *skb_frag, int sta_id) 352 { 353 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 354 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; 355 356 tx_cmd->sec_ctl = 0; 357 358 switch (keyinfo->cipher) { 359 case WLAN_CIPHER_SUITE_CCMP: 360 tx_cmd->sec_ctl = TX_CMD_SEC_CCM; 361 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen); 362 D_TX("tx_cmd with AES hwcrypto\n"); 363 break; 364 365 case WLAN_CIPHER_SUITE_TKIP: 366 break; 367 368 case WLAN_CIPHER_SUITE_WEP104: 369 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; 370 /* fall through */ 371 case WLAN_CIPHER_SUITE_WEP40: 372 tx_cmd->sec_ctl |= 373 TX_CMD_SEC_WEP | (info->control.hw_key-> 374 hw_key_idx & TX_CMD_SEC_MSK) << 375 TX_CMD_SEC_SHIFT; 376 377 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); 378 379 D_TX("Configuring packet for WEP encryption " "with key %d\n", 380 info->control.hw_key->hw_key_idx); 381 break; 382 383 default: 384 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher); 385 break; 386 } 387 } 388 389 /* 390 * handle build C_TX command notification. 391 */ 392 static void 393 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, 394 struct ieee80211_tx_info *info, 395 struct ieee80211_hdr *hdr, u8 std_id) 396 { 397 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 398 __le32 tx_flags = tx_cmd->tx_flags; 399 __le16 fc = hdr->frame_control; 400 401 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 402 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 403 tx_flags |= TX_CMD_FLG_ACK_MSK; 404 if (ieee80211_is_mgmt(fc)) 405 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 406 if (ieee80211_is_probe_resp(fc) && 407 !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) 408 tx_flags |= TX_CMD_FLG_TSF_MSK; 409 } else { 410 tx_flags &= (~TX_CMD_FLG_ACK_MSK); 411 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 412 } 413 414 tx_cmd->sta_id = std_id; 415 if (ieee80211_has_morefrags(fc)) 416 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; 417 418 if (ieee80211_is_data_qos(fc)) { 419 u8 *qc = ieee80211_get_qos_ctl(hdr); 420 tx_cmd->tid_tspec = qc[0] & 0xf; 421 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 422 } else { 423 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 424 } 425 426 il_tx_cmd_protection(il, info, fc, &tx_flags); 427 428 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); 429 if (ieee80211_is_mgmt(fc)) { 430 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) 431 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3); 432 else 433 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2); 434 } else { 435 tx_cmd->timeout.pm_frame_timeout = 0; 436 } 437 438 tx_cmd->driver_txop = 0; 439 tx_cmd->tx_flags = tx_flags; 440 tx_cmd->next_frame_len = 0; 441 } 442 443 /* 444 * start C_TX command process 445 */ 446 static int 447 il3945_tx_skb(struct il_priv *il, 448 struct ieee80211_sta *sta, 449 struct sk_buff *skb) 450 { 451 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 452 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 453 struct il3945_tx_cmd *tx_cmd; 454 struct il_tx_queue *txq = NULL; 455 struct il_queue *q = NULL; 456 struct il_device_cmd *out_cmd; 457 struct il_cmd_meta *out_meta; 458 dma_addr_t phys_addr; 459 dma_addr_t txcmd_phys; 460 int txq_id = skb_get_queue_mapping(skb); 461 u16 len, idx, hdr_len; 462 u16 firstlen, secondlen; 463 u8 sta_id; 464 u8 tid = 0; 465 __le16 fc; 466 u8 wait_write_ptr = 0; 467 unsigned long flags; 468 469 spin_lock_irqsave(&il->lock, flags); 470 if (il_is_rfkill(il)) { 471 D_DROP("Dropping - RF KILL\n"); 472 goto drop_unlock; 473 } 474 475 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == 476 IL_INVALID_RATE) { 477 IL_ERR("ERROR: No TX rate available.\n"); 478 goto drop_unlock; 479 } 480 481 fc = hdr->frame_control; 482 483 #ifdef CONFIG_IWLEGACY_DEBUG 484 if (ieee80211_is_auth(fc)) 485 D_TX("Sending AUTH frame\n"); 486 else if (ieee80211_is_assoc_req(fc)) 487 D_TX("Sending ASSOC frame\n"); 488 else if (ieee80211_is_reassoc_req(fc)) 489 D_TX("Sending REASSOC frame\n"); 490 #endif 491 492 spin_unlock_irqrestore(&il->lock, flags); 493 494 hdr_len = ieee80211_hdrlen(fc); 495 496 /* Find idx into station table for destination station */ 497 sta_id = il_sta_id_or_broadcast(il, sta); 498 if (sta_id == IL_INVALID_STATION) { 499 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); 500 goto drop; 501 } 502 503 D_RATE("station Id %d\n", sta_id); 504 505 if (ieee80211_is_data_qos(fc)) { 506 u8 *qc = ieee80211_get_qos_ctl(hdr); 507 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 508 if (unlikely(tid >= MAX_TID_COUNT)) 509 goto drop; 510 } 511 512 /* Descriptor for chosen Tx queue */ 513 txq = &il->txq[txq_id]; 514 q = &txq->q; 515 516 if ((il_queue_space(q) < q->high_mark)) 517 goto drop; 518 519 spin_lock_irqsave(&il->lock, flags); 520 521 idx = il_get_cmd_idx(q, q->write_ptr, 0); 522 523 txq->skbs[q->write_ptr] = skb; 524 525 /* Init first empty entry in queue's array of Tx/cmd buffers */ 526 out_cmd = txq->cmd[idx]; 527 out_meta = &txq->meta[idx]; 528 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload; 529 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); 530 memset(tx_cmd, 0, sizeof(*tx_cmd)); 531 532 /* 533 * Set up the Tx-command (not MAC!) header. 534 * Store the chosen Tx queue and TFD idx within the sequence field; 535 * after Tx, uCode's Tx response will return this value so driver can 536 * locate the frame within the tx queue and do post-tx processing. 537 */ 538 out_cmd->hdr.cmd = C_TX; 539 out_cmd->hdr.sequence = 540 cpu_to_le16((u16) 541 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); 542 543 /* Copy MAC header from skb into command buffer */ 544 memcpy(tx_cmd->hdr, hdr, hdr_len); 545 546 if (info->control.hw_key) 547 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); 548 549 /* TODO need this for burst mode later on */ 550 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id); 551 552 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id); 553 554 /* Total # bytes to be transmitted */ 555 tx_cmd->len = cpu_to_le16((u16) skb->len); 556 557 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; 558 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; 559 560 /* 561 * Use the first empty entry in this queue's command buffer array 562 * to contain the Tx command and MAC header concatenated together 563 * (payload data will be in another buffer). 564 * Size of this varies, due to varying MAC header length. 565 * If end is not dword aligned, we'll have 2 extra bytes at the end 566 * of the MAC header (device reads on dword boundaries). 567 * We'll tell device about this padding later. 568 */ 569 len = 570 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + 571 hdr_len; 572 firstlen = (len + 3) & ~3; 573 574 /* Physical address of this Tx command's header (not MAC header!), 575 * within command buffer array. */ 576 txcmd_phys = 577 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, 578 PCI_DMA_TODEVICE); 579 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) 580 goto drop_unlock; 581 582 /* Set up TFD's 2nd entry to point directly to remainder of skb, 583 * if any (802.11 null frames have no payload). */ 584 secondlen = skb->len - hdr_len; 585 if (secondlen > 0) { 586 phys_addr = 587 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, 588 PCI_DMA_TODEVICE); 589 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) 590 goto drop_unlock; 591 } 592 593 /* Add buffer containing Tx command and MAC(!) header to TFD's 594 * first entry */ 595 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); 596 dma_unmap_addr_set(out_meta, mapping, txcmd_phys); 597 dma_unmap_len_set(out_meta, len, firstlen); 598 if (secondlen > 0) 599 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, 600 U32_PAD(secondlen)); 601 602 if (!ieee80211_has_morefrags(hdr->frame_control)) { 603 txq->need_update = 1; 604 } else { 605 wait_write_ptr = 1; 606 txq->need_update = 0; 607 } 608 609 il_update_stats(il, true, fc, skb->len); 610 611 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); 612 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); 613 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); 614 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, 615 ieee80211_hdrlen(fc)); 616 617 /* Tell device the write idx *just past* this latest filled TFD */ 618 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 619 il_txq_update_write_ptr(il, txq); 620 spin_unlock_irqrestore(&il->lock, flags); 621 622 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { 623 if (wait_write_ptr) { 624 spin_lock_irqsave(&il->lock, flags); 625 txq->need_update = 1; 626 il_txq_update_write_ptr(il, txq); 627 spin_unlock_irqrestore(&il->lock, flags); 628 } 629 630 il_stop_queue(il, txq); 631 } 632 633 return 0; 634 635 drop_unlock: 636 spin_unlock_irqrestore(&il->lock, flags); 637 drop: 638 return -1; 639 } 640 641 static int 642 il3945_get_measurement(struct il_priv *il, 643 struct ieee80211_measurement_params *params, u8 type) 644 { 645 struct il_spectrum_cmd spectrum; 646 struct il_rx_pkt *pkt; 647 struct il_host_cmd cmd = { 648 .id = C_SPECTRUM_MEASUREMENT, 649 .data = (void *)&spectrum, 650 .flags = CMD_WANT_SKB, 651 }; 652 u32 add_time = le64_to_cpu(params->start_time); 653 int rc; 654 int spectrum_resp_status; 655 int duration = le16_to_cpu(params->duration); 656 657 if (il_is_associated(il)) 658 add_time = 659 il_usecs_to_beacons(il, 660 le64_to_cpu(params->start_time) - 661 il->_3945.last_tsf, 662 le16_to_cpu(il->timing.beacon_interval)); 663 664 memset(&spectrum, 0, sizeof(spectrum)); 665 666 spectrum.channel_count = cpu_to_le16(1); 667 spectrum.flags = 668 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; 669 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; 670 cmd.len = sizeof(spectrum); 671 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); 672 673 if (il_is_associated(il)) 674 spectrum.start_time = 675 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time, 676 le16_to_cpu(il->timing.beacon_interval)); 677 else 678 spectrum.start_time = 0; 679 680 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); 681 spectrum.channels[0].channel = params->channel; 682 spectrum.channels[0].type = type; 683 if (il->active.flags & RXON_FLG_BAND_24G_MSK) 684 spectrum.flags |= 685 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 686 RXON_FLG_TGG_PROTECT_MSK; 687 688 rc = il_send_cmd_sync(il, &cmd); 689 if (rc) 690 return rc; 691 692 pkt = (struct il_rx_pkt *)cmd.reply_page; 693 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 694 IL_ERR("Bad return from N_RX_ON_ASSOC command\n"); 695 rc = -EIO; 696 } 697 698 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status); 699 switch (spectrum_resp_status) { 700 case 0: /* Command will be handled */ 701 if (pkt->u.spectrum.id != 0xff) { 702 D_INFO("Replaced existing measurement: %d\n", 703 pkt->u.spectrum.id); 704 il->measurement_status &= ~MEASUREMENT_READY; 705 } 706 il->measurement_status |= MEASUREMENT_ACTIVE; 707 rc = 0; 708 break; 709 710 case 1: /* Command will not be handled */ 711 rc = -EAGAIN; 712 break; 713 } 714 715 il_free_pages(il, cmd.reply_page); 716 717 return rc; 718 } 719 720 static void 721 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) 722 { 723 struct il_rx_pkt *pkt = rxb_addr(rxb); 724 struct il_alive_resp *palive; 725 struct delayed_work *pwork; 726 727 palive = &pkt->u.alive_frame; 728 729 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", 730 palive->is_valid, palive->ver_type, palive->ver_subtype); 731 732 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 733 D_INFO("Initialization Alive received.\n"); 734 memcpy(&il->card_alive_init, &pkt->u.alive_frame, 735 sizeof(struct il_alive_resp)); 736 pwork = &il->init_alive_start; 737 } else { 738 D_INFO("Runtime Alive received.\n"); 739 memcpy(&il->card_alive, &pkt->u.alive_frame, 740 sizeof(struct il_alive_resp)); 741 pwork = &il->alive_start; 742 il3945_disable_events(il); 743 } 744 745 /* We delay the ALIVE response by 5ms to 746 * give the HW RF Kill time to activate... */ 747 if (palive->is_valid == UCODE_VALID_OK) 748 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); 749 else 750 IL_WARN("uCode did not respond OK.\n"); 751 } 752 753 static void 754 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) 755 { 756 #ifdef CONFIG_IWLEGACY_DEBUG 757 struct il_rx_pkt *pkt = rxb_addr(rxb); 758 #endif 759 760 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); 761 } 762 763 static void 764 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) 765 { 766 struct il_rx_pkt *pkt = rxb_addr(rxb); 767 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); 768 #ifdef CONFIG_IWLEGACY_DEBUG 769 u8 rate = beacon->beacon_notify_hdr.rate; 770 771 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", 772 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, 773 beacon->beacon_notify_hdr.failure_frame, 774 le32_to_cpu(beacon->ibss_mgr_status), 775 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); 776 #endif 777 778 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 779 780 } 781 782 /* Handle notification from uCode that card's power state is changing 783 * due to software, hardware, or critical temperature RFKILL */ 784 static void 785 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) 786 { 787 struct il_rx_pkt *pkt = rxb_addr(rxb); 788 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 789 unsigned long status = il->status; 790 791 IL_WARN("Card state received: HW:%s SW:%s\n", 792 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 793 (flags & SW_CARD_DISABLED) ? "Kill" : "On"); 794 795 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 796 797 if (flags & HW_CARD_DISABLED) 798 set_bit(S_RFKILL, &il->status); 799 else 800 clear_bit(S_RFKILL, &il->status); 801 802 il_scan_cancel(il); 803 804 if ((test_bit(S_RFKILL, &status) != 805 test_bit(S_RFKILL, &il->status))) 806 wiphy_rfkill_set_hw_state(il->hw->wiphy, 807 test_bit(S_RFKILL, &il->status)); 808 else 809 wake_up(&il->wait_command_queue); 810 } 811 812 /** 813 * il3945_setup_handlers - Initialize Rx handler callbacks 814 * 815 * Setup the RX handlers for each of the reply types sent from the uCode 816 * to the host. 817 * 818 * This function chains into the hardware specific files for them to setup 819 * any hardware specific handlers as well. 820 */ 821 static void 822 il3945_setup_handlers(struct il_priv *il) 823 { 824 il->handlers[N_ALIVE] = il3945_hdl_alive; 825 il->handlers[C_ADD_STA] = il3945_hdl_add_sta; 826 il->handlers[N_ERROR] = il_hdl_error; 827 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; 828 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; 829 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; 830 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; 831 il->handlers[N_BEACON] = il3945_hdl_beacon; 832 833 /* 834 * The same handler is used for both the REPLY to a discrete 835 * stats request from the host as well as for the periodic 836 * stats notifications (after received beacons) from the uCode. 837 */ 838 il->handlers[C_STATS] = il3945_hdl_c_stats; 839 il->handlers[N_STATS] = il3945_hdl_stats; 840 841 il_setup_rx_scan_handlers(il); 842 il->handlers[N_CARD_STATE] = il3945_hdl_card_state; 843 844 /* Set up hardware specific Rx handlers */ 845 il3945_hw_handler_setup(il); 846 } 847 848 /************************** RX-FUNCTIONS ****************************/ 849 /* 850 * Rx theory of operation 851 * 852 * The host allocates 32 DMA target addresses and passes the host address 853 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is 854 * 0 to 31 855 * 856 * Rx Queue Indexes 857 * The host/firmware share two idx registers for managing the Rx buffers. 858 * 859 * The READ idx maps to the first position that the firmware may be writing 860 * to -- the driver can read up to (but not including) this position and get 861 * good data. 862 * The READ idx is managed by the firmware once the card is enabled. 863 * 864 * The WRITE idx maps to the last position the driver has read from -- the 865 * position preceding WRITE is the last slot the firmware can place a packet. 866 * 867 * The queue is empty (no good data) if WRITE = READ - 1, and is full if 868 * WRITE = READ. 869 * 870 * During initialization, the host sets up the READ queue position to the first 871 * IDX position, and WRITE to the last (READ - 1 wrapped) 872 * 873 * When the firmware places a packet in a buffer, it will advance the READ idx 874 * and fire the RX interrupt. The driver can then query the READ idx and 875 * process as many packets as possible, moving the WRITE idx forward as it 876 * resets the Rx queue buffers with new memory. 877 * 878 * The management in the driver is as follows: 879 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When 880 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled 881 * to replenish the iwl->rxq->rx_free. 882 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the 883 * iwl->rxq is replenished and the READ IDX is updated (updating the 884 * 'processed' and 'read' driver idxes as well) 885 * + A received packet is processed and handed to the kernel network stack, 886 * detached from the iwl->rxq. The driver 'processed' idx is updated. 887 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free 888 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ 889 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there 890 * were enough free buffers and RX_STALLED is set it is cleared. 891 * 892 * 893 * Driver sequence: 894 * 895 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls 896 * il3945_rx_queue_restock 897 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx 898 * queue, updates firmware pointers, and updates 899 * the WRITE idx. If insufficient rx_free buffers 900 * are available, schedules il3945_rx_replenish 901 * 902 * -- enable interrupts -- 903 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the 904 * READ IDX, detaching the SKB from the pool. 905 * Moves the packet buffer from queue to rx_used. 906 * Calls il3945_rx_queue_restock to refill any empty 907 * slots. 908 * ... 909 * 910 */ 911 912 /** 913 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr 914 */ 915 static inline __le32 916 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) 917 { 918 return cpu_to_le32((u32) dma_addr); 919 } 920 921 /** 922 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool 923 * 924 * If there are slots in the RX queue that need to be restocked, 925 * and we have free pre-allocated buffers, fill the ranks as much 926 * as we can, pulling from rx_free. 927 * 928 * This moves the 'write' idx forward to catch up with 'processed', and 929 * also updates the memory address in the firmware to reference the new 930 * target buffer. 931 */ 932 static void 933 il3945_rx_queue_restock(struct il_priv *il) 934 { 935 struct il_rx_queue *rxq = &il->rxq; 936 struct list_head *element; 937 struct il_rx_buf *rxb; 938 unsigned long flags; 939 940 spin_lock_irqsave(&rxq->lock, flags); 941 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) { 942 /* Get next free Rx buffer, remove from free list */ 943 element = rxq->rx_free.next; 944 rxb = list_entry(element, struct il_rx_buf, list); 945 list_del(element); 946 947 /* Point to Rx buffer via next RBD in circular buffer */ 948 rxq->bd[rxq->write] = 949 il3945_dma_addr2rbd_ptr(il, rxb->page_dma); 950 rxq->queue[rxq->write] = rxb; 951 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 952 rxq->free_count--; 953 } 954 spin_unlock_irqrestore(&rxq->lock, flags); 955 /* If the pre-allocated buffer pool is dropping low, schedule to 956 * refill it */ 957 if (rxq->free_count <= RX_LOW_WATERMARK) 958 queue_work(il->workqueue, &il->rx_replenish); 959 960 /* If we've added more space for the firmware to place data, tell it. 961 * Increment device's write pointer in multiples of 8. */ 962 if (rxq->write_actual != (rxq->write & ~0x7) || 963 abs(rxq->write - rxq->read) > 7) { 964 spin_lock_irqsave(&rxq->lock, flags); 965 rxq->need_update = 1; 966 spin_unlock_irqrestore(&rxq->lock, flags); 967 il_rx_queue_update_write_ptr(il, rxq); 968 } 969 } 970 971 /** 972 * il3945_rx_replenish - Move all used packet from rx_used to rx_free 973 * 974 * When moving to rx_free an SKB is allocated for the slot. 975 * 976 * Also restock the Rx queue via il3945_rx_queue_restock. 977 * This is called as a scheduled work item (except for during initialization) 978 */ 979 static void 980 il3945_rx_allocate(struct il_priv *il, gfp_t priority) 981 { 982 struct il_rx_queue *rxq = &il->rxq; 983 struct list_head *element; 984 struct il_rx_buf *rxb; 985 struct page *page; 986 dma_addr_t page_dma; 987 unsigned long flags; 988 gfp_t gfp_mask = priority; 989 990 while (1) { 991 spin_lock_irqsave(&rxq->lock, flags); 992 if (list_empty(&rxq->rx_used)) { 993 spin_unlock_irqrestore(&rxq->lock, flags); 994 return; 995 } 996 spin_unlock_irqrestore(&rxq->lock, flags); 997 998 if (rxq->free_count > RX_LOW_WATERMARK) 999 gfp_mask |= __GFP_NOWARN; 1000 1001 if (il->hw_params.rx_page_order > 0) 1002 gfp_mask |= __GFP_COMP; 1003 1004 /* Alloc a new receive buffer */ 1005 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); 1006 if (!page) { 1007 if (net_ratelimit()) 1008 D_INFO("Failed to allocate SKB buffer.\n"); 1009 if (rxq->free_count <= RX_LOW_WATERMARK && 1010 net_ratelimit()) 1011 IL_ERR("Failed to allocate SKB buffer with %0x." 1012 "Only %u free buffers remaining.\n", 1013 priority, rxq->free_count); 1014 /* We don't reschedule replenish work here -- we will 1015 * call the restock method and if it still needs 1016 * more buffers it will schedule replenish */ 1017 break; 1018 } 1019 1020 /* Get physical address of RB/SKB */ 1021 page_dma = 1022 pci_map_page(il->pci_dev, page, 0, 1023 PAGE_SIZE << il->hw_params.rx_page_order, 1024 PCI_DMA_FROMDEVICE); 1025 1026 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) { 1027 __free_pages(page, il->hw_params.rx_page_order); 1028 break; 1029 } 1030 1031 spin_lock_irqsave(&rxq->lock, flags); 1032 1033 if (list_empty(&rxq->rx_used)) { 1034 spin_unlock_irqrestore(&rxq->lock, flags); 1035 pci_unmap_page(il->pci_dev, page_dma, 1036 PAGE_SIZE << il->hw_params.rx_page_order, 1037 PCI_DMA_FROMDEVICE); 1038 __free_pages(page, il->hw_params.rx_page_order); 1039 return; 1040 } 1041 1042 element = rxq->rx_used.next; 1043 rxb = list_entry(element, struct il_rx_buf, list); 1044 list_del(element); 1045 1046 rxb->page = page; 1047 rxb->page_dma = page_dma; 1048 list_add_tail(&rxb->list, &rxq->rx_free); 1049 rxq->free_count++; 1050 il->alloc_rxb_page++; 1051 1052 spin_unlock_irqrestore(&rxq->lock, flags); 1053 } 1054 } 1055 1056 void 1057 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) 1058 { 1059 unsigned long flags; 1060 int i; 1061 spin_lock_irqsave(&rxq->lock, flags); 1062 INIT_LIST_HEAD(&rxq->rx_free); 1063 INIT_LIST_HEAD(&rxq->rx_used); 1064 /* Fill the rx_used queue with _all_ of the Rx buffers */ 1065 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 1066 /* In the reset function, these buffers may have been allocated 1067 * to an SKB, so we need to unmap and free potential storage */ 1068 if (rxq->pool[i].page != NULL) { 1069 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 1070 PAGE_SIZE << il->hw_params.rx_page_order, 1071 PCI_DMA_FROMDEVICE); 1072 __il_free_pages(il, rxq->pool[i].page); 1073 rxq->pool[i].page = NULL; 1074 } 1075 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 1076 } 1077 1078 /* Set us so that we have processed and used all buffers, but have 1079 * not restocked the Rx queue with fresh buffers */ 1080 rxq->read = rxq->write = 0; 1081 rxq->write_actual = 0; 1082 rxq->free_count = 0; 1083 spin_unlock_irqrestore(&rxq->lock, flags); 1084 } 1085 1086 void 1087 il3945_rx_replenish(void *data) 1088 { 1089 struct il_priv *il = data; 1090 unsigned long flags; 1091 1092 il3945_rx_allocate(il, GFP_KERNEL); 1093 1094 spin_lock_irqsave(&il->lock, flags); 1095 il3945_rx_queue_restock(il); 1096 spin_unlock_irqrestore(&il->lock, flags); 1097 } 1098 1099 static void 1100 il3945_rx_replenish_now(struct il_priv *il) 1101 { 1102 il3945_rx_allocate(il, GFP_ATOMIC); 1103 1104 il3945_rx_queue_restock(il); 1105 } 1106 1107 /* Assumes that the skb field of the buffers in 'pool' is kept accurate. 1108 * If an SKB has been detached, the POOL needs to have its SKB set to NULL 1109 * This free routine walks the list of POOL entries and if SKB is set to 1110 * non NULL it is unmapped and freed 1111 */ 1112 static void 1113 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) 1114 { 1115 int i; 1116 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 1117 if (rxq->pool[i].page != NULL) { 1118 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 1119 PAGE_SIZE << il->hw_params.rx_page_order, 1120 PCI_DMA_FROMDEVICE); 1121 __il_free_pages(il, rxq->pool[i].page); 1122 rxq->pool[i].page = NULL; 1123 } 1124 } 1125 1126 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, 1127 rxq->bd_dma); 1128 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), 1129 rxq->rb_stts, rxq->rb_stts_dma); 1130 rxq->bd = NULL; 1131 rxq->rb_stts = NULL; 1132 } 1133 1134 /* Convert linear signal-to-noise ratio into dB */ 1135 static u8 ratio2dB[100] = { 1136 /* 0 1 2 3 4 5 6 7 8 9 */ 1137 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ 1138 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ 1139 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ 1140 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ 1141 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ 1142 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ 1143 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ 1144 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ 1145 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ 1146 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ 1147 }; 1148 1149 /* Calculates a relative dB value from a ratio of linear 1150 * (i.e. not dB) signal levels. 1151 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ 1152 int 1153 il3945_calc_db_from_ratio(int sig_ratio) 1154 { 1155 /* 1000:1 or higher just report as 60 dB */ 1156 if (sig_ratio >= 1000) 1157 return 60; 1158 1159 /* 100:1 or higher, divide by 10 and use table, 1160 * add 20 dB to make up for divide by 10 */ 1161 if (sig_ratio >= 100) 1162 return 20 + (int)ratio2dB[sig_ratio / 10]; 1163 1164 /* We shouldn't see this */ 1165 if (sig_ratio < 1) 1166 return 0; 1167 1168 /* Use table for ratios 1:1 - 99:1 */ 1169 return (int)ratio2dB[sig_ratio]; 1170 } 1171 1172 /** 1173 * il3945_rx_handle - Main entry function for receiving responses from uCode 1174 * 1175 * Uses the il->handlers callback function array to invoke 1176 * the appropriate handlers, including command responses, 1177 * frame-received notifications, and other notifications. 1178 */ 1179 static void 1180 il3945_rx_handle(struct il_priv *il) 1181 { 1182 struct il_rx_buf *rxb; 1183 struct il_rx_pkt *pkt; 1184 struct il_rx_queue *rxq = &il->rxq; 1185 u32 r, i; 1186 int reclaim; 1187 unsigned long flags; 1188 u8 fill_rx = 0; 1189 u32 count = 8; 1190 int total_empty = 0; 1191 1192 /* uCode's read idx (stored in shared DRAM) indicates the last Rx 1193 * buffer that the driver may process (last buffer filled by ucode). */ 1194 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; 1195 i = rxq->read; 1196 1197 /* calculate total frames need to be restock after handling RX */ 1198 total_empty = r - rxq->write_actual; 1199 if (total_empty < 0) 1200 total_empty += RX_QUEUE_SIZE; 1201 1202 if (total_empty > (RX_QUEUE_SIZE / 2)) 1203 fill_rx = 1; 1204 /* Rx interrupt, but nothing sent from uCode */ 1205 if (i == r) 1206 D_RX("r = %d, i = %d\n", r, i); 1207 1208 while (i != r) { 1209 int len; 1210 1211 rxb = rxq->queue[i]; 1212 1213 /* If an RXB doesn't have a Rx queue slot associated with it, 1214 * then a bug has been introduced in the queue refilling 1215 * routines -- catch it here */ 1216 BUG_ON(rxb == NULL); 1217 1218 rxq->queue[i] = NULL; 1219 1220 pci_unmap_page(il->pci_dev, rxb->page_dma, 1221 PAGE_SIZE << il->hw_params.rx_page_order, 1222 PCI_DMA_FROMDEVICE); 1223 pkt = rxb_addr(rxb); 1224 1225 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; 1226 len += sizeof(u32); /* account for status word */ 1227 1228 reclaim = il_need_reclaim(il, pkt); 1229 1230 /* Based on type of command response or notification, 1231 * handle those that need handling via function in 1232 * handlers table. See il3945_setup_handlers() */ 1233 if (il->handlers[pkt->hdr.cmd]) { 1234 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, 1235 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1236 il->isr_stats.handlers[pkt->hdr.cmd]++; 1237 il->handlers[pkt->hdr.cmd] (il, rxb); 1238 } else { 1239 /* No handling needed */ 1240 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, 1241 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1242 } 1243 1244 /* 1245 * XXX: After here, we should always check rxb->page 1246 * against NULL before touching it or its virtual 1247 * memory (pkt). Because some handler might have 1248 * already taken or freed the pages. 1249 */ 1250 1251 if (reclaim) { 1252 /* Invoke any callbacks, transfer the buffer to caller, 1253 * and fire off the (possibly) blocking il_send_cmd() 1254 * as we reclaim the driver command queue */ 1255 if (rxb->page) 1256 il_tx_cmd_complete(il, rxb); 1257 else 1258 IL_WARN("Claim null rxb?\n"); 1259 } 1260 1261 /* Reuse the page if possible. For notification packets and 1262 * SKBs that fail to Rx correctly, add them back into the 1263 * rx_free list for reuse later. */ 1264 spin_lock_irqsave(&rxq->lock, flags); 1265 if (rxb->page != NULL) { 1266 rxb->page_dma = 1267 pci_map_page(il->pci_dev, rxb->page, 0, 1268 PAGE_SIZE << il->hw_params. 1269 rx_page_order, PCI_DMA_FROMDEVICE); 1270 if (unlikely(pci_dma_mapping_error(il->pci_dev, 1271 rxb->page_dma))) { 1272 __il_free_pages(il, rxb->page); 1273 rxb->page = NULL; 1274 list_add_tail(&rxb->list, &rxq->rx_used); 1275 } else { 1276 list_add_tail(&rxb->list, &rxq->rx_free); 1277 rxq->free_count++; 1278 } 1279 } else 1280 list_add_tail(&rxb->list, &rxq->rx_used); 1281 1282 spin_unlock_irqrestore(&rxq->lock, flags); 1283 1284 i = (i + 1) & RX_QUEUE_MASK; 1285 /* If there are a lot of unused frames, 1286 * restock the Rx queue so ucode won't assert. */ 1287 if (fill_rx) { 1288 count++; 1289 if (count >= 8) { 1290 rxq->read = i; 1291 il3945_rx_replenish_now(il); 1292 count = 0; 1293 } 1294 } 1295 } 1296 1297 /* Backtrack one entry */ 1298 rxq->read = i; 1299 if (fill_rx) 1300 il3945_rx_replenish_now(il); 1301 else 1302 il3945_rx_queue_restock(il); 1303 } 1304 1305 /* call this function to flush any scheduled tasklet */ 1306 static inline void 1307 il3945_synchronize_irq(struct il_priv *il) 1308 { 1309 /* wait to make sure we flush pending tasklet */ 1310 synchronize_irq(il->pci_dev->irq); 1311 tasklet_kill(&il->irq_tasklet); 1312 } 1313 1314 static const char * 1315 il3945_desc_lookup(int i) 1316 { 1317 switch (i) { 1318 case 1: 1319 return "FAIL"; 1320 case 2: 1321 return "BAD_PARAM"; 1322 case 3: 1323 return "BAD_CHECKSUM"; 1324 case 4: 1325 return "NMI_INTERRUPT"; 1326 case 5: 1327 return "SYSASSERT"; 1328 case 6: 1329 return "FATAL_ERROR"; 1330 } 1331 1332 return "UNKNOWN"; 1333 } 1334 1335 #define ERROR_START_OFFSET (1 * sizeof(u32)) 1336 #define ERROR_ELEM_SIZE (7 * sizeof(u32)) 1337 1338 void 1339 il3945_dump_nic_error_log(struct il_priv *il) 1340 { 1341 u32 i; 1342 u32 desc, time, count, base, data1; 1343 u32 blink1, blink2, ilink1, ilink2; 1344 1345 base = le32_to_cpu(il->card_alive.error_event_table_ptr); 1346 1347 if (!il3945_hw_valid_rtc_data_addr(base)) { 1348 IL_ERR("Not valid error log pointer 0x%08X\n", base); 1349 return; 1350 } 1351 1352 count = il_read_targ_mem(il, base); 1353 1354 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1355 IL_ERR("Start IWL Error Log Dump:\n"); 1356 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); 1357 } 1358 1359 IL_ERR("Desc Time asrtPC blink2 " 1360 "ilink1 nmiPC Line\n"); 1361 for (i = ERROR_START_OFFSET; 1362 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; 1363 i += ERROR_ELEM_SIZE) { 1364 desc = il_read_targ_mem(il, base + i); 1365 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); 1366 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); 1367 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); 1368 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); 1369 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); 1370 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); 1371 1372 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", 1373 il3945_desc_lookup(desc), desc, time, blink1, blink2, 1374 ilink1, ilink2, data1); 1375 } 1376 } 1377 1378 static void 1379 il3945_irq_tasklet(struct il_priv *il) 1380 { 1381 u32 inta, handled = 0; 1382 u32 inta_fh; 1383 unsigned long flags; 1384 #ifdef CONFIG_IWLEGACY_DEBUG 1385 u32 inta_mask; 1386 #endif 1387 1388 spin_lock_irqsave(&il->lock, flags); 1389 1390 /* Ack/clear/reset pending uCode interrupts. 1391 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1392 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 1393 inta = _il_rd(il, CSR_INT); 1394 _il_wr(il, CSR_INT, inta); 1395 1396 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 1397 * Any new interrupts that happen after this, either while we're 1398 * in this tasklet, or later, will show up in next ISR/tasklet. */ 1399 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1400 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); 1401 1402 #ifdef CONFIG_IWLEGACY_DEBUG 1403 if (il_get_debug_level(il) & IL_DL_ISR) { 1404 /* just for debug */ 1405 inta_mask = _il_rd(il, CSR_INT_MASK); 1406 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, 1407 inta_mask, inta_fh); 1408 } 1409 #endif 1410 1411 spin_unlock_irqrestore(&il->lock, flags); 1412 1413 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1414 * atomic, make sure that inta covers all the interrupts that 1415 * we've discovered, even if FH interrupt came in just after 1416 * reading CSR_INT. */ 1417 if (inta_fh & CSR39_FH_INT_RX_MASK) 1418 inta |= CSR_INT_BIT_FH_RX; 1419 if (inta_fh & CSR39_FH_INT_TX_MASK) 1420 inta |= CSR_INT_BIT_FH_TX; 1421 1422 /* Now service all interrupt bits discovered above. */ 1423 if (inta & CSR_INT_BIT_HW_ERR) { 1424 IL_ERR("Hardware error detected. Restarting.\n"); 1425 1426 /* Tell the device to stop sending interrupts */ 1427 il_disable_interrupts(il); 1428 1429 il->isr_stats.hw++; 1430 il_irq_handle_error(il); 1431 1432 handled |= CSR_INT_BIT_HW_ERR; 1433 1434 return; 1435 } 1436 #ifdef CONFIG_IWLEGACY_DEBUG 1437 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1438 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1439 if (inta & CSR_INT_BIT_SCD) { 1440 D_ISR("Scheduler finished to transmit " 1441 "the frame/frames.\n"); 1442 il->isr_stats.sch++; 1443 } 1444 1445 /* Alive notification via Rx interrupt will do the real work */ 1446 if (inta & CSR_INT_BIT_ALIVE) { 1447 D_ISR("Alive interrupt\n"); 1448 il->isr_stats.alive++; 1449 } 1450 } 1451 #endif 1452 /* Safely ignore these bits for debug checks below */ 1453 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); 1454 1455 /* Error detected by uCode */ 1456 if (inta & CSR_INT_BIT_SW_ERR) { 1457 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n", 1458 inta); 1459 il->isr_stats.sw++; 1460 il_irq_handle_error(il); 1461 handled |= CSR_INT_BIT_SW_ERR; 1462 } 1463 1464 /* uCode wakes up after power-down sleep */ 1465 if (inta & CSR_INT_BIT_WAKEUP) { 1466 D_ISR("Wakeup interrupt\n"); 1467 il_rx_queue_update_write_ptr(il, &il->rxq); 1468 1469 spin_lock_irqsave(&il->lock, flags); 1470 il_txq_update_write_ptr(il, &il->txq[0]); 1471 il_txq_update_write_ptr(il, &il->txq[1]); 1472 il_txq_update_write_ptr(il, &il->txq[2]); 1473 il_txq_update_write_ptr(il, &il->txq[3]); 1474 il_txq_update_write_ptr(il, &il->txq[4]); 1475 spin_unlock_irqrestore(&il->lock, flags); 1476 1477 il->isr_stats.wakeup++; 1478 handled |= CSR_INT_BIT_WAKEUP; 1479 } 1480 1481 /* All uCode command responses, including Tx command responses, 1482 * Rx "responses" (frame-received notification), and other 1483 * notifications from uCode come through here*/ 1484 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1485 il3945_rx_handle(il); 1486 il->isr_stats.rx++; 1487 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1488 } 1489 1490 if (inta & CSR_INT_BIT_FH_TX) { 1491 D_ISR("Tx interrupt\n"); 1492 il->isr_stats.tx++; 1493 1494 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); 1495 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); 1496 handled |= CSR_INT_BIT_FH_TX; 1497 } 1498 1499 if (inta & ~handled) { 1500 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled); 1501 il->isr_stats.unhandled++; 1502 } 1503 1504 if (inta & ~il->inta_mask) { 1505 IL_WARN("Disabled INTA bits 0x%08x were pending\n", 1506 inta & ~il->inta_mask); 1507 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); 1508 } 1509 1510 /* Re-enable all interrupts */ 1511 /* only Re-enable if disabled by irq */ 1512 if (test_bit(S_INT_ENABLED, &il->status)) 1513 il_enable_interrupts(il); 1514 1515 #ifdef CONFIG_IWLEGACY_DEBUG 1516 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1517 inta = _il_rd(il, CSR_INT); 1518 inta_mask = _il_rd(il, CSR_INT_MASK); 1519 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1520 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 1521 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1522 } 1523 #endif 1524 } 1525 1526 static int 1527 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band, 1528 u8 is_active, u8 n_probes, 1529 struct il3945_scan_channel *scan_ch, 1530 struct ieee80211_vif *vif) 1531 { 1532 struct ieee80211_channel *chan; 1533 const struct ieee80211_supported_band *sband; 1534 const struct il_channel_info *ch_info; 1535 u16 passive_dwell = 0; 1536 u16 active_dwell = 0; 1537 int added, i; 1538 1539 sband = il_get_hw_mode(il, band); 1540 if (!sband) 1541 return 0; 1542 1543 active_dwell = il_get_active_dwell_time(il, band, n_probes); 1544 passive_dwell = il_get_passive_dwell_time(il, band, vif); 1545 1546 if (passive_dwell <= active_dwell) 1547 passive_dwell = active_dwell + 1; 1548 1549 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { 1550 chan = il->scan_request->channels[i]; 1551 1552 if (chan->band != band) 1553 continue; 1554 1555 scan_ch->channel = chan->hw_value; 1556 1557 ch_info = il_get_channel_info(il, band, scan_ch->channel); 1558 if (!il_is_channel_valid(ch_info)) { 1559 D_SCAN("Channel %d is INVALID for this band.\n", 1560 scan_ch->channel); 1561 continue; 1562 } 1563 1564 scan_ch->active_dwell = cpu_to_le16(active_dwell); 1565 scan_ch->passive_dwell = cpu_to_le16(passive_dwell); 1566 /* If passive , set up for auto-switch 1567 * and use long active_dwell time. 1568 */ 1569 if (!is_active || il_is_channel_passive(ch_info) || 1570 (chan->flags & IEEE80211_CHAN_NO_IR)) { 1571 scan_ch->type = 0; /* passive */ 1572 if (IL_UCODE_API(il->ucode_ver) == 1) 1573 scan_ch->active_dwell = 1574 cpu_to_le16(passive_dwell - 1); 1575 } else { 1576 scan_ch->type = 1; /* active */ 1577 } 1578 1579 /* Set direct probe bits. These may be used both for active 1580 * scan channels (probes gets sent right away), 1581 * or for passive channels (probes get se sent only after 1582 * hearing clear Rx packet).*/ 1583 if (IL_UCODE_API(il->ucode_ver) >= 2) { 1584 if (n_probes) 1585 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1586 } else { 1587 /* uCode v1 does not allow setting direct probe bits on 1588 * passive channel. */ 1589 if ((scan_ch->type & 1) && n_probes) 1590 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1591 } 1592 1593 /* Set txpower levels to defaults */ 1594 scan_ch->tpc.dsp_atten = 110; 1595 /* scan_pwr_info->tpc.dsp_atten; */ 1596 1597 /*scan_pwr_info->tpc.tx_gain; */ 1598 if (band == NL80211_BAND_5GHZ) 1599 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; 1600 else { 1601 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); 1602 /* NOTE: if we were doing 6Mb OFDM for scans we'd use 1603 * power level: 1604 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; 1605 */ 1606 } 1607 1608 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel, 1609 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", 1610 (scan_ch->type & 1) ? active_dwell : passive_dwell); 1611 1612 scan_ch++; 1613 added++; 1614 } 1615 1616 D_SCAN("total channels to scan %d\n", added); 1617 return added; 1618 } 1619 1620 static void 1621 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) 1622 { 1623 int i; 1624 1625 for (i = 0; i < RATE_COUNT_LEGACY; i++) { 1626 rates[i].bitrate = il3945_rates[i].ieee * 5; 1627 rates[i].hw_value = i; /* Rate scaling will work on idxes */ 1628 rates[i].hw_value_short = i; 1629 rates[i].flags = 0; 1630 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { 1631 /* 1632 * If CCK != 1M then set short preamble rate flag. 1633 */ 1634 rates[i].flags |= 1635 (il3945_rates[i].plcp == 1636 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; 1637 } 1638 } 1639 } 1640 1641 /****************************************************************************** 1642 * 1643 * uCode download functions 1644 * 1645 ******************************************************************************/ 1646 1647 static void 1648 il3945_dealloc_ucode_pci(struct il_priv *il) 1649 { 1650 il_free_fw_desc(il->pci_dev, &il->ucode_code); 1651 il_free_fw_desc(il->pci_dev, &il->ucode_data); 1652 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); 1653 il_free_fw_desc(il->pci_dev, &il->ucode_init); 1654 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); 1655 il_free_fw_desc(il->pci_dev, &il->ucode_boot); 1656 } 1657 1658 /** 1659 * il3945_verify_inst_full - verify runtime uCode image in card vs. host, 1660 * looking at all data. 1661 */ 1662 static int 1663 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) 1664 { 1665 u32 val; 1666 u32 save_len = len; 1667 int rc = 0; 1668 u32 errcnt; 1669 1670 D_INFO("ucode inst image size is %u\n", len); 1671 1672 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); 1673 1674 errcnt = 0; 1675 for (; len > 0; len -= sizeof(u32), image++) { 1676 /* read data comes through single port, auto-incr addr */ 1677 /* NOTE: Use the debugless read so we don't flood kernel log 1678 * if IL_DL_IO is set */ 1679 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1680 if (val != le32_to_cpu(*image)) { 1681 IL_ERR("uCode INST section is invalid at " 1682 "offset 0x%x, is 0x%x, s/b 0x%x\n", 1683 save_len - len, val, le32_to_cpu(*image)); 1684 rc = -EIO; 1685 errcnt++; 1686 if (errcnt >= 20) 1687 break; 1688 } 1689 } 1690 1691 if (!errcnt) 1692 D_INFO("ucode image in INSTRUCTION memory is good\n"); 1693 1694 return rc; 1695 } 1696 1697 /** 1698 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, 1699 * using sample data 100 bytes apart. If these sample points are good, 1700 * it's a pretty good bet that everything between them is good, too. 1701 */ 1702 static int 1703 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) 1704 { 1705 u32 val; 1706 int rc = 0; 1707 u32 errcnt = 0; 1708 u32 i; 1709 1710 D_INFO("ucode inst image size is %u\n", len); 1711 1712 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { 1713 /* read data comes through single port, auto-incr addr */ 1714 /* NOTE: Use the debugless read so we don't flood kernel log 1715 * if IL_DL_IO is set */ 1716 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); 1717 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1718 if (val != le32_to_cpu(*image)) { 1719 #if 0 /* Enable this if you want to see details */ 1720 IL_ERR("uCode INST section is invalid at " 1721 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val, 1722 *image); 1723 #endif 1724 rc = -EIO; 1725 errcnt++; 1726 if (errcnt >= 3) 1727 break; 1728 } 1729 } 1730 1731 return rc; 1732 } 1733 1734 /** 1735 * il3945_verify_ucode - determine which instruction image is in SRAM, 1736 * and verify its contents 1737 */ 1738 static int 1739 il3945_verify_ucode(struct il_priv *il) 1740 { 1741 __le32 *image; 1742 u32 len; 1743 int rc = 0; 1744 1745 /* Try bootstrap */ 1746 image = (__le32 *) il->ucode_boot.v_addr; 1747 len = il->ucode_boot.len; 1748 rc = il3945_verify_inst_sparse(il, image, len); 1749 if (rc == 0) { 1750 D_INFO("Bootstrap uCode is good in inst SRAM\n"); 1751 return 0; 1752 } 1753 1754 /* Try initialize */ 1755 image = (__le32 *) il->ucode_init.v_addr; 1756 len = il->ucode_init.len; 1757 rc = il3945_verify_inst_sparse(il, image, len); 1758 if (rc == 0) { 1759 D_INFO("Initialize uCode is good in inst SRAM\n"); 1760 return 0; 1761 } 1762 1763 /* Try runtime/protocol */ 1764 image = (__le32 *) il->ucode_code.v_addr; 1765 len = il->ucode_code.len; 1766 rc = il3945_verify_inst_sparse(il, image, len); 1767 if (rc == 0) { 1768 D_INFO("Runtime uCode is good in inst SRAM\n"); 1769 return 0; 1770 } 1771 1772 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); 1773 1774 /* Since nothing seems to match, show first several data entries in 1775 * instruction SRAM, so maybe visual inspection will give a clue. 1776 * Selection of bootstrap image (vs. other images) is arbitrary. */ 1777 image = (__le32 *) il->ucode_boot.v_addr; 1778 len = il->ucode_boot.len; 1779 rc = il3945_verify_inst_full(il, image, len); 1780 1781 return rc; 1782 } 1783 1784 static void 1785 il3945_nic_start(struct il_priv *il) 1786 { 1787 /* Remove all resets to allow NIC to operate */ 1788 _il_wr(il, CSR_RESET, 0); 1789 } 1790 1791 #define IL3945_UCODE_GET(item) \ 1792 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\ 1793 { \ 1794 return le32_to_cpu(ucode->v1.item); \ 1795 } 1796 1797 static u32 1798 il3945_ucode_get_header_size(u32 api_ver) 1799 { 1800 return 24; 1801 } 1802 1803 static u8 * 1804 il3945_ucode_get_data(const struct il_ucode_header *ucode) 1805 { 1806 return (u8 *) ucode->v1.data; 1807 } 1808 1809 IL3945_UCODE_GET(inst_size); 1810 IL3945_UCODE_GET(data_size); 1811 IL3945_UCODE_GET(init_size); 1812 IL3945_UCODE_GET(init_data_size); 1813 IL3945_UCODE_GET(boot_size); 1814 1815 /** 1816 * il3945_read_ucode - Read uCode images from disk file. 1817 * 1818 * Copy into buffers for card to fetch via bus-mastering 1819 */ 1820 static int 1821 il3945_read_ucode(struct il_priv *il) 1822 { 1823 const struct il_ucode_header *ucode; 1824 int ret = -EINVAL, idx; 1825 const struct firmware *ucode_raw; 1826 /* firmware file name contains uCode/driver compatibility version */ 1827 const char *name_pre = il->cfg->fw_name_pre; 1828 const unsigned int api_max = il->cfg->ucode_api_max; 1829 const unsigned int api_min = il->cfg->ucode_api_min; 1830 char buf[25]; 1831 u8 *src; 1832 size_t len; 1833 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; 1834 1835 /* Ask kernel firmware_class module to get the boot firmware off disk. 1836 * request_firmware() is synchronous, file is in memory on return. */ 1837 for (idx = api_max; idx >= api_min; idx--) { 1838 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); 1839 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); 1840 if (ret < 0) { 1841 IL_ERR("%s firmware file req failed: %d\n", buf, ret); 1842 if (ret == -ENOENT) 1843 continue; 1844 else 1845 goto error; 1846 } else { 1847 if (idx < api_max) 1848 IL_ERR("Loaded firmware %s, " 1849 "which is deprecated. " 1850 " Please use API v%u instead.\n", buf, 1851 api_max); 1852 D_INFO("Got firmware '%s' file " 1853 "(%zd bytes) from disk\n", buf, ucode_raw->size); 1854 break; 1855 } 1856 } 1857 1858 if (ret < 0) 1859 goto error; 1860 1861 /* Make sure that we got at least our header! */ 1862 if (ucode_raw->size < il3945_ucode_get_header_size(1)) { 1863 IL_ERR("File size way too small!\n"); 1864 ret = -EINVAL; 1865 goto err_release; 1866 } 1867 1868 /* Data from ucode file: header followed by uCode images */ 1869 ucode = (struct il_ucode_header *)ucode_raw->data; 1870 1871 il->ucode_ver = le32_to_cpu(ucode->ver); 1872 api_ver = IL_UCODE_API(il->ucode_ver); 1873 inst_size = il3945_ucode_get_inst_size(ucode); 1874 data_size = il3945_ucode_get_data_size(ucode); 1875 init_size = il3945_ucode_get_init_size(ucode); 1876 init_data_size = il3945_ucode_get_init_data_size(ucode); 1877 boot_size = il3945_ucode_get_boot_size(ucode); 1878 src = il3945_ucode_get_data(ucode); 1879 1880 /* api_ver should match the api version forming part of the 1881 * firmware filename ... but we don't check for that and only rely 1882 * on the API version read from firmware header from here on forward */ 1883 1884 if (api_ver < api_min || api_ver > api_max) { 1885 IL_ERR("Driver unable to support your firmware API. " 1886 "Driver supports v%u, firmware is v%u.\n", api_max, 1887 api_ver); 1888 il->ucode_ver = 0; 1889 ret = -EINVAL; 1890 goto err_release; 1891 } 1892 if (api_ver != api_max) 1893 IL_ERR("Firmware has old API version. Expected %u, " 1894 "got %u. New firmware can be obtained " 1895 "from http://www.intellinuxwireless.org.\n", api_max, 1896 api_ver); 1897 1898 IL_INFO("loaded firmware version %u.%u.%u.%u\n", 1899 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), 1900 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); 1901 1902 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), 1903 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), 1904 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), 1905 IL_UCODE_SERIAL(il->ucode_ver)); 1906 1907 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); 1908 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size); 1909 D_INFO("f/w package hdr runtime data size = %u\n", data_size); 1910 D_INFO("f/w package hdr init inst size = %u\n", init_size); 1911 D_INFO("f/w package hdr init data size = %u\n", init_data_size); 1912 D_INFO("f/w package hdr boot inst size = %u\n", boot_size); 1913 1914 /* Verify size of file vs. image size info in file's header */ 1915 if (ucode_raw->size != 1916 il3945_ucode_get_header_size(api_ver) + inst_size + data_size + 1917 init_size + init_data_size + boot_size) { 1918 1919 D_INFO("uCode file size %zd does not match expected size\n", 1920 ucode_raw->size); 1921 ret = -EINVAL; 1922 goto err_release; 1923 } 1924 1925 /* Verify that uCode images will fit in card's SRAM */ 1926 if (inst_size > IL39_MAX_INST_SIZE) { 1927 D_INFO("uCode instr len %d too large to fit in\n", inst_size); 1928 ret = -EINVAL; 1929 goto err_release; 1930 } 1931 1932 if (data_size > IL39_MAX_DATA_SIZE) { 1933 D_INFO("uCode data len %d too large to fit in\n", data_size); 1934 ret = -EINVAL; 1935 goto err_release; 1936 } 1937 if (init_size > IL39_MAX_INST_SIZE) { 1938 D_INFO("uCode init instr len %d too large to fit in\n", 1939 init_size); 1940 ret = -EINVAL; 1941 goto err_release; 1942 } 1943 if (init_data_size > IL39_MAX_DATA_SIZE) { 1944 D_INFO("uCode init data len %d too large to fit in\n", 1945 init_data_size); 1946 ret = -EINVAL; 1947 goto err_release; 1948 } 1949 if (boot_size > IL39_MAX_BSM_SIZE) { 1950 D_INFO("uCode boot instr len %d too large to fit in\n", 1951 boot_size); 1952 ret = -EINVAL; 1953 goto err_release; 1954 } 1955 1956 /* Allocate ucode buffers for card's bus-master loading ... */ 1957 1958 /* Runtime instructions and 2 copies of data: 1959 * 1) unmodified from disk 1960 * 2) backup cache for save/restore during power-downs */ 1961 il->ucode_code.len = inst_size; 1962 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); 1963 1964 il->ucode_data.len = data_size; 1965 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); 1966 1967 il->ucode_data_backup.len = data_size; 1968 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); 1969 1970 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || 1971 !il->ucode_data_backup.v_addr) 1972 goto err_pci_alloc; 1973 1974 /* Initialization instructions and data */ 1975 if (init_size && init_data_size) { 1976 il->ucode_init.len = init_size; 1977 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); 1978 1979 il->ucode_init_data.len = init_data_size; 1980 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); 1981 1982 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) 1983 goto err_pci_alloc; 1984 } 1985 1986 /* Bootstrap (instructions only, no data) */ 1987 if (boot_size) { 1988 il->ucode_boot.len = boot_size; 1989 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); 1990 1991 if (!il->ucode_boot.v_addr) 1992 goto err_pci_alloc; 1993 } 1994 1995 /* Copy images into buffers for card's bus-master reads ... */ 1996 1997 /* Runtime instructions (first block of data in file) */ 1998 len = inst_size; 1999 D_INFO("Copying (but not loading) uCode instr len %zd\n", len); 2000 memcpy(il->ucode_code.v_addr, src, len); 2001 src += len; 2002 2003 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 2004 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); 2005 2006 /* Runtime data (2nd block) 2007 * NOTE: Copy into backup buffer will be done in il3945_up() */ 2008 len = data_size; 2009 D_INFO("Copying (but not loading) uCode data len %zd\n", len); 2010 memcpy(il->ucode_data.v_addr, src, len); 2011 memcpy(il->ucode_data_backup.v_addr, src, len); 2012 src += len; 2013 2014 /* Initialization instructions (3rd block) */ 2015 if (init_size) { 2016 len = init_size; 2017 D_INFO("Copying (but not loading) init instr len %zd\n", len); 2018 memcpy(il->ucode_init.v_addr, src, len); 2019 src += len; 2020 } 2021 2022 /* Initialization data (4th block) */ 2023 if (init_data_size) { 2024 len = init_data_size; 2025 D_INFO("Copying (but not loading) init data len %zd\n", len); 2026 memcpy(il->ucode_init_data.v_addr, src, len); 2027 src += len; 2028 } 2029 2030 /* Bootstrap instructions (5th block) */ 2031 len = boot_size; 2032 D_INFO("Copying (but not loading) boot instr len %zd\n", len); 2033 memcpy(il->ucode_boot.v_addr, src, len); 2034 2035 /* We have our copies now, allow OS release its copies */ 2036 release_firmware(ucode_raw); 2037 return 0; 2038 2039 err_pci_alloc: 2040 IL_ERR("failed to allocate pci memory\n"); 2041 ret = -ENOMEM; 2042 il3945_dealloc_ucode_pci(il); 2043 2044 err_release: 2045 release_firmware(ucode_raw); 2046 2047 error: 2048 return ret; 2049 } 2050 2051 /** 2052 * il3945_set_ucode_ptrs - Set uCode address location 2053 * 2054 * Tell initialization uCode where to find runtime uCode. 2055 * 2056 * BSM registers initially contain pointers to initialization uCode. 2057 * We need to replace them to load runtime uCode inst and data, 2058 * and to save runtime data when powering down. 2059 */ 2060 static int 2061 il3945_set_ucode_ptrs(struct il_priv *il) 2062 { 2063 dma_addr_t pinst; 2064 dma_addr_t pdata; 2065 2066 /* bits 31:0 for 3945 */ 2067 pinst = il->ucode_code.p_addr; 2068 pdata = il->ucode_data_backup.p_addr; 2069 2070 /* Tell bootstrap uCode where to find image to load */ 2071 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 2072 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 2073 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); 2074 2075 /* Inst byte count must be last to set up, bit 31 signals uCode 2076 * that all new ptr/size info is in place */ 2077 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, 2078 il->ucode_code.len | BSM_DRAM_INST_LOAD); 2079 2080 D_INFO("Runtime uCode pointers are set.\n"); 2081 2082 return 0; 2083 } 2084 2085 /** 2086 * il3945_init_alive_start - Called after N_ALIVE notification received 2087 * 2088 * Called after N_ALIVE notification received from "initialize" uCode. 2089 * 2090 * Tell "initialize" uCode to go ahead and load the runtime uCode. 2091 */ 2092 static void 2093 il3945_init_alive_start(struct il_priv *il) 2094 { 2095 /* Check alive response for "valid" sign from uCode */ 2096 if (il->card_alive_init.is_valid != UCODE_VALID_OK) { 2097 /* We had an error bringing up the hardware, so take it 2098 * all the way back down so we can try again */ 2099 D_INFO("Initialize Alive failed.\n"); 2100 goto restart; 2101 } 2102 2103 /* Bootstrap uCode has loaded initialize uCode ... verify inst image. 2104 * This is a paranoid check, because we would not have gotten the 2105 * "initialize" alive if code weren't properly loaded. */ 2106 if (il3945_verify_ucode(il)) { 2107 /* Runtime instruction load was bad; 2108 * take it all the way back down so we can try again */ 2109 D_INFO("Bad \"initialize\" uCode load.\n"); 2110 goto restart; 2111 } 2112 2113 /* Send pointers to protocol/runtime uCode image ... init code will 2114 * load and launch runtime uCode, which will send us another "Alive" 2115 * notification. */ 2116 D_INFO("Initialization Alive received.\n"); 2117 if (il3945_set_ucode_ptrs(il)) { 2118 /* Runtime instruction load won't happen; 2119 * take it all the way back down so we can try again */ 2120 D_INFO("Couldn't set up uCode pointers.\n"); 2121 goto restart; 2122 } 2123 return; 2124 2125 restart: 2126 queue_work(il->workqueue, &il->restart); 2127 } 2128 2129 /** 2130 * il3945_alive_start - called after N_ALIVE notification received 2131 * from protocol/runtime uCode (initialization uCode's 2132 * Alive gets handled by il3945_init_alive_start()). 2133 */ 2134 static void 2135 il3945_alive_start(struct il_priv *il) 2136 { 2137 int thermal_spin = 0; 2138 u32 rfkill; 2139 2140 D_INFO("Runtime Alive received.\n"); 2141 2142 if (il->card_alive.is_valid != UCODE_VALID_OK) { 2143 /* We had an error bringing up the hardware, so take it 2144 * all the way back down so we can try again */ 2145 D_INFO("Alive failed.\n"); 2146 goto restart; 2147 } 2148 2149 /* Initialize uCode has loaded Runtime uCode ... verify inst image. 2150 * This is a paranoid check, because we would not have gotten the 2151 * "runtime" alive if code weren't properly loaded. */ 2152 if (il3945_verify_ucode(il)) { 2153 /* Runtime instruction load was bad; 2154 * take it all the way back down so we can try again */ 2155 D_INFO("Bad runtime uCode load.\n"); 2156 goto restart; 2157 } 2158 2159 rfkill = il_rd_prph(il, APMG_RFKILL_REG); 2160 D_INFO("RFKILL status: 0x%x\n", rfkill); 2161 2162 if (rfkill & 0x1) { 2163 clear_bit(S_RFKILL, &il->status); 2164 /* if RFKILL is not on, then wait for thermal 2165 * sensor in adapter to kick in */ 2166 while (il3945_hw_get_temperature(il) == 0) { 2167 thermal_spin++; 2168 udelay(10); 2169 } 2170 2171 if (thermal_spin) 2172 D_INFO("Thermal calibration took %dus\n", 2173 thermal_spin * 10); 2174 } else 2175 set_bit(S_RFKILL, &il->status); 2176 2177 /* After the ALIVE response, we can send commands to 3945 uCode */ 2178 set_bit(S_ALIVE, &il->status); 2179 2180 /* Enable watchdog to monitor the driver tx queues */ 2181 il_setup_watchdog(il); 2182 2183 if (il_is_rfkill(il)) 2184 return; 2185 2186 ieee80211_wake_queues(il->hw); 2187 2188 il->active_rate = RATES_MASK_3945; 2189 2190 il_power_update_mode(il, true); 2191 2192 if (il_is_associated(il)) { 2193 struct il3945_rxon_cmd *active_rxon = 2194 (struct il3945_rxon_cmd *)(&il->active); 2195 2196 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2198 } else { 2199 /* Initialize our rx_config data */ 2200 il_connection_init_rx_config(il); 2201 } 2202 2203 /* Configure Bluetooth device coexistence support */ 2204 il_send_bt_config(il); 2205 2206 set_bit(S_READY, &il->status); 2207 2208 /* Configure the adapter for unassociated operation */ 2209 il3945_commit_rxon(il); 2210 2211 il3945_reg_txpower_periodic(il); 2212 2213 D_INFO("ALIVE processing complete.\n"); 2214 wake_up(&il->wait_command_queue); 2215 2216 return; 2217 2218 restart: 2219 queue_work(il->workqueue, &il->restart); 2220 } 2221 2222 static void il3945_cancel_deferred_work(struct il_priv *il); 2223 2224 static void 2225 __il3945_down(struct il_priv *il) 2226 { 2227 unsigned long flags; 2228 int exit_pending; 2229 2230 D_INFO(DRV_NAME " is going down\n"); 2231 2232 il_scan_cancel_timeout(il, 200); 2233 2234 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); 2235 2236 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set 2237 * to prevent rearm timer */ 2238 del_timer_sync(&il->watchdog); 2239 2240 /* Station information will now be cleared in device */ 2241 il_clear_ucode_stations(il); 2242 il_dealloc_bcast_stations(il); 2243 il_clear_driver_stations(il); 2244 2245 /* Unblock any waiting calls */ 2246 wake_up_all(&il->wait_command_queue); 2247 2248 /* Wipe out the EXIT_PENDING status bit if we are not actually 2249 * exiting the module */ 2250 if (!exit_pending) 2251 clear_bit(S_EXIT_PENDING, &il->status); 2252 2253 /* stop and reset the on-board processor */ 2254 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 2255 2256 /* tell the device to stop sending interrupts */ 2257 spin_lock_irqsave(&il->lock, flags); 2258 il_disable_interrupts(il); 2259 spin_unlock_irqrestore(&il->lock, flags); 2260 il3945_synchronize_irq(il); 2261 2262 if (il->mac80211_registered) 2263 ieee80211_stop_queues(il->hw); 2264 2265 /* If we have not previously called il3945_init() then 2266 * clear all bits but the RF Kill bits and return */ 2267 if (!il_is_init(il)) { 2268 il->status = 2269 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2270 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2271 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2272 goto exit; 2273 } 2274 2275 /* ...otherwise clear out all the status bits but the RF Kill 2276 * bit and continue taking the NIC down. */ 2277 il->status &= 2278 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2279 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2280 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | 2281 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2282 2283 /* 2284 * We disabled and synchronized interrupt, and priv->mutex is taken, so 2285 * here is the only thread which will program device registers, but 2286 * still have lockdep assertions, so we are taking reg_lock. 2287 */ 2288 spin_lock_irq(&il->reg_lock); 2289 /* FIXME: il_grab_nic_access if rfkill is off ? */ 2290 2291 il3945_hw_txq_ctx_stop(il); 2292 il3945_hw_rxq_stop(il); 2293 /* Power-down device's busmaster DMA clocks */ 2294 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); 2295 udelay(5); 2296 /* Stop the device, and put it in low power state */ 2297 _il_apm_stop(il); 2298 2299 spin_unlock_irq(&il->reg_lock); 2300 2301 il3945_hw_txq_ctx_free(il); 2302 exit: 2303 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); 2304 2305 if (il->beacon_skb) 2306 dev_kfree_skb(il->beacon_skb); 2307 il->beacon_skb = NULL; 2308 2309 /* clear out any free frames */ 2310 il3945_clear_free_frames(il); 2311 } 2312 2313 static void 2314 il3945_down(struct il_priv *il) 2315 { 2316 mutex_lock(&il->mutex); 2317 __il3945_down(il); 2318 mutex_unlock(&il->mutex); 2319 2320 il3945_cancel_deferred_work(il); 2321 } 2322 2323 #define MAX_HW_RESTARTS 5 2324 2325 static int 2326 il3945_alloc_bcast_station(struct il_priv *il) 2327 { 2328 unsigned long flags; 2329 u8 sta_id; 2330 2331 spin_lock_irqsave(&il->sta_lock, flags); 2332 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); 2333 if (sta_id == IL_INVALID_STATION) { 2334 IL_ERR("Unable to prepare broadcast station\n"); 2335 spin_unlock_irqrestore(&il->sta_lock, flags); 2336 2337 return -EINVAL; 2338 } 2339 2340 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; 2341 il->stations[sta_id].used |= IL_STA_BCAST; 2342 spin_unlock_irqrestore(&il->sta_lock, flags); 2343 2344 return 0; 2345 } 2346 2347 static int 2348 __il3945_up(struct il_priv *il) 2349 { 2350 int rc, i; 2351 2352 rc = il3945_alloc_bcast_station(il); 2353 if (rc) 2354 return rc; 2355 2356 if (test_bit(S_EXIT_PENDING, &il->status)) { 2357 IL_WARN("Exit pending; will not bring the NIC up\n"); 2358 return -EIO; 2359 } 2360 2361 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { 2362 IL_ERR("ucode not available for device bring up\n"); 2363 return -EIO; 2364 } 2365 2366 /* If platform's RF_KILL switch is NOT set to KILL */ 2367 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2368 clear_bit(S_RFKILL, &il->status); 2369 else { 2370 set_bit(S_RFKILL, &il->status); 2371 return -ERFKILL; 2372 } 2373 2374 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2375 2376 rc = il3945_hw_nic_init(il); 2377 if (rc) { 2378 IL_ERR("Unable to int nic\n"); 2379 return rc; 2380 } 2381 2382 /* make sure rfkill handshake bits are cleared */ 2383 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2384 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2385 2386 /* clear (again), then enable host interrupts */ 2387 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2388 il_enable_interrupts(il); 2389 2390 /* really make sure rfkill handshake bits are cleared */ 2391 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2392 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2393 2394 /* Copy original ucode data image from disk into backup cache. 2395 * This will be used to initialize the on-board processor's 2396 * data SRAM for a clean start when the runtime program first loads. */ 2397 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, 2398 il->ucode_data.len); 2399 2400 /* We return success when we resume from suspend and rf_kill is on. */ 2401 if (test_bit(S_RFKILL, &il->status)) 2402 return 0; 2403 2404 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2405 2406 /* load bootstrap state machine, 2407 * load bootstrap program into processor's memory, 2408 * prepare to load the "initialize" uCode */ 2409 rc = il->ops->load_ucode(il); 2410 2411 if (rc) { 2412 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc); 2413 continue; 2414 } 2415 2416 /* start card; "initialize" will load runtime ucode */ 2417 il3945_nic_start(il); 2418 2419 D_INFO(DRV_NAME " is coming up\n"); 2420 2421 return 0; 2422 } 2423 2424 set_bit(S_EXIT_PENDING, &il->status); 2425 __il3945_down(il); 2426 clear_bit(S_EXIT_PENDING, &il->status); 2427 2428 /* tried to restart and config the device for as long as our 2429 * patience could withstand */ 2430 IL_ERR("Unable to initialize device after %d attempts.\n", i); 2431 return -EIO; 2432 } 2433 2434 /***************************************************************************** 2435 * 2436 * Workqueue callbacks 2437 * 2438 *****************************************************************************/ 2439 2440 static void 2441 il3945_bg_init_alive_start(struct work_struct *data) 2442 { 2443 struct il_priv *il = 2444 container_of(data, struct il_priv, init_alive_start.work); 2445 2446 mutex_lock(&il->mutex); 2447 if (test_bit(S_EXIT_PENDING, &il->status)) 2448 goto out; 2449 2450 il3945_init_alive_start(il); 2451 out: 2452 mutex_unlock(&il->mutex); 2453 } 2454 2455 static void 2456 il3945_bg_alive_start(struct work_struct *data) 2457 { 2458 struct il_priv *il = 2459 container_of(data, struct il_priv, alive_start.work); 2460 2461 mutex_lock(&il->mutex); 2462 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) 2463 goto out; 2464 2465 il3945_alive_start(il); 2466 out: 2467 mutex_unlock(&il->mutex); 2468 } 2469 2470 /* 2471 * 3945 cannot interrupt driver when hardware rf kill switch toggles; 2472 * driver must poll CSR_GP_CNTRL_REG register for change. This register 2473 * *is* readable even when device has been SW_RESET into low power mode 2474 * (e.g. during RF KILL). 2475 */ 2476 static void 2477 il3945_rfkill_poll(struct work_struct *data) 2478 { 2479 struct il_priv *il = 2480 container_of(data, struct il_priv, _3945.rfkill_poll.work); 2481 bool old_rfkill = test_bit(S_RFKILL, &il->status); 2482 bool new_rfkill = 2483 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); 2484 2485 if (new_rfkill != old_rfkill) { 2486 if (new_rfkill) 2487 set_bit(S_RFKILL, &il->status); 2488 else 2489 clear_bit(S_RFKILL, &il->status); 2490 2491 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); 2492 2493 D_RF_KILL("RF_KILL bit toggled to %s.\n", 2494 new_rfkill ? "disable radio" : "enable radio"); 2495 } 2496 2497 /* Keep this running, even if radio now enabled. This will be 2498 * cancelled in mac_start() if system decides to start again */ 2499 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2500 round_jiffies_relative(2 * HZ)); 2501 2502 } 2503 2504 int 2505 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) 2506 { 2507 struct il_host_cmd cmd = { 2508 .id = C_SCAN, 2509 .len = sizeof(struct il3945_scan_cmd), 2510 .flags = CMD_SIZE_HUGE, 2511 }; 2512 struct il3945_scan_cmd *scan; 2513 u8 n_probes = 0; 2514 enum nl80211_band band; 2515 bool is_active = false; 2516 int ret; 2517 u16 len; 2518 2519 lockdep_assert_held(&il->mutex); 2520 2521 if (!il->scan_cmd) { 2522 il->scan_cmd = 2523 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE, 2524 GFP_KERNEL); 2525 if (!il->scan_cmd) { 2526 D_SCAN("Fail to allocate scan memory\n"); 2527 return -ENOMEM; 2528 } 2529 } 2530 scan = il->scan_cmd; 2531 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE); 2532 2533 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH; 2534 scan->quiet_time = IL_ACTIVE_QUIET_TIME; 2535 2536 if (il_is_associated(il)) { 2537 u16 interval; 2538 u32 extra; 2539 u32 suspend_time = 100; 2540 u32 scan_suspend_time = 100; 2541 2542 D_INFO("Scanning while associated...\n"); 2543 2544 interval = vif->bss_conf.beacon_int; 2545 2546 scan->suspend_time = 0; 2547 scan->max_out_time = cpu_to_le32(200 * 1024); 2548 if (!interval) 2549 interval = suspend_time; 2550 /* 2551 * suspend time format: 2552 * 0-19: beacon interval in usec (time before exec.) 2553 * 20-23: 0 2554 * 24-31: number of beacons (suspend between channels) 2555 */ 2556 2557 extra = (suspend_time / interval) << 24; 2558 scan_suspend_time = 2559 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024)); 2560 2561 scan->suspend_time = cpu_to_le32(scan_suspend_time); 2562 D_SCAN("suspend_time 0x%X beacon interval %d\n", 2563 scan_suspend_time, interval); 2564 } 2565 2566 if (il->scan_request->n_ssids) { 2567 int i, p = 0; 2568 D_SCAN("Kicking off active scan\n"); 2569 for (i = 0; i < il->scan_request->n_ssids; i++) { 2570 /* always does wildcard anyway */ 2571 if (!il->scan_request->ssids[i].ssid_len) 2572 continue; 2573 scan->direct_scan[p].id = WLAN_EID_SSID; 2574 scan->direct_scan[p].len = 2575 il->scan_request->ssids[i].ssid_len; 2576 memcpy(scan->direct_scan[p].ssid, 2577 il->scan_request->ssids[i].ssid, 2578 il->scan_request->ssids[i].ssid_len); 2579 n_probes++; 2580 p++; 2581 } 2582 is_active = true; 2583 } else 2584 D_SCAN("Kicking off passive scan.\n"); 2585 2586 /* We don't build a direct scan probe request; the uCode will do 2587 * that based on the direct_mask added to each channel entry */ 2588 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; 2589 scan->tx_cmd.sta_id = il->hw_params.bcast_id; 2590 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2591 2592 /* flags + rate selection */ 2593 2594 switch (il->scan_band) { 2595 case NL80211_BAND_2GHZ: 2596 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 2597 scan->tx_cmd.rate = RATE_1M_PLCP; 2598 band = NL80211_BAND_2GHZ; 2599 break; 2600 case NL80211_BAND_5GHZ: 2601 scan->tx_cmd.rate = RATE_6M_PLCP; 2602 band = NL80211_BAND_5GHZ; 2603 break; 2604 default: 2605 IL_WARN("Invalid scan band\n"); 2606 return -EIO; 2607 } 2608 2609 /* 2610 * If active scaning is requested but a certain channel is marked 2611 * passive, we can do active scanning if we detect transmissions. For 2612 * passive only scanning disable switching to active on any channel. 2613 */ 2614 scan->good_CRC_th = 2615 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER; 2616 2617 len = 2618 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, 2619 vif->addr, il->scan_request->ie, 2620 il->scan_request->ie_len, 2621 IL_MAX_SCAN_SIZE - sizeof(*scan)); 2622 scan->tx_cmd.len = cpu_to_le16(len); 2623 2624 /* select Rx antennas */ 2625 scan->flags |= il3945_get_antenna_flags(il); 2626 2627 scan->channel_count = 2628 il3945_get_channels_for_scan(il, band, is_active, n_probes, 2629 (void *)&scan->data[len], vif); 2630 if (scan->channel_count == 0) { 2631 D_SCAN("channel count %d\n", scan->channel_count); 2632 return -EIO; 2633 } 2634 2635 cmd.len += 2636 le16_to_cpu(scan->tx_cmd.len) + 2637 scan->channel_count * sizeof(struct il3945_scan_channel); 2638 cmd.data = scan; 2639 scan->len = cpu_to_le16(cmd.len); 2640 2641 set_bit(S_SCAN_HW, &il->status); 2642 ret = il_send_cmd_sync(il, &cmd); 2643 if (ret) 2644 clear_bit(S_SCAN_HW, &il->status); 2645 return ret; 2646 } 2647 2648 void 2649 il3945_post_scan(struct il_priv *il) 2650 { 2651 /* 2652 * Since setting the RXON may have been deferred while 2653 * performing the scan, fire one off if needed 2654 */ 2655 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) 2656 il3945_commit_rxon(il); 2657 } 2658 2659 static void 2660 il3945_bg_restart(struct work_struct *data) 2661 { 2662 struct il_priv *il = container_of(data, struct il_priv, restart); 2663 2664 if (test_bit(S_EXIT_PENDING, &il->status)) 2665 return; 2666 2667 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { 2668 mutex_lock(&il->mutex); 2669 il->is_open = 0; 2670 mutex_unlock(&il->mutex); 2671 il3945_down(il); 2672 ieee80211_restart_hw(il->hw); 2673 } else { 2674 il3945_down(il); 2675 2676 mutex_lock(&il->mutex); 2677 if (test_bit(S_EXIT_PENDING, &il->status)) { 2678 mutex_unlock(&il->mutex); 2679 return; 2680 } 2681 2682 __il3945_up(il); 2683 mutex_unlock(&il->mutex); 2684 } 2685 } 2686 2687 static void 2688 il3945_bg_rx_replenish(struct work_struct *data) 2689 { 2690 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); 2691 2692 mutex_lock(&il->mutex); 2693 if (test_bit(S_EXIT_PENDING, &il->status)) 2694 goto out; 2695 2696 il3945_rx_replenish(il); 2697 out: 2698 mutex_unlock(&il->mutex); 2699 } 2700 2701 void 2702 il3945_post_associate(struct il_priv *il) 2703 { 2704 int rc = 0; 2705 2706 if (!il->vif || !il->is_open) 2707 return; 2708 2709 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid, 2710 il->active.bssid_addr); 2711 2712 if (test_bit(S_EXIT_PENDING, &il->status)) 2713 return; 2714 2715 il_scan_cancel_timeout(il, 200); 2716 2717 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2718 il3945_commit_rxon(il); 2719 2720 rc = il_send_rxon_timing(il); 2721 if (rc) 2722 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n"); 2723 2724 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2725 2726 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid); 2727 2728 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid, 2729 il->vif->bss_conf.beacon_int); 2730 2731 if (il->vif->bss_conf.use_short_preamble) 2732 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2733 else 2734 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2735 2736 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2737 if (il->vif->bss_conf.use_short_slot) 2738 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2739 else 2740 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2741 } 2742 2743 il3945_commit_rxon(il); 2744 2745 switch (il->vif->type) { 2746 case NL80211_IFTYPE_STATION: 2747 il3945_rate_scale_init(il->hw, IL_AP_ID); 2748 break; 2749 case NL80211_IFTYPE_ADHOC: 2750 il3945_send_beacon_cmd(il); 2751 break; 2752 default: 2753 IL_ERR("%s Should not be called in %d mode\n", __func__, 2754 il->vif->type); 2755 break; 2756 } 2757 } 2758 2759 /***************************************************************************** 2760 * 2761 * mac80211 entry point functions 2762 * 2763 *****************************************************************************/ 2764 2765 #define UCODE_READY_TIMEOUT (2 * HZ) 2766 2767 static int 2768 il3945_mac_start(struct ieee80211_hw *hw) 2769 { 2770 struct il_priv *il = hw->priv; 2771 int ret; 2772 2773 /* we should be verifying the device is ready to be opened */ 2774 mutex_lock(&il->mutex); 2775 D_MAC80211("enter\n"); 2776 2777 /* fetch ucode file from disk, alloc and copy to bus-master buffers ... 2778 * ucode filename and max sizes are card-specific. */ 2779 2780 if (!il->ucode_code.len) { 2781 ret = il3945_read_ucode(il); 2782 if (ret) { 2783 IL_ERR("Could not read microcode: %d\n", ret); 2784 mutex_unlock(&il->mutex); 2785 goto out_release_irq; 2786 } 2787 } 2788 2789 ret = __il3945_up(il); 2790 2791 mutex_unlock(&il->mutex); 2792 2793 if (ret) 2794 goto out_release_irq; 2795 2796 D_INFO("Start UP work.\n"); 2797 2798 /* Wait for START_ALIVE from ucode. Otherwise callbacks from 2799 * mac80211 will not be run successfully. */ 2800 ret = wait_event_timeout(il->wait_command_queue, 2801 test_bit(S_READY, &il->status), 2802 UCODE_READY_TIMEOUT); 2803 if (!ret) { 2804 if (!test_bit(S_READY, &il->status)) { 2805 IL_ERR("Wait for START_ALIVE timeout after %dms.\n", 2806 jiffies_to_msecs(UCODE_READY_TIMEOUT)); 2807 ret = -ETIMEDOUT; 2808 goto out_release_irq; 2809 } 2810 } 2811 2812 /* ucode is running and will send rfkill notifications, 2813 * no need to poll the killswitch state anymore */ 2814 cancel_delayed_work(&il->_3945.rfkill_poll); 2815 2816 il->is_open = 1; 2817 D_MAC80211("leave\n"); 2818 return 0; 2819 2820 out_release_irq: 2821 il->is_open = 0; 2822 D_MAC80211("leave - failed\n"); 2823 return ret; 2824 } 2825 2826 static void 2827 il3945_mac_stop(struct ieee80211_hw *hw) 2828 { 2829 struct il_priv *il = hw->priv; 2830 2831 D_MAC80211("enter\n"); 2832 2833 if (!il->is_open) { 2834 D_MAC80211("leave - skip\n"); 2835 return; 2836 } 2837 2838 il->is_open = 0; 2839 2840 il3945_down(il); 2841 2842 flush_workqueue(il->workqueue); 2843 2844 /* start polling the killswitch state again */ 2845 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2846 round_jiffies_relative(2 * HZ)); 2847 2848 D_MAC80211("leave\n"); 2849 } 2850 2851 static void 2852 il3945_mac_tx(struct ieee80211_hw *hw, 2853 struct ieee80211_tx_control *control, 2854 struct sk_buff *skb) 2855 { 2856 struct il_priv *il = hw->priv; 2857 2858 D_MAC80211("enter\n"); 2859 2860 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 2861 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 2862 2863 if (il3945_tx_skb(il, control->sta, skb)) 2864 dev_kfree_skb_any(skb); 2865 2866 D_MAC80211("leave\n"); 2867 } 2868 2869 void 2870 il3945_config_ap(struct il_priv *il) 2871 { 2872 struct ieee80211_vif *vif = il->vif; 2873 int rc = 0; 2874 2875 if (test_bit(S_EXIT_PENDING, &il->status)) 2876 return; 2877 2878 /* The following should be done only at AP bring up */ 2879 if (!(il_is_associated(il))) { 2880 2881 /* RXON - unassoc (to set timing command) */ 2882 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2883 il3945_commit_rxon(il); 2884 2885 /* RXON Timing */ 2886 rc = il_send_rxon_timing(il); 2887 if (rc) 2888 IL_WARN("C_RXON_TIMING failed - " 2889 "Attempting to continue.\n"); 2890 2891 il->staging.assoc_id = 0; 2892 2893 if (vif->bss_conf.use_short_preamble) 2894 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2895 else 2896 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2897 2898 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2899 if (vif->bss_conf.use_short_slot) 2900 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2901 else 2902 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2903 } 2904 /* restore RXON assoc */ 2905 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2906 il3945_commit_rxon(il); 2907 } 2908 il3945_send_beacon_cmd(il); 2909 } 2910 2911 static int 2912 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2913 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2914 struct ieee80211_key_conf *key) 2915 { 2916 struct il_priv *il = hw->priv; 2917 int ret = 0; 2918 u8 sta_id = IL_INVALID_STATION; 2919 u8 static_key; 2920 2921 D_MAC80211("enter\n"); 2922 2923 if (il3945_mod_params.sw_crypto) { 2924 D_MAC80211("leave - hwcrypto disabled\n"); 2925 return -EOPNOTSUPP; 2926 } 2927 2928 /* 2929 * To support IBSS RSN, don't program group keys in IBSS, the 2930 * hardware will then not attempt to decrypt the frames. 2931 */ 2932 if (vif->type == NL80211_IFTYPE_ADHOC && 2933 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 2934 D_MAC80211("leave - IBSS RSN\n"); 2935 return -EOPNOTSUPP; 2936 } 2937 2938 static_key = !il_is_associated(il); 2939 2940 if (!static_key) { 2941 sta_id = il_sta_id_or_broadcast(il, sta); 2942 if (sta_id == IL_INVALID_STATION) { 2943 D_MAC80211("leave - station not found\n"); 2944 return -EINVAL; 2945 } 2946 } 2947 2948 mutex_lock(&il->mutex); 2949 il_scan_cancel_timeout(il, 100); 2950 2951 switch (cmd) { 2952 case SET_KEY: 2953 if (static_key) 2954 ret = il3945_set_static_key(il, key); 2955 else 2956 ret = il3945_set_dynamic_key(il, key, sta_id); 2957 D_MAC80211("enable hwcrypto key\n"); 2958 break; 2959 case DISABLE_KEY: 2960 if (static_key) 2961 ret = il3945_remove_static_key(il); 2962 else 2963 ret = il3945_clear_sta_key_info(il, sta_id); 2964 D_MAC80211("disable hwcrypto key\n"); 2965 break; 2966 default: 2967 ret = -EINVAL; 2968 } 2969 2970 D_MAC80211("leave ret %d\n", ret); 2971 mutex_unlock(&il->mutex); 2972 2973 return ret; 2974 } 2975 2976 static int 2977 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2978 struct ieee80211_sta *sta) 2979 { 2980 struct il_priv *il = hw->priv; 2981 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; 2982 int ret; 2983 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2984 u8 sta_id; 2985 2986 mutex_lock(&il->mutex); 2987 D_INFO("station %pM\n", sta->addr); 2988 sta_priv->common.sta_id = IL_INVALID_STATION; 2989 2990 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); 2991 if (ret) { 2992 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); 2993 /* Should we return success if return code is EEXIST ? */ 2994 mutex_unlock(&il->mutex); 2995 return ret; 2996 } 2997 2998 sta_priv->common.sta_id = sta_id; 2999 3000 /* Initialize rate scaling */ 3001 D_INFO("Initializing rate scaling for station %pM\n", sta->addr); 3002 il3945_rs_rate_init(il, sta, sta_id); 3003 mutex_unlock(&il->mutex); 3004 3005 return 0; 3006 } 3007 3008 static void 3009 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 3010 unsigned int *total_flags, u64 multicast) 3011 { 3012 struct il_priv *il = hw->priv; 3013 __le32 filter_or = 0, filter_nand = 0; 3014 3015 #define CHK(test, flag) do { \ 3016 if (*total_flags & (test)) \ 3017 filter_or |= (flag); \ 3018 else \ 3019 filter_nand |= (flag); \ 3020 } while (0) 3021 3022 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, 3023 *total_flags); 3024 3025 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK); 3026 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 3027 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 3028 3029 #undef CHK 3030 3031 mutex_lock(&il->mutex); 3032 3033 il->staging.filter_flags &= ~filter_nand; 3034 il->staging.filter_flags |= filter_or; 3035 3036 /* 3037 * Not committing directly because hardware can perform a scan, 3038 * but even if hw is ready, committing here breaks for some reason, 3039 * we'll eventually commit the filter flags change anyway. 3040 */ 3041 3042 mutex_unlock(&il->mutex); 3043 3044 /* 3045 * Receiving all multicast frames is always enabled by the 3046 * default flags setup in il_connection_init_rx_config() 3047 * since we currently do not support programming multicast 3048 * filters into the device. 3049 */ 3050 *total_flags &= 3051 FIF_OTHER_BSS | FIF_ALLMULTI | 3052 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 3053 } 3054 3055 /***************************************************************************** 3056 * 3057 * sysfs attributes 3058 * 3059 *****************************************************************************/ 3060 3061 #ifdef CONFIG_IWLEGACY_DEBUG 3062 3063 /* 3064 * The following adds a new attribute to the sysfs representation 3065 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) 3066 * used for controlling the debug level. 3067 * 3068 * See the level definitions in iwl for details. 3069 * 3070 * The debug_level being managed using sysfs below is a per device debug 3071 * level that is used instead of the global debug level if it (the per 3072 * device debug level) is set. 3073 */ 3074 static ssize_t 3075 il3945_show_debug_level(struct device *d, struct device_attribute *attr, 3076 char *buf) 3077 { 3078 struct il_priv *il = dev_get_drvdata(d); 3079 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); 3080 } 3081 3082 static ssize_t 3083 il3945_store_debug_level(struct device *d, struct device_attribute *attr, 3084 const char *buf, size_t count) 3085 { 3086 struct il_priv *il = dev_get_drvdata(d); 3087 unsigned long val; 3088 int ret; 3089 3090 ret = kstrtoul(buf, 0, &val); 3091 if (ret) 3092 IL_INFO("%s is not in hex or decimal form.\n", buf); 3093 else 3094 il->debug_level = val; 3095 3096 return strnlen(buf, count); 3097 } 3098 3099 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level, 3100 il3945_store_debug_level); 3101 3102 #endif /* CONFIG_IWLEGACY_DEBUG */ 3103 3104 static ssize_t 3105 il3945_show_temperature(struct device *d, struct device_attribute *attr, 3106 char *buf) 3107 { 3108 struct il_priv *il = dev_get_drvdata(d); 3109 3110 if (!il_is_alive(il)) 3111 return -EAGAIN; 3112 3113 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il)); 3114 } 3115 3116 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL); 3117 3118 static ssize_t 3119 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf) 3120 { 3121 struct il_priv *il = dev_get_drvdata(d); 3122 return sprintf(buf, "%d\n", il->tx_power_user_lmt); 3123 } 3124 3125 static ssize_t 3126 il3945_store_tx_power(struct device *d, struct device_attribute *attr, 3127 const char *buf, size_t count) 3128 { 3129 struct il_priv *il = dev_get_drvdata(d); 3130 char *p = (char *)buf; 3131 u32 val; 3132 3133 val = simple_strtoul(p, &p, 10); 3134 if (p == buf) 3135 IL_INFO(": %s is not in decimal form.\n", buf); 3136 else 3137 il3945_hw_reg_set_txpower(il, val); 3138 3139 return count; 3140 } 3141 3142 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power); 3143 3144 static ssize_t 3145 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf) 3146 { 3147 struct il_priv *il = dev_get_drvdata(d); 3148 3149 return sprintf(buf, "0x%04X\n", il->active.flags); 3150 } 3151 3152 static ssize_t 3153 il3945_store_flags(struct device *d, struct device_attribute *attr, 3154 const char *buf, size_t count) 3155 { 3156 struct il_priv *il = dev_get_drvdata(d); 3157 u32 flags = simple_strtoul(buf, NULL, 0); 3158 3159 mutex_lock(&il->mutex); 3160 if (le32_to_cpu(il->staging.flags) != flags) { 3161 /* Cancel any currently running scans... */ 3162 if (il_scan_cancel_timeout(il, 100)) 3163 IL_WARN("Could not cancel scan.\n"); 3164 else { 3165 D_INFO("Committing rxon.flags = 0x%04X\n", flags); 3166 il->staging.flags = cpu_to_le32(flags); 3167 il3945_commit_rxon(il); 3168 } 3169 } 3170 mutex_unlock(&il->mutex); 3171 3172 return count; 3173 } 3174 3175 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags); 3176 3177 static ssize_t 3178 il3945_show_filter_flags(struct device *d, struct device_attribute *attr, 3179 char *buf) 3180 { 3181 struct il_priv *il = dev_get_drvdata(d); 3182 3183 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags)); 3184 } 3185 3186 static ssize_t 3187 il3945_store_filter_flags(struct device *d, struct device_attribute *attr, 3188 const char *buf, size_t count) 3189 { 3190 struct il_priv *il = dev_get_drvdata(d); 3191 u32 filter_flags = simple_strtoul(buf, NULL, 0); 3192 3193 mutex_lock(&il->mutex); 3194 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) { 3195 /* Cancel any currently running scans... */ 3196 if (il_scan_cancel_timeout(il, 100)) 3197 IL_WARN("Could not cancel scan.\n"); 3198 else { 3199 D_INFO("Committing rxon.filter_flags = " "0x%04X\n", 3200 filter_flags); 3201 il->staging.filter_flags = cpu_to_le32(filter_flags); 3202 il3945_commit_rxon(il); 3203 } 3204 } 3205 mutex_unlock(&il->mutex); 3206 3207 return count; 3208 } 3209 3210 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags, 3211 il3945_store_filter_flags); 3212 3213 static ssize_t 3214 il3945_show_measurement(struct device *d, struct device_attribute *attr, 3215 char *buf) 3216 { 3217 struct il_priv *il = dev_get_drvdata(d); 3218 struct il_spectrum_notification measure_report; 3219 u32 size = sizeof(measure_report), len = 0, ofs = 0; 3220 u8 *data = (u8 *) &measure_report; 3221 unsigned long flags; 3222 3223 spin_lock_irqsave(&il->lock, flags); 3224 if (!(il->measurement_status & MEASUREMENT_READY)) { 3225 spin_unlock_irqrestore(&il->lock, flags); 3226 return 0; 3227 } 3228 memcpy(&measure_report, &il->measure_report, size); 3229 il->measurement_status = 0; 3230 spin_unlock_irqrestore(&il->lock, flags); 3231 3232 while (size && PAGE_SIZE - len) { 3233 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, 3234 PAGE_SIZE - len, true); 3235 len = strlen(buf); 3236 if (PAGE_SIZE - len) 3237 buf[len++] = '\n'; 3238 3239 ofs += 16; 3240 size -= min(size, 16U); 3241 } 3242 3243 return len; 3244 } 3245 3246 static ssize_t 3247 il3945_store_measurement(struct device *d, struct device_attribute *attr, 3248 const char *buf, size_t count) 3249 { 3250 struct il_priv *il = dev_get_drvdata(d); 3251 struct ieee80211_measurement_params params = { 3252 .channel = le16_to_cpu(il->active.channel), 3253 .start_time = cpu_to_le64(il->_3945.last_tsf), 3254 .duration = cpu_to_le16(1), 3255 }; 3256 u8 type = IL_MEASURE_BASIC; 3257 u8 buffer[32]; 3258 u8 channel; 3259 3260 if (count) { 3261 char *p = buffer; 3262 strlcpy(buffer, buf, sizeof(buffer)); 3263 channel = simple_strtoul(p, NULL, 0); 3264 if (channel) 3265 params.channel = channel; 3266 3267 p = buffer; 3268 while (*p && *p != ' ') 3269 p++; 3270 if (*p) 3271 type = simple_strtoul(p + 1, NULL, 0); 3272 } 3273 3274 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n", 3275 type, params.channel, buf); 3276 il3945_get_measurement(il, ¶ms, type); 3277 3278 return count; 3279 } 3280 3281 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement, 3282 il3945_store_measurement); 3283 3284 static ssize_t 3285 il3945_store_retry_rate(struct device *d, struct device_attribute *attr, 3286 const char *buf, size_t count) 3287 { 3288 struct il_priv *il = dev_get_drvdata(d); 3289 3290 il->retry_rate = simple_strtoul(buf, NULL, 0); 3291 if (il->retry_rate <= 0) 3292 il->retry_rate = 1; 3293 3294 return count; 3295 } 3296 3297 static ssize_t 3298 il3945_show_retry_rate(struct device *d, struct device_attribute *attr, 3299 char *buf) 3300 { 3301 struct il_priv *il = dev_get_drvdata(d); 3302 return sprintf(buf, "%d", il->retry_rate); 3303 } 3304 3305 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate, 3306 il3945_store_retry_rate); 3307 3308 static ssize_t 3309 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf) 3310 { 3311 /* all this shit doesn't belong into sysfs anyway */ 3312 return 0; 3313 } 3314 3315 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL); 3316 3317 static ssize_t 3318 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf) 3319 { 3320 struct il_priv *il = dev_get_drvdata(d); 3321 3322 if (!il_is_alive(il)) 3323 return -EAGAIN; 3324 3325 return sprintf(buf, "%d\n", il3945_mod_params.antenna); 3326 } 3327 3328 static ssize_t 3329 il3945_store_antenna(struct device *d, struct device_attribute *attr, 3330 const char *buf, size_t count) 3331 { 3332 struct il_priv *il __maybe_unused = dev_get_drvdata(d); 3333 int ant; 3334 3335 if (count == 0) 3336 return 0; 3337 3338 if (sscanf(buf, "%1i", &ant) != 1) { 3339 D_INFO("not in hex or decimal form.\n"); 3340 return count; 3341 } 3342 3343 if (ant >= 0 && ant <= 2) { 3344 D_INFO("Setting antenna select to %d.\n", ant); 3345 il3945_mod_params.antenna = (enum il3945_antenna)ant; 3346 } else 3347 D_INFO("Bad antenna select value %d.\n", ant); 3348 3349 return count; 3350 } 3351 3352 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna); 3353 3354 static ssize_t 3355 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf) 3356 { 3357 struct il_priv *il = dev_get_drvdata(d); 3358 if (!il_is_alive(il)) 3359 return -EAGAIN; 3360 return sprintf(buf, "0x%08x\n", (int)il->status); 3361 } 3362 3363 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL); 3364 3365 static ssize_t 3366 il3945_dump_error_log(struct device *d, struct device_attribute *attr, 3367 const char *buf, size_t count) 3368 { 3369 struct il_priv *il = dev_get_drvdata(d); 3370 char *p = (char *)buf; 3371 3372 if (p[0] == '1') 3373 il3945_dump_nic_error_log(il); 3374 3375 return strnlen(buf, count); 3376 } 3377 3378 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log); 3379 3380 /***************************************************************************** 3381 * 3382 * driver setup and tear down 3383 * 3384 *****************************************************************************/ 3385 3386 static void 3387 il3945_setup_deferred_work(struct il_priv *il) 3388 { 3389 il->workqueue = create_singlethread_workqueue(DRV_NAME); 3390 3391 init_waitqueue_head(&il->wait_command_queue); 3392 3393 INIT_WORK(&il->restart, il3945_bg_restart); 3394 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish); 3395 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start); 3396 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start); 3397 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll); 3398 3399 il_setup_scan_deferred_work(il); 3400 3401 il3945_hw_setup_deferred_work(il); 3402 3403 timer_setup(&il->watchdog, il_bg_watchdog, 0); 3404 3405 tasklet_init(&il->irq_tasklet, 3406 (void (*)(unsigned long))il3945_irq_tasklet, 3407 (unsigned long)il); 3408 } 3409 3410 static void 3411 il3945_cancel_deferred_work(struct il_priv *il) 3412 { 3413 il3945_hw_cancel_deferred_work(il); 3414 3415 cancel_delayed_work_sync(&il->init_alive_start); 3416 cancel_delayed_work(&il->alive_start); 3417 3418 il_cancel_scan_deferred_work(il); 3419 } 3420 3421 static struct attribute *il3945_sysfs_entries[] = { 3422 &dev_attr_antenna.attr, 3423 &dev_attr_channels.attr, 3424 &dev_attr_dump_errors.attr, 3425 &dev_attr_flags.attr, 3426 &dev_attr_filter_flags.attr, 3427 &dev_attr_measurement.attr, 3428 &dev_attr_retry_rate.attr, 3429 &dev_attr_status.attr, 3430 &dev_attr_temperature.attr, 3431 &dev_attr_tx_power.attr, 3432 #ifdef CONFIG_IWLEGACY_DEBUG 3433 &dev_attr_debug_level.attr, 3434 #endif 3435 NULL 3436 }; 3437 3438 static const struct attribute_group il3945_attribute_group = { 3439 .name = NULL, /* put in device directory */ 3440 .attrs = il3945_sysfs_entries, 3441 }; 3442 3443 static struct ieee80211_ops il3945_mac_ops __ro_after_init = { 3444 .tx = il3945_mac_tx, 3445 .start = il3945_mac_start, 3446 .stop = il3945_mac_stop, 3447 .add_interface = il_mac_add_interface, 3448 .remove_interface = il_mac_remove_interface, 3449 .change_interface = il_mac_change_interface, 3450 .config = il_mac_config, 3451 .configure_filter = il3945_configure_filter, 3452 .set_key = il3945_mac_set_key, 3453 .conf_tx = il_mac_conf_tx, 3454 .reset_tsf = il_mac_reset_tsf, 3455 .bss_info_changed = il_mac_bss_info_changed, 3456 .hw_scan = il_mac_hw_scan, 3457 .sta_add = il3945_mac_sta_add, 3458 .sta_remove = il_mac_sta_remove, 3459 .tx_last_beacon = il_mac_tx_last_beacon, 3460 .flush = il_mac_flush, 3461 }; 3462 3463 static int 3464 il3945_init_drv(struct il_priv *il) 3465 { 3466 int ret; 3467 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 3468 3469 il->retry_rate = 1; 3470 il->beacon_skb = NULL; 3471 3472 spin_lock_init(&il->sta_lock); 3473 spin_lock_init(&il->hcmd_lock); 3474 3475 INIT_LIST_HEAD(&il->free_frames); 3476 3477 mutex_init(&il->mutex); 3478 3479 il->ieee_channels = NULL; 3480 il->ieee_rates = NULL; 3481 il->band = NL80211_BAND_2GHZ; 3482 3483 il->iw_mode = NL80211_IFTYPE_STATION; 3484 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; 3485 3486 /* initialize force reset */ 3487 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; 3488 3489 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { 3490 IL_WARN("Unsupported EEPROM version: 0x%04X\n", 3491 eeprom->version); 3492 ret = -EINVAL; 3493 goto err; 3494 } 3495 ret = il_init_channel_map(il); 3496 if (ret) { 3497 IL_ERR("initializing regulatory failed: %d\n", ret); 3498 goto err; 3499 } 3500 3501 /* Set up txpower settings in driver for all channels */ 3502 if (il3945_txpower_set_from_eeprom(il)) { 3503 ret = -EIO; 3504 goto err_free_channel_map; 3505 } 3506 3507 ret = il_init_geos(il); 3508 if (ret) { 3509 IL_ERR("initializing geos failed: %d\n", ret); 3510 goto err_free_channel_map; 3511 } 3512 il3945_init_hw_rates(il, il->ieee_rates); 3513 3514 return 0; 3515 3516 err_free_channel_map: 3517 il_free_channel_map(il); 3518 err: 3519 return ret; 3520 } 3521 3522 #define IL3945_MAX_PROBE_REQUEST 200 3523 3524 static int 3525 il3945_setup_mac(struct il_priv *il) 3526 { 3527 int ret; 3528 struct ieee80211_hw *hw = il->hw; 3529 3530 hw->rate_control_algorithm = "iwl-3945-rs"; 3531 hw->sta_data_size = sizeof(struct il3945_sta_priv); 3532 hw->vif_data_size = sizeof(struct il_vif_priv); 3533 3534 /* Tell mac80211 our characteristics */ 3535 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 3536 ieee80211_hw_set(hw, SUPPORTS_PS); 3537 ieee80211_hw_set(hw, SIGNAL_DBM); 3538 ieee80211_hw_set(hw, SPECTRUM_MGMT); 3539 3540 hw->wiphy->interface_modes = 3541 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC); 3542 3543 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; 3544 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG | 3545 REGULATORY_DISABLE_BEACON_HINTS; 3546 3547 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 3548 3549 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3550 /* we create the 802.11 header and a zero-length SSID element */ 3551 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2; 3552 3553 /* Default value; 4 EDCA QOS priorities */ 3554 hw->queues = 4; 3555 3556 if (il->bands[NL80211_BAND_2GHZ].n_channels) 3557 il->hw->wiphy->bands[NL80211_BAND_2GHZ] = 3558 &il->bands[NL80211_BAND_2GHZ]; 3559 3560 if (il->bands[NL80211_BAND_5GHZ].n_channels) 3561 il->hw->wiphy->bands[NL80211_BAND_5GHZ] = 3562 &il->bands[NL80211_BAND_5GHZ]; 3563 3564 il_leds_init(il); 3565 3566 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 3567 3568 ret = ieee80211_register_hw(il->hw); 3569 if (ret) { 3570 IL_ERR("Failed to register hw (error %d)\n", ret); 3571 return ret; 3572 } 3573 il->mac80211_registered = 1; 3574 3575 return 0; 3576 } 3577 3578 static int 3579 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3580 { 3581 int err = 0; 3582 struct il_priv *il; 3583 struct ieee80211_hw *hw; 3584 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data); 3585 struct il3945_eeprom *eeprom; 3586 unsigned long flags; 3587 3588 /*********************** 3589 * 1. Allocating HW data 3590 * ********************/ 3591 3592 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops); 3593 if (!hw) { 3594 err = -ENOMEM; 3595 goto out; 3596 } 3597 il = hw->priv; 3598 il->hw = hw; 3599 SET_IEEE80211_DEV(hw, &pdev->dev); 3600 3601 il->cmd_queue = IL39_CMD_QUEUE_NUM; 3602 3603 D_INFO("*** LOAD DRIVER ***\n"); 3604 il->cfg = cfg; 3605 il->ops = &il3945_ops; 3606 #ifdef CONFIG_IWLEGACY_DEBUGFS 3607 il->debugfs_ops = &il3945_debugfs_ops; 3608 #endif 3609 il->pci_dev = pdev; 3610 il->inta_mask = CSR_INI_SET_MASK; 3611 3612 /*************************** 3613 * 2. Initializing PCI bus 3614 * *************************/ 3615 pci_disable_link_state(pdev, 3616 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 3617 PCIE_LINK_STATE_CLKPM); 3618 3619 if (pci_enable_device(pdev)) { 3620 err = -ENODEV; 3621 goto out_ieee80211_free_hw; 3622 } 3623 3624 pci_set_master(pdev); 3625 3626 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 3627 if (!err) 3628 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3629 if (err) { 3630 IL_WARN("No suitable DMA available.\n"); 3631 goto out_pci_disable_device; 3632 } 3633 3634 pci_set_drvdata(pdev, il); 3635 err = pci_request_regions(pdev, DRV_NAME); 3636 if (err) 3637 goto out_pci_disable_device; 3638 3639 /*********************** 3640 * 3. Read REV Register 3641 * ********************/ 3642 il->hw_base = pci_ioremap_bar(pdev, 0); 3643 if (!il->hw_base) { 3644 err = -ENODEV; 3645 goto out_pci_release_regions; 3646 } 3647 3648 D_INFO("pci_resource_len = 0x%08llx\n", 3649 (unsigned long long)pci_resource_len(pdev, 0)); 3650 D_INFO("pci_resource_base = %p\n", il->hw_base); 3651 3652 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3653 * PCI Tx retries from interfering with C3 CPU state */ 3654 pci_write_config_byte(pdev, 0x41, 0x00); 3655 3656 /* these spin locks will be used in apm_init and EEPROM access 3657 * we should init now 3658 */ 3659 spin_lock_init(&il->reg_lock); 3660 spin_lock_init(&il->lock); 3661 3662 /* 3663 * stop and reset the on-board processor just in case it is in a 3664 * strange state ... like being left stranded by a primary kernel 3665 * and this is now the kdump kernel trying to start up 3666 */ 3667 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3668 3669 /*********************** 3670 * 4. Read EEPROM 3671 * ********************/ 3672 3673 /* Read the EEPROM */ 3674 err = il_eeprom_init(il); 3675 if (err) { 3676 IL_ERR("Unable to init EEPROM\n"); 3677 goto out_iounmap; 3678 } 3679 /* MAC Address location in EEPROM same for 3945/4965 */ 3680 eeprom = (struct il3945_eeprom *)il->eeprom; 3681 D_INFO("MAC address: %pM\n", eeprom->mac_address); 3682 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address); 3683 3684 /*********************** 3685 * 5. Setup HW Constants 3686 * ********************/ 3687 /* Device-specific setup */ 3688 err = il3945_hw_set_hw_params(il); 3689 if (err) { 3690 IL_ERR("failed to set hw settings\n"); 3691 goto out_eeprom_free; 3692 } 3693 3694 /*********************** 3695 * 6. Setup il 3696 * ********************/ 3697 3698 err = il3945_init_drv(il); 3699 if (err) { 3700 IL_ERR("initializing driver failed\n"); 3701 goto out_unset_hw_params; 3702 } 3703 3704 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); 3705 3706 /*********************** 3707 * 7. Setup Services 3708 * ********************/ 3709 3710 spin_lock_irqsave(&il->lock, flags); 3711 il_disable_interrupts(il); 3712 spin_unlock_irqrestore(&il->lock, flags); 3713 3714 pci_enable_msi(il->pci_dev); 3715 3716 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); 3717 if (err) { 3718 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); 3719 goto out_disable_msi; 3720 } 3721 3722 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group); 3723 if (err) { 3724 IL_ERR("failed to create sysfs device attributes\n"); 3725 goto out_release_irq; 3726 } 3727 3728 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]); 3729 il3945_setup_deferred_work(il); 3730 il3945_setup_handlers(il); 3731 il_power_initialize(il); 3732 3733 /********************************* 3734 * 8. Setup and Register mac80211 3735 * *******************************/ 3736 3737 il_enable_interrupts(il); 3738 3739 err = il3945_setup_mac(il); 3740 if (err) 3741 goto out_remove_sysfs; 3742 3743 il_dbgfs_register(il, DRV_NAME); 3744 3745 /* Start monitoring the killswitch */ 3746 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); 3747 3748 return 0; 3749 3750 out_remove_sysfs: 3751 destroy_workqueue(il->workqueue); 3752 il->workqueue = NULL; 3753 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3754 out_release_irq: 3755 free_irq(il->pci_dev->irq, il); 3756 out_disable_msi: 3757 pci_disable_msi(il->pci_dev); 3758 il_free_geos(il); 3759 il_free_channel_map(il); 3760 out_unset_hw_params: 3761 il3945_unset_hw_params(il); 3762 out_eeprom_free: 3763 il_eeprom_free(il); 3764 out_iounmap: 3765 iounmap(il->hw_base); 3766 out_pci_release_regions: 3767 pci_release_regions(pdev); 3768 out_pci_disable_device: 3769 pci_disable_device(pdev); 3770 out_ieee80211_free_hw: 3771 ieee80211_free_hw(il->hw); 3772 out: 3773 return err; 3774 } 3775 3776 static void 3777 il3945_pci_remove(struct pci_dev *pdev) 3778 { 3779 struct il_priv *il = pci_get_drvdata(pdev); 3780 unsigned long flags; 3781 3782 if (!il) 3783 return; 3784 3785 D_INFO("*** UNLOAD DRIVER ***\n"); 3786 3787 il_dbgfs_unregister(il); 3788 3789 set_bit(S_EXIT_PENDING, &il->status); 3790 3791 il_leds_exit(il); 3792 3793 if (il->mac80211_registered) { 3794 ieee80211_unregister_hw(il->hw); 3795 il->mac80211_registered = 0; 3796 } else { 3797 il3945_down(il); 3798 } 3799 3800 /* 3801 * Make sure device is reset to low power before unloading driver. 3802 * This may be redundant with il_down(), but there are paths to 3803 * run il_down() without calling apm_ops.stop(), and there are 3804 * paths to avoid running il_down() at all before leaving driver. 3805 * This (inexpensive) call *makes sure* device is reset. 3806 */ 3807 il_apm_stop(il); 3808 3809 /* make sure we flush any pending irq or 3810 * tasklet for the driver 3811 */ 3812 spin_lock_irqsave(&il->lock, flags); 3813 il_disable_interrupts(il); 3814 spin_unlock_irqrestore(&il->lock, flags); 3815 3816 il3945_synchronize_irq(il); 3817 3818 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3819 3820 cancel_delayed_work_sync(&il->_3945.rfkill_poll); 3821 3822 il3945_dealloc_ucode_pci(il); 3823 3824 if (il->rxq.bd) 3825 il3945_rx_queue_free(il, &il->rxq); 3826 il3945_hw_txq_ctx_free(il); 3827 3828 il3945_unset_hw_params(il); 3829 3830 /*netif_stop_queue(dev); */ 3831 flush_workqueue(il->workqueue); 3832 3833 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes 3834 * il->workqueue... so we can't take down the workqueue 3835 * until now... */ 3836 destroy_workqueue(il->workqueue); 3837 il->workqueue = NULL; 3838 3839 free_irq(pdev->irq, il); 3840 pci_disable_msi(pdev); 3841 3842 iounmap(il->hw_base); 3843 pci_release_regions(pdev); 3844 pci_disable_device(pdev); 3845 3846 il_free_channel_map(il); 3847 il_free_geos(il); 3848 kfree(il->scan_cmd); 3849 if (il->beacon_skb) 3850 dev_kfree_skb(il->beacon_skb); 3851 3852 ieee80211_free_hw(il->hw); 3853 } 3854 3855 /***************************************************************************** 3856 * 3857 * driver and module entry point 3858 * 3859 *****************************************************************************/ 3860 3861 static struct pci_driver il3945_driver = { 3862 .name = DRV_NAME, 3863 .id_table = il3945_hw_card_ids, 3864 .probe = il3945_pci_probe, 3865 .remove = il3945_pci_remove, 3866 .driver.pm = IL_LEGACY_PM_OPS, 3867 }; 3868 3869 static int __init 3870 il3945_init(void) 3871 { 3872 3873 int ret; 3874 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); 3875 pr_info(DRV_COPYRIGHT "\n"); 3876 3877 /* 3878 * Disabling hardware scan means that mac80211 will perform scans 3879 * "the hard way", rather than using device's scan. 3880 */ 3881 if (il3945_mod_params.disable_hw_scan) { 3882 pr_info("hw_scan is disabled\n"); 3883 il3945_mac_ops.hw_scan = NULL; 3884 } 3885 3886 ret = il3945_rate_control_register(); 3887 if (ret) { 3888 pr_err("Unable to register rate control algorithm: %d\n", ret); 3889 return ret; 3890 } 3891 3892 ret = pci_register_driver(&il3945_driver); 3893 if (ret) { 3894 pr_err("Unable to initialize PCI module\n"); 3895 goto error_register; 3896 } 3897 3898 return ret; 3899 3900 error_register: 3901 il3945_rate_control_unregister(); 3902 return ret; 3903 } 3904 3905 static void __exit 3906 il3945_exit(void) 3907 { 3908 pci_unregister_driver(&il3945_driver); 3909 il3945_rate_control_unregister(); 3910 } 3911 3912 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX)); 3913 3914 module_param_named(antenna, il3945_mod_params.antenna, int, 0444); 3915 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 3916 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444); 3917 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])"); 3918 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int, 3919 0444); 3920 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); 3921 #ifdef CONFIG_IWLEGACY_DEBUG 3922 module_param_named(debug, il_debug_level, uint, 0644); 3923 MODULE_PARM_DESC(debug, "debug output mask"); 3924 #endif 3925 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444); 3926 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 3927 3928 module_exit(il3945_exit); 3929 module_init(il3945_init); 3930