1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29 
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
46 
47 #include <net/ieee80211_radiotap.h>
48 #include <net/mac80211.h>
49 
50 #include <asm/div64.h>
51 
52 #define DRV_NAME	"iwl3945"
53 
54 #include "commands.h"
55 #include "common.h"
56 #include "3945.h"
57 #include "iwl-spectrum.h"
58 
59 /*
60  * module name, copyright, version, etc.
61  */
62 
63 #define DRV_DESCRIPTION	\
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
65 
66 #ifdef CONFIG_IWLEGACY_DEBUG
67 #define VD "d"
68 #else
69 #define VD
70 #endif
71 
72 /*
73  * add "s" to indicate spectrum measurement included.
74  * we add it here to be consistent with previous releases in which
75  * this was configurable.
76  */
77 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
78 #define DRV_COPYRIGHT	"Copyright(c) 2003-2011 Intel Corporation"
79 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
80 
81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
82 MODULE_VERSION(DRV_VERSION);
83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
84 MODULE_LICENSE("GPL");
85 
86  /* module parameters */
87 struct il_mod_params il3945_mod_params = {
88 	.sw_crypto = 1,
89 	.restart_fw = 1,
90 	.disable_hw_scan = 1,
91 	/* the rest are 0 by default */
92 };
93 
94 /**
95  * il3945_get_antenna_flags - Get antenna flags for RXON command
96  * @il: eeprom and antenna fields are used to determine antenna flags
97  *
98  * il->eeprom39  is used to determine if antenna AUX/MAIN are reversed
99  * il3945_mod_params.antenna specifies the antenna diversity mode:
100  *
101  * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
102  * IL_ANTENNA_MAIN      - Force MAIN antenna
103  * IL_ANTENNA_AUX       - Force AUX antenna
104  */
105 __le32
106 il3945_get_antenna_flags(const struct il_priv *il)
107 {
108 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
109 
110 	switch (il3945_mod_params.antenna) {
111 	case IL_ANTENNA_DIVERSITY:
112 		return 0;
113 
114 	case IL_ANTENNA_MAIN:
115 		if (eeprom->antenna_switch_type)
116 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
117 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
118 
119 	case IL_ANTENNA_AUX:
120 		if (eeprom->antenna_switch_type)
121 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
123 	}
124 
125 	/* bad antenna selector value */
126 	IL_ERR("Bad antenna selector value (0x%x)\n",
127 	       il3945_mod_params.antenna);
128 
129 	return 0;		/* "diversity" is default if error */
130 }
131 
132 static int
133 il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
134 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
135 {
136 	unsigned long flags;
137 	__le16 key_flags = 0;
138 	int ret;
139 
140 	key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
141 	key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
142 
143 	if (sta_id == il->hw_params.bcast_id)
144 		key_flags |= STA_KEY_MULTICAST_MSK;
145 
146 	keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
147 	keyconf->hw_key_idx = keyconf->keyidx;
148 	key_flags &= ~STA_KEY_FLG_INVALID;
149 
150 	spin_lock_irqsave(&il->sta_lock, flags);
151 	il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
152 	il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
153 	memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
154 
155 	memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
156 
157 	if ((il->stations[sta_id].sta.key.
158 	     key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
159 		il->stations[sta_id].sta.key.key_offset =
160 		    il_get_free_ucode_key_idx(il);
161 	/* else, we are overriding an existing key => no need to allocated room
162 	 * in uCode. */
163 
164 	WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
165 	     "no space for a new key");
166 
167 	il->stations[sta_id].sta.key.key_flags = key_flags;
168 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
169 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
170 
171 	D_INFO("hwcrypto: modify ucode station key info\n");
172 
173 	ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
174 
175 	spin_unlock_irqrestore(&il->sta_lock, flags);
176 
177 	return ret;
178 }
179 
180 static int
181 il3945_set_tkip_dynamic_key_info(struct il_priv *il,
182 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
183 {
184 	return -EOPNOTSUPP;
185 }
186 
187 static int
188 il3945_set_wep_dynamic_key_info(struct il_priv *il,
189 				struct ieee80211_key_conf *keyconf, u8 sta_id)
190 {
191 	return -EOPNOTSUPP;
192 }
193 
194 static int
195 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
196 {
197 	unsigned long flags;
198 	struct il_addsta_cmd sta_cmd;
199 
200 	spin_lock_irqsave(&il->sta_lock, flags);
201 	memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
202 	memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
203 	il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
204 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
205 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
206 	memcpy(&sta_cmd, &il->stations[sta_id].sta,
207 	       sizeof(struct il_addsta_cmd));
208 	spin_unlock_irqrestore(&il->sta_lock, flags);
209 
210 	D_INFO("hwcrypto: clear ucode station key info\n");
211 	return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
212 }
213 
214 static int
215 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
216 		       u8 sta_id)
217 {
218 	int ret = 0;
219 
220 	keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221 
222 	switch (keyconf->cipher) {
223 	case WLAN_CIPHER_SUITE_CCMP:
224 		ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
225 		break;
226 	case WLAN_CIPHER_SUITE_TKIP:
227 		ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
228 		break;
229 	case WLAN_CIPHER_SUITE_WEP40:
230 	case WLAN_CIPHER_SUITE_WEP104:
231 		ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
232 		break;
233 	default:
234 		IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
235 		ret = -EINVAL;
236 	}
237 
238 	D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
239 	      keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
240 
241 	return ret;
242 }
243 
244 static int
245 il3945_remove_static_key(struct il_priv *il)
246 {
247 	int ret = -EOPNOTSUPP;
248 
249 	return ret;
250 }
251 
252 static int
253 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
254 {
255 	if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
256 	    key->cipher == WLAN_CIPHER_SUITE_WEP104)
257 		return -EOPNOTSUPP;
258 
259 	IL_ERR("Static key invalid: cipher %x\n", key->cipher);
260 	return -EINVAL;
261 }
262 
263 static void
264 il3945_clear_free_frames(struct il_priv *il)
265 {
266 	struct list_head *element;
267 
268 	D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
269 
270 	while (!list_empty(&il->free_frames)) {
271 		element = il->free_frames.next;
272 		list_del(element);
273 		kfree(list_entry(element, struct il3945_frame, list));
274 		il->frames_count--;
275 	}
276 
277 	if (il->frames_count) {
278 		IL_WARN("%d frames still in use.  Did we lose one?\n",
279 			il->frames_count);
280 		il->frames_count = 0;
281 	}
282 }
283 
284 static struct il3945_frame *
285 il3945_get_free_frame(struct il_priv *il)
286 {
287 	struct il3945_frame *frame;
288 	struct list_head *element;
289 	if (list_empty(&il->free_frames)) {
290 		frame = kzalloc(sizeof(*frame), GFP_KERNEL);
291 		if (!frame) {
292 			IL_ERR("Could not allocate frame!\n");
293 			return NULL;
294 		}
295 
296 		il->frames_count++;
297 		return frame;
298 	}
299 
300 	element = il->free_frames.next;
301 	list_del(element);
302 	return list_entry(element, struct il3945_frame, list);
303 }
304 
305 static void
306 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
307 {
308 	memset(frame, 0, sizeof(*frame));
309 	list_add(&frame->list, &il->free_frames);
310 }
311 
312 unsigned int
313 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
314 			 int left)
315 {
316 
317 	if (!il_is_associated(il) || !il->beacon_skb)
318 		return 0;
319 
320 	if (il->beacon_skb->len > left)
321 		return 0;
322 
323 	memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
324 
325 	return il->beacon_skb->len;
326 }
327 
328 static int
329 il3945_send_beacon_cmd(struct il_priv *il)
330 {
331 	struct il3945_frame *frame;
332 	unsigned int frame_size;
333 	int rc;
334 	u8 rate;
335 
336 	frame = il3945_get_free_frame(il);
337 
338 	if (!frame) {
339 		IL_ERR("Could not obtain free frame buffer for beacon "
340 		       "command.\n");
341 		return -ENOMEM;
342 	}
343 
344 	rate = il_get_lowest_plcp(il);
345 
346 	frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
347 
348 	rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
349 
350 	il3945_free_frame(il, frame);
351 
352 	return rc;
353 }
354 
355 static void
356 il3945_unset_hw_params(struct il_priv *il)
357 {
358 	if (il->_3945.shared_virt)
359 		dma_free_coherent(&il->pci_dev->dev,
360 				  sizeof(struct il3945_shared),
361 				  il->_3945.shared_virt, il->_3945.shared_phys);
362 }
363 
364 static void
365 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
366 			     struct il_device_cmd *cmd,
367 			     struct sk_buff *skb_frag, int sta_id)
368 {
369 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
370 	struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
371 
372 	tx_cmd->sec_ctl = 0;
373 
374 	switch (keyinfo->cipher) {
375 	case WLAN_CIPHER_SUITE_CCMP:
376 		tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
377 		memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
378 		D_TX("tx_cmd with AES hwcrypto\n");
379 		break;
380 
381 	case WLAN_CIPHER_SUITE_TKIP:
382 		break;
383 
384 	case WLAN_CIPHER_SUITE_WEP104:
385 		tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
386 		/* fall through */
387 	case WLAN_CIPHER_SUITE_WEP40:
388 		tx_cmd->sec_ctl |=
389 		    TX_CMD_SEC_WEP | (info->control.hw_key->
390 				      hw_key_idx & TX_CMD_SEC_MSK) <<
391 		    TX_CMD_SEC_SHIFT;
392 
393 		memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
394 
395 		D_TX("Configuring packet for WEP encryption " "with key %d\n",
396 		     info->control.hw_key->hw_key_idx);
397 		break;
398 
399 	default:
400 		IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
401 		break;
402 	}
403 }
404 
405 /*
406  * handle build C_TX command notification.
407  */
408 static void
409 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
410 			  struct ieee80211_tx_info *info,
411 			  struct ieee80211_hdr *hdr, u8 std_id)
412 {
413 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
414 	__le32 tx_flags = tx_cmd->tx_flags;
415 	__le16 fc = hdr->frame_control;
416 
417 	tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
418 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
419 		tx_flags |= TX_CMD_FLG_ACK_MSK;
420 		if (ieee80211_is_mgmt(fc))
421 			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 		if (ieee80211_is_probe_resp(fc) &&
423 		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
424 			tx_flags |= TX_CMD_FLG_TSF_MSK;
425 	} else {
426 		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
427 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
428 	}
429 
430 	tx_cmd->sta_id = std_id;
431 	if (ieee80211_has_morefrags(fc))
432 		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
433 
434 	if (ieee80211_is_data_qos(fc)) {
435 		u8 *qc = ieee80211_get_qos_ctl(hdr);
436 		tx_cmd->tid_tspec = qc[0] & 0xf;
437 		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
438 	} else {
439 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
440 	}
441 
442 	il_tx_cmd_protection(il, info, fc, &tx_flags);
443 
444 	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
445 	if (ieee80211_is_mgmt(fc)) {
446 		if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
447 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
448 		else
449 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
450 	} else {
451 		tx_cmd->timeout.pm_frame_timeout = 0;
452 	}
453 
454 	tx_cmd->driver_txop = 0;
455 	tx_cmd->tx_flags = tx_flags;
456 	tx_cmd->next_frame_len = 0;
457 }
458 
459 /*
460  * start C_TX command process
461  */
462 static int
463 il3945_tx_skb(struct il_priv *il,
464 	      struct ieee80211_sta *sta,
465 	      struct sk_buff *skb)
466 {
467 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
468 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
469 	struct il3945_tx_cmd *tx_cmd;
470 	struct il_tx_queue *txq = NULL;
471 	struct il_queue *q = NULL;
472 	struct il_device_cmd *out_cmd;
473 	struct il_cmd_meta *out_meta;
474 	dma_addr_t phys_addr;
475 	dma_addr_t txcmd_phys;
476 	int txq_id = skb_get_queue_mapping(skb);
477 	u16 len, idx, hdr_len;
478 	u16 firstlen, secondlen;
479 	u8 sta_id;
480 	u8 tid = 0;
481 	__le16 fc;
482 	u8 wait_write_ptr = 0;
483 	unsigned long flags;
484 
485 	spin_lock_irqsave(&il->lock, flags);
486 	if (il_is_rfkill(il)) {
487 		D_DROP("Dropping - RF KILL\n");
488 		goto drop_unlock;
489 	}
490 
491 	if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
492 	    IL_INVALID_RATE) {
493 		IL_ERR("ERROR: No TX rate available.\n");
494 		goto drop_unlock;
495 	}
496 
497 	fc = hdr->frame_control;
498 
499 #ifdef CONFIG_IWLEGACY_DEBUG
500 	if (ieee80211_is_auth(fc))
501 		D_TX("Sending AUTH frame\n");
502 	else if (ieee80211_is_assoc_req(fc))
503 		D_TX("Sending ASSOC frame\n");
504 	else if (ieee80211_is_reassoc_req(fc))
505 		D_TX("Sending REASSOC frame\n");
506 #endif
507 
508 	spin_unlock_irqrestore(&il->lock, flags);
509 
510 	hdr_len = ieee80211_hdrlen(fc);
511 
512 	/* Find idx into station table for destination station */
513 	sta_id = il_sta_id_or_broadcast(il, sta);
514 	if (sta_id == IL_INVALID_STATION) {
515 		D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
516 		goto drop;
517 	}
518 
519 	D_RATE("station Id %d\n", sta_id);
520 
521 	if (ieee80211_is_data_qos(fc)) {
522 		u8 *qc = ieee80211_get_qos_ctl(hdr);
523 		tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
524 		if (unlikely(tid >= MAX_TID_COUNT))
525 			goto drop;
526 	}
527 
528 	/* Descriptor for chosen Tx queue */
529 	txq = &il->txq[txq_id];
530 	q = &txq->q;
531 
532 	if ((il_queue_space(q) < q->high_mark))
533 		goto drop;
534 
535 	spin_lock_irqsave(&il->lock, flags);
536 
537 	idx = il_get_cmd_idx(q, q->write_ptr, 0);
538 
539 	txq->skbs[q->write_ptr] = skb;
540 
541 	/* Init first empty entry in queue's array of Tx/cmd buffers */
542 	out_cmd = txq->cmd[idx];
543 	out_meta = &txq->meta[idx];
544 	tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
545 	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
546 	memset(tx_cmd, 0, sizeof(*tx_cmd));
547 
548 	/*
549 	 * Set up the Tx-command (not MAC!) header.
550 	 * Store the chosen Tx queue and TFD idx within the sequence field;
551 	 * after Tx, uCode's Tx response will return this value so driver can
552 	 * locate the frame within the tx queue and do post-tx processing.
553 	 */
554 	out_cmd->hdr.cmd = C_TX;
555 	out_cmd->hdr.sequence =
556 	    cpu_to_le16((u16)
557 			(QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
558 
559 	/* Copy MAC header from skb into command buffer */
560 	memcpy(tx_cmd->hdr, hdr, hdr_len);
561 
562 	if (info->control.hw_key)
563 		il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
564 
565 	/* TODO need this for burst mode later on */
566 	il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
567 
568 	il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
569 
570 	/* Total # bytes to be transmitted */
571 	tx_cmd->len = cpu_to_le16((u16) skb->len);
572 
573 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
574 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
575 
576 	/*
577 	 * Use the first empty entry in this queue's command buffer array
578 	 * to contain the Tx command and MAC header concatenated together
579 	 * (payload data will be in another buffer).
580 	 * Size of this varies, due to varying MAC header length.
581 	 * If end is not dword aligned, we'll have 2 extra bytes at the end
582 	 * of the MAC header (device reads on dword boundaries).
583 	 * We'll tell device about this padding later.
584 	 */
585 	len =
586 	    sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
587 	    hdr_len;
588 	firstlen = (len + 3) & ~3;
589 
590 	/* Physical address of this Tx command's header (not MAC header!),
591 	 * within command buffer array. */
592 	txcmd_phys =
593 	    pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
594 			   PCI_DMA_TODEVICE);
595 	if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
596 		goto drop_unlock;
597 
598 	/* Set up TFD's 2nd entry to point directly to remainder of skb,
599 	 * if any (802.11 null frames have no payload). */
600 	secondlen = skb->len - hdr_len;
601 	if (secondlen > 0) {
602 		phys_addr =
603 		    pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
604 				   PCI_DMA_TODEVICE);
605 		if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
606 			goto drop_unlock;
607 	}
608 
609 	/* Add buffer containing Tx command and MAC(!) header to TFD's
610 	 * first entry */
611 	il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
612 	dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
613 	dma_unmap_len_set(out_meta, len, firstlen);
614 	if (secondlen > 0)
615 		il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
616 					       U32_PAD(secondlen));
617 
618 	if (!ieee80211_has_morefrags(hdr->frame_control)) {
619 		txq->need_update = 1;
620 	} else {
621 		wait_write_ptr = 1;
622 		txq->need_update = 0;
623 	}
624 
625 	il_update_stats(il, true, fc, skb->len);
626 
627 	D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
628 	D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
629 	il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
630 	il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
631 			  ieee80211_hdrlen(fc));
632 
633 	/* Tell device the write idx *just past* this latest filled TFD */
634 	q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
635 	il_txq_update_write_ptr(il, txq);
636 	spin_unlock_irqrestore(&il->lock, flags);
637 
638 	if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
639 		if (wait_write_ptr) {
640 			spin_lock_irqsave(&il->lock, flags);
641 			txq->need_update = 1;
642 			il_txq_update_write_ptr(il, txq);
643 			spin_unlock_irqrestore(&il->lock, flags);
644 		}
645 
646 		il_stop_queue(il, txq);
647 	}
648 
649 	return 0;
650 
651 drop_unlock:
652 	spin_unlock_irqrestore(&il->lock, flags);
653 drop:
654 	return -1;
655 }
656 
657 static int
658 il3945_get_measurement(struct il_priv *il,
659 		       struct ieee80211_measurement_params *params, u8 type)
660 {
661 	struct il_spectrum_cmd spectrum;
662 	struct il_rx_pkt *pkt;
663 	struct il_host_cmd cmd = {
664 		.id = C_SPECTRUM_MEASUREMENT,
665 		.data = (void *)&spectrum,
666 		.flags = CMD_WANT_SKB,
667 	};
668 	u32 add_time = le64_to_cpu(params->start_time);
669 	int rc;
670 	int spectrum_resp_status;
671 	int duration = le16_to_cpu(params->duration);
672 
673 	if (il_is_associated(il))
674 		add_time =
675 		    il_usecs_to_beacons(il,
676 					le64_to_cpu(params->start_time) -
677 					il->_3945.last_tsf,
678 					le16_to_cpu(il->timing.beacon_interval));
679 
680 	memset(&spectrum, 0, sizeof(spectrum));
681 
682 	spectrum.channel_count = cpu_to_le16(1);
683 	spectrum.flags =
684 	    RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
685 	spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
686 	cmd.len = sizeof(spectrum);
687 	spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
688 
689 	if (il_is_associated(il))
690 		spectrum.start_time =
691 		    il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
692 				       le16_to_cpu(il->timing.beacon_interval));
693 	else
694 		spectrum.start_time = 0;
695 
696 	spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
697 	spectrum.channels[0].channel = params->channel;
698 	spectrum.channels[0].type = type;
699 	if (il->active.flags & RXON_FLG_BAND_24G_MSK)
700 		spectrum.flags |=
701 		    RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
702 		    RXON_FLG_TGG_PROTECT_MSK;
703 
704 	rc = il_send_cmd_sync(il, &cmd);
705 	if (rc)
706 		return rc;
707 
708 	pkt = (struct il_rx_pkt *)cmd.reply_page;
709 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
710 		IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
711 		rc = -EIO;
712 	}
713 
714 	spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
715 	switch (spectrum_resp_status) {
716 	case 0:		/* Command will be handled */
717 		if (pkt->u.spectrum.id != 0xff) {
718 			D_INFO("Replaced existing measurement: %d\n",
719 			       pkt->u.spectrum.id);
720 			il->measurement_status &= ~MEASUREMENT_READY;
721 		}
722 		il->measurement_status |= MEASUREMENT_ACTIVE;
723 		rc = 0;
724 		break;
725 
726 	case 1:		/* Command will not be handled */
727 		rc = -EAGAIN;
728 		break;
729 	}
730 
731 	il_free_pages(il, cmd.reply_page);
732 
733 	return rc;
734 }
735 
736 static void
737 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
738 {
739 	struct il_rx_pkt *pkt = rxb_addr(rxb);
740 	struct il_alive_resp *palive;
741 	struct delayed_work *pwork;
742 
743 	palive = &pkt->u.alive_frame;
744 
745 	D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
746 	       palive->is_valid, palive->ver_type, palive->ver_subtype);
747 
748 	if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
749 		D_INFO("Initialization Alive received.\n");
750 		memcpy(&il->card_alive_init, &pkt->u.alive_frame,
751 		       sizeof(struct il_alive_resp));
752 		pwork = &il->init_alive_start;
753 	} else {
754 		D_INFO("Runtime Alive received.\n");
755 		memcpy(&il->card_alive, &pkt->u.alive_frame,
756 		       sizeof(struct il_alive_resp));
757 		pwork = &il->alive_start;
758 		il3945_disable_events(il);
759 	}
760 
761 	/* We delay the ALIVE response by 5ms to
762 	 * give the HW RF Kill time to activate... */
763 	if (palive->is_valid == UCODE_VALID_OK)
764 		queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
765 	else
766 		IL_WARN("uCode did not respond OK.\n");
767 }
768 
769 static void
770 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
771 {
772 #ifdef CONFIG_IWLEGACY_DEBUG
773 	struct il_rx_pkt *pkt = rxb_addr(rxb);
774 #endif
775 
776 	D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
777 }
778 
779 static void
780 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
781 {
782 	struct il_rx_pkt *pkt = rxb_addr(rxb);
783 	struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
784 #ifdef CONFIG_IWLEGACY_DEBUG
785 	u8 rate = beacon->beacon_notify_hdr.rate;
786 
787 	D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
788 	     le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
789 	     beacon->beacon_notify_hdr.failure_frame,
790 	     le32_to_cpu(beacon->ibss_mgr_status),
791 	     le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
792 #endif
793 
794 	il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
795 
796 }
797 
798 /* Handle notification from uCode that card's power state is changing
799  * due to software, hardware, or critical temperature RFKILL */
800 static void
801 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
802 {
803 	struct il_rx_pkt *pkt = rxb_addr(rxb);
804 	u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
805 	unsigned long status = il->status;
806 
807 	IL_WARN("Card state received: HW:%s SW:%s\n",
808 		(flags & HW_CARD_DISABLED) ? "Kill" : "On",
809 		(flags & SW_CARD_DISABLED) ? "Kill" : "On");
810 
811 	_il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
812 
813 	if (flags & HW_CARD_DISABLED)
814 		set_bit(S_RFKILL, &il->status);
815 	else
816 		clear_bit(S_RFKILL, &il->status);
817 
818 	il_scan_cancel(il);
819 
820 	if ((test_bit(S_RFKILL, &status) !=
821 	     test_bit(S_RFKILL, &il->status)))
822 		wiphy_rfkill_set_hw_state(il->hw->wiphy,
823 					  test_bit(S_RFKILL, &il->status));
824 	else
825 		wake_up(&il->wait_command_queue);
826 }
827 
828 /**
829  * il3945_setup_handlers - Initialize Rx handler callbacks
830  *
831  * Setup the RX handlers for each of the reply types sent from the uCode
832  * to the host.
833  *
834  * This function chains into the hardware specific files for them to setup
835  * any hardware specific handlers as well.
836  */
837 static void
838 il3945_setup_handlers(struct il_priv *il)
839 {
840 	il->handlers[N_ALIVE] = il3945_hdl_alive;
841 	il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
842 	il->handlers[N_ERROR] = il_hdl_error;
843 	il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
844 	il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
845 	il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
846 	il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
847 	il->handlers[N_BEACON] = il3945_hdl_beacon;
848 
849 	/*
850 	 * The same handler is used for both the REPLY to a discrete
851 	 * stats request from the host as well as for the periodic
852 	 * stats notifications (after received beacons) from the uCode.
853 	 */
854 	il->handlers[C_STATS] = il3945_hdl_c_stats;
855 	il->handlers[N_STATS] = il3945_hdl_stats;
856 
857 	il_setup_rx_scan_handlers(il);
858 	il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
859 
860 	/* Set up hardware specific Rx handlers */
861 	il3945_hw_handler_setup(il);
862 }
863 
864 /************************** RX-FUNCTIONS ****************************/
865 /*
866  * Rx theory of operation
867  *
868  * The host allocates 32 DMA target addresses and passes the host address
869  * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
870  * 0 to 31
871  *
872  * Rx Queue Indexes
873  * The host/firmware share two idx registers for managing the Rx buffers.
874  *
875  * The READ idx maps to the first position that the firmware may be writing
876  * to -- the driver can read up to (but not including) this position and get
877  * good data.
878  * The READ idx is managed by the firmware once the card is enabled.
879  *
880  * The WRITE idx maps to the last position the driver has read from -- the
881  * position preceding WRITE is the last slot the firmware can place a packet.
882  *
883  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
884  * WRITE = READ.
885  *
886  * During initialization, the host sets up the READ queue position to the first
887  * IDX position, and WRITE to the last (READ - 1 wrapped)
888  *
889  * When the firmware places a packet in a buffer, it will advance the READ idx
890  * and fire the RX interrupt.  The driver can then query the READ idx and
891  * process as many packets as possible, moving the WRITE idx forward as it
892  * resets the Rx queue buffers with new memory.
893  *
894  * The management in the driver is as follows:
895  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
896  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
897  *   to replenish the iwl->rxq->rx_free.
898  * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
899  *   iwl->rxq is replenished and the READ IDX is updated (updating the
900  *   'processed' and 'read' driver idxes as well)
901  * + A received packet is processed and handed to the kernel network stack,
902  *   detached from the iwl->rxq.  The driver 'processed' idx is updated.
903  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
904  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
905  *   IDX is not incremented and iwl->status(RX_STALLED) is set.  If there
906  *   were enough free buffers and RX_STALLED is set it is cleared.
907  *
908  *
909  * Driver sequence:
910  *
911  * il3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
912  *                            il3945_rx_queue_restock
913  * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
914  *                            queue, updates firmware pointers, and updates
915  *                            the WRITE idx.  If insufficient rx_free buffers
916  *                            are available, schedules il3945_rx_replenish
917  *
918  * -- enable interrupts --
919  * ISR - il3945_rx()         Detach il_rx_bufs from pool up to the
920  *                            READ IDX, detaching the SKB from the pool.
921  *                            Moves the packet buffer from queue to rx_used.
922  *                            Calls il3945_rx_queue_restock to refill any empty
923  *                            slots.
924  * ...
925  *
926  */
927 
928 /**
929  * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
930  */
931 static inline __le32
932 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
933 {
934 	return cpu_to_le32((u32) dma_addr);
935 }
936 
937 /**
938  * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
939  *
940  * If there are slots in the RX queue that need to be restocked,
941  * and we have free pre-allocated buffers, fill the ranks as much
942  * as we can, pulling from rx_free.
943  *
944  * This moves the 'write' idx forward to catch up with 'processed', and
945  * also updates the memory address in the firmware to reference the new
946  * target buffer.
947  */
948 static void
949 il3945_rx_queue_restock(struct il_priv *il)
950 {
951 	struct il_rx_queue *rxq = &il->rxq;
952 	struct list_head *element;
953 	struct il_rx_buf *rxb;
954 	unsigned long flags;
955 
956 	spin_lock_irqsave(&rxq->lock, flags);
957 	while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
958 		/* Get next free Rx buffer, remove from free list */
959 		element = rxq->rx_free.next;
960 		rxb = list_entry(element, struct il_rx_buf, list);
961 		list_del(element);
962 
963 		/* Point to Rx buffer via next RBD in circular buffer */
964 		rxq->bd[rxq->write] =
965 		    il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
966 		rxq->queue[rxq->write] = rxb;
967 		rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
968 		rxq->free_count--;
969 	}
970 	spin_unlock_irqrestore(&rxq->lock, flags);
971 	/* If the pre-allocated buffer pool is dropping low, schedule to
972 	 * refill it */
973 	if (rxq->free_count <= RX_LOW_WATERMARK)
974 		queue_work(il->workqueue, &il->rx_replenish);
975 
976 	/* If we've added more space for the firmware to place data, tell it.
977 	 * Increment device's write pointer in multiples of 8. */
978 	if (rxq->write_actual != (rxq->write & ~0x7) ||
979 	    abs(rxq->write - rxq->read) > 7) {
980 		spin_lock_irqsave(&rxq->lock, flags);
981 		rxq->need_update = 1;
982 		spin_unlock_irqrestore(&rxq->lock, flags);
983 		il_rx_queue_update_write_ptr(il, rxq);
984 	}
985 }
986 
987 /**
988  * il3945_rx_replenish - Move all used packet from rx_used to rx_free
989  *
990  * When moving to rx_free an SKB is allocated for the slot.
991  *
992  * Also restock the Rx queue via il3945_rx_queue_restock.
993  * This is called as a scheduled work item (except for during initialization)
994  */
995 static void
996 il3945_rx_allocate(struct il_priv *il, gfp_t priority)
997 {
998 	struct il_rx_queue *rxq = &il->rxq;
999 	struct list_head *element;
1000 	struct il_rx_buf *rxb;
1001 	struct page *page;
1002 	dma_addr_t page_dma;
1003 	unsigned long flags;
1004 	gfp_t gfp_mask = priority;
1005 
1006 	while (1) {
1007 		spin_lock_irqsave(&rxq->lock, flags);
1008 		if (list_empty(&rxq->rx_used)) {
1009 			spin_unlock_irqrestore(&rxq->lock, flags);
1010 			return;
1011 		}
1012 		spin_unlock_irqrestore(&rxq->lock, flags);
1013 
1014 		if (rxq->free_count > RX_LOW_WATERMARK)
1015 			gfp_mask |= __GFP_NOWARN;
1016 
1017 		if (il->hw_params.rx_page_order > 0)
1018 			gfp_mask |= __GFP_COMP;
1019 
1020 		/* Alloc a new receive buffer */
1021 		page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1022 		if (!page) {
1023 			if (net_ratelimit())
1024 				D_INFO("Failed to allocate SKB buffer.\n");
1025 			if (rxq->free_count <= RX_LOW_WATERMARK &&
1026 			    net_ratelimit())
1027 				IL_ERR("Failed to allocate SKB buffer with %0x."
1028 				       "Only %u free buffers remaining.\n",
1029 				       priority, rxq->free_count);
1030 			/* We don't reschedule replenish work here -- we will
1031 			 * call the restock method and if it still needs
1032 			 * more buffers it will schedule replenish */
1033 			break;
1034 		}
1035 
1036 		/* Get physical address of RB/SKB */
1037 		page_dma =
1038 		    pci_map_page(il->pci_dev, page, 0,
1039 				 PAGE_SIZE << il->hw_params.rx_page_order,
1040 				 PCI_DMA_FROMDEVICE);
1041 
1042 		if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
1043 			__free_pages(page, il->hw_params.rx_page_order);
1044 			break;
1045 		}
1046 
1047 		spin_lock_irqsave(&rxq->lock, flags);
1048 
1049 		if (list_empty(&rxq->rx_used)) {
1050 			spin_unlock_irqrestore(&rxq->lock, flags);
1051 			pci_unmap_page(il->pci_dev, page_dma,
1052 				       PAGE_SIZE << il->hw_params.rx_page_order,
1053 				       PCI_DMA_FROMDEVICE);
1054 			__free_pages(page, il->hw_params.rx_page_order);
1055 			return;
1056 		}
1057 
1058 		element = rxq->rx_used.next;
1059 		rxb = list_entry(element, struct il_rx_buf, list);
1060 		list_del(element);
1061 
1062 		rxb->page = page;
1063 		rxb->page_dma = page_dma;
1064 		list_add_tail(&rxb->list, &rxq->rx_free);
1065 		rxq->free_count++;
1066 		il->alloc_rxb_page++;
1067 
1068 		spin_unlock_irqrestore(&rxq->lock, flags);
1069 	}
1070 }
1071 
1072 void
1073 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1074 {
1075 	unsigned long flags;
1076 	int i;
1077 	spin_lock_irqsave(&rxq->lock, flags);
1078 	INIT_LIST_HEAD(&rxq->rx_free);
1079 	INIT_LIST_HEAD(&rxq->rx_used);
1080 	/* Fill the rx_used queue with _all_ of the Rx buffers */
1081 	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1082 		/* In the reset function, these buffers may have been allocated
1083 		 * to an SKB, so we need to unmap and free potential storage */
1084 		if (rxq->pool[i].page != NULL) {
1085 			pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1086 				       PAGE_SIZE << il->hw_params.rx_page_order,
1087 				       PCI_DMA_FROMDEVICE);
1088 			__il_free_pages(il, rxq->pool[i].page);
1089 			rxq->pool[i].page = NULL;
1090 		}
1091 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1092 	}
1093 
1094 	/* Set us so that we have processed and used all buffers, but have
1095 	 * not restocked the Rx queue with fresh buffers */
1096 	rxq->read = rxq->write = 0;
1097 	rxq->write_actual = 0;
1098 	rxq->free_count = 0;
1099 	spin_unlock_irqrestore(&rxq->lock, flags);
1100 }
1101 
1102 void
1103 il3945_rx_replenish(void *data)
1104 {
1105 	struct il_priv *il = data;
1106 	unsigned long flags;
1107 
1108 	il3945_rx_allocate(il, GFP_KERNEL);
1109 
1110 	spin_lock_irqsave(&il->lock, flags);
1111 	il3945_rx_queue_restock(il);
1112 	spin_unlock_irqrestore(&il->lock, flags);
1113 }
1114 
1115 static void
1116 il3945_rx_replenish_now(struct il_priv *il)
1117 {
1118 	il3945_rx_allocate(il, GFP_ATOMIC);
1119 
1120 	il3945_rx_queue_restock(il);
1121 }
1122 
1123 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1124  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1125  * This free routine walks the list of POOL entries and if SKB is set to
1126  * non NULL it is unmapped and freed
1127  */
1128 static void
1129 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1130 {
1131 	int i;
1132 	for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1133 		if (rxq->pool[i].page != NULL) {
1134 			pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1135 				       PAGE_SIZE << il->hw_params.rx_page_order,
1136 				       PCI_DMA_FROMDEVICE);
1137 			__il_free_pages(il, rxq->pool[i].page);
1138 			rxq->pool[i].page = NULL;
1139 		}
1140 	}
1141 
1142 	dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1143 			  rxq->bd_dma);
1144 	dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1145 			  rxq->rb_stts, rxq->rb_stts_dma);
1146 	rxq->bd = NULL;
1147 	rxq->rb_stts = NULL;
1148 }
1149 
1150 /* Convert linear signal-to-noise ratio into dB */
1151 static u8 ratio2dB[100] = {
1152 /*	 0   1   2   3   4   5   6   7   8   9 */
1153 	0, 0, 6, 10, 12, 14, 16, 17, 18, 19,	/* 00 - 09 */
1154 	20, 21, 22, 22, 23, 23, 24, 25, 26, 26,	/* 10 - 19 */
1155 	26, 26, 26, 27, 27, 28, 28, 28, 29, 29,	/* 20 - 29 */
1156 	29, 30, 30, 30, 31, 31, 31, 31, 32, 32,	/* 30 - 39 */
1157 	32, 32, 32, 33, 33, 33, 33, 33, 34, 34,	/* 40 - 49 */
1158 	34, 34, 34, 34, 35, 35, 35, 35, 35, 35,	/* 50 - 59 */
1159 	36, 36, 36, 36, 36, 36, 36, 37, 37, 37,	/* 60 - 69 */
1160 	37, 37, 37, 37, 37, 38, 38, 38, 38, 38,	/* 70 - 79 */
1161 	38, 38, 38, 38, 38, 39, 39, 39, 39, 39,	/* 80 - 89 */
1162 	39, 39, 39, 39, 39, 40, 40, 40, 40, 40	/* 90 - 99 */
1163 };
1164 
1165 /* Calculates a relative dB value from a ratio of linear
1166  *   (i.e. not dB) signal levels.
1167  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1168 int
1169 il3945_calc_db_from_ratio(int sig_ratio)
1170 {
1171 	/* 1000:1 or higher just report as 60 dB */
1172 	if (sig_ratio >= 1000)
1173 		return 60;
1174 
1175 	/* 100:1 or higher, divide by 10 and use table,
1176 	 *   add 20 dB to make up for divide by 10 */
1177 	if (sig_ratio >= 100)
1178 		return 20 + (int)ratio2dB[sig_ratio / 10];
1179 
1180 	/* We shouldn't see this */
1181 	if (sig_ratio < 1)
1182 		return 0;
1183 
1184 	/* Use table for ratios 1:1 - 99:1 */
1185 	return (int)ratio2dB[sig_ratio];
1186 }
1187 
1188 /**
1189  * il3945_rx_handle - Main entry function for receiving responses from uCode
1190  *
1191  * Uses the il->handlers callback function array to invoke
1192  * the appropriate handlers, including command responses,
1193  * frame-received notifications, and other notifications.
1194  */
1195 static void
1196 il3945_rx_handle(struct il_priv *il)
1197 {
1198 	struct il_rx_buf *rxb;
1199 	struct il_rx_pkt *pkt;
1200 	struct il_rx_queue *rxq = &il->rxq;
1201 	u32 r, i;
1202 	int reclaim;
1203 	unsigned long flags;
1204 	u8 fill_rx = 0;
1205 	u32 count = 8;
1206 	int total_empty = 0;
1207 
1208 	/* uCode's read idx (stored in shared DRAM) indicates the last Rx
1209 	 * buffer that the driver may process (last buffer filled by ucode). */
1210 	r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1211 	i = rxq->read;
1212 
1213 	/* calculate total frames need to be restock after handling RX */
1214 	total_empty = r - rxq->write_actual;
1215 	if (total_empty < 0)
1216 		total_empty += RX_QUEUE_SIZE;
1217 
1218 	if (total_empty > (RX_QUEUE_SIZE / 2))
1219 		fill_rx = 1;
1220 	/* Rx interrupt, but nothing sent from uCode */
1221 	if (i == r)
1222 		D_RX("r = %d, i = %d\n", r, i);
1223 
1224 	while (i != r) {
1225 		int len;
1226 
1227 		rxb = rxq->queue[i];
1228 
1229 		/* If an RXB doesn't have a Rx queue slot associated with it,
1230 		 * then a bug has been introduced in the queue refilling
1231 		 * routines -- catch it here */
1232 		BUG_ON(rxb == NULL);
1233 
1234 		rxq->queue[i] = NULL;
1235 
1236 		pci_unmap_page(il->pci_dev, rxb->page_dma,
1237 			       PAGE_SIZE << il->hw_params.rx_page_order,
1238 			       PCI_DMA_FROMDEVICE);
1239 		pkt = rxb_addr(rxb);
1240 
1241 		len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1242 		len += sizeof(u32);	/* account for status word */
1243 
1244 		reclaim = il_need_reclaim(il, pkt);
1245 
1246 		/* Based on type of command response or notification,
1247 		 *   handle those that need handling via function in
1248 		 *   handlers table.  See il3945_setup_handlers() */
1249 		if (il->handlers[pkt->hdr.cmd]) {
1250 			D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1251 			     il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1252 			il->isr_stats.handlers[pkt->hdr.cmd]++;
1253 			il->handlers[pkt->hdr.cmd] (il, rxb);
1254 		} else {
1255 			/* No handling needed */
1256 			D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1257 			     i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1258 		}
1259 
1260 		/*
1261 		 * XXX: After here, we should always check rxb->page
1262 		 * against NULL before touching it or its virtual
1263 		 * memory (pkt). Because some handler might have
1264 		 * already taken or freed the pages.
1265 		 */
1266 
1267 		if (reclaim) {
1268 			/* Invoke any callbacks, transfer the buffer to caller,
1269 			 * and fire off the (possibly) blocking il_send_cmd()
1270 			 * as we reclaim the driver command queue */
1271 			if (rxb->page)
1272 				il_tx_cmd_complete(il, rxb);
1273 			else
1274 				IL_WARN("Claim null rxb?\n");
1275 		}
1276 
1277 		/* Reuse the page if possible. For notification packets and
1278 		 * SKBs that fail to Rx correctly, add them back into the
1279 		 * rx_free list for reuse later. */
1280 		spin_lock_irqsave(&rxq->lock, flags);
1281 		if (rxb->page != NULL) {
1282 			rxb->page_dma =
1283 			    pci_map_page(il->pci_dev, rxb->page, 0,
1284 					 PAGE_SIZE << il->hw_params.
1285 					 rx_page_order, PCI_DMA_FROMDEVICE);
1286 			if (unlikely(pci_dma_mapping_error(il->pci_dev,
1287 							   rxb->page_dma))) {
1288 				__il_free_pages(il, rxb->page);
1289 				rxb->page = NULL;
1290 				list_add_tail(&rxb->list, &rxq->rx_used);
1291 			} else {
1292 				list_add_tail(&rxb->list, &rxq->rx_free);
1293 				rxq->free_count++;
1294 			}
1295 		} else
1296 			list_add_tail(&rxb->list, &rxq->rx_used);
1297 
1298 		spin_unlock_irqrestore(&rxq->lock, flags);
1299 
1300 		i = (i + 1) & RX_QUEUE_MASK;
1301 		/* If there are a lot of unused frames,
1302 		 * restock the Rx queue so ucode won't assert. */
1303 		if (fill_rx) {
1304 			count++;
1305 			if (count >= 8) {
1306 				rxq->read = i;
1307 				il3945_rx_replenish_now(il);
1308 				count = 0;
1309 			}
1310 		}
1311 	}
1312 
1313 	/* Backtrack one entry */
1314 	rxq->read = i;
1315 	if (fill_rx)
1316 		il3945_rx_replenish_now(il);
1317 	else
1318 		il3945_rx_queue_restock(il);
1319 }
1320 
1321 /* call this function to flush any scheduled tasklet */
1322 static inline void
1323 il3945_synchronize_irq(struct il_priv *il)
1324 {
1325 	/* wait to make sure we flush pending tasklet */
1326 	synchronize_irq(il->pci_dev->irq);
1327 	tasklet_kill(&il->irq_tasklet);
1328 }
1329 
1330 static const char *
1331 il3945_desc_lookup(int i)
1332 {
1333 	switch (i) {
1334 	case 1:
1335 		return "FAIL";
1336 	case 2:
1337 		return "BAD_PARAM";
1338 	case 3:
1339 		return "BAD_CHECKSUM";
1340 	case 4:
1341 		return "NMI_INTERRUPT";
1342 	case 5:
1343 		return "SYSASSERT";
1344 	case 6:
1345 		return "FATAL_ERROR";
1346 	}
1347 
1348 	return "UNKNOWN";
1349 }
1350 
1351 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1352 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1353 
1354 void
1355 il3945_dump_nic_error_log(struct il_priv *il)
1356 {
1357 	u32 i;
1358 	u32 desc, time, count, base, data1;
1359 	u32 blink1, blink2, ilink1, ilink2;
1360 
1361 	base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1362 
1363 	if (!il3945_hw_valid_rtc_data_addr(base)) {
1364 		IL_ERR("Not valid error log pointer 0x%08X\n", base);
1365 		return;
1366 	}
1367 
1368 	count = il_read_targ_mem(il, base);
1369 
1370 	if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1371 		IL_ERR("Start IWL Error Log Dump:\n");
1372 		IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1373 	}
1374 
1375 	IL_ERR("Desc       Time       asrtPC  blink2 "
1376 	       "ilink1  nmiPC   Line\n");
1377 	for (i = ERROR_START_OFFSET;
1378 	     i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1379 	     i += ERROR_ELEM_SIZE) {
1380 		desc = il_read_targ_mem(il, base + i);
1381 		time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1382 		blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1383 		blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1384 		ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1385 		ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1386 		data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1387 
1388 		IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1389 		       il3945_desc_lookup(desc), desc, time, blink1, blink2,
1390 		       ilink1, ilink2, data1);
1391 	}
1392 }
1393 
1394 static void
1395 il3945_irq_tasklet(struct il_priv *il)
1396 {
1397 	u32 inta, handled = 0;
1398 	u32 inta_fh;
1399 	unsigned long flags;
1400 #ifdef CONFIG_IWLEGACY_DEBUG
1401 	u32 inta_mask;
1402 #endif
1403 
1404 	spin_lock_irqsave(&il->lock, flags);
1405 
1406 	/* Ack/clear/reset pending uCode interrupts.
1407 	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1408 	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1409 	inta = _il_rd(il, CSR_INT);
1410 	_il_wr(il, CSR_INT, inta);
1411 
1412 	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
1413 	 * Any new interrupts that happen after this, either while we're
1414 	 * in this tasklet, or later, will show up in next ISR/tasklet. */
1415 	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1416 	_il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1417 
1418 #ifdef CONFIG_IWLEGACY_DEBUG
1419 	if (il_get_debug_level(il) & IL_DL_ISR) {
1420 		/* just for debug */
1421 		inta_mask = _il_rd(il, CSR_INT_MASK);
1422 		D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1423 		      inta_mask, inta_fh);
1424 	}
1425 #endif
1426 
1427 	spin_unlock_irqrestore(&il->lock, flags);
1428 
1429 	/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1430 	 * atomic, make sure that inta covers all the interrupts that
1431 	 * we've discovered, even if FH interrupt came in just after
1432 	 * reading CSR_INT. */
1433 	if (inta_fh & CSR39_FH_INT_RX_MASK)
1434 		inta |= CSR_INT_BIT_FH_RX;
1435 	if (inta_fh & CSR39_FH_INT_TX_MASK)
1436 		inta |= CSR_INT_BIT_FH_TX;
1437 
1438 	/* Now service all interrupt bits discovered above. */
1439 	if (inta & CSR_INT_BIT_HW_ERR) {
1440 		IL_ERR("Hardware error detected.  Restarting.\n");
1441 
1442 		/* Tell the device to stop sending interrupts */
1443 		il_disable_interrupts(il);
1444 
1445 		il->isr_stats.hw++;
1446 		il_irq_handle_error(il);
1447 
1448 		handled |= CSR_INT_BIT_HW_ERR;
1449 
1450 		return;
1451 	}
1452 #ifdef CONFIG_IWLEGACY_DEBUG
1453 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
1454 		/* NIC fires this, but we don't use it, redundant with WAKEUP */
1455 		if (inta & CSR_INT_BIT_SCD) {
1456 			D_ISR("Scheduler finished to transmit "
1457 			      "the frame/frames.\n");
1458 			il->isr_stats.sch++;
1459 		}
1460 
1461 		/* Alive notification via Rx interrupt will do the real work */
1462 		if (inta & CSR_INT_BIT_ALIVE) {
1463 			D_ISR("Alive interrupt\n");
1464 			il->isr_stats.alive++;
1465 		}
1466 	}
1467 #endif
1468 	/* Safely ignore these bits for debug checks below */
1469 	inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1470 
1471 	/* Error detected by uCode */
1472 	if (inta & CSR_INT_BIT_SW_ERR) {
1473 		IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1474 		       inta);
1475 		il->isr_stats.sw++;
1476 		il_irq_handle_error(il);
1477 		handled |= CSR_INT_BIT_SW_ERR;
1478 	}
1479 
1480 	/* uCode wakes up after power-down sleep */
1481 	if (inta & CSR_INT_BIT_WAKEUP) {
1482 		D_ISR("Wakeup interrupt\n");
1483 		il_rx_queue_update_write_ptr(il, &il->rxq);
1484 
1485 		spin_lock_irqsave(&il->lock, flags);
1486 		il_txq_update_write_ptr(il, &il->txq[0]);
1487 		il_txq_update_write_ptr(il, &il->txq[1]);
1488 		il_txq_update_write_ptr(il, &il->txq[2]);
1489 		il_txq_update_write_ptr(il, &il->txq[3]);
1490 		il_txq_update_write_ptr(il, &il->txq[4]);
1491 		spin_unlock_irqrestore(&il->lock, flags);
1492 
1493 		il->isr_stats.wakeup++;
1494 		handled |= CSR_INT_BIT_WAKEUP;
1495 	}
1496 
1497 	/* All uCode command responses, including Tx command responses,
1498 	 * Rx "responses" (frame-received notification), and other
1499 	 * notifications from uCode come through here*/
1500 	if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1501 		il3945_rx_handle(il);
1502 		il->isr_stats.rx++;
1503 		handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1504 	}
1505 
1506 	if (inta & CSR_INT_BIT_FH_TX) {
1507 		D_ISR("Tx interrupt\n");
1508 		il->isr_stats.tx++;
1509 
1510 		_il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1511 		il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1512 		handled |= CSR_INT_BIT_FH_TX;
1513 	}
1514 
1515 	if (inta & ~handled) {
1516 		IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1517 		il->isr_stats.unhandled++;
1518 	}
1519 
1520 	if (inta & ~il->inta_mask) {
1521 		IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1522 			inta & ~il->inta_mask);
1523 		IL_WARN("   with inta_fh = 0x%08x\n", inta_fh);
1524 	}
1525 
1526 	/* Re-enable all interrupts */
1527 	/* only Re-enable if disabled by irq */
1528 	if (test_bit(S_INT_ENABLED, &il->status))
1529 		il_enable_interrupts(il);
1530 
1531 #ifdef CONFIG_IWLEGACY_DEBUG
1532 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
1533 		inta = _il_rd(il, CSR_INT);
1534 		inta_mask = _il_rd(il, CSR_INT_MASK);
1535 		inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1536 		D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1537 		      "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1538 	}
1539 #endif
1540 }
1541 
1542 static int
1543 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
1544 			     u8 is_active, u8 n_probes,
1545 			     struct il3945_scan_channel *scan_ch,
1546 			     struct ieee80211_vif *vif)
1547 {
1548 	struct ieee80211_channel *chan;
1549 	const struct ieee80211_supported_band *sband;
1550 	const struct il_channel_info *ch_info;
1551 	u16 passive_dwell = 0;
1552 	u16 active_dwell = 0;
1553 	int added, i;
1554 
1555 	sband = il_get_hw_mode(il, band);
1556 	if (!sband)
1557 		return 0;
1558 
1559 	active_dwell = il_get_active_dwell_time(il, band, n_probes);
1560 	passive_dwell = il_get_passive_dwell_time(il, band, vif);
1561 
1562 	if (passive_dwell <= active_dwell)
1563 		passive_dwell = active_dwell + 1;
1564 
1565 	for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1566 		chan = il->scan_request->channels[i];
1567 
1568 		if (chan->band != band)
1569 			continue;
1570 
1571 		scan_ch->channel = chan->hw_value;
1572 
1573 		ch_info = il_get_channel_info(il, band, scan_ch->channel);
1574 		if (!il_is_channel_valid(ch_info)) {
1575 			D_SCAN("Channel %d is INVALID for this band.\n",
1576 			       scan_ch->channel);
1577 			continue;
1578 		}
1579 
1580 		scan_ch->active_dwell = cpu_to_le16(active_dwell);
1581 		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1582 		/* If passive , set up for auto-switch
1583 		 *  and use long active_dwell time.
1584 		 */
1585 		if (!is_active || il_is_channel_passive(ch_info) ||
1586 		    (chan->flags & IEEE80211_CHAN_NO_IR)) {
1587 			scan_ch->type = 0;	/* passive */
1588 			if (IL_UCODE_API(il->ucode_ver) == 1)
1589 				scan_ch->active_dwell =
1590 				    cpu_to_le16(passive_dwell - 1);
1591 		} else {
1592 			scan_ch->type = 1;	/* active */
1593 		}
1594 
1595 		/* Set direct probe bits. These may be used both for active
1596 		 * scan channels (probes gets sent right away),
1597 		 * or for passive channels (probes get se sent only after
1598 		 * hearing clear Rx packet).*/
1599 		if (IL_UCODE_API(il->ucode_ver) >= 2) {
1600 			if (n_probes)
1601 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1602 		} else {
1603 			/* uCode v1 does not allow setting direct probe bits on
1604 			 * passive channel. */
1605 			if ((scan_ch->type & 1) && n_probes)
1606 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1607 		}
1608 
1609 		/* Set txpower levels to defaults */
1610 		scan_ch->tpc.dsp_atten = 110;
1611 		/* scan_pwr_info->tpc.dsp_atten; */
1612 
1613 		/*scan_pwr_info->tpc.tx_gain; */
1614 		if (band == NL80211_BAND_5GHZ)
1615 			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1616 		else {
1617 			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1618 			/* NOTE: if we were doing 6Mb OFDM for scans we'd use
1619 			 * power level:
1620 			 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1621 			 */
1622 		}
1623 
1624 		D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1625 		       (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1626 		       (scan_ch->type & 1) ? active_dwell : passive_dwell);
1627 
1628 		scan_ch++;
1629 		added++;
1630 	}
1631 
1632 	D_SCAN("total channels to scan %d\n", added);
1633 	return added;
1634 }
1635 
1636 static void
1637 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1638 {
1639 	int i;
1640 
1641 	for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1642 		rates[i].bitrate = il3945_rates[i].ieee * 5;
1643 		rates[i].hw_value = i;	/* Rate scaling will work on idxes */
1644 		rates[i].hw_value_short = i;
1645 		rates[i].flags = 0;
1646 		if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1647 			/*
1648 			 * If CCK != 1M then set short preamble rate flag.
1649 			 */
1650 			rates[i].flags |=
1651 			    (il3945_rates[i].plcp ==
1652 			     10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1653 		}
1654 	}
1655 }
1656 
1657 /******************************************************************************
1658  *
1659  * uCode download functions
1660  *
1661  ******************************************************************************/
1662 
1663 static void
1664 il3945_dealloc_ucode_pci(struct il_priv *il)
1665 {
1666 	il_free_fw_desc(il->pci_dev, &il->ucode_code);
1667 	il_free_fw_desc(il->pci_dev, &il->ucode_data);
1668 	il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1669 	il_free_fw_desc(il->pci_dev, &il->ucode_init);
1670 	il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1671 	il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1672 }
1673 
1674 /**
1675  * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1676  *     looking at all data.
1677  */
1678 static int
1679 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1680 {
1681 	u32 val;
1682 	u32 save_len = len;
1683 	int rc = 0;
1684 	u32 errcnt;
1685 
1686 	D_INFO("ucode inst image size is %u\n", len);
1687 
1688 	il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1689 
1690 	errcnt = 0;
1691 	for (; len > 0; len -= sizeof(u32), image++) {
1692 		/* read data comes through single port, auto-incr addr */
1693 		/* NOTE: Use the debugless read so we don't flood kernel log
1694 		 * if IL_DL_IO is set */
1695 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1696 		if (val != le32_to_cpu(*image)) {
1697 			IL_ERR("uCode INST section is invalid at "
1698 			       "offset 0x%x, is 0x%x, s/b 0x%x\n",
1699 			       save_len - len, val, le32_to_cpu(*image));
1700 			rc = -EIO;
1701 			errcnt++;
1702 			if (errcnt >= 20)
1703 				break;
1704 		}
1705 	}
1706 
1707 	if (!errcnt)
1708 		D_INFO("ucode image in INSTRUCTION memory is good\n");
1709 
1710 	return rc;
1711 }
1712 
1713 /**
1714  * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1715  *   using sample data 100 bytes apart.  If these sample points are good,
1716  *   it's a pretty good bet that everything between them is good, too.
1717  */
1718 static int
1719 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1720 {
1721 	u32 val;
1722 	int rc = 0;
1723 	u32 errcnt = 0;
1724 	u32 i;
1725 
1726 	D_INFO("ucode inst image size is %u\n", len);
1727 
1728 	for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1729 		/* read data comes through single port, auto-incr addr */
1730 		/* NOTE: Use the debugless read so we don't flood kernel log
1731 		 * if IL_DL_IO is set */
1732 		il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1733 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1734 		if (val != le32_to_cpu(*image)) {
1735 #if 0				/* Enable this if you want to see details */
1736 			IL_ERR("uCode INST section is invalid at "
1737 			       "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1738 			       *image);
1739 #endif
1740 			rc = -EIO;
1741 			errcnt++;
1742 			if (errcnt >= 3)
1743 				break;
1744 		}
1745 	}
1746 
1747 	return rc;
1748 }
1749 
1750 /**
1751  * il3945_verify_ucode - determine which instruction image is in SRAM,
1752  *    and verify its contents
1753  */
1754 static int
1755 il3945_verify_ucode(struct il_priv *il)
1756 {
1757 	__le32 *image;
1758 	u32 len;
1759 	int rc = 0;
1760 
1761 	/* Try bootstrap */
1762 	image = (__le32 *) il->ucode_boot.v_addr;
1763 	len = il->ucode_boot.len;
1764 	rc = il3945_verify_inst_sparse(il, image, len);
1765 	if (rc == 0) {
1766 		D_INFO("Bootstrap uCode is good in inst SRAM\n");
1767 		return 0;
1768 	}
1769 
1770 	/* Try initialize */
1771 	image = (__le32 *) il->ucode_init.v_addr;
1772 	len = il->ucode_init.len;
1773 	rc = il3945_verify_inst_sparse(il, image, len);
1774 	if (rc == 0) {
1775 		D_INFO("Initialize uCode is good in inst SRAM\n");
1776 		return 0;
1777 	}
1778 
1779 	/* Try runtime/protocol */
1780 	image = (__le32 *) il->ucode_code.v_addr;
1781 	len = il->ucode_code.len;
1782 	rc = il3945_verify_inst_sparse(il, image, len);
1783 	if (rc == 0) {
1784 		D_INFO("Runtime uCode is good in inst SRAM\n");
1785 		return 0;
1786 	}
1787 
1788 	IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1789 
1790 	/* Since nothing seems to match, show first several data entries in
1791 	 * instruction SRAM, so maybe visual inspection will give a clue.
1792 	 * Selection of bootstrap image (vs. other images) is arbitrary. */
1793 	image = (__le32 *) il->ucode_boot.v_addr;
1794 	len = il->ucode_boot.len;
1795 	rc = il3945_verify_inst_full(il, image, len);
1796 
1797 	return rc;
1798 }
1799 
1800 static void
1801 il3945_nic_start(struct il_priv *il)
1802 {
1803 	/* Remove all resets to allow NIC to operate */
1804 	_il_wr(il, CSR_RESET, 0);
1805 }
1806 
1807 #define IL3945_UCODE_GET(item)						\
1808 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1809 {									\
1810 	return le32_to_cpu(ucode->v1.item);				\
1811 }
1812 
1813 static u32
1814 il3945_ucode_get_header_size(u32 api_ver)
1815 {
1816 	return 24;
1817 }
1818 
1819 static u8 *
1820 il3945_ucode_get_data(const struct il_ucode_header *ucode)
1821 {
1822 	return (u8 *) ucode->v1.data;
1823 }
1824 
1825 IL3945_UCODE_GET(inst_size);
1826 IL3945_UCODE_GET(data_size);
1827 IL3945_UCODE_GET(init_size);
1828 IL3945_UCODE_GET(init_data_size);
1829 IL3945_UCODE_GET(boot_size);
1830 
1831 /**
1832  * il3945_read_ucode - Read uCode images from disk file.
1833  *
1834  * Copy into buffers for card to fetch via bus-mastering
1835  */
1836 static int
1837 il3945_read_ucode(struct il_priv *il)
1838 {
1839 	const struct il_ucode_header *ucode;
1840 	int ret = -EINVAL, idx;
1841 	const struct firmware *ucode_raw;
1842 	/* firmware file name contains uCode/driver compatibility version */
1843 	const char *name_pre = il->cfg->fw_name_pre;
1844 	const unsigned int api_max = il->cfg->ucode_api_max;
1845 	const unsigned int api_min = il->cfg->ucode_api_min;
1846 	char buf[25];
1847 	u8 *src;
1848 	size_t len;
1849 	u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1850 
1851 	/* Ask kernel firmware_class module to get the boot firmware off disk.
1852 	 * request_firmware() is synchronous, file is in memory on return. */
1853 	for (idx = api_max; idx >= api_min; idx--) {
1854 		sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1855 		ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1856 		if (ret < 0) {
1857 			IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1858 			if (ret == -ENOENT)
1859 				continue;
1860 			else
1861 				goto error;
1862 		} else {
1863 			if (idx < api_max)
1864 				IL_ERR("Loaded firmware %s, "
1865 				       "which is deprecated. "
1866 				       " Please use API v%u instead.\n", buf,
1867 				       api_max);
1868 			D_INFO("Got firmware '%s' file "
1869 			       "(%zd bytes) from disk\n", buf, ucode_raw->size);
1870 			break;
1871 		}
1872 	}
1873 
1874 	if (ret < 0)
1875 		goto error;
1876 
1877 	/* Make sure that we got at least our header! */
1878 	if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1879 		IL_ERR("File size way too small!\n");
1880 		ret = -EINVAL;
1881 		goto err_release;
1882 	}
1883 
1884 	/* Data from ucode file:  header followed by uCode images */
1885 	ucode = (struct il_ucode_header *)ucode_raw->data;
1886 
1887 	il->ucode_ver = le32_to_cpu(ucode->ver);
1888 	api_ver = IL_UCODE_API(il->ucode_ver);
1889 	inst_size = il3945_ucode_get_inst_size(ucode);
1890 	data_size = il3945_ucode_get_data_size(ucode);
1891 	init_size = il3945_ucode_get_init_size(ucode);
1892 	init_data_size = il3945_ucode_get_init_data_size(ucode);
1893 	boot_size = il3945_ucode_get_boot_size(ucode);
1894 	src = il3945_ucode_get_data(ucode);
1895 
1896 	/* api_ver should match the api version forming part of the
1897 	 * firmware filename ... but we don't check for that and only rely
1898 	 * on the API version read from firmware header from here on forward */
1899 
1900 	if (api_ver < api_min || api_ver > api_max) {
1901 		IL_ERR("Driver unable to support your firmware API. "
1902 		       "Driver supports v%u, firmware is v%u.\n", api_max,
1903 		       api_ver);
1904 		il->ucode_ver = 0;
1905 		ret = -EINVAL;
1906 		goto err_release;
1907 	}
1908 	if (api_ver != api_max)
1909 		IL_ERR("Firmware has old API version. Expected %u, "
1910 		       "got %u. New firmware can be obtained "
1911 		       "from http://www.intellinuxwireless.org.\n", api_max,
1912 		       api_ver);
1913 
1914 	IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1915 		IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1916 		IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1917 
1918 	snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1919 		 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1920 		 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1921 		 IL_UCODE_SERIAL(il->ucode_ver));
1922 
1923 	D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1924 	D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1925 	D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1926 	D_INFO("f/w package hdr init inst size = %u\n", init_size);
1927 	D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1928 	D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1929 
1930 	/* Verify size of file vs. image size info in file's header */
1931 	if (ucode_raw->size !=
1932 	    il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1933 	    init_size + init_data_size + boot_size) {
1934 
1935 		D_INFO("uCode file size %zd does not match expected size\n",
1936 		       ucode_raw->size);
1937 		ret = -EINVAL;
1938 		goto err_release;
1939 	}
1940 
1941 	/* Verify that uCode images will fit in card's SRAM */
1942 	if (inst_size > IL39_MAX_INST_SIZE) {
1943 		D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1944 		ret = -EINVAL;
1945 		goto err_release;
1946 	}
1947 
1948 	if (data_size > IL39_MAX_DATA_SIZE) {
1949 		D_INFO("uCode data len %d too large to fit in\n", data_size);
1950 		ret = -EINVAL;
1951 		goto err_release;
1952 	}
1953 	if (init_size > IL39_MAX_INST_SIZE) {
1954 		D_INFO("uCode init instr len %d too large to fit in\n",
1955 		       init_size);
1956 		ret = -EINVAL;
1957 		goto err_release;
1958 	}
1959 	if (init_data_size > IL39_MAX_DATA_SIZE) {
1960 		D_INFO("uCode init data len %d too large to fit in\n",
1961 		       init_data_size);
1962 		ret = -EINVAL;
1963 		goto err_release;
1964 	}
1965 	if (boot_size > IL39_MAX_BSM_SIZE) {
1966 		D_INFO("uCode boot instr len %d too large to fit in\n",
1967 		       boot_size);
1968 		ret = -EINVAL;
1969 		goto err_release;
1970 	}
1971 
1972 	/* Allocate ucode buffers for card's bus-master loading ... */
1973 
1974 	/* Runtime instructions and 2 copies of data:
1975 	 * 1) unmodified from disk
1976 	 * 2) backup cache for save/restore during power-downs */
1977 	il->ucode_code.len = inst_size;
1978 	il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1979 
1980 	il->ucode_data.len = data_size;
1981 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1982 
1983 	il->ucode_data_backup.len = data_size;
1984 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1985 
1986 	if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1987 	    !il->ucode_data_backup.v_addr)
1988 		goto err_pci_alloc;
1989 
1990 	/* Initialization instructions and data */
1991 	if (init_size && init_data_size) {
1992 		il->ucode_init.len = init_size;
1993 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1994 
1995 		il->ucode_init_data.len = init_data_size;
1996 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1997 
1998 		if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1999 			goto err_pci_alloc;
2000 	}
2001 
2002 	/* Bootstrap (instructions only, no data) */
2003 	if (boot_size) {
2004 		il->ucode_boot.len = boot_size;
2005 		il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
2006 
2007 		if (!il->ucode_boot.v_addr)
2008 			goto err_pci_alloc;
2009 	}
2010 
2011 	/* Copy images into buffers for card's bus-master reads ... */
2012 
2013 	/* Runtime instructions (first block of data in file) */
2014 	len = inst_size;
2015 	D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
2016 	memcpy(il->ucode_code.v_addr, src, len);
2017 	src += len;
2018 
2019 	D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2020 	       il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2021 
2022 	/* Runtime data (2nd block)
2023 	 * NOTE:  Copy into backup buffer will be done in il3945_up()  */
2024 	len = data_size;
2025 	D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2026 	memcpy(il->ucode_data.v_addr, src, len);
2027 	memcpy(il->ucode_data_backup.v_addr, src, len);
2028 	src += len;
2029 
2030 	/* Initialization instructions (3rd block) */
2031 	if (init_size) {
2032 		len = init_size;
2033 		D_INFO("Copying (but not loading) init instr len %zd\n", len);
2034 		memcpy(il->ucode_init.v_addr, src, len);
2035 		src += len;
2036 	}
2037 
2038 	/* Initialization data (4th block) */
2039 	if (init_data_size) {
2040 		len = init_data_size;
2041 		D_INFO("Copying (but not loading) init data len %zd\n", len);
2042 		memcpy(il->ucode_init_data.v_addr, src, len);
2043 		src += len;
2044 	}
2045 
2046 	/* Bootstrap instructions (5th block) */
2047 	len = boot_size;
2048 	D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2049 	memcpy(il->ucode_boot.v_addr, src, len);
2050 
2051 	/* We have our copies now, allow OS release its copies */
2052 	release_firmware(ucode_raw);
2053 	return 0;
2054 
2055 err_pci_alloc:
2056 	IL_ERR("failed to allocate pci memory\n");
2057 	ret = -ENOMEM;
2058 	il3945_dealloc_ucode_pci(il);
2059 
2060 err_release:
2061 	release_firmware(ucode_raw);
2062 
2063 error:
2064 	return ret;
2065 }
2066 
2067 /**
2068  * il3945_set_ucode_ptrs - Set uCode address location
2069  *
2070  * Tell initialization uCode where to find runtime uCode.
2071  *
2072  * BSM registers initially contain pointers to initialization uCode.
2073  * We need to replace them to load runtime uCode inst and data,
2074  * and to save runtime data when powering down.
2075  */
2076 static int
2077 il3945_set_ucode_ptrs(struct il_priv *il)
2078 {
2079 	dma_addr_t pinst;
2080 	dma_addr_t pdata;
2081 
2082 	/* bits 31:0 for 3945 */
2083 	pinst = il->ucode_code.p_addr;
2084 	pdata = il->ucode_data_backup.p_addr;
2085 
2086 	/* Tell bootstrap uCode where to find image to load */
2087 	il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2088 	il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2089 	il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2090 
2091 	/* Inst byte count must be last to set up, bit 31 signals uCode
2092 	 *   that all new ptr/size info is in place */
2093 	il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2094 		   il->ucode_code.len | BSM_DRAM_INST_LOAD);
2095 
2096 	D_INFO("Runtime uCode pointers are set.\n");
2097 
2098 	return 0;
2099 }
2100 
2101 /**
2102  * il3945_init_alive_start - Called after N_ALIVE notification received
2103  *
2104  * Called after N_ALIVE notification received from "initialize" uCode.
2105  *
2106  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2107  */
2108 static void
2109 il3945_init_alive_start(struct il_priv *il)
2110 {
2111 	/* Check alive response for "valid" sign from uCode */
2112 	if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2113 		/* We had an error bringing up the hardware, so take it
2114 		 * all the way back down so we can try again */
2115 		D_INFO("Initialize Alive failed.\n");
2116 		goto restart;
2117 	}
2118 
2119 	/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2120 	 * This is a paranoid check, because we would not have gotten the
2121 	 * "initialize" alive if code weren't properly loaded.  */
2122 	if (il3945_verify_ucode(il)) {
2123 		/* Runtime instruction load was bad;
2124 		 * take it all the way back down so we can try again */
2125 		D_INFO("Bad \"initialize\" uCode load.\n");
2126 		goto restart;
2127 	}
2128 
2129 	/* Send pointers to protocol/runtime uCode image ... init code will
2130 	 * load and launch runtime uCode, which will send us another "Alive"
2131 	 * notification. */
2132 	D_INFO("Initialization Alive received.\n");
2133 	if (il3945_set_ucode_ptrs(il)) {
2134 		/* Runtime instruction load won't happen;
2135 		 * take it all the way back down so we can try again */
2136 		D_INFO("Couldn't set up uCode pointers.\n");
2137 		goto restart;
2138 	}
2139 	return;
2140 
2141 restart:
2142 	queue_work(il->workqueue, &il->restart);
2143 }
2144 
2145 /**
2146  * il3945_alive_start - called after N_ALIVE notification received
2147  *                   from protocol/runtime uCode (initialization uCode's
2148  *                   Alive gets handled by il3945_init_alive_start()).
2149  */
2150 static void
2151 il3945_alive_start(struct il_priv *il)
2152 {
2153 	int thermal_spin = 0;
2154 	u32 rfkill;
2155 
2156 	D_INFO("Runtime Alive received.\n");
2157 
2158 	if (il->card_alive.is_valid != UCODE_VALID_OK) {
2159 		/* We had an error bringing up the hardware, so take it
2160 		 * all the way back down so we can try again */
2161 		D_INFO("Alive failed.\n");
2162 		goto restart;
2163 	}
2164 
2165 	/* Initialize uCode has loaded Runtime uCode ... verify inst image.
2166 	 * This is a paranoid check, because we would not have gotten the
2167 	 * "runtime" alive if code weren't properly loaded.  */
2168 	if (il3945_verify_ucode(il)) {
2169 		/* Runtime instruction load was bad;
2170 		 * take it all the way back down so we can try again */
2171 		D_INFO("Bad runtime uCode load.\n");
2172 		goto restart;
2173 	}
2174 
2175 	rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2176 	D_INFO("RFKILL status: 0x%x\n", rfkill);
2177 
2178 	if (rfkill & 0x1) {
2179 		clear_bit(S_RFKILL, &il->status);
2180 		/* if RFKILL is not on, then wait for thermal
2181 		 * sensor in adapter to kick in */
2182 		while (il3945_hw_get_temperature(il) == 0) {
2183 			thermal_spin++;
2184 			udelay(10);
2185 		}
2186 
2187 		if (thermal_spin)
2188 			D_INFO("Thermal calibration took %dus\n",
2189 			       thermal_spin * 10);
2190 	} else
2191 		set_bit(S_RFKILL, &il->status);
2192 
2193 	/* After the ALIVE response, we can send commands to 3945 uCode */
2194 	set_bit(S_ALIVE, &il->status);
2195 
2196 	/* Enable watchdog to monitor the driver tx queues */
2197 	il_setup_watchdog(il);
2198 
2199 	if (il_is_rfkill(il))
2200 		return;
2201 
2202 	ieee80211_wake_queues(il->hw);
2203 
2204 	il->active_rate = RATES_MASK_3945;
2205 
2206 	il_power_update_mode(il, true);
2207 
2208 	if (il_is_associated(il)) {
2209 		struct il3945_rxon_cmd *active_rxon =
2210 		    (struct il3945_rxon_cmd *)(&il->active);
2211 
2212 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2213 		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2214 	} else {
2215 		/* Initialize our rx_config data */
2216 		il_connection_init_rx_config(il);
2217 	}
2218 
2219 	/* Configure Bluetooth device coexistence support */
2220 	il_send_bt_config(il);
2221 
2222 	set_bit(S_READY, &il->status);
2223 
2224 	/* Configure the adapter for unassociated operation */
2225 	il3945_commit_rxon(il);
2226 
2227 	il3945_reg_txpower_periodic(il);
2228 
2229 	D_INFO("ALIVE processing complete.\n");
2230 	wake_up(&il->wait_command_queue);
2231 
2232 	return;
2233 
2234 restart:
2235 	queue_work(il->workqueue, &il->restart);
2236 }
2237 
2238 static void il3945_cancel_deferred_work(struct il_priv *il);
2239 
2240 static void
2241 __il3945_down(struct il_priv *il)
2242 {
2243 	unsigned long flags;
2244 	int exit_pending;
2245 
2246 	D_INFO(DRV_NAME " is going down\n");
2247 
2248 	il_scan_cancel_timeout(il, 200);
2249 
2250 	exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2251 
2252 	/* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2253 	 * to prevent rearm timer */
2254 	del_timer_sync(&il->watchdog);
2255 
2256 	/* Station information will now be cleared in device */
2257 	il_clear_ucode_stations(il);
2258 	il_dealloc_bcast_stations(il);
2259 	il_clear_driver_stations(il);
2260 
2261 	/* Unblock any waiting calls */
2262 	wake_up_all(&il->wait_command_queue);
2263 
2264 	/* Wipe out the EXIT_PENDING status bit if we are not actually
2265 	 * exiting the module */
2266 	if (!exit_pending)
2267 		clear_bit(S_EXIT_PENDING, &il->status);
2268 
2269 	/* stop and reset the on-board processor */
2270 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2271 
2272 	/* tell the device to stop sending interrupts */
2273 	spin_lock_irqsave(&il->lock, flags);
2274 	il_disable_interrupts(il);
2275 	spin_unlock_irqrestore(&il->lock, flags);
2276 	il3945_synchronize_irq(il);
2277 
2278 	if (il->mac80211_registered)
2279 		ieee80211_stop_queues(il->hw);
2280 
2281 	/* If we have not previously called il3945_init() then
2282 	 * clear all bits but the RF Kill bits and return */
2283 	if (!il_is_init(il)) {
2284 		il->status =
2285 		    test_bit(S_RFKILL, &il->status) << S_RFKILL |
2286 		    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2287 		    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2288 		goto exit;
2289 	}
2290 
2291 	/* ...otherwise clear out all the status bits but the RF Kill
2292 	 * bit and continue taking the NIC down. */
2293 	il->status &=
2294 	    test_bit(S_RFKILL, &il->status) << S_RFKILL |
2295 	    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2296 	    test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2297 	    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2298 
2299 	/*
2300 	 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2301 	 * here is the only thread which will program device registers, but
2302 	 * still have lockdep assertions, so we are taking reg_lock.
2303 	 */
2304 	spin_lock_irq(&il->reg_lock);
2305 	/* FIXME: il_grab_nic_access if rfkill is off ? */
2306 
2307 	il3945_hw_txq_ctx_stop(il);
2308 	il3945_hw_rxq_stop(il);
2309 	/* Power-down device's busmaster DMA clocks */
2310 	_il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2311 	udelay(5);
2312 	/* Stop the device, and put it in low power state */
2313 	_il_apm_stop(il);
2314 
2315 	spin_unlock_irq(&il->reg_lock);
2316 
2317 	il3945_hw_txq_ctx_free(il);
2318 exit:
2319 	memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2320 
2321 	if (il->beacon_skb)
2322 		dev_kfree_skb(il->beacon_skb);
2323 	il->beacon_skb = NULL;
2324 
2325 	/* clear out any free frames */
2326 	il3945_clear_free_frames(il);
2327 }
2328 
2329 static void
2330 il3945_down(struct il_priv *il)
2331 {
2332 	mutex_lock(&il->mutex);
2333 	__il3945_down(il);
2334 	mutex_unlock(&il->mutex);
2335 
2336 	il3945_cancel_deferred_work(il);
2337 }
2338 
2339 #define MAX_HW_RESTARTS 5
2340 
2341 static int
2342 il3945_alloc_bcast_station(struct il_priv *il)
2343 {
2344 	unsigned long flags;
2345 	u8 sta_id;
2346 
2347 	spin_lock_irqsave(&il->sta_lock, flags);
2348 	sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2349 	if (sta_id == IL_INVALID_STATION) {
2350 		IL_ERR("Unable to prepare broadcast station\n");
2351 		spin_unlock_irqrestore(&il->sta_lock, flags);
2352 
2353 		return -EINVAL;
2354 	}
2355 
2356 	il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2357 	il->stations[sta_id].used |= IL_STA_BCAST;
2358 	spin_unlock_irqrestore(&il->sta_lock, flags);
2359 
2360 	return 0;
2361 }
2362 
2363 static int
2364 __il3945_up(struct il_priv *il)
2365 {
2366 	int rc, i;
2367 
2368 	rc = il3945_alloc_bcast_station(il);
2369 	if (rc)
2370 		return rc;
2371 
2372 	if (test_bit(S_EXIT_PENDING, &il->status)) {
2373 		IL_WARN("Exit pending; will not bring the NIC up\n");
2374 		return -EIO;
2375 	}
2376 
2377 	if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2378 		IL_ERR("ucode not available for device bring up\n");
2379 		return -EIO;
2380 	}
2381 
2382 	/* If platform's RF_KILL switch is NOT set to KILL */
2383 	if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2384 		clear_bit(S_RFKILL, &il->status);
2385 	else {
2386 		set_bit(S_RFKILL, &il->status);
2387 		return -ERFKILL;
2388 	}
2389 
2390 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
2391 
2392 	rc = il3945_hw_nic_init(il);
2393 	if (rc) {
2394 		IL_ERR("Unable to int nic\n");
2395 		return rc;
2396 	}
2397 
2398 	/* make sure rfkill handshake bits are cleared */
2399 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2400 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2401 
2402 	/* clear (again), then enable host interrupts */
2403 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
2404 	il_enable_interrupts(il);
2405 
2406 	/* really make sure rfkill handshake bits are cleared */
2407 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2408 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2409 
2410 	/* Copy original ucode data image from disk into backup cache.
2411 	 * This will be used to initialize the on-board processor's
2412 	 * data SRAM for a clean start when the runtime program first loads. */
2413 	memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2414 	       il->ucode_data.len);
2415 
2416 	/* We return success when we resume from suspend and rf_kill is on. */
2417 	if (test_bit(S_RFKILL, &il->status))
2418 		return 0;
2419 
2420 	for (i = 0; i < MAX_HW_RESTARTS; i++) {
2421 
2422 		/* load bootstrap state machine,
2423 		 * load bootstrap program into processor's memory,
2424 		 * prepare to load the "initialize" uCode */
2425 		rc = il->ops->load_ucode(il);
2426 
2427 		if (rc) {
2428 			IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2429 			continue;
2430 		}
2431 
2432 		/* start card; "initialize" will load runtime ucode */
2433 		il3945_nic_start(il);
2434 
2435 		D_INFO(DRV_NAME " is coming up\n");
2436 
2437 		return 0;
2438 	}
2439 
2440 	set_bit(S_EXIT_PENDING, &il->status);
2441 	__il3945_down(il);
2442 	clear_bit(S_EXIT_PENDING, &il->status);
2443 
2444 	/* tried to restart and config the device for as long as our
2445 	 * patience could withstand */
2446 	IL_ERR("Unable to initialize device after %d attempts.\n", i);
2447 	return -EIO;
2448 }
2449 
2450 /*****************************************************************************
2451  *
2452  * Workqueue callbacks
2453  *
2454  *****************************************************************************/
2455 
2456 static void
2457 il3945_bg_init_alive_start(struct work_struct *data)
2458 {
2459 	struct il_priv *il =
2460 	    container_of(data, struct il_priv, init_alive_start.work);
2461 
2462 	mutex_lock(&il->mutex);
2463 	if (test_bit(S_EXIT_PENDING, &il->status))
2464 		goto out;
2465 
2466 	il3945_init_alive_start(il);
2467 out:
2468 	mutex_unlock(&il->mutex);
2469 }
2470 
2471 static void
2472 il3945_bg_alive_start(struct work_struct *data)
2473 {
2474 	struct il_priv *il =
2475 	    container_of(data, struct il_priv, alive_start.work);
2476 
2477 	mutex_lock(&il->mutex);
2478 	if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2479 		goto out;
2480 
2481 	il3945_alive_start(il);
2482 out:
2483 	mutex_unlock(&il->mutex);
2484 }
2485 
2486 /*
2487  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2488  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2489  * *is* readable even when device has been SW_RESET into low power mode
2490  * (e.g. during RF KILL).
2491  */
2492 static void
2493 il3945_rfkill_poll(struct work_struct *data)
2494 {
2495 	struct il_priv *il =
2496 	    container_of(data, struct il_priv, _3945.rfkill_poll.work);
2497 	bool old_rfkill = test_bit(S_RFKILL, &il->status);
2498 	bool new_rfkill =
2499 	    !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2500 
2501 	if (new_rfkill != old_rfkill) {
2502 		if (new_rfkill)
2503 			set_bit(S_RFKILL, &il->status);
2504 		else
2505 			clear_bit(S_RFKILL, &il->status);
2506 
2507 		wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2508 
2509 		D_RF_KILL("RF_KILL bit toggled to %s.\n",
2510 			  new_rfkill ? "disable radio" : "enable radio");
2511 	}
2512 
2513 	/* Keep this running, even if radio now enabled.  This will be
2514 	 * cancelled in mac_start() if system decides to start again */
2515 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2516 			   round_jiffies_relative(2 * HZ));
2517 
2518 }
2519 
2520 int
2521 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2522 {
2523 	struct il_host_cmd cmd = {
2524 		.id = C_SCAN,
2525 		.len = sizeof(struct il3945_scan_cmd),
2526 		.flags = CMD_SIZE_HUGE,
2527 	};
2528 	struct il3945_scan_cmd *scan;
2529 	u8 n_probes = 0;
2530 	enum nl80211_band band;
2531 	bool is_active = false;
2532 	int ret;
2533 	u16 len;
2534 
2535 	lockdep_assert_held(&il->mutex);
2536 
2537 	if (!il->scan_cmd) {
2538 		il->scan_cmd =
2539 		    kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2540 			    GFP_KERNEL);
2541 		if (!il->scan_cmd) {
2542 			D_SCAN("Fail to allocate scan memory\n");
2543 			return -ENOMEM;
2544 		}
2545 	}
2546 	scan = il->scan_cmd;
2547 	memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2548 
2549 	scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2550 	scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2551 
2552 	if (il_is_associated(il)) {
2553 		u16 interval;
2554 		u32 extra;
2555 		u32 suspend_time = 100;
2556 		u32 scan_suspend_time = 100;
2557 
2558 		D_INFO("Scanning while associated...\n");
2559 
2560 		interval = vif->bss_conf.beacon_int;
2561 
2562 		scan->suspend_time = 0;
2563 		scan->max_out_time = cpu_to_le32(200 * 1024);
2564 		if (!interval)
2565 			interval = suspend_time;
2566 		/*
2567 		 * suspend time format:
2568 		 *  0-19: beacon interval in usec (time before exec.)
2569 		 * 20-23: 0
2570 		 * 24-31: number of beacons (suspend between channels)
2571 		 */
2572 
2573 		extra = (suspend_time / interval) << 24;
2574 		scan_suspend_time =
2575 		    0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2576 
2577 		scan->suspend_time = cpu_to_le32(scan_suspend_time);
2578 		D_SCAN("suspend_time 0x%X beacon interval %d\n",
2579 		       scan_suspend_time, interval);
2580 	}
2581 
2582 	if (il->scan_request->n_ssids) {
2583 		int i, p = 0;
2584 		D_SCAN("Kicking off active scan\n");
2585 		for (i = 0; i < il->scan_request->n_ssids; i++) {
2586 			/* always does wildcard anyway */
2587 			if (!il->scan_request->ssids[i].ssid_len)
2588 				continue;
2589 			scan->direct_scan[p].id = WLAN_EID_SSID;
2590 			scan->direct_scan[p].len =
2591 			    il->scan_request->ssids[i].ssid_len;
2592 			memcpy(scan->direct_scan[p].ssid,
2593 			       il->scan_request->ssids[i].ssid,
2594 			       il->scan_request->ssids[i].ssid_len);
2595 			n_probes++;
2596 			p++;
2597 		}
2598 		is_active = true;
2599 	} else
2600 		D_SCAN("Kicking off passive scan.\n");
2601 
2602 	/* We don't build a direct scan probe request; the uCode will do
2603 	 * that based on the direct_mask added to each channel entry */
2604 	scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2605 	scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2606 	scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2607 
2608 	/* flags + rate selection */
2609 
2610 	switch (il->scan_band) {
2611 	case NL80211_BAND_2GHZ:
2612 		scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2613 		scan->tx_cmd.rate = RATE_1M_PLCP;
2614 		band = NL80211_BAND_2GHZ;
2615 		break;
2616 	case NL80211_BAND_5GHZ:
2617 		scan->tx_cmd.rate = RATE_6M_PLCP;
2618 		band = NL80211_BAND_5GHZ;
2619 		break;
2620 	default:
2621 		IL_WARN("Invalid scan band\n");
2622 		return -EIO;
2623 	}
2624 
2625 	/*
2626 	 * If active scaning is requested but a certain channel is marked
2627 	 * passive, we can do active scanning if we detect transmissions. For
2628 	 * passive only scanning disable switching to active on any channel.
2629 	 */
2630 	scan->good_CRC_th =
2631 	    is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2632 
2633 	len =
2634 	    il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2635 			      vif->addr, il->scan_request->ie,
2636 			      il->scan_request->ie_len,
2637 			      IL_MAX_SCAN_SIZE - sizeof(*scan));
2638 	scan->tx_cmd.len = cpu_to_le16(len);
2639 
2640 	/* select Rx antennas */
2641 	scan->flags |= il3945_get_antenna_flags(il);
2642 
2643 	scan->channel_count =
2644 	    il3945_get_channels_for_scan(il, band, is_active, n_probes,
2645 					 (void *)&scan->data[len], vif);
2646 	if (scan->channel_count == 0) {
2647 		D_SCAN("channel count %d\n", scan->channel_count);
2648 		return -EIO;
2649 	}
2650 
2651 	cmd.len +=
2652 	    le16_to_cpu(scan->tx_cmd.len) +
2653 	    scan->channel_count * sizeof(struct il3945_scan_channel);
2654 	cmd.data = scan;
2655 	scan->len = cpu_to_le16(cmd.len);
2656 
2657 	set_bit(S_SCAN_HW, &il->status);
2658 	ret = il_send_cmd_sync(il, &cmd);
2659 	if (ret)
2660 		clear_bit(S_SCAN_HW, &il->status);
2661 	return ret;
2662 }
2663 
2664 void
2665 il3945_post_scan(struct il_priv *il)
2666 {
2667 	/*
2668 	 * Since setting the RXON may have been deferred while
2669 	 * performing the scan, fire one off if needed
2670 	 */
2671 	if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2672 		il3945_commit_rxon(il);
2673 }
2674 
2675 static void
2676 il3945_bg_restart(struct work_struct *data)
2677 {
2678 	struct il_priv *il = container_of(data, struct il_priv, restart);
2679 
2680 	if (test_bit(S_EXIT_PENDING, &il->status))
2681 		return;
2682 
2683 	if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2684 		mutex_lock(&il->mutex);
2685 		il->is_open = 0;
2686 		mutex_unlock(&il->mutex);
2687 		il3945_down(il);
2688 		ieee80211_restart_hw(il->hw);
2689 	} else {
2690 		il3945_down(il);
2691 
2692 		mutex_lock(&il->mutex);
2693 		if (test_bit(S_EXIT_PENDING, &il->status)) {
2694 			mutex_unlock(&il->mutex);
2695 			return;
2696 		}
2697 
2698 		__il3945_up(il);
2699 		mutex_unlock(&il->mutex);
2700 	}
2701 }
2702 
2703 static void
2704 il3945_bg_rx_replenish(struct work_struct *data)
2705 {
2706 	struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2707 
2708 	mutex_lock(&il->mutex);
2709 	if (test_bit(S_EXIT_PENDING, &il->status))
2710 		goto out;
2711 
2712 	il3945_rx_replenish(il);
2713 out:
2714 	mutex_unlock(&il->mutex);
2715 }
2716 
2717 void
2718 il3945_post_associate(struct il_priv *il)
2719 {
2720 	int rc = 0;
2721 
2722 	if (!il->vif || !il->is_open)
2723 		return;
2724 
2725 	D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
2726 		il->active.bssid_addr);
2727 
2728 	if (test_bit(S_EXIT_PENDING, &il->status))
2729 		return;
2730 
2731 	il_scan_cancel_timeout(il, 200);
2732 
2733 	il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2734 	il3945_commit_rxon(il);
2735 
2736 	rc = il_send_rxon_timing(il);
2737 	if (rc)
2738 		IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2739 
2740 	il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2741 
2742 	il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
2743 
2744 	D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
2745 		il->vif->bss_conf.beacon_int);
2746 
2747 	if (il->vif->bss_conf.use_short_preamble)
2748 		il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2749 	else
2750 		il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2751 
2752 	if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2753 		if (il->vif->bss_conf.use_short_slot)
2754 			il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2755 		else
2756 			il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2757 	}
2758 
2759 	il3945_commit_rxon(il);
2760 
2761 	switch (il->vif->type) {
2762 	case NL80211_IFTYPE_STATION:
2763 		il3945_rate_scale_init(il->hw, IL_AP_ID);
2764 		break;
2765 	case NL80211_IFTYPE_ADHOC:
2766 		il3945_send_beacon_cmd(il);
2767 		break;
2768 	default:
2769 		IL_ERR("%s Should not be called in %d mode\n", __func__,
2770 		      il->vif->type);
2771 		break;
2772 	}
2773 }
2774 
2775 /*****************************************************************************
2776  *
2777  * mac80211 entry point functions
2778  *
2779  *****************************************************************************/
2780 
2781 #define UCODE_READY_TIMEOUT	(2 * HZ)
2782 
2783 static int
2784 il3945_mac_start(struct ieee80211_hw *hw)
2785 {
2786 	struct il_priv *il = hw->priv;
2787 	int ret;
2788 
2789 	/* we should be verifying the device is ready to be opened */
2790 	mutex_lock(&il->mutex);
2791 	D_MAC80211("enter\n");
2792 
2793 	/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2794 	 * ucode filename and max sizes are card-specific. */
2795 
2796 	if (!il->ucode_code.len) {
2797 		ret = il3945_read_ucode(il);
2798 		if (ret) {
2799 			IL_ERR("Could not read microcode: %d\n", ret);
2800 			mutex_unlock(&il->mutex);
2801 			goto out_release_irq;
2802 		}
2803 	}
2804 
2805 	ret = __il3945_up(il);
2806 
2807 	mutex_unlock(&il->mutex);
2808 
2809 	if (ret)
2810 		goto out_release_irq;
2811 
2812 	D_INFO("Start UP work.\n");
2813 
2814 	/* Wait for START_ALIVE from ucode. Otherwise callbacks from
2815 	 * mac80211 will not be run successfully. */
2816 	ret = wait_event_timeout(il->wait_command_queue,
2817 				 test_bit(S_READY, &il->status),
2818 				 UCODE_READY_TIMEOUT);
2819 	if (!ret) {
2820 		if (!test_bit(S_READY, &il->status)) {
2821 			IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2822 			       jiffies_to_msecs(UCODE_READY_TIMEOUT));
2823 			ret = -ETIMEDOUT;
2824 			goto out_release_irq;
2825 		}
2826 	}
2827 
2828 	/* ucode is running and will send rfkill notifications,
2829 	 * no need to poll the killswitch state anymore */
2830 	cancel_delayed_work(&il->_3945.rfkill_poll);
2831 
2832 	il->is_open = 1;
2833 	D_MAC80211("leave\n");
2834 	return 0;
2835 
2836 out_release_irq:
2837 	il->is_open = 0;
2838 	D_MAC80211("leave - failed\n");
2839 	return ret;
2840 }
2841 
2842 static void
2843 il3945_mac_stop(struct ieee80211_hw *hw)
2844 {
2845 	struct il_priv *il = hw->priv;
2846 
2847 	D_MAC80211("enter\n");
2848 
2849 	if (!il->is_open) {
2850 		D_MAC80211("leave - skip\n");
2851 		return;
2852 	}
2853 
2854 	il->is_open = 0;
2855 
2856 	il3945_down(il);
2857 
2858 	flush_workqueue(il->workqueue);
2859 
2860 	/* start polling the killswitch state again */
2861 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2862 			   round_jiffies_relative(2 * HZ));
2863 
2864 	D_MAC80211("leave\n");
2865 }
2866 
2867 static void
2868 il3945_mac_tx(struct ieee80211_hw *hw,
2869 	       struct ieee80211_tx_control *control,
2870 	       struct sk_buff *skb)
2871 {
2872 	struct il_priv *il = hw->priv;
2873 
2874 	D_MAC80211("enter\n");
2875 
2876 	D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2877 	     ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2878 
2879 	if (il3945_tx_skb(il, control->sta, skb))
2880 		dev_kfree_skb_any(skb);
2881 
2882 	D_MAC80211("leave\n");
2883 }
2884 
2885 void
2886 il3945_config_ap(struct il_priv *il)
2887 {
2888 	struct ieee80211_vif *vif = il->vif;
2889 	int rc = 0;
2890 
2891 	if (test_bit(S_EXIT_PENDING, &il->status))
2892 		return;
2893 
2894 	/* The following should be done only at AP bring up */
2895 	if (!(il_is_associated(il))) {
2896 
2897 		/* RXON - unassoc (to set timing command) */
2898 		il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2899 		il3945_commit_rxon(il);
2900 
2901 		/* RXON Timing */
2902 		rc = il_send_rxon_timing(il);
2903 		if (rc)
2904 			IL_WARN("C_RXON_TIMING failed - "
2905 				"Attempting to continue.\n");
2906 
2907 		il->staging.assoc_id = 0;
2908 
2909 		if (vif->bss_conf.use_short_preamble)
2910 			il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2911 		else
2912 			il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2913 
2914 		if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2915 			if (vif->bss_conf.use_short_slot)
2916 				il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2917 			else
2918 				il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2919 		}
2920 		/* restore RXON assoc */
2921 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2922 		il3945_commit_rxon(il);
2923 	}
2924 	il3945_send_beacon_cmd(il);
2925 }
2926 
2927 static int
2928 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2929 		   struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2930 		   struct ieee80211_key_conf *key)
2931 {
2932 	struct il_priv *il = hw->priv;
2933 	int ret = 0;
2934 	u8 sta_id = IL_INVALID_STATION;
2935 	u8 static_key;
2936 
2937 	D_MAC80211("enter\n");
2938 
2939 	if (il3945_mod_params.sw_crypto) {
2940 		D_MAC80211("leave - hwcrypto disabled\n");
2941 		return -EOPNOTSUPP;
2942 	}
2943 
2944 	/*
2945 	 * To support IBSS RSN, don't program group keys in IBSS, the
2946 	 * hardware will then not attempt to decrypt the frames.
2947 	 */
2948 	if (vif->type == NL80211_IFTYPE_ADHOC &&
2949 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2950 		D_MAC80211("leave - IBSS RSN\n");
2951 		return -EOPNOTSUPP;
2952 	}
2953 
2954 	static_key = !il_is_associated(il);
2955 
2956 	if (!static_key) {
2957 		sta_id = il_sta_id_or_broadcast(il, sta);
2958 		if (sta_id == IL_INVALID_STATION) {
2959 			D_MAC80211("leave - station not found\n");
2960 			return -EINVAL;
2961 		}
2962 	}
2963 
2964 	mutex_lock(&il->mutex);
2965 	il_scan_cancel_timeout(il, 100);
2966 
2967 	switch (cmd) {
2968 	case SET_KEY:
2969 		if (static_key)
2970 			ret = il3945_set_static_key(il, key);
2971 		else
2972 			ret = il3945_set_dynamic_key(il, key, sta_id);
2973 		D_MAC80211("enable hwcrypto key\n");
2974 		break;
2975 	case DISABLE_KEY:
2976 		if (static_key)
2977 			ret = il3945_remove_static_key(il);
2978 		else
2979 			ret = il3945_clear_sta_key_info(il, sta_id);
2980 		D_MAC80211("disable hwcrypto key\n");
2981 		break;
2982 	default:
2983 		ret = -EINVAL;
2984 	}
2985 
2986 	D_MAC80211("leave ret %d\n", ret);
2987 	mutex_unlock(&il->mutex);
2988 
2989 	return ret;
2990 }
2991 
2992 static int
2993 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2994 		   struct ieee80211_sta *sta)
2995 {
2996 	struct il_priv *il = hw->priv;
2997 	struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
2998 	int ret;
2999 	bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3000 	u8 sta_id;
3001 
3002 	mutex_lock(&il->mutex);
3003 	D_INFO("station %pM\n", sta->addr);
3004 	sta_priv->common.sta_id = IL_INVALID_STATION;
3005 
3006 	ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
3007 	if (ret) {
3008 		IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
3009 		/* Should we return success if return code is EEXIST ? */
3010 		mutex_unlock(&il->mutex);
3011 		return ret;
3012 	}
3013 
3014 	sta_priv->common.sta_id = sta_id;
3015 
3016 	/* Initialize rate scaling */
3017 	D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
3018 	il3945_rs_rate_init(il, sta, sta_id);
3019 	mutex_unlock(&il->mutex);
3020 
3021 	return 0;
3022 }
3023 
3024 static void
3025 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3026 			unsigned int *total_flags, u64 multicast)
3027 {
3028 	struct il_priv *il = hw->priv;
3029 	__le32 filter_or = 0, filter_nand = 0;
3030 
3031 #define CHK(test, flag)	do { \
3032 	if (*total_flags & (test))		\
3033 		filter_or |= (flag);		\
3034 	else					\
3035 		filter_nand |= (flag);		\
3036 	} while (0)
3037 
3038 	D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3039 		   *total_flags);
3040 
3041 	CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
3042 	CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3043 	CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3044 
3045 #undef CHK
3046 
3047 	mutex_lock(&il->mutex);
3048 
3049 	il->staging.filter_flags &= ~filter_nand;
3050 	il->staging.filter_flags |= filter_or;
3051 
3052 	/*
3053 	 * Not committing directly because hardware can perform a scan,
3054 	 * but even if hw is ready, committing here breaks for some reason,
3055 	 * we'll eventually commit the filter flags change anyway.
3056 	 */
3057 
3058 	mutex_unlock(&il->mutex);
3059 
3060 	/*
3061 	 * Receiving all multicast frames is always enabled by the
3062 	 * default flags setup in il_connection_init_rx_config()
3063 	 * since we currently do not support programming multicast
3064 	 * filters into the device.
3065 	 */
3066 	*total_flags &=
3067 	    FIF_OTHER_BSS | FIF_ALLMULTI |
3068 	    FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3069 }
3070 
3071 /*****************************************************************************
3072  *
3073  * sysfs attributes
3074  *
3075  *****************************************************************************/
3076 
3077 #ifdef CONFIG_IWLEGACY_DEBUG
3078 
3079 /*
3080  * The following adds a new attribute to the sysfs representation
3081  * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3082  * used for controlling the debug level.
3083  *
3084  * See the level definitions in iwl for details.
3085  *
3086  * The debug_level being managed using sysfs below is a per device debug
3087  * level that is used instead of the global debug level if it (the per
3088  * device debug level) is set.
3089  */
3090 static ssize_t
3091 il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3092 			char *buf)
3093 {
3094 	struct il_priv *il = dev_get_drvdata(d);
3095 	return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3096 }
3097 
3098 static ssize_t
3099 il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3100 			 const char *buf, size_t count)
3101 {
3102 	struct il_priv *il = dev_get_drvdata(d);
3103 	unsigned long val;
3104 	int ret;
3105 
3106 	ret = kstrtoul(buf, 0, &val);
3107 	if (ret)
3108 		IL_INFO("%s is not in hex or decimal form.\n", buf);
3109 	else
3110 		il->debug_level = val;
3111 
3112 	return strnlen(buf, count);
3113 }
3114 
3115 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
3116 		   il3945_store_debug_level);
3117 
3118 #endif /* CONFIG_IWLEGACY_DEBUG */
3119 
3120 static ssize_t
3121 il3945_show_temperature(struct device *d, struct device_attribute *attr,
3122 			char *buf)
3123 {
3124 	struct il_priv *il = dev_get_drvdata(d);
3125 
3126 	if (!il_is_alive(il))
3127 		return -EAGAIN;
3128 
3129 	return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3130 }
3131 
3132 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
3133 
3134 static ssize_t
3135 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3136 {
3137 	struct il_priv *il = dev_get_drvdata(d);
3138 	return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3139 }
3140 
3141 static ssize_t
3142 il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3143 		      const char *buf, size_t count)
3144 {
3145 	struct il_priv *il = dev_get_drvdata(d);
3146 	char *p = (char *)buf;
3147 	u32 val;
3148 
3149 	val = simple_strtoul(p, &p, 10);
3150 	if (p == buf)
3151 		IL_INFO(": %s is not in decimal form.\n", buf);
3152 	else
3153 		il3945_hw_reg_set_txpower(il, val);
3154 
3155 	return count;
3156 }
3157 
3158 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
3159 
3160 static ssize_t
3161 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3162 {
3163 	struct il_priv *il = dev_get_drvdata(d);
3164 
3165 	return sprintf(buf, "0x%04X\n", il->active.flags);
3166 }
3167 
3168 static ssize_t
3169 il3945_store_flags(struct device *d, struct device_attribute *attr,
3170 		   const char *buf, size_t count)
3171 {
3172 	struct il_priv *il = dev_get_drvdata(d);
3173 	u32 flags = simple_strtoul(buf, NULL, 0);
3174 
3175 	mutex_lock(&il->mutex);
3176 	if (le32_to_cpu(il->staging.flags) != flags) {
3177 		/* Cancel any currently running scans... */
3178 		if (il_scan_cancel_timeout(il, 100))
3179 			IL_WARN("Could not cancel scan.\n");
3180 		else {
3181 			D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3182 			il->staging.flags = cpu_to_le32(flags);
3183 			il3945_commit_rxon(il);
3184 		}
3185 	}
3186 	mutex_unlock(&il->mutex);
3187 
3188 	return count;
3189 }
3190 
3191 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
3192 
3193 static ssize_t
3194 il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3195 			 char *buf)
3196 {
3197 	struct il_priv *il = dev_get_drvdata(d);
3198 
3199 	return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3200 }
3201 
3202 static ssize_t
3203 il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3204 			  const char *buf, size_t count)
3205 {
3206 	struct il_priv *il = dev_get_drvdata(d);
3207 	u32 filter_flags = simple_strtoul(buf, NULL, 0);
3208 
3209 	mutex_lock(&il->mutex);
3210 	if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3211 		/* Cancel any currently running scans... */
3212 		if (il_scan_cancel_timeout(il, 100))
3213 			IL_WARN("Could not cancel scan.\n");
3214 		else {
3215 			D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3216 			       filter_flags);
3217 			il->staging.filter_flags = cpu_to_le32(filter_flags);
3218 			il3945_commit_rxon(il);
3219 		}
3220 	}
3221 	mutex_unlock(&il->mutex);
3222 
3223 	return count;
3224 }
3225 
3226 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
3227 		   il3945_store_filter_flags);
3228 
3229 static ssize_t
3230 il3945_show_measurement(struct device *d, struct device_attribute *attr,
3231 			char *buf)
3232 {
3233 	struct il_priv *il = dev_get_drvdata(d);
3234 	struct il_spectrum_notification measure_report;
3235 	u32 size = sizeof(measure_report), len = 0, ofs = 0;
3236 	u8 *data = (u8 *) &measure_report;
3237 	unsigned long flags;
3238 
3239 	spin_lock_irqsave(&il->lock, flags);
3240 	if (!(il->measurement_status & MEASUREMENT_READY)) {
3241 		spin_unlock_irqrestore(&il->lock, flags);
3242 		return 0;
3243 	}
3244 	memcpy(&measure_report, &il->measure_report, size);
3245 	il->measurement_status = 0;
3246 	spin_unlock_irqrestore(&il->lock, flags);
3247 
3248 	while (size && PAGE_SIZE - len) {
3249 		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3250 				   PAGE_SIZE - len, true);
3251 		len = strlen(buf);
3252 		if (PAGE_SIZE - len)
3253 			buf[len++] = '\n';
3254 
3255 		ofs += 16;
3256 		size -= min(size, 16U);
3257 	}
3258 
3259 	return len;
3260 }
3261 
3262 static ssize_t
3263 il3945_store_measurement(struct device *d, struct device_attribute *attr,
3264 			 const char *buf, size_t count)
3265 {
3266 	struct il_priv *il = dev_get_drvdata(d);
3267 	struct ieee80211_measurement_params params = {
3268 		.channel = le16_to_cpu(il->active.channel),
3269 		.start_time = cpu_to_le64(il->_3945.last_tsf),
3270 		.duration = cpu_to_le16(1),
3271 	};
3272 	u8 type = IL_MEASURE_BASIC;
3273 	u8 buffer[32];
3274 	u8 channel;
3275 
3276 	if (count) {
3277 		char *p = buffer;
3278 		strlcpy(buffer, buf, sizeof(buffer));
3279 		channel = simple_strtoul(p, NULL, 0);
3280 		if (channel)
3281 			params.channel = channel;
3282 
3283 		p = buffer;
3284 		while (*p && *p != ' ')
3285 			p++;
3286 		if (*p)
3287 			type = simple_strtoul(p + 1, NULL, 0);
3288 	}
3289 
3290 	D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3291 	       type, params.channel, buf);
3292 	il3945_get_measurement(il, &params, type);
3293 
3294 	return count;
3295 }
3296 
3297 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
3298 		   il3945_store_measurement);
3299 
3300 static ssize_t
3301 il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3302 			const char *buf, size_t count)
3303 {
3304 	struct il_priv *il = dev_get_drvdata(d);
3305 
3306 	il->retry_rate = simple_strtoul(buf, NULL, 0);
3307 	if (il->retry_rate <= 0)
3308 		il->retry_rate = 1;
3309 
3310 	return count;
3311 }
3312 
3313 static ssize_t
3314 il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3315 		       char *buf)
3316 {
3317 	struct il_priv *il = dev_get_drvdata(d);
3318 	return sprintf(buf, "%d", il->retry_rate);
3319 }
3320 
3321 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
3322 		   il3945_store_retry_rate);
3323 
3324 static ssize_t
3325 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3326 {
3327 	/* all this shit doesn't belong into sysfs anyway */
3328 	return 0;
3329 }
3330 
3331 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
3332 
3333 static ssize_t
3334 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3335 {
3336 	struct il_priv *il = dev_get_drvdata(d);
3337 
3338 	if (!il_is_alive(il))
3339 		return -EAGAIN;
3340 
3341 	return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3342 }
3343 
3344 static ssize_t
3345 il3945_store_antenna(struct device *d, struct device_attribute *attr,
3346 		     const char *buf, size_t count)
3347 {
3348 	struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3349 	int ant;
3350 
3351 	if (count == 0)
3352 		return 0;
3353 
3354 	if (sscanf(buf, "%1i", &ant) != 1) {
3355 		D_INFO("not in hex or decimal form.\n");
3356 		return count;
3357 	}
3358 
3359 	if (ant >= 0 && ant <= 2) {
3360 		D_INFO("Setting antenna select to %d.\n", ant);
3361 		il3945_mod_params.antenna = (enum il3945_antenna)ant;
3362 	} else
3363 		D_INFO("Bad antenna select value %d.\n", ant);
3364 
3365 	return count;
3366 }
3367 
3368 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
3369 
3370 static ssize_t
3371 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3372 {
3373 	struct il_priv *il = dev_get_drvdata(d);
3374 	if (!il_is_alive(il))
3375 		return -EAGAIN;
3376 	return sprintf(buf, "0x%08x\n", (int)il->status);
3377 }
3378 
3379 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
3380 
3381 static ssize_t
3382 il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3383 		      const char *buf, size_t count)
3384 {
3385 	struct il_priv *il = dev_get_drvdata(d);
3386 	char *p = (char *)buf;
3387 
3388 	if (p[0] == '1')
3389 		il3945_dump_nic_error_log(il);
3390 
3391 	return strnlen(buf, count);
3392 }
3393 
3394 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
3395 
3396 /*****************************************************************************
3397  *
3398  * driver setup and tear down
3399  *
3400  *****************************************************************************/
3401 
3402 static void
3403 il3945_setup_deferred_work(struct il_priv *il)
3404 {
3405 	il->workqueue = create_singlethread_workqueue(DRV_NAME);
3406 
3407 	init_waitqueue_head(&il->wait_command_queue);
3408 
3409 	INIT_WORK(&il->restart, il3945_bg_restart);
3410 	INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3411 	INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3412 	INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3413 	INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3414 
3415 	il_setup_scan_deferred_work(il);
3416 
3417 	il3945_hw_setup_deferred_work(il);
3418 
3419 	timer_setup(&il->watchdog, il_bg_watchdog, 0);
3420 
3421 	tasklet_init(&il->irq_tasklet,
3422 		     (void (*)(unsigned long))il3945_irq_tasklet,
3423 		     (unsigned long)il);
3424 }
3425 
3426 static void
3427 il3945_cancel_deferred_work(struct il_priv *il)
3428 {
3429 	il3945_hw_cancel_deferred_work(il);
3430 
3431 	cancel_delayed_work_sync(&il->init_alive_start);
3432 	cancel_delayed_work(&il->alive_start);
3433 
3434 	il_cancel_scan_deferred_work(il);
3435 }
3436 
3437 static struct attribute *il3945_sysfs_entries[] = {
3438 	&dev_attr_antenna.attr,
3439 	&dev_attr_channels.attr,
3440 	&dev_attr_dump_errors.attr,
3441 	&dev_attr_flags.attr,
3442 	&dev_attr_filter_flags.attr,
3443 	&dev_attr_measurement.attr,
3444 	&dev_attr_retry_rate.attr,
3445 	&dev_attr_status.attr,
3446 	&dev_attr_temperature.attr,
3447 	&dev_attr_tx_power.attr,
3448 #ifdef CONFIG_IWLEGACY_DEBUG
3449 	&dev_attr_debug_level.attr,
3450 #endif
3451 	NULL
3452 };
3453 
3454 static const struct attribute_group il3945_attribute_group = {
3455 	.name = NULL,		/* put in device directory */
3456 	.attrs = il3945_sysfs_entries,
3457 };
3458 
3459 static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
3460 	.tx = il3945_mac_tx,
3461 	.start = il3945_mac_start,
3462 	.stop = il3945_mac_stop,
3463 	.add_interface = il_mac_add_interface,
3464 	.remove_interface = il_mac_remove_interface,
3465 	.change_interface = il_mac_change_interface,
3466 	.config = il_mac_config,
3467 	.configure_filter = il3945_configure_filter,
3468 	.set_key = il3945_mac_set_key,
3469 	.conf_tx = il_mac_conf_tx,
3470 	.reset_tsf = il_mac_reset_tsf,
3471 	.bss_info_changed = il_mac_bss_info_changed,
3472 	.hw_scan = il_mac_hw_scan,
3473 	.sta_add = il3945_mac_sta_add,
3474 	.sta_remove = il_mac_sta_remove,
3475 	.tx_last_beacon = il_mac_tx_last_beacon,
3476 	.flush = il_mac_flush,
3477 };
3478 
3479 static int
3480 il3945_init_drv(struct il_priv *il)
3481 {
3482 	int ret;
3483 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3484 
3485 	il->retry_rate = 1;
3486 	il->beacon_skb = NULL;
3487 
3488 	spin_lock_init(&il->sta_lock);
3489 	spin_lock_init(&il->hcmd_lock);
3490 
3491 	INIT_LIST_HEAD(&il->free_frames);
3492 
3493 	mutex_init(&il->mutex);
3494 
3495 	il->ieee_channels = NULL;
3496 	il->ieee_rates = NULL;
3497 	il->band = NL80211_BAND_2GHZ;
3498 
3499 	il->iw_mode = NL80211_IFTYPE_STATION;
3500 	il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3501 
3502 	/* initialize force reset */
3503 	il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3504 
3505 	if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3506 		IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3507 			eeprom->version);
3508 		ret = -EINVAL;
3509 		goto err;
3510 	}
3511 	ret = il_init_channel_map(il);
3512 	if (ret) {
3513 		IL_ERR("initializing regulatory failed: %d\n", ret);
3514 		goto err;
3515 	}
3516 
3517 	/* Set up txpower settings in driver for all channels */
3518 	if (il3945_txpower_set_from_eeprom(il)) {
3519 		ret = -EIO;
3520 		goto err_free_channel_map;
3521 	}
3522 
3523 	ret = il_init_geos(il);
3524 	if (ret) {
3525 		IL_ERR("initializing geos failed: %d\n", ret);
3526 		goto err_free_channel_map;
3527 	}
3528 	il3945_init_hw_rates(il, il->ieee_rates);
3529 
3530 	return 0;
3531 
3532 err_free_channel_map:
3533 	il_free_channel_map(il);
3534 err:
3535 	return ret;
3536 }
3537 
3538 #define IL3945_MAX_PROBE_REQUEST	200
3539 
3540 static int
3541 il3945_setup_mac(struct il_priv *il)
3542 {
3543 	int ret;
3544 	struct ieee80211_hw *hw = il->hw;
3545 
3546 	hw->rate_control_algorithm = "iwl-3945-rs";
3547 	hw->sta_data_size = sizeof(struct il3945_sta_priv);
3548 	hw->vif_data_size = sizeof(struct il_vif_priv);
3549 
3550 	/* Tell mac80211 our characteristics */
3551 	ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3552 	ieee80211_hw_set(hw, SUPPORTS_PS);
3553 	ieee80211_hw_set(hw, SIGNAL_DBM);
3554 	ieee80211_hw_set(hw, SPECTRUM_MGMT);
3555 
3556 	hw->wiphy->interface_modes =
3557 	    BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3558 
3559 	hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
3560 	hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
3561 				       REGULATORY_DISABLE_BEACON_HINTS;
3562 
3563 	hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3564 
3565 	hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3566 	/* we create the 802.11 header and a zero-length SSID element */
3567 	hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3568 
3569 	/* Default value; 4 EDCA QOS priorities */
3570 	hw->queues = 4;
3571 
3572 	if (il->bands[NL80211_BAND_2GHZ].n_channels)
3573 		il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
3574 		    &il->bands[NL80211_BAND_2GHZ];
3575 
3576 	if (il->bands[NL80211_BAND_5GHZ].n_channels)
3577 		il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
3578 		    &il->bands[NL80211_BAND_5GHZ];
3579 
3580 	il_leds_init(il);
3581 
3582 	wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3583 
3584 	ret = ieee80211_register_hw(il->hw);
3585 	if (ret) {
3586 		IL_ERR("Failed to register hw (error %d)\n", ret);
3587 		return ret;
3588 	}
3589 	il->mac80211_registered = 1;
3590 
3591 	return 0;
3592 }
3593 
3594 static int
3595 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3596 {
3597 	int err = 0;
3598 	struct il_priv *il;
3599 	struct ieee80211_hw *hw;
3600 	struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3601 	struct il3945_eeprom *eeprom;
3602 	unsigned long flags;
3603 
3604 	/***********************
3605 	 * 1. Allocating HW data
3606 	 * ********************/
3607 
3608 	hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3609 	if (!hw) {
3610 		err = -ENOMEM;
3611 		goto out;
3612 	}
3613 	il = hw->priv;
3614 	il->hw = hw;
3615 	SET_IEEE80211_DEV(hw, &pdev->dev);
3616 
3617 	il->cmd_queue = IL39_CMD_QUEUE_NUM;
3618 
3619 	D_INFO("*** LOAD DRIVER ***\n");
3620 	il->cfg = cfg;
3621 	il->ops = &il3945_ops;
3622 #ifdef CONFIG_IWLEGACY_DEBUGFS
3623 	il->debugfs_ops = &il3945_debugfs_ops;
3624 #endif
3625 	il->pci_dev = pdev;
3626 	il->inta_mask = CSR_INI_SET_MASK;
3627 
3628 	/***************************
3629 	 * 2. Initializing PCI bus
3630 	 * *************************/
3631 	pci_disable_link_state(pdev,
3632 			       PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3633 			       PCIE_LINK_STATE_CLKPM);
3634 
3635 	if (pci_enable_device(pdev)) {
3636 		err = -ENODEV;
3637 		goto out_ieee80211_free_hw;
3638 	}
3639 
3640 	pci_set_master(pdev);
3641 
3642 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3643 	if (!err)
3644 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3645 	if (err) {
3646 		IL_WARN("No suitable DMA available.\n");
3647 		goto out_pci_disable_device;
3648 	}
3649 
3650 	pci_set_drvdata(pdev, il);
3651 	err = pci_request_regions(pdev, DRV_NAME);
3652 	if (err)
3653 		goto out_pci_disable_device;
3654 
3655 	/***********************
3656 	 * 3. Read REV Register
3657 	 * ********************/
3658 	il->hw_base = pci_ioremap_bar(pdev, 0);
3659 	if (!il->hw_base) {
3660 		err = -ENODEV;
3661 		goto out_pci_release_regions;
3662 	}
3663 
3664 	D_INFO("pci_resource_len = 0x%08llx\n",
3665 	       (unsigned long long)pci_resource_len(pdev, 0));
3666 	D_INFO("pci_resource_base = %p\n", il->hw_base);
3667 
3668 	/* We disable the RETRY_TIMEOUT register (0x41) to keep
3669 	 * PCI Tx retries from interfering with C3 CPU state */
3670 	pci_write_config_byte(pdev, 0x41, 0x00);
3671 
3672 	/* these spin locks will be used in apm_init and EEPROM access
3673 	 * we should init now
3674 	 */
3675 	spin_lock_init(&il->reg_lock);
3676 	spin_lock_init(&il->lock);
3677 
3678 	/*
3679 	 * stop and reset the on-board processor just in case it is in a
3680 	 * strange state ... like being left stranded by a primary kernel
3681 	 * and this is now the kdump kernel trying to start up
3682 	 */
3683 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3684 
3685 	/***********************
3686 	 * 4. Read EEPROM
3687 	 * ********************/
3688 
3689 	/* Read the EEPROM */
3690 	err = il_eeprom_init(il);
3691 	if (err) {
3692 		IL_ERR("Unable to init EEPROM\n");
3693 		goto out_iounmap;
3694 	}
3695 	/* MAC Address location in EEPROM same for 3945/4965 */
3696 	eeprom = (struct il3945_eeprom *)il->eeprom;
3697 	D_INFO("MAC address: %pM\n", eeprom->mac_address);
3698 	SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3699 
3700 	/***********************
3701 	 * 5. Setup HW Constants
3702 	 * ********************/
3703 	/* Device-specific setup */
3704 	err = il3945_hw_set_hw_params(il);
3705 	if (err) {
3706 		IL_ERR("failed to set hw settings\n");
3707 		goto out_eeprom_free;
3708 	}
3709 
3710 	/***********************
3711 	 * 6. Setup il
3712 	 * ********************/
3713 
3714 	err = il3945_init_drv(il);
3715 	if (err) {
3716 		IL_ERR("initializing driver failed\n");
3717 		goto out_unset_hw_params;
3718 	}
3719 
3720 	IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3721 
3722 	/***********************
3723 	 * 7. Setup Services
3724 	 * ********************/
3725 
3726 	spin_lock_irqsave(&il->lock, flags);
3727 	il_disable_interrupts(il);
3728 	spin_unlock_irqrestore(&il->lock, flags);
3729 
3730 	pci_enable_msi(il->pci_dev);
3731 
3732 	err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3733 	if (err) {
3734 		IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3735 		goto out_disable_msi;
3736 	}
3737 
3738 	err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3739 	if (err) {
3740 		IL_ERR("failed to create sysfs device attributes\n");
3741 		goto out_release_irq;
3742 	}
3743 
3744 	il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3745 	il3945_setup_deferred_work(il);
3746 	il3945_setup_handlers(il);
3747 	il_power_initialize(il);
3748 
3749 	/*********************************
3750 	 * 8. Setup and Register mac80211
3751 	 * *******************************/
3752 
3753 	il_enable_interrupts(il);
3754 
3755 	err = il3945_setup_mac(il);
3756 	if (err)
3757 		goto out_remove_sysfs;
3758 
3759 	il_dbgfs_register(il, DRV_NAME);
3760 
3761 	/* Start monitoring the killswitch */
3762 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3763 
3764 	return 0;
3765 
3766 out_remove_sysfs:
3767 	destroy_workqueue(il->workqueue);
3768 	il->workqueue = NULL;
3769 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3770 out_release_irq:
3771 	free_irq(il->pci_dev->irq, il);
3772 out_disable_msi:
3773 	pci_disable_msi(il->pci_dev);
3774 	il_free_geos(il);
3775 	il_free_channel_map(il);
3776 out_unset_hw_params:
3777 	il3945_unset_hw_params(il);
3778 out_eeprom_free:
3779 	il_eeprom_free(il);
3780 out_iounmap:
3781 	iounmap(il->hw_base);
3782 out_pci_release_regions:
3783 	pci_release_regions(pdev);
3784 out_pci_disable_device:
3785 	pci_disable_device(pdev);
3786 out_ieee80211_free_hw:
3787 	ieee80211_free_hw(il->hw);
3788 out:
3789 	return err;
3790 }
3791 
3792 static void
3793 il3945_pci_remove(struct pci_dev *pdev)
3794 {
3795 	struct il_priv *il = pci_get_drvdata(pdev);
3796 	unsigned long flags;
3797 
3798 	if (!il)
3799 		return;
3800 
3801 	D_INFO("*** UNLOAD DRIVER ***\n");
3802 
3803 	il_dbgfs_unregister(il);
3804 
3805 	set_bit(S_EXIT_PENDING, &il->status);
3806 
3807 	il_leds_exit(il);
3808 
3809 	if (il->mac80211_registered) {
3810 		ieee80211_unregister_hw(il->hw);
3811 		il->mac80211_registered = 0;
3812 	} else {
3813 		il3945_down(il);
3814 	}
3815 
3816 	/*
3817 	 * Make sure device is reset to low power before unloading driver.
3818 	 * This may be redundant with il_down(), but there are paths to
3819 	 * run il_down() without calling apm_ops.stop(), and there are
3820 	 * paths to avoid running il_down() at all before leaving driver.
3821 	 * This (inexpensive) call *makes sure* device is reset.
3822 	 */
3823 	il_apm_stop(il);
3824 
3825 	/* make sure we flush any pending irq or
3826 	 * tasklet for the driver
3827 	 */
3828 	spin_lock_irqsave(&il->lock, flags);
3829 	il_disable_interrupts(il);
3830 	spin_unlock_irqrestore(&il->lock, flags);
3831 
3832 	il3945_synchronize_irq(il);
3833 
3834 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3835 
3836 	cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3837 
3838 	il3945_dealloc_ucode_pci(il);
3839 
3840 	if (il->rxq.bd)
3841 		il3945_rx_queue_free(il, &il->rxq);
3842 	il3945_hw_txq_ctx_free(il);
3843 
3844 	il3945_unset_hw_params(il);
3845 
3846 	/*netif_stop_queue(dev); */
3847 	flush_workqueue(il->workqueue);
3848 
3849 	/* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3850 	 * il->workqueue... so we can't take down the workqueue
3851 	 * until now... */
3852 	destroy_workqueue(il->workqueue);
3853 	il->workqueue = NULL;
3854 
3855 	free_irq(pdev->irq, il);
3856 	pci_disable_msi(pdev);
3857 
3858 	iounmap(il->hw_base);
3859 	pci_release_regions(pdev);
3860 	pci_disable_device(pdev);
3861 
3862 	il_free_channel_map(il);
3863 	il_free_geos(il);
3864 	kfree(il->scan_cmd);
3865 	if (il->beacon_skb)
3866 		dev_kfree_skb(il->beacon_skb);
3867 
3868 	ieee80211_free_hw(il->hw);
3869 }
3870 
3871 /*****************************************************************************
3872  *
3873  * driver and module entry point
3874  *
3875  *****************************************************************************/
3876 
3877 static struct pci_driver il3945_driver = {
3878 	.name = DRV_NAME,
3879 	.id_table = il3945_hw_card_ids,
3880 	.probe = il3945_pci_probe,
3881 	.remove = il3945_pci_remove,
3882 	.driver.pm = IL_LEGACY_PM_OPS,
3883 };
3884 
3885 static int __init
3886 il3945_init(void)
3887 {
3888 
3889 	int ret;
3890 	pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3891 	pr_info(DRV_COPYRIGHT "\n");
3892 
3893 	/*
3894 	 * Disabling hardware scan means that mac80211 will perform scans
3895 	 * "the hard way", rather than using device's scan.
3896 	 */
3897 	if (il3945_mod_params.disable_hw_scan) {
3898 		pr_info("hw_scan is disabled\n");
3899 		il3945_mac_ops.hw_scan = NULL;
3900 	}
3901 
3902 	ret = il3945_rate_control_register();
3903 	if (ret) {
3904 		pr_err("Unable to register rate control algorithm: %d\n", ret);
3905 		return ret;
3906 	}
3907 
3908 	ret = pci_register_driver(&il3945_driver);
3909 	if (ret) {
3910 		pr_err("Unable to initialize PCI module\n");
3911 		goto error_register;
3912 	}
3913 
3914 	return ret;
3915 
3916 error_register:
3917 	il3945_rate_control_unregister();
3918 	return ret;
3919 }
3920 
3921 static void __exit
3922 il3945_exit(void)
3923 {
3924 	pci_unregister_driver(&il3945_driver);
3925 	il3945_rate_control_unregister();
3926 }
3927 
3928 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3929 
3930 module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
3931 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3932 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
3933 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3934 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3935 		   0444);
3936 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3937 #ifdef CONFIG_IWLEGACY_DEBUG
3938 module_param_named(debug, il_debug_level, uint, 0644);
3939 MODULE_PARM_DESC(debug, "debug output mask");
3940 #endif
3941 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
3942 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3943 
3944 module_exit(il3945_exit);
3945 module_init(il3945_init);
3946