1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Portions of this file are derived from the ipw3945 project, as well 7 * as portions of the ieee80211 subsystem header files. 8 * 9 * Contact Information: 10 * Intel Linux Wireless <ilw@linux.intel.com> 11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12 * 13 *****************************************************************************/ 14 15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/pci.h> 21 #include <linux/pci-aspm.h> 22 #include <linux/slab.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/delay.h> 25 #include <linux/sched.h> 26 #include <linux/skbuff.h> 27 #include <linux/netdevice.h> 28 #include <linux/firmware.h> 29 #include <linux/etherdevice.h> 30 #include <linux/if_arp.h> 31 32 #include <net/ieee80211_radiotap.h> 33 #include <net/mac80211.h> 34 35 #include <asm/div64.h> 36 37 #define DRV_NAME "iwl3945" 38 39 #include "commands.h" 40 #include "common.h" 41 #include "3945.h" 42 #include "iwl-spectrum.h" 43 44 /* 45 * module name, copyright, version, etc. 46 */ 47 48 #define DRV_DESCRIPTION \ 49 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" 50 51 #ifdef CONFIG_IWLEGACY_DEBUG 52 #define VD "d" 53 #else 54 #define VD 55 #endif 56 57 /* 58 * add "s" to indicate spectrum measurement included. 59 * we add it here to be consistent with previous releases in which 60 * this was configurable. 61 */ 62 #define DRV_VERSION IWLWIFI_VERSION VD "s" 63 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation" 64 #define DRV_AUTHOR "<ilw@linux.intel.com>" 65 66 MODULE_DESCRIPTION(DRV_DESCRIPTION); 67 MODULE_VERSION(DRV_VERSION); 68 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 69 MODULE_LICENSE("GPL"); 70 71 /* module parameters */ 72 struct il_mod_params il3945_mod_params = { 73 .sw_crypto = 1, 74 .restart_fw = 1, 75 .disable_hw_scan = 1, 76 /* the rest are 0 by default */ 77 }; 78 79 /** 80 * il3945_get_antenna_flags - Get antenna flags for RXON command 81 * @il: eeprom and antenna fields are used to determine antenna flags 82 * 83 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed 84 * il3945_mod_params.antenna specifies the antenna diversity mode: 85 * 86 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself 87 * IL_ANTENNA_MAIN - Force MAIN antenna 88 * IL_ANTENNA_AUX - Force AUX antenna 89 */ 90 __le32 91 il3945_get_antenna_flags(const struct il_priv *il) 92 { 93 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 94 95 switch (il3945_mod_params.antenna) { 96 case IL_ANTENNA_DIVERSITY: 97 return 0; 98 99 case IL_ANTENNA_MAIN: 100 if (eeprom->antenna_switch_type) 101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 102 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 103 104 case IL_ANTENNA_AUX: 105 if (eeprom->antenna_switch_type) 106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 107 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 108 } 109 110 /* bad antenna selector value */ 111 IL_ERR("Bad antenna selector value (0x%x)\n", 112 il3945_mod_params.antenna); 113 114 return 0; /* "diversity" is default if error */ 115 } 116 117 static int 118 il3945_set_ccmp_dynamic_key_info(struct il_priv *il, 119 struct ieee80211_key_conf *keyconf, u8 sta_id) 120 { 121 unsigned long flags; 122 __le16 key_flags = 0; 123 int ret; 124 125 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); 126 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); 127 128 if (sta_id == il->hw_params.bcast_id) 129 key_flags |= STA_KEY_MULTICAST_MSK; 130 131 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 132 keyconf->hw_key_idx = keyconf->keyidx; 133 key_flags &= ~STA_KEY_FLG_INVALID; 134 135 spin_lock_irqsave(&il->sta_lock, flags); 136 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 137 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 138 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); 139 140 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); 141 142 if ((il->stations[sta_id].sta.key. 143 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) 144 il->stations[sta_id].sta.key.key_offset = 145 il_get_free_ucode_key_idx(il); 146 /* else, we are overriding an existing key => no need to allocated room 147 * in uCode. */ 148 149 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 150 "no space for a new key"); 151 152 il->stations[sta_id].sta.key.key_flags = key_flags; 153 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 154 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 155 156 D_INFO("hwcrypto: modify ucode station key info\n"); 157 158 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); 159 160 spin_unlock_irqrestore(&il->sta_lock, flags); 161 162 return ret; 163 } 164 165 static int 166 il3945_set_tkip_dynamic_key_info(struct il_priv *il, 167 struct ieee80211_key_conf *keyconf, u8 sta_id) 168 { 169 return -EOPNOTSUPP; 170 } 171 172 static int 173 il3945_set_wep_dynamic_key_info(struct il_priv *il, 174 struct ieee80211_key_conf *keyconf, u8 sta_id) 175 { 176 return -EOPNOTSUPP; 177 } 178 179 static int 180 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) 181 { 182 unsigned long flags; 183 struct il_addsta_cmd sta_cmd; 184 185 spin_lock_irqsave(&il->sta_lock, flags); 186 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); 187 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); 188 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; 189 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 190 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 191 memcpy(&sta_cmd, &il->stations[sta_id].sta, 192 sizeof(struct il_addsta_cmd)); 193 spin_unlock_irqrestore(&il->sta_lock, flags); 194 195 D_INFO("hwcrypto: clear ucode station key info\n"); 196 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 197 } 198 199 static int 200 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, 201 u8 sta_id) 202 { 203 int ret = 0; 204 205 keyconf->hw_key_idx = HW_KEY_DYNAMIC; 206 207 switch (keyconf->cipher) { 208 case WLAN_CIPHER_SUITE_CCMP: 209 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id); 210 break; 211 case WLAN_CIPHER_SUITE_TKIP: 212 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id); 213 break; 214 case WLAN_CIPHER_SUITE_WEP40: 215 case WLAN_CIPHER_SUITE_WEP104: 216 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); 217 break; 218 default: 219 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher); 220 ret = -EINVAL; 221 } 222 223 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", 224 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); 225 226 return ret; 227 } 228 229 static int 230 il3945_remove_static_key(struct il_priv *il) 231 { 232 int ret = -EOPNOTSUPP; 233 234 return ret; 235 } 236 237 static int 238 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) 239 { 240 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || 241 key->cipher == WLAN_CIPHER_SUITE_WEP104) 242 return -EOPNOTSUPP; 243 244 IL_ERR("Static key invalid: cipher %x\n", key->cipher); 245 return -EINVAL; 246 } 247 248 static void 249 il3945_clear_free_frames(struct il_priv *il) 250 { 251 struct list_head *element; 252 253 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); 254 255 while (!list_empty(&il->free_frames)) { 256 element = il->free_frames.next; 257 list_del(element); 258 kfree(list_entry(element, struct il3945_frame, list)); 259 il->frames_count--; 260 } 261 262 if (il->frames_count) { 263 IL_WARN("%d frames still in use. Did we lose one?\n", 264 il->frames_count); 265 il->frames_count = 0; 266 } 267 } 268 269 static struct il3945_frame * 270 il3945_get_free_frame(struct il_priv *il) 271 { 272 struct il3945_frame *frame; 273 struct list_head *element; 274 if (list_empty(&il->free_frames)) { 275 frame = kzalloc(sizeof(*frame), GFP_KERNEL); 276 if (!frame) { 277 IL_ERR("Could not allocate frame!\n"); 278 return NULL; 279 } 280 281 il->frames_count++; 282 return frame; 283 } 284 285 element = il->free_frames.next; 286 list_del(element); 287 return list_entry(element, struct il3945_frame, list); 288 } 289 290 static void 291 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) 292 { 293 memset(frame, 0, sizeof(*frame)); 294 list_add(&frame->list, &il->free_frames); 295 } 296 297 unsigned int 298 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, 299 int left) 300 { 301 302 if (!il_is_associated(il) || !il->beacon_skb) 303 return 0; 304 305 if (il->beacon_skb->len > left) 306 return 0; 307 308 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); 309 310 return il->beacon_skb->len; 311 } 312 313 static int 314 il3945_send_beacon_cmd(struct il_priv *il) 315 { 316 struct il3945_frame *frame; 317 unsigned int frame_size; 318 int rc; 319 u8 rate; 320 321 frame = il3945_get_free_frame(il); 322 323 if (!frame) { 324 IL_ERR("Could not obtain free frame buffer for beacon " 325 "command.\n"); 326 return -ENOMEM; 327 } 328 329 rate = il_get_lowest_plcp(il); 330 331 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); 332 333 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); 334 335 il3945_free_frame(il, frame); 336 337 return rc; 338 } 339 340 static void 341 il3945_unset_hw_params(struct il_priv *il) 342 { 343 if (il->_3945.shared_virt) 344 dma_free_coherent(&il->pci_dev->dev, 345 sizeof(struct il3945_shared), 346 il->_3945.shared_virt, il->_3945.shared_phys); 347 } 348 349 static void 350 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, 351 struct il_device_cmd *cmd, 352 struct sk_buff *skb_frag, int sta_id) 353 { 354 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 355 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; 356 357 tx_cmd->sec_ctl = 0; 358 359 switch (keyinfo->cipher) { 360 case WLAN_CIPHER_SUITE_CCMP: 361 tx_cmd->sec_ctl = TX_CMD_SEC_CCM; 362 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen); 363 D_TX("tx_cmd with AES hwcrypto\n"); 364 break; 365 366 case WLAN_CIPHER_SUITE_TKIP: 367 break; 368 369 case WLAN_CIPHER_SUITE_WEP104: 370 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; 371 /* fall through */ 372 case WLAN_CIPHER_SUITE_WEP40: 373 tx_cmd->sec_ctl |= 374 TX_CMD_SEC_WEP | (info->control.hw_key-> 375 hw_key_idx & TX_CMD_SEC_MSK) << 376 TX_CMD_SEC_SHIFT; 377 378 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); 379 380 D_TX("Configuring packet for WEP encryption " "with key %d\n", 381 info->control.hw_key->hw_key_idx); 382 break; 383 384 default: 385 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher); 386 break; 387 } 388 } 389 390 /* 391 * handle build C_TX command notification. 392 */ 393 static void 394 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, 395 struct ieee80211_tx_info *info, 396 struct ieee80211_hdr *hdr, u8 std_id) 397 { 398 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 399 __le32 tx_flags = tx_cmd->tx_flags; 400 __le16 fc = hdr->frame_control; 401 402 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 403 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 404 tx_flags |= TX_CMD_FLG_ACK_MSK; 405 if (ieee80211_is_mgmt(fc)) 406 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 407 if (ieee80211_is_probe_resp(fc) && 408 !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) 409 tx_flags |= TX_CMD_FLG_TSF_MSK; 410 } else { 411 tx_flags &= (~TX_CMD_FLG_ACK_MSK); 412 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 413 } 414 415 tx_cmd->sta_id = std_id; 416 if (ieee80211_has_morefrags(fc)) 417 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; 418 419 if (ieee80211_is_data_qos(fc)) { 420 u8 *qc = ieee80211_get_qos_ctl(hdr); 421 tx_cmd->tid_tspec = qc[0] & 0xf; 422 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 423 } else { 424 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 425 } 426 427 il_tx_cmd_protection(il, info, fc, &tx_flags); 428 429 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); 430 if (ieee80211_is_mgmt(fc)) { 431 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) 432 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3); 433 else 434 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2); 435 } else { 436 tx_cmd->timeout.pm_frame_timeout = 0; 437 } 438 439 tx_cmd->driver_txop = 0; 440 tx_cmd->tx_flags = tx_flags; 441 tx_cmd->next_frame_len = 0; 442 } 443 444 /* 445 * start C_TX command process 446 */ 447 static int 448 il3945_tx_skb(struct il_priv *il, 449 struct ieee80211_sta *sta, 450 struct sk_buff *skb) 451 { 452 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 453 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 454 struct il3945_tx_cmd *tx_cmd; 455 struct il_tx_queue *txq = NULL; 456 struct il_queue *q = NULL; 457 struct il_device_cmd *out_cmd; 458 struct il_cmd_meta *out_meta; 459 dma_addr_t phys_addr; 460 dma_addr_t txcmd_phys; 461 int txq_id = skb_get_queue_mapping(skb); 462 u16 len, idx, hdr_len; 463 u16 firstlen, secondlen; 464 u8 sta_id; 465 u8 tid = 0; 466 __le16 fc; 467 u8 wait_write_ptr = 0; 468 unsigned long flags; 469 470 spin_lock_irqsave(&il->lock, flags); 471 if (il_is_rfkill(il)) { 472 D_DROP("Dropping - RF KILL\n"); 473 goto drop_unlock; 474 } 475 476 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == 477 IL_INVALID_RATE) { 478 IL_ERR("ERROR: No TX rate available.\n"); 479 goto drop_unlock; 480 } 481 482 fc = hdr->frame_control; 483 484 #ifdef CONFIG_IWLEGACY_DEBUG 485 if (ieee80211_is_auth(fc)) 486 D_TX("Sending AUTH frame\n"); 487 else if (ieee80211_is_assoc_req(fc)) 488 D_TX("Sending ASSOC frame\n"); 489 else if (ieee80211_is_reassoc_req(fc)) 490 D_TX("Sending REASSOC frame\n"); 491 #endif 492 493 spin_unlock_irqrestore(&il->lock, flags); 494 495 hdr_len = ieee80211_hdrlen(fc); 496 497 /* Find idx into station table for destination station */ 498 sta_id = il_sta_id_or_broadcast(il, sta); 499 if (sta_id == IL_INVALID_STATION) { 500 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); 501 goto drop; 502 } 503 504 D_RATE("station Id %d\n", sta_id); 505 506 if (ieee80211_is_data_qos(fc)) { 507 u8 *qc = ieee80211_get_qos_ctl(hdr); 508 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 509 if (unlikely(tid >= MAX_TID_COUNT)) 510 goto drop; 511 } 512 513 /* Descriptor for chosen Tx queue */ 514 txq = &il->txq[txq_id]; 515 q = &txq->q; 516 517 if ((il_queue_space(q) < q->high_mark)) 518 goto drop; 519 520 spin_lock_irqsave(&il->lock, flags); 521 522 idx = il_get_cmd_idx(q, q->write_ptr, 0); 523 524 txq->skbs[q->write_ptr] = skb; 525 526 /* Init first empty entry in queue's array of Tx/cmd buffers */ 527 out_cmd = txq->cmd[idx]; 528 out_meta = &txq->meta[idx]; 529 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload; 530 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); 531 memset(tx_cmd, 0, sizeof(*tx_cmd)); 532 533 /* 534 * Set up the Tx-command (not MAC!) header. 535 * Store the chosen Tx queue and TFD idx within the sequence field; 536 * after Tx, uCode's Tx response will return this value so driver can 537 * locate the frame within the tx queue and do post-tx processing. 538 */ 539 out_cmd->hdr.cmd = C_TX; 540 out_cmd->hdr.sequence = 541 cpu_to_le16((u16) 542 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); 543 544 /* Copy MAC header from skb into command buffer */ 545 memcpy(tx_cmd->hdr, hdr, hdr_len); 546 547 if (info->control.hw_key) 548 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); 549 550 /* TODO need this for burst mode later on */ 551 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id); 552 553 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id); 554 555 /* Total # bytes to be transmitted */ 556 tx_cmd->len = cpu_to_le16((u16) skb->len); 557 558 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; 559 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; 560 561 /* 562 * Use the first empty entry in this queue's command buffer array 563 * to contain the Tx command and MAC header concatenated together 564 * (payload data will be in another buffer). 565 * Size of this varies, due to varying MAC header length. 566 * If end is not dword aligned, we'll have 2 extra bytes at the end 567 * of the MAC header (device reads on dword boundaries). 568 * We'll tell device about this padding later. 569 */ 570 len = 571 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + 572 hdr_len; 573 firstlen = (len + 3) & ~3; 574 575 /* Physical address of this Tx command's header (not MAC header!), 576 * within command buffer array. */ 577 txcmd_phys = 578 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, 579 PCI_DMA_TODEVICE); 580 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) 581 goto drop_unlock; 582 583 /* Set up TFD's 2nd entry to point directly to remainder of skb, 584 * if any (802.11 null frames have no payload). */ 585 secondlen = skb->len - hdr_len; 586 if (secondlen > 0) { 587 phys_addr = 588 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, 589 PCI_DMA_TODEVICE); 590 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) 591 goto drop_unlock; 592 } 593 594 /* Add buffer containing Tx command and MAC(!) header to TFD's 595 * first entry */ 596 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); 597 dma_unmap_addr_set(out_meta, mapping, txcmd_phys); 598 dma_unmap_len_set(out_meta, len, firstlen); 599 if (secondlen > 0) 600 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, 601 U32_PAD(secondlen)); 602 603 if (!ieee80211_has_morefrags(hdr->frame_control)) { 604 txq->need_update = 1; 605 } else { 606 wait_write_ptr = 1; 607 txq->need_update = 0; 608 } 609 610 il_update_stats(il, true, fc, skb->len); 611 612 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); 613 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); 614 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); 615 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, 616 ieee80211_hdrlen(fc)); 617 618 /* Tell device the write idx *just past* this latest filled TFD */ 619 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 620 il_txq_update_write_ptr(il, txq); 621 spin_unlock_irqrestore(&il->lock, flags); 622 623 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { 624 if (wait_write_ptr) { 625 spin_lock_irqsave(&il->lock, flags); 626 txq->need_update = 1; 627 il_txq_update_write_ptr(il, txq); 628 spin_unlock_irqrestore(&il->lock, flags); 629 } 630 631 il_stop_queue(il, txq); 632 } 633 634 return 0; 635 636 drop_unlock: 637 spin_unlock_irqrestore(&il->lock, flags); 638 drop: 639 return -1; 640 } 641 642 static int 643 il3945_get_measurement(struct il_priv *il, 644 struct ieee80211_measurement_params *params, u8 type) 645 { 646 struct il_spectrum_cmd spectrum; 647 struct il_rx_pkt *pkt; 648 struct il_host_cmd cmd = { 649 .id = C_SPECTRUM_MEASUREMENT, 650 .data = (void *)&spectrum, 651 .flags = CMD_WANT_SKB, 652 }; 653 u32 add_time = le64_to_cpu(params->start_time); 654 int rc; 655 int spectrum_resp_status; 656 int duration = le16_to_cpu(params->duration); 657 658 if (il_is_associated(il)) 659 add_time = 660 il_usecs_to_beacons(il, 661 le64_to_cpu(params->start_time) - 662 il->_3945.last_tsf, 663 le16_to_cpu(il->timing.beacon_interval)); 664 665 memset(&spectrum, 0, sizeof(spectrum)); 666 667 spectrum.channel_count = cpu_to_le16(1); 668 spectrum.flags = 669 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; 670 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; 671 cmd.len = sizeof(spectrum); 672 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); 673 674 if (il_is_associated(il)) 675 spectrum.start_time = 676 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time, 677 le16_to_cpu(il->timing.beacon_interval)); 678 else 679 spectrum.start_time = 0; 680 681 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); 682 spectrum.channels[0].channel = params->channel; 683 spectrum.channels[0].type = type; 684 if (il->active.flags & RXON_FLG_BAND_24G_MSK) 685 spectrum.flags |= 686 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 687 RXON_FLG_TGG_PROTECT_MSK; 688 689 rc = il_send_cmd_sync(il, &cmd); 690 if (rc) 691 return rc; 692 693 pkt = (struct il_rx_pkt *)cmd.reply_page; 694 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 695 IL_ERR("Bad return from N_RX_ON_ASSOC command\n"); 696 rc = -EIO; 697 } 698 699 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status); 700 switch (spectrum_resp_status) { 701 case 0: /* Command will be handled */ 702 if (pkt->u.spectrum.id != 0xff) { 703 D_INFO("Replaced existing measurement: %d\n", 704 pkt->u.spectrum.id); 705 il->measurement_status &= ~MEASUREMENT_READY; 706 } 707 il->measurement_status |= MEASUREMENT_ACTIVE; 708 rc = 0; 709 break; 710 711 case 1: /* Command will not be handled */ 712 rc = -EAGAIN; 713 break; 714 } 715 716 il_free_pages(il, cmd.reply_page); 717 718 return rc; 719 } 720 721 static void 722 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) 723 { 724 struct il_rx_pkt *pkt = rxb_addr(rxb); 725 struct il_alive_resp *palive; 726 struct delayed_work *pwork; 727 728 palive = &pkt->u.alive_frame; 729 730 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", 731 palive->is_valid, palive->ver_type, palive->ver_subtype); 732 733 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 734 D_INFO("Initialization Alive received.\n"); 735 memcpy(&il->card_alive_init, &pkt->u.alive_frame, 736 sizeof(struct il_alive_resp)); 737 pwork = &il->init_alive_start; 738 } else { 739 D_INFO("Runtime Alive received.\n"); 740 memcpy(&il->card_alive, &pkt->u.alive_frame, 741 sizeof(struct il_alive_resp)); 742 pwork = &il->alive_start; 743 il3945_disable_events(il); 744 } 745 746 /* We delay the ALIVE response by 5ms to 747 * give the HW RF Kill time to activate... */ 748 if (palive->is_valid == UCODE_VALID_OK) 749 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); 750 else 751 IL_WARN("uCode did not respond OK.\n"); 752 } 753 754 static void 755 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) 756 { 757 #ifdef CONFIG_IWLEGACY_DEBUG 758 struct il_rx_pkt *pkt = rxb_addr(rxb); 759 #endif 760 761 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); 762 } 763 764 static void 765 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) 766 { 767 struct il_rx_pkt *pkt = rxb_addr(rxb); 768 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); 769 #ifdef CONFIG_IWLEGACY_DEBUG 770 u8 rate = beacon->beacon_notify_hdr.rate; 771 772 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", 773 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, 774 beacon->beacon_notify_hdr.failure_frame, 775 le32_to_cpu(beacon->ibss_mgr_status), 776 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); 777 #endif 778 779 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 780 781 } 782 783 /* Handle notification from uCode that card's power state is changing 784 * due to software, hardware, or critical temperature RFKILL */ 785 static void 786 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) 787 { 788 struct il_rx_pkt *pkt = rxb_addr(rxb); 789 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 790 unsigned long status = il->status; 791 792 IL_WARN("Card state received: HW:%s SW:%s\n", 793 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 794 (flags & SW_CARD_DISABLED) ? "Kill" : "On"); 795 796 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 797 798 if (flags & HW_CARD_DISABLED) 799 set_bit(S_RFKILL, &il->status); 800 else 801 clear_bit(S_RFKILL, &il->status); 802 803 il_scan_cancel(il); 804 805 if ((test_bit(S_RFKILL, &status) != 806 test_bit(S_RFKILL, &il->status))) 807 wiphy_rfkill_set_hw_state(il->hw->wiphy, 808 test_bit(S_RFKILL, &il->status)); 809 else 810 wake_up(&il->wait_command_queue); 811 } 812 813 /** 814 * il3945_setup_handlers - Initialize Rx handler callbacks 815 * 816 * Setup the RX handlers for each of the reply types sent from the uCode 817 * to the host. 818 * 819 * This function chains into the hardware specific files for them to setup 820 * any hardware specific handlers as well. 821 */ 822 static void 823 il3945_setup_handlers(struct il_priv *il) 824 { 825 il->handlers[N_ALIVE] = il3945_hdl_alive; 826 il->handlers[C_ADD_STA] = il3945_hdl_add_sta; 827 il->handlers[N_ERROR] = il_hdl_error; 828 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; 829 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; 830 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; 831 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; 832 il->handlers[N_BEACON] = il3945_hdl_beacon; 833 834 /* 835 * The same handler is used for both the REPLY to a discrete 836 * stats request from the host as well as for the periodic 837 * stats notifications (after received beacons) from the uCode. 838 */ 839 il->handlers[C_STATS] = il3945_hdl_c_stats; 840 il->handlers[N_STATS] = il3945_hdl_stats; 841 842 il_setup_rx_scan_handlers(il); 843 il->handlers[N_CARD_STATE] = il3945_hdl_card_state; 844 845 /* Set up hardware specific Rx handlers */ 846 il3945_hw_handler_setup(il); 847 } 848 849 /************************** RX-FUNCTIONS ****************************/ 850 /* 851 * Rx theory of operation 852 * 853 * The host allocates 32 DMA target addresses and passes the host address 854 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is 855 * 0 to 31 856 * 857 * Rx Queue Indexes 858 * The host/firmware share two idx registers for managing the Rx buffers. 859 * 860 * The READ idx maps to the first position that the firmware may be writing 861 * to -- the driver can read up to (but not including) this position and get 862 * good data. 863 * The READ idx is managed by the firmware once the card is enabled. 864 * 865 * The WRITE idx maps to the last position the driver has read from -- the 866 * position preceding WRITE is the last slot the firmware can place a packet. 867 * 868 * The queue is empty (no good data) if WRITE = READ - 1, and is full if 869 * WRITE = READ. 870 * 871 * During initialization, the host sets up the READ queue position to the first 872 * IDX position, and WRITE to the last (READ - 1 wrapped) 873 * 874 * When the firmware places a packet in a buffer, it will advance the READ idx 875 * and fire the RX interrupt. The driver can then query the READ idx and 876 * process as many packets as possible, moving the WRITE idx forward as it 877 * resets the Rx queue buffers with new memory. 878 * 879 * The management in the driver is as follows: 880 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When 881 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled 882 * to replenish the iwl->rxq->rx_free. 883 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the 884 * iwl->rxq is replenished and the READ IDX is updated (updating the 885 * 'processed' and 'read' driver idxes as well) 886 * + A received packet is processed and handed to the kernel network stack, 887 * detached from the iwl->rxq. The driver 'processed' idx is updated. 888 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free 889 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ 890 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there 891 * were enough free buffers and RX_STALLED is set it is cleared. 892 * 893 * 894 * Driver sequence: 895 * 896 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls 897 * il3945_rx_queue_restock 898 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx 899 * queue, updates firmware pointers, and updates 900 * the WRITE idx. If insufficient rx_free buffers 901 * are available, schedules il3945_rx_replenish 902 * 903 * -- enable interrupts -- 904 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the 905 * READ IDX, detaching the SKB from the pool. 906 * Moves the packet buffer from queue to rx_used. 907 * Calls il3945_rx_queue_restock to refill any empty 908 * slots. 909 * ... 910 * 911 */ 912 913 /** 914 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr 915 */ 916 static inline __le32 917 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) 918 { 919 return cpu_to_le32((u32) dma_addr); 920 } 921 922 /** 923 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool 924 * 925 * If there are slots in the RX queue that need to be restocked, 926 * and we have free pre-allocated buffers, fill the ranks as much 927 * as we can, pulling from rx_free. 928 * 929 * This moves the 'write' idx forward to catch up with 'processed', and 930 * also updates the memory address in the firmware to reference the new 931 * target buffer. 932 */ 933 static void 934 il3945_rx_queue_restock(struct il_priv *il) 935 { 936 struct il_rx_queue *rxq = &il->rxq; 937 struct list_head *element; 938 struct il_rx_buf *rxb; 939 unsigned long flags; 940 941 spin_lock_irqsave(&rxq->lock, flags); 942 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) { 943 /* Get next free Rx buffer, remove from free list */ 944 element = rxq->rx_free.next; 945 rxb = list_entry(element, struct il_rx_buf, list); 946 list_del(element); 947 948 /* Point to Rx buffer via next RBD in circular buffer */ 949 rxq->bd[rxq->write] = 950 il3945_dma_addr2rbd_ptr(il, rxb->page_dma); 951 rxq->queue[rxq->write] = rxb; 952 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 953 rxq->free_count--; 954 } 955 spin_unlock_irqrestore(&rxq->lock, flags); 956 /* If the pre-allocated buffer pool is dropping low, schedule to 957 * refill it */ 958 if (rxq->free_count <= RX_LOW_WATERMARK) 959 queue_work(il->workqueue, &il->rx_replenish); 960 961 /* If we've added more space for the firmware to place data, tell it. 962 * Increment device's write pointer in multiples of 8. */ 963 if (rxq->write_actual != (rxq->write & ~0x7) || 964 abs(rxq->write - rxq->read) > 7) { 965 spin_lock_irqsave(&rxq->lock, flags); 966 rxq->need_update = 1; 967 spin_unlock_irqrestore(&rxq->lock, flags); 968 il_rx_queue_update_write_ptr(il, rxq); 969 } 970 } 971 972 /** 973 * il3945_rx_replenish - Move all used packet from rx_used to rx_free 974 * 975 * When moving to rx_free an SKB is allocated for the slot. 976 * 977 * Also restock the Rx queue via il3945_rx_queue_restock. 978 * This is called as a scheduled work item (except for during initialization) 979 */ 980 static void 981 il3945_rx_allocate(struct il_priv *il, gfp_t priority) 982 { 983 struct il_rx_queue *rxq = &il->rxq; 984 struct list_head *element; 985 struct il_rx_buf *rxb; 986 struct page *page; 987 dma_addr_t page_dma; 988 unsigned long flags; 989 gfp_t gfp_mask = priority; 990 991 while (1) { 992 spin_lock_irqsave(&rxq->lock, flags); 993 if (list_empty(&rxq->rx_used)) { 994 spin_unlock_irqrestore(&rxq->lock, flags); 995 return; 996 } 997 spin_unlock_irqrestore(&rxq->lock, flags); 998 999 if (rxq->free_count > RX_LOW_WATERMARK) 1000 gfp_mask |= __GFP_NOWARN; 1001 1002 if (il->hw_params.rx_page_order > 0) 1003 gfp_mask |= __GFP_COMP; 1004 1005 /* Alloc a new receive buffer */ 1006 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); 1007 if (!page) { 1008 if (net_ratelimit()) 1009 D_INFO("Failed to allocate SKB buffer.\n"); 1010 if (rxq->free_count <= RX_LOW_WATERMARK && 1011 net_ratelimit()) 1012 IL_ERR("Failed to allocate SKB buffer with %0x." 1013 "Only %u free buffers remaining.\n", 1014 priority, rxq->free_count); 1015 /* We don't reschedule replenish work here -- we will 1016 * call the restock method and if it still needs 1017 * more buffers it will schedule replenish */ 1018 break; 1019 } 1020 1021 /* Get physical address of RB/SKB */ 1022 page_dma = 1023 pci_map_page(il->pci_dev, page, 0, 1024 PAGE_SIZE << il->hw_params.rx_page_order, 1025 PCI_DMA_FROMDEVICE); 1026 1027 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) { 1028 __free_pages(page, il->hw_params.rx_page_order); 1029 break; 1030 } 1031 1032 spin_lock_irqsave(&rxq->lock, flags); 1033 1034 if (list_empty(&rxq->rx_used)) { 1035 spin_unlock_irqrestore(&rxq->lock, flags); 1036 pci_unmap_page(il->pci_dev, page_dma, 1037 PAGE_SIZE << il->hw_params.rx_page_order, 1038 PCI_DMA_FROMDEVICE); 1039 __free_pages(page, il->hw_params.rx_page_order); 1040 return; 1041 } 1042 1043 element = rxq->rx_used.next; 1044 rxb = list_entry(element, struct il_rx_buf, list); 1045 list_del(element); 1046 1047 rxb->page = page; 1048 rxb->page_dma = page_dma; 1049 list_add_tail(&rxb->list, &rxq->rx_free); 1050 rxq->free_count++; 1051 il->alloc_rxb_page++; 1052 1053 spin_unlock_irqrestore(&rxq->lock, flags); 1054 } 1055 } 1056 1057 void 1058 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) 1059 { 1060 unsigned long flags; 1061 int i; 1062 spin_lock_irqsave(&rxq->lock, flags); 1063 INIT_LIST_HEAD(&rxq->rx_free); 1064 INIT_LIST_HEAD(&rxq->rx_used); 1065 /* Fill the rx_used queue with _all_ of the Rx buffers */ 1066 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 1067 /* In the reset function, these buffers may have been allocated 1068 * to an SKB, so we need to unmap and free potential storage */ 1069 if (rxq->pool[i].page != NULL) { 1070 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 1071 PAGE_SIZE << il->hw_params.rx_page_order, 1072 PCI_DMA_FROMDEVICE); 1073 __il_free_pages(il, rxq->pool[i].page); 1074 rxq->pool[i].page = NULL; 1075 } 1076 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 1077 } 1078 1079 /* Set us so that we have processed and used all buffers, but have 1080 * not restocked the Rx queue with fresh buffers */ 1081 rxq->read = rxq->write = 0; 1082 rxq->write_actual = 0; 1083 rxq->free_count = 0; 1084 spin_unlock_irqrestore(&rxq->lock, flags); 1085 } 1086 1087 void 1088 il3945_rx_replenish(void *data) 1089 { 1090 struct il_priv *il = data; 1091 unsigned long flags; 1092 1093 il3945_rx_allocate(il, GFP_KERNEL); 1094 1095 spin_lock_irqsave(&il->lock, flags); 1096 il3945_rx_queue_restock(il); 1097 spin_unlock_irqrestore(&il->lock, flags); 1098 } 1099 1100 static void 1101 il3945_rx_replenish_now(struct il_priv *il) 1102 { 1103 il3945_rx_allocate(il, GFP_ATOMIC); 1104 1105 il3945_rx_queue_restock(il); 1106 } 1107 1108 /* Assumes that the skb field of the buffers in 'pool' is kept accurate. 1109 * If an SKB has been detached, the POOL needs to have its SKB set to NULL 1110 * This free routine walks the list of POOL entries and if SKB is set to 1111 * non NULL it is unmapped and freed 1112 */ 1113 static void 1114 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) 1115 { 1116 int i; 1117 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 1118 if (rxq->pool[i].page != NULL) { 1119 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 1120 PAGE_SIZE << il->hw_params.rx_page_order, 1121 PCI_DMA_FROMDEVICE); 1122 __il_free_pages(il, rxq->pool[i].page); 1123 rxq->pool[i].page = NULL; 1124 } 1125 } 1126 1127 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, 1128 rxq->bd_dma); 1129 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), 1130 rxq->rb_stts, rxq->rb_stts_dma); 1131 rxq->bd = NULL; 1132 rxq->rb_stts = NULL; 1133 } 1134 1135 /* Convert linear signal-to-noise ratio into dB */ 1136 static u8 ratio2dB[100] = { 1137 /* 0 1 2 3 4 5 6 7 8 9 */ 1138 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ 1139 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ 1140 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ 1141 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ 1142 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ 1143 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ 1144 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ 1145 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ 1146 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ 1147 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ 1148 }; 1149 1150 /* Calculates a relative dB value from a ratio of linear 1151 * (i.e. not dB) signal levels. 1152 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ 1153 int 1154 il3945_calc_db_from_ratio(int sig_ratio) 1155 { 1156 /* 1000:1 or higher just report as 60 dB */ 1157 if (sig_ratio >= 1000) 1158 return 60; 1159 1160 /* 100:1 or higher, divide by 10 and use table, 1161 * add 20 dB to make up for divide by 10 */ 1162 if (sig_ratio >= 100) 1163 return 20 + (int)ratio2dB[sig_ratio / 10]; 1164 1165 /* We shouldn't see this */ 1166 if (sig_ratio < 1) 1167 return 0; 1168 1169 /* Use table for ratios 1:1 - 99:1 */ 1170 return (int)ratio2dB[sig_ratio]; 1171 } 1172 1173 /** 1174 * il3945_rx_handle - Main entry function for receiving responses from uCode 1175 * 1176 * Uses the il->handlers callback function array to invoke 1177 * the appropriate handlers, including command responses, 1178 * frame-received notifications, and other notifications. 1179 */ 1180 static void 1181 il3945_rx_handle(struct il_priv *il) 1182 { 1183 struct il_rx_buf *rxb; 1184 struct il_rx_pkt *pkt; 1185 struct il_rx_queue *rxq = &il->rxq; 1186 u32 r, i; 1187 int reclaim; 1188 unsigned long flags; 1189 u8 fill_rx = 0; 1190 u32 count = 8; 1191 int total_empty = 0; 1192 1193 /* uCode's read idx (stored in shared DRAM) indicates the last Rx 1194 * buffer that the driver may process (last buffer filled by ucode). */ 1195 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; 1196 i = rxq->read; 1197 1198 /* calculate total frames need to be restock after handling RX */ 1199 total_empty = r - rxq->write_actual; 1200 if (total_empty < 0) 1201 total_empty += RX_QUEUE_SIZE; 1202 1203 if (total_empty > (RX_QUEUE_SIZE / 2)) 1204 fill_rx = 1; 1205 /* Rx interrupt, but nothing sent from uCode */ 1206 if (i == r) 1207 D_RX("r = %d, i = %d\n", r, i); 1208 1209 while (i != r) { 1210 int len; 1211 1212 rxb = rxq->queue[i]; 1213 1214 /* If an RXB doesn't have a Rx queue slot associated with it, 1215 * then a bug has been introduced in the queue refilling 1216 * routines -- catch it here */ 1217 BUG_ON(rxb == NULL); 1218 1219 rxq->queue[i] = NULL; 1220 1221 pci_unmap_page(il->pci_dev, rxb->page_dma, 1222 PAGE_SIZE << il->hw_params.rx_page_order, 1223 PCI_DMA_FROMDEVICE); 1224 pkt = rxb_addr(rxb); 1225 1226 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; 1227 len += sizeof(u32); /* account for status word */ 1228 1229 reclaim = il_need_reclaim(il, pkt); 1230 1231 /* Based on type of command response or notification, 1232 * handle those that need handling via function in 1233 * handlers table. See il3945_setup_handlers() */ 1234 if (il->handlers[pkt->hdr.cmd]) { 1235 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, 1236 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1237 il->isr_stats.handlers[pkt->hdr.cmd]++; 1238 il->handlers[pkt->hdr.cmd] (il, rxb); 1239 } else { 1240 /* No handling needed */ 1241 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, 1242 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1243 } 1244 1245 /* 1246 * XXX: After here, we should always check rxb->page 1247 * against NULL before touching it or its virtual 1248 * memory (pkt). Because some handler might have 1249 * already taken or freed the pages. 1250 */ 1251 1252 if (reclaim) { 1253 /* Invoke any callbacks, transfer the buffer to caller, 1254 * and fire off the (possibly) blocking il_send_cmd() 1255 * as we reclaim the driver command queue */ 1256 if (rxb->page) 1257 il_tx_cmd_complete(il, rxb); 1258 else 1259 IL_WARN("Claim null rxb?\n"); 1260 } 1261 1262 /* Reuse the page if possible. For notification packets and 1263 * SKBs that fail to Rx correctly, add them back into the 1264 * rx_free list for reuse later. */ 1265 spin_lock_irqsave(&rxq->lock, flags); 1266 if (rxb->page != NULL) { 1267 rxb->page_dma = 1268 pci_map_page(il->pci_dev, rxb->page, 0, 1269 PAGE_SIZE << il->hw_params. 1270 rx_page_order, PCI_DMA_FROMDEVICE); 1271 if (unlikely(pci_dma_mapping_error(il->pci_dev, 1272 rxb->page_dma))) { 1273 __il_free_pages(il, rxb->page); 1274 rxb->page = NULL; 1275 list_add_tail(&rxb->list, &rxq->rx_used); 1276 } else { 1277 list_add_tail(&rxb->list, &rxq->rx_free); 1278 rxq->free_count++; 1279 } 1280 } else 1281 list_add_tail(&rxb->list, &rxq->rx_used); 1282 1283 spin_unlock_irqrestore(&rxq->lock, flags); 1284 1285 i = (i + 1) & RX_QUEUE_MASK; 1286 /* If there are a lot of unused frames, 1287 * restock the Rx queue so ucode won't assert. */ 1288 if (fill_rx) { 1289 count++; 1290 if (count >= 8) { 1291 rxq->read = i; 1292 il3945_rx_replenish_now(il); 1293 count = 0; 1294 } 1295 } 1296 } 1297 1298 /* Backtrack one entry */ 1299 rxq->read = i; 1300 if (fill_rx) 1301 il3945_rx_replenish_now(il); 1302 else 1303 il3945_rx_queue_restock(il); 1304 } 1305 1306 /* call this function to flush any scheduled tasklet */ 1307 static inline void 1308 il3945_synchronize_irq(struct il_priv *il) 1309 { 1310 /* wait to make sure we flush pending tasklet */ 1311 synchronize_irq(il->pci_dev->irq); 1312 tasklet_kill(&il->irq_tasklet); 1313 } 1314 1315 static const char * 1316 il3945_desc_lookup(int i) 1317 { 1318 switch (i) { 1319 case 1: 1320 return "FAIL"; 1321 case 2: 1322 return "BAD_PARAM"; 1323 case 3: 1324 return "BAD_CHECKSUM"; 1325 case 4: 1326 return "NMI_INTERRUPT"; 1327 case 5: 1328 return "SYSASSERT"; 1329 case 6: 1330 return "FATAL_ERROR"; 1331 } 1332 1333 return "UNKNOWN"; 1334 } 1335 1336 #define ERROR_START_OFFSET (1 * sizeof(u32)) 1337 #define ERROR_ELEM_SIZE (7 * sizeof(u32)) 1338 1339 void 1340 il3945_dump_nic_error_log(struct il_priv *il) 1341 { 1342 u32 i; 1343 u32 desc, time, count, base, data1; 1344 u32 blink1, blink2, ilink1, ilink2; 1345 1346 base = le32_to_cpu(il->card_alive.error_event_table_ptr); 1347 1348 if (!il3945_hw_valid_rtc_data_addr(base)) { 1349 IL_ERR("Not valid error log pointer 0x%08X\n", base); 1350 return; 1351 } 1352 1353 count = il_read_targ_mem(il, base); 1354 1355 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1356 IL_ERR("Start IWL Error Log Dump:\n"); 1357 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); 1358 } 1359 1360 IL_ERR("Desc Time asrtPC blink2 " 1361 "ilink1 nmiPC Line\n"); 1362 for (i = ERROR_START_OFFSET; 1363 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; 1364 i += ERROR_ELEM_SIZE) { 1365 desc = il_read_targ_mem(il, base + i); 1366 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); 1367 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); 1368 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); 1369 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); 1370 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); 1371 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); 1372 1373 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", 1374 il3945_desc_lookup(desc), desc, time, blink1, blink2, 1375 ilink1, ilink2, data1); 1376 } 1377 } 1378 1379 static void 1380 il3945_irq_tasklet(struct il_priv *il) 1381 { 1382 u32 inta, handled = 0; 1383 u32 inta_fh; 1384 unsigned long flags; 1385 #ifdef CONFIG_IWLEGACY_DEBUG 1386 u32 inta_mask; 1387 #endif 1388 1389 spin_lock_irqsave(&il->lock, flags); 1390 1391 /* Ack/clear/reset pending uCode interrupts. 1392 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1393 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 1394 inta = _il_rd(il, CSR_INT); 1395 _il_wr(il, CSR_INT, inta); 1396 1397 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 1398 * Any new interrupts that happen after this, either while we're 1399 * in this tasklet, or later, will show up in next ISR/tasklet. */ 1400 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1401 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); 1402 1403 #ifdef CONFIG_IWLEGACY_DEBUG 1404 if (il_get_debug_level(il) & IL_DL_ISR) { 1405 /* just for debug */ 1406 inta_mask = _il_rd(il, CSR_INT_MASK); 1407 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, 1408 inta_mask, inta_fh); 1409 } 1410 #endif 1411 1412 spin_unlock_irqrestore(&il->lock, flags); 1413 1414 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1415 * atomic, make sure that inta covers all the interrupts that 1416 * we've discovered, even if FH interrupt came in just after 1417 * reading CSR_INT. */ 1418 if (inta_fh & CSR39_FH_INT_RX_MASK) 1419 inta |= CSR_INT_BIT_FH_RX; 1420 if (inta_fh & CSR39_FH_INT_TX_MASK) 1421 inta |= CSR_INT_BIT_FH_TX; 1422 1423 /* Now service all interrupt bits discovered above. */ 1424 if (inta & CSR_INT_BIT_HW_ERR) { 1425 IL_ERR("Hardware error detected. Restarting.\n"); 1426 1427 /* Tell the device to stop sending interrupts */ 1428 il_disable_interrupts(il); 1429 1430 il->isr_stats.hw++; 1431 il_irq_handle_error(il); 1432 1433 handled |= CSR_INT_BIT_HW_ERR; 1434 1435 return; 1436 } 1437 #ifdef CONFIG_IWLEGACY_DEBUG 1438 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1439 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1440 if (inta & CSR_INT_BIT_SCD) { 1441 D_ISR("Scheduler finished to transmit " 1442 "the frame/frames.\n"); 1443 il->isr_stats.sch++; 1444 } 1445 1446 /* Alive notification via Rx interrupt will do the real work */ 1447 if (inta & CSR_INT_BIT_ALIVE) { 1448 D_ISR("Alive interrupt\n"); 1449 il->isr_stats.alive++; 1450 } 1451 } 1452 #endif 1453 /* Safely ignore these bits for debug checks below */ 1454 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); 1455 1456 /* Error detected by uCode */ 1457 if (inta & CSR_INT_BIT_SW_ERR) { 1458 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n", 1459 inta); 1460 il->isr_stats.sw++; 1461 il_irq_handle_error(il); 1462 handled |= CSR_INT_BIT_SW_ERR; 1463 } 1464 1465 /* uCode wakes up after power-down sleep */ 1466 if (inta & CSR_INT_BIT_WAKEUP) { 1467 D_ISR("Wakeup interrupt\n"); 1468 il_rx_queue_update_write_ptr(il, &il->rxq); 1469 1470 spin_lock_irqsave(&il->lock, flags); 1471 il_txq_update_write_ptr(il, &il->txq[0]); 1472 il_txq_update_write_ptr(il, &il->txq[1]); 1473 il_txq_update_write_ptr(il, &il->txq[2]); 1474 il_txq_update_write_ptr(il, &il->txq[3]); 1475 il_txq_update_write_ptr(il, &il->txq[4]); 1476 spin_unlock_irqrestore(&il->lock, flags); 1477 1478 il->isr_stats.wakeup++; 1479 handled |= CSR_INT_BIT_WAKEUP; 1480 } 1481 1482 /* All uCode command responses, including Tx command responses, 1483 * Rx "responses" (frame-received notification), and other 1484 * notifications from uCode come through here*/ 1485 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1486 il3945_rx_handle(il); 1487 il->isr_stats.rx++; 1488 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1489 } 1490 1491 if (inta & CSR_INT_BIT_FH_TX) { 1492 D_ISR("Tx interrupt\n"); 1493 il->isr_stats.tx++; 1494 1495 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); 1496 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); 1497 handled |= CSR_INT_BIT_FH_TX; 1498 } 1499 1500 if (inta & ~handled) { 1501 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled); 1502 il->isr_stats.unhandled++; 1503 } 1504 1505 if (inta & ~il->inta_mask) { 1506 IL_WARN("Disabled INTA bits 0x%08x were pending\n", 1507 inta & ~il->inta_mask); 1508 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); 1509 } 1510 1511 /* Re-enable all interrupts */ 1512 /* only Re-enable if disabled by irq */ 1513 if (test_bit(S_INT_ENABLED, &il->status)) 1514 il_enable_interrupts(il); 1515 1516 #ifdef CONFIG_IWLEGACY_DEBUG 1517 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1518 inta = _il_rd(il, CSR_INT); 1519 inta_mask = _il_rd(il, CSR_INT_MASK); 1520 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1521 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 1522 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1523 } 1524 #endif 1525 } 1526 1527 static int 1528 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band, 1529 u8 is_active, u8 n_probes, 1530 struct il3945_scan_channel *scan_ch, 1531 struct ieee80211_vif *vif) 1532 { 1533 struct ieee80211_channel *chan; 1534 const struct ieee80211_supported_band *sband; 1535 const struct il_channel_info *ch_info; 1536 u16 passive_dwell = 0; 1537 u16 active_dwell = 0; 1538 int added, i; 1539 1540 sband = il_get_hw_mode(il, band); 1541 if (!sband) 1542 return 0; 1543 1544 active_dwell = il_get_active_dwell_time(il, band, n_probes); 1545 passive_dwell = il_get_passive_dwell_time(il, band, vif); 1546 1547 if (passive_dwell <= active_dwell) 1548 passive_dwell = active_dwell + 1; 1549 1550 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { 1551 chan = il->scan_request->channels[i]; 1552 1553 if (chan->band != band) 1554 continue; 1555 1556 scan_ch->channel = chan->hw_value; 1557 1558 ch_info = il_get_channel_info(il, band, scan_ch->channel); 1559 if (!il_is_channel_valid(ch_info)) { 1560 D_SCAN("Channel %d is INVALID for this band.\n", 1561 scan_ch->channel); 1562 continue; 1563 } 1564 1565 scan_ch->active_dwell = cpu_to_le16(active_dwell); 1566 scan_ch->passive_dwell = cpu_to_le16(passive_dwell); 1567 /* If passive , set up for auto-switch 1568 * and use long active_dwell time. 1569 */ 1570 if (!is_active || il_is_channel_passive(ch_info) || 1571 (chan->flags & IEEE80211_CHAN_NO_IR)) { 1572 scan_ch->type = 0; /* passive */ 1573 if (IL_UCODE_API(il->ucode_ver) == 1) 1574 scan_ch->active_dwell = 1575 cpu_to_le16(passive_dwell - 1); 1576 } else { 1577 scan_ch->type = 1; /* active */ 1578 } 1579 1580 /* Set direct probe bits. These may be used both for active 1581 * scan channels (probes gets sent right away), 1582 * or for passive channels (probes get se sent only after 1583 * hearing clear Rx packet).*/ 1584 if (IL_UCODE_API(il->ucode_ver) >= 2) { 1585 if (n_probes) 1586 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1587 } else { 1588 /* uCode v1 does not allow setting direct probe bits on 1589 * passive channel. */ 1590 if ((scan_ch->type & 1) && n_probes) 1591 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1592 } 1593 1594 /* Set txpower levels to defaults */ 1595 scan_ch->tpc.dsp_atten = 110; 1596 /* scan_pwr_info->tpc.dsp_atten; */ 1597 1598 /*scan_pwr_info->tpc.tx_gain; */ 1599 if (band == NL80211_BAND_5GHZ) 1600 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; 1601 else { 1602 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); 1603 /* NOTE: if we were doing 6Mb OFDM for scans we'd use 1604 * power level: 1605 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; 1606 */ 1607 } 1608 1609 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel, 1610 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", 1611 (scan_ch->type & 1) ? active_dwell : passive_dwell); 1612 1613 scan_ch++; 1614 added++; 1615 } 1616 1617 D_SCAN("total channels to scan %d\n", added); 1618 return added; 1619 } 1620 1621 static void 1622 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) 1623 { 1624 int i; 1625 1626 for (i = 0; i < RATE_COUNT_LEGACY; i++) { 1627 rates[i].bitrate = il3945_rates[i].ieee * 5; 1628 rates[i].hw_value = i; /* Rate scaling will work on idxes */ 1629 rates[i].hw_value_short = i; 1630 rates[i].flags = 0; 1631 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { 1632 /* 1633 * If CCK != 1M then set short preamble rate flag. 1634 */ 1635 rates[i].flags |= 1636 (il3945_rates[i].plcp == 1637 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; 1638 } 1639 } 1640 } 1641 1642 /****************************************************************************** 1643 * 1644 * uCode download functions 1645 * 1646 ******************************************************************************/ 1647 1648 static void 1649 il3945_dealloc_ucode_pci(struct il_priv *il) 1650 { 1651 il_free_fw_desc(il->pci_dev, &il->ucode_code); 1652 il_free_fw_desc(il->pci_dev, &il->ucode_data); 1653 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); 1654 il_free_fw_desc(il->pci_dev, &il->ucode_init); 1655 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); 1656 il_free_fw_desc(il->pci_dev, &il->ucode_boot); 1657 } 1658 1659 /** 1660 * il3945_verify_inst_full - verify runtime uCode image in card vs. host, 1661 * looking at all data. 1662 */ 1663 static int 1664 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) 1665 { 1666 u32 val; 1667 u32 save_len = len; 1668 int rc = 0; 1669 u32 errcnt; 1670 1671 D_INFO("ucode inst image size is %u\n", len); 1672 1673 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); 1674 1675 errcnt = 0; 1676 for (; len > 0; len -= sizeof(u32), image++) { 1677 /* read data comes through single port, auto-incr addr */ 1678 /* NOTE: Use the debugless read so we don't flood kernel log 1679 * if IL_DL_IO is set */ 1680 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1681 if (val != le32_to_cpu(*image)) { 1682 IL_ERR("uCode INST section is invalid at " 1683 "offset 0x%x, is 0x%x, s/b 0x%x\n", 1684 save_len - len, val, le32_to_cpu(*image)); 1685 rc = -EIO; 1686 errcnt++; 1687 if (errcnt >= 20) 1688 break; 1689 } 1690 } 1691 1692 if (!errcnt) 1693 D_INFO("ucode image in INSTRUCTION memory is good\n"); 1694 1695 return rc; 1696 } 1697 1698 /** 1699 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, 1700 * using sample data 100 bytes apart. If these sample points are good, 1701 * it's a pretty good bet that everything between them is good, too. 1702 */ 1703 static int 1704 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) 1705 { 1706 u32 val; 1707 int rc = 0; 1708 u32 errcnt = 0; 1709 u32 i; 1710 1711 D_INFO("ucode inst image size is %u\n", len); 1712 1713 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { 1714 /* read data comes through single port, auto-incr addr */ 1715 /* NOTE: Use the debugless read so we don't flood kernel log 1716 * if IL_DL_IO is set */ 1717 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); 1718 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1719 if (val != le32_to_cpu(*image)) { 1720 #if 0 /* Enable this if you want to see details */ 1721 IL_ERR("uCode INST section is invalid at " 1722 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val, 1723 *image); 1724 #endif 1725 rc = -EIO; 1726 errcnt++; 1727 if (errcnt >= 3) 1728 break; 1729 } 1730 } 1731 1732 return rc; 1733 } 1734 1735 /** 1736 * il3945_verify_ucode - determine which instruction image is in SRAM, 1737 * and verify its contents 1738 */ 1739 static int 1740 il3945_verify_ucode(struct il_priv *il) 1741 { 1742 __le32 *image; 1743 u32 len; 1744 int rc = 0; 1745 1746 /* Try bootstrap */ 1747 image = (__le32 *) il->ucode_boot.v_addr; 1748 len = il->ucode_boot.len; 1749 rc = il3945_verify_inst_sparse(il, image, len); 1750 if (rc == 0) { 1751 D_INFO("Bootstrap uCode is good in inst SRAM\n"); 1752 return 0; 1753 } 1754 1755 /* Try initialize */ 1756 image = (__le32 *) il->ucode_init.v_addr; 1757 len = il->ucode_init.len; 1758 rc = il3945_verify_inst_sparse(il, image, len); 1759 if (rc == 0) { 1760 D_INFO("Initialize uCode is good in inst SRAM\n"); 1761 return 0; 1762 } 1763 1764 /* Try runtime/protocol */ 1765 image = (__le32 *) il->ucode_code.v_addr; 1766 len = il->ucode_code.len; 1767 rc = il3945_verify_inst_sparse(il, image, len); 1768 if (rc == 0) { 1769 D_INFO("Runtime uCode is good in inst SRAM\n"); 1770 return 0; 1771 } 1772 1773 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); 1774 1775 /* Since nothing seems to match, show first several data entries in 1776 * instruction SRAM, so maybe visual inspection will give a clue. 1777 * Selection of bootstrap image (vs. other images) is arbitrary. */ 1778 image = (__le32 *) il->ucode_boot.v_addr; 1779 len = il->ucode_boot.len; 1780 rc = il3945_verify_inst_full(il, image, len); 1781 1782 return rc; 1783 } 1784 1785 static void 1786 il3945_nic_start(struct il_priv *il) 1787 { 1788 /* Remove all resets to allow NIC to operate */ 1789 _il_wr(il, CSR_RESET, 0); 1790 } 1791 1792 #define IL3945_UCODE_GET(item) \ 1793 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\ 1794 { \ 1795 return le32_to_cpu(ucode->v1.item); \ 1796 } 1797 1798 static u32 1799 il3945_ucode_get_header_size(u32 api_ver) 1800 { 1801 return 24; 1802 } 1803 1804 static u8 * 1805 il3945_ucode_get_data(const struct il_ucode_header *ucode) 1806 { 1807 return (u8 *) ucode->v1.data; 1808 } 1809 1810 IL3945_UCODE_GET(inst_size); 1811 IL3945_UCODE_GET(data_size); 1812 IL3945_UCODE_GET(init_size); 1813 IL3945_UCODE_GET(init_data_size); 1814 IL3945_UCODE_GET(boot_size); 1815 1816 /** 1817 * il3945_read_ucode - Read uCode images from disk file. 1818 * 1819 * Copy into buffers for card to fetch via bus-mastering 1820 */ 1821 static int 1822 il3945_read_ucode(struct il_priv *il) 1823 { 1824 const struct il_ucode_header *ucode; 1825 int ret = -EINVAL, idx; 1826 const struct firmware *ucode_raw; 1827 /* firmware file name contains uCode/driver compatibility version */ 1828 const char *name_pre = il->cfg->fw_name_pre; 1829 const unsigned int api_max = il->cfg->ucode_api_max; 1830 const unsigned int api_min = il->cfg->ucode_api_min; 1831 char buf[25]; 1832 u8 *src; 1833 size_t len; 1834 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; 1835 1836 /* Ask kernel firmware_class module to get the boot firmware off disk. 1837 * request_firmware() is synchronous, file is in memory on return. */ 1838 for (idx = api_max; idx >= api_min; idx--) { 1839 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); 1840 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); 1841 if (ret < 0) { 1842 IL_ERR("%s firmware file req failed: %d\n", buf, ret); 1843 if (ret == -ENOENT) 1844 continue; 1845 else 1846 goto error; 1847 } else { 1848 if (idx < api_max) 1849 IL_ERR("Loaded firmware %s, " 1850 "which is deprecated. " 1851 " Please use API v%u instead.\n", buf, 1852 api_max); 1853 D_INFO("Got firmware '%s' file " 1854 "(%zd bytes) from disk\n", buf, ucode_raw->size); 1855 break; 1856 } 1857 } 1858 1859 if (ret < 0) 1860 goto error; 1861 1862 /* Make sure that we got at least our header! */ 1863 if (ucode_raw->size < il3945_ucode_get_header_size(1)) { 1864 IL_ERR("File size way too small!\n"); 1865 ret = -EINVAL; 1866 goto err_release; 1867 } 1868 1869 /* Data from ucode file: header followed by uCode images */ 1870 ucode = (struct il_ucode_header *)ucode_raw->data; 1871 1872 il->ucode_ver = le32_to_cpu(ucode->ver); 1873 api_ver = IL_UCODE_API(il->ucode_ver); 1874 inst_size = il3945_ucode_get_inst_size(ucode); 1875 data_size = il3945_ucode_get_data_size(ucode); 1876 init_size = il3945_ucode_get_init_size(ucode); 1877 init_data_size = il3945_ucode_get_init_data_size(ucode); 1878 boot_size = il3945_ucode_get_boot_size(ucode); 1879 src = il3945_ucode_get_data(ucode); 1880 1881 /* api_ver should match the api version forming part of the 1882 * firmware filename ... but we don't check for that and only rely 1883 * on the API version read from firmware header from here on forward */ 1884 1885 if (api_ver < api_min || api_ver > api_max) { 1886 IL_ERR("Driver unable to support your firmware API. " 1887 "Driver supports v%u, firmware is v%u.\n", api_max, 1888 api_ver); 1889 il->ucode_ver = 0; 1890 ret = -EINVAL; 1891 goto err_release; 1892 } 1893 if (api_ver != api_max) 1894 IL_ERR("Firmware has old API version. Expected %u, " 1895 "got %u. New firmware can be obtained " 1896 "from http://www.intellinuxwireless.org.\n", api_max, 1897 api_ver); 1898 1899 IL_INFO("loaded firmware version %u.%u.%u.%u\n", 1900 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), 1901 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); 1902 1903 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), 1904 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), 1905 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), 1906 IL_UCODE_SERIAL(il->ucode_ver)); 1907 1908 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); 1909 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size); 1910 D_INFO("f/w package hdr runtime data size = %u\n", data_size); 1911 D_INFO("f/w package hdr init inst size = %u\n", init_size); 1912 D_INFO("f/w package hdr init data size = %u\n", init_data_size); 1913 D_INFO("f/w package hdr boot inst size = %u\n", boot_size); 1914 1915 /* Verify size of file vs. image size info in file's header */ 1916 if (ucode_raw->size != 1917 il3945_ucode_get_header_size(api_ver) + inst_size + data_size + 1918 init_size + init_data_size + boot_size) { 1919 1920 D_INFO("uCode file size %zd does not match expected size\n", 1921 ucode_raw->size); 1922 ret = -EINVAL; 1923 goto err_release; 1924 } 1925 1926 /* Verify that uCode images will fit in card's SRAM */ 1927 if (inst_size > IL39_MAX_INST_SIZE) { 1928 D_INFO("uCode instr len %d too large to fit in\n", inst_size); 1929 ret = -EINVAL; 1930 goto err_release; 1931 } 1932 1933 if (data_size > IL39_MAX_DATA_SIZE) { 1934 D_INFO("uCode data len %d too large to fit in\n", data_size); 1935 ret = -EINVAL; 1936 goto err_release; 1937 } 1938 if (init_size > IL39_MAX_INST_SIZE) { 1939 D_INFO("uCode init instr len %d too large to fit in\n", 1940 init_size); 1941 ret = -EINVAL; 1942 goto err_release; 1943 } 1944 if (init_data_size > IL39_MAX_DATA_SIZE) { 1945 D_INFO("uCode init data len %d too large to fit in\n", 1946 init_data_size); 1947 ret = -EINVAL; 1948 goto err_release; 1949 } 1950 if (boot_size > IL39_MAX_BSM_SIZE) { 1951 D_INFO("uCode boot instr len %d too large to fit in\n", 1952 boot_size); 1953 ret = -EINVAL; 1954 goto err_release; 1955 } 1956 1957 /* Allocate ucode buffers for card's bus-master loading ... */ 1958 1959 /* Runtime instructions and 2 copies of data: 1960 * 1) unmodified from disk 1961 * 2) backup cache for save/restore during power-downs */ 1962 il->ucode_code.len = inst_size; 1963 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); 1964 1965 il->ucode_data.len = data_size; 1966 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); 1967 1968 il->ucode_data_backup.len = data_size; 1969 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); 1970 1971 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || 1972 !il->ucode_data_backup.v_addr) 1973 goto err_pci_alloc; 1974 1975 /* Initialization instructions and data */ 1976 if (init_size && init_data_size) { 1977 il->ucode_init.len = init_size; 1978 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); 1979 1980 il->ucode_init_data.len = init_data_size; 1981 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); 1982 1983 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) 1984 goto err_pci_alloc; 1985 } 1986 1987 /* Bootstrap (instructions only, no data) */ 1988 if (boot_size) { 1989 il->ucode_boot.len = boot_size; 1990 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); 1991 1992 if (!il->ucode_boot.v_addr) 1993 goto err_pci_alloc; 1994 } 1995 1996 /* Copy images into buffers for card's bus-master reads ... */ 1997 1998 /* Runtime instructions (first block of data in file) */ 1999 len = inst_size; 2000 D_INFO("Copying (but not loading) uCode instr len %zd\n", len); 2001 memcpy(il->ucode_code.v_addr, src, len); 2002 src += len; 2003 2004 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 2005 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); 2006 2007 /* Runtime data (2nd block) 2008 * NOTE: Copy into backup buffer will be done in il3945_up() */ 2009 len = data_size; 2010 D_INFO("Copying (but not loading) uCode data len %zd\n", len); 2011 memcpy(il->ucode_data.v_addr, src, len); 2012 memcpy(il->ucode_data_backup.v_addr, src, len); 2013 src += len; 2014 2015 /* Initialization instructions (3rd block) */ 2016 if (init_size) { 2017 len = init_size; 2018 D_INFO("Copying (but not loading) init instr len %zd\n", len); 2019 memcpy(il->ucode_init.v_addr, src, len); 2020 src += len; 2021 } 2022 2023 /* Initialization data (4th block) */ 2024 if (init_data_size) { 2025 len = init_data_size; 2026 D_INFO("Copying (but not loading) init data len %zd\n", len); 2027 memcpy(il->ucode_init_data.v_addr, src, len); 2028 src += len; 2029 } 2030 2031 /* Bootstrap instructions (5th block) */ 2032 len = boot_size; 2033 D_INFO("Copying (but not loading) boot instr len %zd\n", len); 2034 memcpy(il->ucode_boot.v_addr, src, len); 2035 2036 /* We have our copies now, allow OS release its copies */ 2037 release_firmware(ucode_raw); 2038 return 0; 2039 2040 err_pci_alloc: 2041 IL_ERR("failed to allocate pci memory\n"); 2042 ret = -ENOMEM; 2043 il3945_dealloc_ucode_pci(il); 2044 2045 err_release: 2046 release_firmware(ucode_raw); 2047 2048 error: 2049 return ret; 2050 } 2051 2052 /** 2053 * il3945_set_ucode_ptrs - Set uCode address location 2054 * 2055 * Tell initialization uCode where to find runtime uCode. 2056 * 2057 * BSM registers initially contain pointers to initialization uCode. 2058 * We need to replace them to load runtime uCode inst and data, 2059 * and to save runtime data when powering down. 2060 */ 2061 static int 2062 il3945_set_ucode_ptrs(struct il_priv *il) 2063 { 2064 dma_addr_t pinst; 2065 dma_addr_t pdata; 2066 2067 /* bits 31:0 for 3945 */ 2068 pinst = il->ucode_code.p_addr; 2069 pdata = il->ucode_data_backup.p_addr; 2070 2071 /* Tell bootstrap uCode where to find image to load */ 2072 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 2073 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 2074 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); 2075 2076 /* Inst byte count must be last to set up, bit 31 signals uCode 2077 * that all new ptr/size info is in place */ 2078 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, 2079 il->ucode_code.len | BSM_DRAM_INST_LOAD); 2080 2081 D_INFO("Runtime uCode pointers are set.\n"); 2082 2083 return 0; 2084 } 2085 2086 /** 2087 * il3945_init_alive_start - Called after N_ALIVE notification received 2088 * 2089 * Called after N_ALIVE notification received from "initialize" uCode. 2090 * 2091 * Tell "initialize" uCode to go ahead and load the runtime uCode. 2092 */ 2093 static void 2094 il3945_init_alive_start(struct il_priv *il) 2095 { 2096 /* Check alive response for "valid" sign from uCode */ 2097 if (il->card_alive_init.is_valid != UCODE_VALID_OK) { 2098 /* We had an error bringing up the hardware, so take it 2099 * all the way back down so we can try again */ 2100 D_INFO("Initialize Alive failed.\n"); 2101 goto restart; 2102 } 2103 2104 /* Bootstrap uCode has loaded initialize uCode ... verify inst image. 2105 * This is a paranoid check, because we would not have gotten the 2106 * "initialize" alive if code weren't properly loaded. */ 2107 if (il3945_verify_ucode(il)) { 2108 /* Runtime instruction load was bad; 2109 * take it all the way back down so we can try again */ 2110 D_INFO("Bad \"initialize\" uCode load.\n"); 2111 goto restart; 2112 } 2113 2114 /* Send pointers to protocol/runtime uCode image ... init code will 2115 * load and launch runtime uCode, which will send us another "Alive" 2116 * notification. */ 2117 D_INFO("Initialization Alive received.\n"); 2118 if (il3945_set_ucode_ptrs(il)) { 2119 /* Runtime instruction load won't happen; 2120 * take it all the way back down so we can try again */ 2121 D_INFO("Couldn't set up uCode pointers.\n"); 2122 goto restart; 2123 } 2124 return; 2125 2126 restart: 2127 queue_work(il->workqueue, &il->restart); 2128 } 2129 2130 /** 2131 * il3945_alive_start - called after N_ALIVE notification received 2132 * from protocol/runtime uCode (initialization uCode's 2133 * Alive gets handled by il3945_init_alive_start()). 2134 */ 2135 static void 2136 il3945_alive_start(struct il_priv *il) 2137 { 2138 int thermal_spin = 0; 2139 u32 rfkill; 2140 2141 D_INFO("Runtime Alive received.\n"); 2142 2143 if (il->card_alive.is_valid != UCODE_VALID_OK) { 2144 /* We had an error bringing up the hardware, so take it 2145 * all the way back down so we can try again */ 2146 D_INFO("Alive failed.\n"); 2147 goto restart; 2148 } 2149 2150 /* Initialize uCode has loaded Runtime uCode ... verify inst image. 2151 * This is a paranoid check, because we would not have gotten the 2152 * "runtime" alive if code weren't properly loaded. */ 2153 if (il3945_verify_ucode(il)) { 2154 /* Runtime instruction load was bad; 2155 * take it all the way back down so we can try again */ 2156 D_INFO("Bad runtime uCode load.\n"); 2157 goto restart; 2158 } 2159 2160 rfkill = il_rd_prph(il, APMG_RFKILL_REG); 2161 D_INFO("RFKILL status: 0x%x\n", rfkill); 2162 2163 if (rfkill & 0x1) { 2164 clear_bit(S_RFKILL, &il->status); 2165 /* if RFKILL is not on, then wait for thermal 2166 * sensor in adapter to kick in */ 2167 while (il3945_hw_get_temperature(il) == 0) { 2168 thermal_spin++; 2169 udelay(10); 2170 } 2171 2172 if (thermal_spin) 2173 D_INFO("Thermal calibration took %dus\n", 2174 thermal_spin * 10); 2175 } else 2176 set_bit(S_RFKILL, &il->status); 2177 2178 /* After the ALIVE response, we can send commands to 3945 uCode */ 2179 set_bit(S_ALIVE, &il->status); 2180 2181 /* Enable watchdog to monitor the driver tx queues */ 2182 il_setup_watchdog(il); 2183 2184 if (il_is_rfkill(il)) 2185 return; 2186 2187 ieee80211_wake_queues(il->hw); 2188 2189 il->active_rate = RATES_MASK_3945; 2190 2191 il_power_update_mode(il, true); 2192 2193 if (il_is_associated(il)) { 2194 struct il3945_rxon_cmd *active_rxon = 2195 (struct il3945_rxon_cmd *)(&il->active); 2196 2197 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2198 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2199 } else { 2200 /* Initialize our rx_config data */ 2201 il_connection_init_rx_config(il); 2202 } 2203 2204 /* Configure Bluetooth device coexistence support */ 2205 il_send_bt_config(il); 2206 2207 set_bit(S_READY, &il->status); 2208 2209 /* Configure the adapter for unassociated operation */ 2210 il3945_commit_rxon(il); 2211 2212 il3945_reg_txpower_periodic(il); 2213 2214 D_INFO("ALIVE processing complete.\n"); 2215 wake_up(&il->wait_command_queue); 2216 2217 return; 2218 2219 restart: 2220 queue_work(il->workqueue, &il->restart); 2221 } 2222 2223 static void il3945_cancel_deferred_work(struct il_priv *il); 2224 2225 static void 2226 __il3945_down(struct il_priv *il) 2227 { 2228 unsigned long flags; 2229 int exit_pending; 2230 2231 D_INFO(DRV_NAME " is going down\n"); 2232 2233 il_scan_cancel_timeout(il, 200); 2234 2235 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); 2236 2237 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set 2238 * to prevent rearm timer */ 2239 del_timer_sync(&il->watchdog); 2240 2241 /* Station information will now be cleared in device */ 2242 il_clear_ucode_stations(il); 2243 il_dealloc_bcast_stations(il); 2244 il_clear_driver_stations(il); 2245 2246 /* Unblock any waiting calls */ 2247 wake_up_all(&il->wait_command_queue); 2248 2249 /* Wipe out the EXIT_PENDING status bit if we are not actually 2250 * exiting the module */ 2251 if (!exit_pending) 2252 clear_bit(S_EXIT_PENDING, &il->status); 2253 2254 /* stop and reset the on-board processor */ 2255 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 2256 2257 /* tell the device to stop sending interrupts */ 2258 spin_lock_irqsave(&il->lock, flags); 2259 il_disable_interrupts(il); 2260 spin_unlock_irqrestore(&il->lock, flags); 2261 il3945_synchronize_irq(il); 2262 2263 if (il->mac80211_registered) 2264 ieee80211_stop_queues(il->hw); 2265 2266 /* If we have not previously called il3945_init() then 2267 * clear all bits but the RF Kill bits and return */ 2268 if (!il_is_init(il)) { 2269 il->status = 2270 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2271 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2272 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2273 goto exit; 2274 } 2275 2276 /* ...otherwise clear out all the status bits but the RF Kill 2277 * bit and continue taking the NIC down. */ 2278 il->status &= 2279 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2280 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2281 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | 2282 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2283 2284 /* 2285 * We disabled and synchronized interrupt, and priv->mutex is taken, so 2286 * here is the only thread which will program device registers, but 2287 * still have lockdep assertions, so we are taking reg_lock. 2288 */ 2289 spin_lock_irq(&il->reg_lock); 2290 /* FIXME: il_grab_nic_access if rfkill is off ? */ 2291 2292 il3945_hw_txq_ctx_stop(il); 2293 il3945_hw_rxq_stop(il); 2294 /* Power-down device's busmaster DMA clocks */ 2295 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); 2296 udelay(5); 2297 /* Stop the device, and put it in low power state */ 2298 _il_apm_stop(il); 2299 2300 spin_unlock_irq(&il->reg_lock); 2301 2302 il3945_hw_txq_ctx_free(il); 2303 exit: 2304 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); 2305 2306 if (il->beacon_skb) 2307 dev_kfree_skb(il->beacon_skb); 2308 il->beacon_skb = NULL; 2309 2310 /* clear out any free frames */ 2311 il3945_clear_free_frames(il); 2312 } 2313 2314 static void 2315 il3945_down(struct il_priv *il) 2316 { 2317 mutex_lock(&il->mutex); 2318 __il3945_down(il); 2319 mutex_unlock(&il->mutex); 2320 2321 il3945_cancel_deferred_work(il); 2322 } 2323 2324 #define MAX_HW_RESTARTS 5 2325 2326 static int 2327 il3945_alloc_bcast_station(struct il_priv *il) 2328 { 2329 unsigned long flags; 2330 u8 sta_id; 2331 2332 spin_lock_irqsave(&il->sta_lock, flags); 2333 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); 2334 if (sta_id == IL_INVALID_STATION) { 2335 IL_ERR("Unable to prepare broadcast station\n"); 2336 spin_unlock_irqrestore(&il->sta_lock, flags); 2337 2338 return -EINVAL; 2339 } 2340 2341 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; 2342 il->stations[sta_id].used |= IL_STA_BCAST; 2343 spin_unlock_irqrestore(&il->sta_lock, flags); 2344 2345 return 0; 2346 } 2347 2348 static int 2349 __il3945_up(struct il_priv *il) 2350 { 2351 int rc, i; 2352 2353 rc = il3945_alloc_bcast_station(il); 2354 if (rc) 2355 return rc; 2356 2357 if (test_bit(S_EXIT_PENDING, &il->status)) { 2358 IL_WARN("Exit pending; will not bring the NIC up\n"); 2359 return -EIO; 2360 } 2361 2362 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { 2363 IL_ERR("ucode not available for device bring up\n"); 2364 return -EIO; 2365 } 2366 2367 /* If platform's RF_KILL switch is NOT set to KILL */ 2368 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2369 clear_bit(S_RFKILL, &il->status); 2370 else { 2371 set_bit(S_RFKILL, &il->status); 2372 return -ERFKILL; 2373 } 2374 2375 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2376 2377 rc = il3945_hw_nic_init(il); 2378 if (rc) { 2379 IL_ERR("Unable to int nic\n"); 2380 return rc; 2381 } 2382 2383 /* make sure rfkill handshake bits are cleared */ 2384 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2385 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2386 2387 /* clear (again), then enable host interrupts */ 2388 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2389 il_enable_interrupts(il); 2390 2391 /* really make sure rfkill handshake bits are cleared */ 2392 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2393 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2394 2395 /* Copy original ucode data image from disk into backup cache. 2396 * This will be used to initialize the on-board processor's 2397 * data SRAM for a clean start when the runtime program first loads. */ 2398 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, 2399 il->ucode_data.len); 2400 2401 /* We return success when we resume from suspend and rf_kill is on. */ 2402 if (test_bit(S_RFKILL, &il->status)) 2403 return 0; 2404 2405 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2406 2407 /* load bootstrap state machine, 2408 * load bootstrap program into processor's memory, 2409 * prepare to load the "initialize" uCode */ 2410 rc = il->ops->load_ucode(il); 2411 2412 if (rc) { 2413 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc); 2414 continue; 2415 } 2416 2417 /* start card; "initialize" will load runtime ucode */ 2418 il3945_nic_start(il); 2419 2420 D_INFO(DRV_NAME " is coming up\n"); 2421 2422 return 0; 2423 } 2424 2425 set_bit(S_EXIT_PENDING, &il->status); 2426 __il3945_down(il); 2427 clear_bit(S_EXIT_PENDING, &il->status); 2428 2429 /* tried to restart and config the device for as long as our 2430 * patience could withstand */ 2431 IL_ERR("Unable to initialize device after %d attempts.\n", i); 2432 return -EIO; 2433 } 2434 2435 /***************************************************************************** 2436 * 2437 * Workqueue callbacks 2438 * 2439 *****************************************************************************/ 2440 2441 static void 2442 il3945_bg_init_alive_start(struct work_struct *data) 2443 { 2444 struct il_priv *il = 2445 container_of(data, struct il_priv, init_alive_start.work); 2446 2447 mutex_lock(&il->mutex); 2448 if (test_bit(S_EXIT_PENDING, &il->status)) 2449 goto out; 2450 2451 il3945_init_alive_start(il); 2452 out: 2453 mutex_unlock(&il->mutex); 2454 } 2455 2456 static void 2457 il3945_bg_alive_start(struct work_struct *data) 2458 { 2459 struct il_priv *il = 2460 container_of(data, struct il_priv, alive_start.work); 2461 2462 mutex_lock(&il->mutex); 2463 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) 2464 goto out; 2465 2466 il3945_alive_start(il); 2467 out: 2468 mutex_unlock(&il->mutex); 2469 } 2470 2471 /* 2472 * 3945 cannot interrupt driver when hardware rf kill switch toggles; 2473 * driver must poll CSR_GP_CNTRL_REG register for change. This register 2474 * *is* readable even when device has been SW_RESET into low power mode 2475 * (e.g. during RF KILL). 2476 */ 2477 static void 2478 il3945_rfkill_poll(struct work_struct *data) 2479 { 2480 struct il_priv *il = 2481 container_of(data, struct il_priv, _3945.rfkill_poll.work); 2482 bool old_rfkill = test_bit(S_RFKILL, &il->status); 2483 bool new_rfkill = 2484 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); 2485 2486 if (new_rfkill != old_rfkill) { 2487 if (new_rfkill) 2488 set_bit(S_RFKILL, &il->status); 2489 else 2490 clear_bit(S_RFKILL, &il->status); 2491 2492 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); 2493 2494 D_RF_KILL("RF_KILL bit toggled to %s.\n", 2495 new_rfkill ? "disable radio" : "enable radio"); 2496 } 2497 2498 /* Keep this running, even if radio now enabled. This will be 2499 * cancelled in mac_start() if system decides to start again */ 2500 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2501 round_jiffies_relative(2 * HZ)); 2502 2503 } 2504 2505 int 2506 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) 2507 { 2508 struct il_host_cmd cmd = { 2509 .id = C_SCAN, 2510 .len = sizeof(struct il3945_scan_cmd), 2511 .flags = CMD_SIZE_HUGE, 2512 }; 2513 struct il3945_scan_cmd *scan; 2514 u8 n_probes = 0; 2515 enum nl80211_band band; 2516 bool is_active = false; 2517 int ret; 2518 u16 len; 2519 2520 lockdep_assert_held(&il->mutex); 2521 2522 if (!il->scan_cmd) { 2523 il->scan_cmd = 2524 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE, 2525 GFP_KERNEL); 2526 if (!il->scan_cmd) { 2527 D_SCAN("Fail to allocate scan memory\n"); 2528 return -ENOMEM; 2529 } 2530 } 2531 scan = il->scan_cmd; 2532 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE); 2533 2534 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH; 2535 scan->quiet_time = IL_ACTIVE_QUIET_TIME; 2536 2537 if (il_is_associated(il)) { 2538 u16 interval; 2539 u32 extra; 2540 u32 suspend_time = 100; 2541 u32 scan_suspend_time = 100; 2542 2543 D_INFO("Scanning while associated...\n"); 2544 2545 interval = vif->bss_conf.beacon_int; 2546 2547 scan->suspend_time = 0; 2548 scan->max_out_time = cpu_to_le32(200 * 1024); 2549 if (!interval) 2550 interval = suspend_time; 2551 /* 2552 * suspend time format: 2553 * 0-19: beacon interval in usec (time before exec.) 2554 * 20-23: 0 2555 * 24-31: number of beacons (suspend between channels) 2556 */ 2557 2558 extra = (suspend_time / interval) << 24; 2559 scan_suspend_time = 2560 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024)); 2561 2562 scan->suspend_time = cpu_to_le32(scan_suspend_time); 2563 D_SCAN("suspend_time 0x%X beacon interval %d\n", 2564 scan_suspend_time, interval); 2565 } 2566 2567 if (il->scan_request->n_ssids) { 2568 int i, p = 0; 2569 D_SCAN("Kicking off active scan\n"); 2570 for (i = 0; i < il->scan_request->n_ssids; i++) { 2571 /* always does wildcard anyway */ 2572 if (!il->scan_request->ssids[i].ssid_len) 2573 continue; 2574 scan->direct_scan[p].id = WLAN_EID_SSID; 2575 scan->direct_scan[p].len = 2576 il->scan_request->ssids[i].ssid_len; 2577 memcpy(scan->direct_scan[p].ssid, 2578 il->scan_request->ssids[i].ssid, 2579 il->scan_request->ssids[i].ssid_len); 2580 n_probes++; 2581 p++; 2582 } 2583 is_active = true; 2584 } else 2585 D_SCAN("Kicking off passive scan.\n"); 2586 2587 /* We don't build a direct scan probe request; the uCode will do 2588 * that based on the direct_mask added to each channel entry */ 2589 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; 2590 scan->tx_cmd.sta_id = il->hw_params.bcast_id; 2591 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2592 2593 /* flags + rate selection */ 2594 2595 switch (il->scan_band) { 2596 case NL80211_BAND_2GHZ: 2597 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 2598 scan->tx_cmd.rate = RATE_1M_PLCP; 2599 band = NL80211_BAND_2GHZ; 2600 break; 2601 case NL80211_BAND_5GHZ: 2602 scan->tx_cmd.rate = RATE_6M_PLCP; 2603 band = NL80211_BAND_5GHZ; 2604 break; 2605 default: 2606 IL_WARN("Invalid scan band\n"); 2607 return -EIO; 2608 } 2609 2610 /* 2611 * If active scaning is requested but a certain channel is marked 2612 * passive, we can do active scanning if we detect transmissions. For 2613 * passive only scanning disable switching to active on any channel. 2614 */ 2615 scan->good_CRC_th = 2616 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER; 2617 2618 len = 2619 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, 2620 vif->addr, il->scan_request->ie, 2621 il->scan_request->ie_len, 2622 IL_MAX_SCAN_SIZE - sizeof(*scan)); 2623 scan->tx_cmd.len = cpu_to_le16(len); 2624 2625 /* select Rx antennas */ 2626 scan->flags |= il3945_get_antenna_flags(il); 2627 2628 scan->channel_count = 2629 il3945_get_channels_for_scan(il, band, is_active, n_probes, 2630 (void *)&scan->data[len], vif); 2631 if (scan->channel_count == 0) { 2632 D_SCAN("channel count %d\n", scan->channel_count); 2633 return -EIO; 2634 } 2635 2636 cmd.len += 2637 le16_to_cpu(scan->tx_cmd.len) + 2638 scan->channel_count * sizeof(struct il3945_scan_channel); 2639 cmd.data = scan; 2640 scan->len = cpu_to_le16(cmd.len); 2641 2642 set_bit(S_SCAN_HW, &il->status); 2643 ret = il_send_cmd_sync(il, &cmd); 2644 if (ret) 2645 clear_bit(S_SCAN_HW, &il->status); 2646 return ret; 2647 } 2648 2649 void 2650 il3945_post_scan(struct il_priv *il) 2651 { 2652 /* 2653 * Since setting the RXON may have been deferred while 2654 * performing the scan, fire one off if needed 2655 */ 2656 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) 2657 il3945_commit_rxon(il); 2658 } 2659 2660 static void 2661 il3945_bg_restart(struct work_struct *data) 2662 { 2663 struct il_priv *il = container_of(data, struct il_priv, restart); 2664 2665 if (test_bit(S_EXIT_PENDING, &il->status)) 2666 return; 2667 2668 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { 2669 mutex_lock(&il->mutex); 2670 il->is_open = 0; 2671 mutex_unlock(&il->mutex); 2672 il3945_down(il); 2673 ieee80211_restart_hw(il->hw); 2674 } else { 2675 il3945_down(il); 2676 2677 mutex_lock(&il->mutex); 2678 if (test_bit(S_EXIT_PENDING, &il->status)) { 2679 mutex_unlock(&il->mutex); 2680 return; 2681 } 2682 2683 __il3945_up(il); 2684 mutex_unlock(&il->mutex); 2685 } 2686 } 2687 2688 static void 2689 il3945_bg_rx_replenish(struct work_struct *data) 2690 { 2691 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); 2692 2693 mutex_lock(&il->mutex); 2694 if (test_bit(S_EXIT_PENDING, &il->status)) 2695 goto out; 2696 2697 il3945_rx_replenish(il); 2698 out: 2699 mutex_unlock(&il->mutex); 2700 } 2701 2702 void 2703 il3945_post_associate(struct il_priv *il) 2704 { 2705 int rc = 0; 2706 2707 if (!il->vif || !il->is_open) 2708 return; 2709 2710 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid, 2711 il->active.bssid_addr); 2712 2713 if (test_bit(S_EXIT_PENDING, &il->status)) 2714 return; 2715 2716 il_scan_cancel_timeout(il, 200); 2717 2718 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2719 il3945_commit_rxon(il); 2720 2721 rc = il_send_rxon_timing(il); 2722 if (rc) 2723 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n"); 2724 2725 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2726 2727 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid); 2728 2729 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid, 2730 il->vif->bss_conf.beacon_int); 2731 2732 if (il->vif->bss_conf.use_short_preamble) 2733 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2734 else 2735 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2736 2737 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2738 if (il->vif->bss_conf.use_short_slot) 2739 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2740 else 2741 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2742 } 2743 2744 il3945_commit_rxon(il); 2745 2746 switch (il->vif->type) { 2747 case NL80211_IFTYPE_STATION: 2748 il3945_rate_scale_init(il->hw, IL_AP_ID); 2749 break; 2750 case NL80211_IFTYPE_ADHOC: 2751 il3945_send_beacon_cmd(il); 2752 break; 2753 default: 2754 IL_ERR("%s Should not be called in %d mode\n", __func__, 2755 il->vif->type); 2756 break; 2757 } 2758 } 2759 2760 /***************************************************************************** 2761 * 2762 * mac80211 entry point functions 2763 * 2764 *****************************************************************************/ 2765 2766 #define UCODE_READY_TIMEOUT (2 * HZ) 2767 2768 static int 2769 il3945_mac_start(struct ieee80211_hw *hw) 2770 { 2771 struct il_priv *il = hw->priv; 2772 int ret; 2773 2774 /* we should be verifying the device is ready to be opened */ 2775 mutex_lock(&il->mutex); 2776 D_MAC80211("enter\n"); 2777 2778 /* fetch ucode file from disk, alloc and copy to bus-master buffers ... 2779 * ucode filename and max sizes are card-specific. */ 2780 2781 if (!il->ucode_code.len) { 2782 ret = il3945_read_ucode(il); 2783 if (ret) { 2784 IL_ERR("Could not read microcode: %d\n", ret); 2785 mutex_unlock(&il->mutex); 2786 goto out_release_irq; 2787 } 2788 } 2789 2790 ret = __il3945_up(il); 2791 2792 mutex_unlock(&il->mutex); 2793 2794 if (ret) 2795 goto out_release_irq; 2796 2797 D_INFO("Start UP work.\n"); 2798 2799 /* Wait for START_ALIVE from ucode. Otherwise callbacks from 2800 * mac80211 will not be run successfully. */ 2801 ret = wait_event_timeout(il->wait_command_queue, 2802 test_bit(S_READY, &il->status), 2803 UCODE_READY_TIMEOUT); 2804 if (!ret) { 2805 if (!test_bit(S_READY, &il->status)) { 2806 IL_ERR("Wait for START_ALIVE timeout after %dms.\n", 2807 jiffies_to_msecs(UCODE_READY_TIMEOUT)); 2808 ret = -ETIMEDOUT; 2809 goto out_release_irq; 2810 } 2811 } 2812 2813 /* ucode is running and will send rfkill notifications, 2814 * no need to poll the killswitch state anymore */ 2815 cancel_delayed_work(&il->_3945.rfkill_poll); 2816 2817 il->is_open = 1; 2818 D_MAC80211("leave\n"); 2819 return 0; 2820 2821 out_release_irq: 2822 il->is_open = 0; 2823 D_MAC80211("leave - failed\n"); 2824 return ret; 2825 } 2826 2827 static void 2828 il3945_mac_stop(struct ieee80211_hw *hw) 2829 { 2830 struct il_priv *il = hw->priv; 2831 2832 D_MAC80211("enter\n"); 2833 2834 if (!il->is_open) { 2835 D_MAC80211("leave - skip\n"); 2836 return; 2837 } 2838 2839 il->is_open = 0; 2840 2841 il3945_down(il); 2842 2843 flush_workqueue(il->workqueue); 2844 2845 /* start polling the killswitch state again */ 2846 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2847 round_jiffies_relative(2 * HZ)); 2848 2849 D_MAC80211("leave\n"); 2850 } 2851 2852 static void 2853 il3945_mac_tx(struct ieee80211_hw *hw, 2854 struct ieee80211_tx_control *control, 2855 struct sk_buff *skb) 2856 { 2857 struct il_priv *il = hw->priv; 2858 2859 D_MAC80211("enter\n"); 2860 2861 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 2862 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 2863 2864 if (il3945_tx_skb(il, control->sta, skb)) 2865 dev_kfree_skb_any(skb); 2866 2867 D_MAC80211("leave\n"); 2868 } 2869 2870 void 2871 il3945_config_ap(struct il_priv *il) 2872 { 2873 struct ieee80211_vif *vif = il->vif; 2874 int rc = 0; 2875 2876 if (test_bit(S_EXIT_PENDING, &il->status)) 2877 return; 2878 2879 /* The following should be done only at AP bring up */ 2880 if (!(il_is_associated(il))) { 2881 2882 /* RXON - unassoc (to set timing command) */ 2883 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2884 il3945_commit_rxon(il); 2885 2886 /* RXON Timing */ 2887 rc = il_send_rxon_timing(il); 2888 if (rc) 2889 IL_WARN("C_RXON_TIMING failed - " 2890 "Attempting to continue.\n"); 2891 2892 il->staging.assoc_id = 0; 2893 2894 if (vif->bss_conf.use_short_preamble) 2895 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2896 else 2897 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2898 2899 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2900 if (vif->bss_conf.use_short_slot) 2901 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2902 else 2903 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2904 } 2905 /* restore RXON assoc */ 2906 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2907 il3945_commit_rxon(il); 2908 } 2909 il3945_send_beacon_cmd(il); 2910 } 2911 2912 static int 2913 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2914 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2915 struct ieee80211_key_conf *key) 2916 { 2917 struct il_priv *il = hw->priv; 2918 int ret = 0; 2919 u8 sta_id = IL_INVALID_STATION; 2920 u8 static_key; 2921 2922 D_MAC80211("enter\n"); 2923 2924 if (il3945_mod_params.sw_crypto) { 2925 D_MAC80211("leave - hwcrypto disabled\n"); 2926 return -EOPNOTSUPP; 2927 } 2928 2929 /* 2930 * To support IBSS RSN, don't program group keys in IBSS, the 2931 * hardware will then not attempt to decrypt the frames. 2932 */ 2933 if (vif->type == NL80211_IFTYPE_ADHOC && 2934 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 2935 D_MAC80211("leave - IBSS RSN\n"); 2936 return -EOPNOTSUPP; 2937 } 2938 2939 static_key = !il_is_associated(il); 2940 2941 if (!static_key) { 2942 sta_id = il_sta_id_or_broadcast(il, sta); 2943 if (sta_id == IL_INVALID_STATION) { 2944 D_MAC80211("leave - station not found\n"); 2945 return -EINVAL; 2946 } 2947 } 2948 2949 mutex_lock(&il->mutex); 2950 il_scan_cancel_timeout(il, 100); 2951 2952 switch (cmd) { 2953 case SET_KEY: 2954 if (static_key) 2955 ret = il3945_set_static_key(il, key); 2956 else 2957 ret = il3945_set_dynamic_key(il, key, sta_id); 2958 D_MAC80211("enable hwcrypto key\n"); 2959 break; 2960 case DISABLE_KEY: 2961 if (static_key) 2962 ret = il3945_remove_static_key(il); 2963 else 2964 ret = il3945_clear_sta_key_info(il, sta_id); 2965 D_MAC80211("disable hwcrypto key\n"); 2966 break; 2967 default: 2968 ret = -EINVAL; 2969 } 2970 2971 D_MAC80211("leave ret %d\n", ret); 2972 mutex_unlock(&il->mutex); 2973 2974 return ret; 2975 } 2976 2977 static int 2978 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2979 struct ieee80211_sta *sta) 2980 { 2981 struct il_priv *il = hw->priv; 2982 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; 2983 int ret; 2984 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2985 u8 sta_id; 2986 2987 mutex_lock(&il->mutex); 2988 D_INFO("station %pM\n", sta->addr); 2989 sta_priv->common.sta_id = IL_INVALID_STATION; 2990 2991 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); 2992 if (ret) { 2993 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); 2994 /* Should we return success if return code is EEXIST ? */ 2995 mutex_unlock(&il->mutex); 2996 return ret; 2997 } 2998 2999 sta_priv->common.sta_id = sta_id; 3000 3001 /* Initialize rate scaling */ 3002 D_INFO("Initializing rate scaling for station %pM\n", sta->addr); 3003 il3945_rs_rate_init(il, sta, sta_id); 3004 mutex_unlock(&il->mutex); 3005 3006 return 0; 3007 } 3008 3009 static void 3010 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 3011 unsigned int *total_flags, u64 multicast) 3012 { 3013 struct il_priv *il = hw->priv; 3014 __le32 filter_or = 0, filter_nand = 0; 3015 3016 #define CHK(test, flag) do { \ 3017 if (*total_flags & (test)) \ 3018 filter_or |= (flag); \ 3019 else \ 3020 filter_nand |= (flag); \ 3021 } while (0) 3022 3023 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, 3024 *total_flags); 3025 3026 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK); 3027 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 3028 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 3029 3030 #undef CHK 3031 3032 mutex_lock(&il->mutex); 3033 3034 il->staging.filter_flags &= ~filter_nand; 3035 il->staging.filter_flags |= filter_or; 3036 3037 /* 3038 * Not committing directly because hardware can perform a scan, 3039 * but even if hw is ready, committing here breaks for some reason, 3040 * we'll eventually commit the filter flags change anyway. 3041 */ 3042 3043 mutex_unlock(&il->mutex); 3044 3045 /* 3046 * Receiving all multicast frames is always enabled by the 3047 * default flags setup in il_connection_init_rx_config() 3048 * since we currently do not support programming multicast 3049 * filters into the device. 3050 */ 3051 *total_flags &= 3052 FIF_OTHER_BSS | FIF_ALLMULTI | 3053 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 3054 } 3055 3056 /***************************************************************************** 3057 * 3058 * sysfs attributes 3059 * 3060 *****************************************************************************/ 3061 3062 #ifdef CONFIG_IWLEGACY_DEBUG 3063 3064 /* 3065 * The following adds a new attribute to the sysfs representation 3066 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) 3067 * used for controlling the debug level. 3068 * 3069 * See the level definitions in iwl for details. 3070 * 3071 * The debug_level being managed using sysfs below is a per device debug 3072 * level that is used instead of the global debug level if it (the per 3073 * device debug level) is set. 3074 */ 3075 static ssize_t 3076 il3945_show_debug_level(struct device *d, struct device_attribute *attr, 3077 char *buf) 3078 { 3079 struct il_priv *il = dev_get_drvdata(d); 3080 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); 3081 } 3082 3083 static ssize_t 3084 il3945_store_debug_level(struct device *d, struct device_attribute *attr, 3085 const char *buf, size_t count) 3086 { 3087 struct il_priv *il = dev_get_drvdata(d); 3088 unsigned long val; 3089 int ret; 3090 3091 ret = kstrtoul(buf, 0, &val); 3092 if (ret) 3093 IL_INFO("%s is not in hex or decimal form.\n", buf); 3094 else 3095 il->debug_level = val; 3096 3097 return strnlen(buf, count); 3098 } 3099 3100 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level, 3101 il3945_store_debug_level); 3102 3103 #endif /* CONFIG_IWLEGACY_DEBUG */ 3104 3105 static ssize_t 3106 il3945_show_temperature(struct device *d, struct device_attribute *attr, 3107 char *buf) 3108 { 3109 struct il_priv *il = dev_get_drvdata(d); 3110 3111 if (!il_is_alive(il)) 3112 return -EAGAIN; 3113 3114 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il)); 3115 } 3116 3117 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL); 3118 3119 static ssize_t 3120 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf) 3121 { 3122 struct il_priv *il = dev_get_drvdata(d); 3123 return sprintf(buf, "%d\n", il->tx_power_user_lmt); 3124 } 3125 3126 static ssize_t 3127 il3945_store_tx_power(struct device *d, struct device_attribute *attr, 3128 const char *buf, size_t count) 3129 { 3130 struct il_priv *il = dev_get_drvdata(d); 3131 char *p = (char *)buf; 3132 u32 val; 3133 3134 val = simple_strtoul(p, &p, 10); 3135 if (p == buf) 3136 IL_INFO(": %s is not in decimal form.\n", buf); 3137 else 3138 il3945_hw_reg_set_txpower(il, val); 3139 3140 return count; 3141 } 3142 3143 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power); 3144 3145 static ssize_t 3146 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf) 3147 { 3148 struct il_priv *il = dev_get_drvdata(d); 3149 3150 return sprintf(buf, "0x%04X\n", il->active.flags); 3151 } 3152 3153 static ssize_t 3154 il3945_store_flags(struct device *d, struct device_attribute *attr, 3155 const char *buf, size_t count) 3156 { 3157 struct il_priv *il = dev_get_drvdata(d); 3158 u32 flags = simple_strtoul(buf, NULL, 0); 3159 3160 mutex_lock(&il->mutex); 3161 if (le32_to_cpu(il->staging.flags) != flags) { 3162 /* Cancel any currently running scans... */ 3163 if (il_scan_cancel_timeout(il, 100)) 3164 IL_WARN("Could not cancel scan.\n"); 3165 else { 3166 D_INFO("Committing rxon.flags = 0x%04X\n", flags); 3167 il->staging.flags = cpu_to_le32(flags); 3168 il3945_commit_rxon(il); 3169 } 3170 } 3171 mutex_unlock(&il->mutex); 3172 3173 return count; 3174 } 3175 3176 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags); 3177 3178 static ssize_t 3179 il3945_show_filter_flags(struct device *d, struct device_attribute *attr, 3180 char *buf) 3181 { 3182 struct il_priv *il = dev_get_drvdata(d); 3183 3184 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags)); 3185 } 3186 3187 static ssize_t 3188 il3945_store_filter_flags(struct device *d, struct device_attribute *attr, 3189 const char *buf, size_t count) 3190 { 3191 struct il_priv *il = dev_get_drvdata(d); 3192 u32 filter_flags = simple_strtoul(buf, NULL, 0); 3193 3194 mutex_lock(&il->mutex); 3195 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) { 3196 /* Cancel any currently running scans... */ 3197 if (il_scan_cancel_timeout(il, 100)) 3198 IL_WARN("Could not cancel scan.\n"); 3199 else { 3200 D_INFO("Committing rxon.filter_flags = " "0x%04X\n", 3201 filter_flags); 3202 il->staging.filter_flags = cpu_to_le32(filter_flags); 3203 il3945_commit_rxon(il); 3204 } 3205 } 3206 mutex_unlock(&il->mutex); 3207 3208 return count; 3209 } 3210 3211 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags, 3212 il3945_store_filter_flags); 3213 3214 static ssize_t 3215 il3945_show_measurement(struct device *d, struct device_attribute *attr, 3216 char *buf) 3217 { 3218 struct il_priv *il = dev_get_drvdata(d); 3219 struct il_spectrum_notification measure_report; 3220 u32 size = sizeof(measure_report), len = 0, ofs = 0; 3221 u8 *data = (u8 *) &measure_report; 3222 unsigned long flags; 3223 3224 spin_lock_irqsave(&il->lock, flags); 3225 if (!(il->measurement_status & MEASUREMENT_READY)) { 3226 spin_unlock_irqrestore(&il->lock, flags); 3227 return 0; 3228 } 3229 memcpy(&measure_report, &il->measure_report, size); 3230 il->measurement_status = 0; 3231 spin_unlock_irqrestore(&il->lock, flags); 3232 3233 while (size && PAGE_SIZE - len) { 3234 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, 3235 PAGE_SIZE - len, true); 3236 len = strlen(buf); 3237 if (PAGE_SIZE - len) 3238 buf[len++] = '\n'; 3239 3240 ofs += 16; 3241 size -= min(size, 16U); 3242 } 3243 3244 return len; 3245 } 3246 3247 static ssize_t 3248 il3945_store_measurement(struct device *d, struct device_attribute *attr, 3249 const char *buf, size_t count) 3250 { 3251 struct il_priv *il = dev_get_drvdata(d); 3252 struct ieee80211_measurement_params params = { 3253 .channel = le16_to_cpu(il->active.channel), 3254 .start_time = cpu_to_le64(il->_3945.last_tsf), 3255 .duration = cpu_to_le16(1), 3256 }; 3257 u8 type = IL_MEASURE_BASIC; 3258 u8 buffer[32]; 3259 u8 channel; 3260 3261 if (count) { 3262 char *p = buffer; 3263 strlcpy(buffer, buf, sizeof(buffer)); 3264 channel = simple_strtoul(p, NULL, 0); 3265 if (channel) 3266 params.channel = channel; 3267 3268 p = buffer; 3269 while (*p && *p != ' ') 3270 p++; 3271 if (*p) 3272 type = simple_strtoul(p + 1, NULL, 0); 3273 } 3274 3275 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n", 3276 type, params.channel, buf); 3277 il3945_get_measurement(il, ¶ms, type); 3278 3279 return count; 3280 } 3281 3282 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement, 3283 il3945_store_measurement); 3284 3285 static ssize_t 3286 il3945_store_retry_rate(struct device *d, struct device_attribute *attr, 3287 const char *buf, size_t count) 3288 { 3289 struct il_priv *il = dev_get_drvdata(d); 3290 3291 il->retry_rate = simple_strtoul(buf, NULL, 0); 3292 if (il->retry_rate <= 0) 3293 il->retry_rate = 1; 3294 3295 return count; 3296 } 3297 3298 static ssize_t 3299 il3945_show_retry_rate(struct device *d, struct device_attribute *attr, 3300 char *buf) 3301 { 3302 struct il_priv *il = dev_get_drvdata(d); 3303 return sprintf(buf, "%d", il->retry_rate); 3304 } 3305 3306 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate, 3307 il3945_store_retry_rate); 3308 3309 static ssize_t 3310 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf) 3311 { 3312 /* all this shit doesn't belong into sysfs anyway */ 3313 return 0; 3314 } 3315 3316 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL); 3317 3318 static ssize_t 3319 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf) 3320 { 3321 struct il_priv *il = dev_get_drvdata(d); 3322 3323 if (!il_is_alive(il)) 3324 return -EAGAIN; 3325 3326 return sprintf(buf, "%d\n", il3945_mod_params.antenna); 3327 } 3328 3329 static ssize_t 3330 il3945_store_antenna(struct device *d, struct device_attribute *attr, 3331 const char *buf, size_t count) 3332 { 3333 struct il_priv *il __maybe_unused = dev_get_drvdata(d); 3334 int ant; 3335 3336 if (count == 0) 3337 return 0; 3338 3339 if (sscanf(buf, "%1i", &ant) != 1) { 3340 D_INFO("not in hex or decimal form.\n"); 3341 return count; 3342 } 3343 3344 if (ant >= 0 && ant <= 2) { 3345 D_INFO("Setting antenna select to %d.\n", ant); 3346 il3945_mod_params.antenna = (enum il3945_antenna)ant; 3347 } else 3348 D_INFO("Bad antenna select value %d.\n", ant); 3349 3350 return count; 3351 } 3352 3353 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna); 3354 3355 static ssize_t 3356 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf) 3357 { 3358 struct il_priv *il = dev_get_drvdata(d); 3359 if (!il_is_alive(il)) 3360 return -EAGAIN; 3361 return sprintf(buf, "0x%08x\n", (int)il->status); 3362 } 3363 3364 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL); 3365 3366 static ssize_t 3367 il3945_dump_error_log(struct device *d, struct device_attribute *attr, 3368 const char *buf, size_t count) 3369 { 3370 struct il_priv *il = dev_get_drvdata(d); 3371 char *p = (char *)buf; 3372 3373 if (p[0] == '1') 3374 il3945_dump_nic_error_log(il); 3375 3376 return strnlen(buf, count); 3377 } 3378 3379 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log); 3380 3381 /***************************************************************************** 3382 * 3383 * driver setup and tear down 3384 * 3385 *****************************************************************************/ 3386 3387 static void 3388 il3945_setup_deferred_work(struct il_priv *il) 3389 { 3390 il->workqueue = create_singlethread_workqueue(DRV_NAME); 3391 3392 init_waitqueue_head(&il->wait_command_queue); 3393 3394 INIT_WORK(&il->restart, il3945_bg_restart); 3395 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish); 3396 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start); 3397 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start); 3398 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll); 3399 3400 il_setup_scan_deferred_work(il); 3401 3402 il3945_hw_setup_deferred_work(il); 3403 3404 timer_setup(&il->watchdog, il_bg_watchdog, 0); 3405 3406 tasklet_init(&il->irq_tasklet, 3407 (void (*)(unsigned long))il3945_irq_tasklet, 3408 (unsigned long)il); 3409 } 3410 3411 static void 3412 il3945_cancel_deferred_work(struct il_priv *il) 3413 { 3414 il3945_hw_cancel_deferred_work(il); 3415 3416 cancel_delayed_work_sync(&il->init_alive_start); 3417 cancel_delayed_work(&il->alive_start); 3418 3419 il_cancel_scan_deferred_work(il); 3420 } 3421 3422 static struct attribute *il3945_sysfs_entries[] = { 3423 &dev_attr_antenna.attr, 3424 &dev_attr_channels.attr, 3425 &dev_attr_dump_errors.attr, 3426 &dev_attr_flags.attr, 3427 &dev_attr_filter_flags.attr, 3428 &dev_attr_measurement.attr, 3429 &dev_attr_retry_rate.attr, 3430 &dev_attr_status.attr, 3431 &dev_attr_temperature.attr, 3432 &dev_attr_tx_power.attr, 3433 #ifdef CONFIG_IWLEGACY_DEBUG 3434 &dev_attr_debug_level.attr, 3435 #endif 3436 NULL 3437 }; 3438 3439 static const struct attribute_group il3945_attribute_group = { 3440 .name = NULL, /* put in device directory */ 3441 .attrs = il3945_sysfs_entries, 3442 }; 3443 3444 static struct ieee80211_ops il3945_mac_ops __ro_after_init = { 3445 .tx = il3945_mac_tx, 3446 .start = il3945_mac_start, 3447 .stop = il3945_mac_stop, 3448 .add_interface = il_mac_add_interface, 3449 .remove_interface = il_mac_remove_interface, 3450 .change_interface = il_mac_change_interface, 3451 .config = il_mac_config, 3452 .configure_filter = il3945_configure_filter, 3453 .set_key = il3945_mac_set_key, 3454 .conf_tx = il_mac_conf_tx, 3455 .reset_tsf = il_mac_reset_tsf, 3456 .bss_info_changed = il_mac_bss_info_changed, 3457 .hw_scan = il_mac_hw_scan, 3458 .sta_add = il3945_mac_sta_add, 3459 .sta_remove = il_mac_sta_remove, 3460 .tx_last_beacon = il_mac_tx_last_beacon, 3461 .flush = il_mac_flush, 3462 }; 3463 3464 static int 3465 il3945_init_drv(struct il_priv *il) 3466 { 3467 int ret; 3468 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 3469 3470 il->retry_rate = 1; 3471 il->beacon_skb = NULL; 3472 3473 spin_lock_init(&il->sta_lock); 3474 spin_lock_init(&il->hcmd_lock); 3475 3476 INIT_LIST_HEAD(&il->free_frames); 3477 3478 mutex_init(&il->mutex); 3479 3480 il->ieee_channels = NULL; 3481 il->ieee_rates = NULL; 3482 il->band = NL80211_BAND_2GHZ; 3483 3484 il->iw_mode = NL80211_IFTYPE_STATION; 3485 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; 3486 3487 /* initialize force reset */ 3488 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; 3489 3490 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { 3491 IL_WARN("Unsupported EEPROM version: 0x%04X\n", 3492 eeprom->version); 3493 ret = -EINVAL; 3494 goto err; 3495 } 3496 ret = il_init_channel_map(il); 3497 if (ret) { 3498 IL_ERR("initializing regulatory failed: %d\n", ret); 3499 goto err; 3500 } 3501 3502 /* Set up txpower settings in driver for all channels */ 3503 if (il3945_txpower_set_from_eeprom(il)) { 3504 ret = -EIO; 3505 goto err_free_channel_map; 3506 } 3507 3508 ret = il_init_geos(il); 3509 if (ret) { 3510 IL_ERR("initializing geos failed: %d\n", ret); 3511 goto err_free_channel_map; 3512 } 3513 il3945_init_hw_rates(il, il->ieee_rates); 3514 3515 return 0; 3516 3517 err_free_channel_map: 3518 il_free_channel_map(il); 3519 err: 3520 return ret; 3521 } 3522 3523 #define IL3945_MAX_PROBE_REQUEST 200 3524 3525 static int 3526 il3945_setup_mac(struct il_priv *il) 3527 { 3528 int ret; 3529 struct ieee80211_hw *hw = il->hw; 3530 3531 hw->rate_control_algorithm = "iwl-3945-rs"; 3532 hw->sta_data_size = sizeof(struct il3945_sta_priv); 3533 hw->vif_data_size = sizeof(struct il_vif_priv); 3534 3535 /* Tell mac80211 our characteristics */ 3536 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 3537 ieee80211_hw_set(hw, SUPPORTS_PS); 3538 ieee80211_hw_set(hw, SIGNAL_DBM); 3539 ieee80211_hw_set(hw, SPECTRUM_MGMT); 3540 3541 hw->wiphy->interface_modes = 3542 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC); 3543 3544 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; 3545 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG | 3546 REGULATORY_DISABLE_BEACON_HINTS; 3547 3548 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 3549 3550 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3551 /* we create the 802.11 header and a zero-length SSID element */ 3552 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2; 3553 3554 /* Default value; 4 EDCA QOS priorities */ 3555 hw->queues = 4; 3556 3557 if (il->bands[NL80211_BAND_2GHZ].n_channels) 3558 il->hw->wiphy->bands[NL80211_BAND_2GHZ] = 3559 &il->bands[NL80211_BAND_2GHZ]; 3560 3561 if (il->bands[NL80211_BAND_5GHZ].n_channels) 3562 il->hw->wiphy->bands[NL80211_BAND_5GHZ] = 3563 &il->bands[NL80211_BAND_5GHZ]; 3564 3565 il_leds_init(il); 3566 3567 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 3568 3569 ret = ieee80211_register_hw(il->hw); 3570 if (ret) { 3571 IL_ERR("Failed to register hw (error %d)\n", ret); 3572 return ret; 3573 } 3574 il->mac80211_registered = 1; 3575 3576 return 0; 3577 } 3578 3579 static int 3580 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3581 { 3582 int err = 0; 3583 struct il_priv *il; 3584 struct ieee80211_hw *hw; 3585 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data); 3586 struct il3945_eeprom *eeprom; 3587 unsigned long flags; 3588 3589 /*********************** 3590 * 1. Allocating HW data 3591 * ********************/ 3592 3593 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops); 3594 if (!hw) { 3595 err = -ENOMEM; 3596 goto out; 3597 } 3598 il = hw->priv; 3599 il->hw = hw; 3600 SET_IEEE80211_DEV(hw, &pdev->dev); 3601 3602 il->cmd_queue = IL39_CMD_QUEUE_NUM; 3603 3604 D_INFO("*** LOAD DRIVER ***\n"); 3605 il->cfg = cfg; 3606 il->ops = &il3945_ops; 3607 #ifdef CONFIG_IWLEGACY_DEBUGFS 3608 il->debugfs_ops = &il3945_debugfs_ops; 3609 #endif 3610 il->pci_dev = pdev; 3611 il->inta_mask = CSR_INI_SET_MASK; 3612 3613 /*************************** 3614 * 2. Initializing PCI bus 3615 * *************************/ 3616 pci_disable_link_state(pdev, 3617 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 3618 PCIE_LINK_STATE_CLKPM); 3619 3620 if (pci_enable_device(pdev)) { 3621 err = -ENODEV; 3622 goto out_ieee80211_free_hw; 3623 } 3624 3625 pci_set_master(pdev); 3626 3627 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 3628 if (!err) 3629 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3630 if (err) { 3631 IL_WARN("No suitable DMA available.\n"); 3632 goto out_pci_disable_device; 3633 } 3634 3635 pci_set_drvdata(pdev, il); 3636 err = pci_request_regions(pdev, DRV_NAME); 3637 if (err) 3638 goto out_pci_disable_device; 3639 3640 /*********************** 3641 * 3. Read REV Register 3642 * ********************/ 3643 il->hw_base = pci_ioremap_bar(pdev, 0); 3644 if (!il->hw_base) { 3645 err = -ENODEV; 3646 goto out_pci_release_regions; 3647 } 3648 3649 D_INFO("pci_resource_len = 0x%08llx\n", 3650 (unsigned long long)pci_resource_len(pdev, 0)); 3651 D_INFO("pci_resource_base = %p\n", il->hw_base); 3652 3653 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3654 * PCI Tx retries from interfering with C3 CPU state */ 3655 pci_write_config_byte(pdev, 0x41, 0x00); 3656 3657 /* these spin locks will be used in apm_init and EEPROM access 3658 * we should init now 3659 */ 3660 spin_lock_init(&il->reg_lock); 3661 spin_lock_init(&il->lock); 3662 3663 /* 3664 * stop and reset the on-board processor just in case it is in a 3665 * strange state ... like being left stranded by a primary kernel 3666 * and this is now the kdump kernel trying to start up 3667 */ 3668 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3669 3670 /*********************** 3671 * 4. Read EEPROM 3672 * ********************/ 3673 3674 /* Read the EEPROM */ 3675 err = il_eeprom_init(il); 3676 if (err) { 3677 IL_ERR("Unable to init EEPROM\n"); 3678 goto out_iounmap; 3679 } 3680 /* MAC Address location in EEPROM same for 3945/4965 */ 3681 eeprom = (struct il3945_eeprom *)il->eeprom; 3682 D_INFO("MAC address: %pM\n", eeprom->mac_address); 3683 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address); 3684 3685 /*********************** 3686 * 5. Setup HW Constants 3687 * ********************/ 3688 /* Device-specific setup */ 3689 err = il3945_hw_set_hw_params(il); 3690 if (err) { 3691 IL_ERR("failed to set hw settings\n"); 3692 goto out_eeprom_free; 3693 } 3694 3695 /*********************** 3696 * 6. Setup il 3697 * ********************/ 3698 3699 err = il3945_init_drv(il); 3700 if (err) { 3701 IL_ERR("initializing driver failed\n"); 3702 goto out_unset_hw_params; 3703 } 3704 3705 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); 3706 3707 /*********************** 3708 * 7. Setup Services 3709 * ********************/ 3710 3711 spin_lock_irqsave(&il->lock, flags); 3712 il_disable_interrupts(il); 3713 spin_unlock_irqrestore(&il->lock, flags); 3714 3715 pci_enable_msi(il->pci_dev); 3716 3717 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); 3718 if (err) { 3719 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); 3720 goto out_disable_msi; 3721 } 3722 3723 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group); 3724 if (err) { 3725 IL_ERR("failed to create sysfs device attributes\n"); 3726 goto out_release_irq; 3727 } 3728 3729 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]); 3730 il3945_setup_deferred_work(il); 3731 il3945_setup_handlers(il); 3732 il_power_initialize(il); 3733 3734 /********************************* 3735 * 8. Setup and Register mac80211 3736 * *******************************/ 3737 3738 il_enable_interrupts(il); 3739 3740 err = il3945_setup_mac(il); 3741 if (err) 3742 goto out_remove_sysfs; 3743 3744 il_dbgfs_register(il, DRV_NAME); 3745 3746 /* Start monitoring the killswitch */ 3747 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); 3748 3749 return 0; 3750 3751 out_remove_sysfs: 3752 destroy_workqueue(il->workqueue); 3753 il->workqueue = NULL; 3754 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3755 out_release_irq: 3756 free_irq(il->pci_dev->irq, il); 3757 out_disable_msi: 3758 pci_disable_msi(il->pci_dev); 3759 il_free_geos(il); 3760 il_free_channel_map(il); 3761 out_unset_hw_params: 3762 il3945_unset_hw_params(il); 3763 out_eeprom_free: 3764 il_eeprom_free(il); 3765 out_iounmap: 3766 iounmap(il->hw_base); 3767 out_pci_release_regions: 3768 pci_release_regions(pdev); 3769 out_pci_disable_device: 3770 pci_disable_device(pdev); 3771 out_ieee80211_free_hw: 3772 ieee80211_free_hw(il->hw); 3773 out: 3774 return err; 3775 } 3776 3777 static void 3778 il3945_pci_remove(struct pci_dev *pdev) 3779 { 3780 struct il_priv *il = pci_get_drvdata(pdev); 3781 unsigned long flags; 3782 3783 if (!il) 3784 return; 3785 3786 D_INFO("*** UNLOAD DRIVER ***\n"); 3787 3788 il_dbgfs_unregister(il); 3789 3790 set_bit(S_EXIT_PENDING, &il->status); 3791 3792 il_leds_exit(il); 3793 3794 if (il->mac80211_registered) { 3795 ieee80211_unregister_hw(il->hw); 3796 il->mac80211_registered = 0; 3797 } else { 3798 il3945_down(il); 3799 } 3800 3801 /* 3802 * Make sure device is reset to low power before unloading driver. 3803 * This may be redundant with il_down(), but there are paths to 3804 * run il_down() without calling apm_ops.stop(), and there are 3805 * paths to avoid running il_down() at all before leaving driver. 3806 * This (inexpensive) call *makes sure* device is reset. 3807 */ 3808 il_apm_stop(il); 3809 3810 /* make sure we flush any pending irq or 3811 * tasklet for the driver 3812 */ 3813 spin_lock_irqsave(&il->lock, flags); 3814 il_disable_interrupts(il); 3815 spin_unlock_irqrestore(&il->lock, flags); 3816 3817 il3945_synchronize_irq(il); 3818 3819 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); 3820 3821 cancel_delayed_work_sync(&il->_3945.rfkill_poll); 3822 3823 il3945_dealloc_ucode_pci(il); 3824 3825 if (il->rxq.bd) 3826 il3945_rx_queue_free(il, &il->rxq); 3827 il3945_hw_txq_ctx_free(il); 3828 3829 il3945_unset_hw_params(il); 3830 3831 /*netif_stop_queue(dev); */ 3832 flush_workqueue(il->workqueue); 3833 3834 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes 3835 * il->workqueue... so we can't take down the workqueue 3836 * until now... */ 3837 destroy_workqueue(il->workqueue); 3838 il->workqueue = NULL; 3839 3840 free_irq(pdev->irq, il); 3841 pci_disable_msi(pdev); 3842 3843 iounmap(il->hw_base); 3844 pci_release_regions(pdev); 3845 pci_disable_device(pdev); 3846 3847 il_free_channel_map(il); 3848 il_free_geos(il); 3849 kfree(il->scan_cmd); 3850 if (il->beacon_skb) 3851 dev_kfree_skb(il->beacon_skb); 3852 3853 ieee80211_free_hw(il->hw); 3854 } 3855 3856 /***************************************************************************** 3857 * 3858 * driver and module entry point 3859 * 3860 *****************************************************************************/ 3861 3862 static struct pci_driver il3945_driver = { 3863 .name = DRV_NAME, 3864 .id_table = il3945_hw_card_ids, 3865 .probe = il3945_pci_probe, 3866 .remove = il3945_pci_remove, 3867 .driver.pm = IL_LEGACY_PM_OPS, 3868 }; 3869 3870 static int __init 3871 il3945_init(void) 3872 { 3873 3874 int ret; 3875 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); 3876 pr_info(DRV_COPYRIGHT "\n"); 3877 3878 /* 3879 * Disabling hardware scan means that mac80211 will perform scans 3880 * "the hard way", rather than using device's scan. 3881 */ 3882 if (il3945_mod_params.disable_hw_scan) { 3883 pr_info("hw_scan is disabled\n"); 3884 il3945_mac_ops.hw_scan = NULL; 3885 } 3886 3887 ret = il3945_rate_control_register(); 3888 if (ret) { 3889 pr_err("Unable to register rate control algorithm: %d\n", ret); 3890 return ret; 3891 } 3892 3893 ret = pci_register_driver(&il3945_driver); 3894 if (ret) { 3895 pr_err("Unable to initialize PCI module\n"); 3896 goto error_register; 3897 } 3898 3899 return ret; 3900 3901 error_register: 3902 il3945_rate_control_unregister(); 3903 return ret; 3904 } 3905 3906 static void __exit 3907 il3945_exit(void) 3908 { 3909 pci_unregister_driver(&il3945_driver); 3910 il3945_rate_control_unregister(); 3911 } 3912 3913 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX)); 3914 3915 module_param_named(antenna, il3945_mod_params.antenna, int, 0444); 3916 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 3917 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444); 3918 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])"); 3919 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int, 3920 0444); 3921 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); 3922 #ifdef CONFIG_IWLEGACY_DEBUG 3923 module_param_named(debug, il_debug_level, uint, 0644); 3924 MODULE_PARM_DESC(debug, "debug output mask"); 3925 #endif 3926 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444); 3927 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 3928 3929 module_exit(il3945_exit); 3930 module_init(il3945_init); 3931