1 /* 2 * Copyright (c) 2010 Broadcom Corporation 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include <linux/kernel.h> 20 #include <linux/delay.h> 21 #include <linux/cordic.h> 22 23 #include <brcm_hw_ids.h> 24 #include <aiutils.h> 25 #include <chipcommon.h> 26 #include <pmu.h> 27 #include <d11.h> 28 #include <phy_shim.h> 29 #include "phy_int.h" 30 #include "phy_hal.h" 31 #include "phy_radio.h" 32 #include "phyreg_n.h" 33 #include "phytbl_n.h" 34 #include "soc.h" 35 36 #define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ 37 read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 38 ((core == PHY_CORE_0) ? \ 39 radio_type##_##jspace##0 : \ 40 radio_type##_##jspace##1)) 41 42 #define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ 43 write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 44 ((core == PHY_CORE_0) ? \ 45 radio_type##_##jspace##0 : \ 46 radio_type##_##jspace##1), value) 47 48 #define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ 49 write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value) 50 51 #define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ 52 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 53 radio_type##_##jspace##0##_##reg_name : \ 54 radio_type##_##jspace##1##_##reg_name)) 55 56 #define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ 57 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 58 radio_type##_##jspace##0##_##reg_name : \ 59 radio_type##_##jspace##1##_##reg_name), \ 60 value) 61 62 #define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ 63 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 64 radio_type##_##reg_name##_##jspace##0 : \ 65 radio_type##_##reg_name##_##jspace##1)) 66 67 #define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ 68 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 69 radio_type##_##reg_name##_##jspace##0 : \ 70 radio_type##_##reg_name##_##jspace##1), \ 71 value) 72 73 #define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 74 #define NPHY_ACI_CHANNEL_DELTA 5 75 #define NPHY_ACI_CHANNEL_SKIP 4 76 #define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 77 #define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 78 #define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 79 #define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 80 #define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 81 #define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 82 83 #define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 84 85 #define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 86 87 #define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 88 89 #define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 90 91 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 92 93 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 94 95 #define NPHY_NOISE_NOASSOC_ENTER_TH 400 96 97 #define NPHY_NOISE_ASSOC_ENTER_TH 400 98 99 #define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 100 101 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 102 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 103 104 #define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 105 106 #define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 107 108 #define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) 109 110 #define NPHY_RSSICAL_MAXREAD 31 111 112 #define NPHY_RSSICAL_NPOLL 8 113 #define NPHY_RSSICAL_MAXD (1<<20) 114 #define NPHY_MIN_RXIQ_PWR 2 115 116 #define NPHY_RSSICAL_W1_TARGET 25 117 #define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET 118 #define NPHY_RSSICAL_NB_TARGET 0 119 120 #define NPHY_RSSICAL_W1_TARGET_REV3 29 121 #define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 122 123 #define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 124 #define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 125 #define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 126 #define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \ 127 NPHY_RSSICAL_MAXREAD) 128 #define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS 129 #define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \ 130 NPHY_RSSICAL_MAXREAD) 131 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) 132 #define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ 133 ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) 134 #define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ 135 ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) 136 #define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ 137 ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) 138 139 #define NPHY_IQCAL_NUMGAINS 9 140 #define NPHY_N_GCTL 0x66 141 142 #define NPHY_PAPD_EPS_TBL_SIZE 64 143 #define NPHY_PAPD_SCL_TBL_SIZE 64 144 #define NPHY_NUM_DIG_FILT_COEFFS 15 145 146 #define NPHY_PAPD_COMP_OFF 0 147 #define NPHY_PAPD_COMP_ON 1 148 149 #define NPHY_SROM_TEMPSHIFT 32 150 #define NPHY_SROM_MAXTEMPOFFSET 16 151 #define NPHY_SROM_MINTEMPOFFSET -16 152 153 #define NPHY_CAL_MAXTEMPDELTA 64 154 155 #define NPHY_NOISEVAR_TBLLEN40 256 156 #define NPHY_NOISEVAR_TBLLEN20 128 157 158 #define NPHY_ANARXLPFBW_REDUCTIONFACT 7 159 160 #define NPHY_ADJUSTED_MINCRSPOWER 0x1e 161 162 /* 5357 Chip specific ChipControl register bits */ 163 #define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ 164 #define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ 165 166 #define NPHY_CAL_TSSISAMPS 64 167 #define NPHY_TEST_TONE_FREQ_40MHz 4000 168 #define NPHY_TEST_TONE_FREQ_20MHz 2500 169 170 #define MAX_205x_RCAL_WAITLOOPS 10000 171 172 #define NPHY_RXCAL_TONEAMP 181 173 #define NPHY_RXCAL_TONEFREQ_40MHz 4000 174 #define NPHY_RXCAL_TONEFREQ_20MHz 2000 175 176 #define TXFILT_SHAPING_OFDM20 0 177 #define TXFILT_SHAPING_OFDM40 1 178 #define TXFILT_SHAPING_CCK 2 179 #define TXFILT_DEFAULT_OFDM20 3 180 #define TXFILT_DEFAULT_OFDM40 4 181 182 struct nphy_iqcal_params { 183 u16 txlpf; 184 u16 txgm; 185 u16 pga; 186 u16 pad; 187 u16 ipa; 188 u16 cal_gain; 189 u16 ncorr[5]; 190 }; 191 192 struct nphy_txiqcal_ladder { 193 u8 percent; 194 u8 g_env; 195 }; 196 197 struct nphy_ipa_txcalgains { 198 struct nphy_txgains gains; 199 bool useindex; 200 u8 index; 201 }; 202 203 struct nphy_papd_restore_state { 204 u16 fbmix[2]; 205 u16 vga_master[2]; 206 u16 intpa_master[2]; 207 u16 afectrl[2]; 208 u16 afeoverride[2]; 209 u16 pwrup[2]; 210 u16 atten[2]; 211 u16 mm; 212 }; 213 214 struct nphy_ipa_txrxgain { 215 u16 hpvga; 216 u16 lpf_biq1; 217 u16 lpf_biq0; 218 u16 lna2; 219 u16 lna1; 220 s8 txpwrindex; 221 }; 222 223 #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) 224 225 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz[] = { 226 {0, 0, 0, 0, 0, 100}, 227 {0, 0, 0, 0, 0, 50}, 228 {0, 0, 0, 0, 0, -1}, 229 {0, 0, 0, 3, 0, -1}, 230 {0, 0, 3, 3, 0, -1}, 231 {0, 2, 3, 3, 0, -1} 232 }; 233 234 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz[] = { 235 {0, 0, 0, 0, 0, 128}, 236 {0, 0, 0, 0, 0, 70}, 237 {0, 0, 0, 0, 0, 20}, 238 {0, 0, 0, 3, 0, 20}, 239 {0, 0, 3, 3, 0, 20}, 240 {0, 2, 3, 3, 0, 20} 241 }; 242 243 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { 244 {0, 0, 0, 0, 0, 100}, 245 {0, 0, 0, 0, 0, 50}, 246 {0, 0, 0, 0, 0, -1}, 247 {0, 0, 0, 3, 0, -1}, 248 {0, 0, 3, 3, 0, -1}, 249 {0, 0, 5, 3, 0, -1} 250 }; 251 252 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { 253 {0, 0, 0, 0, 0, 10}, 254 {0, 0, 0, 1, 0, 10}, 255 {0, 0, 1, 2, 0, 10}, 256 {0, 0, 1, 3, 0, 10}, 257 {0, 0, 4, 3, 0, 10}, 258 {0, 0, 6, 3, 0, 10} 259 }; 260 261 enum { 262 NPHY_RXCAL_GAIN_INIT = 0, 263 NPHY_RXCAL_GAIN_UP, 264 NPHY_RXCAL_GAIN_DOWN 265 }; 266 267 #define wlc_phy_get_papd_nphy(pi) \ 268 (read_phy_reg((pi), 0x1e7) & \ 269 ((0x1 << 15) | \ 270 (0x1 << 14) | \ 271 (0x1 << 13))) 272 273 static const u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { 274 {-377, 137, -407, 208, -1527, 956, 93, 186, 93, 275 230, -44, 230, 201, -191, 201}, 276 {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, 277 26, 34, -32, 34}, 278 {-360, 164, -376, 164, -1533, 576, 308, -314, 308, 279 121, -73, 121, 91, 124, 91}, 280 {-295, 200, -363, 142, -1391, 826, 151, 301, 151, 281 151, 301, 151, 602, -752, 602}, 282 {-92, 58, -96, 49, -104, 44, 17, 35, 17, 283 12, 25, 12, 13, 27, 13}, 284 {-375, 136, -399, 209, -1479, 949, 130, 260, 130, 285 230, -44, 230, 201, -191, 201}, 286 {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, 287 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} 288 }; 289 290 struct chan_info_nphy_2055 { 291 u16 chan; 292 u16 freq; 293 uint unknown; 294 u8 RF_pll_ref; 295 u8 RF_rf_pll_mod1; 296 u8 RF_rf_pll_mod0; 297 u8 RF_vco_cap_tail; 298 u8 RF_vco_cal1; 299 u8 RF_vco_cal2; 300 u8 RF_pll_lf_c1; 301 u8 RF_pll_lf_r1; 302 u8 RF_pll_lf_c2; 303 u8 RF_lgbuf_cen_buf; 304 u8 RF_lgen_tune1; 305 u8 RF_lgen_tune2; 306 u8 RF_core1_lgbuf_a_tune; 307 u8 RF_core1_lgbuf_g_tune; 308 u8 RF_core1_rxrf_reg1; 309 u8 RF_core1_tx_pga_pad_tn; 310 u8 RF_core1_tx_mx_bgtrim; 311 u8 RF_core2_lgbuf_a_tune; 312 u8 RF_core2_lgbuf_g_tune; 313 u8 RF_core2_rxrf_reg1; 314 u8 RF_core2_tx_pga_pad_tn; 315 u8 RF_core2_tx_mx_bgtrim; 316 u16 PHY_BW1a; 317 u16 PHY_BW2; 318 u16 PHY_BW3; 319 u16 PHY_BW4; 320 u16 PHY_BW5; 321 u16 PHY_BW6; 322 }; 323 324 struct chan_info_nphy_radio205x { 325 u16 chan; 326 u16 freq; 327 u8 RF_SYN_pll_vcocal1; 328 u8 RF_SYN_pll_vcocal2; 329 u8 RF_SYN_pll_refdiv; 330 u8 RF_SYN_pll_mmd2; 331 u8 RF_SYN_pll_mmd1; 332 u8 RF_SYN_pll_loopfilter1; 333 u8 RF_SYN_pll_loopfilter2; 334 u8 RF_SYN_pll_loopfilter3; 335 u8 RF_SYN_pll_loopfilter4; 336 u8 RF_SYN_pll_loopfilter5; 337 u8 RF_SYN_reserved_addr27; 338 u8 RF_SYN_reserved_addr28; 339 u8 RF_SYN_reserved_addr29; 340 u8 RF_SYN_logen_VCOBUF1; 341 u8 RF_SYN_logen_MIXER2; 342 u8 RF_SYN_logen_BUF3; 343 u8 RF_SYN_logen_BUF4; 344 u8 RF_RX0_lnaa_tune; 345 u8 RF_RX0_lnag_tune; 346 u8 RF_TX0_intpaa_boost_tune; 347 u8 RF_TX0_intpag_boost_tune; 348 u8 RF_TX0_pada_boost_tune; 349 u8 RF_TX0_padg_boost_tune; 350 u8 RF_TX0_pgaa_boost_tune; 351 u8 RF_TX0_pgag_boost_tune; 352 u8 RF_TX0_mixa_boost_tune; 353 u8 RF_TX0_mixg_boost_tune; 354 u8 RF_RX1_lnaa_tune; 355 u8 RF_RX1_lnag_tune; 356 u8 RF_TX1_intpaa_boost_tune; 357 u8 RF_TX1_intpag_boost_tune; 358 u8 RF_TX1_pada_boost_tune; 359 u8 RF_TX1_padg_boost_tune; 360 u8 RF_TX1_pgaa_boost_tune; 361 u8 RF_TX1_pgag_boost_tune; 362 u8 RF_TX1_mixa_boost_tune; 363 u8 RF_TX1_mixg_boost_tune; 364 u16 PHY_BW1a; 365 u16 PHY_BW2; 366 u16 PHY_BW3; 367 u16 PHY_BW4; 368 u16 PHY_BW5; 369 u16 PHY_BW6; 370 }; 371 372 struct chan_info_nphy_radio2057 { 373 u16 chan; 374 u16 freq; 375 u8 RF_vcocal_countval0; 376 u8 RF_vcocal_countval1; 377 u8 RF_rfpll_refmaster_sparextalsize; 378 u8 RF_rfpll_loopfilter_r1; 379 u8 RF_rfpll_loopfilter_c2; 380 u8 RF_rfpll_loopfilter_c1; 381 u8 RF_cp_kpd_idac; 382 u8 RF_rfpll_mmd0; 383 u8 RF_rfpll_mmd1; 384 u8 RF_vcobuf_tune; 385 u8 RF_logen_mx2g_tune; 386 u8 RF_logen_mx5g_tune; 387 u8 RF_logen_indbuf2g_tune; 388 u8 RF_logen_indbuf5g_tune; 389 u8 RF_txmix2g_tune_boost_pu_core0; 390 u8 RF_pad2g_tune_pus_core0; 391 u8 RF_pga_boost_tune_core0; 392 u8 RF_txmix5g_boost_tune_core0; 393 u8 RF_pad5g_tune_misc_pus_core0; 394 u8 RF_lna2g_tune_core0; 395 u8 RF_lna5g_tune_core0; 396 u8 RF_txmix2g_tune_boost_pu_core1; 397 u8 RF_pad2g_tune_pus_core1; 398 u8 RF_pga_boost_tune_core1; 399 u8 RF_txmix5g_boost_tune_core1; 400 u8 RF_pad5g_tune_misc_pus_core1; 401 u8 RF_lna2g_tune_core1; 402 u8 RF_lna5g_tune_core1; 403 u16 PHY_BW1a; 404 u16 PHY_BW2; 405 u16 PHY_BW3; 406 u16 PHY_BW4; 407 u16 PHY_BW5; 408 u16 PHY_BW6; 409 }; 410 411 struct chan_info_nphy_radio2057_rev5 { 412 u16 chan; 413 u16 freq; 414 u8 RF_vcocal_countval0; 415 u8 RF_vcocal_countval1; 416 u8 RF_rfpll_refmaster_sparextalsize; 417 u8 RF_rfpll_loopfilter_r1; 418 u8 RF_rfpll_loopfilter_c2; 419 u8 RF_rfpll_loopfilter_c1; 420 u8 RF_cp_kpd_idac; 421 u8 RF_rfpll_mmd0; 422 u8 RF_rfpll_mmd1; 423 u8 RF_vcobuf_tune; 424 u8 RF_logen_mx2g_tune; 425 u8 RF_logen_indbuf2g_tune; 426 u8 RF_txmix2g_tune_boost_pu_core0; 427 u8 RF_pad2g_tune_pus_core0; 428 u8 RF_lna2g_tune_core0; 429 u8 RF_txmix2g_tune_boost_pu_core1; 430 u8 RF_pad2g_tune_pus_core1; 431 u8 RF_lna2g_tune_core1; 432 u16 PHY_BW1a; 433 u16 PHY_BW2; 434 u16 PHY_BW3; 435 u16 PHY_BW4; 436 u16 PHY_BW5; 437 u16 PHY_BW6; 438 }; 439 440 struct nphy_sfo_cfg { 441 u16 PHY_BW1a; 442 u16 PHY_BW2; 443 u16 PHY_BW3; 444 u16 PHY_BW4; 445 u16 PHY_BW5; 446 u16 PHY_BW6; 447 }; 448 449 static const struct chan_info_nphy_2055 chan_info_nphy_2055[] = { 450 { 451 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 452 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 453 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, 454 { 455 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 456 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 457 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, 458 { 459 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 460 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 461 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, 462 { 463 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 464 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 465 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, 466 { 467 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 468 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 469 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, 470 { 471 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 472 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 473 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, 474 { 475 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 476 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 477 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, 478 { 479 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 480 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 481 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, 482 { 483 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 484 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 485 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, 486 { 487 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 488 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 489 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, 490 { 491 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 492 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 493 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, 494 { 495 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 496 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 497 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, 498 { 499 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 500 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 501 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, 502 { 503 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 504 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 505 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, 506 { 507 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 508 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 509 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, 510 { 511 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 512 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 513 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, 514 { 515 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 516 0x00, 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0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, 860 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 861 0x00, 0x80, 0x924, 0x920, 0x91C, 0x1C0, 0x1C1, 0x1C2}, 862 { 863 170, 5850, 3900, 0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, 864 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 865 0x00, 0x80, 0x928, 0x924, 0x920, 0x1BF, 0x1C0, 0x1C1}, 866 { 867 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, 868 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 869 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, 870 { 871 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, 872 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 873 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, 874 { 875 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, 876 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 877 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, 878 { 879 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, 880 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 881 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, 882 { 883 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, 884 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 885 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, 886 { 887 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, 888 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 889 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, 890 { 891 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, 892 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, 893 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, 894 { 895 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, 896 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, 897 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, 898 { 899 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, 900 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 901 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, 902 { 903 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, 904 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 905 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, 906 { 907 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, 908 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, 909 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, 910 { 911 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, 912 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, 913 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, 914 { 915 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, 916 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, 917 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, 918 { 919 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, 920 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, 921 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, 922 { 923 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, 924 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, 925 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, 926 { 927 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, 928 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, 929 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, 930 { 931 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, 932 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, 933 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, 934 { 935 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, 936 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, 937 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, 938 { 939 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, 940 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, 941 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, 942 { 943 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, 944 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, 945 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} 946 }; 947 948 static const struct chan_info_nphy_radio205x chan_info_nphyrev3_2056[] = { 949 { 950 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 951 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 952 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 953 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 954 { 955 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 956 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 957 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 958 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 959 { 960 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 961 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 962 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 963 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 964 { 965 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 966 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 967 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 968 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 969 { 970 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 971 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 972 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 973 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 974 { 975 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 976 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 977 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 978 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 979 { 980 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 981 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 982 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 983 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 984 { 985 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 986 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 987 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 988 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 989 { 990 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 991 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 992 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 993 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 994 { 995 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 996 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 997 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 998 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 999 { 1000 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1001 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1002 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1003 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1004 { 1005 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1006 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1007 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1008 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1009 { 1010 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1011 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1012 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1013 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1014 { 1015 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1016 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1017 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1018 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1019 { 1020 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1021 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1022 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1023 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1024 { 1025 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1026 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1027 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1028 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1029 { 1030 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1031 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1032 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1033 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1034 { 1035 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1036 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1037 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1038 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1039 { 1040 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1041 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1042 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1043 0x00, 0xff, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1044 { 1045 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1046 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1047 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1048 0x00, 0xfc, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1049 { 1050 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1051 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1052 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1053 0x00, 0xfc, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1054 { 1055 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1056 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1057 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1058 0x00, 0xfc, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1059 { 1060 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1061 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1062 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1063 0x00, 0xfc, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1064 { 1065 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1066 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1067 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1068 0x00, 0xfc, 0x00, 0x0814, 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{ 1555 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 1556 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x05, 0x00, 1557 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf3, 0x00, 0x05, 0x00, 0x70, 0x00, 1558 0x0f, 0x00, 0x0d, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 1559 { 1560 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 1561 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 1562 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, 1563 0x0f, 0x00, 0x0d, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 1564 { 1565 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 1566 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 1567 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, 1568 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 1569 }; 1570 1571 static const struct chan_info_nphy_radio205x chan_info_nphyrev4_2056_A1[] = { 1572 { 1573 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 1574 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1575 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1576 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 1577 { 1578 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 1579 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1580 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1581 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 1582 { 1583 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 1584 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1585 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1586 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 1587 { 1588 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 1589 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1590 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1591 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 1592 { 1593 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 1594 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1595 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1596 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 1597 { 1598 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 1599 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1600 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1601 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 1602 { 1603 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 1604 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1605 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1606 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 1607 { 1608 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 1609 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1610 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1611 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 1612 { 1613 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 1614 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1615 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1616 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 1617 { 1618 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 1619 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1620 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1621 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 1622 { 1623 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1624 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1625 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1626 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1627 { 1628 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1629 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1630 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1631 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1632 { 1633 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1634 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1635 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1636 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1637 { 1638 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1639 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1640 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1641 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1642 { 1643 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1644 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1645 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1646 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1647 { 1648 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1649 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1650 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1651 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1652 { 1653 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1654 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1655 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1656 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1657 { 1658 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1659 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1660 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1661 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1662 { 1663 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1664 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1665 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1666 0x00, 0xfe, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1667 { 1668 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1669 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1670 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1671 0x00, 0xfe, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1672 { 1673 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1674 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1675 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1676 0x00, 0xfe, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1677 { 1678 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1679 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1680 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1681 0x00, 0xfe, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1682 { 1683 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1684 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 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{ 1848 96, 5480, 0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, 0x0c, 0x01, 1849 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5d, 0x00, 0x07, 0x00, 0x7f, 1850 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1851 0x00, 0xf8, 0x00, 0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df}, 1852 { 1853 98, 5490, 0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, 0x0c, 0x01, 1854 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 1855 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1856 0x00, 0xf8, 0x00, 0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de}, 1857 { 1858 100, 5500, 0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, 0x0c, 0x01, 1859 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 1860 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1861 0x00, 0xf6, 0x00, 0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd}, 1862 { 1863 102, 5510, 0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, 0x0c, 0x01, 1864 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1865 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1866 0x00, 0xf6, 0x00, 0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd}, 1867 { 1868 104, 5520, 0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, 0x0c, 0x01, 1869 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1870 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1871 0x00, 0xf6, 0x00, 0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc}, 1872 { 1873 106, 5530, 0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, 0x0c, 0x01, 1874 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1875 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1876 0x00, 0xf6, 0x00, 0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db}, 1877 { 1878 108, 5540, 0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1879 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1880 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1881 0x00, 0xf6, 0x00, 0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da}, 1882 { 1883 110, 5550, 0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1884 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1885 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1886 0x00, 0xf6, 0x00, 0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9}, 1887 { 1888 112, 5560, 0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1889 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 1890 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1891 0x00, 0xf6, 0x00, 0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8}, 1892 { 1893 114, 5570, 0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1894 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 1895 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1896 0x00, 0xf6, 0x00, 0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7}, 1897 { 1898 116, 5580, 0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1899 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1900 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1901 0x00, 0xf6, 0x00, 0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7}, 1902 { 1903 118, 5590, 0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1904 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1905 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1906 0x00, 0xf6, 0x00, 0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6}, 1907 { 1908 120, 5600, 0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, 0x0c, 0x01, 1909 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 1910 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1911 0x00, 0xf4, 0x00, 0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5}, 1912 { 1913 122, 5610, 0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, 0x0c, 0x01, 1914 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1915 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1916 0x00, 0xf4, 0x00, 0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4}, 1917 { 1918 124, 5620, 0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, 0x0c, 0x01, 1919 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1920 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1921 0x00, 0xf4, 0x00, 0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3}, 1922 { 1923 126, 5630, 0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, 0x0c, 0x01, 1924 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1925 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1926 0x00, 0xf4, 0x00, 0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2}, 1927 { 1928 128, 5640, 0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, 0x0c, 0x01, 1929 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1930 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1931 0x00, 0xf4, 0x00, 0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2}, 1932 { 1933 130, 5650, 0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, 0x0c, 0x01, 1934 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1935 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1936 0x00, 0xf4, 0x00, 0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1}, 1937 { 1938 132, 5660, 0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, 0x0c, 0x01, 1939 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1940 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1941 0x00, 0xf4, 0x00, 0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0}, 1942 { 1943 134, 5670, 0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, 0x0c, 0x01, 1944 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1945 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1946 0x00, 0xf4, 0x00, 0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf}, 1947 { 1948 136, 5680, 0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, 0x0c, 0x01, 1949 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1950 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1951 0x00, 0xf4, 0x00, 0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce}, 1952 { 1953 138, 5690, 0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, 0x0c, 0x01, 1954 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 1955 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1956 0x00, 0xf4, 0x00, 0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce}, 1957 { 1958 140, 5700, 0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1959 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1960 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1961 0x00, 0xf2, 0x00, 0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd}, 1962 { 1963 142, 5710, 0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1964 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1965 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1966 0x00, 0xf2, 0x00, 0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc}, 1967 { 1968 144, 5720, 0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1969 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1970 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1971 0x00, 0xf2, 0x00, 0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb}, 1972 { 1973 145, 5725, 0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, 0x10, 0x01, 1974 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1975 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1976 0x00, 0xf2, 0x00, 0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb}, 1977 { 1978 146, 5730, 0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1979 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1980 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1981 0x00, 0xf2, 0x00, 0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca}, 1982 { 1983 147, 5735, 0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, 0x10, 0x01, 1984 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1985 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1986 0x00, 0xf2, 0x00, 0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca}, 1987 { 1988 148, 5740, 0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1989 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1990 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1991 0x00, 0xf2, 0x00, 0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9}, 1992 { 1993 149, 5745, 0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, 0x10, 0x01, 1994 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1995 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1996 0x00, 0xf2, 0x00, 0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9}, 1997 { 1998 150, 5750, 0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1999 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 2000 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2001 0x00, 0xf2, 0x00, 0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9}, 2002 { 2003 151, 5755, 0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, 0x10, 0x01, 2004 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2005 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2006 0x00, 0xf2, 0x00, 0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8}, 2007 { 2008 152, 5760, 0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, 0x0c, 0x01, 2009 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2010 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2011 0x00, 0xf2, 0x00, 0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8}, 2012 { 2013 153, 5765, 0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, 0x10, 0x01, 2014 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2015 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2016 0x00, 0xf2, 0x00, 0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8}, 2017 { 2018 154, 5770, 0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, 0x0c, 0x01, 2019 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2020 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2021 0x00, 0xf2, 0x00, 0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7}, 2022 { 2023 155, 5775, 0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, 0x10, 0x01, 2024 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2025 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2026 0x00, 0xf2, 0x00, 0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7}, 2027 { 2028 156, 5780, 0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, 0x0c, 0x01, 2029 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2030 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2031 0x00, 0xf2, 0x00, 0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6}, 2032 { 2033 157, 5785, 0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, 0x10, 0x01, 2034 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2035 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2036 0x00, 0xf2, 0x00, 0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6}, 2037 { 2038 158, 5790, 0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, 0x0c, 0x01, 2039 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2040 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2041 0x00, 0xf2, 0x00, 0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6}, 2042 { 2043 159, 5795, 0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, 0x10, 0x01, 2044 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2045 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2046 0x00, 0xf2, 0x00, 0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5}, 2047 { 2048 160, 5800, 0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, 0x0c, 0x01, 2049 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2050 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2051 0x00, 0xf0, 0x00, 0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5}, 2052 { 2053 161, 5805, 0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, 0x10, 0x01, 2054 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2055 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2056 0x00, 0xf0, 0x00, 0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4}, 2057 { 2058 162, 5810, 0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, 0x0c, 0x01, 2059 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2060 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2061 0x00, 0xf0, 0x00, 0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4}, 2062 { 2063 163, 5815, 0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, 0x10, 0x01, 2064 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2065 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2066 0x00, 0xf0, 0x00, 0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4}, 2067 { 2068 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2069 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2070 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2071 0x00, 0xf0, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2072 { 2073 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2074 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2075 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2076 0x00, 0xf0, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2077 { 2078 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2079 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2080 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2081 0x00, 0xf0, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2082 { 2083 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2084 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2085 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2086 0x00, 0xf0, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2087 { 2088 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2089 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2090 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2091 0x00, 0xf0, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2092 { 2093 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2094 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2095 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2096 0x00, 0xf0, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2097 { 2098 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2099 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2100 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2101 0x00, 0xf0, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2102 { 2103 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2104 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2105 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2106 0x00, 0xf0, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2107 { 2108 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2109 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2110 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2111 0x00, 0xf0, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2112 { 2113 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2114 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 2115 0x00, 0x07, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2116 0x00, 0xf0, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2117 { 2118 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2119 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 2120 0x00, 0x07, 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2121 0x00, 0xf0, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2122 { 2123 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2124 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2125 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2126 0x0f, 0x00, 0x0e, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2127 { 2128 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2129 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2130 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2131 0x0f, 0x00, 0x0e, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2132 { 2133 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2134 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2135 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2136 0x0f, 0x00, 0x0e, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2137 { 2138 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2139 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 2140 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00, 2141 0x0f, 0x00, 0x0e, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2142 { 2143 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2144 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 2145 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00, 2146 0x0f, 0x00, 0x0e, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2147 { 2148 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2149 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 2150 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00, 2151 0x0f, 0x00, 0x0e, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2152 { 2153 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2154 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 2155 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00, 2156 0x0f, 0x00, 0x0e, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2157 { 2158 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2159 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 2160 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00, 2161 0x0f, 0x00, 0x0e, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2162 { 2163 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2164 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 2165 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00, 2166 0x0f, 0x00, 0x0e, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2167 { 2168 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2169 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 2170 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, 2171 0x0f, 0x00, 0x0e, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2172 { 2173 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2174 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 2175 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, 2176 0x0f, 0x00, 0x0e, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2177 { 2178 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2179 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 2180 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, 2181 0x0f, 0x00, 0x0e, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2182 { 2183 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2184 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 2185 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, 2186 0x0f, 0x00, 0x0e, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2187 { 2188 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2189 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 2190 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, 2191 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2192 }; 2193 2194 static const struct chan_info_nphy_radio205x chan_info_nphyrev5_2056v5[] = { 2195 { 2196 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2197 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2198 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 2199 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2200 { 2201 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2202 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2203 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2204 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2205 { 2206 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2207 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2208 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2209 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2210 { 2211 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2212 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2213 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2214 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2215 { 2216 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2217 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2218 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 2219 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2220 { 2221 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2222 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2223 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2224 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2225 { 2226 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2227 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2228 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2229 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2230 { 2231 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2232 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2233 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2234 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 2235 { 2236 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 2237 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2238 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2239 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 2240 { 2241 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 2242 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2243 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2244 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 2245 { 2246 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 2247 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2248 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 2249 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 2250 { 2251 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 2252 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2253 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2254 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 2255 { 2256 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 2257 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2258 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2259 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 2260 { 2261 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 2262 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2263 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2264 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 2265 { 2266 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 2267 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 2268 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2269 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 2270 { 2271 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 2272 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 2273 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2274 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 2275 { 2276 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 2277 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2278 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2279 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 2280 { 2281 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 2282 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2283 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2284 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 2285 { 2286 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 2287 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2288 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2289 0x00, 0x6f, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 2290 { 2291 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 2292 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2293 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2294 0x00, 0x6f, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 2295 { 2296 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 2297 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2298 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2299 0x00, 0x6f, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 2300 { 2301 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 2302 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 2303 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, 2304 0x00, 0x6f, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 2305 { 2306 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 2307 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2308 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, 2309 0x00, 0x6f, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 2310 { 2311 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 2312 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2313 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, 2314 0x00, 0x6e, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 2315 { 2316 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 2317 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 2318 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2319 0x00, 0x6e, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 2320 { 2321 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, 2322 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2323 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2324 0x00, 0x6e, 0x00, 0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb}, 2325 { 2326 38, 5190, 0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, 0x0c, 0x01, 2327 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2328 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2329 0x00, 0x6e, 0x00, 0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa}, 2330 { 2331 40, 5200, 0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, 0x0c, 0x01, 2332 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2333 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2334 0x00, 0x6e, 0x00, 0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9}, 2335 { 2336 42, 5210, 0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, 0x0c, 0x01, 2337 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2338 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2339 0x00, 0x6e, 0x00, 0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8}, 2340 { 2341 44, 5220, 0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2342 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2343 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2344 0x00, 0x6e, 0x00, 0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7}, 2345 { 2346 46, 5230, 0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2347 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xea, 0x00, 0x06, 0x00, 0x70, 2348 0x00, 0x08, 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08, 2349 0x00, 0x6e, 0x00, 0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 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0x01c2, 0x01c3, 0x01c4}, 2690 { 2691 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2692 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2693 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2694 0x00, 0x82, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2695 { 2696 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2697 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2698 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2699 0x00, 0x82, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2700 { 2701 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2702 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2703 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2704 0x00, 0x72, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2705 { 2706 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2707 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2708 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2709 0x00, 0x72, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2710 { 2711 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2712 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2713 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2714 0x00, 0x72, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2715 { 2716 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2717 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2718 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2719 0x00, 0x72, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2720 { 2721 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2722 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2723 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2724 0x00, 0x71, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2725 { 2726 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2727 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2728 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2729 0x00, 0x71, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2730 { 2731 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2732 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2733 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2734 0x00, 0x71, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2735 { 2736 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2737 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2738 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2739 0x00, 0x71, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2740 { 2741 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2742 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2743 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2744 0x00, 0x71, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2745 { 2746 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2747 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2748 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2749 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2750 { 2751 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2752 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2753 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2754 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2755 { 2756 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2757 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 2758 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00, 2759 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2760 { 2761 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2762 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 2763 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00, 2764 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2765 { 2766 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2767 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 2768 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00, 2769 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2770 { 2771 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2772 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 2773 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00, 2774 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2775 { 2776 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2777 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 2778 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00, 2779 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2780 { 2781 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2782 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 2783 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00, 2784 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2785 { 2786 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2787 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 2788 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00, 2789 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2790 { 2791 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2792 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 2793 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00, 2794 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2795 { 2796 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2797 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 2798 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00, 2799 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2800 { 2801 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2802 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 2803 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00, 2804 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2805 { 2806 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2807 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 2808 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00, 2809 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2810 { 2811 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2812 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 2813 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 2814 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2815 }; 2816 2817 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v6[] = { 2818 { 2819 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2820 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2821 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2822 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2823 { 2824 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2825 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2826 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2827 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2828 { 2829 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2830 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2831 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2832 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2833 { 2834 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2835 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2836 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2837 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2838 { 2839 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2840 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2841 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2842 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2843 { 2844 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2845 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2846 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2847 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2848 { 2849 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2850 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2851 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2852 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 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0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 3323 { 3324 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 3325 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3326 0x00, 0x05, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, 3327 0x00, 0x69, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 3328 { 3329 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 3330 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3331 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3332 0x00, 0x69, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 3333 { 3334 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 3335 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3336 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3337 0x00, 0x69, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 3338 { 3339 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 3340 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3341 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3342 0x00, 0x69, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 3343 { 3344 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 3345 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3346 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3347 0x00, 0x68, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 3348 { 3349 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 3350 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3351 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3352 0x00, 0x68, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 3353 { 3354 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 3355 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3356 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3357 0x00, 0x68, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 3358 { 3359 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 3360 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3361 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3362 0x00, 0x68, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 3363 { 3364 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 3365 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3366 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3367 0x00, 0x68, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3368 { 3369 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3370 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3371 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3372 0x0b, 0x00, 0x0a, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3373 { 3374 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3375 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3376 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3377 0x0b, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3378 { 3379 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3380 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 3381 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, 3382 0x0b, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3383 { 3384 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3385 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 3386 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, 3387 0x0a, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 3388 { 3389 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 3390 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 3391 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, 3392 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 3393 { 3394 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 3395 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 3396 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, 3397 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 3398 { 3399 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 3400 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 3401 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 3402 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 3403 { 3404 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 3405 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 3406 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 3407 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 3408 { 3409 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 3410 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 3411 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, 3412 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 3413 { 3414 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 3415 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 3416 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, 3417 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 3418 { 3419 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 3420 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 3421 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, 3422 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 3423 { 3424 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 3425 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3426 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3427 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 3428 { 3429 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 3430 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3431 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3432 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 3433 { 3434 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 3435 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 3436 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 3437 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 3438 }; 3439 3440 static const struct chan_info_nphy_radio205x chan_info_nphyrev5n6_2056v7[] = { 3441 { 3442 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 3443 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3444 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 3445 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 3446 { 3447 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 3448 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3449 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3450 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 3451 { 3452 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 3453 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3454 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3455 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 3456 { 3457 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 3458 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3459 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3460 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 3461 { 3462 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 3463 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3464 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 3465 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 3466 { 3467 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 3468 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3469 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3470 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 3471 { 3472 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 3473 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3474 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3475 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 3476 { 3477 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 3478 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3479 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3480 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 3481 { 3482 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 3483 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3484 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3485 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 3486 { 3487 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 3488 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3489 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3490 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 3491 { 3492 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 3493 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3494 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 3495 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 3496 { 3497 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 3498 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3499 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 3500 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 3501 { 3502 208, 5040, 0xef, 0x01, 0x01, 0x01, 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0x01, 3988 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 3989 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 3990 0x00, 0x91, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3991 { 3992 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3993 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3994 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3995 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3996 { 3997 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3998 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3999 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 4000 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 4001 { 4002 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 4003 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 4004 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 4005 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 4006 { 4007 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 4008 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 4009 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 4010 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 4011 { 4012 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 4013 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 4014 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4015 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4016 { 4017 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4018 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 4019 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4020 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4021 { 4022 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4023 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 4024 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00, 4025 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4026 { 4027 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4028 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 4029 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4030 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4031 { 4032 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4033 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4034 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4035 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4036 { 4037 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4038 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4039 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4040 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4041 { 4042 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4043 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 4044 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4045 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4046 { 4047 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4048 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 4049 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4050 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4051 { 4052 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4053 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 4054 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4055 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4056 { 4057 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4058 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4059 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4060 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4061 }; 4062 4063 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v8[] = { 4064 { 4065 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 4066 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4067 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4068 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4069 { 4070 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 4071 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4072 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4073 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4074 { 4075 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 4076 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4077 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4078 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4079 { 4080 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 4081 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4082 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4083 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4084 { 4085 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 4086 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4087 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4088 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4089 { 4090 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 4091 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4092 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4093 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4094 { 4095 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 4096 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4097 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4098 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4099 { 4100 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 4101 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4102 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4103 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4104 { 4105 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 4106 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4107 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4108 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4109 { 4110 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 4111 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4112 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4113 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4114 { 4115 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 4116 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4117 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4118 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4119 { 4120 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 4121 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4122 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4123 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4124 { 4125 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 4126 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4127 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4128 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4129 { 4130 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 4131 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4132 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4133 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4134 { 4135 212, 5060, 0xe6, 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0x56, 0x00, 0x03, 0x00, 4637 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4638 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4639 { 4640 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4641 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 4642 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4643 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4644 { 4645 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4646 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4647 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00, 0x70, 0x00, 4648 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4649 { 4650 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4651 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4652 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4653 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4654 { 4655 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4656 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 4657 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4658 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4659 { 4660 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4661 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 4662 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4663 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4664 { 4665 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4666 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 4667 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4668 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4669 { 4670 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4671 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4672 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4673 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4674 { 4675 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4676 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4677 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4678 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4679 { 4680 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4681 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4682 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4683 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4684 }; 4685 4686 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v11[] = { 4687 { 4688 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, 4689 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4690 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4691 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4692 { 4693 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x02, 0x0c, 0x01, 4694 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4695 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4696 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4697 { 4698 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x02, 0x0c, 0x01, 4699 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4700 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4701 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4702 { 4703 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x02, 0x0c, 0x01, 4704 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4705 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4706 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4707 { 4708 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x02, 0x0c, 0x01, 4709 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4710 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4711 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4712 { 4713 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x02, 0x0c, 0x01, 4714 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4715 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4716 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4717 { 4718 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x02, 0x0c, 0x01, 4719 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4720 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4721 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4722 { 4723 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x02, 0x0c, 0x01, 4724 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4725 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4726 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4727 { 4728 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x02, 0x0c, 0x01, 4729 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4730 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4731 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4732 { 4733 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x02, 0x0c, 0x01, 4734 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4735 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4736 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4737 { 4738 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x02, 0x0c, 0x01, 4739 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4740 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4741 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4742 { 4743 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x02, 0x0c, 0x01, 4744 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4745 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4746 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4747 { 4748 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x02, 0x0c, 0x01, 4749 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4750 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4751 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4752 { 4753 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x02, 0x0c, 0x01, 4754 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4755 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4756 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4757 { 4758 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x02, 0x0c, 0x01, 4759 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4760 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4761 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 4762 { 4763 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x02, 0x0c, 0x01, 4764 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4765 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4766 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 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0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 5286 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 5287 { 5288 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x06, 0x06, 0x04, 0x2b, 0x01, 5289 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 5290 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 5291 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 5292 { 5293 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x06, 0x06, 0x04, 0x2b, 0x01, 5294 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5295 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 5296 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 5297 { 5298 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x06, 0x06, 0x04, 0x2b, 0x01, 5299 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5300 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 5301 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 5302 { 5303 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x06, 0x06, 0x04, 0x2b, 0x01, 5304 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 5305 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 5306 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 5307 }; 5308 5309 static const struct chan_info_nphy_radio2057 chan_info_nphyrev7_2057_rev4[] = { 5310 { 5311 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 5312 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5313 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b4, 0x07b0, 0x07ac, 0x0214, 5314 0x0215, 5315 0x0216, 5316 }, 5317 { 5318 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 5319 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5320 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b8, 0x07b4, 0x07b0, 0x0213, 5321 0x0214, 5322 0x0215, 5323 }, 5324 { 5325 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 5326 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5327 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07bc, 0x07b8, 0x07b4, 0x0212, 5328 0x0213, 5329 0x0214, 5330 }, 5331 { 5332 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 5333 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5334 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c0, 0x07bc, 0x07b8, 0x0211, 5335 0x0212, 5336 0x0213, 5337 }, 5338 { 5339 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 5340 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5341 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c4, 0x07c0, 0x07bc, 0x020f, 5342 0x0211, 5343 0x0212, 5344 }, 5345 { 5346 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 5347 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5348 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c8, 0x07c4, 0x07c0, 0x020e, 5349 0x020f, 5350 0x0211, 5351 }, 5352 { 5353 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 5354 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5355 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07cc, 0x07c8, 0x07c4, 0x020d, 5356 0x020e, 5357 0x020f, 5358 }, 5359 { 5360 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 5361 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5362 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d0, 0x07cc, 0x07c8, 0x020c, 5363 0x020d, 5364 0x020e, 5365 }, 5366 { 5367 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 5368 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5369 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d4, 0x07d0, 0x07cc, 0x020b, 5370 0x020c, 5371 0x020d, 5372 }, 5373 { 5374 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 5375 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5376 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d8, 0x07d4, 0x07d0, 0x020a, 5377 0x020b, 5378 0x020c, 5379 }, 5380 { 5381 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 5382 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5383 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07dc, 0x07d8, 0x07d4, 0x0209, 5384 0x020a, 5385 0x020b, 5386 }, 5387 { 5388 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 5389 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5390 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e0, 0x07dc, 0x07d8, 0x0208, 5391 0x0209, 5392 0x020a, 5393 }, 5394 { 5395 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 5396 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5397 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e4, 0x07e0, 0x07dc, 0x0207, 5398 0x0208, 5399 0x0209, 5400 }, 5401 { 5402 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 5403 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5404 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e8, 0x07e4, 0x07e0, 0x0206, 5405 0x0207, 5406 0x0208, 5407 }, 5408 { 5409 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 5410 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5411 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x07ec, 0x07e8, 0x07e4, 0x0205, 5412 0x0206, 5413 0x0207, 5414 }, 5415 { 5416 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 5417 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5418 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f0, 0x07ec, 0x07e8, 0x0204, 5419 0x0205, 5420 0x0206, 5421 }, 5422 { 5423 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 5424 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5425 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f4, 0x07f0, 0x07ec, 0x0203, 5426 0x0204, 5427 0x0205, 5428 }, 5429 { 5430 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 5431 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5432 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07f8, 0x07f4, 0x07f0, 0x0202, 5433 0x0203, 5434 0x0204, 5435 }, 5436 { 5437 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 5438 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5439 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07fc, 0x07f8, 0x07f4, 0x0201, 5440 0x0202, 5441 0x0203, 5442 }, 5443 { 5444 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 5445 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5446 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0800, 0x07fc, 0x07f8, 0x0200, 5447 0x0201, 5448 0x0202, 5449 }, 5450 { 5451 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 5452 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5453 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0804, 0x0800, 0x07fc, 0x01ff, 5454 0x0200, 5455 0x0201, 5456 }, 5457 { 5458 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 5459 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5460 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0808, 0x0804, 0x0800, 0x01fe, 5461 0x01ff, 5462 0x0200, 5463 }, 5464 { 5465 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 5466 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5467 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x080c, 0x0808, 0x0804, 0x01fd, 5468 0x01fe, 5469 0x01ff, 5470 }, 5471 { 5472 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 5473 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5474 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0814, 0x0810, 0x080c, 0x01fb, 5475 0x01fc, 5476 0x01fd, 5477 }, 5478 { 5479 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 5480 0x00, 0x0d, 0x00, 0xdd, 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170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 6033 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6034 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 6035 0x01c0, 6036 0x01c1, 6037 }, 6038 { 6039 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 6040 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6041 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 6042 0x01bf, 6043 0x01c0, 6044 }, 6045 { 6046 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 6047 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6048 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 6049 0x01bf, 6050 0x01bf, 6051 }, 6052 { 6053 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 6054 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6055 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 6056 0x01be, 6057 0x01bf, 6058 }, 6059 { 6060 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 6061 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6062 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 6063 0x01bd, 6064 0x01be, 6065 }, 6066 { 6067 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 6068 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6069 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 6070 0x01bc, 6071 0x01bd, 6072 }, 6073 { 6074 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 6075 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6076 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 6077 0x043f, 6078 0x0443, 6079 }, 6080 { 6081 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 6082 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6083 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 6084 0x043d, 6085 0x0441, 6086 }, 6087 { 6088 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 6089 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6090 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 6091 0x043a, 6092 0x043f, 6093 }, 6094 { 6095 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 6096 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6097 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 6098 0x0438, 6099 0x043d, 6100 }, 6101 { 6102 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 6103 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6104 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 6105 0x0436, 6106 0x043a, 6107 }, 6108 { 6109 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 6110 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6111 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 6112 0x0434, 6113 0x0438, 6114 }, 6115 { 6116 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 6117 0x07, 0x00, 0x07, 0x00, 0x51, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6118 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 6119 0x0431, 6120 0x0436, 6121 }, 6122 { 6123 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6124 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6125 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6126 0x042f, 6127 0x0434, 6128 }, 6129 { 6130 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6131 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6132 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6133 0x042d, 6134 0x0431, 6135 }, 6136 { 6137 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6138 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6139 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6140 0x042b, 6141 0x042f, 6142 }, 6143 { 6144 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6145 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6146 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 6147 0x0429, 6148 0x042d, 6149 }, 6150 { 6151 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 6152 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6153 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 6154 0x0427, 6155 0x042b, 6156 }, 6157 { 6158 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 6159 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6160 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 6161 0x0424, 6162 0x0429, 6163 }, 6164 { 6165 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 6166 0x04, 0x00, 0x04, 0x00, 0x11, 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x11, 6167 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 6168 0x041f, 6169 0x0424} 6170 }; 6171 6172 static const struct chan_info_nphy_radio2057_rev5 6173 chan_info_nphyrev8_2057_rev5[] = { 6174 { 6175 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6176 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6177 0x043a, 0x043f, 0x0443}, 6178 { 6179 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6180 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6181 0x0438, 0x043d, 0x0441}, 6182 { 6183 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6184 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6185 0x0436, 0x043a, 0x043f}, 6186 { 6187 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6188 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6189 0x0434, 0x0438, 0x043d}, 6190 { 6191 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6192 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6193 0x0431, 0x0436, 0x043a}, 6194 { 6195 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6196 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6197 0x042f, 0x0434, 0x0438}, 6198 { 6199 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6200 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6201 0x042d, 0x0431, 0x0436}, 6202 { 6203 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6204 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6205 0x042b, 0x042f, 0x0434}, 6206 { 6207 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6208 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6209 0x0429, 0x042d, 0x0431}, 6210 { 6211 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6212 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6213 0x0427, 0x042b, 0x042f}, 6214 { 6215 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6216 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6217 0x0424, 0x0429, 0x042d}, 6218 { 6219 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6220 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6221 0x0422, 0x0427, 0x042b}, 6222 { 6223 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6224 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6225 0x0420, 0x0424, 0x0429}, 6226 { 6227 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6228 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6229 0x041b, 0x041f, 0x0424} 6230 }; 6231 6232 static const struct chan_info_nphy_radio2057_rev5 6233 chan_info_nphyrev9_2057_rev5v1[] = { 6234 { 6235 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6236 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6237 0x043a, 0x043f, 0x0443}, 6238 { 6239 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6240 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6241 0x0438, 0x043d, 0x0441}, 6242 { 6243 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6244 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6245 0x0436, 0x043a, 0x043f}, 6246 { 6247 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6248 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6249 0x0434, 0x0438, 0x043d}, 6250 { 6251 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6252 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6253 0x0431, 0x0436, 0x043a}, 6254 { 6255 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6256 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6257 0x042f, 0x0434, 0x0438}, 6258 { 6259 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6260 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6261 0x042d, 0x0431, 0x0436}, 6262 { 6263 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6264 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6265 0x042b, 0x042f, 0x0434}, 6266 { 6267 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6268 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6269 0x0429, 0x042d, 0x0431}, 6270 { 6271 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6272 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6273 0x0427, 0x042b, 0x042f}, 6274 { 6275 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6276 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6277 0x0424, 0x0429, 0x042d}, 6278 { 6279 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6280 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6281 0x0422, 0x0427, 0x042b}, 6282 { 6283 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6284 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6285 0x0420, 0x0424, 0x0429}, 6286 { 6287 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6288 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6289 0x041b, 0x041f, 0x0424} 6290 }; 6291 6292 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev7[] = { 6293 { 6294 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 6295 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6296 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b4, 0x07b0, 0x07ac, 0x0214, 6297 0x0215, 6298 0x0216}, 6299 { 6300 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 6301 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6302 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 6303 0x0214, 6304 0x0215}, 6305 { 6306 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 6307 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6308 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 6309 0x0213, 6310 0x0214}, 6311 { 6312 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 6313 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6314 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 6315 0x0212, 6316 0x0213}, 6317 { 6318 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 6319 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6320 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 6321 0x0211, 6322 0x0212}, 6323 { 6324 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 6325 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6326 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 6327 0x020f, 6328 0x0211}, 6329 { 6330 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 6331 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6332 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 6333 0x020e, 6334 0x020f}, 6335 { 6336 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 6337 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6338 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 6339 0x020d, 6340 0x020e}, 6341 { 6342 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 6343 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6344 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 6345 0x020c, 6346 0x020d}, 6347 { 6348 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 6349 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6350 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 6351 0x020b, 6352 0x020c}, 6353 { 6354 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 6355 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6356 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 6357 0x020a, 6358 0x020b}, 6359 { 6360 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 6361 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6362 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 6363 0x0209, 6364 0x020a}, 6365 { 6366 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 6367 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6368 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 6369 0x0208, 6370 0x0209}, 6371 { 6372 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 6373 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6374 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 6375 0x0207, 6376 0x0208}, 6377 { 6378 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 6379 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6380 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 6381 0x0206, 6382 0x0207}, 6383 { 6384 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 6385 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6386 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 6387 0x0205, 6388 0x0206}, 6389 { 6390 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 6391 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6392 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 6393 0x0204, 6394 0x0205}, 6395 { 6396 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 6397 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6398 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 6399 0x0203, 6400 0x0204}, 6401 { 6402 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 6403 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6404 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 6405 0x0202, 6406 0x0203}, 6407 { 6408 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 6409 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6410 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 6411 0x0201, 6412 0x0202}, 6413 { 6414 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 6415 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6416 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 6417 0x0200, 6418 0x0201}, 6419 { 6420 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 6421 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6422 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 6423 0x01ff, 6424 0x0200}, 6425 { 6426 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 6427 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6428 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 6429 0x01fe, 6430 0x01ff}, 6431 { 6432 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 6433 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6434 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 6435 0x01fc, 6436 0x01fd}, 6437 { 6438 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 6439 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6440 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 6441 0x01fb, 6442 0x01fc}, 6443 { 6444 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 6445 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6446 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x081c, 0x0818, 0x0814, 0x01f9, 6447 0x01fa, 6448 0x01fb}, 6449 { 6450 38, 5190, 0xc2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x07, 0x02, 0x0c, 6451 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6452 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0820, 0x081c, 0x0818, 0x01f8, 6453 0x01f9, 6454 0x01fa}, 6455 { 6456 40, 5200, 0xc5, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x08, 0x02, 0x0c, 6457 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6458 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0824, 0x0820, 0x081c, 0x01f7, 6459 0x01f8, 6460 0x01f9}, 6461 { 6462 42, 5210, 0xc8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x09, 0x02, 0x0c, 6463 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6464 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0828, 0x0824, 0x0820, 0x01f6, 6465 0x01f7, 6466 0x01f8}, 6467 { 6468 44, 5220, 0xcc, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0a, 0x02, 0x0c, 6469 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6470 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x082c, 0x0828, 0x0824, 0x01f5, 6471 0x01f6, 6472 0x01f7}, 6473 { 6474 46, 5230, 0xcf, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0b, 0x02, 0x0c, 6475 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6476 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0830, 0x082c, 0x0828, 0x01f4, 6477 0x01f5, 6478 0x01f6}, 6479 { 6480 48, 5240, 0xd2, 0x16, 0x10, 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0x03d1, 0x03cd, 0x042d, 6987 0x0431, 6988 0x0436}, 6989 { 6990 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6991 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6992 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6993 0x042f, 6994 0x0434}, 6995 { 6996 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6997 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6998 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6999 0x042d, 7000 0x0431}, 7001 { 7002 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7003 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7004 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7005 0x042b, 7006 0x042f}, 7007 { 7008 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7009 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7010 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7011 0x0429, 7012 0x042d}, 7013 { 7014 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7015 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7016 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7017 0x0427, 7018 0x042b}, 7019 { 7020 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7021 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7022 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7023 0x0424, 7024 0x0429}, 7025 { 7026 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7027 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7028 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7029 0x041f, 7030 0x0424} 7031 }; 7032 7033 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev8[] = { 7034 { 7035 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 7036 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7037 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 7038 0x0214, 7039 0x0215}, 7040 { 7041 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 7042 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7043 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 7044 0x0213, 7045 0x0214}, 7046 { 7047 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 7048 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7049 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 7050 0x0212, 7051 0x0213}, 7052 { 7053 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 7054 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7055 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 7056 0x0211, 7057 0x0212}, 7058 { 7059 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 7060 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7061 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 7062 0x020f, 7063 0x0211}, 7064 { 7065 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 7066 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7067 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 7068 0x020e, 7069 0x020f}, 7070 { 7071 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 7072 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7073 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 7074 0x020d, 7075 0x020e}, 7076 { 7077 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 7078 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7079 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 7080 0x020c, 7081 0x020d}, 7082 { 7083 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 7084 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7085 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 7086 0x020b, 7087 0x020c}, 7088 { 7089 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 7090 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7091 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 7092 0x020a, 7093 0x020b}, 7094 { 7095 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 7096 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7097 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 7098 0x0209, 7099 0x020a}, 7100 { 7101 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 7102 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7103 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 7104 0x0208, 7105 0x0209}, 7106 { 7107 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 7108 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7109 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 7110 0x0207, 7111 0x0208}, 7112 { 7113 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 7114 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7115 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 7116 0x0206, 7117 0x0207}, 7118 { 7119 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 7120 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7121 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 7122 0x0205, 7123 0x0206}, 7124 { 7125 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 7126 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7127 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 7128 0x0204, 7129 0x0205}, 7130 { 7131 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 7132 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7133 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 7134 0x0203, 7135 0x0204}, 7136 { 7137 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 7138 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7139 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 7140 0x0202, 7141 0x0203}, 7142 { 7143 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 7144 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7145 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 7146 0x0201, 7147 0x0202}, 7148 { 7149 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 7150 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7151 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 7152 0x0200, 7153 0x0201}, 7154 { 7155 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 7156 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7157 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 7158 0x01ff, 7159 0x0200}, 7160 { 7161 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 7162 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7163 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 7164 0x01fe, 7165 0x01ff}, 7166 { 7167 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 7168 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7169 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 7170 0x01fc, 7171 0x01fd}, 7172 { 7173 34, 5170, 0xbb, 0x16, 0x10, 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0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x47, 0x02, 0x05, 7636 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7637 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 7638 0x01c2, 7639 0x01c2}, 7640 { 7641 168, 5840, 0x9a, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x48, 0x02, 0x05, 7642 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7643 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 7644 0x01c1, 7645 0x01c2}, 7646 { 7647 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 7648 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7649 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 7650 0x01c0, 7651 0x01c1}, 7652 { 7653 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 7654 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7655 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 7656 0x01bf, 7657 0x01c0}, 7658 { 7659 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 7660 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7661 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 7662 0x01bf, 7663 0x01bf}, 7664 { 7665 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 7666 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7667 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 7668 0x01be, 7669 0x01bf}, 7670 { 7671 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 7672 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7673 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 7674 0x01bd, 7675 0x01be}, 7676 { 7677 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 7678 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7679 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 7680 0x01bc, 7681 0x01bd}, 7682 { 7683 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 7684 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7685 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 7686 0x043f, 7687 0x0443}, 7688 { 7689 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 7690 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7691 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 7692 0x043d, 7693 0x0441}, 7694 { 7695 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 7696 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7697 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 7698 0x043a, 7699 0x043f}, 7700 { 7701 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 7702 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7703 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 7704 0x0438, 7705 0x043d}, 7706 { 7707 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 7708 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7709 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 7710 0x0436, 7711 0x043a}, 7712 { 7713 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 7714 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7715 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 7716 0x0434, 7717 0x0438}, 7718 { 7719 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 7720 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7721 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 7722 0x0431, 7723 0x0436}, 7724 { 7725 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 7726 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7727 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 7728 0x042f, 7729 0x0434}, 7730 { 7731 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 7732 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7733 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 7734 0x042d, 7735 0x0431}, 7736 { 7737 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7738 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7739 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7740 0x042b, 7741 0x042f}, 7742 { 7743 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7744 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7745 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7746 0x0429, 7747 0x042d}, 7748 { 7749 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7750 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7751 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7752 0x0427, 7753 0x042b}, 7754 { 7755 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7756 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7757 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7758 0x0424, 7759 0x0429}, 7760 { 7761 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7762 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7763 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7764 0x041f, 7765 0x0424} 7766 }; 7767 7768 static struct radio_regs regs_2055[] = { 7769 {0x02, 0x80, 0x80, 0, 0}, 7770 {0x03, 0, 0, 0, 0}, 7771 {0x04, 0x27, 0x27, 0, 0}, 7772 {0x05, 0, 0, 0, 0}, 7773 {0x06, 0x27, 0x27, 0, 0}, 7774 {0x07, 0x7f, 0x7f, 1, 1}, 7775 {0x08, 0x7, 0x7, 1, 1}, 7776 {0x09, 0x7f, 0x7f, 1, 1}, 7777 {0x0A, 0x7, 0x7, 1, 1}, 7778 {0x0B, 0x15, 0x15, 0, 0}, 7779 {0x0C, 0x15, 0x15, 0, 0}, 7780 {0x0D, 0x4f, 0x4f, 1, 1}, 7781 {0x0E, 0x5, 0x5, 1, 1}, 7782 {0x0F, 0x4f, 0x4f, 1, 1}, 7783 {0x10, 0x5, 0x5, 1, 1}, 7784 {0x11, 0xd0, 0xd0, 0, 0}, 7785 {0x12, 0x2, 0x2, 0, 0}, 7786 {0x13, 0, 0, 0, 0}, 7787 {0x14, 0x40, 0x40, 0, 0}, 7788 {0x15, 0, 0, 0, 0}, 7789 {0x16, 0, 0, 0, 0}, 7790 {0x17, 0, 0, 0, 0}, 7791 {0x18, 0, 0, 0, 0}, 7792 {0x19, 0, 0, 0, 0}, 7793 {0x1A, 0, 0, 0, 0}, 7794 {0x1B, 0, 0, 0, 0}, 7795 {0x1C, 0, 0, 0, 0}, 7796 {0x1D, 0xc0, 0xc0, 0, 0}, 7797 {0x1E, 0xff, 0xff, 0, 0}, 7798 {0x1F, 0xc0, 0xc0, 0, 0}, 7799 {0x20, 0xff, 0xff, 0, 0}, 7800 {0x21, 0xc0, 0xc0, 0, 0}, 7801 {0x22, 0, 0, 0, 0}, 7802 {0x23, 0x2c, 0x2c, 0, 0}, 7803 {0x24, 0, 0, 0, 0}, 7804 {0x25, 0, 0, 0, 0}, 7805 {0x26, 0, 0, 0, 0}, 7806 {0x27, 0, 0, 0, 0}, 7807 {0x28, 0, 0, 0, 0}, 7808 {0x29, 0, 0, 0, 0}, 7809 {0x2A, 0, 0, 0, 0}, 7810 {0x2B, 0, 0, 0, 0}, 7811 {0x2C, 0, 0, 0, 0}, 7812 {0x2D, 0xa4, 0xa4, 0, 0}, 7813 {0x2E, 0x38, 0x38, 0, 0}, 7814 {0x2F, 0, 0, 0, 0}, 7815 {0x30, 0x4, 0x4, 1, 1}, 7816 {0x31, 0, 0, 0, 0}, 7817 {0x32, 0xa, 0xa, 0, 0}, 7818 {0x33, 0x87, 0x87, 0, 0}, 7819 {0x34, 0x9, 0x9, 0, 0}, 7820 {0x35, 0x70, 0x70, 0, 0}, 7821 {0x36, 0x11, 0x11, 0, 0}, 7822 {0x37, 0x18, 0x18, 1, 1}, 7823 {0x38, 0x6, 0x6, 0, 0}, 7824 {0x39, 0x4, 0x4, 1, 1}, 7825 {0x3A, 0x6, 0x6, 0, 0}, 7826 {0x3B, 0x9e, 0x9e, 0, 0}, 7827 {0x3C, 0x9, 0x9, 0, 0}, 7828 {0x3D, 0xc8, 0xc8, 1, 1}, 7829 {0x3E, 0x88, 0x88, 0, 0}, 7830 {0x3F, 0, 0, 0, 0}, 7831 {0x40, 0, 0, 0, 0}, 7832 {0x41, 0, 0, 0, 0}, 7833 {0x42, 0x1, 0x1, 0, 0}, 7834 {0x43, 0x2, 0x2, 0, 0}, 7835 {0x44, 0x96, 0x96, 0, 0}, 7836 {0x45, 0x3e, 0x3e, 0, 0}, 7837 {0x46, 0x3e, 0x3e, 0, 0}, 7838 {0x47, 0x13, 0x13, 0, 0}, 7839 {0x48, 0x2, 0x2, 0, 0}, 7840 {0x49, 0x15, 0x15, 0, 0}, 7841 {0x4A, 0x7, 0x7, 0, 0}, 7842 {0x4B, 0, 0, 0, 0}, 7843 {0x4C, 0, 0, 0, 0}, 7844 {0x4D, 0, 0, 0, 0}, 7845 {0x4E, 0, 0, 0, 0}, 7846 {0x4F, 0, 0, 0, 0}, 7847 {0x50, 0x8, 0x8, 0, 0}, 7848 {0x51, 0x8, 0x8, 0, 0}, 7849 {0x52, 0x6, 0x6, 0, 0}, 7850 {0x53, 0x84, 0x84, 1, 1}, 7851 {0x54, 0xc3, 0xc3, 0, 0}, 7852 {0x55, 0x8f, 0x8f, 0, 0}, 7853 {0x56, 0xff, 0xff, 0, 0}, 7854 {0x57, 0xff, 0xff, 0, 0}, 7855 {0x58, 0x88, 0x88, 0, 0}, 7856 {0x59, 0x88, 0x88, 0, 0}, 7857 {0x5A, 0, 0, 0, 0}, 7858 {0x5B, 0xcc, 0xcc, 0, 0}, 7859 {0x5C, 0x6, 0x6, 0, 0}, 7860 {0x5D, 0x80, 0x80, 0, 0}, 7861 {0x5E, 0x80, 0x80, 0, 0}, 7862 {0x5F, 0xf8, 0xf8, 0, 0}, 7863 {0x60, 0x88, 0x88, 0, 0}, 7864 {0x61, 0x88, 0x88, 0, 0}, 7865 {0x62, 0x88, 0x8, 1, 1}, 7866 {0x63, 0x88, 0x88, 0, 0}, 7867 {0x64, 0, 0, 0, 0}, 7868 {0x65, 0x1, 0x1, 1, 1}, 7869 {0x66, 0x8a, 0x8a, 0, 0}, 7870 {0x67, 0x8, 0x8, 0, 0}, 7871 {0x68, 0x83, 0x83, 0, 0}, 7872 {0x69, 0x6, 0x6, 0, 0}, 7873 {0x6A, 0xa0, 0xa0, 0, 0}, 7874 {0x6B, 0xa, 0xa, 0, 0}, 7875 {0x6C, 0x87, 0x87, 1, 1}, 7876 {0x6D, 0x2a, 0x2a, 0, 0}, 7877 {0x6E, 0x2a, 0x2a, 0, 0}, 7878 {0x6F, 0x2a, 0x2a, 0, 0}, 7879 {0x70, 0x2a, 0x2a, 0, 0}, 7880 {0x71, 0x18, 0x18, 0, 0}, 7881 {0x72, 0x6a, 0x6a, 1, 1}, 7882 {0x73, 0xab, 0xab, 1, 1}, 7883 {0x74, 0x13, 0x13, 1, 1}, 7884 {0x75, 0xc1, 0xc1, 1, 1}, 7885 {0x76, 0xaa, 0xaa, 1, 1}, 7886 {0x77, 0x87, 0x87, 1, 1}, 7887 {0x78, 0, 0, 0, 0}, 7888 {0x79, 0x6, 0x6, 0, 0}, 7889 {0x7A, 0x7, 0x7, 0, 0}, 7890 {0x7B, 0x7, 0x7, 0, 0}, 7891 {0x7C, 0x15, 0x15, 0, 0}, 7892 {0x7D, 0x55, 0x55, 0, 0}, 7893 {0x7E, 0x97, 0x97, 1, 1}, 7894 {0x7F, 0x8, 0x8, 0, 0}, 7895 {0x80, 0x14, 0x14, 1, 1}, 7896 {0x81, 0x33, 0x33, 0, 0}, 7897 {0x82, 0x88, 0x88, 0, 0}, 7898 {0x83, 0x6, 0x6, 0, 0}, 7899 {0x84, 0x3, 0x3, 1, 1}, 7900 {0x85, 0xa, 0xa, 0, 0}, 7901 {0x86, 0x3, 0x3, 1, 1}, 7902 {0x87, 0x2a, 0x2a, 0, 0}, 7903 {0x88, 0xa4, 0xa4, 0, 0}, 7904 {0x89, 0x18, 0x18, 0, 0}, 7905 {0x8A, 0x28, 0x28, 0, 0}, 7906 {0x8B, 0, 0, 0, 0}, 7907 {0x8C, 0x4a, 0x4a, 0, 0}, 7908 {0x8D, 0, 0, 0, 0}, 7909 {0x8E, 0xf8, 0xf8, 0, 0}, 7910 {0x8F, 0x88, 0x88, 0, 0}, 7911 {0x90, 0x88, 0x88, 0, 0}, 7912 {0x91, 0x88, 0x8, 1, 1}, 7913 {0x92, 0x88, 0x88, 0, 0}, 7914 {0x93, 0, 0, 0, 0}, 7915 {0x94, 0x1, 0x1, 1, 1}, 7916 {0x95, 0x8a, 0x8a, 0, 0}, 7917 {0x96, 0x8, 0x8, 0, 0}, 7918 {0x97, 0x83, 0x83, 0, 0}, 7919 {0x98, 0x6, 0x6, 0, 0}, 7920 {0x99, 0xa0, 0xa0, 0, 0}, 7921 {0x9A, 0xa, 0xa, 0, 0}, 7922 {0x9B, 0x87, 0x87, 1, 1}, 7923 {0x9C, 0x2a, 0x2a, 0, 0}, 7924 {0x9D, 0x2a, 0x2a, 0, 0}, 7925 {0x9E, 0x2a, 0x2a, 0, 0}, 7926 {0x9F, 0x2a, 0x2a, 0, 0}, 7927 {0xA0, 0x18, 0x18, 0, 0}, 7928 {0xA1, 0x6a, 0x6a, 1, 1}, 7929 {0xA2, 0xab, 0xab, 1, 1}, 7930 {0xA3, 0x13, 0x13, 1, 1}, 7931 {0xA4, 0xc1, 0xc1, 1, 1}, 7932 {0xA5, 0xaa, 0xaa, 1, 1}, 7933 {0xA6, 0x87, 0x87, 1, 1}, 7934 {0xA7, 0, 0, 0, 0}, 7935 {0xA8, 0x6, 0x6, 0, 0}, 7936 {0xA9, 0x7, 0x7, 0, 0}, 7937 {0xAA, 0x7, 0x7, 0, 0}, 7938 {0xAB, 0x15, 0x15, 0, 0}, 7939 {0xAC, 0x55, 0x55, 0, 0}, 7940 {0xAD, 0x97, 0x97, 1, 1}, 7941 {0xAE, 0x8, 0x8, 0, 0}, 7942 {0xAF, 0x14, 0x14, 1, 1}, 7943 {0xB0, 0x33, 0x33, 0, 0}, 7944 {0xB1, 0x88, 0x88, 0, 0}, 7945 {0xB2, 0x6, 0x6, 0, 0}, 7946 {0xB3, 0x3, 0x3, 1, 1}, 7947 {0xB4, 0xa, 0xa, 0, 0}, 7948 {0xB5, 0x3, 0x3, 1, 1}, 7949 {0xB6, 0x2a, 0x2a, 0, 0}, 7950 {0xB7, 0xa4, 0xa4, 0, 0}, 7951 {0xB8, 0x18, 0x18, 0, 0}, 7952 {0xB9, 0x28, 0x28, 0, 0}, 7953 {0xBA, 0, 0, 0, 0}, 7954 {0xBB, 0x4a, 0x4a, 0, 0}, 7955 {0xBC, 0, 0, 0, 0}, 7956 {0xBD, 0x71, 0x71, 0, 0}, 7957 {0xBE, 0x72, 0x72, 0, 0}, 7958 {0xBF, 0x73, 0x73, 0, 0}, 7959 {0xC0, 0x74, 0x74, 0, 0}, 7960 {0xC1, 0x75, 0x75, 0, 0}, 7961 {0xC2, 0x76, 0x76, 0, 0}, 7962 {0xC3, 0x77, 0x77, 0, 0}, 7963 {0xC4, 0x78, 0x78, 0, 0}, 7964 {0xC5, 0x79, 0x79, 0, 0}, 7965 {0xC6, 0x7a, 0x7a, 0, 0}, 7966 {0xC7, 0, 0, 0, 0}, 7967 {0xC8, 0, 0, 0, 0}, 7968 {0xC9, 0, 0, 0, 0}, 7969 {0xCA, 0, 0, 0, 0}, 7970 {0xCB, 0, 0, 0, 0}, 7971 {0xCC, 0, 0, 0, 0}, 7972 {0xCD, 0, 0, 0, 0}, 7973 {0xCE, 0x6, 0x6, 0, 0}, 7974 {0xCF, 0, 0, 0, 0}, 7975 {0xD0, 0, 0, 0, 0}, 7976 {0xD1, 0x18, 0x18, 0, 0}, 7977 {0xD2, 0x88, 0x88, 0, 0}, 7978 {0xD3, 0, 0, 0, 0}, 7979 {0xD4, 0, 0, 0, 0}, 7980 {0xD5, 0, 0, 0, 0}, 7981 {0xD6, 0, 0, 0, 0}, 7982 {0xD7, 0, 0, 0, 0}, 7983 {0xD8, 0, 0, 0, 0}, 7984 {0xD9, 0, 0, 0, 0}, 7985 {0xDA, 0x6, 0x6, 0, 0}, 7986 {0xDB, 0, 0, 0, 0}, 7987 {0xDC, 0, 0, 0, 0}, 7988 {0xDD, 0x18, 0x18, 0, 0}, 7989 {0xDE, 0x88, 0x88, 0, 0}, 7990 {0xDF, 0, 0, 0, 0}, 7991 {0xE0, 0, 0, 0, 0}, 7992 {0xE1, 0, 0, 0, 0}, 7993 {0xE2, 0, 0, 0, 0}, 7994 {0xFFFF, 0, 0, 0, 0}, 7995 }; 7996 7997 static struct radio_regs regs_SYN_2056[] = { 7998 {0x02, 0, 0, 0, 0}, 7999 {0x03, 0, 0, 0, 0}, 8000 {0x04, 0, 0, 0, 0}, 8001 {0x05, 0, 0, 0, 0}, 8002 {0x06, 0, 0, 0, 0}, 8003 {0x07, 0, 0, 0, 0}, 8004 {0x08, 0, 0, 0, 0}, 8005 {0x09, 0x1, 0x1, 0, 0}, 8006 {0x0A, 0, 0, 0, 0}, 8007 {0x0B, 0, 0, 0, 0}, 8008 {0x0C, 0, 0, 0, 0}, 8009 {0x0D, 0, 0, 0, 0}, 8010 {0x0E, 0, 0, 0, 0}, 8011 {0x0F, 0, 0, 0, 0}, 8012 {0x10, 0, 0, 0, 0}, 8013 {0x11, 0, 0, 0, 0}, 8014 {0x12, 0, 0, 0, 0}, 8015 {0x13, 0, 0, 0, 0}, 8016 {0x14, 0, 0, 0, 0}, 8017 {0x15, 0, 0, 0, 0}, 8018 {0x16, 0, 0, 0, 0}, 8019 {0x17, 0, 0, 0, 0}, 8020 {0x18, 0, 0, 0, 0}, 8021 {0x19, 0, 0, 0, 0}, 8022 {0x1A, 0, 0, 0, 0}, 8023 {0x1B, 0, 0, 0, 0}, 8024 {0x1C, 0, 0, 0, 0}, 8025 {0x1D, 0, 0, 0, 0}, 8026 {0x1E, 0, 0, 0, 0}, 8027 {0x1F, 0, 0, 0, 0}, 8028 {0x20, 0, 0, 0, 0}, 8029 {0x21, 0, 0, 0, 0}, 8030 {0x22, 0x60, 0x60, 0, 0}, 8031 {0x23, 0x6, 0x6, 0, 0}, 8032 {0x24, 0xc, 0xc, 0, 0}, 8033 {0x25, 0, 0, 0, 0}, 8034 {0x26, 0, 0, 0, 0}, 8035 {0x27, 0, 0, 0, 0}, 8036 {0x28, 0x1, 0x1, 0, 0}, 8037 {0x29, 0, 0, 0, 0}, 8038 {0x2A, 0, 0, 0, 0}, 8039 {0x2B, 0, 0, 0, 0}, 8040 {0x2C, 0, 0, 0, 0}, 8041 {0x2D, 0, 0, 0, 0}, 8042 {0x2E, 0xd, 0xd, 0, 0}, 8043 {0x2F, 0x1f, 0x1f, 0, 0}, 8044 {0x30, 0x15, 0x15, 0, 0}, 8045 {0x31, 0xf, 0xf, 0, 0}, 8046 {0x32, 0, 0, 0, 0}, 8047 {0x33, 0, 0, 0, 0}, 8048 {0x34, 0, 0, 0, 0}, 8049 {0x35, 0, 0, 0, 0}, 8050 {0x36, 0, 0, 0, 0}, 8051 {0x37, 0, 0, 0, 0}, 8052 {0x38, 0, 0, 0, 0}, 8053 {0x39, 0, 0, 0, 0}, 8054 {0x3A, 0, 0, 0, 0}, 8055 {0x3B, 0, 0, 0, 0}, 8056 {0x3C, 0x13, 0x13, 0, 0}, 8057 {0x3D, 0xf, 0xf, 0, 0}, 8058 {0x3E, 0x18, 0x18, 0, 0}, 8059 {0x3F, 0, 0, 0, 0}, 8060 {0x40, 0, 0, 0, 0}, 8061 {0x41, 0x20, 0x20, 0, 0}, 8062 {0x42, 0x20, 0x20, 0, 0}, 8063 {0x43, 0, 0, 0, 0}, 8064 {0x44, 0x77, 0x77, 0, 0}, 8065 {0x45, 0x7, 0x7, 0, 0}, 8066 {0x46, 0x1, 0x1, 0, 0}, 8067 {0x47, 0x4, 0x4, 0, 0}, 8068 {0x48, 0xf, 0xf, 0, 0}, 8069 {0x49, 0x30, 0x30, 0, 0}, 8070 {0x4A, 0x32, 0x32, 0, 0}, 8071 {0x4B, 0xd, 0xd, 0, 0}, 8072 {0x4C, 0xd, 0xd, 0, 0}, 8073 {0x4D, 0x4, 0x4, 0, 0}, 8074 {0x4E, 0x6, 0x6, 0, 0}, 8075 {0x4F, 0x1, 0x1, 0, 0}, 8076 {0x50, 0x1c, 0x1c, 0, 0}, 8077 {0x51, 0x2, 0x2, 0, 0}, 8078 {0x52, 0x2, 0x2, 0, 0}, 8079 {0x53, 0xf7, 0xf7, 1, 1}, 8080 {0x54, 0xb4, 0xb4, 0, 0}, 8081 {0x55, 0xd2, 0xd2, 0, 0}, 8082 {0x56, 0, 0, 0, 0}, 8083 {0x57, 0, 0, 0, 0}, 8084 {0x58, 0x4, 0x4, 0, 0}, 8085 {0x59, 0x96, 0x96, 0, 0}, 8086 {0x5A, 0x3e, 0x3e, 0, 0}, 8087 {0x5B, 0x3e, 0x3e, 0, 0}, 8088 {0x5C, 0x13, 0x13, 0, 0}, 8089 {0x5D, 0x2, 0x2, 0, 0}, 8090 {0x5E, 0, 0, 0, 0}, 8091 {0x5F, 0x7, 0x7, 0, 0}, 8092 {0x60, 0x7, 0x7, 1, 1}, 8093 {0x61, 0x8, 0x8, 0, 0}, 8094 {0x62, 0x3, 0x3, 0, 0}, 8095 {0x63, 0, 0, 0, 0}, 8096 {0x64, 0, 0, 0, 0}, 8097 {0x65, 0, 0, 0, 0}, 8098 {0x66, 0, 0, 0, 0}, 8099 {0x67, 0, 0, 0, 0}, 8100 {0x68, 0x40, 0x40, 0, 0}, 8101 {0x69, 0, 0, 0, 0}, 8102 {0x6A, 0, 0, 0, 0}, 8103 {0x6B, 0, 0, 0, 0}, 8104 {0x6C, 0, 0, 0, 0}, 8105 {0x6D, 0x1, 0x1, 0, 0}, 8106 {0x6E, 0, 0, 0, 0}, 8107 {0x6F, 0, 0, 0, 0}, 8108 {0x70, 0x60, 0x60, 0, 0}, 8109 {0x71, 0x66, 0x66, 0, 0}, 8110 {0x72, 0xc, 0xc, 0, 0}, 8111 {0x73, 0x66, 0x66, 0, 0}, 8112 {0x74, 0x8f, 0x8f, 1, 1}, 8113 {0x75, 0, 0, 0, 0}, 8114 {0x76, 0xcc, 0xcc, 0, 0}, 8115 {0x77, 0x1, 0x1, 0, 0}, 8116 {0x78, 0x66, 0x66, 0, 0}, 8117 {0x79, 0x66, 0x66, 0, 0}, 8118 {0x7A, 0, 0, 0, 0}, 8119 {0x7B, 0, 0, 0, 0}, 8120 {0x7C, 0, 0, 0, 0}, 8121 {0x7D, 0, 0, 0, 0}, 8122 {0x7E, 0, 0, 0, 0}, 8123 {0x7F, 0, 0, 0, 0}, 8124 {0x80, 0, 0, 0, 0}, 8125 {0x81, 0, 0, 0, 0}, 8126 {0x82, 0, 0, 0, 0}, 8127 {0x83, 0, 0, 0, 0}, 8128 {0x84, 0, 0, 0, 0}, 8129 {0x85, 0xff, 0xff, 0, 0}, 8130 {0x86, 0, 0, 0, 0}, 8131 {0x87, 0, 0, 0, 0}, 8132 {0x88, 0, 0, 0, 0}, 8133 {0x89, 0, 0, 0, 0}, 8134 {0x8A, 0, 0, 0, 0}, 8135 {0x8B, 0, 0, 0, 0}, 8136 {0x8C, 0, 0, 0, 0}, 8137 {0x8D, 0, 0, 0, 0}, 8138 {0x8E, 0, 0, 0, 0}, 8139 {0x8F, 0, 0, 0, 0}, 8140 {0x90, 0, 0, 0, 0}, 8141 {0x91, 0, 0, 0, 0}, 8142 {0x92, 0, 0, 0, 0}, 8143 {0x93, 0, 0, 0, 0}, 8144 {0x94, 0, 0, 0, 0}, 8145 {0x95, 0, 0, 0, 0}, 8146 {0x96, 0, 0, 0, 0}, 8147 {0x97, 0, 0, 0, 0}, 8148 {0x98, 0, 0, 0, 0}, 8149 {0x99, 0, 0, 0, 0}, 8150 {0x9A, 0, 0, 0, 0}, 8151 {0x9B, 0, 0, 0, 0}, 8152 {0x9C, 0, 0, 0, 0}, 8153 {0x9D, 0, 0, 0, 0}, 8154 {0x9E, 0, 0, 0, 0}, 8155 {0x9F, 0x6, 0x6, 0, 0}, 8156 {0xA0, 0x66, 0x66, 0, 0}, 8157 {0xA1, 0x66, 0x66, 0, 0}, 8158 {0xA2, 0x66, 0x66, 0, 0}, 8159 {0xA3, 0x66, 0x66, 0, 0}, 8160 {0xA4, 0x66, 0x66, 0, 0}, 8161 {0xA5, 0x66, 0x66, 0, 0}, 8162 {0xA6, 0x66, 0x66, 0, 0}, 8163 {0xA7, 0x66, 0x66, 0, 0}, 8164 {0xA8, 0x66, 0x66, 0, 0}, 8165 {0xA9, 0x66, 0x66, 0, 0}, 8166 {0xAA, 0x66, 0x66, 0, 0}, 8167 {0xAB, 0x66, 0x66, 0, 0}, 8168 {0xAC, 0x66, 0x66, 0, 0}, 8169 {0xAD, 0x66, 0x66, 0, 0}, 8170 {0xAE, 0x66, 0x66, 0, 0}, 8171 {0xAF, 0x66, 0x66, 0, 0}, 8172 {0xB0, 0x66, 0x66, 0, 0}, 8173 {0xB1, 0x66, 0x66, 0, 0}, 8174 {0xB2, 0x66, 0x66, 0, 0}, 8175 {0xB3, 0xa, 0xa, 0, 0}, 8176 {0xB4, 0, 0, 0, 0}, 8177 {0xB5, 0, 0, 0, 0}, 8178 {0xB6, 0, 0, 0, 0}, 8179 {0xFFFF, 0, 0, 0, 0} 8180 }; 8181 8182 static struct radio_regs regs_TX_2056[] = { 8183 {0x02, 0, 0, 0, 0}, 8184 {0x03, 0, 0, 0, 0}, 8185 {0x04, 0, 0, 0, 0}, 8186 {0x05, 0, 0, 0, 0}, 8187 {0x06, 0, 0, 0, 0}, 8188 {0x07, 0, 0, 0, 0}, 8189 {0x08, 0, 0, 0, 0}, 8190 {0x09, 0, 0, 0, 0}, 8191 {0x0A, 0, 0, 0, 0}, 8192 {0x0B, 0, 0, 0, 0}, 8193 {0x0C, 0, 0, 0, 0}, 8194 {0x0D, 0, 0, 0, 0}, 8195 {0x0E, 0, 0, 0, 0}, 8196 {0x0F, 0, 0, 0, 0}, 8197 {0x10, 0, 0, 0, 0}, 8198 {0x11, 0, 0, 0, 0}, 8199 {0x12, 0, 0, 0, 0}, 8200 {0x13, 0, 0, 0, 0}, 8201 {0x14, 0, 0, 0, 0}, 8202 {0x15, 0, 0, 0, 0}, 8203 {0x16, 0, 0, 0, 0}, 8204 {0x17, 0, 0, 0, 0}, 8205 {0x18, 0, 0, 0, 0}, 8206 {0x19, 0, 0, 0, 0}, 8207 {0x1A, 0, 0, 0, 0}, 8208 {0x1B, 0, 0, 0, 0}, 8209 {0x1C, 0, 0, 0, 0}, 8210 {0x1D, 0, 0, 0, 0}, 8211 {0x1E, 0, 0, 0, 0}, 8212 {0x1F, 0, 0, 0, 0}, 8213 {0x20, 0, 0, 0, 0}, 8214 {0x21, 0x88, 0x88, 0, 0}, 8215 {0x22, 0x88, 0x88, 0, 0}, 8216 {0x23, 0x88, 0x88, 0, 0}, 8217 {0x24, 0x88, 0x88, 0, 0}, 8218 {0x25, 0xc, 0xc, 0, 0}, 8219 {0x26, 0, 0, 0, 0}, 8220 {0x27, 0x3, 0x3, 0, 0}, 8221 {0x28, 0, 0, 0, 0}, 8222 {0x29, 0x3, 0x3, 0, 0}, 8223 {0x2A, 0x37, 0x37, 0, 0}, 8224 {0x2B, 0x3, 0x3, 0, 0}, 8225 {0x2C, 0, 0, 0, 0}, 8226 {0x2D, 0, 0, 0, 0}, 8227 {0x2E, 0x1, 0x1, 0, 0}, 8228 {0x2F, 0x1, 0x1, 0, 0}, 8229 {0x30, 0, 0, 0, 0}, 8230 {0x31, 0, 0, 0, 0}, 8231 {0x32, 0, 0, 0, 0}, 8232 {0x33, 0x11, 0x11, 0, 0}, 8233 {0x34, 0x11, 0x11, 0, 0}, 8234 {0x35, 0, 0, 0, 0}, 8235 {0x36, 0, 0, 0, 0}, 8236 {0x37, 0x3, 0x3, 0, 0}, 8237 {0x38, 0xf, 0xf, 0, 0}, 8238 {0x39, 0, 0, 0, 0}, 8239 {0x3A, 0x2d, 0x2d, 0, 0}, 8240 {0x3B, 0, 0, 0, 0}, 8241 {0x3C, 0x6e, 0x6e, 0, 0}, 8242 {0x3D, 0xf0, 0xf0, 1, 1}, 8243 {0x3E, 0, 0, 0, 0}, 8244 {0x3F, 0, 0, 0, 0}, 8245 {0x40, 0, 0, 0, 0}, 8246 {0x41, 0x3, 0x3, 0, 0}, 8247 {0x42, 0x3, 0x3, 0, 0}, 8248 {0x43, 0, 0, 0, 0}, 8249 {0x44, 0x1e, 0x1e, 0, 0}, 8250 {0x45, 0, 0, 0, 0}, 8251 {0x46, 0x6e, 0x6e, 0, 0}, 8252 {0x47, 0xf0, 0xf0, 1, 1}, 8253 {0x48, 0, 0, 0, 0}, 8254 {0x49, 0x2, 0x2, 0, 0}, 8255 {0x4A, 0xff, 0xff, 1, 1}, 8256 {0x4B, 0xc, 0xc, 0, 0}, 8257 {0x4C, 0, 0, 0, 0}, 8258 {0x4D, 0x38, 0x38, 0, 0}, 8259 {0x4E, 0x70, 0x70, 1, 1}, 8260 {0x4F, 0x2, 0x2, 0, 0}, 8261 {0x50, 0x88, 0x88, 0, 0}, 8262 {0x51, 0xc, 0xc, 0, 0}, 8263 {0x52, 0, 0, 0, 0}, 8264 {0x53, 0x8, 0x8, 0, 0}, 8265 {0x54, 0x70, 0x70, 1, 1}, 8266 {0x55, 0x2, 0x2, 0, 0}, 8267 {0x56, 0xff, 0xff, 1, 1}, 8268 {0x57, 0, 0, 0, 0}, 8269 {0x58, 0x83, 0x83, 0, 0}, 8270 {0x59, 0x77, 0x77, 1, 1}, 8271 {0x5A, 0, 0, 0, 0}, 8272 {0x5B, 0x2, 0x2, 0, 0}, 8273 {0x5C, 0x88, 0x88, 0, 0}, 8274 {0x5D, 0, 0, 0, 0}, 8275 {0x5E, 0x8, 0x8, 0, 0}, 8276 {0x5F, 0x77, 0x77, 1, 1}, 8277 {0x60, 0x1, 0x1, 0, 0}, 8278 {0x61, 0, 0, 0, 0}, 8279 {0x62, 0x7, 0x7, 0, 0}, 8280 {0x63, 0, 0, 0, 0}, 8281 {0x64, 0x7, 0x7, 0, 0}, 8282 {0x65, 0, 0, 0, 0}, 8283 {0x66, 0, 0, 0, 0}, 8284 {0x67, 0x74, 0x74, 1, 1}, 8285 {0x68, 0, 0, 0, 0}, 8286 {0x69, 0xa, 0xa, 0, 0}, 8287 {0x6A, 0, 0, 0, 0}, 8288 {0x6B, 0, 0, 0, 0}, 8289 {0x6C, 0, 0, 0, 0}, 8290 {0x6D, 0, 0, 0, 0}, 8291 {0x6E, 0, 0, 0, 0}, 8292 {0x6F, 0, 0, 0, 0}, 8293 {0x70, 0, 0, 0, 0}, 8294 {0x71, 0x2, 0x2, 0, 0}, 8295 {0x72, 0, 0, 0, 0}, 8296 {0x73, 0, 0, 0, 0}, 8297 {0x74, 0xe, 0xe, 0, 0}, 8298 {0x75, 0xe, 0xe, 0, 0}, 8299 {0x76, 0xe, 0xe, 0, 0}, 8300 {0x77, 0x13, 0x13, 0, 0}, 8301 {0x78, 0x13, 0x13, 0, 0}, 8302 {0x79, 0x1b, 0x1b, 0, 0}, 8303 {0x7A, 0x1b, 0x1b, 0, 0}, 8304 {0x7B, 0x55, 0x55, 0, 0}, 8305 {0x7C, 0x5b, 0x5b, 0, 0}, 8306 {0x7D, 0, 0, 0, 0}, 8307 {0x7E, 0, 0, 0, 0}, 8308 {0x7F, 0, 0, 0, 0}, 8309 {0x80, 0, 0, 0, 0}, 8310 {0x81, 0, 0, 0, 0}, 8311 {0x82, 0, 0, 0, 0}, 8312 {0x83, 0, 0, 0, 0}, 8313 {0x84, 0, 0, 0, 0}, 8314 {0x85, 0, 0, 0, 0}, 8315 {0x86, 0, 0, 0, 0}, 8316 {0x87, 0, 0, 0, 0}, 8317 {0x88, 0, 0, 0, 0}, 8318 {0x89, 0, 0, 0, 0}, 8319 {0x8A, 0, 0, 0, 0}, 8320 {0x8B, 0, 0, 0, 0}, 8321 {0x8C, 0, 0, 0, 0}, 8322 {0x8D, 0, 0, 0, 0}, 8323 {0x8E, 0, 0, 0, 0}, 8324 {0x8F, 0, 0, 0, 0}, 8325 {0x90, 0, 0, 0, 0}, 8326 {0x91, 0, 0, 0, 0}, 8327 {0x92, 0, 0, 0, 0}, 8328 {0xFFFF, 0, 0, 0, 0} 8329 }; 8330 8331 static struct radio_regs regs_RX_2056[] = { 8332 {0x02, 0, 0, 0, 0}, 8333 {0x03, 0, 0, 0, 0}, 8334 {0x04, 0, 0, 0, 0}, 8335 {0x05, 0, 0, 0, 0}, 8336 {0x06, 0, 0, 0, 0}, 8337 {0x07, 0, 0, 0, 0}, 8338 {0x08, 0, 0, 0, 0}, 8339 {0x09, 0, 0, 0, 0}, 8340 {0x0A, 0, 0, 0, 0}, 8341 {0x0B, 0, 0, 0, 0}, 8342 {0x0C, 0, 0, 0, 0}, 8343 {0x0D, 0, 0, 0, 0}, 8344 {0x0E, 0, 0, 0, 0}, 8345 {0x0F, 0, 0, 0, 0}, 8346 {0x10, 0, 0, 0, 0}, 8347 {0x11, 0, 0, 0, 0}, 8348 {0x12, 0, 0, 0, 0}, 8349 {0x13, 0, 0, 0, 0}, 8350 {0x14, 0, 0, 0, 0}, 8351 {0x15, 0, 0, 0, 0}, 8352 {0x16, 0, 0, 0, 0}, 8353 {0x17, 0, 0, 0, 0}, 8354 {0x18, 0, 0, 0, 0}, 8355 {0x19, 0, 0, 0, 0}, 8356 {0x1A, 0, 0, 0, 0}, 8357 {0x1B, 0, 0, 0, 0}, 8358 {0x1C, 0, 0, 0, 0}, 8359 {0x1D, 0, 0, 0, 0}, 8360 {0x1E, 0, 0, 0, 0}, 8361 {0x1F, 0, 0, 0, 0}, 8362 {0x20, 0x3, 0x3, 0, 0}, 8363 {0x21, 0, 0, 0, 0}, 8364 {0x22, 0, 0, 0, 0}, 8365 {0x23, 0x90, 0x90, 0, 0}, 8366 {0x24, 0x55, 0x55, 0, 0}, 8367 {0x25, 0x15, 0x15, 0, 0}, 8368 {0x26, 0x5, 0x5, 0, 0}, 8369 {0x27, 0x15, 0x15, 0, 0}, 8370 {0x28, 0x5, 0x5, 0, 0}, 8371 {0x29, 0x20, 0x20, 0, 0}, 8372 {0x2A, 0x11, 0x11, 0, 0}, 8373 {0x2B, 0x90, 0x90, 0, 0}, 8374 {0x2C, 0, 0, 0, 0}, 8375 {0x2D, 0x88, 0x88, 0, 0}, 8376 {0x2E, 0x32, 0x32, 0, 0}, 8377 {0x2F, 0x77, 0x77, 0, 0}, 8378 {0x30, 0x17, 0x17, 1, 1}, 8379 {0x31, 0xff, 0xff, 1, 1}, 8380 {0x32, 0x20, 0x20, 0, 0}, 8381 {0x33, 0, 0, 0, 0}, 8382 {0x34, 0x88, 0x88, 0, 0}, 8383 {0x35, 0x32, 0x32, 0, 0}, 8384 {0x36, 0x77, 0x77, 0, 0}, 8385 {0x37, 0x17, 0x17, 1, 1}, 8386 {0x38, 0xf0, 0xf0, 1, 1}, 8387 {0x39, 0x20, 0x20, 0, 0}, 8388 {0x3A, 0x8, 0x8, 0, 0}, 8389 {0x3B, 0x99, 0x99, 0, 0}, 8390 {0x3C, 0, 0, 0, 0}, 8391 {0x3D, 0x44, 0x44, 1, 1}, 8392 {0x3E, 0, 0, 0, 0}, 8393 {0x3F, 0x44, 0x44, 0, 0}, 8394 {0x40, 0xf, 0xf, 1, 1}, 8395 {0x41, 0x6, 0x6, 0, 0}, 8396 {0x42, 0x4, 0x4, 0, 0}, 8397 {0x43, 0x50, 0x50, 1, 1}, 8398 {0x44, 0x8, 0x8, 0, 0}, 8399 {0x45, 0x99, 0x99, 0, 0}, 8400 {0x46, 0, 0, 0, 0}, 8401 {0x47, 0x11, 0x11, 0, 0}, 8402 {0x48, 0, 0, 0, 0}, 8403 {0x49, 0x44, 0x44, 0, 0}, 8404 {0x4A, 0x7, 0x7, 0, 0}, 8405 {0x4B, 0x6, 0x6, 0, 0}, 8406 {0x4C, 0x4, 0x4, 0, 0}, 8407 {0x4D, 0, 0, 0, 0}, 8408 {0x4E, 0, 0, 0, 0}, 8409 {0x4F, 0x66, 0x66, 0, 0}, 8410 {0x50, 0x66, 0x66, 0, 0}, 8411 {0x51, 0x57, 0x57, 0, 0}, 8412 {0x52, 0x57, 0x57, 0, 0}, 8413 {0x53, 0x44, 0x44, 0, 0}, 8414 {0x54, 0, 0, 0, 0}, 8415 {0x55, 0, 0, 0, 0}, 8416 {0x56, 0x8, 0x8, 0, 0}, 8417 {0x57, 0x8, 0x8, 0, 0}, 8418 {0x58, 0x7, 0x7, 0, 0}, 8419 {0x59, 0x22, 0x22, 0, 0}, 8420 {0x5A, 0x22, 0x22, 0, 0}, 8421 {0x5B, 0x2, 0x2, 0, 0}, 8422 {0x5C, 0x23, 0x23, 0, 0}, 8423 {0x5D, 0x7, 0x7, 0, 0}, 8424 {0x5E, 0x55, 0x55, 0, 0}, 8425 {0x5F, 0x23, 0x23, 0, 0}, 8426 {0x60, 0x41, 0x41, 0, 0}, 8427 {0x61, 0x1, 0x1, 0, 0}, 8428 {0x62, 0xa, 0xa, 0, 0}, 8429 {0x63, 0, 0, 0, 0}, 8430 {0x64, 0, 0, 0, 0}, 8431 {0x65, 0, 0, 0, 0}, 8432 {0x66, 0, 0, 0, 0}, 8433 {0x67, 0, 0, 0, 0}, 8434 {0x68, 0, 0, 0, 0}, 8435 {0x69, 0, 0, 0, 0}, 8436 {0x6A, 0, 0, 0, 0}, 8437 {0x6B, 0xc, 0xc, 0, 0}, 8438 {0x6C, 0, 0, 0, 0}, 8439 {0x6D, 0, 0, 0, 0}, 8440 {0x6E, 0, 0, 0, 0}, 8441 {0x6F, 0, 0, 0, 0}, 8442 {0x70, 0, 0, 0, 0}, 8443 {0x71, 0, 0, 0, 0}, 8444 {0x72, 0x22, 0x22, 0, 0}, 8445 {0x73, 0x22, 0x22, 0, 0}, 8446 {0x74, 0x2, 0x2, 0, 0}, 8447 {0x75, 0xa, 0xa, 0, 0}, 8448 {0x76, 0x1, 0x1, 0, 0}, 8449 {0x77, 0x22, 0x22, 0, 0}, 8450 {0x78, 0x30, 0x30, 0, 0}, 8451 {0x79, 0, 0, 0, 0}, 8452 {0x7A, 0, 0, 0, 0}, 8453 {0x7B, 0, 0, 0, 0}, 8454 {0x7C, 0, 0, 0, 0}, 8455 {0x7D, 0, 0, 0, 0}, 8456 {0x7E, 0, 0, 0, 0}, 8457 {0x7F, 0, 0, 0, 0}, 8458 {0x80, 0, 0, 0, 0}, 8459 {0x81, 0, 0, 0, 0}, 8460 {0x82, 0, 0, 0, 0}, 8461 {0x83, 0, 0, 0, 0}, 8462 {0x84, 0, 0, 0, 0}, 8463 {0x85, 0, 0, 0, 0}, 8464 {0x86, 0, 0, 0, 0}, 8465 {0x87, 0, 0, 0, 0}, 8466 {0x88, 0, 0, 0, 0}, 8467 {0x89, 0, 0, 0, 0}, 8468 {0x8A, 0, 0, 0, 0}, 8469 {0x8B, 0, 0, 0, 0}, 8470 {0x8C, 0, 0, 0, 0}, 8471 {0x8D, 0, 0, 0, 0}, 8472 {0x8E, 0, 0, 0, 0}, 8473 {0x8F, 0, 0, 0, 0}, 8474 {0x90, 0, 0, 0, 0}, 8475 {0x91, 0, 0, 0, 0}, 8476 {0x92, 0, 0, 0, 0}, 8477 {0x93, 0, 0, 0, 0}, 8478 {0x94, 0, 0, 0, 0}, 8479 {0xFFFF, 0, 0, 0, 0} 8480 }; 8481 8482 static struct radio_regs regs_SYN_2056_A1[] = { 8483 {0x02, 0, 0, 0, 0}, 8484 {0x03, 0, 0, 0, 0}, 8485 {0x04, 0, 0, 0, 0}, 8486 {0x05, 0, 0, 0, 0}, 8487 {0x06, 0, 0, 0, 0}, 8488 {0x07, 0, 0, 0, 0}, 8489 {0x08, 0, 0, 0, 0}, 8490 {0x09, 0x1, 0x1, 0, 0}, 8491 {0x0A, 0, 0, 0, 0}, 8492 {0x0B, 0, 0, 0, 0}, 8493 {0x0C, 0, 0, 0, 0}, 8494 {0x0D, 0, 0, 0, 0}, 8495 {0x0E, 0, 0, 0, 0}, 8496 {0x0F, 0, 0, 0, 0}, 8497 {0x10, 0, 0, 0, 0}, 8498 {0x11, 0, 0, 0, 0}, 8499 {0x12, 0, 0, 0, 0}, 8500 {0x13, 0, 0, 0, 0}, 8501 {0x14, 0, 0, 0, 0}, 8502 {0x15, 0, 0, 0, 0}, 8503 {0x16, 0, 0, 0, 0}, 8504 {0x17, 0, 0, 0, 0}, 8505 {0x18, 0, 0, 0, 0}, 8506 {0x19, 0, 0, 0, 0}, 8507 {0x1A, 0, 0, 0, 0}, 8508 {0x1B, 0, 0, 0, 0}, 8509 {0x1C, 0, 0, 0, 0}, 8510 {0x1D, 0, 0, 0, 0}, 8511 {0x1E, 0, 0, 0, 0}, 8512 {0x1F, 0, 0, 0, 0}, 8513 {0x20, 0, 0, 0, 0}, 8514 {0x21, 0, 0, 0, 0}, 8515 {0x22, 0x60, 0x60, 0, 0}, 8516 {0x23, 0x6, 0x6, 0, 0}, 8517 {0x24, 0xc, 0xc, 0, 0}, 8518 {0x25, 0, 0, 0, 0}, 8519 {0x26, 0, 0, 0, 0}, 8520 {0x27, 0, 0, 0, 0}, 8521 {0x28, 0x1, 0x1, 0, 0}, 8522 {0x29, 0, 0, 0, 0}, 8523 {0x2A, 0, 0, 0, 0}, 8524 {0x2B, 0, 0, 0, 0}, 8525 {0x2C, 0, 0, 0, 0}, 8526 {0x2D, 0, 0, 0, 0}, 8527 {0x2E, 0xd, 0xd, 0, 0}, 8528 {0x2F, 0x1f, 0x1f, 0, 0}, 8529 {0x30, 0x15, 0x15, 0, 0}, 8530 {0x31, 0xf, 0xf, 0, 0}, 8531 {0x32, 0, 0, 0, 0}, 8532 {0x33, 0, 0, 0, 0}, 8533 {0x34, 0, 0, 0, 0}, 8534 {0x35, 0, 0, 0, 0}, 8535 {0x36, 0, 0, 0, 0}, 8536 {0x37, 0, 0, 0, 0}, 8537 {0x38, 0, 0, 0, 0}, 8538 {0x39, 0, 0, 0, 0}, 8539 {0x3A, 0, 0, 0, 0}, 8540 {0x3B, 0, 0, 0, 0}, 8541 {0x3C, 0x13, 0x13, 0, 0}, 8542 {0x3D, 0xf, 0xf, 0, 0}, 8543 {0x3E, 0x18, 0x18, 0, 0}, 8544 {0x3F, 0, 0, 0, 0}, 8545 {0x40, 0, 0, 0, 0}, 8546 {0x41, 0x20, 0x20, 0, 0}, 8547 {0x42, 0x20, 0x20, 0, 0}, 8548 {0x43, 0, 0, 0, 0}, 8549 {0x44, 0x77, 0x77, 0, 0}, 8550 {0x45, 0x7, 0x7, 0, 0}, 8551 {0x46, 0x1, 0x1, 0, 0}, 8552 {0x47, 0x4, 0x4, 0, 0}, 8553 {0x48, 0xf, 0xf, 0, 0}, 8554 {0x49, 0x30, 0x30, 0, 0}, 8555 {0x4A, 0x32, 0x32, 0, 0}, 8556 {0x4B, 0xd, 0xd, 0, 0}, 8557 {0x4C, 0xd, 0xd, 0, 0}, 8558 {0x4D, 0x4, 0x4, 0, 0}, 8559 {0x4E, 0x6, 0x6, 0, 0}, 8560 {0x4F, 0x1, 0x1, 0, 0}, 8561 {0x50, 0x1c, 0x1c, 0, 0}, 8562 {0x51, 0x2, 0x2, 0, 0}, 8563 {0x52, 0x2, 0x2, 0, 0}, 8564 {0x53, 0xf7, 0xf7, 1, 1}, 8565 {0x54, 0xb4, 0xb4, 0, 0}, 8566 {0x55, 0xd2, 0xd2, 0, 0}, 8567 {0x56, 0, 0, 0, 0}, 8568 {0x57, 0, 0, 0, 0}, 8569 {0x58, 0x4, 0x4, 0, 0}, 8570 {0x59, 0x96, 0x96, 0, 0}, 8571 {0x5A, 0x3e, 0x3e, 0, 0}, 8572 {0x5B, 0x3e, 0x3e, 0, 0}, 8573 {0x5C, 0x13, 0x13, 0, 0}, 8574 {0x5D, 0x2, 0x2, 0, 0}, 8575 {0x5E, 0, 0, 0, 0}, 8576 {0x5F, 0x7, 0x7, 0, 0}, 8577 {0x60, 0x7, 0x7, 1, 1}, 8578 {0x61, 0x8, 0x8, 0, 0}, 8579 {0x62, 0x3, 0x3, 0, 0}, 8580 {0x63, 0, 0, 0, 0}, 8581 {0x64, 0, 0, 0, 0}, 8582 {0x65, 0, 0, 0, 0}, 8583 {0x66, 0, 0, 0, 0}, 8584 {0x67, 0, 0, 0, 0}, 8585 {0x68, 0x40, 0x40, 0, 0}, 8586 {0x69, 0, 0, 0, 0}, 8587 {0x6A, 0, 0, 0, 0}, 8588 {0x6B, 0, 0, 0, 0}, 8589 {0x6C, 0, 0, 0, 0}, 8590 {0x6D, 0x1, 0x1, 0, 0}, 8591 {0x6E, 0, 0, 0, 0}, 8592 {0x6F, 0, 0, 0, 0}, 8593 {0x70, 0x60, 0x60, 0, 0}, 8594 {0x71, 0x66, 0x66, 0, 0}, 8595 {0x72, 0xc, 0xc, 0, 0}, 8596 {0x73, 0x66, 0x66, 0, 0}, 8597 {0x74, 0x8f, 0x8f, 1, 1}, 8598 {0x75, 0, 0, 0, 0}, 8599 {0x76, 0xcc, 0xcc, 0, 0}, 8600 {0x77, 0x1, 0x1, 0, 0}, 8601 {0x78, 0x66, 0x66, 0, 0}, 8602 {0x79, 0x66, 0x66, 0, 0}, 8603 {0x7A, 0, 0, 0, 0}, 8604 {0x7B, 0, 0, 0, 0}, 8605 {0x7C, 0, 0, 0, 0}, 8606 {0x7D, 0, 0, 0, 0}, 8607 {0x7E, 0, 0, 0, 0}, 8608 {0x7F, 0, 0, 0, 0}, 8609 {0x80, 0, 0, 0, 0}, 8610 {0x81, 0, 0, 0, 0}, 8611 {0x82, 0, 0, 0, 0}, 8612 {0x83, 0, 0, 0, 0}, 8613 {0x84, 0, 0, 0, 0}, 8614 {0x85, 0xff, 0xff, 0, 0}, 8615 {0x86, 0, 0, 0, 0}, 8616 {0x87, 0, 0, 0, 0}, 8617 {0x88, 0, 0, 0, 0}, 8618 {0x89, 0, 0, 0, 0}, 8619 {0x8A, 0, 0, 0, 0}, 8620 {0x8B, 0, 0, 0, 0}, 8621 {0x8C, 0, 0, 0, 0}, 8622 {0x8D, 0, 0, 0, 0}, 8623 {0x8E, 0, 0, 0, 0}, 8624 {0x8F, 0, 0, 0, 0}, 8625 {0x90, 0, 0, 0, 0}, 8626 {0x91, 0, 0, 0, 0}, 8627 {0x92, 0, 0, 0, 0}, 8628 {0x93, 0, 0, 0, 0}, 8629 {0x94, 0, 0, 0, 0}, 8630 {0x95, 0, 0, 0, 0}, 8631 {0x96, 0, 0, 0, 0}, 8632 {0x97, 0, 0, 0, 0}, 8633 {0x98, 0, 0, 0, 0}, 8634 {0x99, 0, 0, 0, 0}, 8635 {0x9A, 0, 0, 0, 0}, 8636 {0x9B, 0, 0, 0, 0}, 8637 {0x9C, 0, 0, 0, 0}, 8638 {0x9D, 0, 0, 0, 0}, 8639 {0x9E, 0, 0, 0, 0}, 8640 {0x9F, 0x6, 0x6, 0, 0}, 8641 {0xA0, 0x66, 0x66, 0, 0}, 8642 {0xA1, 0x66, 0x66, 0, 0}, 8643 {0xA2, 0x66, 0x66, 0, 0}, 8644 {0xA3, 0x66, 0x66, 0, 0}, 8645 {0xA4, 0x66, 0x66, 0, 0}, 8646 {0xA5, 0x66, 0x66, 0, 0}, 8647 {0xA6, 0x66, 0x66, 0, 0}, 8648 {0xA7, 0x66, 0x66, 0, 0}, 8649 {0xA8, 0x66, 0x66, 0, 0}, 8650 {0xA9, 0x66, 0x66, 0, 0}, 8651 {0xAA, 0x66, 0x66, 0, 0}, 8652 {0xAB, 0x66, 0x66, 0, 0}, 8653 {0xAC, 0x66, 0x66, 0, 0}, 8654 {0xAD, 0x66, 0x66, 0, 0}, 8655 {0xAE, 0x66, 0x66, 0, 0}, 8656 {0xAF, 0x66, 0x66, 0, 0}, 8657 {0xB0, 0x66, 0x66, 0, 0}, 8658 {0xB1, 0x66, 0x66, 0, 0}, 8659 {0xB2, 0x66, 0x66, 0, 0}, 8660 {0xB3, 0xa, 0xa, 0, 0}, 8661 {0xB4, 0, 0, 0, 0}, 8662 {0xB5, 0, 0, 0, 0}, 8663 {0xB6, 0, 0, 0, 0}, 8664 {0xFFFF, 0, 0, 0, 0} 8665 }; 8666 8667 static struct radio_regs regs_TX_2056_A1[] = { 8668 {0x02, 0, 0, 0, 0}, 8669 {0x03, 0, 0, 0, 0}, 8670 {0x04, 0, 0, 0, 0}, 8671 {0x05, 0, 0, 0, 0}, 8672 {0x06, 0, 0, 0, 0}, 8673 {0x07, 0, 0, 0, 0}, 8674 {0x08, 0, 0, 0, 0}, 8675 {0x09, 0, 0, 0, 0}, 8676 {0x0A, 0, 0, 0, 0}, 8677 {0x0B, 0, 0, 0, 0}, 8678 {0x0C, 0, 0, 0, 0}, 8679 {0x0D, 0, 0, 0, 0}, 8680 {0x0E, 0, 0, 0, 0}, 8681 {0x0F, 0, 0, 0, 0}, 8682 {0x10, 0, 0, 0, 0}, 8683 {0x11, 0, 0, 0, 0}, 8684 {0x12, 0, 0, 0, 0}, 8685 {0x13, 0, 0, 0, 0}, 8686 {0x14, 0, 0, 0, 0}, 8687 {0x15, 0, 0, 0, 0}, 8688 {0x16, 0, 0, 0, 0}, 8689 {0x17, 0, 0, 0, 0}, 8690 {0x18, 0, 0, 0, 0}, 8691 {0x19, 0, 0, 0, 0}, 8692 {0x1A, 0, 0, 0, 0}, 8693 {0x1B, 0, 0, 0, 0}, 8694 {0x1C, 0, 0, 0, 0}, 8695 {0x1D, 0, 0, 0, 0}, 8696 {0x1E, 0, 0, 0, 0}, 8697 {0x1F, 0, 0, 0, 0}, 8698 {0x20, 0, 0, 0, 0}, 8699 {0x21, 0x88, 0x88, 0, 0}, 8700 {0x22, 0x88, 0x88, 0, 0}, 8701 {0x23, 0x88, 0x88, 0, 0}, 8702 {0x24, 0x88, 0x88, 0, 0}, 8703 {0x25, 0xc, 0xc, 0, 0}, 8704 {0x26, 0, 0, 0, 0}, 8705 {0x27, 0x3, 0x3, 0, 0}, 8706 {0x28, 0, 0, 0, 0}, 8707 {0x29, 0x3, 0x3, 0, 0}, 8708 {0x2A, 0x37, 0x37, 0, 0}, 8709 {0x2B, 0x3, 0x3, 0, 0}, 8710 {0x2C, 0, 0, 0, 0}, 8711 {0x2D, 0, 0, 0, 0}, 8712 {0x2E, 0x1, 0x1, 0, 0}, 8713 {0x2F, 0x1, 0x1, 0, 0}, 8714 {0x30, 0, 0, 0, 0}, 8715 {0x31, 0, 0, 0, 0}, 8716 {0x32, 0, 0, 0, 0}, 8717 {0x33, 0x11, 0x11, 0, 0}, 8718 {0x34, 0x11, 0x11, 0, 0}, 8719 {0x35, 0, 0, 0, 0}, 8720 {0x36, 0, 0, 0, 0}, 8721 {0x37, 0x3, 0x3, 0, 0}, 8722 {0x38, 0xf, 0xf, 0, 0}, 8723 {0x39, 0, 0, 0, 0}, 8724 {0x3A, 0x2d, 0x2d, 0, 0}, 8725 {0x3B, 0, 0, 0, 0}, 8726 {0x3C, 0x6e, 0x6e, 0, 0}, 8727 {0x3D, 0xf0, 0xf0, 1, 1}, 8728 {0x3E, 0, 0, 0, 0}, 8729 {0x3F, 0, 0, 0, 0}, 8730 {0x40, 0, 0, 0, 0}, 8731 {0x41, 0x3, 0x3, 0, 0}, 8732 {0x42, 0x3, 0x3, 0, 0}, 8733 {0x43, 0, 0, 0, 0}, 8734 {0x44, 0x1e, 0x1e, 0, 0}, 8735 {0x45, 0, 0, 0, 0}, 8736 {0x46, 0x6e, 0x6e, 0, 0}, 8737 {0x47, 0xf0, 0xf0, 1, 1}, 8738 {0x48, 0, 0, 0, 0}, 8739 {0x49, 0x2, 0x2, 0, 0}, 8740 {0x4A, 0xff, 0xff, 1, 1}, 8741 {0x4B, 0xc, 0xc, 0, 0}, 8742 {0x4C, 0, 0, 0, 0}, 8743 {0x4D, 0x38, 0x38, 0, 0}, 8744 {0x4E, 0x70, 0x70, 1, 1}, 8745 {0x4F, 0x2, 0x2, 0, 0}, 8746 {0x50, 0x88, 0x88, 0, 0}, 8747 {0x51, 0xc, 0xc, 0, 0}, 8748 {0x52, 0, 0, 0, 0}, 8749 {0x53, 0x8, 0x8, 0, 0}, 8750 {0x54, 0x70, 0x70, 1, 1}, 8751 {0x55, 0x2, 0x2, 0, 0}, 8752 {0x56, 0xff, 0xff, 1, 1}, 8753 {0x57, 0, 0, 0, 0}, 8754 {0x58, 0x83, 0x83, 0, 0}, 8755 {0x59, 0x77, 0x77, 1, 1}, 8756 {0x5A, 0, 0, 0, 0}, 8757 {0x5B, 0x2, 0x2, 0, 0}, 8758 {0x5C, 0x88, 0x88, 0, 0}, 8759 {0x5D, 0, 0, 0, 0}, 8760 {0x5E, 0x8, 0x8, 0, 0}, 8761 {0x5F, 0x77, 0x77, 1, 1}, 8762 {0x60, 0x1, 0x1, 0, 0}, 8763 {0x61, 0, 0, 0, 0}, 8764 {0x62, 0x7, 0x7, 0, 0}, 8765 {0x63, 0, 0, 0, 0}, 8766 {0x64, 0x7, 0x7, 0, 0}, 8767 {0x65, 0, 0, 0, 0}, 8768 {0x66, 0, 0, 0, 0}, 8769 {0x67, 0x72, 0x72, 1, 1}, 8770 {0x68, 0, 0, 0, 0}, 8771 {0x69, 0xa, 0xa, 0, 0}, 8772 {0x6A, 0, 0, 0, 0}, 8773 {0x6B, 0, 0, 0, 0}, 8774 {0x6C, 0, 0, 0, 0}, 8775 {0x6D, 0, 0, 0, 0}, 8776 {0x6E, 0, 0, 0, 0}, 8777 {0x6F, 0, 0, 0, 0}, 8778 {0x70, 0, 0, 0, 0}, 8779 {0x71, 0x2, 0x2, 0, 0}, 8780 {0x72, 0, 0, 0, 0}, 8781 {0x73, 0, 0, 0, 0}, 8782 {0x74, 0xe, 0xe, 0, 0}, 8783 {0x75, 0xe, 0xe, 0, 0}, 8784 {0x76, 0xe, 0xe, 0, 0}, 8785 {0x77, 0x13, 0x13, 0, 0}, 8786 {0x78, 0x13, 0x13, 0, 0}, 8787 {0x79, 0x1b, 0x1b, 0, 0}, 8788 {0x7A, 0x1b, 0x1b, 0, 0}, 8789 {0x7B, 0x55, 0x55, 0, 0}, 8790 {0x7C, 0x5b, 0x5b, 0, 0}, 8791 {0x7D, 0, 0, 0, 0}, 8792 {0x7E, 0, 0, 0, 0}, 8793 {0x7F, 0, 0, 0, 0}, 8794 {0x80, 0, 0, 0, 0}, 8795 {0x81, 0, 0, 0, 0}, 8796 {0x82, 0, 0, 0, 0}, 8797 {0x83, 0, 0, 0, 0}, 8798 {0x84, 0, 0, 0, 0}, 8799 {0x85, 0, 0, 0, 0}, 8800 {0x86, 0, 0, 0, 0}, 8801 {0x87, 0, 0, 0, 0}, 8802 {0x88, 0, 0, 0, 0}, 8803 {0x89, 0, 0, 0, 0}, 8804 {0x8A, 0, 0, 0, 0}, 8805 {0x8B, 0, 0, 0, 0}, 8806 {0x8C, 0, 0, 0, 0}, 8807 {0x8D, 0, 0, 0, 0}, 8808 {0x8E, 0, 0, 0, 0}, 8809 {0x8F, 0, 0, 0, 0}, 8810 {0x90, 0, 0, 0, 0}, 8811 {0x91, 0, 0, 0, 0}, 8812 {0x92, 0, 0, 0, 0}, 8813 {0xFFFF, 0, 0, 0, 0} 8814 }; 8815 8816 static struct radio_regs regs_RX_2056_A1[] = { 8817 {0x02, 0, 0, 0, 0}, 8818 {0x03, 0, 0, 0, 0}, 8819 {0x04, 0, 0, 0, 0}, 8820 {0x05, 0, 0, 0, 0}, 8821 {0x06, 0, 0, 0, 0}, 8822 {0x07, 0, 0, 0, 0}, 8823 {0x08, 0, 0, 0, 0}, 8824 {0x09, 0, 0, 0, 0}, 8825 {0x0A, 0, 0, 0, 0}, 8826 {0x0B, 0, 0, 0, 0}, 8827 {0x0C, 0, 0, 0, 0}, 8828 {0x0D, 0, 0, 0, 0}, 8829 {0x0E, 0, 0, 0, 0}, 8830 {0x0F, 0, 0, 0, 0}, 8831 {0x10, 0, 0, 0, 0}, 8832 {0x11, 0, 0, 0, 0}, 8833 {0x12, 0, 0, 0, 0}, 8834 {0x13, 0, 0, 0, 0}, 8835 {0x14, 0, 0, 0, 0}, 8836 {0x15, 0, 0, 0, 0}, 8837 {0x16, 0, 0, 0, 0}, 8838 {0x17, 0, 0, 0, 0}, 8839 {0x18, 0, 0, 0, 0}, 8840 {0x19, 0, 0, 0, 0}, 8841 {0x1A, 0, 0, 0, 0}, 8842 {0x1B, 0, 0, 0, 0}, 8843 {0x1C, 0, 0, 0, 0}, 8844 {0x1D, 0, 0, 0, 0}, 8845 {0x1E, 0, 0, 0, 0}, 8846 {0x1F, 0, 0, 0, 0}, 8847 {0x20, 0x3, 0x3, 0, 0}, 8848 {0x21, 0, 0, 0, 0}, 8849 {0x22, 0, 0, 0, 0}, 8850 {0x23, 0x90, 0x90, 0, 0}, 8851 {0x24, 0x55, 0x55, 0, 0}, 8852 {0x25, 0x15, 0x15, 0, 0}, 8853 {0x26, 0x5, 0x5, 0, 0}, 8854 {0x27, 0x15, 0x15, 0, 0}, 8855 {0x28, 0x5, 0x5, 0, 0}, 8856 {0x29, 0x20, 0x20, 0, 0}, 8857 {0x2A, 0x11, 0x11, 0, 0}, 8858 {0x2B, 0x90, 0x90, 0, 0}, 8859 {0x2C, 0, 0, 0, 0}, 8860 {0x2D, 0x88, 0x88, 0, 0}, 8861 {0x2E, 0x32, 0x32, 0, 0}, 8862 {0x2F, 0x77, 0x77, 0, 0}, 8863 {0x30, 0x17, 0x17, 1, 1}, 8864 {0x31, 0xff, 0xff, 1, 1}, 8865 {0x32, 0x20, 0x20, 0, 0}, 8866 {0x33, 0, 0, 0, 0}, 8867 {0x34, 0x88, 0x88, 0, 0}, 8868 {0x35, 0x32, 0x32, 0, 0}, 8869 {0x36, 0x77, 0x77, 0, 0}, 8870 {0x37, 0x17, 0x17, 1, 1}, 8871 {0x38, 0xf0, 0xf0, 1, 1}, 8872 {0x39, 0x20, 0x20, 0, 0}, 8873 {0x3A, 0x8, 0x8, 0, 0}, 8874 {0x3B, 0x55, 0x55, 1, 1}, 8875 {0x3C, 0, 0, 0, 0}, 8876 {0x3D, 0x44, 0x44, 1, 1}, 8877 {0x3E, 0, 0, 0, 0}, 8878 {0x3F, 0x44, 0x44, 0, 0}, 8879 {0x40, 0xf, 0xf, 1, 1}, 8880 {0x41, 0x6, 0x6, 0, 0}, 8881 {0x42, 0x4, 0x4, 0, 0}, 8882 {0x43, 0x50, 0x50, 1, 1}, 8883 {0x44, 0x8, 0x8, 0, 0}, 8884 {0x45, 0x55, 0x55, 1, 1}, 8885 {0x46, 0, 0, 0, 0}, 8886 {0x47, 0x11, 0x11, 0, 0}, 8887 {0x48, 0, 0, 0, 0}, 8888 {0x49, 0x44, 0x44, 0, 0}, 8889 {0x4A, 0x7, 0x7, 0, 0}, 8890 {0x4B, 0x6, 0x6, 0, 0}, 8891 {0x4C, 0x4, 0x4, 0, 0}, 8892 {0x4D, 0, 0, 0, 0}, 8893 {0x4E, 0, 0, 0, 0}, 8894 {0x4F, 0x26, 0x26, 1, 1}, 8895 {0x50, 0x26, 0x26, 1, 1}, 8896 {0x51, 0xf, 0xf, 1, 1}, 8897 {0x52, 0xf, 0xf, 1, 1}, 8898 {0x53, 0x44, 0x44, 0, 0}, 8899 {0x54, 0, 0, 0, 0}, 8900 {0x55, 0, 0, 0, 0}, 8901 {0x56, 0x8, 0x8, 0, 0}, 8902 {0x57, 0x8, 0x8, 0, 0}, 8903 {0x58, 0x7, 0x7, 0, 0}, 8904 {0x59, 0x22, 0x22, 0, 0}, 8905 {0x5A, 0x22, 0x22, 0, 0}, 8906 {0x5B, 0x2, 0x2, 0, 0}, 8907 {0x5C, 0x2f, 0x2f, 1, 1}, 8908 {0x5D, 0x7, 0x7, 0, 0}, 8909 {0x5E, 0x55, 0x55, 0, 0}, 8910 {0x5F, 0x23, 0x23, 0, 0}, 8911 {0x60, 0x41, 0x41, 0, 0}, 8912 {0x61, 0x1, 0x1, 0, 0}, 8913 {0x62, 0xa, 0xa, 0, 0}, 8914 {0x63, 0, 0, 0, 0}, 8915 {0x64, 0, 0, 0, 0}, 8916 {0x65, 0, 0, 0, 0}, 8917 {0x66, 0, 0, 0, 0}, 8918 {0x67, 0, 0, 0, 0}, 8919 {0x68, 0, 0, 0, 0}, 8920 {0x69, 0, 0, 0, 0}, 8921 {0x6A, 0, 0, 0, 0}, 8922 {0x6B, 0xc, 0xc, 0, 0}, 8923 {0x6C, 0, 0, 0, 0}, 8924 {0x6D, 0, 0, 0, 0}, 8925 {0x6E, 0, 0, 0, 0}, 8926 {0x6F, 0, 0, 0, 0}, 8927 {0x70, 0, 0, 0, 0}, 8928 {0x71, 0, 0, 0, 0}, 8929 {0x72, 0x22, 0x22, 0, 0}, 8930 {0x73, 0x22, 0x22, 0, 0}, 8931 {0x74, 0, 0, 1, 1}, 8932 {0x75, 0xa, 0xa, 0, 0}, 8933 {0x76, 0x1, 0x1, 0, 0}, 8934 {0x77, 0x22, 0x22, 0, 0}, 8935 {0x78, 0x30, 0x30, 0, 0}, 8936 {0x79, 0, 0, 0, 0}, 8937 {0x7A, 0, 0, 0, 0}, 8938 {0x7B, 0, 0, 0, 0}, 8939 {0x7C, 0, 0, 0, 0}, 8940 {0x7D, 0, 0, 0, 0}, 8941 {0x7E, 0, 0, 0, 0}, 8942 {0x7F, 0, 0, 0, 0}, 8943 {0x80, 0, 0, 0, 0}, 8944 {0x81, 0, 0, 0, 0}, 8945 {0x82, 0, 0, 0, 0}, 8946 {0x83, 0, 0, 0, 0}, 8947 {0x84, 0, 0, 0, 0}, 8948 {0x85, 0, 0, 0, 0}, 8949 {0x86, 0, 0, 0, 0}, 8950 {0x87, 0, 0, 0, 0}, 8951 {0x88, 0, 0, 0, 0}, 8952 {0x89, 0, 0, 0, 0}, 8953 {0x8A, 0, 0, 0, 0}, 8954 {0x8B, 0, 0, 0, 0}, 8955 {0x8C, 0, 0, 0, 0}, 8956 {0x8D, 0, 0, 0, 0}, 8957 {0x8E, 0, 0, 0, 0}, 8958 {0x8F, 0, 0, 0, 0}, 8959 {0x90, 0, 0, 0, 0}, 8960 {0x91, 0, 0, 0, 0}, 8961 {0x92, 0, 0, 0, 0}, 8962 {0x93, 0, 0, 0, 0}, 8963 {0x94, 0, 0, 0, 0}, 8964 {0xFFFF, 0, 0, 0, 0} 8965 }; 8966 8967 static struct radio_regs regs_SYN_2056_rev5[] = { 8968 {0x02, 0, 0, 0, 0}, 8969 {0x03, 0, 0, 0, 0}, 8970 {0x04, 0, 0, 0, 0}, 8971 {0x05, 0, 0, 0, 0}, 8972 {0x06, 0, 0, 0, 0}, 8973 {0x07, 0, 0, 0, 0}, 8974 {0x08, 0, 0, 0, 0}, 8975 {0x09, 0x1, 0x1, 0, 0}, 8976 {0x0A, 0, 0, 0, 0}, 8977 {0x0B, 0, 0, 0, 0}, 8978 {0x0C, 0, 0, 0, 0}, 8979 {0x0D, 0, 0, 0, 0}, 8980 {0x0E, 0, 0, 0, 0}, 8981 {0x0F, 0, 0, 0, 0}, 8982 {0x10, 0, 0, 0, 0}, 8983 {0x11, 0, 0, 0, 0}, 8984 {0x12, 0, 0, 0, 0}, 8985 {0x13, 0, 0, 0, 0}, 8986 {0x14, 0, 0, 0, 0}, 8987 {0x15, 0, 0, 0, 0}, 8988 {0x16, 0, 0, 0, 0}, 8989 {0x17, 0, 0, 0, 0}, 8990 {0x18, 0, 0, 0, 0}, 8991 {0x19, 0, 0, 0, 0}, 8992 {0x1A, 0, 0, 0, 0}, 8993 {0x1B, 0, 0, 0, 0}, 8994 {0x1C, 0, 0, 0, 0}, 8995 {0x1D, 0, 0, 0, 0}, 8996 {0x1E, 0, 0, 0, 0}, 8997 {0x1F, 0, 0, 0, 0}, 8998 {0x20, 0, 0, 0, 0}, 8999 {0x21, 0, 0, 0, 0}, 9000 {0x22, 0x60, 0x60, 0, 0}, 9001 {0x23, 0x6, 0x6, 0, 0}, 9002 {0x24, 0xc, 0xc, 0, 0}, 9003 {0x25, 0, 0, 0, 0}, 9004 {0x26, 0, 0, 0, 0}, 9005 {0x27, 0, 0, 0, 0}, 9006 {0x28, 0x1, 0x1, 0, 0}, 9007 {0x29, 0, 0, 0, 0}, 9008 {0x2A, 0, 0, 0, 0}, 9009 {0x2B, 0, 0, 0, 0}, 9010 {0x2C, 0, 0, 0, 0}, 9011 {0x2D, 0, 0, 0, 0}, 9012 {0x2E, 0, 0, 0, 0}, 9013 {0x2F, 0x1f, 0x1f, 0, 0}, 9014 {0x30, 0x15, 0x15, 0, 0}, 9015 {0x31, 0xf, 0xf, 0, 0}, 9016 {0x32, 0, 0, 0, 0}, 9017 {0x33, 0, 0, 0, 0}, 9018 {0x34, 0, 0, 0, 0}, 9019 {0x35, 0, 0, 0, 0}, 9020 {0x36, 0, 0, 0, 0}, 9021 {0x37, 0, 0, 0, 0}, 9022 {0x38, 0, 0, 0, 0}, 9023 {0x39, 0, 0, 0, 0}, 9024 {0x3A, 0, 0, 0, 0}, 9025 {0x3B, 0, 0, 0, 0}, 9026 {0x3C, 0x13, 0x13, 0, 0}, 9027 {0x3D, 0xf, 0xf, 0, 0}, 9028 {0x3E, 0x18, 0x18, 0, 0}, 9029 {0x3F, 0, 0, 0, 0}, 9030 {0x40, 0, 0, 0, 0}, 9031 {0x41, 0x20, 0x20, 0, 0}, 9032 {0x42, 0x20, 0x20, 0, 0}, 9033 {0x43, 0, 0, 0, 0}, 9034 {0x44, 0x77, 0x77, 0, 0}, 9035 {0x45, 0x7, 0x7, 0, 0}, 9036 {0x46, 0x1, 0x1, 0, 0}, 9037 {0x47, 0x4, 0x4, 0, 0}, 9038 {0x48, 0xf, 0xf, 0, 0}, 9039 {0x49, 0x30, 0x30, 0, 0}, 9040 {0x4A, 0x32, 0x32, 0, 0}, 9041 {0x4B, 0xd, 0xd, 0, 0}, 9042 {0x4C, 0xd, 0xd, 0, 0}, 9043 {0x4D, 0x4, 0x4, 0, 0}, 9044 {0x4E, 0x6, 0x6, 0, 0}, 9045 {0x4F, 0x1, 0x1, 0, 0}, 9046 {0x50, 0x1c, 0x1c, 0, 0}, 9047 {0x51, 0x2, 0x2, 0, 0}, 9048 {0x52, 0x2, 0x2, 0, 0}, 9049 {0x53, 0xf7, 0xf7, 1, 1}, 9050 {0x54, 0xb4, 0xb4, 0, 0}, 9051 {0x55, 0xd2, 0xd2, 0, 0}, 9052 {0x56, 0, 0, 0, 0}, 9053 {0x57, 0, 0, 0, 0}, 9054 {0x58, 0x4, 0x4, 0, 0}, 9055 {0x59, 0x96, 0x96, 0, 0}, 9056 {0x5A, 0x3e, 0x3e, 0, 0}, 9057 {0x5B, 0x3e, 0x3e, 0, 0}, 9058 {0x5C, 0x13, 0x13, 0, 0}, 9059 {0x5D, 0x2, 0x2, 0, 0}, 9060 {0x5E, 0, 0, 0, 0}, 9061 {0x5F, 0x7, 0x7, 0, 0}, 9062 {0x60, 0x7, 0x7, 1, 1}, 9063 {0x61, 0x8, 0x8, 0, 0}, 9064 {0x62, 0x3, 0x3, 0, 0}, 9065 {0x63, 0, 0, 0, 0}, 9066 {0x64, 0, 0, 0, 0}, 9067 {0x65, 0, 0, 0, 0}, 9068 {0x66, 0, 0, 0, 0}, 9069 {0x67, 0, 0, 0, 0}, 9070 {0x68, 0x40, 0x40, 0, 0}, 9071 {0x69, 0, 0, 0, 0}, 9072 {0x6A, 0, 0, 0, 0}, 9073 {0x6B, 0, 0, 0, 0}, 9074 {0x6C, 0, 0, 0, 0}, 9075 {0x6D, 0x1, 0x1, 0, 0}, 9076 {0x6E, 0, 0, 0, 0}, 9077 {0x6F, 0, 0, 0, 0}, 9078 {0x70, 0x60, 0x60, 0, 0}, 9079 {0x71, 0x66, 0x66, 0, 0}, 9080 {0x72, 0xc, 0xc, 0, 0}, 9081 {0x73, 0x66, 0x66, 0, 0}, 9082 {0x74, 0x8f, 0x8f, 1, 1}, 9083 {0x75, 0, 0, 0, 0}, 9084 {0x76, 0xcc, 0xcc, 0, 0}, 9085 {0x77, 0x1, 0x1, 0, 0}, 9086 {0x78, 0x66, 0x66, 0, 0}, 9087 {0x79, 0x66, 0x66, 0, 0}, 9088 {0x7A, 0, 0, 0, 0}, 9089 {0x7B, 0, 0, 0, 0}, 9090 {0x7C, 0, 0, 0, 0}, 9091 {0x7D, 0, 0, 0, 0}, 9092 {0x7E, 0, 0, 0, 0}, 9093 {0x7F, 0, 0, 0, 0}, 9094 {0x80, 0, 0, 0, 0}, 9095 {0x81, 0, 0, 0, 0}, 9096 {0x82, 0, 0, 0, 0}, 9097 {0x83, 0, 0, 0, 0}, 9098 {0x84, 0, 0, 0, 0}, 9099 {0x85, 0xff, 0xff, 0, 0}, 9100 {0x86, 0, 0, 0, 0}, 9101 {0x87, 0, 0, 0, 0}, 9102 {0x88, 0, 0, 0, 0}, 9103 {0x89, 0, 0, 0, 0}, 9104 {0x8A, 0, 0, 0, 0}, 9105 {0x8B, 0, 0, 0, 0}, 9106 {0x8C, 0, 0, 0, 0}, 9107 {0x8D, 0, 0, 0, 0}, 9108 {0x8E, 0, 0, 0, 0}, 9109 {0x8F, 0, 0, 0, 0}, 9110 {0x90, 0, 0, 0, 0}, 9111 {0x91, 0, 0, 0, 0}, 9112 {0x92, 0, 0, 0, 0}, 9113 {0x93, 0, 0, 0, 0}, 9114 {0x94, 0, 0, 0, 0}, 9115 {0x95, 0, 0, 0, 0}, 9116 {0x96, 0, 0, 0, 0}, 9117 {0x97, 0, 0, 0, 0}, 9118 {0x98, 0, 0, 0, 0}, 9119 {0x99, 0, 0, 0, 0}, 9120 {0x9A, 0, 0, 0, 0}, 9121 {0x9B, 0, 0, 0, 0}, 9122 {0x9C, 0, 0, 0, 0}, 9123 {0x9D, 0, 0, 0, 0}, 9124 {0x9E, 0, 0, 0, 0}, 9125 {0x9F, 0x6, 0x6, 0, 0}, 9126 {0xA0, 0x66, 0x66, 0, 0}, 9127 {0xA1, 0x66, 0x66, 0, 0}, 9128 {0xA2, 0x66, 0x66, 0, 0}, 9129 {0xA3, 0x66, 0x66, 0, 0}, 9130 {0xA4, 0x66, 0x66, 0, 0}, 9131 {0xA5, 0x66, 0x66, 0, 0}, 9132 {0xA6, 0x66, 0x66, 0, 0}, 9133 {0xA7, 0x66, 0x66, 0, 0}, 9134 {0xA8, 0x66, 0x66, 0, 0}, 9135 {0xA9, 0x66, 0x66, 0, 0}, 9136 {0xAA, 0x66, 0x66, 0, 0}, 9137 {0xAB, 0x66, 0x66, 0, 0}, 9138 {0xAC, 0x66, 0x66, 0, 0}, 9139 {0xAD, 0x66, 0x66, 0, 0}, 9140 {0xAE, 0x66, 0x66, 0, 0}, 9141 {0xAF, 0x66, 0x66, 0, 0}, 9142 {0xB0, 0x66, 0x66, 0, 0}, 9143 {0xB1, 0x66, 0x66, 0, 0}, 9144 {0xB2, 0x66, 0x66, 0, 0}, 9145 {0xB3, 0xa, 0xa, 0, 0}, 9146 {0xB4, 0, 0, 0, 0}, 9147 {0xB5, 0, 0, 0, 0}, 9148 {0xB6, 0, 0, 0, 0}, 9149 {0xFFFF, 0, 0, 0, 0} 9150 }; 9151 9152 static struct radio_regs regs_TX_2056_rev5[] = { 9153 {0x02, 0, 0, 0, 0}, 9154 {0x03, 0, 0, 0, 0}, 9155 {0x04, 0, 0, 0, 0}, 9156 {0x05, 0, 0, 0, 0}, 9157 {0x06, 0, 0, 0, 0}, 9158 {0x07, 0, 0, 0, 0}, 9159 {0x08, 0, 0, 0, 0}, 9160 {0x09, 0, 0, 0, 0}, 9161 {0x0A, 0, 0, 0, 0}, 9162 {0x0B, 0, 0, 0, 0}, 9163 {0x0C, 0, 0, 0, 0}, 9164 {0x0D, 0, 0, 0, 0}, 9165 {0x0E, 0, 0, 0, 0}, 9166 {0x0F, 0, 0, 0, 0}, 9167 {0x10, 0, 0, 0, 0}, 9168 {0x11, 0, 0, 0, 0}, 9169 {0x12, 0, 0, 0, 0}, 9170 {0x13, 0, 0, 0, 0}, 9171 {0x14, 0, 0, 0, 0}, 9172 {0x15, 0, 0, 0, 0}, 9173 {0x16, 0, 0, 0, 0}, 9174 {0x17, 0, 0, 0, 0}, 9175 {0x18, 0, 0, 0, 0}, 9176 {0x19, 0, 0, 0, 0}, 9177 {0x1A, 0, 0, 0, 0}, 9178 {0x1B, 0, 0, 0, 0}, 9179 {0x1C, 0, 0, 0, 0}, 9180 {0x1D, 0, 0, 0, 0}, 9181 {0x1E, 0, 0, 0, 0}, 9182 {0x1F, 0, 0, 0, 0}, 9183 {0x20, 0, 0, 0, 0}, 9184 {0x21, 0x88, 0x88, 0, 0}, 9185 {0x22, 0x88, 0x88, 0, 0}, 9186 {0x23, 0x88, 0x88, 0, 0}, 9187 {0x24, 0x88, 0x88, 0, 0}, 9188 {0x25, 0xc, 0xc, 0, 0}, 9189 {0x26, 0, 0, 0, 0}, 9190 {0x27, 0x3, 0x3, 0, 0}, 9191 {0x28, 0, 0, 0, 0}, 9192 {0x29, 0x3, 0x3, 0, 0}, 9193 {0x2A, 0x37, 0x37, 0, 0}, 9194 {0x2B, 0x3, 0x3, 0, 0}, 9195 {0x2C, 0, 0, 0, 0}, 9196 {0x2D, 0, 0, 0, 0}, 9197 {0x2E, 0x1, 0x1, 0, 0}, 9198 {0x2F, 0x1, 0x1, 0, 0}, 9199 {0x30, 0, 0, 0, 0}, 9200 {0x31, 0, 0, 0, 0}, 9201 {0x32, 0, 0, 0, 0}, 9202 {0x33, 0x11, 0x11, 0, 0}, 9203 {0x34, 0x11, 0x11, 0, 0}, 9204 {0x35, 0, 0, 0, 0}, 9205 {0x36, 0, 0, 0, 0}, 9206 {0x37, 0x3, 0x3, 0, 0}, 9207 {0x38, 0xf, 0xf, 0, 0}, 9208 {0x39, 0, 0, 0, 0}, 9209 {0x3A, 0x2d, 0x2d, 0, 0}, 9210 {0x3B, 0, 0, 0, 0}, 9211 {0x3C, 0x6e, 0x6e, 0, 0}, 9212 {0x3D, 0xf0, 0xf0, 1, 1}, 9213 {0x3E, 0, 0, 0, 0}, 9214 {0x3F, 0, 0, 0, 0}, 9215 {0x40, 0, 0, 0, 0}, 9216 {0x41, 0x3, 0x3, 0, 0}, 9217 {0x42, 0x3, 0x3, 0, 0}, 9218 {0x43, 0, 0, 0, 0}, 9219 {0x44, 0x1e, 0x1e, 0, 0}, 9220 {0x45, 0, 0, 0, 0}, 9221 {0x46, 0x6e, 0x6e, 0, 0}, 9222 {0x47, 0xf0, 0xf0, 1, 1}, 9223 {0x48, 0, 0, 0, 0}, 9224 {0x49, 0x2, 0x2, 0, 0}, 9225 {0x4A, 0xff, 0xff, 1, 1}, 9226 {0x4B, 0xc, 0xc, 0, 0}, 9227 {0x4C, 0, 0, 0, 0}, 9228 {0x4D, 0x38, 0x38, 0, 0}, 9229 {0x4E, 0x70, 0x70, 1, 1}, 9230 {0x4F, 0x2, 0x2, 0, 0}, 9231 {0x50, 0x88, 0x88, 0, 0}, 9232 {0x51, 0xc, 0xc, 0, 0}, 9233 {0x52, 0, 0, 0, 0}, 9234 {0x53, 0x8, 0x8, 0, 0}, 9235 {0x54, 0x70, 0x70, 1, 1}, 9236 {0x55, 0x2, 0x2, 0, 0}, 9237 {0x56, 0xff, 0xff, 1, 1}, 9238 {0x57, 0, 0, 0, 0}, 9239 {0x58, 0x83, 0x83, 0, 0}, 9240 {0x59, 0x77, 0x77, 1, 1}, 9241 {0x5A, 0, 0, 0, 0}, 9242 {0x5B, 0x2, 0x2, 0, 0}, 9243 {0x5C, 0x88, 0x88, 0, 0}, 9244 {0x5D, 0, 0, 0, 0}, 9245 {0x5E, 0x8, 0x8, 0, 0}, 9246 {0x5F, 0x77, 0x77, 1, 1}, 9247 {0x60, 0x1, 0x1, 0, 0}, 9248 {0x61, 0, 0, 0, 0}, 9249 {0x62, 0x7, 0x7, 0, 0}, 9250 {0x63, 0, 0, 0, 0}, 9251 {0x64, 0x7, 0x7, 0, 0}, 9252 {0x65, 0, 0, 0, 0}, 9253 {0x66, 0, 0, 0, 0}, 9254 {0x67, 0, 0, 1, 1}, 9255 {0x68, 0, 0, 0, 0}, 9256 {0x69, 0xa, 0xa, 0, 0}, 9257 {0x6A, 0, 0, 0, 0}, 9258 {0x6B, 0, 0, 0, 0}, 9259 {0x6C, 0, 0, 0, 0}, 9260 {0x6D, 0, 0, 0, 0}, 9261 {0x6E, 0, 0, 0, 0}, 9262 {0x6F, 0, 0, 0, 0}, 9263 {0x70, 0, 0, 0, 0}, 9264 {0x71, 0x2, 0x2, 0, 0}, 9265 {0x72, 0, 0, 0, 0}, 9266 {0x73, 0, 0, 0, 0}, 9267 {0x74, 0xe, 0xe, 0, 0}, 9268 {0x75, 0xe, 0xe, 0, 0}, 9269 {0x76, 0xe, 0xe, 0, 0}, 9270 {0x77, 0x13, 0x13, 0, 0}, 9271 {0x78, 0x13, 0x13, 0, 0}, 9272 {0x79, 0x1b, 0x1b, 0, 0}, 9273 {0x7A, 0x1b, 0x1b, 0, 0}, 9274 {0x7B, 0x55, 0x55, 0, 0}, 9275 {0x7C, 0x5b, 0x5b, 0, 0}, 9276 {0x7D, 0, 0, 0, 0}, 9277 {0x7E, 0, 0, 0, 0}, 9278 {0x7F, 0, 0, 0, 0}, 9279 {0x80, 0, 0, 0, 0}, 9280 {0x81, 0, 0, 0, 0}, 9281 {0x82, 0, 0, 0, 0}, 9282 {0x83, 0, 0, 0, 0}, 9283 {0x84, 0, 0, 0, 0}, 9284 {0x85, 0, 0, 0, 0}, 9285 {0x86, 0, 0, 0, 0}, 9286 {0x87, 0, 0, 0, 0}, 9287 {0x88, 0, 0, 0, 0}, 9288 {0x89, 0, 0, 0, 0}, 9289 {0x8A, 0, 0, 0, 0}, 9290 {0x8B, 0, 0, 0, 0}, 9291 {0x8C, 0, 0, 0, 0}, 9292 {0x8D, 0, 0, 0, 0}, 9293 {0x8E, 0, 0, 0, 0}, 9294 {0x8F, 0, 0, 0, 0}, 9295 {0x90, 0, 0, 0, 0}, 9296 {0x91, 0, 0, 0, 0}, 9297 {0x92, 0, 0, 0, 0}, 9298 {0x93, 0x70, 0x70, 0, 0}, 9299 {0x94, 0x70, 0x70, 0, 0}, 9300 {0x95, 0x71, 0x71, 1, 1}, 9301 {0x96, 0x71, 0x71, 1, 1}, 9302 {0x97, 0x72, 0x72, 1, 1}, 9303 {0x98, 0x73, 0x73, 1, 1}, 9304 {0x99, 0x74, 0x74, 1, 1}, 9305 {0x9A, 0x75, 0x75, 1, 1}, 9306 {0xFFFF, 0, 0, 0, 0} 9307 }; 9308 9309 static struct radio_regs regs_RX_2056_rev5[] = { 9310 {0x02, 0, 0, 0, 0}, 9311 {0x03, 0, 0, 0, 0}, 9312 {0x04, 0, 0, 0, 0}, 9313 {0x05, 0, 0, 0, 0}, 9314 {0x06, 0, 0, 0, 0}, 9315 {0x07, 0, 0, 0, 0}, 9316 {0x08, 0, 0, 0, 0}, 9317 {0x09, 0, 0, 0, 0}, 9318 {0x0A, 0, 0, 0, 0}, 9319 {0x0B, 0, 0, 0, 0}, 9320 {0x0C, 0, 0, 0, 0}, 9321 {0x0D, 0, 0, 0, 0}, 9322 {0x0E, 0, 0, 0, 0}, 9323 {0x0F, 0, 0, 0, 0}, 9324 {0x10, 0, 0, 0, 0}, 9325 {0x11, 0, 0, 0, 0}, 9326 {0x12, 0, 0, 0, 0}, 9327 {0x13, 0, 0, 0, 0}, 9328 {0x14, 0, 0, 0, 0}, 9329 {0x15, 0, 0, 0, 0}, 9330 {0x16, 0, 0, 0, 0}, 9331 {0x17, 0, 0, 0, 0}, 9332 {0x18, 0, 0, 0, 0}, 9333 {0x19, 0, 0, 0, 0}, 9334 {0x1A, 0, 0, 0, 0}, 9335 {0x1B, 0, 0, 0, 0}, 9336 {0x1C, 0, 0, 0, 0}, 9337 {0x1D, 0, 0, 0, 0}, 9338 {0x1E, 0, 0, 0, 0}, 9339 {0x1F, 0, 0, 0, 0}, 9340 {0x20, 0x3, 0x3, 0, 0}, 9341 {0x21, 0, 0, 0, 0}, 9342 {0x22, 0, 0, 0, 0}, 9343 {0x23, 0x90, 0x90, 0, 0}, 9344 {0x24, 0x55, 0x55, 0, 0}, 9345 {0x25, 0x15, 0x15, 0, 0}, 9346 {0x26, 0x5, 0x5, 0, 0}, 9347 {0x27, 0x15, 0x15, 0, 0}, 9348 {0x28, 0x5, 0x5, 0, 0}, 9349 {0x29, 0x20, 0x20, 0, 0}, 9350 {0x2A, 0x11, 0x11, 0, 0}, 9351 {0x2B, 0x90, 0x90, 0, 0}, 9352 {0x2C, 0, 0, 0, 0}, 9353 {0x2D, 0x88, 0x88, 0, 0}, 9354 {0x2E, 0x32, 0x32, 0, 0}, 9355 {0x2F, 0x77, 0x77, 0, 0}, 9356 {0x30, 0x17, 0x17, 1, 1}, 9357 {0x31, 0xff, 0xff, 1, 1}, 9358 {0x32, 0x20, 0x20, 0, 0}, 9359 {0x33, 0, 0, 0, 0}, 9360 {0x34, 0x88, 0x88, 0, 0}, 9361 {0x35, 0x32, 0x32, 0, 0}, 9362 {0x36, 0x77, 0x77, 0, 0}, 9363 {0x37, 0x17, 0x17, 1, 1}, 9364 {0x38, 0xf0, 0xf0, 1, 1}, 9365 {0x39, 0x20, 0x20, 0, 0}, 9366 {0x3A, 0x8, 0x8, 0, 0}, 9367 {0x3B, 0x55, 0x55, 1, 1}, 9368 {0x3C, 0, 0, 0, 0}, 9369 {0x3D, 0x88, 0x88, 1, 1}, 9370 {0x3E, 0, 0, 0, 0}, 9371 {0x3F, 0, 0, 1, 1}, 9372 {0x40, 0x7, 0x7, 1, 1}, 9373 {0x41, 0x6, 0x6, 0, 0}, 9374 {0x42, 0x4, 0x4, 0, 0}, 9375 {0x43, 0, 0, 0, 0}, 9376 {0x44, 0x8, 0x8, 0, 0}, 9377 {0x45, 0x55, 0x55, 1, 1}, 9378 {0x46, 0, 0, 0, 0}, 9379 {0x47, 0x11, 0x11, 0, 0}, 9380 {0x48, 0, 0, 0, 0}, 9381 {0x49, 0, 0, 1, 1}, 9382 {0x4A, 0x7, 0x7, 0, 0}, 9383 {0x4B, 0x6, 0x6, 0, 0}, 9384 {0x4C, 0x4, 0x4, 0, 0}, 9385 {0x4D, 0, 0, 0, 0}, 9386 {0x4E, 0, 0, 0, 0}, 9387 {0x4F, 0x26, 0x26, 1, 1}, 9388 {0x50, 0x26, 0x26, 1, 1}, 9389 {0x51, 0xf, 0xf, 1, 1}, 9390 {0x52, 0xf, 0xf, 1, 1}, 9391 {0x53, 0x44, 0x44, 0, 0}, 9392 {0x54, 0, 0, 0, 0}, 9393 {0x55, 0, 0, 0, 0}, 9394 {0x56, 0x8, 0x8, 0, 0}, 9395 {0x57, 0x8, 0x8, 0, 0}, 9396 {0x58, 0x7, 0x7, 0, 0}, 9397 {0x59, 0x22, 0x22, 0, 0}, 9398 {0x5A, 0x22, 0x22, 0, 0}, 9399 {0x5B, 0x2, 0x2, 0, 0}, 9400 {0x5C, 0x4, 0x4, 1, 1}, 9401 {0x5D, 0x7, 0x7, 0, 0}, 9402 {0x5E, 0x55, 0x55, 0, 0}, 9403 {0x5F, 0x23, 0x23, 0, 0}, 9404 {0x60, 0x41, 0x41, 0, 0}, 9405 {0x61, 0x1, 0x1, 0, 0}, 9406 {0x62, 0xa, 0xa, 0, 0}, 9407 {0x63, 0, 0, 0, 0}, 9408 {0x64, 0, 0, 0, 0}, 9409 {0x65, 0, 0, 0, 0}, 9410 {0x66, 0, 0, 0, 0}, 9411 {0x67, 0, 0, 0, 0}, 9412 {0x68, 0, 0, 0, 0}, 9413 {0x69, 0, 0, 0, 0}, 9414 {0x6A, 0, 0, 0, 0}, 9415 {0x6B, 0xc, 0xc, 0, 0}, 9416 {0x6C, 0, 0, 0, 0}, 9417 {0x6D, 0, 0, 0, 0}, 9418 {0x6E, 0, 0, 0, 0}, 9419 {0x6F, 0, 0, 0, 0}, 9420 {0x70, 0, 0, 0, 0}, 9421 {0x71, 0, 0, 0, 0}, 9422 {0x72, 0x22, 0x22, 0, 0}, 9423 {0x73, 0x22, 0x22, 0, 0}, 9424 {0x74, 0, 0, 1, 1}, 9425 {0x75, 0xa, 0xa, 0, 0}, 9426 {0x76, 0x1, 0x1, 0, 0}, 9427 {0x77, 0x22, 0x22, 0, 0}, 9428 {0x78, 0x30, 0x30, 0, 0}, 9429 {0x79, 0, 0, 0, 0}, 9430 {0x7A, 0, 0, 0, 0}, 9431 {0x7B, 0, 0, 0, 0}, 9432 {0x7C, 0, 0, 0, 0}, 9433 {0x7D, 0, 0, 0, 0}, 9434 {0x7E, 0, 0, 0, 0}, 9435 {0x7F, 0, 0, 0, 0}, 9436 {0x80, 0, 0, 0, 0}, 9437 {0x81, 0, 0, 0, 0}, 9438 {0x82, 0, 0, 0, 0}, 9439 {0x83, 0, 0, 0, 0}, 9440 {0x84, 0, 0, 0, 0}, 9441 {0x85, 0, 0, 0, 0}, 9442 {0x86, 0, 0, 0, 0}, 9443 {0x87, 0, 0, 0, 0}, 9444 {0x88, 0, 0, 0, 0}, 9445 {0x89, 0, 0, 0, 0}, 9446 {0x8A, 0, 0, 0, 0}, 9447 {0x8B, 0, 0, 0, 0}, 9448 {0x8C, 0, 0, 0, 0}, 9449 {0x8D, 0, 0, 0, 0}, 9450 {0x8E, 0, 0, 0, 0}, 9451 {0x8F, 0, 0, 0, 0}, 9452 {0x90, 0, 0, 0, 0}, 9453 {0x91, 0, 0, 0, 0}, 9454 {0x92, 0, 0, 0, 0}, 9455 {0x93, 0, 0, 0, 0}, 9456 {0x94, 0, 0, 0, 0}, 9457 {0xFFFF, 0, 0, 0, 0} 9458 }; 9459 9460 static struct radio_regs regs_SYN_2056_rev6[] = { 9461 {0x02, 0, 0, 0, 0}, 9462 {0x03, 0, 0, 0, 0}, 9463 {0x04, 0, 0, 0, 0}, 9464 {0x05, 0, 0, 0, 0}, 9465 {0x06, 0, 0, 0, 0}, 9466 {0x07, 0, 0, 0, 0}, 9467 {0x08, 0, 0, 0, 0}, 9468 {0x09, 0x1, 0x1, 0, 0}, 9469 {0x0A, 0, 0, 0, 0}, 9470 {0x0B, 0, 0, 0, 0}, 9471 {0x0C, 0, 0, 0, 0}, 9472 {0x0D, 0, 0, 0, 0}, 9473 {0x0E, 0, 0, 0, 0}, 9474 {0x0F, 0, 0, 0, 0}, 9475 {0x10, 0, 0, 0, 0}, 9476 {0x11, 0, 0, 0, 0}, 9477 {0x12, 0, 0, 0, 0}, 9478 {0x13, 0, 0, 0, 0}, 9479 {0x14, 0, 0, 0, 0}, 9480 {0x15, 0, 0, 0, 0}, 9481 {0x16, 0, 0, 0, 0}, 9482 {0x17, 0, 0, 0, 0}, 9483 {0x18, 0, 0, 0, 0}, 9484 {0x19, 0, 0, 0, 0}, 9485 {0x1A, 0, 0, 0, 0}, 9486 {0x1B, 0, 0, 0, 0}, 9487 {0x1C, 0, 0, 0, 0}, 9488 {0x1D, 0, 0, 0, 0}, 9489 {0x1E, 0, 0, 0, 0}, 9490 {0x1F, 0, 0, 0, 0}, 9491 {0x20, 0, 0, 0, 0}, 9492 {0x21, 0, 0, 0, 0}, 9493 {0x22, 0x60, 0x60, 0, 0}, 9494 {0x23, 0x6, 0x6, 0, 0}, 9495 {0x24, 0xc, 0xc, 0, 0}, 9496 {0x25, 0, 0, 0, 0}, 9497 {0x26, 0, 0, 0, 0}, 9498 {0x27, 0, 0, 0, 0}, 9499 {0x28, 0x1, 0x1, 0, 0}, 9500 {0x29, 0, 0, 0, 0}, 9501 {0x2A, 0, 0, 0, 0}, 9502 {0x2B, 0, 0, 0, 0}, 9503 {0x2C, 0, 0, 0, 0}, 9504 {0x2D, 0, 0, 0, 0}, 9505 {0x2E, 0, 0, 0, 0}, 9506 {0x2F, 0x1f, 0x1f, 0, 0}, 9507 {0x30, 0x15, 0x15, 0, 0}, 9508 {0x31, 0xf, 0xf, 0, 0}, 9509 {0x32, 0, 0, 0, 0}, 9510 {0x33, 0, 0, 0, 0}, 9511 {0x34, 0, 0, 0, 0}, 9512 {0x35, 0, 0, 0, 0}, 9513 {0x36, 0, 0, 0, 0}, 9514 {0x37, 0, 0, 0, 0}, 9515 {0x38, 0, 0, 0, 0}, 9516 {0x39, 0, 0, 0, 0}, 9517 {0x3A, 0, 0, 0, 0}, 9518 {0x3B, 0, 0, 0, 0}, 9519 {0x3C, 0x13, 0x13, 0, 0}, 9520 {0x3D, 0xf, 0xf, 0, 0}, 9521 {0x3E, 0x18, 0x18, 0, 0}, 9522 {0x3F, 0, 0, 0, 0}, 9523 {0x40, 0, 0, 0, 0}, 9524 {0x41, 0x20, 0x20, 0, 0}, 9525 {0x42, 0x20, 0x20, 0, 0}, 9526 {0x43, 0, 0, 0, 0}, 9527 {0x44, 0x77, 0x77, 0, 0}, 9528 {0x45, 0x7, 0x7, 0, 0}, 9529 {0x46, 0x1, 0x1, 0, 0}, 9530 {0x47, 0x4, 0x4, 0, 0}, 9531 {0x48, 0xf, 0xf, 0, 0}, 9532 {0x49, 0x30, 0x30, 0, 0}, 9533 {0x4A, 0x32, 0x32, 0, 0}, 9534 {0x4B, 0xd, 0xd, 0, 0}, 9535 {0x4C, 0xd, 0xd, 0, 0}, 9536 {0x4D, 0x4, 0x4, 0, 0}, 9537 {0x4E, 0x6, 0x6, 0, 0}, 9538 {0x4F, 0x1, 0x1, 0, 0}, 9539 {0x50, 0x1c, 0x1c, 0, 0}, 9540 {0x51, 0x2, 0x2, 0, 0}, 9541 {0x52, 0x2, 0x2, 0, 0}, 9542 {0x53, 0xf7, 0xf7, 1, 1}, 9543 {0x54, 0xb4, 0xb4, 0, 0}, 9544 {0x55, 0xd2, 0xd2, 0, 0}, 9545 {0x56, 0, 0, 0, 0}, 9546 {0x57, 0, 0, 0, 0}, 9547 {0x58, 0x4, 0x4, 0, 0}, 9548 {0x59, 0x96, 0x96, 0, 0}, 9549 {0x5A, 0x3e, 0x3e, 0, 0}, 9550 {0x5B, 0x3e, 0x3e, 0, 0}, 9551 {0x5C, 0x13, 0x13, 0, 0}, 9552 {0x5D, 0x2, 0x2, 0, 0}, 9553 {0x5E, 0, 0, 0, 0}, 9554 {0x5F, 0x7, 0x7, 0, 0}, 9555 {0x60, 0x7, 0x7, 1, 1}, 9556 {0x61, 0x8, 0x8, 0, 0}, 9557 {0x62, 0x3, 0x3, 0, 0}, 9558 {0x63, 0, 0, 0, 0}, 9559 {0x64, 0, 0, 0, 0}, 9560 {0x65, 0, 0, 0, 0}, 9561 {0x66, 0, 0, 0, 0}, 9562 {0x67, 0, 0, 0, 0}, 9563 {0x68, 0x40, 0x40, 0, 0}, 9564 {0x69, 0, 0, 0, 0}, 9565 {0x6A, 0, 0, 0, 0}, 9566 {0x6B, 0, 0, 0, 0}, 9567 {0x6C, 0, 0, 0, 0}, 9568 {0x6D, 0x1, 0x1, 0, 0}, 9569 {0x6E, 0, 0, 0, 0}, 9570 {0x6F, 0, 0, 0, 0}, 9571 {0x70, 0x60, 0x60, 0, 0}, 9572 {0x71, 0x66, 0x66, 0, 0}, 9573 {0x72, 0xc, 0xc, 0, 0}, 9574 {0x73, 0x66, 0x66, 0, 0}, 9575 {0x74, 0x8f, 0x8f, 1, 1}, 9576 {0x75, 0, 0, 0, 0}, 9577 {0x76, 0xcc, 0xcc, 0, 0}, 9578 {0x77, 0x1, 0x1, 0, 0}, 9579 {0x78, 0x66, 0x66, 0, 0}, 9580 {0x79, 0x66, 0x66, 0, 0}, 9581 {0x7A, 0, 0, 0, 0}, 9582 {0x7B, 0, 0, 0, 0}, 9583 {0x7C, 0, 0, 0, 0}, 9584 {0x7D, 0, 0, 0, 0}, 9585 {0x7E, 0, 0, 0, 0}, 9586 {0x7F, 0, 0, 0, 0}, 9587 {0x80, 0, 0, 0, 0}, 9588 {0x81, 0, 0, 0, 0}, 9589 {0x82, 0, 0, 0, 0}, 9590 {0x83, 0, 0, 0, 0}, 9591 {0x84, 0, 0, 0, 0}, 9592 {0x85, 0xff, 0xff, 0, 0}, 9593 {0x86, 0, 0, 0, 0}, 9594 {0x87, 0, 0, 0, 0}, 9595 {0x88, 0, 0, 0, 0}, 9596 {0x89, 0, 0, 0, 0}, 9597 {0x8A, 0, 0, 0, 0}, 9598 {0x8B, 0, 0, 0, 0}, 9599 {0x8C, 0, 0, 0, 0}, 9600 {0x8D, 0, 0, 0, 0}, 9601 {0x8E, 0, 0, 0, 0}, 9602 {0x8F, 0, 0, 0, 0}, 9603 {0x90, 0, 0, 0, 0}, 9604 {0x91, 0, 0, 0, 0}, 9605 {0x92, 0, 0, 0, 0}, 9606 {0x93, 0, 0, 0, 0}, 9607 {0x94, 0, 0, 0, 0}, 9608 {0x95, 0, 0, 0, 0}, 9609 {0x96, 0, 0, 0, 0}, 9610 {0x97, 0, 0, 0, 0}, 9611 {0x98, 0, 0, 0, 0}, 9612 {0x99, 0, 0, 0, 0}, 9613 {0x9A, 0, 0, 0, 0}, 9614 {0x9B, 0, 0, 0, 0}, 9615 {0x9C, 0, 0, 0, 0}, 9616 {0x9D, 0, 0, 0, 0}, 9617 {0x9E, 0, 0, 0, 0}, 9618 {0x9F, 0x6, 0x6, 0, 0}, 9619 {0xA0, 0x66, 0x66, 0, 0}, 9620 {0xA1, 0x66, 0x66, 0, 0}, 9621 {0xA2, 0x66, 0x66, 0, 0}, 9622 {0xA3, 0x66, 0x66, 0, 0}, 9623 {0xA4, 0x66, 0x66, 0, 0}, 9624 {0xA5, 0x66, 0x66, 0, 0}, 9625 {0xA6, 0x66, 0x66, 0, 0}, 9626 {0xA7, 0x66, 0x66, 0, 0}, 9627 {0xA8, 0x66, 0x66, 0, 0}, 9628 {0xA9, 0x66, 0x66, 0, 0}, 9629 {0xAA, 0x66, 0x66, 0, 0}, 9630 {0xAB, 0x66, 0x66, 0, 0}, 9631 {0xAC, 0x66, 0x66, 0, 0}, 9632 {0xAD, 0x66, 0x66, 0, 0}, 9633 {0xAE, 0x66, 0x66, 0, 0}, 9634 {0xAF, 0x66, 0x66, 0, 0}, 9635 {0xB0, 0x66, 0x66, 0, 0}, 9636 {0xB1, 0x66, 0x66, 0, 0}, 9637 {0xB2, 0x66, 0x66, 0, 0}, 9638 {0xB3, 0xa, 0xa, 0, 0}, 9639 {0xB4, 0, 0, 0, 0}, 9640 {0xB5, 0, 0, 0, 0}, 9641 {0xB6, 0, 0, 0, 0}, 9642 {0xFFFF, 0, 0, 0, 0} 9643 }; 9644 9645 static struct radio_regs regs_TX_2056_rev6[] = { 9646 {0x02, 0, 0, 0, 0}, 9647 {0x03, 0, 0, 0, 0}, 9648 {0x04, 0, 0, 0, 0}, 9649 {0x05, 0, 0, 0, 0}, 9650 {0x06, 0, 0, 0, 0}, 9651 {0x07, 0, 0, 0, 0}, 9652 {0x08, 0, 0, 0, 0}, 9653 {0x09, 0, 0, 0, 0}, 9654 {0x0A, 0, 0, 0, 0}, 9655 {0x0B, 0, 0, 0, 0}, 9656 {0x0C, 0, 0, 0, 0}, 9657 {0x0D, 0, 0, 0, 0}, 9658 {0x0E, 0, 0, 0, 0}, 9659 {0x0F, 0, 0, 0, 0}, 9660 {0x10, 0, 0, 0, 0}, 9661 {0x11, 0, 0, 0, 0}, 9662 {0x12, 0, 0, 0, 0}, 9663 {0x13, 0, 0, 0, 0}, 9664 {0x14, 0, 0, 0, 0}, 9665 {0x15, 0, 0, 0, 0}, 9666 {0x16, 0, 0, 0, 0}, 9667 {0x17, 0, 0, 0, 0}, 9668 {0x18, 0, 0, 0, 0}, 9669 {0x19, 0, 0, 0, 0}, 9670 {0x1A, 0, 0, 0, 0}, 9671 {0x1B, 0, 0, 0, 0}, 9672 {0x1C, 0, 0, 0, 0}, 9673 {0x1D, 0, 0, 0, 0}, 9674 {0x1E, 0, 0, 0, 0}, 9675 {0x1F, 0, 0, 0, 0}, 9676 {0x20, 0, 0, 0, 0}, 9677 {0x21, 0x88, 0x88, 0, 0}, 9678 {0x22, 0x88, 0x88, 0, 0}, 9679 {0x23, 0x88, 0x88, 0, 0}, 9680 {0x24, 0x88, 0x88, 0, 0}, 9681 {0x25, 0xc, 0xc, 0, 0}, 9682 {0x26, 0, 0, 0, 0}, 9683 {0x27, 0x3, 0x3, 0, 0}, 9684 {0x28, 0, 0, 0, 0}, 9685 {0x29, 0x3, 0x3, 0, 0}, 9686 {0x2A, 0x37, 0x37, 0, 0}, 9687 {0x2B, 0x3, 0x3, 0, 0}, 9688 {0x2C, 0, 0, 0, 0}, 9689 {0x2D, 0, 0, 0, 0}, 9690 {0x2E, 0x1, 0x1, 0, 0}, 9691 {0x2F, 0x1, 0x1, 0, 0}, 9692 {0x30, 0, 0, 0, 0}, 9693 {0x31, 0, 0, 0, 0}, 9694 {0x32, 0, 0, 0, 0}, 9695 {0x33, 0x11, 0x11, 0, 0}, 9696 {0x34, 0xee, 0xee, 1, 1}, 9697 {0x35, 0, 0, 0, 0}, 9698 {0x36, 0, 0, 0, 0}, 9699 {0x37, 0x3, 0x3, 0, 0}, 9700 {0x38, 0x50, 0x50, 1, 1}, 9701 {0x39, 0, 0, 0, 0}, 9702 {0x3A, 0x50, 0x50, 1, 1}, 9703 {0x3B, 0, 0, 0, 0}, 9704 {0x3C, 0x6e, 0x6e, 0, 0}, 9705 {0x3D, 0xf0, 0xf0, 1, 1}, 9706 {0x3E, 0, 0, 0, 0}, 9707 {0x3F, 0, 0, 0, 0}, 9708 {0x40, 0, 0, 0, 0}, 9709 {0x41, 0x3, 0x3, 0, 0}, 9710 {0x42, 0x3, 0x3, 0, 0}, 9711 {0x43, 0, 0, 0, 0}, 9712 {0x44, 0x1e, 0x1e, 0, 0}, 9713 {0x45, 0, 0, 0, 0}, 9714 {0x46, 0x6e, 0x6e, 0, 0}, 9715 {0x47, 0xf0, 0xf0, 1, 1}, 9716 {0x48, 0, 0, 0, 0}, 9717 {0x49, 0x2, 0x2, 0, 0}, 9718 {0x4A, 0xff, 0xff, 1, 1}, 9719 {0x4B, 0xc, 0xc, 0, 0}, 9720 {0x4C, 0, 0, 0, 0}, 9721 {0x4D, 0x38, 0x38, 0, 0}, 9722 {0x4E, 0x70, 0x70, 1, 1}, 9723 {0x4F, 0x2, 0x2, 0, 0}, 9724 {0x50, 0x88, 0x88, 0, 0}, 9725 {0x51, 0xc, 0xc, 0, 0}, 9726 {0x52, 0, 0, 0, 0}, 9727 {0x53, 0x8, 0x8, 0, 0}, 9728 {0x54, 0x70, 0x70, 1, 1}, 9729 {0x55, 0x2, 0x2, 0, 0}, 9730 {0x56, 0xff, 0xff, 1, 1}, 9731 {0x57, 0, 0, 0, 0}, 9732 {0x58, 0x83, 0x83, 0, 0}, 9733 {0x59, 0x77, 0x77, 1, 1}, 9734 {0x5A, 0, 0, 0, 0}, 9735 {0x5B, 0x2, 0x2, 0, 0}, 9736 {0x5C, 0x88, 0x88, 0, 0}, 9737 {0x5D, 0, 0, 0, 0}, 9738 {0x5E, 0x8, 0x8, 0, 0}, 9739 {0x5F, 0x77, 0x77, 1, 1}, 9740 {0x60, 0x1, 0x1, 0, 0}, 9741 {0x61, 0, 0, 0, 0}, 9742 {0x62, 0x7, 0x7, 0, 0}, 9743 {0x63, 0, 0, 0, 0}, 9744 {0x64, 0x7, 0x7, 0, 0}, 9745 {0x65, 0, 0, 0, 0}, 9746 {0x66, 0, 0, 0, 0}, 9747 {0x67, 0, 0, 1, 1}, 9748 {0x68, 0, 0, 0, 0}, 9749 {0x69, 0xa, 0xa, 0, 0}, 9750 {0x6A, 0, 0, 0, 0}, 9751 {0x6B, 0, 0, 0, 0}, 9752 {0x6C, 0, 0, 0, 0}, 9753 {0x6D, 0, 0, 0, 0}, 9754 {0x6E, 0, 0, 0, 0}, 9755 {0x6F, 0, 0, 0, 0}, 9756 {0x70, 0, 0, 0, 0}, 9757 {0x71, 0x2, 0x2, 0, 0}, 9758 {0x72, 0, 0, 0, 0}, 9759 {0x73, 0, 0, 0, 0}, 9760 {0x74, 0xe, 0xe, 0, 0}, 9761 {0x75, 0xe, 0xe, 0, 0}, 9762 {0x76, 0xe, 0xe, 0, 0}, 9763 {0x77, 0x13, 0x13, 0, 0}, 9764 {0x78, 0x13, 0x13, 0, 0}, 9765 {0x79, 0x1b, 0x1b, 0, 0}, 9766 {0x7A, 0x1b, 0x1b, 0, 0}, 9767 {0x7B, 0x55, 0x55, 0, 0}, 9768 {0x7C, 0x5b, 0x5b, 0, 0}, 9769 {0x7D, 0x30, 0x30, 1, 1}, 9770 {0x7E, 0, 0, 0, 0}, 9771 {0x7F, 0, 0, 0, 0}, 9772 {0x80, 0, 0, 0, 0}, 9773 {0x81, 0, 0, 0, 0}, 9774 {0x82, 0, 0, 0, 0}, 9775 {0x83, 0, 0, 0, 0}, 9776 {0x84, 0, 0, 0, 0}, 9777 {0x85, 0, 0, 0, 0}, 9778 {0x86, 0, 0, 0, 0}, 9779 {0x87, 0, 0, 0, 0}, 9780 {0x88, 0, 0, 0, 0}, 9781 {0x89, 0, 0, 0, 0}, 9782 {0x8A, 0, 0, 0, 0}, 9783 {0x8B, 0, 0, 0, 0}, 9784 {0x8C, 0, 0, 0, 0}, 9785 {0x8D, 0, 0, 0, 0}, 9786 {0x8E, 0, 0, 0, 0}, 9787 {0x8F, 0, 0, 0, 0}, 9788 {0x90, 0, 0, 0, 0}, 9789 {0x91, 0, 0, 0, 0}, 9790 {0x92, 0, 0, 0, 0}, 9791 {0x93, 0x70, 0x70, 0, 0}, 9792 {0x94, 0x70, 0x70, 0, 0}, 9793 {0x95, 0x70, 0x70, 0, 0}, 9794 {0x96, 0x70, 0x70, 0, 0}, 9795 {0x97, 0x70, 0x70, 0, 0}, 9796 {0x98, 0x70, 0x70, 0, 0}, 9797 {0x99, 0x70, 0x70, 0, 0}, 9798 {0x9A, 0x70, 0x70, 0, 0}, 9799 {0xFFFF, 0, 0, 0, 0} 9800 }; 9801 9802 static struct radio_regs regs_RX_2056_rev6[] = { 9803 {0x02, 0, 0, 0, 0}, 9804 {0x03, 0, 0, 0, 0}, 9805 {0x04, 0, 0, 0, 0}, 9806 {0x05, 0, 0, 0, 0}, 9807 {0x06, 0, 0, 0, 0}, 9808 {0x07, 0, 0, 0, 0}, 9809 {0x08, 0, 0, 0, 0}, 9810 {0x09, 0, 0, 0, 0}, 9811 {0x0A, 0, 0, 0, 0}, 9812 {0x0B, 0, 0, 0, 0}, 9813 {0x0C, 0, 0, 0, 0}, 9814 {0x0D, 0, 0, 0, 0}, 9815 {0x0E, 0, 0, 0, 0}, 9816 {0x0F, 0, 0, 0, 0}, 9817 {0x10, 0, 0, 0, 0}, 9818 {0x11, 0, 0, 0, 0}, 9819 {0x12, 0, 0, 0, 0}, 9820 {0x13, 0, 0, 0, 0}, 9821 {0x14, 0, 0, 0, 0}, 9822 {0x15, 0, 0, 0, 0}, 9823 {0x16, 0, 0, 0, 0}, 9824 {0x17, 0, 0, 0, 0}, 9825 {0x18, 0, 0, 0, 0}, 9826 {0x19, 0, 0, 0, 0}, 9827 {0x1A, 0, 0, 0, 0}, 9828 {0x1B, 0, 0, 0, 0}, 9829 {0x1C, 0, 0, 0, 0}, 9830 {0x1D, 0, 0, 0, 0}, 9831 {0x1E, 0, 0, 0, 0}, 9832 {0x1F, 0, 0, 0, 0}, 9833 {0x20, 0x3, 0x3, 0, 0}, 9834 {0x21, 0, 0, 0, 0}, 9835 {0x22, 0, 0, 0, 0}, 9836 {0x23, 0x90, 0x90, 0, 0}, 9837 {0x24, 0x55, 0x55, 0, 0}, 9838 {0x25, 0x15, 0x15, 0, 0}, 9839 {0x26, 0x5, 0x5, 0, 0}, 9840 {0x27, 0x15, 0x15, 0, 0}, 9841 {0x28, 0x5, 0x5, 0, 0}, 9842 {0x29, 0x20, 0x20, 0, 0}, 9843 {0x2A, 0x11, 0x11, 0, 0}, 9844 {0x2B, 0x90, 0x90, 0, 0}, 9845 {0x2C, 0, 0, 0, 0}, 9846 {0x2D, 0x88, 0x88, 0, 0}, 9847 {0x2E, 0x32, 0x32, 0, 0}, 9848 {0x2F, 0x77, 0x77, 0, 0}, 9849 {0x30, 0x17, 0x17, 1, 1}, 9850 {0x31, 0xff, 0xff, 1, 1}, 9851 {0x32, 0x20, 0x20, 0, 0}, 9852 {0x33, 0, 0, 0, 0}, 9853 {0x34, 0x88, 0x88, 0, 0}, 9854 {0x35, 0x32, 0x32, 0, 0}, 9855 {0x36, 0x77, 0x77, 0, 0}, 9856 {0x37, 0x17, 0x17, 1, 1}, 9857 {0x38, 0xf0, 0xf0, 1, 1}, 9858 {0x39, 0x20, 0x20, 0, 0}, 9859 {0x3A, 0x8, 0x8, 0, 0}, 9860 {0x3B, 0x55, 0x55, 1, 1}, 9861 {0x3C, 0, 0, 0, 0}, 9862 {0x3D, 0x88, 0x88, 1, 1}, 9863 {0x3E, 0, 0, 0, 0}, 9864 {0x3F, 0x44, 0x44, 0, 0}, 9865 {0x40, 0x7, 0x7, 1, 1}, 9866 {0x41, 0x6, 0x6, 0, 0}, 9867 {0x42, 0x4, 0x4, 0, 0}, 9868 {0x43, 0, 0, 0, 0}, 9869 {0x44, 0x8, 0x8, 0, 0}, 9870 {0x45, 0x55, 0x55, 1, 1}, 9871 {0x46, 0, 0, 0, 0}, 9872 {0x47, 0x11, 0x11, 0, 0}, 9873 {0x48, 0, 0, 0, 0}, 9874 {0x49, 0x44, 0x44, 0, 0}, 9875 {0x4A, 0x7, 0x7, 0, 0}, 9876 {0x4B, 0x6, 0x6, 0, 0}, 9877 {0x4C, 0x4, 0x4, 0, 0}, 9878 {0x4D, 0, 0, 0, 0}, 9879 {0x4E, 0, 0, 0, 0}, 9880 {0x4F, 0x26, 0x26, 1, 1}, 9881 {0x50, 0x26, 0x26, 1, 1}, 9882 {0x51, 0xf, 0xf, 1, 1}, 9883 {0x52, 0xf, 0xf, 1, 1}, 9884 {0x53, 0x44, 0x44, 0, 0}, 9885 {0x54, 0, 0, 0, 0}, 9886 {0x55, 0, 0, 0, 0}, 9887 {0x56, 0x8, 0x8, 0, 0}, 9888 {0x57, 0x8, 0x8, 0, 0}, 9889 {0x58, 0x7, 0x7, 0, 0}, 9890 {0x59, 0x22, 0x22, 0, 0}, 9891 {0x5A, 0x22, 0x22, 0, 0}, 9892 {0x5B, 0x2, 0x2, 0, 0}, 9893 {0x5C, 0x4, 0x4, 1, 1}, 9894 {0x5D, 0x7, 0x7, 0, 0}, 9895 {0x5E, 0x55, 0x55, 0, 0}, 9896 {0x5F, 0x23, 0x23, 0, 0}, 9897 {0x60, 0x41, 0x41, 0, 0}, 9898 {0x61, 0x1, 0x1, 0, 0}, 9899 {0x62, 0xa, 0xa, 0, 0}, 9900 {0x63, 0, 0, 0, 0}, 9901 {0x64, 0, 0, 0, 0}, 9902 {0x65, 0, 0, 0, 0}, 9903 {0x66, 0, 0, 0, 0}, 9904 {0x67, 0, 0, 0, 0}, 9905 {0x68, 0, 0, 0, 0}, 9906 {0x69, 0, 0, 0, 0}, 9907 {0x6A, 0, 0, 0, 0}, 9908 {0x6B, 0xc, 0xc, 0, 0}, 9909 {0x6C, 0, 0, 0, 0}, 9910 {0x6D, 0, 0, 0, 0}, 9911 {0x6E, 0, 0, 0, 0}, 9912 {0x6F, 0, 0, 0, 0}, 9913 {0x70, 0, 0, 0, 0}, 9914 {0x71, 0, 0, 0, 0}, 9915 {0x72, 0x22, 0x22, 0, 0}, 9916 {0x73, 0x22, 0x22, 0, 0}, 9917 {0x74, 0, 0, 1, 1}, 9918 {0x75, 0xa, 0xa, 0, 0}, 9919 {0x76, 0x1, 0x1, 0, 0}, 9920 {0x77, 0x22, 0x22, 0, 0}, 9921 {0x78, 0x30, 0x30, 0, 0}, 9922 {0x79, 0, 0, 0, 0}, 9923 {0x7A, 0, 0, 0, 0}, 9924 {0x7B, 0, 0, 0, 0}, 9925 {0x7C, 0, 0, 0, 0}, 9926 {0x7D, 0x5, 0x5, 1, 1}, 9927 {0x7E, 0, 0, 0, 0}, 9928 {0x7F, 0, 0, 0, 0}, 9929 {0x80, 0, 0, 0, 0}, 9930 {0x81, 0, 0, 0, 0}, 9931 {0x82, 0, 0, 0, 0}, 9932 {0x83, 0, 0, 0, 0}, 9933 {0x84, 0, 0, 0, 0}, 9934 {0x85, 0, 0, 0, 0}, 9935 {0x86, 0, 0, 0, 0}, 9936 {0x87, 0, 0, 0, 0}, 9937 {0x88, 0, 0, 0, 0}, 9938 {0x89, 0, 0, 0, 0}, 9939 {0x8A, 0, 0, 0, 0}, 9940 {0x8B, 0, 0, 0, 0}, 9941 {0x8C, 0, 0, 0, 0}, 9942 {0x8D, 0, 0, 0, 0}, 9943 {0x8E, 0, 0, 0, 0}, 9944 {0x8F, 0, 0, 0, 0}, 9945 {0x90, 0, 0, 0, 0}, 9946 {0x91, 0, 0, 0, 0}, 9947 {0x92, 0, 0, 0, 0}, 9948 {0x93, 0, 0, 0, 0}, 9949 {0x94, 0, 0, 0, 0}, 9950 {0xFFFF, 0, 0, 0, 0} 9951 }; 9952 9953 static struct radio_regs regs_SYN_2056_rev7[] = { 9954 {0x02, 0, 0, 0, 0}, 9955 {0x03, 0, 0, 0, 0}, 9956 {0x04, 0, 0, 0, 0}, 9957 {0x05, 0, 0, 0, 0}, 9958 {0x06, 0, 0, 0, 0}, 9959 {0x07, 0, 0, 0, 0}, 9960 {0x08, 0, 0, 0, 0}, 9961 {0x09, 0x1, 0x1, 0, 0}, 9962 {0x0A, 0, 0, 0, 0}, 9963 {0x0B, 0, 0, 0, 0}, 9964 {0x0C, 0, 0, 0, 0}, 9965 {0x0D, 0, 0, 0, 0}, 9966 {0x0E, 0, 0, 0, 0}, 9967 {0x0F, 0, 0, 0, 0}, 9968 {0x10, 0, 0, 0, 0}, 9969 {0x11, 0, 0, 0, 0}, 9970 {0x12, 0, 0, 0, 0}, 9971 {0x13, 0, 0, 0, 0}, 9972 {0x14, 0, 0, 0, 0}, 9973 {0x15, 0, 0, 0, 0}, 9974 {0x16, 0, 0, 0, 0}, 9975 {0x17, 0, 0, 0, 0}, 9976 {0x18, 0, 0, 0, 0}, 9977 {0x19, 0, 0, 0, 0}, 9978 {0x1A, 0, 0, 0, 0}, 9979 {0x1B, 0, 0, 0, 0}, 9980 {0x1C, 0, 0, 0, 0}, 9981 {0x1D, 0, 0, 0, 0}, 9982 {0x1E, 0, 0, 0, 0}, 9983 {0x1F, 0, 0, 0, 0}, 9984 {0x20, 0, 0, 0, 0}, 9985 {0x21, 0, 0, 0, 0}, 9986 {0x22, 0x60, 0x60, 0, 0}, 9987 {0x23, 0x6, 0x6, 0, 0}, 9988 {0x24, 0xc, 0xc, 0, 0}, 9989 {0x25, 0, 0, 0, 0}, 9990 {0x26, 0, 0, 0, 0}, 9991 {0x27, 0, 0, 0, 0}, 9992 {0x28, 0x1, 0x1, 0, 0}, 9993 {0x29, 0, 0, 0, 0}, 9994 {0x2A, 0, 0, 0, 0}, 9995 {0x2B, 0, 0, 0, 0}, 9996 {0x2C, 0, 0, 0, 0}, 9997 {0x2D, 0, 0, 0, 0}, 9998 {0x2E, 0, 0, 0, 0}, 9999 {0x2F, 0x1f, 0x1f, 0, 0}, 10000 {0x30, 0x15, 0x15, 0, 0}, 10001 {0x31, 0xf, 0xf, 0, 0}, 10002 {0x32, 0, 0, 0, 0}, 10003 {0x33, 0, 0, 0, 0}, 10004 {0x34, 0, 0, 0, 0}, 10005 {0x35, 0, 0, 0, 0}, 10006 {0x36, 0, 0, 0, 0}, 10007 {0x37, 0, 0, 0, 0}, 10008 {0x38, 0, 0, 0, 0}, 10009 {0x39, 0, 0, 0, 0}, 10010 {0x3A, 0, 0, 0, 0}, 10011 {0x3B, 0, 0, 0, 0}, 10012 {0x3C, 0x13, 0x13, 0, 0}, 10013 {0x3D, 0xf, 0xf, 0, 0}, 10014 {0x3E, 0x18, 0x18, 0, 0}, 10015 {0x3F, 0, 0, 0, 0}, 10016 {0x40, 0, 0, 0, 0}, 10017 {0x41, 0x20, 0x20, 0, 0}, 10018 {0x42, 0x20, 0x20, 0, 0}, 10019 {0x43, 0, 0, 0, 0}, 10020 {0x44, 0x77, 0x77, 0, 0}, 10021 {0x45, 0x7, 0x7, 0, 0}, 10022 {0x46, 0x1, 0x1, 0, 0}, 10023 {0x47, 0x4, 0x4, 0, 0}, 10024 {0x48, 0xf, 0xf, 0, 0}, 10025 {0x49, 0x30, 0x30, 0, 0}, 10026 {0x4A, 0x32, 0x32, 0, 0}, 10027 {0x4B, 0xd, 0xd, 0, 0}, 10028 {0x4C, 0xd, 0xd, 0, 0}, 10029 {0x4D, 0x4, 0x4, 0, 0}, 10030 {0x4E, 0x6, 0x6, 0, 0}, 10031 {0x4F, 0x1, 0x1, 0, 0}, 10032 {0x50, 0x1c, 0x1c, 0, 0}, 10033 {0x51, 0x2, 0x2, 0, 0}, 10034 {0x52, 0x2, 0x2, 0, 0}, 10035 {0x53, 0xf7, 0xf7, 1, 1}, 10036 {0x54, 0xb4, 0xb4, 0, 0}, 10037 {0x55, 0xd2, 0xd2, 0, 0}, 10038 {0x56, 0, 0, 0, 0}, 10039 {0x57, 0, 0, 0, 0}, 10040 {0x58, 0x4, 0x4, 0, 0}, 10041 {0x59, 0x96, 0x96, 0, 0}, 10042 {0x5A, 0x3e, 0x3e, 0, 0}, 10043 {0x5B, 0x3e, 0x3e, 0, 0}, 10044 {0x5C, 0x13, 0x13, 0, 0}, 10045 {0x5D, 0x2, 0x2, 0, 0}, 10046 {0x5E, 0, 0, 0, 0}, 10047 {0x5F, 0x7, 0x7, 0, 0}, 10048 {0x60, 0x7, 0x7, 1, 1}, 10049 {0x61, 0x8, 0x8, 0, 0}, 10050 {0x62, 0x3, 0x3, 0, 0}, 10051 {0x63, 0, 0, 0, 0}, 10052 {0x64, 0, 0, 0, 0}, 10053 {0x65, 0, 0, 0, 0}, 10054 {0x66, 0, 0, 0, 0}, 10055 {0x67, 0, 0, 0, 0}, 10056 {0x68, 0x40, 0x40, 0, 0}, 10057 {0x69, 0, 0, 0, 0}, 10058 {0x6A, 0, 0, 0, 0}, 10059 {0x6B, 0, 0, 0, 0}, 10060 {0x6C, 0, 0, 0, 0}, 10061 {0x6D, 0x1, 0x1, 0, 0}, 10062 {0x6E, 0, 0, 0, 0}, 10063 {0x6F, 0, 0, 0, 0}, 10064 {0x70, 0x60, 0x60, 0, 0}, 10065 {0x71, 0x66, 0x66, 0, 0}, 10066 {0x72, 0xc, 0xc, 0, 0}, 10067 {0x73, 0x66, 0x66, 0, 0}, 10068 {0x74, 0x8f, 0x8f, 1, 1}, 10069 {0x75, 0, 0, 0, 0}, 10070 {0x76, 0xcc, 0xcc, 0, 0}, 10071 {0x77, 0x1, 0x1, 0, 0}, 10072 {0x78, 0x66, 0x66, 0, 0}, 10073 {0x79, 0x66, 0x66, 0, 0}, 10074 {0x7A, 0, 0, 0, 0}, 10075 {0x7B, 0, 0, 0, 0}, 10076 {0x7C, 0, 0, 0, 0}, 10077 {0x7D, 0, 0, 0, 0}, 10078 {0x7E, 0, 0, 0, 0}, 10079 {0x7F, 0, 0, 0, 0}, 10080 {0x80, 0, 0, 0, 0}, 10081 {0x81, 0, 0, 0, 0}, 10082 {0x82, 0, 0, 0, 0}, 10083 {0x83, 0, 0, 0, 0}, 10084 {0x84, 0, 0, 0, 0}, 10085 {0x85, 0xff, 0xff, 0, 0}, 10086 {0x86, 0, 0, 0, 0}, 10087 {0x87, 0, 0, 0, 0}, 10088 {0x88, 0, 0, 0, 0}, 10089 {0x89, 0, 0, 0, 0}, 10090 {0x8A, 0, 0, 0, 0}, 10091 {0x8B, 0, 0, 0, 0}, 10092 {0x8C, 0, 0, 0, 0}, 10093 {0x8D, 0, 0, 0, 0}, 10094 {0x8E, 0, 0, 0, 0}, 10095 {0x8F, 0, 0, 0, 0}, 10096 {0x90, 0, 0, 0, 0}, 10097 {0x91, 0, 0, 0, 0}, 10098 {0x92, 0, 0, 0, 0}, 10099 {0x93, 0, 0, 0, 0}, 10100 {0x94, 0, 0, 0, 0}, 10101 {0x95, 0, 0, 0, 0}, 10102 {0x96, 0, 0, 0, 0}, 10103 {0x97, 0, 0, 0, 0}, 10104 {0x98, 0, 0, 0, 0}, 10105 {0x99, 0, 0, 0, 0}, 10106 {0x9A, 0, 0, 0, 0}, 10107 {0x9B, 0, 0, 0, 0}, 10108 {0x9C, 0, 0, 0, 0}, 10109 {0x9D, 0, 0, 0, 0}, 10110 {0x9E, 0, 0, 0, 0}, 10111 {0x9F, 0x6, 0x6, 0, 0}, 10112 {0xA0, 0x66, 0x66, 0, 0}, 10113 {0xA1, 0x66, 0x66, 0, 0}, 10114 {0xA2, 0x66, 0x66, 0, 0}, 10115 {0xA3, 0x66, 0x66, 0, 0}, 10116 {0xA4, 0x66, 0x66, 0, 0}, 10117 {0xA5, 0x66, 0x66, 0, 0}, 10118 {0xA6, 0x66, 0x66, 0, 0}, 10119 {0xA7, 0x66, 0x66, 0, 0}, 10120 {0xA8, 0x66, 0x66, 0, 0}, 10121 {0xA9, 0x66, 0x66, 0, 0}, 10122 {0xAA, 0x66, 0x66, 0, 0}, 10123 {0xAB, 0x66, 0x66, 0, 0}, 10124 {0xAC, 0x66, 0x66, 0, 0}, 10125 {0xAD, 0x66, 0x66, 0, 0}, 10126 {0xAE, 0x66, 0x66, 0, 0}, 10127 {0xAF, 0x66, 0x66, 0, 0}, 10128 {0xB0, 0x66, 0x66, 0, 0}, 10129 {0xB1, 0x66, 0x66, 0, 0}, 10130 {0xB2, 0x66, 0x66, 0, 0}, 10131 {0xB3, 0xa, 0xa, 0, 0}, 10132 {0xB4, 0, 0, 0, 0}, 10133 {0xB5, 0, 0, 0, 0}, 10134 {0xB6, 0, 0, 0, 0}, 10135 {0xFFFF, 0, 0, 0, 0}, 10136 }; 10137 10138 static struct radio_regs regs_TX_2056_rev7[] = { 10139 {0x02, 0, 0, 0, 0}, 10140 {0x03, 0, 0, 0, 0}, 10141 {0x04, 0, 0, 0, 0}, 10142 {0x05, 0, 0, 0, 0}, 10143 {0x06, 0, 0, 0, 0}, 10144 {0x07, 0, 0, 0, 0}, 10145 {0x08, 0, 0, 0, 0}, 10146 {0x09, 0, 0, 0, 0}, 10147 {0x0A, 0, 0, 0, 0}, 10148 {0x0B, 0, 0, 0, 0}, 10149 {0x0C, 0, 0, 0, 0}, 10150 {0x0D, 0, 0, 0, 0}, 10151 {0x0E, 0, 0, 0, 0}, 10152 {0x0F, 0, 0, 0, 0}, 10153 {0x10, 0, 0, 0, 0}, 10154 {0x11, 0, 0, 0, 0}, 10155 {0x12, 0, 0, 0, 0}, 10156 {0x13, 0, 0, 0, 0}, 10157 {0x14, 0, 0, 0, 0}, 10158 {0x15, 0, 0, 0, 0}, 10159 {0x16, 0, 0, 0, 0}, 10160 {0x17, 0, 0, 0, 0}, 10161 {0x18, 0, 0, 0, 0}, 10162 {0x19, 0, 0, 0, 0}, 10163 {0x1A, 0, 0, 0, 0}, 10164 {0x1B, 0, 0, 0, 0}, 10165 {0x1C, 0, 0, 0, 0}, 10166 {0x1D, 0, 0, 0, 0}, 10167 {0x1E, 0, 0, 0, 0}, 10168 {0x1F, 0, 0, 0, 0}, 10169 {0x20, 0, 0, 0, 0}, 10170 {0x21, 0x88, 0x88, 0, 0}, 10171 {0x22, 0x88, 0x88, 0, 0}, 10172 {0x23, 0x88, 0x88, 0, 0}, 10173 {0x24, 0x88, 0x88, 0, 0}, 10174 {0x25, 0xc, 0xc, 0, 0}, 10175 {0x26, 0, 0, 0, 0}, 10176 {0x27, 0x3, 0x3, 0, 0}, 10177 {0x28, 0, 0, 0, 0}, 10178 {0x29, 0x3, 0x3, 0, 0}, 10179 {0x2A, 0x37, 0x37, 0, 0}, 10180 {0x2B, 0x3, 0x3, 0, 0}, 10181 {0x2C, 0, 0, 0, 0}, 10182 {0x2D, 0, 0, 0, 0}, 10183 {0x2E, 0x1, 0x1, 0, 0}, 10184 {0x2F, 0x1, 0x1, 0, 0}, 10185 {0x30, 0, 0, 0, 0}, 10186 {0x31, 0, 0, 0, 0}, 10187 {0x32, 0, 0, 0, 0}, 10188 {0x33, 0x11, 0x11, 0, 0}, 10189 {0x34, 0xee, 0xee, 1, 1}, 10190 {0x35, 0, 0, 0, 0}, 10191 {0x36, 0, 0, 0, 0}, 10192 {0x37, 0x3, 0x3, 0, 0}, 10193 {0x38, 0x50, 0x50, 1, 1}, 10194 {0x39, 0, 0, 0, 0}, 10195 {0x3A, 0x50, 0x50, 1, 1}, 10196 {0x3B, 0, 0, 0, 0}, 10197 {0x3C, 0x6e, 0x6e, 0, 0}, 10198 {0x3D, 0xf0, 0xf0, 1, 1}, 10199 {0x3E, 0, 0, 0, 0}, 10200 {0x3F, 0, 0, 0, 0}, 10201 {0x40, 0, 0, 0, 0}, 10202 {0x41, 0x3, 0x3, 0, 0}, 10203 {0x42, 0x3, 0x3, 0, 0}, 10204 {0x43, 0, 0, 0, 0}, 10205 {0x44, 0x1e, 0x1e, 0, 0}, 10206 {0x45, 0, 0, 0, 0}, 10207 {0x46, 0x6e, 0x6e, 0, 0}, 10208 {0x47, 0xf0, 0xf0, 1, 1}, 10209 {0x48, 0, 0, 0, 0}, 10210 {0x49, 0x2, 0x2, 0, 0}, 10211 {0x4A, 0xff, 0xff, 1, 1}, 10212 {0x4B, 0xc, 0xc, 0, 0}, 10213 {0x4C, 0, 0, 0, 0}, 10214 {0x4D, 0x38, 0x38, 0, 0}, 10215 {0x4E, 0x70, 0x70, 1, 1}, 10216 {0x4F, 0x2, 0x2, 0, 0}, 10217 {0x50, 0x88, 0x88, 0, 0}, 10218 {0x51, 0xc, 0xc, 0, 0}, 10219 {0x52, 0, 0, 0, 0}, 10220 {0x53, 0x8, 0x8, 0, 0}, 10221 {0x54, 0x70, 0x70, 1, 1}, 10222 {0x55, 0x2, 0x2, 0, 0}, 10223 {0x56, 0xff, 0xff, 1, 1}, 10224 {0x57, 0, 0, 0, 0}, 10225 {0x58, 0x83, 0x83, 0, 0}, 10226 {0x59, 0x77, 0x77, 1, 1}, 10227 {0x5A, 0, 0, 0, 0}, 10228 {0x5B, 0x2, 0x2, 0, 0}, 10229 {0x5C, 0x88, 0x88, 0, 0}, 10230 {0x5D, 0, 0, 0, 0}, 10231 {0x5E, 0x8, 0x8, 0, 0}, 10232 {0x5F, 0x77, 0x77, 1, 1}, 10233 {0x60, 0x1, 0x1, 0, 0}, 10234 {0x61, 0, 0, 0, 0}, 10235 {0x62, 0x7, 0x7, 0, 0}, 10236 {0x63, 0, 0, 0, 0}, 10237 {0x64, 0x7, 0x7, 0, 0}, 10238 {0x65, 0, 0, 0, 0}, 10239 {0x66, 0, 0, 0, 0}, 10240 {0x67, 0, 0, 1, 1}, 10241 {0x68, 0, 0, 0, 0}, 10242 {0x69, 0xa, 0xa, 0, 0}, 10243 {0x6A, 0, 0, 0, 0}, 10244 {0x6B, 0, 0, 0, 0}, 10245 {0x6C, 0, 0, 0, 0}, 10246 {0x6D, 0, 0, 0, 0}, 10247 {0x6E, 0, 0, 0, 0}, 10248 {0x6F, 0, 0, 0, 0}, 10249 {0x70, 0, 0, 0, 0}, 10250 {0x71, 0x2, 0x2, 0, 0}, 10251 {0x72, 0, 0, 0, 0}, 10252 {0x73, 0, 0, 0, 0}, 10253 {0x74, 0xe, 0xe, 0, 0}, 10254 {0x75, 0xe, 0xe, 0, 0}, 10255 {0x76, 0xe, 0xe, 0, 0}, 10256 {0x77, 0x13, 0x13, 0, 0}, 10257 {0x78, 0x13, 0x13, 0, 0}, 10258 {0x79, 0x1b, 0x1b, 0, 0}, 10259 {0x7A, 0x1b, 0x1b, 0, 0}, 10260 {0x7B, 0x55, 0x55, 0, 0}, 10261 {0x7C, 0x5b, 0x5b, 0, 0}, 10262 {0x7D, 0x30, 0x30, 1, 1}, 10263 {0x7E, 0, 0, 0, 0}, 10264 {0x7F, 0, 0, 0, 0}, 10265 {0x80, 0, 0, 0, 0}, 10266 {0x81, 0, 0, 0, 0}, 10267 {0x82, 0, 0, 0, 0}, 10268 {0x83, 0, 0, 0, 0}, 10269 {0x84, 0, 0, 0, 0}, 10270 {0x85, 0, 0, 0, 0}, 10271 {0x86, 0, 0, 0, 0}, 10272 {0x87, 0, 0, 0, 0}, 10273 {0x88, 0, 0, 0, 0}, 10274 {0x89, 0, 0, 0, 0}, 10275 {0x8A, 0, 0, 0, 0}, 10276 {0x8B, 0, 0, 0, 0}, 10277 {0x8C, 0, 0, 0, 0}, 10278 {0x8D, 0, 0, 0, 0}, 10279 {0x8E, 0, 0, 0, 0}, 10280 {0x8F, 0, 0, 0, 0}, 10281 {0x90, 0, 0, 0, 0}, 10282 {0x91, 0, 0, 0, 0}, 10283 {0x92, 0, 0, 0, 0}, 10284 {0x93, 0x70, 0x70, 0, 0}, 10285 {0x94, 0x70, 0x70, 0, 0}, 10286 {0x95, 0x71, 0x71, 1, 1}, 10287 {0x96, 0x71, 0x71, 1, 1}, 10288 {0x97, 0x72, 0x72, 1, 1}, 10289 {0x98, 0x73, 0x73, 1, 1}, 10290 {0x99, 0x74, 0x74, 1, 1}, 10291 {0x9A, 0x75, 0x75, 1, 1}, 10292 {0xFFFF, 0, 0, 0, 0}, 10293 }; 10294 10295 static struct radio_regs regs_RX_2056_rev7[] = { 10296 {0x02, 0, 0, 0, 0}, 10297 {0x03, 0, 0, 0, 0}, 10298 {0x04, 0, 0, 0, 0}, 10299 {0x05, 0, 0, 0, 0}, 10300 {0x06, 0, 0, 0, 0}, 10301 {0x07, 0, 0, 0, 0}, 10302 {0x08, 0, 0, 0, 0}, 10303 {0x09, 0, 0, 0, 0}, 10304 {0x0A, 0, 0, 0, 0}, 10305 {0x0B, 0, 0, 0, 0}, 10306 {0x0C, 0, 0, 0, 0}, 10307 {0x0D, 0, 0, 0, 0}, 10308 {0x0E, 0, 0, 0, 0}, 10309 {0x0F, 0, 0, 0, 0}, 10310 {0x10, 0, 0, 0, 0}, 10311 {0x11, 0, 0, 0, 0}, 10312 {0x12, 0, 0, 0, 0}, 10313 {0x13, 0, 0, 0, 0}, 10314 {0x14, 0, 0, 0, 0}, 10315 {0x15, 0, 0, 0, 0}, 10316 {0x16, 0, 0, 0, 0}, 10317 {0x17, 0, 0, 0, 0}, 10318 {0x18, 0, 0, 0, 0}, 10319 {0x19, 0, 0, 0, 0}, 10320 {0x1A, 0, 0, 0, 0}, 10321 {0x1B, 0, 0, 0, 0}, 10322 {0x1C, 0, 0, 0, 0}, 10323 {0x1D, 0, 0, 0, 0}, 10324 {0x1E, 0, 0, 0, 0}, 10325 {0x1F, 0, 0, 0, 0}, 10326 {0x20, 0x3, 0x3, 0, 0}, 10327 {0x21, 0, 0, 0, 0}, 10328 {0x22, 0, 0, 0, 0}, 10329 {0x23, 0x90, 0x90, 0, 0}, 10330 {0x24, 0x55, 0x55, 0, 0}, 10331 {0x25, 0x15, 0x15, 0, 0}, 10332 {0x26, 0x5, 0x5, 0, 0}, 10333 {0x27, 0x15, 0x15, 0, 0}, 10334 {0x28, 0x5, 0x5, 0, 0}, 10335 {0x29, 0x20, 0x20, 0, 0}, 10336 {0x2A, 0x11, 0x11, 0, 0}, 10337 {0x2B, 0x90, 0x90, 0, 0}, 10338 {0x2C, 0, 0, 0, 0}, 10339 {0x2D, 0x88, 0x88, 0, 0}, 10340 {0x2E, 0x32, 0x32, 0, 0}, 10341 {0x2F, 0x77, 0x77, 0, 0}, 10342 {0x30, 0x17, 0x17, 1, 1}, 10343 {0x31, 0xff, 0xff, 1, 1}, 10344 {0x32, 0x20, 0x20, 0, 0}, 10345 {0x33, 0, 0, 0, 0}, 10346 {0x34, 0x88, 0x88, 0, 0}, 10347 {0x35, 0x32, 0x32, 0, 0}, 10348 {0x36, 0x77, 0x77, 0, 0}, 10349 {0x37, 0x17, 0x17, 1, 1}, 10350 {0x38, 0xf0, 0xf0, 1, 1}, 10351 {0x39, 0x20, 0x20, 0, 0}, 10352 {0x3A, 0x8, 0x8, 0, 0}, 10353 {0x3B, 0x55, 0x55, 1, 1}, 10354 {0x3C, 0, 0, 0, 0}, 10355 {0x3D, 0x88, 0x88, 1, 1}, 10356 {0x3E, 0, 0, 0, 0}, 10357 {0x3F, 0, 0, 1, 1}, 10358 {0x40, 0x7, 0x7, 1, 1}, 10359 {0x41, 0x6, 0x6, 0, 0}, 10360 {0x42, 0x4, 0x4, 0, 0}, 10361 {0x43, 0, 0, 0, 0}, 10362 {0x44, 0x8, 0x8, 0, 0}, 10363 {0x45, 0x55, 0x55, 1, 1}, 10364 {0x46, 0, 0, 0, 0}, 10365 {0x47, 0x11, 0x11, 0, 0}, 10366 {0x48, 0, 0, 0, 0}, 10367 {0x49, 0, 0, 1, 1}, 10368 {0x4A, 0x7, 0x7, 0, 0}, 10369 {0x4B, 0x6, 0x6, 0, 0}, 10370 {0x4C, 0x4, 0x4, 0, 0}, 10371 {0x4D, 0, 0, 0, 0}, 10372 {0x4E, 0, 0, 0, 0}, 10373 {0x4F, 0x26, 0x26, 1, 1}, 10374 {0x50, 0x26, 0x26, 1, 1}, 10375 {0x51, 0xf, 0xf, 1, 1}, 10376 {0x52, 0xf, 0xf, 1, 1}, 10377 {0x53, 0x44, 0x44, 0, 0}, 10378 {0x54, 0, 0, 0, 0}, 10379 {0x55, 0, 0, 0, 0}, 10380 {0x56, 0x8, 0x8, 0, 0}, 10381 {0x57, 0x8, 0x8, 0, 0}, 10382 {0x58, 0x7, 0x7, 0, 0}, 10383 {0x59, 0x22, 0x22, 0, 0}, 10384 {0x5A, 0x22, 0x22, 0, 0}, 10385 {0x5B, 0x2, 0x2, 0, 0}, 10386 {0x5C, 0x4, 0x4, 1, 1}, 10387 {0x5D, 0x7, 0x7, 0, 0}, 10388 {0x5E, 0x55, 0x55, 0, 0}, 10389 {0x5F, 0x23, 0x23, 0, 0}, 10390 {0x60, 0x41, 0x41, 0, 0}, 10391 {0x61, 0x1, 0x1, 0, 0}, 10392 {0x62, 0xa, 0xa, 0, 0}, 10393 {0x63, 0, 0, 0, 0}, 10394 {0x64, 0, 0, 0, 0}, 10395 {0x65, 0, 0, 0, 0}, 10396 {0x66, 0, 0, 0, 0}, 10397 {0x67, 0, 0, 0, 0}, 10398 {0x68, 0, 0, 0, 0}, 10399 {0x69, 0, 0, 0, 0}, 10400 {0x6A, 0, 0, 0, 0}, 10401 {0x6B, 0xc, 0xc, 0, 0}, 10402 {0x6C, 0, 0, 0, 0}, 10403 {0x6D, 0, 0, 0, 0}, 10404 {0x6E, 0, 0, 0, 0}, 10405 {0x6F, 0, 0, 0, 0}, 10406 {0x70, 0, 0, 0, 0}, 10407 {0x71, 0, 0, 0, 0}, 10408 {0x72, 0x22, 0x22, 0, 0}, 10409 {0x73, 0x22, 0x22, 0, 0}, 10410 {0x74, 0, 0, 1, 1}, 10411 {0x75, 0xa, 0xa, 0, 0}, 10412 {0x76, 0x1, 0x1, 0, 0}, 10413 {0x77, 0x22, 0x22, 0, 0}, 10414 {0x78, 0x30, 0x30, 0, 0}, 10415 {0x79, 0, 0, 0, 0}, 10416 {0x7A, 0, 0, 0, 0}, 10417 {0x7B, 0, 0, 0, 0}, 10418 {0x7C, 0, 0, 0, 0}, 10419 {0x7D, 0, 0, 0, 0}, 10420 {0x7E, 0, 0, 0, 0}, 10421 {0x7F, 0, 0, 0, 0}, 10422 {0x80, 0, 0, 0, 0}, 10423 {0x81, 0, 0, 0, 0}, 10424 {0x82, 0, 0, 0, 0}, 10425 {0x83, 0, 0, 0, 0}, 10426 {0x84, 0, 0, 0, 0}, 10427 {0x85, 0, 0, 0, 0}, 10428 {0x86, 0, 0, 0, 0}, 10429 {0x87, 0, 0, 0, 0}, 10430 {0x88, 0, 0, 0, 0}, 10431 {0x89, 0, 0, 0, 0}, 10432 {0x8A, 0, 0, 0, 0}, 10433 {0x8B, 0, 0, 0, 0}, 10434 {0x8C, 0, 0, 0, 0}, 10435 {0x8D, 0, 0, 0, 0}, 10436 {0x8E, 0, 0, 0, 0}, 10437 {0x8F, 0, 0, 0, 0}, 10438 {0x90, 0, 0, 0, 0}, 10439 {0x91, 0, 0, 0, 0}, 10440 {0x92, 0, 0, 0, 0}, 10441 {0x93, 0, 0, 0, 0}, 10442 {0x94, 0, 0, 0, 0}, 10443 {0xFFFF, 0, 0, 0, 0}, 10444 }; 10445 10446 static struct radio_regs regs_SYN_2056_rev8[] = { 10447 {0x02, 0, 0, 0, 0}, 10448 {0x03, 0, 0, 0, 0}, 10449 {0x04, 0, 0, 0, 0}, 10450 {0x05, 0, 0, 0, 0}, 10451 {0x06, 0, 0, 0, 0}, 10452 {0x07, 0, 0, 0, 0}, 10453 {0x08, 0, 0, 0, 0}, 10454 {0x09, 0x1, 0x1, 0, 0}, 10455 {0x0A, 0, 0, 0, 0}, 10456 {0x0B, 0, 0, 0, 0}, 10457 {0x0C, 0, 0, 0, 0}, 10458 {0x0D, 0, 0, 0, 0}, 10459 {0x0E, 0, 0, 0, 0}, 10460 {0x0F, 0, 0, 0, 0}, 10461 {0x10, 0, 0, 0, 0}, 10462 {0x11, 0, 0, 0, 0}, 10463 {0x12, 0, 0, 0, 0}, 10464 {0x13, 0, 0, 0, 0}, 10465 {0x14, 0, 0, 0, 0}, 10466 {0x15, 0, 0, 0, 0}, 10467 {0x16, 0, 0, 0, 0}, 10468 {0x17, 0, 0, 0, 0}, 10469 {0x18, 0, 0, 0, 0}, 10470 {0x19, 0, 0, 0, 0}, 10471 {0x1A, 0, 0, 0, 0}, 10472 {0x1B, 0, 0, 0, 0}, 10473 {0x1C, 0, 0, 0, 0}, 10474 {0x1D, 0, 0, 0, 0}, 10475 {0x1E, 0, 0, 0, 0}, 10476 {0x1F, 0, 0, 0, 0}, 10477 {0x20, 0, 0, 0, 0}, 10478 {0x21, 0, 0, 0, 0}, 10479 {0x22, 0x60, 0x60, 0, 0}, 10480 {0x23, 0x6, 0x6, 0, 0}, 10481 {0x24, 0xc, 0xc, 0, 0}, 10482 {0x25, 0, 0, 0, 0}, 10483 {0x26, 0, 0, 0, 0}, 10484 {0x27, 0, 0, 0, 0}, 10485 {0x28, 0x1, 0x1, 0, 0}, 10486 {0x29, 0, 0, 0, 0}, 10487 {0x2A, 0, 0, 0, 0}, 10488 {0x2B, 0, 0, 0, 0}, 10489 {0x2C, 0, 0, 0, 0}, 10490 {0x2D, 0, 0, 0, 0}, 10491 {0x2E, 0, 0, 0, 0}, 10492 {0x2F, 0x1f, 0x1f, 0, 0}, 10493 {0x30, 0x15, 0x15, 0, 0}, 10494 {0x31, 0xf, 0xf, 0, 0}, 10495 {0x32, 0, 0, 0, 0}, 10496 {0x33, 0, 0, 0, 0}, 10497 {0x34, 0, 0, 0, 0}, 10498 {0x35, 0, 0, 0, 0}, 10499 {0x36, 0, 0, 0, 0}, 10500 {0x37, 0, 0, 0, 0}, 10501 {0x38, 0, 0, 0, 0}, 10502 {0x39, 0, 0, 0, 0}, 10503 {0x3A, 0, 0, 0, 0}, 10504 {0x3B, 0, 0, 0, 0}, 10505 {0x3C, 0x13, 0x13, 0, 0}, 10506 {0x3D, 0xf, 0xf, 0, 0}, 10507 {0x3E, 0x18, 0x18, 0, 0}, 10508 {0x3F, 0, 0, 0, 0}, 10509 {0x40, 0, 0, 0, 0}, 10510 {0x41, 0x20, 0x20, 0, 0}, 10511 {0x42, 0x20, 0x20, 0, 0}, 10512 {0x43, 0, 0, 0, 0}, 10513 {0x44, 0x77, 0x77, 0, 0}, 10514 {0x45, 0x7, 0x7, 0, 0}, 10515 {0x46, 0x1, 0x1, 0, 0}, 10516 {0x47, 0x4, 0x4, 0, 0}, 10517 {0x48, 0xf, 0xf, 0, 0}, 10518 {0x49, 0x30, 0x30, 0, 0}, 10519 {0x4A, 0x32, 0x32, 0, 0}, 10520 {0x4B, 0xd, 0xd, 0, 0}, 10521 {0x4C, 0xd, 0xd, 0, 0}, 10522 {0x4D, 0x4, 0x4, 0, 0}, 10523 {0x4E, 0x6, 0x6, 0, 0}, 10524 {0x4F, 0x1, 0x1, 0, 0}, 10525 {0x50, 0x1c, 0x1c, 0, 0}, 10526 {0x51, 0x2, 0x2, 0, 0}, 10527 {0x52, 0x2, 0x2, 0, 0}, 10528 {0x53, 0xf7, 0xf7, 1, 1}, 10529 {0x54, 0xb4, 0xb4, 0, 0}, 10530 {0x55, 0xd2, 0xd2, 0, 0}, 10531 {0x56, 0, 0, 0, 0}, 10532 {0x57, 0, 0, 0, 0}, 10533 {0x58, 0x4, 0x4, 0, 0}, 10534 {0x59, 0x96, 0x96, 0, 0}, 10535 {0x5A, 0x3e, 0x3e, 0, 0}, 10536 {0x5B, 0x3e, 0x3e, 0, 0}, 10537 {0x5C, 0x13, 0x13, 0, 0}, 10538 {0x5D, 0x2, 0x2, 0, 0}, 10539 {0x5E, 0, 0, 0, 0}, 10540 {0x5F, 0x7, 0x7, 0, 0}, 10541 {0x60, 0x7, 0x7, 1, 1}, 10542 {0x61, 0x8, 0x8, 0, 0}, 10543 {0x62, 0x3, 0x3, 0, 0}, 10544 {0x63, 0, 0, 0, 0}, 10545 {0x64, 0, 0, 0, 0}, 10546 {0x65, 0, 0, 0, 0}, 10547 {0x66, 0, 0, 0, 0}, 10548 {0x67, 0, 0, 0, 0}, 10549 {0x68, 0x40, 0x40, 0, 0}, 10550 {0x69, 0, 0, 0, 0}, 10551 {0x6A, 0, 0, 0, 0}, 10552 {0x6B, 0, 0, 0, 0}, 10553 {0x6C, 0, 0, 0, 0}, 10554 {0x6D, 0x1, 0x1, 0, 0}, 10555 {0x6E, 0, 0, 0, 0}, 10556 {0x6F, 0, 0, 0, 0}, 10557 {0x70, 0x60, 0x60, 0, 0}, 10558 {0x71, 0x66, 0x66, 0, 0}, 10559 {0x72, 0xc, 0xc, 0, 0}, 10560 {0x73, 0x66, 0x66, 0, 0}, 10561 {0x74, 0x8f, 0x8f, 1, 1}, 10562 {0x75, 0, 0, 0, 0}, 10563 {0x76, 0xcc, 0xcc, 0, 0}, 10564 {0x77, 0x1, 0x1, 0, 0}, 10565 {0x78, 0x66, 0x66, 0, 0}, 10566 {0x79, 0x66, 0x66, 0, 0}, 10567 {0x7A, 0, 0, 0, 0}, 10568 {0x7B, 0, 0, 0, 0}, 10569 {0x7C, 0, 0, 0, 0}, 10570 {0x7D, 0, 0, 0, 0}, 10571 {0x7E, 0, 0, 0, 0}, 10572 {0x7F, 0, 0, 0, 0}, 10573 {0x80, 0, 0, 0, 0}, 10574 {0x81, 0, 0, 0, 0}, 10575 {0x82, 0, 0, 0, 0}, 10576 {0x83, 0, 0, 0, 0}, 10577 {0x84, 0, 0, 0, 0}, 10578 {0x85, 0xff, 0xff, 0, 0}, 10579 {0x86, 0, 0, 0, 0}, 10580 {0x87, 0, 0, 0, 0}, 10581 {0x88, 0, 0, 0, 0}, 10582 {0x89, 0, 0, 0, 0}, 10583 {0x8A, 0, 0, 0, 0}, 10584 {0x8B, 0, 0, 0, 0}, 10585 {0x8C, 0, 0, 0, 0}, 10586 {0x8D, 0, 0, 0, 0}, 10587 {0x8E, 0, 0, 0, 0}, 10588 {0x8F, 0, 0, 0, 0}, 10589 {0x90, 0, 0, 0, 0}, 10590 {0x91, 0, 0, 0, 0}, 10591 {0x92, 0, 0, 0, 0}, 10592 {0x93, 0, 0, 0, 0}, 10593 {0x94, 0, 0, 0, 0}, 10594 {0x95, 0, 0, 0, 0}, 10595 {0x96, 0, 0, 0, 0}, 10596 {0x97, 0, 0, 0, 0}, 10597 {0x98, 0, 0, 0, 0}, 10598 {0x99, 0, 0, 0, 0}, 10599 {0x9A, 0, 0, 0, 0}, 10600 {0x9B, 0, 0, 0, 0}, 10601 {0x9C, 0, 0, 0, 0}, 10602 {0x9D, 0, 0, 0, 0}, 10603 {0x9E, 0, 0, 0, 0}, 10604 {0x9F, 0x6, 0x6, 0, 0}, 10605 {0xA0, 0x66, 0x66, 0, 0}, 10606 {0xA1, 0x66, 0x66, 0, 0}, 10607 {0xA2, 0x66, 0x66, 0, 0}, 10608 {0xA3, 0x66, 0x66, 0, 0}, 10609 {0xA4, 0x66, 0x66, 0, 0}, 10610 {0xA5, 0x66, 0x66, 0, 0}, 10611 {0xA6, 0x66, 0x66, 0, 0}, 10612 {0xA7, 0x66, 0x66, 0, 0}, 10613 {0xA8, 0x66, 0x66, 0, 0}, 10614 {0xA9, 0x66, 0x66, 0, 0}, 10615 {0xAA, 0x66, 0x66, 0, 0}, 10616 {0xAB, 0x66, 0x66, 0, 0}, 10617 {0xAC, 0x66, 0x66, 0, 0}, 10618 {0xAD, 0x66, 0x66, 0, 0}, 10619 {0xAE, 0x66, 0x66, 0, 0}, 10620 {0xAF, 0x66, 0x66, 0, 0}, 10621 {0xB0, 0x66, 0x66, 0, 0}, 10622 {0xB1, 0x66, 0x66, 0, 0}, 10623 {0xB2, 0x66, 0x66, 0, 0}, 10624 {0xB3, 0xa, 0xa, 0, 0}, 10625 {0xB4, 0, 0, 0, 0}, 10626 {0xB5, 0, 0, 0, 0}, 10627 {0xB6, 0, 0, 0, 0}, 10628 {0xFFFF, 0, 0, 0, 0}, 10629 }; 10630 10631 static struct radio_regs regs_TX_2056_rev8[] = { 10632 {0x02, 0, 0, 0, 0}, 10633 {0x03, 0, 0, 0, 0}, 10634 {0x04, 0, 0, 0, 0}, 10635 {0x05, 0, 0, 0, 0}, 10636 {0x06, 0, 0, 0, 0}, 10637 {0x07, 0, 0, 0, 0}, 10638 {0x08, 0, 0, 0, 0}, 10639 {0x09, 0, 0, 0, 0}, 10640 {0x0A, 0, 0, 0, 0}, 10641 {0x0B, 0, 0, 0, 0}, 10642 {0x0C, 0, 0, 0, 0}, 10643 {0x0D, 0, 0, 0, 0}, 10644 {0x0E, 0, 0, 0, 0}, 10645 {0x0F, 0, 0, 0, 0}, 10646 {0x10, 0, 0, 0, 0}, 10647 {0x11, 0, 0, 0, 0}, 10648 {0x12, 0, 0, 0, 0}, 10649 {0x13, 0, 0, 0, 0}, 10650 {0x14, 0, 0, 0, 0}, 10651 {0x15, 0, 0, 0, 0}, 10652 {0x16, 0, 0, 0, 0}, 10653 {0x17, 0, 0, 0, 0}, 10654 {0x18, 0, 0, 0, 0}, 10655 {0x19, 0, 0, 0, 0}, 10656 {0x1A, 0, 0, 0, 0}, 10657 {0x1B, 0, 0, 0, 0}, 10658 {0x1C, 0, 0, 0, 0}, 10659 {0x1D, 0, 0, 0, 0}, 10660 {0x1E, 0, 0, 0, 0}, 10661 {0x1F, 0, 0, 0, 0}, 10662 {0x20, 0, 0, 0, 0}, 10663 {0x21, 0x88, 0x88, 0, 0}, 10664 {0x22, 0x88, 0x88, 0, 0}, 10665 {0x23, 0x88, 0x88, 0, 0}, 10666 {0x24, 0x88, 0x88, 0, 0}, 10667 {0x25, 0xc, 0xc, 0, 0}, 10668 {0x26, 0, 0, 0, 0}, 10669 {0x27, 0x3, 0x3, 0, 0}, 10670 {0x28, 0, 0, 0, 0}, 10671 {0x29, 0x3, 0x3, 0, 0}, 10672 {0x2A, 0x37, 0x37, 0, 0}, 10673 {0x2B, 0x3, 0x3, 0, 0}, 10674 {0x2C, 0, 0, 0, 0}, 10675 {0x2D, 0, 0, 0, 0}, 10676 {0x2E, 0x1, 0x1, 0, 0}, 10677 {0x2F, 0x1, 0x1, 0, 0}, 10678 {0x30, 0, 0, 0, 0}, 10679 {0x31, 0, 0, 0, 0}, 10680 {0x32, 0, 0, 0, 0}, 10681 {0x33, 0x11, 0x11, 0, 0}, 10682 {0x34, 0xee, 0xee, 1, 1}, 10683 {0x35, 0, 0, 0, 0}, 10684 {0x36, 0, 0, 0, 0}, 10685 {0x37, 0x3, 0x3, 0, 0}, 10686 {0x38, 0x50, 0x50, 1, 1}, 10687 {0x39, 0, 0, 0, 0}, 10688 {0x3A, 0x50, 0x50, 1, 1}, 10689 {0x3B, 0, 0, 0, 0}, 10690 {0x3C, 0x6e, 0x6e, 0, 0}, 10691 {0x3D, 0xf0, 0xf0, 1, 1}, 10692 {0x3E, 0, 0, 0, 0}, 10693 {0x3F, 0, 0, 0, 0}, 10694 {0x40, 0, 0, 0, 0}, 10695 {0x41, 0x3, 0x3, 0, 0}, 10696 {0x42, 0x3, 0x3, 0, 0}, 10697 {0x43, 0, 0, 0, 0}, 10698 {0x44, 0x1e, 0x1e, 0, 0}, 10699 {0x45, 0, 0, 0, 0}, 10700 {0x46, 0x6e, 0x6e, 0, 0}, 10701 {0x47, 0xf0, 0xf0, 1, 1}, 10702 {0x48, 0, 0, 0, 0}, 10703 {0x49, 0x2, 0x2, 0, 0}, 10704 {0x4A, 0xff, 0xff, 1, 1}, 10705 {0x4B, 0xc, 0xc, 0, 0}, 10706 {0x4C, 0, 0, 0, 0}, 10707 {0x4D, 0x38, 0x38, 0, 0}, 10708 {0x4E, 0x70, 0x70, 1, 1}, 10709 {0x4F, 0x2, 0x2, 0, 0}, 10710 {0x50, 0x88, 0x88, 0, 0}, 10711 {0x51, 0xc, 0xc, 0, 0}, 10712 {0x52, 0, 0, 0, 0}, 10713 {0x53, 0x8, 0x8, 0, 0}, 10714 {0x54, 0x70, 0x70, 1, 1}, 10715 {0x55, 0x2, 0x2, 0, 0}, 10716 {0x56, 0xff, 0xff, 1, 1}, 10717 {0x57, 0, 0, 0, 0}, 10718 {0x58, 0x83, 0x83, 0, 0}, 10719 {0x59, 0x77, 0x77, 1, 1}, 10720 {0x5A, 0, 0, 0, 0}, 10721 {0x5B, 0x2, 0x2, 0, 0}, 10722 {0x5C, 0x88, 0x88, 0, 0}, 10723 {0x5D, 0, 0, 0, 0}, 10724 {0x5E, 0x8, 0x8, 0, 0}, 10725 {0x5F, 0x77, 0x77, 1, 1}, 10726 {0x60, 0x1, 0x1, 0, 0}, 10727 {0x61, 0, 0, 0, 0}, 10728 {0x62, 0x7, 0x7, 0, 0}, 10729 {0x63, 0, 0, 0, 0}, 10730 {0x64, 0x7, 0x7, 0, 0}, 10731 {0x65, 0, 0, 0, 0}, 10732 {0x66, 0, 0, 0, 0}, 10733 {0x67, 0, 0, 1, 1}, 10734 {0x68, 0, 0, 0, 0}, 10735 {0x69, 0xa, 0xa, 0, 0}, 10736 {0x6A, 0, 0, 0, 0}, 10737 {0x6B, 0, 0, 0, 0}, 10738 {0x6C, 0, 0, 0, 0}, 10739 {0x6D, 0, 0, 0, 0}, 10740 {0x6E, 0, 0, 0, 0}, 10741 {0x6F, 0, 0, 0, 0}, 10742 {0x70, 0, 0, 0, 0}, 10743 {0x71, 0x2, 0x2, 0, 0}, 10744 {0x72, 0, 0, 0, 0}, 10745 {0x73, 0, 0, 0, 0}, 10746 {0x74, 0xe, 0xe, 0, 0}, 10747 {0x75, 0xe, 0xe, 0, 0}, 10748 {0x76, 0xe, 0xe, 0, 0}, 10749 {0x77, 0x13, 0x13, 0, 0}, 10750 {0x78, 0x13, 0x13, 0, 0}, 10751 {0x79, 0x1b, 0x1b, 0, 0}, 10752 {0x7A, 0x1b, 0x1b, 0, 0}, 10753 {0x7B, 0x55, 0x55, 0, 0}, 10754 {0x7C, 0x5b, 0x5b, 0, 0}, 10755 {0x7D, 0x30, 0x30, 1, 1}, 10756 {0x7E, 0, 0, 0, 0}, 10757 {0x7F, 0, 0, 0, 0}, 10758 {0x80, 0, 0, 0, 0}, 10759 {0x81, 0, 0, 0, 0}, 10760 {0x82, 0, 0, 0, 0}, 10761 {0x83, 0, 0, 0, 0}, 10762 {0x84, 0, 0, 0, 0}, 10763 {0x85, 0, 0, 0, 0}, 10764 {0x86, 0, 0, 0, 0}, 10765 {0x87, 0, 0, 0, 0}, 10766 {0x88, 0, 0, 0, 0}, 10767 {0x89, 0, 0, 0, 0}, 10768 {0x8A, 0, 0, 0, 0}, 10769 {0x8B, 0, 0, 0, 0}, 10770 {0x8C, 0, 0, 0, 0}, 10771 {0x8D, 0, 0, 0, 0}, 10772 {0x8E, 0, 0, 0, 0}, 10773 {0x8F, 0, 0, 0, 0}, 10774 {0x90, 0, 0, 0, 0}, 10775 {0x91, 0, 0, 0, 0}, 10776 {0x92, 0, 0, 0, 0}, 10777 {0x93, 0x70, 0x70, 0, 0}, 10778 {0x94, 0x70, 0x70, 0, 0}, 10779 {0x95, 0x70, 0x70, 0, 0}, 10780 {0x96, 0x70, 0x70, 0, 0}, 10781 {0x97, 0x70, 0x70, 0, 0}, 10782 {0x98, 0x70, 0x70, 0, 0}, 10783 {0x99, 0x70, 0x70, 0, 0}, 10784 {0x9A, 0x70, 0x70, 0, 0}, 10785 {0xFFFF, 0, 0, 0, 0}, 10786 }; 10787 10788 static struct radio_regs regs_RX_2056_rev8[] = { 10789 {0x02, 0, 0, 0, 0}, 10790 {0x03, 0, 0, 0, 0}, 10791 {0x04, 0, 0, 0, 0}, 10792 {0x05, 0, 0, 0, 0}, 10793 {0x06, 0, 0, 0, 0}, 10794 {0x07, 0, 0, 0, 0}, 10795 {0x08, 0, 0, 0, 0}, 10796 {0x09, 0, 0, 0, 0}, 10797 {0x0A, 0, 0, 0, 0}, 10798 {0x0B, 0, 0, 0, 0}, 10799 {0x0C, 0, 0, 0, 0}, 10800 {0x0D, 0, 0, 0, 0}, 10801 {0x0E, 0, 0, 0, 0}, 10802 {0x0F, 0, 0, 0, 0}, 10803 {0x10, 0, 0, 0, 0}, 10804 {0x11, 0, 0, 0, 0}, 10805 {0x12, 0, 0, 0, 0}, 10806 {0x13, 0, 0, 0, 0}, 10807 {0x14, 0, 0, 0, 0}, 10808 {0x15, 0, 0, 0, 0}, 10809 {0x16, 0, 0, 0, 0}, 10810 {0x17, 0, 0, 0, 0}, 10811 {0x18, 0, 0, 0, 0}, 10812 {0x19, 0, 0, 0, 0}, 10813 {0x1A, 0, 0, 0, 0}, 10814 {0x1B, 0, 0, 0, 0}, 10815 {0x1C, 0, 0, 0, 0}, 10816 {0x1D, 0, 0, 0, 0}, 10817 {0x1E, 0, 0, 0, 0}, 10818 {0x1F, 0, 0, 0, 0}, 10819 {0x20, 0x3, 0x3, 0, 0}, 10820 {0x21, 0, 0, 0, 0}, 10821 {0x22, 0, 0, 0, 0}, 10822 {0x23, 0x90, 0x90, 0, 0}, 10823 {0x24, 0x55, 0x55, 0, 0}, 10824 {0x25, 0x15, 0x15, 0, 0}, 10825 {0x26, 0x5, 0x5, 0, 0}, 10826 {0x27, 0x15, 0x15, 0, 0}, 10827 {0x28, 0x5, 0x5, 0, 0}, 10828 {0x29, 0x20, 0x20, 0, 0}, 10829 {0x2A, 0x11, 0x11, 0, 0}, 10830 {0x2B, 0x90, 0x90, 0, 0}, 10831 {0x2C, 0, 0, 0, 0}, 10832 {0x2D, 0x88, 0x88, 0, 0}, 10833 {0x2E, 0x32, 0x32, 0, 0}, 10834 {0x2F, 0x77, 0x77, 0, 0}, 10835 {0x30, 0x17, 0x17, 1, 1}, 10836 {0x31, 0xff, 0xff, 1, 1}, 10837 {0x32, 0x20, 0x20, 0, 0}, 10838 {0x33, 0, 0, 0, 0}, 10839 {0x34, 0x88, 0x88, 0, 0}, 10840 {0x35, 0x32, 0x32, 0, 0}, 10841 {0x36, 0x77, 0x77, 0, 0}, 10842 {0x37, 0x17, 0x17, 1, 1}, 10843 {0x38, 0xf0, 0xf0, 1, 1}, 10844 {0x39, 0x20, 0x20, 0, 0}, 10845 {0x3A, 0x8, 0x8, 0, 0}, 10846 {0x3B, 0x55, 0x55, 1, 1}, 10847 {0x3C, 0, 0, 0, 0}, 10848 {0x3D, 0x88, 0x88, 1, 1}, 10849 {0x3E, 0, 0, 0, 0}, 10850 {0x3F, 0x44, 0x44, 0, 0}, 10851 {0x40, 0x7, 0x7, 1, 1}, 10852 {0x41, 0x6, 0x6, 0, 0}, 10853 {0x42, 0x4, 0x4, 0, 0}, 10854 {0x43, 0, 0, 0, 0}, 10855 {0x44, 0x8, 0x8, 0, 0}, 10856 {0x45, 0x55, 0x55, 1, 1}, 10857 {0x46, 0, 0, 0, 0}, 10858 {0x47, 0x11, 0x11, 0, 0}, 10859 {0x48, 0, 0, 0, 0}, 10860 {0x49, 0x44, 0x44, 0, 0}, 10861 {0x4A, 0x7, 0x7, 0, 0}, 10862 {0x4B, 0x6, 0x6, 0, 0}, 10863 {0x4C, 0x4, 0x4, 0, 0}, 10864 {0x4D, 0, 0, 0, 0}, 10865 {0x4E, 0, 0, 0, 0}, 10866 {0x4F, 0x26, 0x26, 1, 1}, 10867 {0x50, 0x26, 0x26, 1, 1}, 10868 {0x51, 0xf, 0xf, 1, 1}, 10869 {0x52, 0xf, 0xf, 1, 1}, 10870 {0x53, 0x44, 0x44, 0, 0}, 10871 {0x54, 0, 0, 0, 0}, 10872 {0x55, 0, 0, 0, 0}, 10873 {0x56, 0x8, 0x8, 0, 0}, 10874 {0x57, 0x8, 0x8, 0, 0}, 10875 {0x58, 0x7, 0x7, 0, 0}, 10876 {0x59, 0x22, 0x22, 0, 0}, 10877 {0x5A, 0x22, 0x22, 0, 0}, 10878 {0x5B, 0x2, 0x2, 0, 0}, 10879 {0x5C, 0x4, 0x4, 1, 1}, 10880 {0x5D, 0x7, 0x7, 0, 0}, 10881 {0x5E, 0x55, 0x55, 0, 0}, 10882 {0x5F, 0x23, 0x23, 0, 0}, 10883 {0x60, 0x41, 0x41, 0, 0}, 10884 {0x61, 0x1, 0x1, 0, 0}, 10885 {0x62, 0xa, 0xa, 0, 0}, 10886 {0x63, 0, 0, 0, 0}, 10887 {0x64, 0, 0, 0, 0}, 10888 {0x65, 0, 0, 0, 0}, 10889 {0x66, 0, 0, 0, 0}, 10890 {0x67, 0, 0, 0, 0}, 10891 {0x68, 0, 0, 0, 0}, 10892 {0x69, 0, 0, 0, 0}, 10893 {0x6A, 0, 0, 0, 0}, 10894 {0x6B, 0xc, 0xc, 0, 0}, 10895 {0x6C, 0, 0, 0, 0}, 10896 {0x6D, 0, 0, 0, 0}, 10897 {0x6E, 0, 0, 0, 0}, 10898 {0x6F, 0, 0, 0, 0}, 10899 {0x70, 0, 0, 0, 0}, 10900 {0x71, 0, 0, 0, 0}, 10901 {0x72, 0x22, 0x22, 0, 0}, 10902 {0x73, 0x22, 0x22, 0, 0}, 10903 {0x74, 0, 0, 1, 1}, 10904 {0x75, 0xa, 0xa, 0, 0}, 10905 {0x76, 0x1, 0x1, 0, 0}, 10906 {0x77, 0x22, 0x22, 0, 0}, 10907 {0x78, 0x30, 0x30, 0, 0}, 10908 {0x79, 0, 0, 0, 0}, 10909 {0x7A, 0, 0, 0, 0}, 10910 {0x7B, 0, 0, 0, 0}, 10911 {0x7C, 0, 0, 0, 0}, 10912 {0x7D, 0x5, 0x5, 1, 1}, 10913 {0x7E, 0, 0, 0, 0}, 10914 {0x7F, 0, 0, 0, 0}, 10915 {0x80, 0, 0, 0, 0}, 10916 {0x81, 0, 0, 0, 0}, 10917 {0x82, 0, 0, 0, 0}, 10918 {0x83, 0, 0, 0, 0}, 10919 {0x84, 0, 0, 0, 0}, 10920 {0x85, 0, 0, 0, 0}, 10921 {0x86, 0, 0, 0, 0}, 10922 {0x87, 0, 0, 0, 0}, 10923 {0x88, 0, 0, 0, 0}, 10924 {0x89, 0, 0, 0, 0}, 10925 {0x8A, 0, 0, 0, 0}, 10926 {0x8B, 0, 0, 0, 0}, 10927 {0x8C, 0, 0, 0, 0}, 10928 {0x8D, 0, 0, 0, 0}, 10929 {0x8E, 0, 0, 0, 0}, 10930 {0x8F, 0, 0, 0, 0}, 10931 {0x90, 0, 0, 0, 0}, 10932 {0x91, 0, 0, 0, 0}, 10933 {0x92, 0, 0, 0, 0}, 10934 {0x93, 0, 0, 0, 0}, 10935 {0x94, 0, 0, 0, 0}, 10936 {0xFFFF, 0, 0, 0, 0}, 10937 }; 10938 10939 static const struct radio_regs regs_SYN_2056_rev11[] = { 10940 {0x02, 0, 0, 0, 0}, 10941 {0x03, 0, 0, 0, 0}, 10942 {0x04, 0, 0, 0, 0}, 10943 {0x05, 0, 0, 0, 0}, 10944 {0x06, 0, 0, 0, 0}, 10945 {0x07, 0, 0, 0, 0}, 10946 {0x08, 0, 0, 0, 0}, 10947 {0x09, 0x1, 0x1, 0, 0}, 10948 {0x0A, 0, 0, 0, 0}, 10949 {0x0B, 0, 0, 0, 0}, 10950 {0x0C, 0, 0, 0, 0}, 10951 {0x0D, 0, 0, 0, 0}, 10952 {0x0E, 0, 0, 0, 0}, 10953 {0x0F, 0, 0, 0, 0}, 10954 {0x10, 0, 0, 0, 0}, 10955 {0x11, 0, 0, 0, 0}, 10956 {0x12, 0, 0, 0, 0}, 10957 {0x13, 0, 0, 0, 0}, 10958 {0x14, 0, 0, 0, 0}, 10959 {0x15, 0, 0, 0, 0}, 10960 {0x16, 0, 0, 0, 0}, 10961 {0x17, 0, 0, 0, 0}, 10962 {0x18, 0, 0, 0, 0}, 10963 {0x19, 0, 0, 0, 0}, 10964 {0x1A, 0, 0, 0, 0}, 10965 {0x1B, 0, 0, 0, 0}, 10966 {0x1C, 0, 0, 0, 0}, 10967 {0x1D, 0, 0, 0, 0}, 10968 {0x1E, 0, 0, 0, 0}, 10969 {0x1F, 0, 0, 0, 0}, 10970 {0x20, 0, 0, 0, 0}, 10971 {0x21, 0, 0, 0, 0}, 10972 {0x22, 0x60, 0x60, 0, 0}, 10973 {0x23, 0x6, 0x6, 0, 0}, 10974 {0x24, 0xc, 0xc, 0, 0}, 10975 {0x25, 0, 0, 0, 0}, 10976 {0x26, 0, 0, 0, 0}, 10977 {0x27, 0, 0, 0, 0}, 10978 {0x28, 0x1, 0x1, 0, 0}, 10979 {0x29, 0, 0, 0, 0}, 10980 {0x2A, 0, 0, 0, 0}, 10981 {0x2B, 0, 0, 0, 0}, 10982 {0x2C, 0, 0, 0, 0}, 10983 {0x2D, 0, 0, 0, 0}, 10984 {0x2E, 0, 0, 0, 0}, 10985 {0x2F, 0x1f, 0x1f, 0, 0}, 10986 {0x30, 0x15, 0x15, 0, 0}, 10987 {0x31, 0xf, 0xf, 0, 0}, 10988 {0x32, 0, 0, 0, 0}, 10989 {0x33, 0, 0, 0, 0}, 10990 {0x34, 0, 0, 0, 0}, 10991 {0x35, 0, 0, 0, 0}, 10992 {0x36, 0, 0, 0, 0}, 10993 {0x37, 0, 0, 0, 0}, 10994 {0x38, 0, 0, 0, 0}, 10995 {0x39, 0, 0, 0, 0}, 10996 {0x3A, 0, 0, 0, 0}, 10997 {0x3B, 0, 0, 0, 0}, 10998 {0x3C, 0x13, 0x13, 0, 0}, 10999 {0x3D, 0xf, 0xf, 0, 0}, 11000 {0x3E, 0x18, 0x18, 0, 0}, 11001 {0x3F, 0, 0, 0, 0}, 11002 {0x40, 0, 0, 0, 0}, 11003 {0x41, 0x20, 0x20, 0, 0}, 11004 {0x42, 0x20, 0x20, 0, 0}, 11005 {0x43, 0, 0, 0, 0}, 11006 {0x44, 0x77, 0x77, 0, 0}, 11007 {0x45, 0x7, 0x7, 0, 0}, 11008 {0x46, 0x1, 0x1, 0, 0}, 11009 {0x47, 0x6, 0x6, 1, 1}, 11010 {0x48, 0xf, 0xf, 0, 0}, 11011 {0x49, 0x3f, 0x3f, 1, 1}, 11012 {0x4A, 0x32, 0x32, 0, 0}, 11013 {0x4B, 0x6, 0x6, 1, 1}, 11014 {0x4C, 0x6, 0x6, 1, 1}, 11015 {0x4D, 0x4, 0x4, 0, 0}, 11016 {0x4E, 0x2b, 0x2b, 1, 1}, 11017 {0x4F, 0x1, 0x1, 0, 0}, 11018 {0x50, 0x1c, 0x1c, 0, 0}, 11019 {0x51, 0x2, 0x2, 0, 0}, 11020 {0x52, 0x2, 0x2, 0, 0}, 11021 {0x53, 0xf7, 0xf7, 1, 1}, 11022 {0x54, 0xb4, 0xb4, 0, 0}, 11023 {0x55, 0xd2, 0xd2, 0, 0}, 11024 {0x56, 0, 0, 0, 0}, 11025 {0x57, 0, 0, 0, 0}, 11026 {0x58, 0x4, 0x4, 0, 0}, 11027 {0x59, 0x96, 0x96, 0, 0}, 11028 {0x5A, 0x3e, 0x3e, 0, 0}, 11029 {0x5B, 0x3e, 0x3e, 0, 0}, 11030 {0x5C, 0x13, 0x13, 0, 0}, 11031 {0x5D, 0x2, 0x2, 0, 0}, 11032 {0x5E, 0, 0, 0, 0}, 11033 {0x5F, 0x7, 0x7, 0, 0}, 11034 {0x60, 0x7, 0x7, 1, 1}, 11035 {0x61, 0x8, 0x8, 0, 0}, 11036 {0x62, 0x3, 0x3, 0, 0}, 11037 {0x63, 0, 0, 0, 0}, 11038 {0x64, 0, 0, 0, 0}, 11039 {0x65, 0, 0, 0, 0}, 11040 {0x66, 0, 0, 0, 0}, 11041 {0x67, 0, 0, 0, 0}, 11042 {0x68, 0x40, 0x40, 0, 0}, 11043 {0x69, 0, 0, 0, 0}, 11044 {0x6A, 0, 0, 0, 0}, 11045 {0x6B, 0, 0, 0, 0}, 11046 {0x6C, 0, 0, 0, 0}, 11047 {0x6D, 0x1, 0x1, 0, 0}, 11048 {0x6E, 0, 0, 0, 0}, 11049 {0x6F, 0, 0, 0, 0}, 11050 {0x70, 0x60, 0x60, 0, 0}, 11051 {0x71, 0x66, 0x66, 0, 0}, 11052 {0x72, 0xc, 0xc, 0, 0}, 11053 {0x73, 0x66, 0x66, 0, 0}, 11054 {0x74, 0x8f, 0x8f, 1, 1}, 11055 {0x75, 0, 0, 0, 0}, 11056 {0x76, 0xcc, 0xcc, 0, 0}, 11057 {0x77, 0x1, 0x1, 0, 0}, 11058 {0x78, 0x66, 0x66, 0, 0}, 11059 {0x79, 0x66, 0x66, 0, 0}, 11060 {0x7A, 0, 0, 0, 0}, 11061 {0x7B, 0, 0, 0, 0}, 11062 {0x7C, 0, 0, 0, 0}, 11063 {0x7D, 0, 0, 0, 0}, 11064 {0x7E, 0, 0, 0, 0}, 11065 {0x7F, 0, 0, 0, 0}, 11066 {0x80, 0, 0, 0, 0}, 11067 {0x81, 0, 0, 0, 0}, 11068 {0x82, 0, 0, 0, 0}, 11069 {0x83, 0, 0, 0, 0}, 11070 {0x84, 0, 0, 0, 0}, 11071 {0x85, 0xff, 0xff, 0, 0}, 11072 {0x86, 0, 0, 0, 0}, 11073 {0x87, 0, 0, 0, 0}, 11074 {0x88, 0, 0, 0, 0}, 11075 {0x89, 0, 0, 0, 0}, 11076 {0x8A, 0, 0, 0, 0}, 11077 {0x8B, 0, 0, 0, 0}, 11078 {0x8C, 0, 0, 0, 0}, 11079 {0x8D, 0, 0, 0, 0}, 11080 {0x8E, 0, 0, 0, 0}, 11081 {0x8F, 0, 0, 0, 0}, 11082 {0x90, 0, 0, 0, 0}, 11083 {0x91, 0, 0, 0, 0}, 11084 {0x92, 0, 0, 0, 0}, 11085 {0x93, 0, 0, 0, 0}, 11086 {0x94, 0, 0, 0, 0}, 11087 {0x95, 0, 0, 0, 0}, 11088 {0x96, 0, 0, 0, 0}, 11089 {0x97, 0, 0, 0, 0}, 11090 {0x98, 0, 0, 0, 0}, 11091 {0x99, 0, 0, 0, 0}, 11092 {0x9A, 0, 0, 0, 0}, 11093 {0x9B, 0, 0, 0, 0}, 11094 {0x9C, 0, 0, 0, 0}, 11095 {0x9D, 0, 0, 0, 0}, 11096 {0x9E, 0, 0, 0, 0}, 11097 {0x9F, 0x6, 0x6, 0, 0}, 11098 {0xA0, 0x66, 0x66, 0, 0}, 11099 {0xA1, 0x66, 0x66, 0, 0}, 11100 {0xA2, 0x66, 0x66, 0, 0}, 11101 {0xA3, 0x66, 0x66, 0, 0}, 11102 {0xA4, 0x66, 0x66, 0, 0}, 11103 {0xA5, 0x66, 0x66, 0, 0}, 11104 {0xA6, 0x66, 0x66, 0, 0}, 11105 {0xA7, 0x66, 0x66, 0, 0}, 11106 {0xA8, 0x66, 0x66, 0, 0}, 11107 {0xA9, 0x66, 0x66, 0, 0}, 11108 {0xAA, 0x66, 0x66, 0, 0}, 11109 {0xAB, 0x66, 0x66, 0, 0}, 11110 {0xAC, 0x66, 0x66, 0, 0}, 11111 {0xAD, 0x66, 0x66, 0, 0}, 11112 {0xAE, 0x66, 0x66, 0, 0}, 11113 {0xAF, 0x66, 0x66, 0, 0}, 11114 {0xB0, 0x66, 0x66, 0, 0}, 11115 {0xB1, 0x66, 0x66, 0, 0}, 11116 {0xB2, 0x66, 0x66, 0, 0}, 11117 {0xB3, 0xa, 0xa, 0, 0}, 11118 {0xB4, 0, 0, 0, 0}, 11119 {0xB5, 0, 0, 0, 0}, 11120 {0xB6, 0, 0, 0, 0}, 11121 {0xFFFF, 0, 0, 0, 0}, 11122 }; 11123 11124 static const struct radio_regs regs_TX_2056_rev11[] = { 11125 {0x02, 0, 0, 0, 0}, 11126 {0x03, 0, 0, 0, 0}, 11127 {0x04, 0, 0, 0, 0}, 11128 {0x05, 0, 0, 0, 0}, 11129 {0x06, 0, 0, 0, 0}, 11130 {0x07, 0, 0, 0, 0}, 11131 {0x08, 0, 0, 0, 0}, 11132 {0x09, 0, 0, 0, 0}, 11133 {0x0A, 0, 0, 0, 0}, 11134 {0x0B, 0, 0, 0, 0}, 11135 {0x0C, 0, 0, 0, 0}, 11136 {0x0D, 0, 0, 0, 0}, 11137 {0x0E, 0, 0, 0, 0}, 11138 {0x0F, 0, 0, 0, 0}, 11139 {0x10, 0, 0, 0, 0}, 11140 {0x11, 0, 0, 0, 0}, 11141 {0x12, 0, 0, 0, 0}, 11142 {0x13, 0, 0, 0, 0}, 11143 {0x14, 0, 0, 0, 0}, 11144 {0x15, 0, 0, 0, 0}, 11145 {0x16, 0, 0, 0, 0}, 11146 {0x17, 0, 0, 0, 0}, 11147 {0x18, 0, 0, 0, 0}, 11148 {0x19, 0, 0, 0, 0}, 11149 {0x1A, 0, 0, 0, 0}, 11150 {0x1B, 0, 0, 0, 0}, 11151 {0x1C, 0, 0, 0, 0}, 11152 {0x1D, 0, 0, 0, 0}, 11153 {0x1E, 0, 0, 0, 0}, 11154 {0x1F, 0, 0, 0, 0}, 11155 {0x20, 0, 0, 0, 0}, 11156 {0x21, 0x88, 0x88, 0, 0}, 11157 {0x22, 0x88, 0x88, 0, 0}, 11158 {0x23, 0x88, 0x88, 0, 0}, 11159 {0x24, 0x88, 0x88, 0, 0}, 11160 {0x25, 0xc, 0xc, 0, 0}, 11161 {0x26, 0, 0, 0, 0}, 11162 {0x27, 0x3, 0x3, 0, 0}, 11163 {0x28, 0, 0, 0, 0}, 11164 {0x29, 0x3, 0x3, 0, 0}, 11165 {0x2A, 0x37, 0x37, 0, 0}, 11166 {0x2B, 0x3, 0x3, 0, 0}, 11167 {0x2C, 0, 0, 0, 0}, 11168 {0x2D, 0, 0, 0, 0}, 11169 {0x2E, 0x1, 0x1, 0, 0}, 11170 {0x2F, 0x1, 0x1, 0, 0}, 11171 {0x30, 0, 0, 0, 0}, 11172 {0x31, 0, 0, 0, 0}, 11173 {0x32, 0, 0, 0, 0}, 11174 {0x33, 0x11, 0x11, 0, 0}, 11175 {0x34, 0xee, 0xee, 1, 1}, 11176 {0x35, 0, 0, 0, 0}, 11177 {0x36, 0, 0, 0, 0}, 11178 {0x37, 0x3, 0x3, 0, 0}, 11179 {0x38, 0x50, 0x50, 1, 1}, 11180 {0x39, 0, 0, 0, 0}, 11181 {0x3A, 0x50, 0x50, 1, 1}, 11182 {0x3B, 0, 0, 0, 0}, 11183 {0x3C, 0x6e, 0x6e, 0, 0}, 11184 {0x3D, 0xf0, 0xf0, 1, 1}, 11185 {0x3E, 0, 0, 0, 0}, 11186 {0x3F, 0, 0, 0, 0}, 11187 {0x40, 0, 0, 0, 0}, 11188 {0x41, 0x3, 0x3, 0, 0}, 11189 {0x42, 0x3, 0x3, 0, 0}, 11190 {0x43, 0, 0, 0, 0}, 11191 {0x44, 0x1e, 0x1e, 0, 0}, 11192 {0x45, 0, 0, 0, 0}, 11193 {0x46, 0x6e, 0x6e, 0, 0}, 11194 {0x47, 0xf0, 0xf0, 1, 1}, 11195 {0x48, 0, 0, 0, 0}, 11196 {0x49, 0x2, 0x2, 0, 0}, 11197 {0x4A, 0xff, 0xff, 1, 1}, 11198 {0x4B, 0xc, 0xc, 0, 0}, 11199 {0x4C, 0, 0, 0, 0}, 11200 {0x4D, 0x38, 0x38, 0, 0}, 11201 {0x4E, 0x70, 0x70, 1, 1}, 11202 {0x4F, 0x2, 0x2, 0, 0}, 11203 {0x50, 0x88, 0x88, 0, 0}, 11204 {0x51, 0xc, 0xc, 0, 0}, 11205 {0x52, 0, 0, 0, 0}, 11206 {0x53, 0x8, 0x8, 0, 0}, 11207 {0x54, 0x70, 0x70, 1, 1}, 11208 {0x55, 0x2, 0x2, 0, 0}, 11209 {0x56, 0xff, 0xff, 1, 1}, 11210 {0x57, 0, 0, 0, 0}, 11211 {0x58, 0x83, 0x83, 0, 0}, 11212 {0x59, 0x77, 0x77, 1, 1}, 11213 {0x5A, 0, 0, 0, 0}, 11214 {0x5B, 0x2, 0x2, 0, 0}, 11215 {0x5C, 0x88, 0x88, 0, 0}, 11216 {0x5D, 0, 0, 0, 0}, 11217 {0x5E, 0x8, 0x8, 0, 0}, 11218 {0x5F, 0x77, 0x77, 1, 1}, 11219 {0x60, 0x1, 0x1, 0, 0}, 11220 {0x61, 0, 0, 0, 0}, 11221 {0x62, 0x7, 0x7, 0, 0}, 11222 {0x63, 0, 0, 0, 0}, 11223 {0x64, 0x7, 0x7, 0, 0}, 11224 {0x65, 0, 0, 0, 0}, 11225 {0x66, 0, 0, 0, 0}, 11226 {0x67, 0, 0, 1, 1}, 11227 {0x68, 0, 0, 0, 0}, 11228 {0x69, 0xa, 0xa, 0, 0}, 11229 {0x6A, 0, 0, 0, 0}, 11230 {0x6B, 0, 0, 0, 0}, 11231 {0x6C, 0, 0, 0, 0}, 11232 {0x6D, 0, 0, 0, 0}, 11233 {0x6E, 0, 0, 0, 0}, 11234 {0x6F, 0, 0, 0, 0}, 11235 {0x70, 0, 0, 0, 0}, 11236 {0x71, 0x2, 0x2, 0, 0}, 11237 {0x72, 0, 0, 0, 0}, 11238 {0x73, 0, 0, 0, 0}, 11239 {0x74, 0xe, 0xe, 0, 0}, 11240 {0x75, 0xe, 0xe, 0, 0}, 11241 {0x76, 0xe, 0xe, 0, 0}, 11242 {0x77, 0x13, 0x13, 0, 0}, 11243 {0x78, 0x13, 0x13, 0, 0}, 11244 {0x79, 0x1b, 0x1b, 0, 0}, 11245 {0x7A, 0x1b, 0x1b, 0, 0}, 11246 {0x7B, 0x55, 0x55, 0, 0}, 11247 {0x7C, 0x5b, 0x5b, 0, 0}, 11248 {0x7D, 0x30, 0x30, 1, 1}, 11249 {0x7E, 0, 0, 0, 0}, 11250 {0x7F, 0, 0, 0, 0}, 11251 {0x80, 0, 0, 0, 0}, 11252 {0x81, 0, 0, 0, 0}, 11253 {0x82, 0, 0, 0, 0}, 11254 {0x83, 0, 0, 0, 0}, 11255 {0x84, 0, 0, 0, 0}, 11256 {0x85, 0, 0, 0, 0}, 11257 {0x86, 0, 0, 0, 0}, 11258 {0x87, 0, 0, 0, 0}, 11259 {0x88, 0, 0, 0, 0}, 11260 {0x89, 0, 0, 0, 0}, 11261 {0x8A, 0, 0, 0, 0}, 11262 {0x8B, 0, 0, 0, 0}, 11263 {0x8C, 0, 0, 0, 0}, 11264 {0x8D, 0, 0, 0, 0}, 11265 {0x8E, 0, 0, 0, 0}, 11266 {0x8F, 0, 0, 0, 0}, 11267 {0x90, 0, 0, 0, 0}, 11268 {0x91, 0, 0, 0, 0}, 11269 {0x92, 0, 0, 0, 0}, 11270 {0x93, 0x70, 0x70, 0, 0}, 11271 {0x94, 0x70, 0x70, 0, 0}, 11272 {0x95, 0x70, 0x70, 0, 0}, 11273 {0x96, 0x70, 0x70, 0, 0}, 11274 {0x97, 0x70, 0x70, 0, 0}, 11275 {0x98, 0x70, 0x70, 0, 0}, 11276 {0x99, 0x70, 0x70, 0, 0}, 11277 {0x9A, 0x70, 0x70, 0, 0}, 11278 {0xFFFF, 0, 0, 0, 0}, 11279 }; 11280 11281 static const struct radio_regs regs_RX_2056_rev11[] = { 11282 {0x02, 0, 0, 0, 0}, 11283 {0x03, 0, 0, 0, 0}, 11284 {0x04, 0, 0, 0, 0}, 11285 {0x05, 0, 0, 0, 0}, 11286 {0x06, 0, 0, 0, 0}, 11287 {0x07, 0, 0, 0, 0}, 11288 {0x08, 0, 0, 0, 0}, 11289 {0x09, 0, 0, 0, 0}, 11290 {0x0A, 0, 0, 0, 0}, 11291 {0x0B, 0, 0, 0, 0}, 11292 {0x0C, 0, 0, 0, 0}, 11293 {0x0D, 0, 0, 0, 0}, 11294 {0x0E, 0, 0, 0, 0}, 11295 {0x0F, 0, 0, 0, 0}, 11296 {0x10, 0, 0, 0, 0}, 11297 {0x11, 0, 0, 0, 0}, 11298 {0x12, 0, 0, 0, 0}, 11299 {0x13, 0, 0, 0, 0}, 11300 {0x14, 0, 0, 0, 0}, 11301 {0x15, 0, 0, 0, 0}, 11302 {0x16, 0, 0, 0, 0}, 11303 {0x17, 0, 0, 0, 0}, 11304 {0x18, 0, 0, 0, 0}, 11305 {0x19, 0, 0, 0, 0}, 11306 {0x1A, 0, 0, 0, 0}, 11307 {0x1B, 0, 0, 0, 0}, 11308 {0x1C, 0, 0, 0, 0}, 11309 {0x1D, 0, 0, 0, 0}, 11310 {0x1E, 0, 0, 0, 0}, 11311 {0x1F, 0, 0, 0, 0}, 11312 {0x20, 0x3, 0x3, 0, 0}, 11313 {0x21, 0, 0, 0, 0}, 11314 {0x22, 0, 0, 0, 0}, 11315 {0x23, 0x90, 0x90, 0, 0}, 11316 {0x24, 0x55, 0x55, 0, 0}, 11317 {0x25, 0x15, 0x15, 0, 0}, 11318 {0x26, 0x5, 0x5, 0, 0}, 11319 {0x27, 0x15, 0x15, 0, 0}, 11320 {0x28, 0x5, 0x5, 0, 0}, 11321 {0x29, 0x20, 0x20, 0, 0}, 11322 {0x2A, 0x11, 0x11, 0, 0}, 11323 {0x2B, 0x90, 0x90, 0, 0}, 11324 {0x2C, 0, 0, 0, 0}, 11325 {0x2D, 0x88, 0x88, 0, 0}, 11326 {0x2E, 0x32, 0x32, 0, 0}, 11327 {0x2F, 0x77, 0x77, 0, 0}, 11328 {0x30, 0x17, 0x17, 1, 1}, 11329 {0x31, 0xff, 0xff, 1, 1}, 11330 {0x32, 0x20, 0x20, 0, 0}, 11331 {0x33, 0, 0, 0, 0}, 11332 {0x34, 0x88, 0x88, 0, 0}, 11333 {0x35, 0x32, 0x32, 0, 0}, 11334 {0x36, 0x77, 0x77, 0, 0}, 11335 {0x37, 0x17, 0x17, 1, 1}, 11336 {0x38, 0xf0, 0xf0, 1, 1}, 11337 {0x39, 0x20, 0x20, 0, 0}, 11338 {0x3A, 0x8, 0x8, 0, 0}, 11339 {0x3B, 0x55, 0x55, 1, 1}, 11340 {0x3C, 0, 0, 0, 0}, 11341 {0x3D, 0x88, 0x88, 1, 1}, 11342 {0x3E, 0, 0, 0, 0}, 11343 {0x3F, 0x44, 0x44, 0, 0}, 11344 {0x40, 0x7, 0x7, 1, 1}, 11345 {0x41, 0x6, 0x6, 0, 0}, 11346 {0x42, 0x4, 0x4, 0, 0}, 11347 {0x43, 0, 0, 0, 0}, 11348 {0x44, 0x8, 0x8, 0, 0}, 11349 {0x45, 0x55, 0x55, 1, 1}, 11350 {0x46, 0, 0, 0, 0}, 11351 {0x47, 0x11, 0x11, 0, 0}, 11352 {0x48, 0, 0, 0, 0}, 11353 {0x49, 0x44, 0x44, 0, 0}, 11354 {0x4A, 0x7, 0x7, 0, 0}, 11355 {0x4B, 0x6, 0x6, 0, 0}, 11356 {0x4C, 0x4, 0x4, 0, 0}, 11357 {0x4D, 0, 0, 0, 0}, 11358 {0x4E, 0, 0, 0, 0}, 11359 {0x4F, 0x26, 0x26, 1, 1}, 11360 {0x50, 0x26, 0x26, 1, 1}, 11361 {0x51, 0xf, 0xf, 1, 1}, 11362 {0x52, 0xf, 0xf, 1, 1}, 11363 {0x53, 0x44, 0x44, 0, 0}, 11364 {0x54, 0, 0, 0, 0}, 11365 {0x55, 0, 0, 0, 0}, 11366 {0x56, 0x8, 0x8, 0, 0}, 11367 {0x57, 0x8, 0x8, 0, 0}, 11368 {0x58, 0x7, 0x7, 0, 0}, 11369 {0x59, 0x22, 0x22, 0, 0}, 11370 {0x5A, 0x22, 0x22, 0, 0}, 11371 {0x5B, 0x2, 0x2, 0, 0}, 11372 {0x5C, 0x4, 0x4, 1, 1}, 11373 {0x5D, 0x7, 0x7, 0, 0}, 11374 {0x5E, 0x55, 0x55, 0, 0}, 11375 {0x5F, 0x23, 0x23, 0, 0}, 11376 {0x60, 0x41, 0x41, 0, 0}, 11377 {0x61, 0x1, 0x1, 0, 0}, 11378 {0x62, 0xa, 0xa, 0, 0}, 11379 {0x63, 0, 0, 0, 0}, 11380 {0x64, 0, 0, 0, 0}, 11381 {0x65, 0, 0, 0, 0}, 11382 {0x66, 0, 0, 0, 0}, 11383 {0x67, 0, 0, 0, 0}, 11384 {0x68, 0, 0, 0, 0}, 11385 {0x69, 0, 0, 0, 0}, 11386 {0x6A, 0, 0, 0, 0}, 11387 {0x6B, 0xc, 0xc, 0, 0}, 11388 {0x6C, 0, 0, 0, 0}, 11389 {0x6D, 0, 0, 0, 0}, 11390 {0x6E, 0, 0, 0, 0}, 11391 {0x6F, 0, 0, 0, 0}, 11392 {0x70, 0, 0, 0, 0}, 11393 {0x71, 0, 0, 0, 0}, 11394 {0x72, 0x22, 0x22, 0, 0}, 11395 {0x73, 0x22, 0x22, 0, 0}, 11396 {0x74, 0, 0, 1, 1}, 11397 {0x75, 0xa, 0xa, 0, 0}, 11398 {0x76, 0x1, 0x1, 0, 0}, 11399 {0x77, 0x22, 0x22, 0, 0}, 11400 {0x78, 0x30, 0x30, 0, 0}, 11401 {0x79, 0, 0, 0, 0}, 11402 {0x7A, 0, 0, 0, 0}, 11403 {0x7B, 0, 0, 0, 0}, 11404 {0x7C, 0, 0, 0, 0}, 11405 {0x7D, 0x5, 0x5, 1, 1}, 11406 {0x7E, 0, 0, 0, 0}, 11407 {0x7F, 0, 0, 0, 0}, 11408 {0x80, 0, 0, 0, 0}, 11409 {0x81, 0, 0, 0, 0}, 11410 {0x82, 0, 0, 0, 0}, 11411 {0x83, 0, 0, 0, 0}, 11412 {0x84, 0, 0, 0, 0}, 11413 {0x85, 0, 0, 0, 0}, 11414 {0x86, 0, 0, 0, 0}, 11415 {0x87, 0, 0, 0, 0}, 11416 {0x88, 0, 0, 0, 0}, 11417 {0x89, 0, 0, 0, 0}, 11418 {0x8A, 0, 0, 0, 0}, 11419 {0x8B, 0, 0, 0, 0}, 11420 {0x8C, 0, 0, 0, 0}, 11421 {0x8D, 0, 0, 0, 0}, 11422 {0x8E, 0, 0, 0, 0}, 11423 {0x8F, 0, 0, 0, 0}, 11424 {0x90, 0, 0, 0, 0}, 11425 {0x91, 0, 0, 0, 0}, 11426 {0x92, 0, 0, 0, 0}, 11427 {0x93, 0, 0, 0, 0}, 11428 {0x94, 0, 0, 0, 0}, 11429 {0xFFFF, 0, 0, 0, 0}, 11430 }; 11431 11432 static struct radio_20xx_regs regs_2057_rev4[] = { 11433 {0x00, 0x84, 0}, 11434 {0x01, 0, 0}, 11435 {0x02, 0x60, 0}, 11436 {0x03, 0x1f, 0}, 11437 {0x04, 0x4, 0}, 11438 {0x05, 0x2, 0}, 11439 {0x06, 0x1, 0}, 11440 {0x07, 0x1, 0}, 11441 {0x08, 0x1, 0}, 11442 {0x09, 0x69, 0}, 11443 {0x0A, 0x66, 0}, 11444 {0x0B, 0x6, 0}, 11445 {0x0C, 0x18, 0}, 11446 {0x0D, 0x3, 0}, 11447 {0x0E, 0x20, 1}, 11448 {0x0F, 0x20, 0}, 11449 {0x10, 0, 0}, 11450 {0x11, 0x7c, 0}, 11451 {0x12, 0x42, 0}, 11452 {0x13, 0xbd, 0}, 11453 {0x14, 0x7, 0}, 11454 {0x15, 0xf7, 0}, 11455 {0x16, 0x8, 0}, 11456 {0x17, 0x17, 0}, 11457 {0x18, 0x7, 0}, 11458 {0x19, 0, 0}, 11459 {0x1A, 0x2, 0}, 11460 {0x1B, 0x13, 0}, 11461 {0x1C, 0x3e, 0}, 11462 {0x1D, 0x3e, 0}, 11463 {0x1E, 0x96, 0}, 11464 {0x1F, 0x4, 0}, 11465 {0x20, 0, 0}, 11466 {0x21, 0, 0}, 11467 {0x22, 0x17, 0}, 11468 {0x23, 0x4, 0}, 11469 {0x24, 0x1, 0}, 11470 {0x25, 0x6, 0}, 11471 {0x26, 0x4, 0}, 11472 {0x27, 0xd, 0}, 11473 {0x28, 0xd, 0}, 11474 {0x29, 0x30, 0}, 11475 {0x2A, 0x32, 0}, 11476 {0x2B, 0x8, 0}, 11477 {0x2C, 0x1c, 0}, 11478 {0x2D, 0x2, 0}, 11479 {0x2E, 0x4, 0}, 11480 {0x2F, 0x7f, 0}, 11481 {0x30, 0x27, 0}, 11482 {0x31, 0, 1}, 11483 {0x32, 0, 1}, 11484 {0x33, 0, 1}, 11485 {0x34, 0, 0}, 11486 {0x35, 0x26, 1}, 11487 {0x36, 0x18, 0}, 11488 {0x37, 0x7, 0}, 11489 {0x38, 0x66, 0}, 11490 {0x39, 0x66, 0}, 11491 {0x3A, 0x66, 0}, 11492 {0x3B, 0x66, 0}, 11493 {0x3C, 0xff, 1}, 11494 {0x3D, 0xff, 1}, 11495 {0x3E, 0xff, 1}, 11496 {0x3F, 0xff, 1}, 11497 {0x40, 0x16, 0}, 11498 {0x41, 0x7, 0}, 11499 {0x42, 0x19, 0}, 11500 {0x43, 0x7, 0}, 11501 {0x44, 0x6, 0}, 11502 {0x45, 0x3, 0}, 11503 {0x46, 0x1, 0}, 11504 {0x47, 0x7, 0}, 11505 {0x48, 0x33, 0}, 11506 {0x49, 0x5, 0}, 11507 {0x4A, 0x77, 0}, 11508 {0x4B, 0x66, 0}, 11509 {0x4C, 0x66, 0}, 11510 {0x4D, 0, 0}, 11511 {0x4E, 0x4, 0}, 11512 {0x4F, 0xc, 0}, 11513 {0x50, 0, 0}, 11514 {0x51, 0x75, 0}, 11515 {0x56, 0x7, 0}, 11516 {0x57, 0, 0}, 11517 {0x58, 0, 0}, 11518 {0x59, 0xa8, 0}, 11519 {0x5A, 0, 0}, 11520 {0x5B, 0x1f, 0}, 11521 {0x5C, 0x30, 0}, 11522 {0x5D, 0x1, 0}, 11523 {0x5E, 0x30, 0}, 11524 {0x5F, 0x70, 0}, 11525 {0x60, 0, 0}, 11526 {0x61, 0, 0}, 11527 {0x62, 0x33, 1}, 11528 {0x63, 0x19, 0}, 11529 {0x64, 0x62, 0}, 11530 {0x65, 0, 0}, 11531 {0x66, 0x11, 0}, 11532 {0x69, 0, 0}, 11533 {0x6A, 0x7e, 0}, 11534 {0x6B, 0x3f, 0}, 11535 {0x6C, 0x7f, 0}, 11536 {0x6D, 0x78, 0}, 11537 {0x6E, 0xc8, 0}, 11538 {0x6F, 0x88, 0}, 11539 {0x70, 0x8, 0}, 11540 {0x71, 0xf, 0}, 11541 {0x72, 0xbc, 0}, 11542 {0x73, 0x8, 0}, 11543 {0x74, 0x60, 0}, 11544 {0x75, 0x1e, 0}, 11545 {0x76, 0x70, 0}, 11546 {0x77, 0, 0}, 11547 {0x78, 0, 0}, 11548 {0x79, 0, 0}, 11549 {0x7A, 0x33, 0}, 11550 {0x7B, 0x1e, 0}, 11551 {0x7C, 0x62, 0}, 11552 {0x7D, 0x11, 0}, 11553 {0x80, 0x3c, 0}, 11554 {0x81, 0x9c, 0}, 11555 {0x82, 0xa, 0}, 11556 {0x83, 0x9d, 0}, 11557 {0x84, 0xa, 0}, 11558 {0x85, 0, 0}, 11559 {0x86, 0x40, 0}, 11560 {0x87, 0x40, 0}, 11561 {0x88, 0x88, 0}, 11562 {0x89, 0x10, 0}, 11563 {0x8A, 0xf0, 1}, 11564 {0x8B, 0x10, 1}, 11565 {0x8C, 0xf0, 1}, 11566 {0x8D, 0, 0}, 11567 {0x8E, 0, 0}, 11568 {0x8F, 0x10, 0}, 11569 {0x90, 0x55, 0}, 11570 {0x91, 0x3f, 1}, 11571 {0x92, 0x36, 1}, 11572 {0x93, 0, 0}, 11573 {0x94, 0, 0}, 11574 {0x95, 0, 0}, 11575 {0x96, 0x87, 0}, 11576 {0x97, 0x11, 0}, 11577 {0x98, 0, 0}, 11578 {0x99, 0x33, 0}, 11579 {0x9A, 0x88, 0}, 11580 {0x9B, 0, 0}, 11581 {0x9C, 0x87, 0}, 11582 {0x9D, 0x11, 0}, 11583 {0x9E, 0, 0}, 11584 {0x9F, 0x33, 0}, 11585 {0xA0, 0x88, 0}, 11586 {0xA1, 0xe1, 0}, 11587 {0xA2, 0x3f, 0}, 11588 {0xA3, 0x44, 0}, 11589 {0xA4, 0x8c, 1}, 11590 {0xA5, 0x6d, 0}, 11591 {0xA6, 0x22, 0}, 11592 {0xA7, 0xbe, 0}, 11593 {0xA8, 0x55, 1}, 11594 {0xA9, 0xc, 0}, 11595 {0xAA, 0xc, 0}, 11596 {0xAB, 0xaa, 0}, 11597 {0xAC, 0x2, 0}, 11598 {0xAD, 0, 0}, 11599 {0xAE, 0x10, 0}, 11600 {0xAF, 0x1, 1}, 11601 {0xB0, 0, 0}, 11602 {0xB1, 0, 0}, 11603 {0xB2, 0x80, 0}, 11604 {0xB3, 0x60, 0}, 11605 {0xB4, 0x44, 0}, 11606 {0xB5, 0x55, 0}, 11607 {0xB6, 0x1, 0}, 11608 {0xB7, 0x55, 0}, 11609 {0xB8, 0x1, 0}, 11610 {0xB9, 0x5, 0}, 11611 {0xBA, 0x55, 0}, 11612 {0xBB, 0x55, 0}, 11613 {0xC1, 0, 0}, 11614 {0xC2, 0, 0}, 11615 {0xC3, 0, 0}, 11616 {0xC4, 0, 0}, 11617 {0xC5, 0, 0}, 11618 {0xC6, 0, 0}, 11619 {0xC7, 0, 0}, 11620 {0xC8, 0, 0}, 11621 {0xC9, 0, 0}, 11622 {0xCA, 0, 0}, 11623 {0xCB, 0, 0}, 11624 {0xCC, 0, 0}, 11625 {0xCD, 0, 0}, 11626 {0xCE, 0x5e, 0}, 11627 {0xCF, 0xc, 0}, 11628 {0xD0, 0xc, 0}, 11629 {0xD1, 0xc, 0}, 11630 {0xD2, 0, 0}, 11631 {0xD3, 0x2b, 0}, 11632 {0xD4, 0xc, 0}, 11633 {0xD5, 0, 0}, 11634 {0xD6, 0x75, 0}, 11635 {0xDB, 0x7, 0}, 11636 {0xDC, 0, 0}, 11637 {0xDD, 0, 0}, 11638 {0xDE, 0xa8, 0}, 11639 {0xDF, 0, 0}, 11640 {0xE0, 0x1f, 0}, 11641 {0xE1, 0x30, 0}, 11642 {0xE2, 0x1, 0}, 11643 {0xE3, 0x30, 0}, 11644 {0xE4, 0x70, 0}, 11645 {0xE5, 0, 0}, 11646 {0xE6, 0, 0}, 11647 {0xE7, 0x33, 0}, 11648 {0xE8, 0x19, 0}, 11649 {0xE9, 0x62, 0}, 11650 {0xEA, 0, 0}, 11651 {0xEB, 0x11, 0}, 11652 {0xEE, 0, 0}, 11653 {0xEF, 0x7e, 0}, 11654 {0xF0, 0x3f, 0}, 11655 {0xF1, 0x7f, 0}, 11656 {0xF2, 0x78, 0}, 11657 {0xF3, 0xc8, 0}, 11658 {0xF4, 0x88, 0}, 11659 {0xF5, 0x8, 0}, 11660 {0xF6, 0xf, 0}, 11661 {0xF7, 0xbc, 0}, 11662 {0xF8, 0x8, 0}, 11663 {0xF9, 0x60, 0}, 11664 {0xFA, 0x1e, 0}, 11665 {0xFB, 0x70, 0}, 11666 {0xFC, 0, 0}, 11667 {0xFD, 0, 0}, 11668 {0xFE, 0, 0}, 11669 {0xFF, 0x33, 0}, 11670 {0x100, 0x1e, 0}, 11671 {0x101, 0x62, 0}, 11672 {0x102, 0x11, 0}, 11673 {0x105, 0x3c, 0}, 11674 {0x106, 0x9c, 0}, 11675 {0x107, 0xa, 0}, 11676 {0x108, 0x9d, 0}, 11677 {0x109, 0xa, 0}, 11678 {0x10A, 0, 0}, 11679 {0x10B, 0x40, 0}, 11680 {0x10C, 0x40, 0}, 11681 {0x10D, 0x88, 0}, 11682 {0x10E, 0x10, 0}, 11683 {0x10F, 0xf0, 1}, 11684 {0x110, 0x10, 1}, 11685 {0x111, 0xf0, 1}, 11686 {0x112, 0, 0}, 11687 {0x113, 0, 0}, 11688 {0x114, 0x10, 0}, 11689 {0x115, 0x55, 0}, 11690 {0x116, 0x3f, 1}, 11691 {0x117, 0x36, 1}, 11692 {0x118, 0, 0}, 11693 {0x119, 0, 0}, 11694 {0x11A, 0, 0}, 11695 {0x11B, 0x87, 0}, 11696 {0x11C, 0x11, 0}, 11697 {0x11D, 0, 0}, 11698 {0x11E, 0x33, 0}, 11699 {0x11F, 0x88, 0}, 11700 {0x120, 0, 0}, 11701 {0x121, 0x87, 0}, 11702 {0x122, 0x11, 0}, 11703 {0x123, 0, 0}, 11704 {0x124, 0x33, 0}, 11705 {0x125, 0x88, 0}, 11706 {0x126, 0xe1, 0}, 11707 {0x127, 0x3f, 0}, 11708 {0x128, 0x44, 0}, 11709 {0x129, 0x8c, 1}, 11710 {0x12A, 0x6d, 0}, 11711 {0x12B, 0x22, 0}, 11712 {0x12C, 0xbe, 0}, 11713 {0x12D, 0x55, 1}, 11714 {0x12E, 0xc, 0}, 11715 {0x12F, 0xc, 0}, 11716 {0x130, 0xaa, 0}, 11717 {0x131, 0x2, 0}, 11718 {0x132, 0, 0}, 11719 {0x133, 0x10, 0}, 11720 {0x134, 0x1, 1}, 11721 {0x135, 0, 0}, 11722 {0x136, 0, 0}, 11723 {0x137, 0x80, 0}, 11724 {0x138, 0x60, 0}, 11725 {0x139, 0x44, 0}, 11726 {0x13A, 0x55, 0}, 11727 {0x13B, 0x1, 0}, 11728 {0x13C, 0x55, 0}, 11729 {0x13D, 0x1, 0}, 11730 {0x13E, 0x5, 0}, 11731 {0x13F, 0x55, 0}, 11732 {0x140, 0x55, 0}, 11733 {0x146, 0, 0}, 11734 {0x147, 0, 0}, 11735 {0x148, 0, 0}, 11736 {0x149, 0, 0}, 11737 {0x14A, 0, 0}, 11738 {0x14B, 0, 0}, 11739 {0x14C, 0, 0}, 11740 {0x14D, 0, 0}, 11741 {0x14E, 0, 0}, 11742 {0x14F, 0, 0}, 11743 {0x150, 0, 0}, 11744 {0x151, 0, 0}, 11745 {0x152, 0, 0}, 11746 {0x153, 0, 0}, 11747 {0x154, 0xc, 0}, 11748 {0x155, 0xc, 0}, 11749 {0x156, 0xc, 0}, 11750 {0x157, 0, 0}, 11751 {0x158, 0x2b, 0}, 11752 {0x159, 0x84, 0}, 11753 {0x15A, 0x15, 0}, 11754 {0x15B, 0xf, 0}, 11755 {0x15C, 0, 0}, 11756 {0x15D, 0, 0}, 11757 {0x15E, 0, 1}, 11758 {0x15F, 0, 1}, 11759 {0x160, 0, 1}, 11760 {0x161, 0, 1}, 11761 {0x162, 0, 1}, 11762 {0x163, 0, 1}, 11763 {0x164, 0, 0}, 11764 {0x165, 0, 0}, 11765 {0x166, 0, 0}, 11766 {0x167, 0, 0}, 11767 {0x168, 0, 0}, 11768 {0x169, 0x2, 1}, 11769 {0x16A, 0, 1}, 11770 {0x16B, 0, 1}, 11771 {0x16C, 0, 1}, 11772 {0x16D, 0, 0}, 11773 {0x170, 0, 0}, 11774 {0x171, 0x77, 0}, 11775 {0x172, 0x77, 0}, 11776 {0x173, 0x77, 0}, 11777 {0x174, 0x77, 0}, 11778 {0x175, 0, 0}, 11779 {0x176, 0x3, 0}, 11780 {0x177, 0x37, 0}, 11781 {0x178, 0x3, 0}, 11782 {0x179, 0, 0}, 11783 {0x17A, 0x21, 0}, 11784 {0x17B, 0x21, 0}, 11785 {0x17C, 0, 0}, 11786 {0x17D, 0xaa, 0}, 11787 {0x17E, 0, 0}, 11788 {0x17F, 0xaa, 0}, 11789 {0x180, 0, 0}, 11790 {0x190, 0, 0}, 11791 {0x191, 0x77, 0}, 11792 {0x192, 0x77, 0}, 11793 {0x193, 0x77, 0}, 11794 {0x194, 0x77, 0}, 11795 {0x195, 0, 0}, 11796 {0x196, 0x3, 0}, 11797 {0x197, 0x37, 0}, 11798 {0x198, 0x3, 0}, 11799 {0x199, 0, 0}, 11800 {0x19A, 0x21, 0}, 11801 {0x19B, 0x21, 0}, 11802 {0x19C, 0, 0}, 11803 {0x19D, 0xaa, 0}, 11804 {0x19E, 0, 0}, 11805 {0x19F, 0xaa, 0}, 11806 {0x1A0, 0, 0}, 11807 {0x1A1, 0x2, 0}, 11808 {0x1A2, 0xf, 0}, 11809 {0x1A3, 0xf, 0}, 11810 {0x1A4, 0, 1}, 11811 {0x1A5, 0, 1}, 11812 {0x1A6, 0, 1}, 11813 {0x1A7, 0x2, 0}, 11814 {0x1A8, 0xf, 0}, 11815 {0x1A9, 0xf, 0}, 11816 {0x1AA, 0, 1}, 11817 {0x1AB, 0, 1}, 11818 {0x1AC, 0, 1}, 11819 {0xFFFF, 0, 0}, 11820 }; 11821 11822 static struct radio_20xx_regs regs_2057_rev5[] = { 11823 {0x00, 0, 1}, 11824 {0x01, 0x57, 1}, 11825 {0x02, 0x20, 1}, 11826 {0x03, 0x1f, 0}, 11827 {0x04, 0x4, 0}, 11828 {0x05, 0x2, 0}, 11829 {0x06, 0x1, 0}, 11830 {0x07, 0x1, 0}, 11831 {0x08, 0x1, 0}, 11832 {0x09, 0x69, 0}, 11833 {0x0A, 0x66, 0}, 11834 {0x0B, 0x6, 0}, 11835 {0x0C, 0x18, 0}, 11836 {0x0D, 0x3, 0}, 11837 {0x0E, 0x20, 0}, 11838 {0x0F, 0x20, 0}, 11839 {0x10, 0, 0}, 11840 {0x11, 0x7c, 0}, 11841 {0x12, 0x42, 0}, 11842 {0x13, 0xbd, 0}, 11843 {0x14, 0x7, 0}, 11844 {0x15, 0x87, 0}, 11845 {0x16, 0x8, 0}, 11846 {0x17, 0x17, 0}, 11847 {0x18, 0x7, 0}, 11848 {0x19, 0, 0}, 11849 {0x1A, 0x2, 0}, 11850 {0x1B, 0x13, 0}, 11851 {0x1C, 0x3e, 0}, 11852 {0x1D, 0x3e, 0}, 11853 {0x1E, 0x96, 0}, 11854 {0x1F, 0x4, 0}, 11855 {0x20, 0, 0}, 11856 {0x21, 0, 0}, 11857 {0x22, 0x17, 0}, 11858 {0x23, 0x6, 1}, 11859 {0x24, 0x1, 0}, 11860 {0x25, 0x6, 0}, 11861 {0x26, 0x4, 0}, 11862 {0x27, 0xd, 0}, 11863 {0x28, 0xd, 0}, 11864 {0x29, 0x30, 0}, 11865 {0x2A, 0x32, 0}, 11866 {0x2B, 0x8, 0}, 11867 {0x2C, 0x1c, 0}, 11868 {0x2D, 0x2, 0}, 11869 {0x2E, 0x4, 0}, 11870 {0x2F, 0x7f, 0}, 11871 {0x30, 0x27, 0}, 11872 {0x31, 0, 1}, 11873 {0x32, 0, 1}, 11874 {0x33, 0, 1}, 11875 {0x34, 0, 0}, 11876 {0x35, 0x20, 0}, 11877 {0x36, 0x18, 0}, 11878 {0x37, 0x7, 0}, 11879 {0x38, 0x66, 0}, 11880 {0x39, 0x66, 0}, 11881 {0x3C, 0xff, 0}, 11882 {0x3D, 0xff, 0}, 11883 {0x40, 0x16, 0}, 11884 {0x41, 0x7, 0}, 11885 {0x45, 0x3, 0}, 11886 {0x46, 0x1, 0}, 11887 {0x47, 0x7, 0}, 11888 {0x4B, 0x66, 0}, 11889 {0x4C, 0x66, 0}, 11890 {0x4D, 0, 0}, 11891 {0x4E, 0x4, 0}, 11892 {0x4F, 0xc, 0}, 11893 {0x50, 0, 0}, 11894 {0x51, 0x70, 1}, 11895 {0x56, 0x7, 0}, 11896 {0x57, 0, 0}, 11897 {0x58, 0, 0}, 11898 {0x59, 0x88, 1}, 11899 {0x5A, 0, 0}, 11900 {0x5B, 0x1f, 0}, 11901 {0x5C, 0x20, 1}, 11902 {0x5D, 0x1, 0}, 11903 {0x5E, 0x30, 0}, 11904 {0x5F, 0x70, 0}, 11905 {0x60, 0, 0}, 11906 {0x61, 0, 0}, 11907 {0x62, 0x33, 1}, 11908 {0x63, 0xf, 1}, 11909 {0x64, 0xf, 1}, 11910 {0x65, 0, 0}, 11911 {0x66, 0x11, 0}, 11912 {0x80, 0x3c, 0}, 11913 {0x81, 0x1, 1}, 11914 {0x82, 0xa, 0}, 11915 {0x85, 0, 0}, 11916 {0x86, 0x40, 0}, 11917 {0x87, 0x40, 0}, 11918 {0x88, 0x88, 0}, 11919 {0x89, 0x10, 0}, 11920 {0x8A, 0xf0, 0}, 11921 {0x8B, 0x10, 0}, 11922 {0x8C, 0xf0, 0}, 11923 {0x8F, 0x10, 0}, 11924 {0x90, 0x55, 0}, 11925 {0x91, 0x3f, 1}, 11926 {0x92, 0x36, 1}, 11927 {0x93, 0, 0}, 11928 {0x94, 0, 0}, 11929 {0x95, 0, 0}, 11930 {0x96, 0x87, 0}, 11931 {0x97, 0x11, 0}, 11932 {0x98, 0, 0}, 11933 {0x99, 0x33, 0}, 11934 {0x9A, 0x88, 0}, 11935 {0xA1, 0x20, 1}, 11936 {0xA2, 0x3f, 0}, 11937 {0xA3, 0x44, 0}, 11938 {0xA4, 0x8c, 0}, 11939 {0xA5, 0x6c, 0}, 11940 {0xA6, 0x22, 0}, 11941 {0xA7, 0xbe, 0}, 11942 {0xA8, 0x55, 0}, 11943 {0xAA, 0xc, 0}, 11944 {0xAB, 0xaa, 0}, 11945 {0xAC, 0x2, 0}, 11946 {0xAD, 0, 0}, 11947 {0xAE, 0x10, 0}, 11948 {0xAF, 0x1, 0}, 11949 {0xB0, 0, 0}, 11950 {0xB1, 0, 0}, 11951 {0xB2, 0x80, 0}, 11952 {0xB3, 0x60, 0}, 11953 {0xB4, 0x44, 0}, 11954 {0xB5, 0x55, 0}, 11955 {0xB6, 0x1, 0}, 11956 {0xB7, 0x55, 0}, 11957 {0xB8, 0x1, 0}, 11958 {0xB9, 0x5, 0}, 11959 {0xBA, 0x55, 0}, 11960 {0xBB, 0x55, 0}, 11961 {0xC3, 0, 0}, 11962 {0xC4, 0, 0}, 11963 {0xC5, 0, 0}, 11964 {0xC6, 0, 0}, 11965 {0xC7, 0, 0}, 11966 {0xC8, 0, 0}, 11967 {0xC9, 0, 0}, 11968 {0xCA, 0, 0}, 11969 {0xCB, 0, 0}, 11970 {0xCD, 0, 0}, 11971 {0xCE, 0x5e, 0}, 11972 {0xCF, 0xc, 0}, 11973 {0xD0, 0xc, 0}, 11974 {0xD1, 0xc, 0}, 11975 {0xD2, 0, 0}, 11976 {0xD3, 0x2b, 0}, 11977 {0xD4, 0xc, 0}, 11978 {0xD5, 0, 0}, 11979 {0xD6, 0x70, 1}, 11980 {0xDB, 0x7, 0}, 11981 {0xDC, 0, 0}, 11982 {0xDD, 0, 0}, 11983 {0xDE, 0x88, 1}, 11984 {0xDF, 0, 0}, 11985 {0xE0, 0x1f, 0}, 11986 {0xE1, 0x20, 1}, 11987 {0xE2, 0x1, 0}, 11988 {0xE3, 0x30, 0}, 11989 {0xE4, 0x70, 0}, 11990 {0xE5, 0, 0}, 11991 {0xE6, 0, 0}, 11992 {0xE7, 0x33, 0}, 11993 {0xE8, 0xf, 1}, 11994 {0xE9, 0xf, 1}, 11995 {0xEA, 0, 0}, 11996 {0xEB, 0x11, 0}, 11997 {0x105, 0x3c, 0}, 11998 {0x106, 0x1, 1}, 11999 {0x107, 0xa, 0}, 12000 {0x10A, 0, 0}, 12001 {0x10B, 0x40, 0}, 12002 {0x10C, 0x40, 0}, 12003 {0x10D, 0x88, 0}, 12004 {0x10E, 0x10, 0}, 12005 {0x10F, 0xf0, 0}, 12006 {0x110, 0x10, 0}, 12007 {0x111, 0xf0, 0}, 12008 {0x114, 0x10, 0}, 12009 {0x115, 0x55, 0}, 12010 {0x116, 0x3f, 1}, 12011 {0x117, 0x36, 1}, 12012 {0x118, 0, 0}, 12013 {0x119, 0, 0}, 12014 {0x11A, 0, 0}, 12015 {0x11B, 0x87, 0}, 12016 {0x11C, 0x11, 0}, 12017 {0x11D, 0, 0}, 12018 {0x11E, 0x33, 0}, 12019 {0x11F, 0x88, 0}, 12020 {0x126, 0x20, 1}, 12021 {0x127, 0x3f, 0}, 12022 {0x128, 0x44, 0}, 12023 {0x129, 0x8c, 0}, 12024 {0x12A, 0x6c, 0}, 12025 {0x12B, 0x22, 0}, 12026 {0x12C, 0xbe, 0}, 12027 {0x12D, 0x55, 0}, 12028 {0x12F, 0xc, 0}, 12029 {0x130, 0xaa, 0}, 12030 {0x131, 0x2, 0}, 12031 {0x132, 0, 0}, 12032 {0x133, 0x10, 0}, 12033 {0x134, 0x1, 0}, 12034 {0x135, 0, 0}, 12035 {0x136, 0, 0}, 12036 {0x137, 0x80, 0}, 12037 {0x138, 0x60, 0}, 12038 {0x139, 0x44, 0}, 12039 {0x13A, 0x55, 0}, 12040 {0x13B, 0x1, 0}, 12041 {0x13C, 0x55, 0}, 12042 {0x13D, 0x1, 0}, 12043 {0x13E, 0x5, 0}, 12044 {0x13F, 0x55, 0}, 12045 {0x140, 0x55, 0}, 12046 {0x148, 0, 0}, 12047 {0x149, 0, 0}, 12048 {0x14A, 0, 0}, 12049 {0x14B, 0, 0}, 12050 {0x14C, 0, 0}, 12051 {0x14D, 0, 0}, 12052 {0x14E, 0, 0}, 12053 {0x14F, 0, 0}, 12054 {0x150, 0, 0}, 12055 {0x154, 0xc, 0}, 12056 {0x155, 0xc, 0}, 12057 {0x156, 0xc, 0}, 12058 {0x157, 0, 0}, 12059 {0x158, 0x2b, 0}, 12060 {0x159, 0x84, 0}, 12061 {0x15A, 0x15, 0}, 12062 {0x15B, 0xf, 0}, 12063 {0x15C, 0, 0}, 12064 {0x15D, 0, 0}, 12065 {0x15E, 0, 1}, 12066 {0x15F, 0, 1}, 12067 {0x160, 0, 1}, 12068 {0x161, 0, 1}, 12069 {0x162, 0, 1}, 12070 {0x163, 0, 1}, 12071 {0x164, 0, 0}, 12072 {0x165, 0, 0}, 12073 {0x166, 0, 0}, 12074 {0x167, 0, 0}, 12075 {0x168, 0, 0}, 12076 {0x169, 0, 0}, 12077 {0x16A, 0, 1}, 12078 {0x16B, 0, 1}, 12079 {0x16C, 0, 1}, 12080 {0x16D, 0, 0}, 12081 {0x170, 0, 0}, 12082 {0x171, 0x77, 0}, 12083 {0x172, 0x77, 0}, 12084 {0x173, 0x77, 0}, 12085 {0x174, 0x77, 0}, 12086 {0x175, 0, 0}, 12087 {0x176, 0x3, 0}, 12088 {0x177, 0x37, 0}, 12089 {0x178, 0x3, 0}, 12090 {0x179, 0, 0}, 12091 {0x17B, 0x21, 0}, 12092 {0x17C, 0, 0}, 12093 {0x17D, 0xaa, 0}, 12094 {0x17E, 0, 0}, 12095 {0x190, 0, 0}, 12096 {0x191, 0x77, 0}, 12097 {0x192, 0x77, 0}, 12098 {0x193, 0x77, 0}, 12099 {0x194, 0x77, 0}, 12100 {0x195, 0, 0}, 12101 {0x196, 0x3, 0}, 12102 {0x197, 0x37, 0}, 12103 {0x198, 0x3, 0}, 12104 {0x199, 0, 0}, 12105 {0x19B, 0x21, 0}, 12106 {0x19C, 0, 0}, 12107 {0x19D, 0xaa, 0}, 12108 {0x19E, 0, 0}, 12109 {0x1A1, 0x2, 0}, 12110 {0x1A2, 0xf, 0}, 12111 {0x1A3, 0xf, 0}, 12112 {0x1A4, 0, 1}, 12113 {0x1A5, 0, 1}, 12114 {0x1A6, 0, 1}, 12115 {0x1A7, 0x2, 0}, 12116 {0x1A8, 0xf, 0}, 12117 {0x1A9, 0xf, 0}, 12118 {0x1AA, 0, 1}, 12119 {0x1AB, 0, 1}, 12120 {0x1AC, 0, 1}, 12121 {0x1AD, 0x84, 0}, 12122 {0x1AE, 0x60, 0}, 12123 {0x1AF, 0x47, 0}, 12124 {0x1B0, 0x47, 0}, 12125 {0x1B1, 0, 0}, 12126 {0x1B2, 0, 0}, 12127 {0x1B3, 0, 0}, 12128 {0x1B4, 0, 0}, 12129 {0x1B5, 0, 0}, 12130 {0x1B6, 0, 0}, 12131 {0x1B7, 0xc, 1}, 12132 {0x1B8, 0, 0}, 12133 {0x1B9, 0, 0}, 12134 {0x1BA, 0, 0}, 12135 {0x1BB, 0, 0}, 12136 {0x1BC, 0, 0}, 12137 {0x1BD, 0, 0}, 12138 {0x1BE, 0, 0}, 12139 {0x1BF, 0, 0}, 12140 {0x1C0, 0, 0}, 12141 {0x1C1, 0x1, 1}, 12142 {0x1C2, 0x80, 1}, 12143 {0x1C3, 0, 0}, 12144 {0x1C4, 0, 0}, 12145 {0x1C5, 0, 0}, 12146 {0x1C6, 0, 0}, 12147 {0x1C7, 0, 0}, 12148 {0x1C8, 0, 0}, 12149 {0x1C9, 0, 0}, 12150 {0x1CA, 0, 0}, 12151 {0xFFFF, 0, 0} 12152 }; 12153 12154 static struct radio_20xx_regs regs_2057_rev5v1[] = { 12155 {0x00, 0x15, 1}, 12156 {0x01, 0x57, 1}, 12157 {0x02, 0x20, 1}, 12158 {0x03, 0x1f, 0}, 12159 {0x04, 0x4, 0}, 12160 {0x05, 0x2, 0}, 12161 {0x06, 0x1, 0}, 12162 {0x07, 0x1, 0}, 12163 {0x08, 0x1, 0}, 12164 {0x09, 0x69, 0}, 12165 {0x0A, 0x66, 0}, 12166 {0x0B, 0x6, 0}, 12167 {0x0C, 0x18, 0}, 12168 {0x0D, 0x3, 0}, 12169 {0x0E, 0x20, 0}, 12170 {0x0F, 0x20, 0}, 12171 {0x10, 0, 0}, 12172 {0x11, 0x7c, 0}, 12173 {0x12, 0x42, 0}, 12174 {0x13, 0xbd, 0}, 12175 {0x14, 0x7, 0}, 12176 {0x15, 0x87, 0}, 12177 {0x16, 0x8, 0}, 12178 {0x17, 0x17, 0}, 12179 {0x18, 0x7, 0}, 12180 {0x19, 0, 0}, 12181 {0x1A, 0x2, 0}, 12182 {0x1B, 0x13, 0}, 12183 {0x1C, 0x3e, 0}, 12184 {0x1D, 0x3e, 0}, 12185 {0x1E, 0x96, 0}, 12186 {0x1F, 0x4, 0}, 12187 {0x20, 0, 0}, 12188 {0x21, 0, 0}, 12189 {0x22, 0x17, 0}, 12190 {0x23, 0x6, 1}, 12191 {0x24, 0x1, 0}, 12192 {0x25, 0x6, 0}, 12193 {0x26, 0x4, 0}, 12194 {0x27, 0xd, 0}, 12195 {0x28, 0xd, 0}, 12196 {0x29, 0x30, 0}, 12197 {0x2A, 0x32, 0}, 12198 {0x2B, 0x8, 0}, 12199 {0x2C, 0x1c, 0}, 12200 {0x2D, 0x2, 0}, 12201 {0x2E, 0x4, 0}, 12202 {0x2F, 0x7f, 0}, 12203 {0x30, 0x27, 0}, 12204 {0x31, 0, 1}, 12205 {0x32, 0, 1}, 12206 {0x33, 0, 1}, 12207 {0x34, 0, 0}, 12208 {0x35, 0x20, 0}, 12209 {0x36, 0x18, 0}, 12210 {0x37, 0x7, 0}, 12211 {0x38, 0x66, 0}, 12212 {0x39, 0x66, 0}, 12213 {0x3C, 0xff, 0}, 12214 {0x3D, 0xff, 0}, 12215 {0x40, 0x16, 0}, 12216 {0x41, 0x7, 0}, 12217 {0x45, 0x3, 0}, 12218 {0x46, 0x1, 0}, 12219 {0x47, 0x7, 0}, 12220 {0x4B, 0x66, 0}, 12221 {0x4C, 0x66, 0}, 12222 {0x4D, 0, 0}, 12223 {0x4E, 0x4, 0}, 12224 {0x4F, 0xc, 0}, 12225 {0x50, 0, 0}, 12226 {0x51, 0x70, 1}, 12227 {0x56, 0x7, 0}, 12228 {0x57, 0, 0}, 12229 {0x58, 0, 0}, 12230 {0x59, 0x88, 1}, 12231 {0x5A, 0, 0}, 12232 {0x5B, 0x1f, 0}, 12233 {0x5C, 0x20, 1}, 12234 {0x5D, 0x1, 0}, 12235 {0x5E, 0x30, 0}, 12236 {0x5F, 0x70, 0}, 12237 {0x60, 0, 0}, 12238 {0x61, 0, 0}, 12239 {0x62, 0x33, 1}, 12240 {0x63, 0xf, 1}, 12241 {0x64, 0xf, 1}, 12242 {0x65, 0, 0}, 12243 {0x66, 0x11, 0}, 12244 {0x80, 0x3c, 0}, 12245 {0x81, 0x1, 1}, 12246 {0x82, 0xa, 0}, 12247 {0x85, 0, 0}, 12248 {0x86, 0x40, 0}, 12249 {0x87, 0x40, 0}, 12250 {0x88, 0x88, 0}, 12251 {0x89, 0x10, 0}, 12252 {0x8A, 0xf0, 0}, 12253 {0x8B, 0x10, 0}, 12254 {0x8C, 0xf0, 0}, 12255 {0x8F, 0x10, 0}, 12256 {0x90, 0x55, 0}, 12257 {0x91, 0x3f, 1}, 12258 {0x92, 0x36, 1}, 12259 {0x93, 0, 0}, 12260 {0x94, 0, 0}, 12261 {0x95, 0, 0}, 12262 {0x96, 0x87, 0}, 12263 {0x97, 0x11, 0}, 12264 {0x98, 0, 0}, 12265 {0x99, 0x33, 0}, 12266 {0x9A, 0x88, 0}, 12267 {0xA1, 0x20, 1}, 12268 {0xA2, 0x3f, 0}, 12269 {0xA3, 0x44, 0}, 12270 {0xA4, 0x8c, 0}, 12271 {0xA5, 0x6c, 0}, 12272 {0xA6, 0x22, 0}, 12273 {0xA7, 0xbe, 0}, 12274 {0xA8, 0x55, 0}, 12275 {0xAA, 0xc, 0}, 12276 {0xAB, 0xaa, 0}, 12277 {0xAC, 0x2, 0}, 12278 {0xAD, 0, 0}, 12279 {0xAE, 0x10, 0}, 12280 {0xAF, 0x1, 0}, 12281 {0xB0, 0, 0}, 12282 {0xB1, 0, 0}, 12283 {0xB2, 0x80, 0}, 12284 {0xB3, 0x60, 0}, 12285 {0xB4, 0x44, 0}, 12286 {0xB5, 0x55, 0}, 12287 {0xB6, 0x1, 0}, 12288 {0xB7, 0x55, 0}, 12289 {0xB8, 0x1, 0}, 12290 {0xB9, 0x5, 0}, 12291 {0xBA, 0x55, 0}, 12292 {0xBB, 0x55, 0}, 12293 {0xC3, 0, 0}, 12294 {0xC4, 0, 0}, 12295 {0xC5, 0, 0}, 12296 {0xC6, 0, 0}, 12297 {0xC7, 0, 0}, 12298 {0xC8, 0, 0}, 12299 {0xC9, 0x1, 1}, 12300 {0xCA, 0, 0}, 12301 {0xCB, 0, 0}, 12302 {0xCD, 0, 0}, 12303 {0xCE, 0x5e, 0}, 12304 {0xCF, 0xc, 0}, 12305 {0xD0, 0xc, 0}, 12306 {0xD1, 0xc, 0}, 12307 {0xD2, 0, 0}, 12308 {0xD3, 0x2b, 0}, 12309 {0xD4, 0xc, 0}, 12310 {0xD5, 0, 0}, 12311 {0xD6, 0x70, 1}, 12312 {0xDB, 0x7, 0}, 12313 {0xDC, 0, 0}, 12314 {0xDD, 0, 0}, 12315 {0xDE, 0x88, 1}, 12316 {0xDF, 0, 0}, 12317 {0xE0, 0x1f, 0}, 12318 {0xE1, 0x20, 1}, 12319 {0xE2, 0x1, 0}, 12320 {0xE3, 0x30, 0}, 12321 {0xE4, 0x70, 0}, 12322 {0xE5, 0, 0}, 12323 {0xE6, 0, 0}, 12324 {0xE7, 0x33, 0}, 12325 {0xE8, 0xf, 1}, 12326 {0xE9, 0xf, 1}, 12327 {0xEA, 0, 0}, 12328 {0xEB, 0x11, 0}, 12329 {0x105, 0x3c, 0}, 12330 {0x106, 0x1, 1}, 12331 {0x107, 0xa, 0}, 12332 {0x10A, 0, 0}, 12333 {0x10B, 0x40, 0}, 12334 {0x10C, 0x40, 0}, 12335 {0x10D, 0x88, 0}, 12336 {0x10E, 0x10, 0}, 12337 {0x10F, 0xf0, 0}, 12338 {0x110, 0x10, 0}, 12339 {0x111, 0xf0, 0}, 12340 {0x114, 0x10, 0}, 12341 {0x115, 0x55, 0}, 12342 {0x116, 0x3f, 1}, 12343 {0x117, 0x36, 1}, 12344 {0x118, 0, 0}, 12345 {0x119, 0, 0}, 12346 {0x11A, 0, 0}, 12347 {0x11B, 0x87, 0}, 12348 {0x11C, 0x11, 0}, 12349 {0x11D, 0, 0}, 12350 {0x11E, 0x33, 0}, 12351 {0x11F, 0x88, 0}, 12352 {0x126, 0x20, 1}, 12353 {0x127, 0x3f, 0}, 12354 {0x128, 0x44, 0}, 12355 {0x129, 0x8c, 0}, 12356 {0x12A, 0x6c, 0}, 12357 {0x12B, 0x22, 0}, 12358 {0x12C, 0xbe, 0}, 12359 {0x12D, 0x55, 0}, 12360 {0x12F, 0xc, 0}, 12361 {0x130, 0xaa, 0}, 12362 {0x131, 0x2, 0}, 12363 {0x132, 0, 0}, 12364 {0x133, 0x10, 0}, 12365 {0x134, 0x1, 0}, 12366 {0x135, 0, 0}, 12367 {0x136, 0, 0}, 12368 {0x137, 0x80, 0}, 12369 {0x138, 0x60, 0}, 12370 {0x139, 0x44, 0}, 12371 {0x13A, 0x55, 0}, 12372 {0x13B, 0x1, 0}, 12373 {0x13C, 0x55, 0}, 12374 {0x13D, 0x1, 0}, 12375 {0x13E, 0x5, 0}, 12376 {0x13F, 0x55, 0}, 12377 {0x140, 0x55, 0}, 12378 {0x148, 0, 0}, 12379 {0x149, 0, 0}, 12380 {0x14A, 0, 0}, 12381 {0x14B, 0, 0}, 12382 {0x14C, 0, 0}, 12383 {0x14D, 0, 0}, 12384 {0x14E, 0x1, 1}, 12385 {0x14F, 0, 0}, 12386 {0x150, 0, 0}, 12387 {0x154, 0xc, 0}, 12388 {0x155, 0xc, 0}, 12389 {0x156, 0xc, 0}, 12390 {0x157, 0, 0}, 12391 {0x158, 0x2b, 0}, 12392 {0x159, 0x84, 0}, 12393 {0x15A, 0x15, 0}, 12394 {0x15B, 0xf, 0}, 12395 {0x15C, 0, 0}, 12396 {0x15D, 0, 0}, 12397 {0x15E, 0, 1}, 12398 {0x15F, 0, 1}, 12399 {0x160, 0, 1}, 12400 {0x161, 0, 1}, 12401 {0x162, 0, 1}, 12402 {0x163, 0, 1}, 12403 {0x164, 0, 0}, 12404 {0x165, 0, 0}, 12405 {0x166, 0, 0}, 12406 {0x167, 0, 0}, 12407 {0x168, 0, 0}, 12408 {0x169, 0, 0}, 12409 {0x16A, 0, 1}, 12410 {0x16B, 0, 1}, 12411 {0x16C, 0, 1}, 12412 {0x16D, 0, 0}, 12413 {0x170, 0, 0}, 12414 {0x171, 0x77, 0}, 12415 {0x172, 0x77, 0}, 12416 {0x173, 0x77, 0}, 12417 {0x174, 0x77, 0}, 12418 {0x175, 0, 0}, 12419 {0x176, 0x3, 0}, 12420 {0x177, 0x37, 0}, 12421 {0x178, 0x3, 0}, 12422 {0x179, 0, 0}, 12423 {0x17B, 0x21, 0}, 12424 {0x17C, 0, 0}, 12425 {0x17D, 0xaa, 0}, 12426 {0x17E, 0, 0}, 12427 {0x190, 0, 0}, 12428 {0x191, 0x77, 0}, 12429 {0x192, 0x77, 0}, 12430 {0x193, 0x77, 0}, 12431 {0x194, 0x77, 0}, 12432 {0x195, 0, 0}, 12433 {0x196, 0x3, 0}, 12434 {0x197, 0x37, 0}, 12435 {0x198, 0x3, 0}, 12436 {0x199, 0, 0}, 12437 {0x19B, 0x21, 0}, 12438 {0x19C, 0, 0}, 12439 {0x19D, 0xaa, 0}, 12440 {0x19E, 0, 0}, 12441 {0x1A1, 0x2, 0}, 12442 {0x1A2, 0xf, 0}, 12443 {0x1A3, 0xf, 0}, 12444 {0x1A4, 0, 1}, 12445 {0x1A5, 0, 1}, 12446 {0x1A6, 0, 1}, 12447 {0x1A7, 0x2, 0}, 12448 {0x1A8, 0xf, 0}, 12449 {0x1A9, 0xf, 0}, 12450 {0x1AA, 0, 1}, 12451 {0x1AB, 0, 1}, 12452 {0x1AC, 0, 1}, 12453 {0x1AD, 0x84, 0}, 12454 {0x1AE, 0x60, 0}, 12455 {0x1AF, 0x47, 0}, 12456 {0x1B0, 0x47, 0}, 12457 {0x1B1, 0, 0}, 12458 {0x1B2, 0, 0}, 12459 {0x1B3, 0, 0}, 12460 {0x1B4, 0, 0}, 12461 {0x1B5, 0, 0}, 12462 {0x1B6, 0, 0}, 12463 {0x1B7, 0xc, 1}, 12464 {0x1B8, 0, 0}, 12465 {0x1B9, 0, 0}, 12466 {0x1BA, 0, 0}, 12467 {0x1BB, 0, 0}, 12468 {0x1BC, 0, 0}, 12469 {0x1BD, 0, 0}, 12470 {0x1BE, 0, 0}, 12471 {0x1BF, 0, 0}, 12472 {0x1C0, 0, 0}, 12473 {0x1C1, 0x1, 1}, 12474 {0x1C2, 0x80, 1}, 12475 {0x1C3, 0, 0}, 12476 {0x1C4, 0, 0}, 12477 {0x1C5, 0, 0}, 12478 {0x1C6, 0, 0}, 12479 {0x1C7, 0, 0}, 12480 {0x1C8, 0, 0}, 12481 {0x1C9, 0, 0}, 12482 {0x1CA, 0, 0}, 12483 {0xFFFF, 0, 0} 12484 }; 12485 12486 static struct radio_20xx_regs regs_2057_rev7[] = { 12487 {0x00, 0, 1}, 12488 {0x01, 0x57, 1}, 12489 {0x02, 0x20, 1}, 12490 {0x03, 0x1f, 0}, 12491 {0x04, 0x4, 0}, 12492 {0x05, 0x2, 0}, 12493 {0x06, 0x1, 0}, 12494 {0x07, 0x1, 0}, 12495 {0x08, 0x1, 0}, 12496 {0x09, 0x69, 0}, 12497 {0x0A, 0x66, 0}, 12498 {0x0B, 0x6, 0}, 12499 {0x0C, 0x18, 0}, 12500 {0x0D, 0x3, 0}, 12501 {0x0E, 0x20, 0}, 12502 {0x0F, 0x20, 0}, 12503 {0x10, 0, 0}, 12504 {0x11, 0x7c, 0}, 12505 {0x12, 0x42, 0}, 12506 {0x13, 0xbd, 0}, 12507 {0x14, 0x7, 0}, 12508 {0x15, 0x87, 0}, 12509 {0x16, 0x8, 0}, 12510 {0x17, 0x17, 0}, 12511 {0x18, 0x7, 0}, 12512 {0x19, 0, 0}, 12513 {0x1A, 0x2, 0}, 12514 {0x1B, 0x13, 0}, 12515 {0x1C, 0x3e, 0}, 12516 {0x1D, 0x3e, 0}, 12517 {0x1E, 0x96, 0}, 12518 {0x1F, 0x4, 0}, 12519 {0x20, 0, 0}, 12520 {0x21, 0, 0}, 12521 {0x22, 0x17, 0}, 12522 {0x23, 0x6, 0}, 12523 {0x24, 0x1, 0}, 12524 {0x25, 0x6, 0}, 12525 {0x26, 0x4, 0}, 12526 {0x27, 0xd, 0}, 12527 {0x28, 0xd, 0}, 12528 {0x29, 0x30, 0}, 12529 {0x2A, 0x32, 0}, 12530 {0x2B, 0x8, 0}, 12531 {0x2C, 0x1c, 0}, 12532 {0x2D, 0x2, 0}, 12533 {0x2E, 0x4, 0}, 12534 {0x2F, 0x7f, 0}, 12535 {0x30, 0x27, 0}, 12536 {0x31, 0, 1}, 12537 {0x32, 0, 1}, 12538 {0x33, 0, 1}, 12539 {0x34, 0, 0}, 12540 {0x35, 0x20, 0}, 12541 {0x36, 0x18, 0}, 12542 {0x37, 0x7, 0}, 12543 {0x38, 0x66, 0}, 12544 {0x39, 0x66, 0}, 12545 {0x3A, 0x66, 0}, 12546 {0x3B, 0x66, 0}, 12547 {0x3C, 0xff, 0}, 12548 {0x3D, 0xff, 0}, 12549 {0x3E, 0xff, 0}, 12550 {0x3F, 0xff, 0}, 12551 {0x40, 0x16, 0}, 12552 {0x41, 0x7, 0}, 12553 {0x42, 0x19, 0}, 12554 {0x43, 0x7, 0}, 12555 {0x44, 0x6, 0}, 12556 {0x45, 0x3, 0}, 12557 {0x46, 0x1, 0}, 12558 {0x47, 0x7, 0}, 12559 {0x48, 0x33, 0}, 12560 {0x49, 0x5, 0}, 12561 {0x4A, 0x77, 0}, 12562 {0x4B, 0x66, 0}, 12563 {0x4C, 0x66, 0}, 12564 {0x4D, 0, 0}, 12565 {0x4E, 0x4, 0}, 12566 {0x4F, 0xc, 0}, 12567 {0x50, 0, 0}, 12568 {0x51, 0x70, 1}, 12569 {0x56, 0x7, 0}, 12570 {0x57, 0, 0}, 12571 {0x58, 0, 0}, 12572 {0x59, 0x88, 1}, 12573 {0x5A, 0, 0}, 12574 {0x5B, 0x1f, 0}, 12575 {0x5C, 0x20, 1}, 12576 {0x5D, 0x1, 0}, 12577 {0x5E, 0x30, 0}, 12578 {0x5F, 0x70, 0}, 12579 {0x60, 0, 0}, 12580 {0x61, 0, 0}, 12581 {0x62, 0x33, 1}, 12582 {0x63, 0xf, 1}, 12583 {0x64, 0x13, 1}, 12584 {0x65, 0, 0}, 12585 {0x66, 0xee, 1}, 12586 {0x69, 0, 0}, 12587 {0x6A, 0x7e, 0}, 12588 {0x6B, 0x3f, 0}, 12589 {0x6C, 0x7f, 0}, 12590 {0x6D, 0x78, 0}, 12591 {0x6E, 0x58, 1}, 12592 {0x6F, 0x88, 0}, 12593 {0x70, 0x8, 0}, 12594 {0x71, 0xf, 0}, 12595 {0x72, 0xbc, 0}, 12596 {0x73, 0x8, 0}, 12597 {0x74, 0x60, 0}, 12598 {0x75, 0x13, 1}, 12599 {0x76, 0x70, 0}, 12600 {0x77, 0, 0}, 12601 {0x78, 0, 0}, 12602 {0x79, 0, 0}, 12603 {0x7A, 0x33, 0}, 12604 {0x7B, 0x13, 1}, 12605 {0x7C, 0x14, 1}, 12606 {0x7D, 0xee, 1}, 12607 {0x80, 0x3c, 0}, 12608 {0x81, 0x1, 1}, 12609 {0x82, 0xa, 0}, 12610 {0x83, 0x9d, 0}, 12611 {0x84, 0xa, 0}, 12612 {0x85, 0, 0}, 12613 {0x86, 0x40, 0}, 12614 {0x87, 0x40, 0}, 12615 {0x88, 0x88, 0}, 12616 {0x89, 0x10, 0}, 12617 {0x8A, 0xf0, 0}, 12618 {0x8B, 0x10, 0}, 12619 {0x8C, 0xf0, 0}, 12620 {0x8D, 0, 0}, 12621 {0x8E, 0, 0}, 12622 {0x8F, 0x10, 0}, 12623 {0x90, 0x55, 0}, 12624 {0x91, 0x3f, 1}, 12625 {0x92, 0x36, 1}, 12626 {0x93, 0, 0}, 12627 {0x94, 0, 0}, 12628 {0x95, 0, 0}, 12629 {0x96, 0x87, 0}, 12630 {0x97, 0x11, 0}, 12631 {0x98, 0, 0}, 12632 {0x99, 0x33, 0}, 12633 {0x9A, 0x88, 0}, 12634 {0x9B, 0, 0}, 12635 {0x9C, 0x87, 0}, 12636 {0x9D, 0x11, 0}, 12637 {0x9E, 0, 0}, 12638 {0x9F, 0x33, 0}, 12639 {0xA0, 0x88, 0}, 12640 {0xA1, 0x20, 1}, 12641 {0xA2, 0x3f, 0}, 12642 {0xA3, 0x44, 0}, 12643 {0xA4, 0x8c, 0}, 12644 {0xA5, 0x6c, 0}, 12645 {0xA6, 0x22, 0}, 12646 {0xA7, 0xbe, 0}, 12647 {0xA8, 0x55, 0}, 12648 {0xAA, 0xc, 0}, 12649 {0xAB, 0xaa, 0}, 12650 {0xAC, 0x2, 0}, 12651 {0xAD, 0, 0}, 12652 {0xAE, 0x10, 0}, 12653 {0xAF, 0x1, 0}, 12654 {0xB0, 0, 0}, 12655 {0xB1, 0, 0}, 12656 {0xB2, 0x80, 0}, 12657 {0xB3, 0x60, 0}, 12658 {0xB4, 0x44, 0}, 12659 {0xB5, 0x55, 0}, 12660 {0xB6, 0x1, 0}, 12661 {0xB7, 0x55, 0}, 12662 {0xB8, 0x1, 0}, 12663 {0xB9, 0x5, 0}, 12664 {0xBA, 0x55, 0}, 12665 {0xBB, 0x55, 0}, 12666 {0xC1, 0, 0}, 12667 {0xC2, 0, 0}, 12668 {0xC3, 0, 0}, 12669 {0xC4, 0, 0}, 12670 {0xC5, 0, 0}, 12671 {0xC6, 0, 0}, 12672 {0xC7, 0, 0}, 12673 {0xC8, 0, 0}, 12674 {0xC9, 0, 0}, 12675 {0xCA, 0, 0}, 12676 {0xCB, 0, 0}, 12677 {0xCC, 0, 0}, 12678 {0xCD, 0, 0}, 12679 {0xCE, 0x5e, 0}, 12680 {0xCF, 0xc, 0}, 12681 {0xD0, 0xc, 0}, 12682 {0xD1, 0xc, 0}, 12683 {0xD2, 0, 0}, 12684 {0xD3, 0x2b, 0}, 12685 {0xD4, 0xc, 0}, 12686 {0xD5, 0, 0}, 12687 {0xD6, 0x70, 1}, 12688 {0xDB, 0x7, 0}, 12689 {0xDC, 0, 0}, 12690 {0xDD, 0, 0}, 12691 {0xDE, 0x88, 1}, 12692 {0xDF, 0, 0}, 12693 {0xE0, 0x1f, 0}, 12694 {0xE1, 0x20, 1}, 12695 {0xE2, 0x1, 0}, 12696 {0xE3, 0x30, 0}, 12697 {0xE4, 0x70, 0}, 12698 {0xE5, 0, 0}, 12699 {0xE6, 0, 0}, 12700 {0xE7, 0x33, 0}, 12701 {0xE8, 0xf, 1}, 12702 {0xE9, 0x13, 1}, 12703 {0xEA, 0, 0}, 12704 {0xEB, 0xee, 1}, 12705 {0xEE, 0, 0}, 12706 {0xEF, 0x7e, 0}, 12707 {0xF0, 0x3f, 0}, 12708 {0xF1, 0x7f, 0}, 12709 {0xF2, 0x78, 0}, 12710 {0xF3, 0x58, 1}, 12711 {0xF4, 0x88, 0}, 12712 {0xF5, 0x8, 0}, 12713 {0xF6, 0xf, 0}, 12714 {0xF7, 0xbc, 0}, 12715 {0xF8, 0x8, 0}, 12716 {0xF9, 0x60, 0}, 12717 {0xFA, 0x13, 1}, 12718 {0xFB, 0x70, 0}, 12719 {0xFC, 0, 0}, 12720 {0xFD, 0, 0}, 12721 {0xFE, 0, 0}, 12722 {0xFF, 0x33, 0}, 12723 {0x100, 0x13, 1}, 12724 {0x101, 0x14, 1}, 12725 {0x102, 0xee, 1}, 12726 {0x105, 0x3c, 0}, 12727 {0x106, 0x1, 1}, 12728 {0x107, 0xa, 0}, 12729 {0x108, 0x9d, 0}, 12730 {0x109, 0xa, 0}, 12731 {0x10A, 0, 0}, 12732 {0x10B, 0x40, 0}, 12733 {0x10C, 0x40, 0}, 12734 {0x10D, 0x88, 0}, 12735 {0x10E, 0x10, 0}, 12736 {0x10F, 0xf0, 0}, 12737 {0x110, 0x10, 0}, 12738 {0x111, 0xf0, 0}, 12739 {0x112, 0, 0}, 12740 {0x113, 0, 0}, 12741 {0x114, 0x10, 0}, 12742 {0x115, 0x55, 0}, 12743 {0x116, 0x3f, 1}, 12744 {0x117, 0x36, 1}, 12745 {0x118, 0, 0}, 12746 {0x119, 0, 0}, 12747 {0x11A, 0, 0}, 12748 {0x11B, 0x87, 0}, 12749 {0x11C, 0x11, 0}, 12750 {0x11D, 0, 0}, 12751 {0x11E, 0x33, 0}, 12752 {0x11F, 0x88, 0}, 12753 {0x120, 0, 0}, 12754 {0x121, 0x87, 0}, 12755 {0x122, 0x11, 0}, 12756 {0x123, 0, 0}, 12757 {0x124, 0x33, 0}, 12758 {0x125, 0x88, 0}, 12759 {0x126, 0x20, 1}, 12760 {0x127, 0x3f, 0}, 12761 {0x128, 0x44, 0}, 12762 {0x129, 0x8c, 0}, 12763 {0x12A, 0x6c, 0}, 12764 {0x12B, 0x22, 0}, 12765 {0x12C, 0xbe, 0}, 12766 {0x12D, 0x55, 0}, 12767 {0x12F, 0xc, 0}, 12768 {0x130, 0xaa, 0}, 12769 {0x131, 0x2, 0}, 12770 {0x132, 0, 0}, 12771 {0x133, 0x10, 0}, 12772 {0x134, 0x1, 0}, 12773 {0x135, 0, 0}, 12774 {0x136, 0, 0}, 12775 {0x137, 0x80, 0}, 12776 {0x138, 0x60, 0}, 12777 {0x139, 0x44, 0}, 12778 {0x13A, 0x55, 0}, 12779 {0x13B, 0x1, 0}, 12780 {0x13C, 0x55, 0}, 12781 {0x13D, 0x1, 0}, 12782 {0x13E, 0x5, 0}, 12783 {0x13F, 0x55, 0}, 12784 {0x140, 0x55, 0}, 12785 {0x146, 0, 0}, 12786 {0x147, 0, 0}, 12787 {0x148, 0, 0}, 12788 {0x149, 0, 0}, 12789 {0x14A, 0, 0}, 12790 {0x14B, 0, 0}, 12791 {0x14C, 0, 0}, 12792 {0x14D, 0, 0}, 12793 {0x14E, 0, 0}, 12794 {0x14F, 0, 0}, 12795 {0x150, 0, 0}, 12796 {0x151, 0, 0}, 12797 {0x154, 0xc, 0}, 12798 {0x155, 0xc, 0}, 12799 {0x156, 0xc, 0}, 12800 {0x157, 0, 0}, 12801 {0x158, 0x2b, 0}, 12802 {0x159, 0x84, 0}, 12803 {0x15A, 0x15, 0}, 12804 {0x15B, 0xf, 0}, 12805 {0x15C, 0, 0}, 12806 {0x15D, 0, 0}, 12807 {0x15E, 0, 1}, 12808 {0x15F, 0, 1}, 12809 {0x160, 0, 1}, 12810 {0x161, 0, 1}, 12811 {0x162, 0, 1}, 12812 {0x163, 0, 1}, 12813 {0x164, 0, 0}, 12814 {0x165, 0, 0}, 12815 {0x166, 0, 0}, 12816 {0x167, 0, 0}, 12817 {0x168, 0, 0}, 12818 {0x169, 0, 0}, 12819 {0x16A, 0, 1}, 12820 {0x16B, 0, 1}, 12821 {0x16C, 0, 1}, 12822 {0x16D, 0, 0}, 12823 {0x170, 0, 0}, 12824 {0x171, 0x77, 0}, 12825 {0x172, 0x77, 0}, 12826 {0x173, 0x77, 0}, 12827 {0x174, 0x77, 0}, 12828 {0x175, 0, 0}, 12829 {0x176, 0x3, 0}, 12830 {0x177, 0x37, 0}, 12831 {0x178, 0x3, 0}, 12832 {0x179, 0, 0}, 12833 {0x17A, 0x21, 0}, 12834 {0x17B, 0x21, 0}, 12835 {0x17C, 0, 0}, 12836 {0x17D, 0xaa, 0}, 12837 {0x17E, 0, 0}, 12838 {0x17F, 0xaa, 0}, 12839 {0x180, 0, 0}, 12840 {0x190, 0, 0}, 12841 {0x191, 0x77, 0}, 12842 {0x192, 0x77, 0}, 12843 {0x193, 0x77, 0}, 12844 {0x194, 0x77, 0}, 12845 {0x195, 0, 0}, 12846 {0x196, 0x3, 0}, 12847 {0x197, 0x37, 0}, 12848 {0x198, 0x3, 0}, 12849 {0x199, 0, 0}, 12850 {0x19A, 0x21, 0}, 12851 {0x19B, 0x21, 0}, 12852 {0x19C, 0, 0}, 12853 {0x19D, 0xaa, 0}, 12854 {0x19E, 0, 0}, 12855 {0x19F, 0xaa, 0}, 12856 {0x1A0, 0, 0}, 12857 {0x1A1, 0x2, 0}, 12858 {0x1A2, 0xf, 0}, 12859 {0x1A3, 0xf, 0}, 12860 {0x1A4, 0, 1}, 12861 {0x1A5, 0, 1}, 12862 {0x1A6, 0, 1}, 12863 {0x1A7, 0x2, 0}, 12864 {0x1A8, 0xf, 0}, 12865 {0x1A9, 0xf, 0}, 12866 {0x1AA, 0, 1}, 12867 {0x1AB, 0, 1}, 12868 {0x1AC, 0, 1}, 12869 {0x1AD, 0x84, 0}, 12870 {0x1AE, 0x60, 0}, 12871 {0x1AF, 0x47, 0}, 12872 {0x1B0, 0x47, 0}, 12873 {0x1B1, 0, 0}, 12874 {0x1B2, 0, 0}, 12875 {0x1B3, 0, 0}, 12876 {0x1B4, 0, 0}, 12877 {0x1B5, 0, 0}, 12878 {0x1B6, 0, 0}, 12879 {0x1B7, 0x5, 1}, 12880 {0x1B8, 0, 0}, 12881 {0x1B9, 0, 0}, 12882 {0x1BA, 0, 0}, 12883 {0x1BB, 0, 0}, 12884 {0x1BC, 0, 0}, 12885 {0x1BD, 0, 0}, 12886 {0x1BE, 0, 0}, 12887 {0x1BF, 0, 0}, 12888 {0x1C0, 0, 0}, 12889 {0x1C1, 0, 0}, 12890 {0x1C2, 0xa0, 1}, 12891 {0x1C3, 0, 0}, 12892 {0x1C4, 0, 0}, 12893 {0x1C5, 0, 0}, 12894 {0x1C6, 0, 0}, 12895 {0x1C7, 0, 0}, 12896 {0x1C8, 0, 0}, 12897 {0x1C9, 0, 0}, 12898 {0x1CA, 0, 0}, 12899 {0xFFFF, 0, 0} 12900 }; 12901 12902 static struct radio_20xx_regs regs_2057_rev8[] = { 12903 {0x00, 0x8, 1}, 12904 {0x01, 0x57, 1}, 12905 {0x02, 0x20, 1}, 12906 {0x03, 0x1f, 0}, 12907 {0x04, 0x4, 0}, 12908 {0x05, 0x2, 0}, 12909 {0x06, 0x1, 0}, 12910 {0x07, 0x1, 0}, 12911 {0x08, 0x1, 0}, 12912 {0x09, 0x69, 0}, 12913 {0x0A, 0x66, 0}, 12914 {0x0B, 0x6, 0}, 12915 {0x0C, 0x18, 0}, 12916 {0x0D, 0x3, 0}, 12917 {0x0E, 0x20, 0}, 12918 {0x0F, 0x20, 0}, 12919 {0x10, 0, 0}, 12920 {0x11, 0x7c, 0}, 12921 {0x12, 0x42, 0}, 12922 {0x13, 0xbd, 0}, 12923 {0x14, 0x7, 0}, 12924 {0x15, 0x87, 0}, 12925 {0x16, 0x8, 0}, 12926 {0x17, 0x17, 0}, 12927 {0x18, 0x7, 0}, 12928 {0x19, 0, 0}, 12929 {0x1A, 0x2, 0}, 12930 {0x1B, 0x13, 0}, 12931 {0x1C, 0x3e, 0}, 12932 {0x1D, 0x3e, 0}, 12933 {0x1E, 0x96, 0}, 12934 {0x1F, 0x4, 0}, 12935 {0x20, 0, 0}, 12936 {0x21, 0, 0}, 12937 {0x22, 0x17, 0}, 12938 {0x23, 0x6, 0}, 12939 {0x24, 0x1, 0}, 12940 {0x25, 0x6, 0}, 12941 {0x26, 0x4, 0}, 12942 {0x27, 0xd, 0}, 12943 {0x28, 0xd, 0}, 12944 {0x29, 0x30, 0}, 12945 {0x2A, 0x32, 0}, 12946 {0x2B, 0x8, 0}, 12947 {0x2C, 0x1c, 0}, 12948 {0x2D, 0x2, 0}, 12949 {0x2E, 0x4, 0}, 12950 {0x2F, 0x7f, 0}, 12951 {0x30, 0x27, 0}, 12952 {0x31, 0, 1}, 12953 {0x32, 0, 1}, 12954 {0x33, 0, 1}, 12955 {0x34, 0, 0}, 12956 {0x35, 0x20, 0}, 12957 {0x36, 0x18, 0}, 12958 {0x37, 0x7, 0}, 12959 {0x38, 0x66, 0}, 12960 {0x39, 0x66, 0}, 12961 {0x3A, 0x66, 0}, 12962 {0x3B, 0x66, 0}, 12963 {0x3C, 0xff, 0}, 12964 {0x3D, 0xff, 0}, 12965 {0x3E, 0xff, 0}, 12966 {0x3F, 0xff, 0}, 12967 {0x40, 0x16, 0}, 12968 {0x41, 0x7, 0}, 12969 {0x42, 0x19, 0}, 12970 {0x43, 0x7, 0}, 12971 {0x44, 0x6, 0}, 12972 {0x45, 0x3, 0}, 12973 {0x46, 0x1, 0}, 12974 {0x47, 0x7, 0}, 12975 {0x48, 0x33, 0}, 12976 {0x49, 0x5, 0}, 12977 {0x4A, 0x77, 0}, 12978 {0x4B, 0x66, 0}, 12979 {0x4C, 0x66, 0}, 12980 {0x4D, 0, 0}, 12981 {0x4E, 0x4, 0}, 12982 {0x4F, 0xc, 0}, 12983 {0x50, 0, 0}, 12984 {0x51, 0x70, 1}, 12985 {0x56, 0x7, 0}, 12986 {0x57, 0, 0}, 12987 {0x58, 0, 0}, 12988 {0x59, 0x88, 1}, 12989 {0x5A, 0, 0}, 12990 {0x5B, 0x1f, 0}, 12991 {0x5C, 0x20, 1}, 12992 {0x5D, 0x1, 0}, 12993 {0x5E, 0x30, 0}, 12994 {0x5F, 0x70, 0}, 12995 {0x60, 0, 0}, 12996 {0x61, 0, 0}, 12997 {0x62, 0x33, 1}, 12998 {0x63, 0xf, 1}, 12999 {0x64, 0xf, 1}, 13000 {0x65, 0, 0}, 13001 {0x66, 0x11, 0}, 13002 {0x69, 0, 0}, 13003 {0x6A, 0x7e, 0}, 13004 {0x6B, 0x3f, 0}, 13005 {0x6C, 0x7f, 0}, 13006 {0x6D, 0x78, 0}, 13007 {0x6E, 0x58, 1}, 13008 {0x6F, 0x88, 0}, 13009 {0x70, 0x8, 0}, 13010 {0x71, 0xf, 0}, 13011 {0x72, 0xbc, 0}, 13012 {0x73, 0x8, 0}, 13013 {0x74, 0x60, 0}, 13014 {0x75, 0x13, 1}, 13015 {0x76, 0x70, 0}, 13016 {0x77, 0, 0}, 13017 {0x78, 0, 0}, 13018 {0x79, 0, 0}, 13019 {0x7A, 0x33, 0}, 13020 {0x7B, 0x13, 1}, 13021 {0x7C, 0xf, 1}, 13022 {0x7D, 0xee, 1}, 13023 {0x80, 0x3c, 0}, 13024 {0x81, 0x1, 1}, 13025 {0x82, 0xa, 0}, 13026 {0x83, 0x9d, 0}, 13027 {0x84, 0xa, 0}, 13028 {0x85, 0, 0}, 13029 {0x86, 0x40, 0}, 13030 {0x87, 0x40, 0}, 13031 {0x88, 0x88, 0}, 13032 {0x89, 0x10, 0}, 13033 {0x8A, 0xf0, 0}, 13034 {0x8B, 0x10, 0}, 13035 {0x8C, 0xf0, 0}, 13036 {0x8D, 0, 0}, 13037 {0x8E, 0, 0}, 13038 {0x8F, 0x10, 0}, 13039 {0x90, 0x55, 0}, 13040 {0x91, 0x3f, 1}, 13041 {0x92, 0x36, 1}, 13042 {0x93, 0, 0}, 13043 {0x94, 0, 0}, 13044 {0x95, 0, 0}, 13045 {0x96, 0x87, 0}, 13046 {0x97, 0x11, 0}, 13047 {0x98, 0, 0}, 13048 {0x99, 0x33, 0}, 13049 {0x9A, 0x88, 0}, 13050 {0x9B, 0, 0}, 13051 {0x9C, 0x87, 0}, 13052 {0x9D, 0x11, 0}, 13053 {0x9E, 0, 0}, 13054 {0x9F, 0x33, 0}, 13055 {0xA0, 0x88, 0}, 13056 {0xA1, 0x20, 1}, 13057 {0xA2, 0x3f, 0}, 13058 {0xA3, 0x44, 0}, 13059 {0xA4, 0x8c, 0}, 13060 {0xA5, 0x6c, 0}, 13061 {0xA6, 0x22, 0}, 13062 {0xA7, 0xbe, 0}, 13063 {0xA8, 0x55, 0}, 13064 {0xAA, 0xc, 0}, 13065 {0xAB, 0xaa, 0}, 13066 {0xAC, 0x2, 0}, 13067 {0xAD, 0, 0}, 13068 {0xAE, 0x10, 0}, 13069 {0xAF, 0x1, 0}, 13070 {0xB0, 0, 0}, 13071 {0xB1, 0, 0}, 13072 {0xB2, 0x80, 0}, 13073 {0xB3, 0x60, 0}, 13074 {0xB4, 0x44, 0}, 13075 {0xB5, 0x55, 0}, 13076 {0xB6, 0x1, 0}, 13077 {0xB7, 0x55, 0}, 13078 {0xB8, 0x1, 0}, 13079 {0xB9, 0x5, 0}, 13080 {0xBA, 0x55, 0}, 13081 {0xBB, 0x55, 0}, 13082 {0xC1, 0, 0}, 13083 {0xC2, 0, 0}, 13084 {0xC3, 0, 0}, 13085 {0xC4, 0, 0}, 13086 {0xC5, 0, 0}, 13087 {0xC6, 0, 0}, 13088 {0xC7, 0, 0}, 13089 {0xC8, 0, 0}, 13090 {0xC9, 0x1, 1}, 13091 {0xCA, 0, 0}, 13092 {0xCB, 0, 0}, 13093 {0xCC, 0, 0}, 13094 {0xCD, 0, 0}, 13095 {0xCE, 0x5e, 0}, 13096 {0xCF, 0xc, 0}, 13097 {0xD0, 0xc, 0}, 13098 {0xD1, 0xc, 0}, 13099 {0xD2, 0, 0}, 13100 {0xD3, 0x2b, 0}, 13101 {0xD4, 0xc, 0}, 13102 {0xD5, 0, 0}, 13103 {0xD6, 0x70, 1}, 13104 {0xDB, 0x7, 0}, 13105 {0xDC, 0, 0}, 13106 {0xDD, 0, 0}, 13107 {0xDE, 0x88, 1}, 13108 {0xDF, 0, 0}, 13109 {0xE0, 0x1f, 0}, 13110 {0xE1, 0x20, 1}, 13111 {0xE2, 0x1, 0}, 13112 {0xE3, 0x30, 0}, 13113 {0xE4, 0x70, 0}, 13114 {0xE5, 0, 0}, 13115 {0xE6, 0, 0}, 13116 {0xE7, 0x33, 0}, 13117 {0xE8, 0xf, 1}, 13118 {0xE9, 0xf, 1}, 13119 {0xEA, 0, 0}, 13120 {0xEB, 0x11, 0}, 13121 {0xEE, 0, 0}, 13122 {0xEF, 0x7e, 0}, 13123 {0xF0, 0x3f, 0}, 13124 {0xF1, 0x7f, 0}, 13125 {0xF2, 0x78, 0}, 13126 {0xF3, 0x58, 1}, 13127 {0xF4, 0x88, 0}, 13128 {0xF5, 0x8, 0}, 13129 {0xF6, 0xf, 0}, 13130 {0xF7, 0xbc, 0}, 13131 {0xF8, 0x8, 0}, 13132 {0xF9, 0x60, 0}, 13133 {0xFA, 0x13, 1}, 13134 {0xFB, 0x70, 0}, 13135 {0xFC, 0, 0}, 13136 {0xFD, 0, 0}, 13137 {0xFE, 0, 0}, 13138 {0xFF, 0x33, 0}, 13139 {0x100, 0x13, 1}, 13140 {0x101, 0xf, 1}, 13141 {0x102, 0xee, 1}, 13142 {0x105, 0x3c, 0}, 13143 {0x106, 0x1, 1}, 13144 {0x107, 0xa, 0}, 13145 {0x108, 0x9d, 0}, 13146 {0x109, 0xa, 0}, 13147 {0x10A, 0, 0}, 13148 {0x10B, 0x40, 0}, 13149 {0x10C, 0x40, 0}, 13150 {0x10D, 0x88, 0}, 13151 {0x10E, 0x10, 0}, 13152 {0x10F, 0xf0, 0}, 13153 {0x110, 0x10, 0}, 13154 {0x111, 0xf0, 0}, 13155 {0x112, 0, 0}, 13156 {0x113, 0, 0}, 13157 {0x114, 0x10, 0}, 13158 {0x115, 0x55, 0}, 13159 {0x116, 0x3f, 1}, 13160 {0x117, 0x36, 1}, 13161 {0x118, 0, 0}, 13162 {0x119, 0, 0}, 13163 {0x11A, 0, 0}, 13164 {0x11B, 0x87, 0}, 13165 {0x11C, 0x11, 0}, 13166 {0x11D, 0, 0}, 13167 {0x11E, 0x33, 0}, 13168 {0x11F, 0x88, 0}, 13169 {0x120, 0, 0}, 13170 {0x121, 0x87, 0}, 13171 {0x122, 0x11, 0}, 13172 {0x123, 0, 0}, 13173 {0x124, 0x33, 0}, 13174 {0x125, 0x88, 0}, 13175 {0x126, 0x20, 1}, 13176 {0x127, 0x3f, 0}, 13177 {0x128, 0x44, 0}, 13178 {0x129, 0x8c, 0}, 13179 {0x12A, 0x6c, 0}, 13180 {0x12B, 0x22, 0}, 13181 {0x12C, 0xbe, 0}, 13182 {0x12D, 0x55, 0}, 13183 {0x12F, 0xc, 0}, 13184 {0x130, 0xaa, 0}, 13185 {0x131, 0x2, 0}, 13186 {0x132, 0, 0}, 13187 {0x133, 0x10, 0}, 13188 {0x134, 0x1, 0}, 13189 {0x135, 0, 0}, 13190 {0x136, 0, 0}, 13191 {0x137, 0x80, 0}, 13192 {0x138, 0x60, 0}, 13193 {0x139, 0x44, 0}, 13194 {0x13A, 0x55, 0}, 13195 {0x13B, 0x1, 0}, 13196 {0x13C, 0x55, 0}, 13197 {0x13D, 0x1, 0}, 13198 {0x13E, 0x5, 0}, 13199 {0x13F, 0x55, 0}, 13200 {0x140, 0x55, 0}, 13201 {0x146, 0, 0}, 13202 {0x147, 0, 0}, 13203 {0x148, 0, 0}, 13204 {0x149, 0, 0}, 13205 {0x14A, 0, 0}, 13206 {0x14B, 0, 0}, 13207 {0x14C, 0, 0}, 13208 {0x14D, 0, 0}, 13209 {0x14E, 0x1, 1}, 13210 {0x14F, 0, 0}, 13211 {0x150, 0, 0}, 13212 {0x151, 0, 0}, 13213 {0x154, 0xc, 0}, 13214 {0x155, 0xc, 0}, 13215 {0x156, 0xc, 0}, 13216 {0x157, 0, 0}, 13217 {0x158, 0x2b, 0}, 13218 {0x159, 0x84, 0}, 13219 {0x15A, 0x15, 0}, 13220 {0x15B, 0xf, 0}, 13221 {0x15C, 0, 0}, 13222 {0x15D, 0, 0}, 13223 {0x15E, 0, 1}, 13224 {0x15F, 0, 1}, 13225 {0x160, 0, 1}, 13226 {0x161, 0, 1}, 13227 {0x162, 0, 1}, 13228 {0x163, 0, 1}, 13229 {0x164, 0, 0}, 13230 {0x165, 0, 0}, 13231 {0x166, 0, 0}, 13232 {0x167, 0, 0}, 13233 {0x168, 0, 0}, 13234 {0x169, 0, 0}, 13235 {0x16A, 0, 1}, 13236 {0x16B, 0, 1}, 13237 {0x16C, 0, 1}, 13238 {0x16D, 0, 0}, 13239 {0x170, 0, 0}, 13240 {0x171, 0x77, 0}, 13241 {0x172, 0x77, 0}, 13242 {0x173, 0x77, 0}, 13243 {0x174, 0x77, 0}, 13244 {0x175, 0, 0}, 13245 {0x176, 0x3, 0}, 13246 {0x177, 0x37, 0}, 13247 {0x178, 0x3, 0}, 13248 {0x179, 0, 0}, 13249 {0x17A, 0x21, 0}, 13250 {0x17B, 0x21, 0}, 13251 {0x17C, 0, 0}, 13252 {0x17D, 0xaa, 0}, 13253 {0x17E, 0, 0}, 13254 {0x17F, 0xaa, 0}, 13255 {0x180, 0, 0}, 13256 {0x190, 0, 0}, 13257 {0x191, 0x77, 0}, 13258 {0x192, 0x77, 0}, 13259 {0x193, 0x77, 0}, 13260 {0x194, 0x77, 0}, 13261 {0x195, 0, 0}, 13262 {0x196, 0x3, 0}, 13263 {0x197, 0x37, 0}, 13264 {0x198, 0x3, 0}, 13265 {0x199, 0, 0}, 13266 {0x19A, 0x21, 0}, 13267 {0x19B, 0x21, 0}, 13268 {0x19C, 0, 0}, 13269 {0x19D, 0xaa, 0}, 13270 {0x19E, 0, 0}, 13271 {0x19F, 0xaa, 0}, 13272 {0x1A0, 0, 0}, 13273 {0x1A1, 0x2, 0}, 13274 {0x1A2, 0xf, 0}, 13275 {0x1A3, 0xf, 0}, 13276 {0x1A4, 0, 1}, 13277 {0x1A5, 0, 1}, 13278 {0x1A6, 0, 1}, 13279 {0x1A7, 0x2, 0}, 13280 {0x1A8, 0xf, 0}, 13281 {0x1A9, 0xf, 0}, 13282 {0x1AA, 0, 1}, 13283 {0x1AB, 0, 1}, 13284 {0x1AC, 0, 1}, 13285 {0x1AD, 0x84, 0}, 13286 {0x1AE, 0x60, 0}, 13287 {0x1AF, 0x47, 0}, 13288 {0x1B0, 0x47, 0}, 13289 {0x1B1, 0, 0}, 13290 {0x1B2, 0, 0}, 13291 {0x1B3, 0, 0}, 13292 {0x1B4, 0, 0}, 13293 {0x1B5, 0, 0}, 13294 {0x1B6, 0, 0}, 13295 {0x1B7, 0x5, 1}, 13296 {0x1B8, 0, 0}, 13297 {0x1B9, 0, 0}, 13298 {0x1BA, 0, 0}, 13299 {0x1BB, 0, 0}, 13300 {0x1BC, 0, 0}, 13301 {0x1BD, 0, 0}, 13302 {0x1BE, 0, 0}, 13303 {0x1BF, 0, 0}, 13304 {0x1C0, 0, 0}, 13305 {0x1C1, 0, 0}, 13306 {0x1C2, 0xa0, 1}, 13307 {0x1C3, 0, 0}, 13308 {0x1C4, 0, 0}, 13309 {0x1C5, 0, 0}, 13310 {0x1C6, 0, 0}, 13311 {0x1C7, 0, 0}, 13312 {0x1C8, 0, 0}, 13313 {0x1C9, 0, 0}, 13314 {0x1CA, 0, 0}, 13315 {0xFFFF, 0, 0} 13316 }; 13317 13318 static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; 13319 13320 static s32 nphy_lnagain_est0[] = { -315, 40370 }; 13321 static s32 nphy_lnagain_est1[] = { -224, 23242 }; 13322 13323 static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { 13324 { 13325 {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, 13326 {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, 13327 {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, 13328 {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, 13329 {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, 13330 {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, 13331 {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, 13332 {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, 13333 {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} 13334 }, 13335 { 13336 {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13337 {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13338 {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, 13339 {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, 13340 {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, 13341 {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, 13342 {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, 13343 {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, 13344 {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} 13345 } 13346 }; 13347 13348 static const u32 nphy_tpc_txgain[] = { 13349 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, 13350 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, 13351 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, 13352 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, 13353 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, 13354 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, 13355 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, 13356 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, 13357 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, 13358 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, 13359 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, 13360 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, 13361 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, 13362 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, 13363 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, 13364 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, 13365 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, 13366 0x03902942, 0x03902844, 0x03902842, 0x03902744, 13367 0x03902742, 0x03902644, 0x03902642, 0x03902544, 13368 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, 13369 0x03802a42, 0x03802944, 0x03802942, 0x03802844, 13370 0x03802842, 0x03802744, 0x03802742, 0x03802644, 13371 0x03802642, 0x03802544, 0x03802542, 0x03802444, 13372 0x03802442, 0x03802344, 0x03802342, 0x03802244, 13373 0x03802242, 0x03802144, 0x03802142, 0x03802044, 13374 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, 13375 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, 13376 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, 13377 0x03801a42, 0x03801944, 0x03801942, 0x03801844, 13378 0x03801842, 0x03801744, 0x03801742, 0x03801644, 13379 0x03801642, 0x03801544, 0x03801542, 0x03801444, 13380 0x03801442, 0x03801344, 0x03801342, 0x00002b00 13381 }; 13382 13383 static const u16 nphy_tpc_loscale[] = { 13384 256, 256, 271, 271, 287, 256, 256, 271, 13385 271, 287, 287, 304, 304, 256, 256, 271, 13386 271, 287, 287, 304, 304, 322, 322, 341, 13387 341, 362, 362, 383, 383, 256, 256, 271, 13388 271, 287, 287, 304, 304, 322, 322, 256, 13389 256, 271, 271, 287, 287, 304, 304, 322, 13390 322, 341, 341, 362, 362, 256, 256, 271, 13391 271, 287, 287, 304, 304, 322, 322, 256, 13392 256, 271, 271, 287, 287, 304, 304, 322, 13393 322, 341, 341, 362, 362, 256, 256, 271, 13394 271, 287, 287, 304, 304, 322, 322, 341, 13395 341, 362, 362, 383, 383, 406, 406, 430, 13396 430, 455, 455, 482, 482, 511, 511, 541, 13397 541, 573, 573, 607, 607, 643, 643, 681, 13398 681, 722, 722, 764, 764, 810, 810, 858, 13399 858, 908, 908, 962, 962, 1019, 1019, 256 13400 }; 13401 13402 static u32 nphy_tpc_txgain_ipa[] = { 13403 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, 13404 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, 13405 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, 13406 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, 13407 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, 13408 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, 13409 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, 13410 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, 13411 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, 13412 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, 13413 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, 13414 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, 13415 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, 13416 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, 13417 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, 13418 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, 13419 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, 13420 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, 13421 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, 13422 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, 13423 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, 13424 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, 13425 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, 13426 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, 13427 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, 13428 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, 13429 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, 13430 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, 13431 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, 13432 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, 13433 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, 13434 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 13435 }; 13436 13437 static u32 nphy_tpc_txgain_ipa_rev5[] = { 13438 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, 13439 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, 13440 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, 13441 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, 13442 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, 13443 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, 13444 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, 13445 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, 13446 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, 13447 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, 13448 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, 13449 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, 13450 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, 13451 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, 13452 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, 13453 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, 13454 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, 13455 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, 13456 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, 13457 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, 13458 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, 13459 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, 13460 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, 13461 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, 13462 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, 13463 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, 13464 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, 13465 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, 13466 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, 13467 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, 13468 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, 13469 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 13470 }; 13471 13472 static u32 nphy_tpc_txgain_ipa_rev6[] = { 13473 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, 13474 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, 13475 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, 13476 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, 13477 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, 13478 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, 13479 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, 13480 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, 13481 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, 13482 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, 13483 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, 13484 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, 13485 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, 13486 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, 13487 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, 13488 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, 13489 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, 13490 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, 13491 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, 13492 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, 13493 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, 13494 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, 13495 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, 13496 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, 13497 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, 13498 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, 13499 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, 13500 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, 13501 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, 13502 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, 13503 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, 13504 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 13505 }; 13506 13507 static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { 13508 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, 13509 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, 13510 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, 13511 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, 13512 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, 13513 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, 13514 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, 13515 0x70470028, 0x70470026, 0x70470024, 0x70470022, 13516 0x7047001f, 0x70370027, 0x70370024, 0x70370022, 13517 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, 13518 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, 13519 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, 13520 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, 13521 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, 13522 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, 13523 0x70170019, 0x70170018, 0x70170016, 0x70170015, 13524 0x70170014, 0x70170013, 0x70170012, 0x70170010, 13525 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, 13526 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, 13527 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, 13528 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, 13529 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, 13530 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, 13531 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, 13532 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, 13533 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, 13534 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, 13535 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, 13536 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, 13537 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, 13538 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, 13539 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 13540 }; 13541 13542 static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { 13543 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, 13544 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, 13545 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, 13546 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, 13547 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, 13548 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, 13549 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, 13550 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, 13551 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, 13552 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, 13553 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, 13554 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, 13555 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, 13556 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, 13557 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, 13558 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, 13559 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, 13560 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, 13561 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, 13562 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, 13563 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, 13564 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, 13565 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, 13566 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, 13567 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, 13568 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, 13569 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, 13570 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, 13571 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, 13572 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, 13573 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, 13574 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 13575 }; 13576 13577 static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { 13578 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13579 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13580 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13581 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13582 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13583 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13584 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13585 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13586 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13587 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13588 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13589 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13590 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13591 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13592 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13593 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13594 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13595 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13596 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13597 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13598 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13599 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13600 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13601 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13602 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13603 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13604 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13605 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13606 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13607 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13608 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13609 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13610 }; 13611 13612 static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { 13613 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13614 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13615 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13616 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13617 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13618 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13619 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13620 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13621 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13622 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13623 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13624 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13625 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13626 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13627 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13628 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13629 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13630 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13631 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13632 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13633 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13634 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13635 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13636 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13637 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13638 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13639 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13640 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13641 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13642 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13643 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13644 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13645 }; 13646 13647 static u32 nphy_tpc_txgain_ipa_5g[] = { 13648 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, 13649 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, 13650 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, 13651 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, 13652 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, 13653 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, 13654 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, 13655 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, 13656 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, 13657 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, 13658 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, 13659 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, 13660 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, 13661 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, 13662 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, 13663 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, 13664 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, 13665 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, 13666 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, 13667 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, 13668 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, 13669 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, 13670 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, 13671 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, 13672 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, 13673 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, 13674 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, 13675 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, 13676 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, 13677 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, 13678 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, 13679 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f 13680 }; 13681 13682 static u32 nphy_tpc_txgain_ipa_5g_2057[] = { 13683 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, 13684 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, 13685 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, 13686 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, 13687 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, 13688 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, 13689 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, 13690 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, 13691 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, 13692 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, 13693 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, 13694 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, 13695 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, 13696 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, 13697 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, 13698 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, 13699 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, 13700 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, 13701 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, 13702 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, 13703 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, 13704 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, 13705 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, 13706 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, 13707 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, 13708 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, 13709 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, 13710 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, 13711 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13712 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13713 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, 13714 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 13715 }; 13716 13717 static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { 13718 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, 13719 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, 13720 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, 13721 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, 13722 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, 13723 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, 13724 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, 13725 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, 13726 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, 13727 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, 13728 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, 13729 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, 13730 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, 13731 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, 13732 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, 13733 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, 13734 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, 13735 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, 13736 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, 13737 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, 13738 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, 13739 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, 13740 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, 13741 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, 13742 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, 13743 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, 13744 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, 13745 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13746 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13747 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13748 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, 13749 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 13750 }; 13751 13752 static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { 13753 -114, -108, -98, -91, -84, -78, -70, -62, 13754 -54, -46, -39, -31, -23, -15, -8, 0 13755 }; 13756 13757 static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { 13758 -100, -95, -89, -83, -77, -70, -63, -56, 13759 -48, -41, -33, -25, -19, -12, -6, 0 13760 }; 13761 13762 static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { 13763 -159, -113, -86, -72, -62, -54, -48, -43, 13764 -39, -35, -31, -28, -25, -23, -20, -18, 13765 -17, -15, -13, -11, -10, -8, -7, -6, 13766 -5, -4, -3, -3, -2, -1, -1, 0 13767 }; 13768 13769 static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { 13770 -109, -109, -82, -68, -58, -50, -44, -39, 13771 -35, -31, -28, -26, -23, -21, -19, -17, 13772 -16, -14, -13, -11, -10, -9, -8, -7, 13773 -5, -5, -4, -3, -2, -1, -1, 0 13774 }; 13775 13776 static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { 13777 -122, -122, -95, -80, -69, -61, -54, -49, 13778 -43, -39, -35, -32, -28, -26, -23, -21, 13779 -18, -16, -15, -13, -11, -10, -8, -7, 13780 -6, -5, -4, -3, -2, -1, -1, 0 13781 }; 13782 13783 static s8 nphy_papd_pgagain_dlt_5g_2057[] = { 13784 -107, -101, -92, -85, -78, -71, -62, -55, 13785 -47, -39, -32, -24, -19, -12, -6, 0 13786 }; 13787 13788 static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { 13789 -110, -104, -95, -88, -81, -74, -66, -58, 13790 -50, -44, -36, -28, -23, -15, -8, 0 13791 }; 13792 13793 static u8 pad_gain_codes_used_2057rev5[] = { 13794 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 13795 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 13796 }; 13797 13798 static u8 pad_gain_codes_used_2057rev7[] = { 13799 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 13800 5, 4, 3, 2, 1 13801 }; 13802 13803 static u8 pad_all_gain_codes_2057[] = { 13804 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 13805 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 13806 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 13807 1, 0 13808 }; 13809 13810 static u8 pga_all_gain_codes_2057[] = { 13811 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 13812 }; 13813 13814 static u32 nphy_papd_scaltbl[] = { 13815 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, 13816 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, 13817 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, 13818 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, 13819 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, 13820 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, 13821 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, 13822 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, 13823 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, 13824 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, 13825 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, 13826 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, 13827 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, 13828 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, 13829 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, 13830 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 13831 }; 13832 13833 static u32 nphy_tpc_txgain_rev3[] = { 13834 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, 13835 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, 13836 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, 13837 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, 13838 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, 13839 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, 13840 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, 13841 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, 13842 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, 13843 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, 13844 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, 13845 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, 13846 0x19410044, 0x19410042, 0x19410040, 0x1941003e, 13847 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, 13848 0x18410044, 0x18410042, 0x18410040, 0x1841003e, 13849 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, 13850 0x17410044, 0x17410042, 0x17410040, 0x1741003e, 13851 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, 13852 0x16410044, 0x16410042, 0x16410040, 0x1641003e, 13853 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, 13854 0x15410044, 0x15410042, 0x15410040, 0x1541003e, 13855 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, 13856 0x14410044, 0x14410042, 0x14410040, 0x1441003e, 13857 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, 13858 0x13410044, 0x13410042, 0x13410040, 0x1341003e, 13859 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, 13860 0x12410044, 0x12410042, 0x12410040, 0x1241003e, 13861 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, 13862 0x11410044, 0x11410042, 0x11410040, 0x1141003e, 13863 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, 13864 0x10410044, 0x10410042, 0x10410040, 0x1041003e, 13865 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 13866 }; 13867 13868 static u32 nphy_tpc_txgain_HiPwrEPA[] = { 13869 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, 13870 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, 13871 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, 13872 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, 13873 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, 13874 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, 13875 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, 13876 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, 13877 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, 13878 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, 13879 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, 13880 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, 13881 0x09410044, 0x09410042, 0x09410040, 0x0941003e, 13882 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, 13883 0x08410044, 0x08410042, 0x08410040, 0x0841003e, 13884 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, 13885 0x07410044, 0x07410042, 0x07410040, 0x0741003e, 13886 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, 13887 0x06410044, 0x06410042, 0x06410040, 0x0641003e, 13888 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, 13889 0x05410044, 0x05410042, 0x05410040, 0x0541003e, 13890 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, 13891 0x04410044, 0x04410042, 0x04410040, 0x0441003e, 13892 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, 13893 0x03410044, 0x03410042, 0x03410040, 0x0341003e, 13894 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, 13895 0x02410044, 0x02410042, 0x02410040, 0x0241003e, 13896 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, 13897 0x01410044, 0x01410042, 0x01410040, 0x0141003e, 13898 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, 13899 0x00410044, 0x00410042, 0x00410040, 0x0041003e, 13900 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 13901 }; 13902 13903 static u32 nphy_tpc_txgain_epa_2057rev3[] = { 13904 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, 13905 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, 13906 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, 13907 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, 13908 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, 13909 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, 13910 0x80390038, 0x80390035, 0x8031003a, 0x80310036, 13911 0x80310033, 0x8029003a, 0x80290037, 0x80290034, 13912 0x80290031, 0x80210039, 0x80210036, 0x80210033, 13913 0x80210030, 0x8019003c, 0x80190039, 0x80190036, 13914 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, 13915 0x80190028, 0x8011003a, 0x80110036, 0x80110033, 13916 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, 13917 0x80110027, 0x80110024, 0x80110022, 0x80110020, 13918 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, 13919 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, 13920 0x80090029, 0x80090027, 0x80090025, 0x80090023, 13921 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, 13922 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, 13923 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, 13924 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13925 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13926 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13927 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13928 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13929 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13930 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13931 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13932 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13933 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13934 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13935 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d 13936 }; 13937 13938 static u32 nphy_tpc_txgain_epa_2057rev5[] = { 13939 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, 13940 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, 13941 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, 13942 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, 13943 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, 13944 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, 13945 0x10390038, 0x10390035, 0x1031003a, 0x10310036, 13946 0x10310033, 0x1029003a, 0x10290037, 0x10290034, 13947 0x10290031, 0x10210039, 0x10210036, 0x10210033, 13948 0x10210030, 0x1019003c, 0x10190039, 0x10190036, 13949 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, 13950 0x10190028, 0x1011003a, 0x10110036, 0x10110033, 13951 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, 13952 0x10110027, 0x10110024, 0x10110022, 0x10110020, 13953 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, 13954 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, 13955 0x10090029, 0x10090027, 0x10090025, 0x10090023, 13956 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, 13957 0x1009001a, 0x10090018, 0x10090017, 0x10090016, 13958 0x10090015, 0x10090013, 0x10090012, 0x10090011, 13959 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, 13960 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, 13961 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, 13962 0x10090008, 0x10090008, 0x10090007, 0x10090007, 13963 0x10090007, 0x10090006, 0x10090006, 0x10090005, 13964 0x10090005, 0x10090005, 0x10090005, 0x10090004, 13965 0x10090004, 0x10090004, 0x10090004, 0x10090003, 13966 0x10090003, 0x10090003, 0x10090003, 0x10090003, 13967 0x10090003, 0x10090002, 0x10090002, 0x10090002, 13968 0x10090002, 0x10090002, 0x10090002, 0x10090002, 13969 0x10090002, 0x10090002, 0x10090001, 0x10090001, 13970 0x10090001, 0x10090001, 0x10090001, 0x10090001 13971 }; 13972 13973 static u32 nphy_tpc_5GHz_txgain_rev3[] = { 13974 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, 13975 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, 13976 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, 13977 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, 13978 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, 13979 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, 13980 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, 13981 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, 13982 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, 13983 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, 13984 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, 13985 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, 13986 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, 13987 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, 13988 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, 13989 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, 13990 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, 13991 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, 13992 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, 13993 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, 13994 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, 13995 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, 13996 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, 13997 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, 13998 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, 13999 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, 14000 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, 14001 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, 14002 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, 14003 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, 14004 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, 14005 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 14006 }; 14007 14008 static u32 nphy_tpc_5GHz_txgain_rev4[] = { 14009 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, 14010 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, 14011 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, 14012 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, 14013 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, 14014 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, 14015 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, 14016 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, 14017 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, 14018 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, 14019 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, 14020 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, 14021 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, 14022 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, 14023 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, 14024 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, 14025 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, 14026 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, 14027 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, 14028 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, 14029 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, 14030 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, 14031 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, 14032 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, 14033 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, 14034 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, 14035 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, 14036 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, 14037 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, 14038 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, 14039 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, 14040 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 14041 }; 14042 14043 static u32 nphy_tpc_5GHz_txgain_rev5[] = { 14044 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, 14045 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, 14046 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, 14047 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, 14048 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, 14049 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, 14050 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, 14051 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, 14052 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, 14053 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, 14054 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, 14055 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, 14056 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, 14057 0x09620039, 0x09620037, 0x09620035, 0x09620033, 14058 0x08620044, 0x08620042, 0x08620040, 0x0862003e, 14059 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, 14060 0x07620043, 0x07620042, 0x07620040, 0x0762003f, 14061 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, 14062 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, 14063 0x06620039, 0x06620037, 0x06620035, 0x06620033, 14064 0x05620046, 0x05620044, 0x05620042, 0x05620040, 14065 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, 14066 0x04620044, 0x04620042, 0x04620040, 0x0462003e, 14067 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, 14068 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, 14069 0x03620038, 0x03620037, 0x03620035, 0x03620033, 14070 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, 14071 0x02620046, 0x02620044, 0x02620043, 0x02620042, 14072 0x0162004a, 0x01620048, 0x01620046, 0x01620044, 14073 0x01620043, 0x01620042, 0x01620041, 0x01620040, 14074 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, 14075 0x0062003b, 0x00620039, 0x00620037, 0x00620035 14076 }; 14077 14078 static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { 14079 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, 14080 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, 14081 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, 14082 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, 14083 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, 14084 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, 14085 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, 14086 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, 14087 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, 14088 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, 14089 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, 14090 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, 14091 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, 14092 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, 14093 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, 14094 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, 14095 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, 14096 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, 14097 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, 14098 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, 14099 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, 14100 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, 14101 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, 14102 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, 14103 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, 14104 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, 14105 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, 14106 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, 14107 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, 14108 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, 14109 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, 14110 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 14111 }; 14112 14113 static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; 14114 static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; 14115 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { 14116 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a 14117 }; 14118 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 14119 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 14120 }; 14121 14122 bool wlc_phy_bist_check_phy(struct brcms_phy_pub *pih) 14123 { 14124 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 14125 u32 phybist0, phybist1, phybist2, phybist3, phybist4; 14126 14127 if (NREV_GE(pi->pubpi.phy_rev, 16)) 14128 return true; 14129 14130 phybist0 = read_phy_reg(pi, 0x0e); 14131 phybist1 = read_phy_reg(pi, 0x0f); 14132 phybist2 = read_phy_reg(pi, 0xea); 14133 phybist3 = read_phy_reg(pi, 0xeb); 14134 phybist4 = read_phy_reg(pi, 0x156); 14135 14136 if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && 14137 (phybist3 == 0) && (phybist4 == 0)) 14138 return true; 14139 14140 return false; 14141 } 14142 14143 static void wlc_phy_bphy_init_nphy(struct brcms_phy *pi) 14144 { 14145 u16 addr, val; 14146 14147 val = 0x1e1f; 14148 for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); 14149 addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { 14150 write_phy_reg(pi, addr, val); 14151 if (addr == (NPHY_TO_BPHY_OFF + 0x97)) 14152 val = 0x3e3f; 14153 else 14154 val -= 0x0202; 14155 } 14156 14157 write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); 14158 } 14159 14160 void 14161 wlc_phy_table_write_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14162 u32 width, const void *data) 14163 { 14164 struct phytbl_info tbl; 14165 14166 tbl.tbl_id = id; 14167 tbl.tbl_len = len; 14168 tbl.tbl_offset = offset; 14169 tbl.tbl_width = width; 14170 tbl.tbl_ptr = data; 14171 wlc_phy_write_table_nphy(pi, &tbl); 14172 } 14173 14174 void 14175 wlc_phy_table_read_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14176 u32 width, void *data) 14177 { 14178 struct phytbl_info tbl; 14179 14180 tbl.tbl_id = id; 14181 tbl.tbl_len = len; 14182 tbl.tbl_offset = offset; 14183 tbl.tbl_width = width; 14184 tbl.tbl_ptr = data; 14185 wlc_phy_read_table_nphy(pi, &tbl); 14186 } 14187 14188 static void 14189 wlc_phy_static_table_download_nphy(struct brcms_phy *pi) 14190 { 14191 uint idx; 14192 14193 if (NREV_GE(pi->pubpi.phy_rev, 16)) { 14194 for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) 14195 wlc_phy_write_table_nphy(pi, 14196 &mimophytbl_info_rev16[idx]); 14197 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14198 for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) 14199 wlc_phy_write_table_nphy(pi, 14200 &mimophytbl_info_rev7[idx]); 14201 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14202 for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) 14203 wlc_phy_write_table_nphy(pi, 14204 &mimophytbl_info_rev3[idx]); 14205 } else { 14206 for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) 14207 wlc_phy_write_table_nphy(pi, 14208 &mimophytbl_info_rev0[idx]); 14209 } 14210 } 14211 14212 static void wlc_phy_tbl_init_nphy(struct brcms_phy *pi) 14213 { 14214 uint idx = 0; 14215 u8 antswctrllut; 14216 14217 if (pi->phy_init_por) 14218 wlc_phy_static_table_download_nphy(pi); 14219 14220 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14221 14222 antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? 14223 pi->srom_fem2g.antswctrllut : pi->srom_fem5g. 14224 antswctrllut; 14225 14226 switch (antswctrllut) { 14227 case 0: 14228 14229 break; 14230 14231 case 1: 14232 14233 if (pi->aa2g == 7) 14234 wlc_phy_table_write_nphy( 14235 pi, 14236 NPHY_TBL_ID_ANTSWCTRLLUT, 14237 2, 0x21, 8, 14238 &ant_sw_ctrl_tbl_rev8_2o3[0]); 14239 else 14240 wlc_phy_table_write_nphy( 14241 pi, 14242 NPHY_TBL_ID_ANTSWCTRLLUT, 14243 2, 0x21, 8, 14244 &ant_sw_ctrl_tbl_rev8 14245 [0]); 14246 14247 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14248 2, 0x25, 8, 14249 &ant_sw_ctrl_tbl_rev8[2]); 14250 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14251 2, 0x29, 8, 14252 &ant_sw_ctrl_tbl_rev8[4]); 14253 break; 14254 14255 case 2: 14256 14257 wlc_phy_table_write_nphy( 14258 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14259 2, 0x1, 8, 14260 &ant_sw_ctrl_tbl_rev8_2057v7_core0[0]); 14261 wlc_phy_table_write_nphy( 14262 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14263 2, 0x5, 8, 14264 &ant_sw_ctrl_tbl_rev8_2057v7_core0[2]); 14265 wlc_phy_table_write_nphy( 14266 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14267 2, 0x9, 8, 14268 &ant_sw_ctrl_tbl_rev8_2057v7_core0[4]); 14269 14270 wlc_phy_table_write_nphy( 14271 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14272 2, 0x21, 8, 14273 &ant_sw_ctrl_tbl_rev8_2057v7_core1[0]); 14274 wlc_phy_table_write_nphy( 14275 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14276 2, 0x25, 8, 14277 &ant_sw_ctrl_tbl_rev8_2057v7_core1[2]); 14278 wlc_phy_table_write_nphy( 14279 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14280 2, 0x29, 8, 14281 &ant_sw_ctrl_tbl_rev8_2057v7_core1[4]); 14282 break; 14283 14284 default: 14285 break; 14286 } 14287 14288 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14289 for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { 14290 14291 if (idx == ANT_SWCTRL_TBL_REV3_IDX) { 14292 antswctrllut = 14293 CHSPEC_IS2G(pi->radio_chanspec) ? 14294 pi->srom_fem2g.antswctrllut : 14295 pi->srom_fem5g.antswctrllut; 14296 switch (antswctrllut) { 14297 case 0: 14298 wlc_phy_write_table_nphy( 14299 pi, 14300 &mimophytbl_info_rev3_volatile 14301 [idx]); 14302 break; 14303 case 1: 14304 wlc_phy_write_table_nphy( 14305 pi, 14306 &mimophytbl_info_rev3_volatile1 14307 [idx]); 14308 break; 14309 case 2: 14310 wlc_phy_write_table_nphy( 14311 pi, 14312 &mimophytbl_info_rev3_volatile2 14313 [idx]); 14314 break; 14315 case 3: 14316 wlc_phy_write_table_nphy( 14317 pi, 14318 &mimophytbl_info_rev3_volatile3 14319 [idx]); 14320 break; 14321 default: 14322 break; 14323 } 14324 } else { 14325 wlc_phy_write_table_nphy( 14326 pi, 14327 &mimophytbl_info_rev3_volatile[idx]); 14328 } 14329 } 14330 } else { 14331 for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) 14332 wlc_phy_write_table_nphy(pi, 14333 &mimophytbl_info_rev0_volatile 14334 [idx]); 14335 } 14336 } 14337 14338 static void 14339 wlc_phy_write_txmacreg_nphy(struct brcms_phy *pi, u16 holdoff, u16 delay) 14340 { 14341 write_phy_reg(pi, 0x77, holdoff); 14342 write_phy_reg(pi, 0xb4, delay); 14343 } 14344 14345 void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs) 14346 { 14347 u16 holdoff, delay; 14348 14349 if (rifs) { 14350 14351 holdoff = 0x10; 14352 delay = 0x258; 14353 } else { 14354 14355 holdoff = 0x15; 14356 delay = 0x320; 14357 } 14358 14359 wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); 14360 14361 if (pi->sh && (pi->sh->_rifs_phy != rifs)) 14362 pi->sh->_rifs_phy = rifs; 14363 } 14364 14365 static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi) 14366 { 14367 14368 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14369 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14370 pi->phy_5g_pwrgain = true; 14371 return; 14372 } 14373 14374 pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; 14375 pi->phy_5g_pwrgain = false; 14376 14377 if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && 14378 NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) 14379 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14380 else if ((pi->sh->sromrev >= 4) 14381 && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) 14382 pi->phy_5g_pwrgain = true; 14383 } 14384 14385 static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi) 14386 { 14387 u16 bw40po, cddpo, stbcpo, bwduppo; 14388 uint band_num; 14389 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14390 14391 if (pi->sh->sromrev >= 9) 14392 return; 14393 14394 bw40po = sprom->bw40po; 14395 pi->bw402gpo = bw40po & 0xf; 14396 pi->bw405gpo = (bw40po & 0xf0) >> 4; 14397 pi->bw405glpo = (bw40po & 0xf00) >> 8; 14398 pi->bw405ghpo = (bw40po & 0xf000) >> 12; 14399 14400 cddpo = sprom->cddpo; 14401 pi->cdd2gpo = cddpo & 0xf; 14402 pi->cdd5gpo = (cddpo & 0xf0) >> 4; 14403 pi->cdd5glpo = (cddpo & 0xf00) >> 8; 14404 pi->cdd5ghpo = (cddpo & 0xf000) >> 12; 14405 14406 stbcpo = sprom->stbcpo; 14407 pi->stbc2gpo = stbcpo & 0xf; 14408 pi->stbc5gpo = (stbcpo & 0xf0) >> 4; 14409 pi->stbc5glpo = (stbcpo & 0xf00) >> 8; 14410 pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; 14411 14412 bwduppo = sprom->bwduppo; 14413 pi->bwdup2gpo = bwduppo & 0xf; 14414 pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; 14415 pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; 14416 pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; 14417 14418 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 14419 band_num++) { 14420 switch (band_num) { 14421 case 0: 14422 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = 14423 sprom->core_pwr_info[0].maxpwr_2g; 14424 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = 14425 sprom->core_pwr_info[1].maxpwr_2g; 14426 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = 14427 sprom->core_pwr_info[0].pa_2g[0]; 14428 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = 14429 sprom->core_pwr_info[1].pa_2g[0]; 14430 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = 14431 sprom->core_pwr_info[0].pa_2g[1]; 14432 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = 14433 sprom->core_pwr_info[1].pa_2g[1]; 14434 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = 14435 sprom->core_pwr_info[0].pa_2g[2]; 14436 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = 14437 sprom->core_pwr_info[1].pa_2g[2]; 14438 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = 14439 sprom->core_pwr_info[0].itssi_2g; 14440 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = 14441 sprom->core_pwr_info[1].itssi_2g; 14442 14443 pi->cck2gpo = sprom->cck2gpo; 14444 14445 pi->ofdm2gpo = sprom->ofdm2gpo; 14446 14447 pi->mcs2gpo[0] = sprom->mcs2gpo[0]; 14448 pi->mcs2gpo[1] = sprom->mcs2gpo[1]; 14449 pi->mcs2gpo[2] = sprom->mcs2gpo[2]; 14450 pi->mcs2gpo[3] = sprom->mcs2gpo[3]; 14451 pi->mcs2gpo[4] = sprom->mcs2gpo[4]; 14452 pi->mcs2gpo[5] = sprom->mcs2gpo[5]; 14453 pi->mcs2gpo[6] = sprom->mcs2gpo[6]; 14454 pi->mcs2gpo[7] = sprom->mcs2gpo[7]; 14455 break; 14456 case 1: 14457 14458 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = 14459 sprom->core_pwr_info[0].maxpwr_5g; 14460 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = 14461 sprom->core_pwr_info[1].maxpwr_5g; 14462 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = 14463 sprom->core_pwr_info[0].pa_5g[0]; 14464 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = 14465 sprom->core_pwr_info[1].pa_5g[0]; 14466 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = 14467 sprom->core_pwr_info[0].pa_5g[1]; 14468 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = 14469 sprom->core_pwr_info[1].pa_5g[1]; 14470 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = 14471 sprom->core_pwr_info[0].pa_5g[2]; 14472 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = 14473 sprom->core_pwr_info[1].pa_5g[2]; 14474 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = 14475 sprom->core_pwr_info[0].itssi_5g; 14476 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = 14477 sprom->core_pwr_info[1].itssi_5g; 14478 14479 pi->ofdm5gpo = sprom->ofdm5gpo; 14480 14481 pi->mcs5gpo[0] = sprom->mcs5gpo[0]; 14482 pi->mcs5gpo[1] = sprom->mcs5gpo[1]; 14483 pi->mcs5gpo[2] = sprom->mcs5gpo[2]; 14484 pi->mcs5gpo[3] = sprom->mcs5gpo[3]; 14485 pi->mcs5gpo[4] = sprom->mcs5gpo[4]; 14486 pi->mcs5gpo[5] = sprom->mcs5gpo[5]; 14487 pi->mcs5gpo[6] = sprom->mcs5gpo[6]; 14488 pi->mcs5gpo[7] = sprom->mcs5gpo[7]; 14489 break; 14490 case 2: 14491 14492 pi->nphy_pwrctrl_info[0].max_pwr_5gl = 14493 sprom->core_pwr_info[0].maxpwr_5gl; 14494 pi->nphy_pwrctrl_info[1].max_pwr_5gl = 14495 sprom->core_pwr_info[1].maxpwr_5gl; 14496 pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = 14497 sprom->core_pwr_info[0].pa_5gl[0]; 14498 pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = 14499 sprom->core_pwr_info[1].pa_5gl[0]; 14500 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = 14501 sprom->core_pwr_info[0].pa_5gl[1]; 14502 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = 14503 sprom->core_pwr_info[1].pa_5gl[1]; 14504 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = 14505 sprom->core_pwr_info[0].pa_5gl[2]; 14506 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = 14507 sprom->core_pwr_info[1].pa_5gl[2]; 14508 pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; 14509 pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; 14510 14511 pi->ofdm5glpo = sprom->ofdm5glpo; 14512 14513 pi->mcs5glpo[0] = sprom->mcs5glpo[0]; 14514 pi->mcs5glpo[1] = sprom->mcs5glpo[1]; 14515 pi->mcs5glpo[2] = sprom->mcs5glpo[2]; 14516 pi->mcs5glpo[3] = sprom->mcs5glpo[3]; 14517 pi->mcs5glpo[4] = sprom->mcs5glpo[4]; 14518 pi->mcs5glpo[5] = sprom->mcs5glpo[5]; 14519 pi->mcs5glpo[6] = sprom->mcs5glpo[6]; 14520 pi->mcs5glpo[7] = sprom->mcs5glpo[7]; 14521 break; 14522 case 3: 14523 14524 pi->nphy_pwrctrl_info[0].max_pwr_5gh = 14525 sprom->core_pwr_info[0].maxpwr_5gh; 14526 pi->nphy_pwrctrl_info[1].max_pwr_5gh = 14527 sprom->core_pwr_info[1].maxpwr_5gh; 14528 pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = 14529 sprom->core_pwr_info[0].pa_5gh[0]; 14530 pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = 14531 sprom->core_pwr_info[1].pa_5gh[0]; 14532 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = 14533 sprom->core_pwr_info[0].pa_5gh[1]; 14534 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = 14535 sprom->core_pwr_info[1].pa_5gh[1]; 14536 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = 14537 sprom->core_pwr_info[0].pa_5gh[2]; 14538 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = 14539 sprom->core_pwr_info[1].pa_5gh[2]; 14540 pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; 14541 pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; 14542 14543 pi->ofdm5ghpo = sprom->ofdm5ghpo; 14544 14545 pi->mcs5ghpo[0] = sprom->mcs5ghpo[0]; 14546 pi->mcs5ghpo[1] = sprom->mcs5ghpo[1]; 14547 pi->mcs5ghpo[2] = sprom->mcs5ghpo[2]; 14548 pi->mcs5ghpo[3] = sprom->mcs5ghpo[3]; 14549 pi->mcs5ghpo[4] = sprom->mcs5ghpo[4]; 14550 pi->mcs5ghpo[5] = sprom->mcs5ghpo[5]; 14551 pi->mcs5ghpo[6] = sprom->mcs5ghpo[6]; 14552 pi->mcs5ghpo[7] = sprom->mcs5ghpo[7]; 14553 break; 14554 } 14555 } 14556 14557 wlc_phy_txpwr_apply_nphy(pi); 14558 } 14559 14560 static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) 14561 { 14562 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14563 14564 pi->antswitch = sprom->antswitch; 14565 pi->aa2g = sprom->ant_available_bg; 14566 pi->aa5g = sprom->ant_available_a; 14567 14568 pi->srom_fem2g.tssipos = sprom->fem.ghz2.tssipos; 14569 pi->srom_fem2g.extpagain = sprom->fem.ghz2.extpa_gain; 14570 pi->srom_fem2g.pdetrange = sprom->fem.ghz2.pdet_range; 14571 pi->srom_fem2g.triso = sprom->fem.ghz2.tr_iso; 14572 pi->srom_fem2g.antswctrllut = sprom->fem.ghz2.antswlut; 14573 14574 pi->srom_fem5g.tssipos = sprom->fem.ghz5.tssipos; 14575 pi->srom_fem5g.extpagain = sprom->fem.ghz5.extpa_gain; 14576 pi->srom_fem5g.pdetrange = sprom->fem.ghz5.pdet_range; 14577 pi->srom_fem5g.triso = sprom->fem.ghz5.tr_iso; 14578 if (sprom->fem.ghz5.antswlut) 14579 pi->srom_fem5g.antswctrllut = sprom->fem.ghz5.antswlut; 14580 else 14581 pi->srom_fem5g.antswctrllut = sprom->fem.ghz2.antswlut; 14582 14583 wlc_phy_txpower_ipa_upd(pi); 14584 14585 pi->phy_txcore_disable_temp = sprom->tempthresh; 14586 if (pi->phy_txcore_disable_temp == 0) 14587 pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; 14588 14589 pi->phy_tempsense_offset = sprom->tempoffset; 14590 if (pi->phy_tempsense_offset != 0) { 14591 if (pi->phy_tempsense_offset > 14592 (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) 14593 pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; 14594 else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + 14595 NPHY_SROM_MINTEMPOFFSET)) 14596 pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; 14597 else 14598 pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; 14599 } 14600 14601 pi->phy_txcore_enable_temp = 14602 pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; 14603 14604 pi->phycal_tempdelta = sprom->phycal_tempdelta; 14605 if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) 14606 pi->phycal_tempdelta = 0; 14607 14608 wlc_phy_txpwr_srom_read_ppr_nphy(pi); 14609 14610 return true; 14611 } 14612 14613 bool wlc_phy_attach_nphy(struct brcms_phy *pi) 14614 { 14615 uint i; 14616 14617 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) 14618 pi->phyhang_avoid = true; 14619 14620 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14621 pi->nphy_gband_spurwar_en = true; 14622 if (pi->sh->boardflags2 & BFL2_SPUR_WAR) 14623 pi->nphy_aband_spurwar_en = true; 14624 } 14625 if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14626 if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) 14627 pi->nphy_gband_spurwar2_en = true; 14628 } 14629 14630 pi->n_preamble_override = AUTO; 14631 if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) 14632 pi->n_preamble_override = BRCMS_N_PREAMBLE_MIXEDMODE; 14633 14634 pi->nphy_txrx_chain = AUTO; 14635 pi->phy_scraminit = AUTO; 14636 14637 pi->nphy_rxcalparams = 0x010100B5; 14638 14639 pi->nphy_perical = PHY_PERICAL_MPHASE; 14640 pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; 14641 pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; 14642 14643 pi->nphy_gain_boost = true; 14644 pi->nphy_elna_gain_config = false; 14645 pi->radio_is_on = false; 14646 14647 for (i = 0; i < pi->pubpi.phy_corenum; i++) 14648 pi->nphy_txpwrindex[i].index = AUTO; 14649 14650 wlc_phy_txpwrctrl_config_nphy(pi); 14651 if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) 14652 pi->hwpwrctrl_capable = true; 14653 14654 pi->pi_fptr.init = wlc_phy_init_nphy; 14655 pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; 14656 pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; 14657 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; 14658 14659 if (!wlc_phy_txpwr_srom_read_nphy(pi)) 14660 return false; 14661 14662 return true; 14663 } 14664 14665 static s32 get_rf_pwr_offset(struct brcms_phy *pi, s16 pga_gn, s16 pad_gn) 14666 { 14667 s32 rfpwr_offset = 0; 14668 14669 if (CHSPEC_IS2G(pi->radio_chanspec)) { 14670 if ((pi->pubpi.radiorev == 3) || 14671 (pi->pubpi.radiorev == 4) || 14672 (pi->pubpi.radiorev == 6)) 14673 rfpwr_offset = (s16) 14674 nphy_papd_padgain_dlt_2g_2057rev3n4 14675 [pad_gn]; 14676 else if (pi->pubpi.radiorev == 5) 14677 rfpwr_offset = (s16) 14678 nphy_papd_padgain_dlt_2g_2057rev5 14679 [pad_gn]; 14680 else if ((pi->pubpi.radiorev == 7) 14681 || (pi->pubpi.radiorev == 14682 8)) 14683 rfpwr_offset = (s16) 14684 nphy_papd_padgain_dlt_2g_2057rev7 14685 [pad_gn]; 14686 } else { 14687 if ((pi->pubpi.radiorev == 3) || 14688 (pi->pubpi.radiorev == 4) || 14689 (pi->pubpi.radiorev == 6)) 14690 rfpwr_offset = (s16) 14691 nphy_papd_pgagain_dlt_5g_2057 14692 [pga_gn]; 14693 else if ((pi->pubpi.radiorev == 7) 14694 || (pi->pubpi.radiorev == 14695 8)) 14696 rfpwr_offset = (s16) 14697 nphy_papd_pgagain_dlt_5g_2057rev7 14698 [pga_gn]; 14699 } 14700 return rfpwr_offset; 14701 } 14702 14703 static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble) 14704 { 14705 bool gf_preamble = false; 14706 u16 val; 14707 14708 if (preamble == BRCMS_N_PREAMBLE_GF) 14709 gf_preamble = true; 14710 14711 val = read_phy_reg(pi, 0xed); 14712 14713 val |= RX_GF_MM_AUTO; 14714 val &= ~RX_GF_OR_MM; 14715 if (gf_preamble) 14716 val |= RX_GF_OR_MM; 14717 14718 write_phy_reg(pi, 0xed, val); 14719 } 14720 14721 static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 14722 { 14723 int j, type; 14724 u16 addr_offset[] = { 0x186, 0x195, 0x2c5}; 14725 14726 for (type = 0; type < 3; type++) { 14727 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14728 write_phy_reg(pi, addr_offset[type] + j, 14729 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 14730 } 14731 14732 if (pi->bw == WL_CHANSPEC_BW_40) { 14733 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14734 write_phy_reg(pi, 0x186 + j, 14735 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14736 } else { 14737 if (CHSPEC_IS5G(pi->radio_chanspec)) { 14738 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14739 write_phy_reg(pi, 0x186 + j, 14740 NPHY_IPA_REV4_txdigi_filtcoeffs[5][j]); 14741 } 14742 14743 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 14744 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14745 write_phy_reg(pi, 0x2c5 + j, 14746 NPHY_IPA_REV4_txdigi_filtcoeffs[6][j]); 14747 } 14748 } 14749 } 14750 14751 static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi) 14752 { 14753 int j; 14754 14755 if (pi->bw == WL_CHANSPEC_BW_40) { 14756 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14757 write_phy_reg(pi, 0x195 + j, 14758 NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); 14759 } else { 14760 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14761 write_phy_reg(pi, 0x186 + j, 14762 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14763 } 14764 } 14765 14766 static void 14767 wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events, 14768 const u8 *dlys, u8 len) 14769 { 14770 u32 t1_offset, t2_offset; 14771 u8 ctr; 14772 u8 end_event = 14773 NREV_GE(pi->pubpi.phy_rev, 14774 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; 14775 u8 end_dly = 1; 14776 14777 if (pi->phyhang_avoid) 14778 wlc_phy_stay_in_carriersearch_nphy(pi, true); 14779 14780 t1_offset = cmd << 4; 14781 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, 14782 events); 14783 t2_offset = t1_offset + 0x080; 14784 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, 14785 dlys); 14786 14787 for (ctr = len; ctr < 16; ctr++) { 14788 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14789 t1_offset + ctr, 8, &end_event); 14790 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14791 t2_offset + ctr, 8, &end_dly); 14792 } 14793 14794 if (pi->phyhang_avoid) 14795 wlc_phy_stay_in_carriersearch_nphy(pi, false); 14796 } 14797 14798 static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset) 14799 { 14800 u16 lpf_bw_ctl_val = 0; 14801 u16 rx2tx_lpf_rc_lut_offset = 0; 14802 14803 if (offset == 0) { 14804 if (CHSPEC_IS40(pi->radio_chanspec)) 14805 rx2tx_lpf_rc_lut_offset = 0x159; 14806 else 14807 rx2tx_lpf_rc_lut_offset = 0x154; 14808 } else { 14809 rx2tx_lpf_rc_lut_offset = offset; 14810 } 14811 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14812 (u32) rx2tx_lpf_rc_lut_offset, 16, 14813 &lpf_bw_ctl_val); 14814 14815 lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; 14816 14817 return lpf_bw_ctl_val; 14818 } 14819 14820 static void 14821 wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, 14822 u8 core_mask, u8 off, u8 override_id) 14823 { 14824 u8 core_num; 14825 u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; 14826 u8 val_shift = 0; 14827 14828 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14829 en_mask = field; 14830 for (core_num = 0; core_num < 2; core_num++) { 14831 if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { 14832 14833 switch (field) { 14834 case (0x1 << 2): 14835 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14836 val_addr = (core_num == 0) ? 0x7a : 14837 0x7d; 14838 val_mask = (0x1 << 1); 14839 val_shift = 1; 14840 break; 14841 case (0x1 << 3): 14842 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14843 val_addr = (core_num == 0) ? 0x7a : 14844 0x7d; 14845 val_mask = (0x1 << 2); 14846 val_shift = 2; 14847 break; 14848 case (0x1 << 4): 14849 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14850 val_addr = (core_num == 0) ? 0x7a : 14851 0x7d; 14852 val_mask = (0x1 << 4); 14853 val_shift = 4; 14854 break; 14855 case (0x1 << 5): 14856 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14857 val_addr = (core_num == 0) ? 0x7a : 14858 0x7d; 14859 val_mask = (0x1 << 5); 14860 val_shift = 5; 14861 break; 14862 case (0x1 << 6): 14863 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14864 val_addr = (core_num == 0) ? 0x7a : 14865 0x7d; 14866 val_mask = (0x1 << 6); 14867 val_shift = 6; 14868 break; 14869 case (0x1 << 7): 14870 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14871 val_addr = (core_num == 0) ? 0x7a : 14872 0x7d; 14873 val_mask = (0x1 << 7); 14874 val_shift = 7; 14875 break; 14876 case (0x1 << 10): 14877 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14878 val_addr = (core_num == 0) ? 0xf8 : 14879 0xfa; 14880 val_mask = (0x7 << 4); 14881 val_shift = 4; 14882 break; 14883 case (0x1 << 11): 14884 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14885 val_addr = (core_num == 0) ? 0x7b : 14886 0x7e; 14887 val_mask = (0xffff << 0); 14888 val_shift = 0; 14889 break; 14890 case (0x1 << 12): 14891 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14892 val_addr = (core_num == 0) ? 0x7c : 14893 0x7f; 14894 val_mask = (0xffff << 0); 14895 val_shift = 0; 14896 break; 14897 case (0x3 << 13): 14898 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14899 val_addr = (core_num == 0) ? 0x348 : 14900 0x349; 14901 val_mask = (0xff << 0); 14902 val_shift = 0; 14903 break; 14904 case (0x1 << 13): 14905 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14906 val_addr = (core_num == 0) ? 0x348 : 14907 0x349; 14908 val_mask = (0xf << 0); 14909 val_shift = 0; 14910 break; 14911 default: 14912 addr = 0xffff; 14913 break; 14914 } 14915 } else if (override_id == 14916 NPHY_REV7_RFCTRLOVERRIDE_ID1) { 14917 14918 switch (field) { 14919 case (0x1 << 1): 14920 en_addr = (core_num == 0) ? 0x342 : 14921 0x343; 14922 val_addr = (core_num == 0) ? 0x340 : 14923 0x341; 14924 val_mask = (0x1 << 1); 14925 val_shift = 1; 14926 break; 14927 case (0x1 << 3): 14928 en_addr = (core_num == 0) ? 0x342 : 14929 0x343; 14930 val_addr = (core_num == 0) ? 0x340 : 14931 0x341; 14932 val_mask = (0x1 << 3); 14933 val_shift = 3; 14934 break; 14935 case (0x1 << 5): 14936 en_addr = (core_num == 0) ? 0x342 : 14937 0x343; 14938 val_addr = (core_num == 0) ? 0x340 : 14939 0x341; 14940 val_mask = (0x1 << 5); 14941 val_shift = 5; 14942 break; 14943 case (0x1 << 4): 14944 en_addr = (core_num == 0) ? 0x342 : 14945 0x343; 14946 val_addr = (core_num == 0) ? 0x340 : 14947 0x341; 14948 val_mask = (0x1 << 4); 14949 val_shift = 4; 14950 break; 14951 case (0x1 << 2): 14952 14953 en_addr = (core_num == 0) ? 0x342 : 14954 0x343; 14955 val_addr = (core_num == 0) ? 0x340 : 14956 0x341; 14957 val_mask = (0x1 << 2); 14958 val_shift = 2; 14959 break; 14960 case (0x1 << 7): 14961 14962 en_addr = (core_num == 0) ? 0x342 : 14963 0x343; 14964 val_addr = (core_num == 0) ? 0x340 : 14965 0x341; 14966 val_mask = (0x7 << 8); 14967 val_shift = 8; 14968 break; 14969 case (0x1 << 11): 14970 en_addr = (core_num == 0) ? 0x342 : 14971 0x343; 14972 val_addr = (core_num == 0) ? 0x340 : 14973 0x341; 14974 val_mask = (0x1 << 14); 14975 val_shift = 14; 14976 break; 14977 case (0x1 << 10): 14978 en_addr = (core_num == 0) ? 0x342 : 14979 0x343; 14980 val_addr = (core_num == 0) ? 0x340 : 14981 0x341; 14982 val_mask = (0x1 << 13); 14983 val_shift = 13; 14984 break; 14985 case (0x1 << 9): 14986 en_addr = (core_num == 0) ? 0x342 : 14987 0x343; 14988 val_addr = (core_num == 0) ? 0x340 : 14989 0x341; 14990 val_mask = (0x1 << 12); 14991 val_shift = 12; 14992 break; 14993 case (0x1 << 8): 14994 en_addr = (core_num == 0) ? 0x342 : 14995 0x343; 14996 val_addr = (core_num == 0) ? 0x340 : 14997 0x341; 14998 val_mask = (0x1 << 11); 14999 val_shift = 11; 15000 break; 15001 case (0x1 << 6): 15002 en_addr = (core_num == 0) ? 0x342 : 15003 0x343; 15004 val_addr = (core_num == 0) ? 0x340 : 15005 0x341; 15006 val_mask = (0x1 << 6); 15007 val_shift = 6; 15008 break; 15009 case (0x1 << 0): 15010 en_addr = (core_num == 0) ? 0x342 : 15011 0x343; 15012 val_addr = (core_num == 0) ? 0x340 : 15013 0x341; 15014 val_mask = (0x1 << 0); 15015 val_shift = 0; 15016 break; 15017 default: 15018 addr = 0xffff; 15019 break; 15020 } 15021 } else if (override_id == 15022 NPHY_REV7_RFCTRLOVERRIDE_ID2) { 15023 15024 switch (field) { 15025 case (0x1 << 3): 15026 en_addr = (core_num == 0) ? 0x346 : 15027 0x347; 15028 val_addr = (core_num == 0) ? 0x344 : 15029 0x345; 15030 val_mask = (0x1 << 3); 15031 val_shift = 3; 15032 break; 15033 case (0x1 << 1): 15034 en_addr = (core_num == 0) ? 0x346 : 15035 0x347; 15036 val_addr = (core_num == 0) ? 0x344 : 15037 0x345; 15038 val_mask = (0x1 << 1); 15039 val_shift = 1; 15040 break; 15041 case (0x1 << 0): 15042 en_addr = (core_num == 0) ? 0x346 : 15043 0x347; 15044 val_addr = (core_num == 0) ? 0x344 : 15045 0x345; 15046 val_mask = (0x1 << 0); 15047 val_shift = 0; 15048 break; 15049 case (0x1 << 2): 15050 en_addr = (core_num == 0) ? 0x346 : 15051 0x347; 15052 val_addr = (core_num == 0) ? 0x344 : 15053 0x345; 15054 val_mask = (0x1 << 2); 15055 val_shift = 2; 15056 break; 15057 case (0x1 << 4): 15058 en_addr = (core_num == 0) ? 0x346 : 15059 0x347; 15060 val_addr = (core_num == 0) ? 0x344 : 15061 0x345; 15062 val_mask = (0x1 << 4); 15063 val_shift = 4; 15064 break; 15065 default: 15066 addr = 0xffff; 15067 break; 15068 } 15069 } 15070 15071 if (off) { 15072 and_phy_reg(pi, en_addr, ~en_mask); 15073 and_phy_reg(pi, val_addr, ~val_mask); 15074 } else { 15075 15076 if ((core_mask == 0) 15077 || (core_mask & (1 << core_num))) { 15078 or_phy_reg(pi, en_addr, en_mask); 15079 15080 if (addr != 0xffff) 15081 mod_phy_reg(pi, val_addr, 15082 val_mask, 15083 (value << 15084 val_shift)); 15085 } 15086 } 15087 } 15088 } 15089 } 15090 15091 static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi) 15092 { 15093 uint core; 15094 int ctr; 15095 s16 gain_delta[2]; 15096 u8 curr_channel; 15097 u16 minmax_gain[2]; 15098 u16 regval[4]; 15099 15100 if (pi->phyhang_avoid) 15101 wlc_phy_stay_in_carriersearch_nphy(pi, true); 15102 15103 if (pi->nphy_gain_boost) { 15104 if ((CHSPEC_IS2G(pi->radio_chanspec))) { 15105 15106 gain_delta[0] = 6; 15107 gain_delta[1] = 6; 15108 } else { 15109 15110 curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 15111 gain_delta[0] = 15112 (s16) 15113 PHY_HW_ROUND(((nphy_lnagain_est0[0] * 15114 curr_channel) + 15115 nphy_lnagain_est0[1]), 13); 15116 gain_delta[1] = 15117 (s16) 15118 PHY_HW_ROUND(((nphy_lnagain_est1[0] * 15119 curr_channel) + 15120 nphy_lnagain_est1[1]), 13); 15121 } 15122 } else { 15123 15124 gain_delta[0] = 0; 15125 gain_delta[1] = 0; 15126 } 15127 15128 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 15129 if (pi->nphy_elna_gain_config) { 15130 15131 regval[0] = nphy_def_lnagains[2] + gain_delta[core]; 15132 regval[1] = nphy_def_lnagains[3] + gain_delta[core]; 15133 regval[2] = nphy_def_lnagains[3] + gain_delta[core]; 15134 regval[3] = nphy_def_lnagains[3] + gain_delta[core]; 15135 } else { 15136 for (ctr = 0; ctr < 4; ctr++) 15137 regval[ctr] = 15138 nphy_def_lnagains[ctr] + 15139 gain_delta[core]; 15140 } 15141 wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); 15142 15143 minmax_gain[core] = 15144 (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); 15145 } 15146 15147 mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); 15148 mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); 15149 15150 if (pi->phyhang_avoid) 15151 wlc_phy_stay_in_carriersearch_nphy(pi, false); 15152 } 15153 15154 static void 15155 wlc_phy_war_force_trsw_to_R_cliplo_nphy(struct brcms_phy *pi, u8 core) 15156 { 15157 if (core == PHY_CORE_0) { 15158 write_phy_reg(pi, 0x38, 0x4); 15159 if (CHSPEC_IS2G(pi->radio_chanspec)) 15160 write_phy_reg(pi, 0x37, 0x0060); 15161 else 15162 write_phy_reg(pi, 0x37, 0x1080); 15163 } else if (core == PHY_CORE_1) { 15164 write_phy_reg(pi, 0x2ae, 0x4); 15165 if (CHSPEC_IS2G(pi->radio_chanspec)) 15166 write_phy_reg(pi, 0x2ad, 0x0060); 15167 else 15168 write_phy_reg(pi, 0x2ad, 0x1080); 15169 } 15170 } 15171 15172 static void wlc_phy_war_txchain_upd_nphy(struct brcms_phy *pi, u8 txchain) 15173 { 15174 u8 txchain0, txchain1; 15175 15176 txchain0 = txchain & 0x1; 15177 txchain1 = (txchain & 0x2) >> 1; 15178 if (!txchain0) 15179 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 15180 15181 if (!txchain1) 15182 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 15183 } 15184 15185 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi) 15186 { 15187 s8 lna1_gain_db[] = { 8, 13, 17, 22 }; 15188 s8 lna2_gain_db[] = { -2, 7, 11, 15 }; 15189 s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; 15190 s8 tia_gainbits[] = { 15191 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15192 15193 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15194 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15195 15196 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15197 15198 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); 15199 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); 15200 15201 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, 15202 lna1_gain_db); 15203 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, 15204 lna1_gain_db); 15205 15206 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, 15207 lna2_gain_db); 15208 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, 15209 lna2_gain_db); 15210 15211 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15212 tia_gain_db); 15213 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15214 tia_gain_db); 15215 15216 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15217 tia_gainbits); 15218 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15219 tia_gainbits); 15220 15221 write_phy_reg(pi, 0x37, 0x74); 15222 write_phy_reg(pi, 0x2ad, 0x74); 15223 write_phy_reg(pi, 0x38, 0x18); 15224 write_phy_reg(pi, 0x2ae, 0x18); 15225 15226 write_phy_reg(pi, 0x2b, 0xe8); 15227 write_phy_reg(pi, 0x41, 0xe8); 15228 15229 if (CHSPEC_IS20(pi->radio_chanspec)) { 15230 15231 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); 15232 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); 15233 } else { 15234 15235 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); 15236 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); 15237 } 15238 } 15239 15240 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi) 15241 { 15242 u16 currband; 15243 static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; 15244 const s8 *lna1_gain_db = NULL; 15245 const s8 *lna1_gain_db_2 = NULL; 15246 const s8 *lna2_gain_db = NULL; 15247 static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; 15248 const s8 *tia_gain_db; 15249 static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; 15250 const s8 *tia_gainbits; 15251 static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; 15252 const u16 *rfseq_init_gain; 15253 u16 init_gaincode; 15254 u16 clip1hi_gaincode; 15255 u16 clip1md_gaincode = 0; 15256 u16 clip1md_gaincode_B; 15257 u16 clip1lo_gaincode; 15258 u16 clip1lo_gaincode_B; 15259 u8 crsminl_th = 0; 15260 u8 crsminu_th; 15261 u16 nbclip_th = 0; 15262 u8 w1clip_th; 15263 u16 freq; 15264 s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; 15265 u8 chg_nbclip_th = 0; 15266 15267 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15268 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15269 15270 currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15271 if (currband == 0) { 15272 15273 lna1_gain_db = lna1G_gain_db_rev7; 15274 15275 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15276 lna1_gain_db); 15277 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15278 lna1_gain_db); 15279 15280 mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); 15281 15282 if (CHSPEC_IS40(pi->radio_chanspec)) { 15283 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); 15284 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); 15285 } 15286 15287 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15288 15289 if (CHSPEC_IS20(pi->radio_chanspec)) { 15290 mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); 15291 mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); 15292 } 15293 } else { 15294 15295 init_gaincode = 0x9e; 15296 clip1hi_gaincode = 0x9e; 15297 clip1md_gaincode_B = 0x24; 15298 clip1lo_gaincode = 0x8a; 15299 clip1lo_gaincode_B = 8; 15300 rfseq_init_gain = rfseqA_init_gain_rev7; 15301 15302 tia_gain_db = tiaA_gain_db_rev7; 15303 tia_gainbits = tiaA_gainbits_rev7; 15304 15305 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 15306 if (CHSPEC_IS20(pi->radio_chanspec)) { 15307 15308 w1clip_th = 25; 15309 clip1md_gaincode = 0x82; 15310 15311 if ((freq <= 5080) || (freq == 5825)) { 15312 15313 static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; 15314 static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25}; 15315 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15316 15317 crsminu_th = 0x3e; 15318 lna1_gain_db = lna1A_gain_db_rev7; 15319 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15320 lna2_gain_db = lna2A_gain_db_rev7; 15321 } else if ((freq >= 5500) && (freq <= 5700)) { 15322 15323 static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; 15324 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15325 static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; 15326 15327 crsminu_th = 0x45; 15328 clip1md_gaincode_B = 0x14; 15329 nbclip_th = 0xff; 15330 chg_nbclip_th = 1; 15331 lna1_gain_db = lna1A_gain_db_rev7; 15332 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15333 lna2_gain_db = lna2A_gain_db_rev7; 15334 } else { 15335 15336 static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; 15337 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15338 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15339 15340 crsminu_th = 0x41; 15341 lna1_gain_db = lna1A_gain_db_rev7; 15342 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15343 lna2_gain_db = lna2A_gain_db_rev7; 15344 } 15345 15346 if (freq <= 4920) { 15347 nvar_baseline_offset0 = 5; 15348 nvar_baseline_offset1 = 5; 15349 } else if ((freq > 4920) && (freq <= 5320)) { 15350 nvar_baseline_offset0 = 3; 15351 nvar_baseline_offset1 = 5; 15352 } else if ((freq > 5320) && (freq <= 5700)) { 15353 nvar_baseline_offset0 = 3; 15354 nvar_baseline_offset1 = 2; 15355 } else { 15356 nvar_baseline_offset0 = 4; 15357 nvar_baseline_offset1 = 0; 15358 } 15359 } else { 15360 15361 crsminu_th = 0x3a; 15362 crsminl_th = 0x3a; 15363 w1clip_th = 20; 15364 15365 if ((freq >= 4920) && (freq <= 5320)) { 15366 nvar_baseline_offset0 = 4; 15367 nvar_baseline_offset1 = 5; 15368 } else if ((freq > 5320) && (freq <= 5550)) { 15369 nvar_baseline_offset0 = 4; 15370 nvar_baseline_offset1 = 2; 15371 } else { 15372 nvar_baseline_offset0 = 5; 15373 nvar_baseline_offset1 = 3; 15374 } 15375 } 15376 15377 write_phy_reg(pi, 0x20, init_gaincode); 15378 write_phy_reg(pi, 0x2a7, init_gaincode); 15379 15380 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15381 pi->pubpi.phy_corenum, 0x106, 16, 15382 rfseq_init_gain); 15383 15384 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15385 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15386 15387 write_phy_reg(pi, 0x36, clip1md_gaincode_B); 15388 write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); 15389 15390 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15391 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15392 write_phy_reg(pi, 0x38, clip1lo_gaincode_B); 15393 write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); 15394 15395 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15396 tia_gain_db); 15397 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15398 tia_gain_db); 15399 15400 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15401 tia_gainbits); 15402 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15403 tia_gainbits); 15404 15405 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15406 15407 if (chg_nbclip_th == 1) { 15408 write_phy_reg(pi, 0x2b, nbclip_th); 15409 write_phy_reg(pi, 0x41, nbclip_th); 15410 } 15411 15412 mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); 15413 mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); 15414 15415 mod_phy_reg(pi, 0x2e4, 15416 (0x3f << 0), (nvar_baseline_offset0 << 0)); 15417 15418 mod_phy_reg(pi, 0x2e4, 15419 (0x3f << 6), (nvar_baseline_offset1 << 6)); 15420 15421 if (CHSPEC_IS20(pi->radio_chanspec)) { 15422 15423 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15424 lna1_gain_db); 15425 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15426 lna1_gain_db_2); 15427 15428 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15429 8, lna2_gain_db); 15430 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15431 8, lna2_gain_db); 15432 15433 write_phy_reg(pi, 0x24, clip1md_gaincode); 15434 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15435 } else { 15436 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15437 } 15438 } 15439 } 15440 15441 static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi) 15442 { 15443 u16 w1th, hpf_code, currband; 15444 int ctr; 15445 u8 rfseq_updategainu_events[] = { 15446 NPHY_RFSEQ_CMD_RX_GAIN, 15447 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 15448 NPHY_RFSEQ_CMD_SET_HPF_BW 15449 }; 15450 static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; 15451 static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; 15452 static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; 15453 static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; 15454 static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; 15455 static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; 15456 static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; 15457 static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; 15458 static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; 15459 static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; 15460 const s8 *lna1_gain_db = NULL; 15461 static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; 15462 static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; 15463 static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; 15464 static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; 15465 static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; 15466 static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; 15467 static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; 15468 static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; 15469 const s8 *lna2_gain_db = NULL; 15470 static const s8 tiaG_gain_db[] = { 15471 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; 15472 static const s8 tiaA_gain_db[] = { 15473 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; 15474 static const s8 tiaA_gain_db_rev4[] = { 15475 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15476 static const s8 tiaA_gain_db_rev5[] = { 15477 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15478 static const s8 tiaA_gain_db_rev6[] = { 15479 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15480 const s8 *tia_gain_db; 15481 static const s8 tiaG_gainbits[] = { 15482 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15483 static const s8 tiaA_gainbits[] = { 15484 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; 15485 static const s8 tiaA_gainbits_rev4[] = { 15486 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15487 static const s8 tiaA_gainbits_rev5[] = { 15488 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15489 static const s8 tiaA_gainbits_rev6[] = { 15490 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15491 const s8 *tia_gainbits; 15492 static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; 15493 static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; 15494 static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; 15495 static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; 15496 static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; 15497 static const u16 rfseqG_init_gain_rev5_elna[] = { 15498 0x013f, 0x013f, 0x013f, 0x013f }; 15499 static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; 15500 static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; 15501 static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; 15502 static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; 15503 static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; 15504 static const u16 rfseqA_init_gain_rev4_elna[] = { 15505 0x314f, 0x314f, 0x314f, 0x314f }; 15506 static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; 15507 static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; 15508 const u16 *rfseq_init_gain; 15509 u16 initG_gaincode = 0x627e; 15510 u16 initG_gaincode_rev4 = 0x527e; 15511 u16 initG_gaincode_rev5 = 0x427e; 15512 u16 initG_gaincode_rev5_elna = 0x027e; 15513 u16 initG_gaincode_rev6 = 0x527e; 15514 u16 initG_gaincode_rev6_224B0 = 0x427e; 15515 u16 initG_gaincode_rev6_elna = 0x127e; 15516 u16 initA_gaincode = 0x52de; 15517 u16 initA_gaincode_rev4 = 0x629e; 15518 u16 initA_gaincode_rev4_elna = 0x329e; 15519 u16 initA_gaincode_rev5 = 0x729e; 15520 u16 initA_gaincode_rev6 = 0x729e; 15521 u16 init_gaincode; 15522 u16 clip1hiG_gaincode = 0x107e; 15523 u16 clip1hiG_gaincode_rev4 = 0x007e; 15524 u16 clip1hiG_gaincode_rev5 = 0x1076; 15525 u16 clip1hiG_gaincode_rev6 = 0x007e; 15526 u16 clip1hiA_gaincode = 0x00de; 15527 u16 clip1hiA_gaincode_rev4 = 0x029e; 15528 u16 clip1hiA_gaincode_rev5 = 0x029e; 15529 u16 clip1hiA_gaincode_rev6 = 0x029e; 15530 u16 clip1hi_gaincode; 15531 u16 clip1mdG_gaincode = 0x0066; 15532 u16 clip1mdA_gaincode = 0x00ca; 15533 u16 clip1mdA_gaincode_rev4 = 0x1084; 15534 u16 clip1mdA_gaincode_rev5 = 0x2084; 15535 u16 clip1mdA_gaincode_rev6 = 0x2084; 15536 u16 clip1md_gaincode = 0; 15537 u16 clip1loG_gaincode = 0x0074; 15538 static const u16 clip1loG_gaincode_rev5[] = { 15539 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c 15540 }; 15541 static const u16 clip1loG_gaincode_rev6[] = { 15542 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e 15543 }; 15544 u16 clip1loG_gaincode_rev6_224B0 = 0x1074; 15545 u16 clip1loA_gaincode = 0x00cc; 15546 u16 clip1loA_gaincode_rev4 = 0x0086; 15547 u16 clip1loA_gaincode_rev5 = 0x2086; 15548 u16 clip1loA_gaincode_rev6 = 0x2086; 15549 u16 clip1lo_gaincode; 15550 u8 crsminG_th = 0x18; 15551 u8 crsminG_th_rev5 = 0x18; 15552 u8 crsminG_th_rev6 = 0x18; 15553 u8 crsminA_th = 0x1e; 15554 u8 crsminA_th_rev4 = 0x24; 15555 u8 crsminA_th_rev5 = 0x24; 15556 u8 crsminA_th_rev6 = 0x24; 15557 u8 crsmin_th; 15558 u8 crsminlG_th = 0x18; 15559 u8 crsminlG_th_rev5 = 0x18; 15560 u8 crsminlG_th_rev6 = 0x18; 15561 u8 crsminlA_th = 0x1e; 15562 u8 crsminlA_th_rev4 = 0x24; 15563 u8 crsminlA_th_rev5 = 0x24; 15564 u8 crsminlA_th_rev6 = 0x24; 15565 u8 crsminl_th = 0; 15566 u8 crsminuG_th = 0x18; 15567 u8 crsminuG_th_rev5 = 0x18; 15568 u8 crsminuG_th_rev6 = 0x18; 15569 u8 crsminuA_th = 0x1e; 15570 u8 crsminuA_th_rev4 = 0x24; 15571 u8 crsminuA_th_rev5 = 0x24; 15572 u8 crsminuA_th_rev6 = 0x24; 15573 u8 crsminuA_th_rev6_224B0 = 0x2d; 15574 u8 crsminu_th; 15575 u16 nbclipG_th = 0x20d; 15576 u16 nbclipG_th_rev4 = 0x1a1; 15577 u16 nbclipG_th_rev5 = 0x1d0; 15578 u16 nbclipG_th_rev6 = 0x1d0; 15579 u16 nbclipA_th = 0x1a1; 15580 u16 nbclipA_th_rev4 = 0x107; 15581 u16 nbclipA_th_rev5 = 0x0a9; 15582 u16 nbclipA_th_rev6 = 0x0f0; 15583 u16 nbclip_th = 0; 15584 u8 w1clipG_th = 5; 15585 u8 w1clipG_th_rev5 = 9; 15586 u8 w1clipG_th_rev6 = 5; 15587 u8 w1clipA_th = 25, w1clip_th; 15588 u8 rssi_gain_default = 0x50; 15589 u8 rssiG_gain_rev6_224B0 = 0x50; 15590 u8 rssiA_gain_rev5 = 0x90; 15591 u8 rssiA_gain_rev6 = 0x90; 15592 u8 rssi_gain; 15593 u16 regval[21]; 15594 u8 triso; 15595 15596 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : 15597 pi->srom_fem2g.triso; 15598 15599 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 15600 if (pi->pubpi.radiorev == 5) { 15601 wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); 15602 } else if (pi->pubpi.radiorev == 7) { 15603 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15604 15605 mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); 15606 mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); 15607 15608 } else if ((pi->pubpi.radiorev == 3) 15609 || (pi->pubpi.radiorev == 8)) { 15610 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15611 15612 if (pi->pubpi.radiorev == 8) { 15613 mod_phy_reg(pi, 0x283, 15614 (0xff << 0), (0x44 << 0)); 15615 mod_phy_reg(pi, 0x280, 15616 (0xff << 0), (0x44 << 0)); 15617 } 15618 } else { 15619 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15620 } 15621 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 15622 15623 mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); 15624 15625 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15626 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15627 15628 currband = 15629 read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15630 if (currband == 0) { 15631 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15632 if (pi->pubpi.radiorev == 11) { 15633 lna1_gain_db = lna1G_gain_db_rev6_224B0; 15634 lna2_gain_db = lna2G_gain_db_rev6_224B0; 15635 rfseq_init_gain = 15636 rfseqG_init_gain_rev6_224B0; 15637 init_gaincode = 15638 initG_gaincode_rev6_224B0; 15639 clip1hi_gaincode = 15640 clip1hiG_gaincode_rev6; 15641 clip1lo_gaincode = 15642 clip1loG_gaincode_rev6_224B0; 15643 nbclip_th = nbclipG_th_rev6; 15644 w1clip_th = w1clipG_th_rev6; 15645 crsmin_th = crsminG_th_rev6; 15646 crsminl_th = crsminlG_th_rev6; 15647 crsminu_th = crsminuG_th_rev6; 15648 rssi_gain = rssiG_gain_rev6_224B0; 15649 } else { 15650 lna1_gain_db = lna1G_gain_db_rev6; 15651 lna2_gain_db = lna2G_gain_db_rev6; 15652 if (pi->sh->boardflags & BFL_EXTLNA) { 15653 15654 rfseq_init_gain = 15655 rfseqG_init_gain_rev6_elna; 15656 init_gaincode = 15657 initG_gaincode_rev6_elna; 15658 } else { 15659 rfseq_init_gain = 15660 rfseqG_init_gain_rev6; 15661 init_gaincode = 15662 initG_gaincode_rev6; 15663 } 15664 clip1hi_gaincode = 15665 clip1hiG_gaincode_rev6; 15666 switch (triso) { 15667 case 0: 15668 clip1lo_gaincode = 15669 clip1loG_gaincode_rev6 15670 [0]; 15671 break; 15672 case 1: 15673 clip1lo_gaincode = 15674 clip1loG_gaincode_rev6 15675 [1]; 15676 break; 15677 case 2: 15678 clip1lo_gaincode = 15679 clip1loG_gaincode_rev6 15680 [2]; 15681 break; 15682 case 3: 15683 default: 15684 15685 clip1lo_gaincode = 15686 clip1loG_gaincode_rev6 15687 [3]; 15688 break; 15689 case 4: 15690 clip1lo_gaincode = 15691 clip1loG_gaincode_rev6 15692 [4]; 15693 break; 15694 case 5: 15695 clip1lo_gaincode = 15696 clip1loG_gaincode_rev6 15697 [5]; 15698 break; 15699 case 6: 15700 clip1lo_gaincode = 15701 clip1loG_gaincode_rev6 15702 [6]; 15703 break; 15704 case 7: 15705 clip1lo_gaincode = 15706 clip1loG_gaincode_rev6 15707 [7]; 15708 break; 15709 } 15710 nbclip_th = nbclipG_th_rev6; 15711 w1clip_th = w1clipG_th_rev6; 15712 crsmin_th = crsminG_th_rev6; 15713 crsminl_th = crsminlG_th_rev6; 15714 crsminu_th = crsminuG_th_rev6; 15715 rssi_gain = rssi_gain_default; 15716 } 15717 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15718 lna1_gain_db = lna1G_gain_db_rev5; 15719 lna2_gain_db = lna2G_gain_db_rev5; 15720 if (pi->sh->boardflags & BFL_EXTLNA) { 15721 15722 rfseq_init_gain = 15723 rfseqG_init_gain_rev5_elna; 15724 init_gaincode = 15725 initG_gaincode_rev5_elna; 15726 } else { 15727 rfseq_init_gain = rfseqG_init_gain_rev5; 15728 init_gaincode = initG_gaincode_rev5; 15729 } 15730 clip1hi_gaincode = clip1hiG_gaincode_rev5; 15731 switch (triso) { 15732 case 0: 15733 clip1lo_gaincode = 15734 clip1loG_gaincode_rev5[0]; 15735 break; 15736 case 1: 15737 clip1lo_gaincode = 15738 clip1loG_gaincode_rev5[1]; 15739 break; 15740 case 2: 15741 clip1lo_gaincode = 15742 clip1loG_gaincode_rev5[2]; 15743 break; 15744 case 3: 15745 15746 clip1lo_gaincode = 15747 clip1loG_gaincode_rev5[3]; 15748 break; 15749 case 4: 15750 clip1lo_gaincode = 15751 clip1loG_gaincode_rev5[4]; 15752 break; 15753 case 5: 15754 clip1lo_gaincode = 15755 clip1loG_gaincode_rev5[5]; 15756 break; 15757 case 6: 15758 clip1lo_gaincode = 15759 clip1loG_gaincode_rev5[6]; 15760 break; 15761 case 7: 15762 clip1lo_gaincode = 15763 clip1loG_gaincode_rev5[7]; 15764 break; 15765 default: 15766 clip1lo_gaincode = 15767 clip1loG_gaincode_rev5[3]; 15768 break; 15769 } 15770 nbclip_th = nbclipG_th_rev5; 15771 w1clip_th = w1clipG_th_rev5; 15772 crsmin_th = crsminG_th_rev5; 15773 crsminl_th = crsminlG_th_rev5; 15774 crsminu_th = crsminuG_th_rev5; 15775 rssi_gain = rssi_gain_default; 15776 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15777 lna1_gain_db = lna1G_gain_db_rev4; 15778 lna2_gain_db = lna2G_gain_db; 15779 rfseq_init_gain = rfseqG_init_gain_rev4; 15780 init_gaincode = initG_gaincode_rev4; 15781 clip1hi_gaincode = clip1hiG_gaincode_rev4; 15782 clip1lo_gaincode = clip1loG_gaincode; 15783 nbclip_th = nbclipG_th_rev4; 15784 w1clip_th = w1clipG_th; 15785 crsmin_th = crsminG_th; 15786 crsminl_th = crsminlG_th; 15787 crsminu_th = crsminuG_th; 15788 rssi_gain = rssi_gain_default; 15789 } else { 15790 lna1_gain_db = lna1G_gain_db; 15791 lna2_gain_db = lna2G_gain_db; 15792 rfseq_init_gain = rfseqG_init_gain; 15793 init_gaincode = initG_gaincode; 15794 clip1hi_gaincode = clip1hiG_gaincode; 15795 clip1lo_gaincode = clip1loG_gaincode; 15796 nbclip_th = nbclipG_th; 15797 w1clip_th = w1clipG_th; 15798 crsmin_th = crsminG_th; 15799 crsminl_th = crsminlG_th; 15800 crsminu_th = crsminuG_th; 15801 rssi_gain = rssi_gain_default; 15802 } 15803 tia_gain_db = tiaG_gain_db; 15804 tia_gainbits = tiaG_gainbits; 15805 clip1md_gaincode = clip1mdG_gaincode; 15806 } else { 15807 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15808 lna1_gain_db = lna1A_gain_db_rev6; 15809 lna2_gain_db = lna2A_gain_db_rev6; 15810 tia_gain_db = tiaA_gain_db_rev6; 15811 tia_gainbits = tiaA_gainbits_rev6; 15812 rfseq_init_gain = rfseqA_init_gain_rev6; 15813 init_gaincode = initA_gaincode_rev6; 15814 clip1hi_gaincode = clip1hiA_gaincode_rev6; 15815 clip1md_gaincode = clip1mdA_gaincode_rev6; 15816 clip1lo_gaincode = clip1loA_gaincode_rev6; 15817 crsmin_th = crsminA_th_rev6; 15818 crsminl_th = crsminlA_th_rev6; 15819 if ((pi->pubpi.radiorev == 11) && 15820 (CHSPEC_IS40(pi->radio_chanspec) == 0)) 15821 crsminu_th = crsminuA_th_rev6_224B0; 15822 else 15823 crsminu_th = crsminuA_th_rev6; 15824 15825 nbclip_th = nbclipA_th_rev6; 15826 rssi_gain = rssiA_gain_rev6; 15827 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15828 lna1_gain_db = lna1A_gain_db_rev5; 15829 lna2_gain_db = lna2A_gain_db_rev5; 15830 tia_gain_db = tiaA_gain_db_rev5; 15831 tia_gainbits = tiaA_gainbits_rev5; 15832 rfseq_init_gain = rfseqA_init_gain_rev5; 15833 init_gaincode = initA_gaincode_rev5; 15834 clip1hi_gaincode = clip1hiA_gaincode_rev5; 15835 clip1md_gaincode = clip1mdA_gaincode_rev5; 15836 clip1lo_gaincode = clip1loA_gaincode_rev5; 15837 crsmin_th = crsminA_th_rev5; 15838 crsminl_th = crsminlA_th_rev5; 15839 crsminu_th = crsminuA_th_rev5; 15840 nbclip_th = nbclipA_th_rev5; 15841 rssi_gain = rssiA_gain_rev5; 15842 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15843 lna1_gain_db = lna1A_gain_db_rev4; 15844 lna2_gain_db = lna2A_gain_db_rev4; 15845 tia_gain_db = tiaA_gain_db_rev4; 15846 tia_gainbits = tiaA_gainbits_rev4; 15847 if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { 15848 15849 rfseq_init_gain = 15850 rfseqA_init_gain_rev4_elna; 15851 init_gaincode = 15852 initA_gaincode_rev4_elna; 15853 } else { 15854 rfseq_init_gain = rfseqA_init_gain_rev4; 15855 init_gaincode = initA_gaincode_rev4; 15856 } 15857 clip1hi_gaincode = clip1hiA_gaincode_rev4; 15858 clip1md_gaincode = clip1mdA_gaincode_rev4; 15859 clip1lo_gaincode = clip1loA_gaincode_rev4; 15860 crsmin_th = crsminA_th_rev4; 15861 crsminl_th = crsminlA_th_rev4; 15862 crsminu_th = crsminuA_th_rev4; 15863 nbclip_th = nbclipA_th_rev4; 15864 rssi_gain = rssi_gain_default; 15865 } else { 15866 lna1_gain_db = lna1A_gain_db; 15867 lna2_gain_db = lna2A_gain_db; 15868 tia_gain_db = tiaA_gain_db; 15869 tia_gainbits = tiaA_gainbits; 15870 rfseq_init_gain = rfseqA_init_gain; 15871 init_gaincode = initA_gaincode; 15872 clip1hi_gaincode = clip1hiA_gaincode; 15873 clip1md_gaincode = clip1mdA_gaincode; 15874 clip1lo_gaincode = clip1loA_gaincode; 15875 crsmin_th = crsminA_th; 15876 crsminl_th = crsminlA_th; 15877 crsminu_th = crsminuA_th; 15878 nbclip_th = nbclipA_th; 15879 rssi_gain = rssi_gain_default; 15880 } 15881 w1clip_th = w1clipA_th; 15882 } 15883 15884 write_radio_reg(pi, 15885 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15886 RADIO_2056_RX0), 0x17); 15887 write_radio_reg(pi, 15888 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15889 RADIO_2056_RX1), 0x17); 15890 15891 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), 15892 0xf0); 15893 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), 15894 0xf0); 15895 15896 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), 15897 0x0); 15898 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), 15899 0x0); 15900 15901 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), 15902 rssi_gain); 15903 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), 15904 rssi_gain); 15905 15906 write_radio_reg(pi, 15907 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15908 RADIO_2056_RX0), 0x17); 15909 write_radio_reg(pi, 15910 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15911 RADIO_2056_RX1), 0x17); 15912 15913 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), 15914 0xFF); 15915 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), 15916 0xFF); 15917 15918 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 15919 8, lna1_gain_db); 15920 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 15921 8, lna1_gain_db); 15922 15923 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15924 8, lna2_gain_db); 15925 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15926 8, lna2_gain_db); 15927 15928 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 15929 8, tia_gain_db); 15930 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 15931 8, tia_gain_db); 15932 15933 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 15934 8, tia_gainbits); 15935 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 15936 8, tia_gainbits); 15937 15938 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, 15939 8, &lpf_gain_db); 15940 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, 15941 8, &lpf_gain_db); 15942 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, 15943 8, &lpf_gainbits); 15944 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, 15945 8, &lpf_gainbits); 15946 15947 write_phy_reg(pi, 0x20, init_gaincode); 15948 write_phy_reg(pi, 0x2a7, init_gaincode); 15949 15950 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15951 pi->pubpi.phy_corenum, 0x106, 16, 15952 rfseq_init_gain); 15953 15954 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15955 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15956 15957 write_phy_reg(pi, 0x24, clip1md_gaincode); 15958 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15959 15960 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15961 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15962 15963 mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); 15964 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15965 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15966 15967 write_phy_reg(pi, 0x2b, nbclip_th); 15968 write_phy_reg(pi, 0x41, nbclip_th); 15969 15970 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); 15971 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); 15972 15973 write_phy_reg(pi, 0x150, 0x809c); 15974 15975 } else { 15976 15977 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15978 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15979 15980 write_phy_reg(pi, 0x2b, 0x84); 15981 write_phy_reg(pi, 0x41, 0x84); 15982 15983 if (CHSPEC_IS20(pi->radio_chanspec)) { 15984 write_phy_reg(pi, 0x6b, 0x2b); 15985 write_phy_reg(pi, 0x6c, 0x2b); 15986 write_phy_reg(pi, 0x6d, 0x9); 15987 write_phy_reg(pi, 0x6e, 0x9); 15988 } 15989 15990 w1th = NPHY_RSSICAL_W1_TARGET - 4; 15991 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); 15992 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); 15993 15994 if (CHSPEC_IS20(pi->radio_chanspec)) { 15995 mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); 15996 mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); 15997 15998 mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); 15999 mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); 16000 } 16001 16002 write_phy_reg(pi, 0x150, 0x809c); 16003 16004 if (pi->nphy_gain_boost) 16005 if ((CHSPEC_IS2G(pi->radio_chanspec)) && 16006 (CHSPEC_IS40(pi->radio_chanspec))) 16007 hpf_code = 4; 16008 else 16009 hpf_code = 5; 16010 else if (CHSPEC_IS40(pi->radio_chanspec)) 16011 hpf_code = 6; 16012 else 16013 hpf_code = 7; 16014 16015 mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); 16016 mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); 16017 16018 for (ctr = 0; ctr < 4; ctr++) 16019 regval[ctr] = (hpf_code << 8) | 0x7c; 16020 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16021 16022 wlc_phy_adjust_lnagaintbl_nphy(pi); 16023 16024 if (pi->nphy_elna_gain_config) { 16025 regval[0] = 0; 16026 regval[1] = 1; 16027 regval[2] = 1; 16028 regval[3] = 1; 16029 wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); 16030 wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); 16031 16032 for (ctr = 0; ctr < 4; ctr++) 16033 regval[ctr] = (hpf_code << 8) | 0x74; 16034 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16035 } 16036 16037 if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16038 for (ctr = 0; ctr < 21; ctr++) 16039 regval[ctr] = 3 * ctr; 16040 wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); 16041 wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); 16042 16043 for (ctr = 0; ctr < 21; ctr++) 16044 regval[ctr] = (u16) ctr; 16045 wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); 16046 wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); 16047 } 16048 16049 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, 16050 rfseq_updategainu_events, 16051 rfseq_updategainu_dlys, 16052 sizeof(rfseq_updategainu_events) / 16053 sizeof(rfseq_updategainu_events[0])); 16054 16055 mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); 16056 16057 if (CHSPEC_IS2G(pi->radio_chanspec)) 16058 mod_phy_reg(pi, 16059 (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), 16060 0x7f, 0x4); 16061 } 16062 } 16063 16064 static void wlc_phy_workarounds_nphy(struct brcms_phy *pi) 16065 { 16066 static const u8 rfseq_rx2tx_events[] = { 16067 NPHY_RFSEQ_CMD_NOP, 16068 NPHY_RFSEQ_CMD_RXG_FBW, 16069 NPHY_RFSEQ_CMD_TR_SWITCH, 16070 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 16071 NPHY_RFSEQ_CMD_RXPD_TXPD, 16072 NPHY_RFSEQ_CMD_TX_GAIN, 16073 NPHY_RFSEQ_CMD_EXT_PA 16074 }; 16075 u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; 16076 static const u8 rfseq_tx2rx_events[] = { 16077 NPHY_RFSEQ_CMD_NOP, 16078 NPHY_RFSEQ_CMD_EXT_PA, 16079 NPHY_RFSEQ_CMD_TX_GAIN, 16080 NPHY_RFSEQ_CMD_RXPD_TXPD, 16081 NPHY_RFSEQ_CMD_TR_SWITCH, 16082 NPHY_RFSEQ_CMD_RXG_FBW, 16083 NPHY_RFSEQ_CMD_CLR_HIQ_DIS 16084 }; 16085 static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; 16086 static const u8 rfseq_tx2rx_events_rev3[] = { 16087 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16088 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16089 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16090 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16091 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16092 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16093 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16094 NPHY_REV3_RFSEQ_CMD_END 16095 }; 16096 static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; 16097 u8 rfseq_rx2tx_events_rev3[] = { 16098 NPHY_REV3_RFSEQ_CMD_NOP, 16099 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16100 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16101 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16102 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16103 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16104 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16105 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16106 NPHY_REV3_RFSEQ_CMD_END 16107 }; 16108 u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; 16109 16110 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16111 NPHY_REV3_RFSEQ_CMD_NOP, 16112 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16113 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16114 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16115 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16116 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16117 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16118 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16119 NPHY_REV3_RFSEQ_CMD_END 16120 }; 16121 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16122 static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; 16123 16124 s16 alpha0, alpha1, alpha2; 16125 s16 beta0, beta1, beta2; 16126 u32 leg_data_weights, ht_data_weights, nss1_data_weights, 16127 stbc_data_weights; 16128 u8 chan_freq_range = 0; 16129 static const u16 dac_control = 0x0002; 16130 u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; 16131 u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; 16132 u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16133 u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16134 u16 *aux_adc_vmid; 16135 u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; 16136 u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; 16137 u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; 16138 u16 *aux_adc_gain; 16139 static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; 16140 static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; 16141 s32 min_nvar_val = 0x18d; 16142 s32 min_nvar_offset_6mbps = 20; 16143 u8 pdetrange; 16144 u8 triso; 16145 u16 regval; 16146 u16 afectrl_adc_ctrl1_rev7 = 0x20; 16147 u16 afectrl_adc_ctrl2_rev7 = 0x0; 16148 u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; 16149 u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; 16150 u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; 16151 static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; 16152 static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16153 static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16154 u16 ipalvlshift_3p3_war_en = 0; 16155 u16 rccal_bcap_val, rccal_scap_val; 16156 u16 rccal_tx20_11b_bcap = 0; 16157 u16 rccal_tx20_11b_scap = 0; 16158 u16 rccal_tx20_11n_bcap = 0; 16159 u16 rccal_tx20_11n_scap = 0; 16160 u16 rccal_tx40_11n_bcap = 0; 16161 u16 rccal_tx40_11n_scap = 0; 16162 u16 rx2tx_lpf_rc_lut_tx20_11b = 0; 16163 u16 rx2tx_lpf_rc_lut_tx20_11n = 0; 16164 u16 rx2tx_lpf_rc_lut_tx40_11n = 0; 16165 u16 tx_lpf_bw_ofdm_20mhz = 0; 16166 u16 tx_lpf_bw_ofdm_40mhz = 0; 16167 u16 tx_lpf_bw_11b = 0; 16168 u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; 16169 u16 txgm_idac_bleed = 0; 16170 bool rccal_ovrd = false; 16171 u16 freq; 16172 int coreNum; 16173 16174 if (CHSPEC_IS5G(pi->radio_chanspec)) 16175 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); 16176 else 16177 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); 16178 16179 if (pi->phyhang_avoid) 16180 wlc_phy_stay_in_carriersearch_nphy(pi, true); 16181 16182 or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); 16183 16184 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 16185 16186 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 16187 mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); 16188 16189 mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); 16190 mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); 16191 mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); 16192 mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); 16193 mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); 16194 mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); 16195 mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); 16196 mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); 16197 mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); 16198 mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); 16199 mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); 16200 mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); 16201 mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); 16202 mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); 16203 mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); 16204 mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); 16205 } 16206 16207 if (NREV_LE(pi->pubpi.phy_rev, 8)) { 16208 write_phy_reg(pi, 0x23f, 0x1b0); 16209 write_phy_reg(pi, 0x240, 0x1b0); 16210 } 16211 16212 if (NREV_GE(pi->pubpi.phy_rev, 8)) 16213 mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); 16214 16215 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16216 &dac_control); 16217 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16218 &dac_control); 16219 16220 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16221 1, 0, 32, &leg_data_weights); 16222 leg_data_weights = leg_data_weights & 0xffffff; 16223 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16224 1, 0, 32, &leg_data_weights); 16225 16226 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 16227 2, 0x15e, 16, 16228 rfseq_rx2tx_dacbufpu_rev7); 16229 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, 16230 rfseq_rx2tx_dacbufpu_rev7); 16231 16232 if (PHY_IPA(pi)) 16233 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16234 rfseq_rx2tx_events_rev3_ipa, 16235 rfseq_rx2tx_dlys_rev3_ipa, 16236 ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa)); 16237 16238 mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); 16239 mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); 16240 16241 tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); 16242 tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); 16243 tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); 16244 16245 if (PHY_IPA(pi)) { 16246 16247 if (((pi->pubpi.radiorev == 5) 16248 && (CHSPEC_IS40(pi->radio_chanspec) == 1)) 16249 || (pi->pubpi.radiorev == 7) 16250 || (pi->pubpi.radiorev == 8)) { 16251 16252 rccal_bcap_val = 16253 read_radio_reg( 16254 pi, 16255 RADIO_2057_RCCAL_BCAP_VAL); 16256 rccal_scap_val = 16257 read_radio_reg( 16258 pi, 16259 RADIO_2057_RCCAL_SCAP_VAL); 16260 16261 rccal_tx20_11b_bcap = rccal_bcap_val; 16262 rccal_tx20_11b_scap = rccal_scap_val; 16263 16264 if ((pi->pubpi.radiorev == 5) && 16265 (CHSPEC_IS40(pi->radio_chanspec) == 1)) { 16266 16267 rccal_tx20_11n_bcap = rccal_bcap_val; 16268 rccal_tx20_11n_scap = rccal_scap_val; 16269 rccal_tx40_11n_bcap = 0xc; 16270 rccal_tx40_11n_scap = 0xc; 16271 16272 rccal_ovrd = true; 16273 16274 } else if ((pi->pubpi.radiorev == 7) 16275 || (pi->pubpi.radiorev == 8)) { 16276 16277 tx_lpf_bw_ofdm_20mhz = 4; 16278 tx_lpf_bw_11b = 1; 16279 16280 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16281 rccal_tx20_11n_bcap = 0xc; 16282 rccal_tx20_11n_scap = 0xc; 16283 rccal_tx40_11n_bcap = 0xa; 16284 rccal_tx40_11n_scap = 0xa; 16285 } else { 16286 rccal_tx20_11n_bcap = 0x14; 16287 rccal_tx20_11n_scap = 0x14; 16288 rccal_tx40_11n_bcap = 0xf; 16289 rccal_tx40_11n_scap = 0xf; 16290 } 16291 16292 rccal_ovrd = true; 16293 } 16294 } 16295 16296 } else { 16297 16298 if (pi->pubpi.radiorev == 5) { 16299 16300 tx_lpf_bw_ofdm_20mhz = 1; 16301 tx_lpf_bw_ofdm_40mhz = 3; 16302 16303 rccal_bcap_val = 16304 read_radio_reg( 16305 pi, 16306 RADIO_2057_RCCAL_BCAP_VAL); 16307 rccal_scap_val = 16308 read_radio_reg( 16309 pi, 16310 RADIO_2057_RCCAL_SCAP_VAL); 16311 16312 rccal_tx20_11b_bcap = rccal_bcap_val; 16313 rccal_tx20_11b_scap = rccal_scap_val; 16314 16315 rccal_tx20_11n_bcap = 0x13; 16316 rccal_tx20_11n_scap = 0x11; 16317 rccal_tx40_11n_bcap = 0x13; 16318 rccal_tx40_11n_scap = 0x11; 16319 16320 rccal_ovrd = true; 16321 } 16322 } 16323 16324 if (rccal_ovrd) { 16325 16326 rx2tx_lpf_rc_lut_tx20_11b = 16327 (rccal_tx20_11b_bcap << 8) | 16328 (rccal_tx20_11b_scap << 3) | 16329 tx_lpf_bw_11b; 16330 rx2tx_lpf_rc_lut_tx20_11n = 16331 (rccal_tx20_11n_bcap << 8) | 16332 (rccal_tx20_11n_scap << 3) | 16333 tx_lpf_bw_ofdm_20mhz; 16334 rx2tx_lpf_rc_lut_tx40_11n = 16335 (rccal_tx40_11n_bcap << 8) | 16336 (rccal_tx40_11n_scap << 3) | 16337 tx_lpf_bw_ofdm_40mhz; 16338 16339 for (coreNum = 0; coreNum <= 1; coreNum++) { 16340 wlc_phy_table_write_nphy( 16341 pi, NPHY_TBL_ID_RFSEQ, 16342 1, 16343 0x152 + coreNum * 0x10, 16344 16, 16345 &rx2tx_lpf_rc_lut_tx20_11b); 16346 wlc_phy_table_write_nphy( 16347 pi, NPHY_TBL_ID_RFSEQ, 16348 1, 16349 0x153 + coreNum * 0x10, 16350 16, 16351 &rx2tx_lpf_rc_lut_tx20_11n); 16352 wlc_phy_table_write_nphy( 16353 pi, NPHY_TBL_ID_RFSEQ, 16354 1, 16355 0x154 + coreNum * 0x10, 16356 16, 16357 &rx2tx_lpf_rc_lut_tx20_11n); 16358 wlc_phy_table_write_nphy( 16359 pi, NPHY_TBL_ID_RFSEQ, 16360 1, 16361 0x155 + coreNum * 0x10, 16362 16, 16363 &rx2tx_lpf_rc_lut_tx40_11n); 16364 wlc_phy_table_write_nphy( 16365 pi, NPHY_TBL_ID_RFSEQ, 16366 1, 16367 0x156 + coreNum * 0x10, 16368 16, 16369 &rx2tx_lpf_rc_lut_tx40_11n); 16370 wlc_phy_table_write_nphy( 16371 pi, NPHY_TBL_ID_RFSEQ, 16372 1, 16373 0x157 + coreNum * 0x10, 16374 16, 16375 &rx2tx_lpf_rc_lut_tx40_11n); 16376 wlc_phy_table_write_nphy( 16377 pi, NPHY_TBL_ID_RFSEQ, 16378 1, 16379 0x158 + coreNum * 0x10, 16380 16, 16381 &rx2tx_lpf_rc_lut_tx40_11n); 16382 wlc_phy_table_write_nphy( 16383 pi, NPHY_TBL_ID_RFSEQ, 16384 1, 16385 0x159 + coreNum * 0x10, 16386 16, 16387 &rx2tx_lpf_rc_lut_tx40_11n); 16388 } 16389 16390 wlc_phy_rfctrl_override_nphy_rev7( 16391 pi, (0x1 << 4), 16392 1, 0x3, 0, 16393 NPHY_REV7_RFCTRLOVERRIDE_ID2); 16394 } 16395 16396 write_phy_reg(pi, 0x32f, 0x3); 16397 16398 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 16399 wlc_phy_rfctrl_override_nphy_rev7( 16400 pi, (0x1 << 2), 16401 1, 0x3, 0, 16402 NPHY_REV7_RFCTRLOVERRIDE_ID0); 16403 16404 if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || 16405 (pi->pubpi.radiorev == 6)) { 16406 if ((pi->sh->sromrev >= 8) 16407 && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) 16408 ipalvlshift_3p3_war_en = 1; 16409 16410 if (ipalvlshift_3p3_war_en) { 16411 write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, 16412 0x5); 16413 write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, 16414 0x30); 16415 write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); 16416 or_radio_reg(pi, 16417 RADIO_2057_RXTXBIAS_CONFIG_CORE0, 16418 0x1); 16419 or_radio_reg(pi, 16420 RADIO_2057_RXTXBIAS_CONFIG_CORE1, 16421 0x1); 16422 16423 ipa2g_mainbias = 0x1f; 16424 16425 ipa2g_casconv = 0x6f; 16426 16427 ipa2g_biasfilt = 0xaa; 16428 } else { 16429 16430 ipa2g_mainbias = 0x2b; 16431 16432 ipa2g_casconv = 0x7f; 16433 16434 ipa2g_biasfilt = 0xee; 16435 } 16436 16437 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16438 for (coreNum = 0; coreNum <= 1; coreNum++) { 16439 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16440 coreNum, IPA2G_IMAIN, 16441 ipa2g_mainbias); 16442 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16443 coreNum, IPA2G_CASCONV, 16444 ipa2g_casconv); 16445 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16446 coreNum, 16447 IPA2G_BIAS_FILTER, 16448 ipa2g_biasfilt); 16449 } 16450 } 16451 } 16452 16453 if (PHY_IPA(pi)) { 16454 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16455 if ((pi->pubpi.radiorev == 3) 16456 || (pi->pubpi.radiorev == 4) 16457 || (pi->pubpi.radiorev == 6)) 16458 txgm_idac_bleed = 0x7f; 16459 16460 for (coreNum = 0; coreNum <= 1; coreNum++) { 16461 if (txgm_idac_bleed != 0) 16462 WRITE_RADIO_REG4( 16463 pi, RADIO_2057, 16464 CORE, coreNum, 16465 TXGM_IDAC_BLEED, 16466 txgm_idac_bleed); 16467 } 16468 16469 if (pi->pubpi.radiorev == 5) { 16470 16471 for (coreNum = 0; coreNum <= 1; 16472 coreNum++) { 16473 WRITE_RADIO_REG4(pi, RADIO_2057, 16474 CORE, coreNum, 16475 IPA2G_CASCONV, 16476 0x13); 16477 WRITE_RADIO_REG4(pi, RADIO_2057, 16478 CORE, coreNum, 16479 IPA2G_IMAIN, 16480 0x1f); 16481 WRITE_RADIO_REG4( 16482 pi, RADIO_2057, 16483 CORE, coreNum, 16484 IPA2G_BIAS_FILTER, 16485 0xee); 16486 WRITE_RADIO_REG4(pi, RADIO_2057, 16487 CORE, coreNum, 16488 PAD2G_IDACS, 16489 0x8a); 16490 WRITE_RADIO_REG4( 16491 pi, RADIO_2057, 16492 CORE, coreNum, 16493 PAD_BIAS_FILTER_BWS, 16494 0x3e); 16495 } 16496 16497 } else if ((pi->pubpi.radiorev == 7) 16498 || (pi->pubpi.radiorev == 8)) { 16499 16500 if (CHSPEC_IS40(pi->radio_chanspec) == 16501 0) { 16502 WRITE_RADIO_REG4(pi, RADIO_2057, 16503 CORE, 0, 16504 IPA2G_IMAIN, 16505 0x14); 16506 WRITE_RADIO_REG4(pi, RADIO_2057, 16507 CORE, 1, 16508 IPA2G_IMAIN, 16509 0x12); 16510 } else { 16511 WRITE_RADIO_REG4(pi, RADIO_2057, 16512 CORE, 0, 16513 IPA2G_IMAIN, 16514 0x16); 16515 WRITE_RADIO_REG4(pi, RADIO_2057, 16516 CORE, 1, 16517 IPA2G_IMAIN, 16518 0x16); 16519 } 16520 } 16521 16522 } else { 16523 freq = CHAN5G_FREQ(CHSPEC_CHANNEL( 16524 pi->radio_chanspec)); 16525 if (((freq >= 5180) && (freq <= 5230)) 16526 || ((freq >= 5745) && (freq <= 5805))) { 16527 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16528 0, IPA5G_BIAS_FILTER, 16529 0xff); 16530 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16531 1, IPA5G_BIAS_FILTER, 16532 0xff); 16533 } 16534 } 16535 } else { 16536 16537 if (pi->pubpi.radiorev != 5) { 16538 for (coreNum = 0; coreNum <= 1; coreNum++) { 16539 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16540 coreNum, 16541 TXMIX2G_TUNE_BOOST_PU, 16542 0x61); 16543 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16544 coreNum, 16545 TXGM_IDAC_BLEED, 0x70); 16546 } 16547 } 16548 } 16549 16550 if (pi->pubpi.radiorev == 4) { 16551 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 16552 0x05, 16, 16553 &afectrl_adc_ctrl1_rev7); 16554 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 16555 0x15, 16, 16556 &afectrl_adc_ctrl1_rev7); 16557 16558 for (coreNum = 0; coreNum <= 1; coreNum++) { 16559 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16560 AFE_VCM_CAL_MASTER, 0x0); 16561 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16562 AFE_SET_VCM_I, 0x3f); 16563 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16564 AFE_SET_VCM_Q, 0x3f); 16565 } 16566 } else { 16567 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 16568 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 16569 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 16570 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 16571 16572 mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); 16573 mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); 16574 mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); 16575 mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); 16576 16577 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 16578 0x05, 16, 16579 &afectrl_adc_ctrl2_rev7); 16580 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 16581 0x15, 16, 16582 &afectrl_adc_ctrl2_rev7); 16583 16584 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 16585 mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); 16586 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 16587 mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); 16588 } 16589 16590 write_phy_reg(pi, 0x6a, 0x2); 16591 16592 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, 16593 &min_nvar_offset_6mbps); 16594 16595 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, 16596 &rfseq_pktgn_lpf_hpc_rev7); 16597 16598 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, 16599 &rfseq_pktgn_lpf_h_hpc_rev7); 16600 16601 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, 16602 &rfseq_htpktgn_lpf_hpc_rev7); 16603 16604 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, 16605 &rfseq_cckpktgn_lpf_hpc_rev7); 16606 16607 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, 16608 &rfseq_tx2rx_lpf_h_hpc_rev7); 16609 16610 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, 16611 &rfseq_rx2tx_lpf_h_hpc_rev7); 16612 16613 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16614 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16615 32, &min_nvar_val); 16616 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16617 127, 32, &min_nvar_val); 16618 } else { 16619 min_nvar_val = noise_var_tbl_rev7[3]; 16620 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16621 32, &min_nvar_val); 16622 16623 min_nvar_val = noise_var_tbl_rev7[127]; 16624 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16625 127, 32, &min_nvar_val); 16626 } 16627 16628 wlc_phy_workarounds_nphy_gainctrl(pi); 16629 16630 pdetrange = 16631 (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. 16632 pdetrange : pi->srom_fem2g.pdetrange; 16633 16634 if (pdetrange == 0) { 16635 chan_freq_range = 16636 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16637 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16638 aux_adc_vmid_rev7_core0[3] = 0x70; 16639 aux_adc_vmid_rev7_core1[3] = 0x70; 16640 aux_adc_gain_rev7[3] = 2; 16641 } else { 16642 aux_adc_vmid_rev7_core0[3] = 0x80; 16643 aux_adc_vmid_rev7_core1[3] = 0x80; 16644 aux_adc_gain_rev7[3] = 3; 16645 } 16646 } else if (pdetrange == 1) { 16647 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16648 aux_adc_vmid_rev7_core0[3] = 0x7c; 16649 aux_adc_vmid_rev7_core1[3] = 0x7c; 16650 aux_adc_gain_rev7[3] = 2; 16651 } else { 16652 aux_adc_vmid_rev7_core0[3] = 0x8c; 16653 aux_adc_vmid_rev7_core1[3] = 0x8c; 16654 aux_adc_gain_rev7[3] = 1; 16655 } 16656 } else if (pdetrange == 2) { 16657 if (pi->pubpi.radioid == BCM2057_ID) { 16658 if ((pi->pubpi.radiorev == 5) 16659 || (pi->pubpi.radiorev == 7) 16660 || (pi->pubpi.radiorev == 8)) { 16661 if (chan_freq_range == 16662 WL_CHAN_FREQ_RANGE_2G) { 16663 aux_adc_vmid_rev7_core0[3] = 16664 0x8c; 16665 aux_adc_vmid_rev7_core1[3] = 16666 0x8c; 16667 aux_adc_gain_rev7[3] = 0; 16668 } else { 16669 aux_adc_vmid_rev7_core0[3] = 16670 0x96; 16671 aux_adc_vmid_rev7_core1[3] = 16672 0x96; 16673 aux_adc_gain_rev7[3] = 0; 16674 } 16675 } 16676 } 16677 16678 } else if (pdetrange == 3) { 16679 if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { 16680 aux_adc_vmid_rev7_core0[3] = 0x89; 16681 aux_adc_vmid_rev7_core1[3] = 0x89; 16682 aux_adc_gain_rev7[3] = 0; 16683 } 16684 16685 } else if (pdetrange == 5) { 16686 16687 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16688 aux_adc_vmid_rev7_core0[3] = 0x80; 16689 aux_adc_vmid_rev7_core1[3] = 0x80; 16690 aux_adc_gain_rev7[3] = 3; 16691 } else { 16692 aux_adc_vmid_rev7_core0[3] = 0x70; 16693 aux_adc_vmid_rev7_core1[3] = 0x70; 16694 aux_adc_gain_rev7[3] = 2; 16695 } 16696 } 16697 16698 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, 16699 &aux_adc_vmid_rev7_core0); 16700 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, 16701 &aux_adc_vmid_rev7_core1); 16702 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, 16703 &aux_adc_gain_rev7); 16704 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, 16705 &aux_adc_gain_rev7); 16706 16707 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 16708 16709 write_phy_reg(pi, 0x23f, 0x1f8); 16710 write_phy_reg(pi, 0x240, 0x1f8); 16711 16712 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16713 1, 0, 32, &leg_data_weights); 16714 leg_data_weights = leg_data_weights & 0xffffff; 16715 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16716 1, 0, 32, &leg_data_weights); 16717 16718 alpha0 = 293; 16719 alpha1 = 435; 16720 alpha2 = 261; 16721 beta0 = 366; 16722 beta1 = 205; 16723 beta2 = 32; 16724 write_phy_reg(pi, 0x145, alpha0); 16725 write_phy_reg(pi, 0x146, alpha1); 16726 write_phy_reg(pi, 0x147, alpha2); 16727 write_phy_reg(pi, 0x148, beta0); 16728 write_phy_reg(pi, 0x149, beta1); 16729 write_phy_reg(pi, 0x14a, beta2); 16730 16731 write_phy_reg(pi, 0x38, 0xC); 16732 write_phy_reg(pi, 0x2ae, 0xC); 16733 16734 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, 16735 rfseq_tx2rx_events_rev3, 16736 rfseq_tx2rx_dlys_rev3, 16737 ARRAY_SIZE(rfseq_tx2rx_events_rev3)); 16738 16739 if (PHY_IPA(pi)) 16740 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16741 rfseq_rx2tx_events_rev3_ipa, 16742 rfseq_rx2tx_dlys_rev3_ipa, 16743 ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa)); 16744 16745 if ((pi->sh->hw_phyrxchain != 0x3) && 16746 (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { 16747 16748 if (PHY_IPA(pi)) { 16749 rfseq_rx2tx_dlys_rev3[5] = 59; 16750 rfseq_rx2tx_dlys_rev3[6] = 1; 16751 rfseq_rx2tx_events_rev3[7] = 16752 NPHY_REV3_RFSEQ_CMD_END; 16753 } 16754 16755 wlc_phy_set_rfseq_nphy( 16756 pi, NPHY_RFSEQ_RX2TX, 16757 rfseq_rx2tx_events_rev3, 16758 rfseq_rx2tx_dlys_rev3, 16759 ARRAY_SIZE(rfseq_rx2tx_events_rev3)); 16760 } 16761 16762 if (CHSPEC_IS2G(pi->radio_chanspec)) 16763 write_phy_reg(pi, 0x6a, 0x2); 16764 else 16765 write_phy_reg(pi, 0x6a, 0x9c40); 16766 16767 mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); 16768 16769 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16770 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16771 32, &min_nvar_val); 16772 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16773 127, 32, &min_nvar_val); 16774 } else { 16775 min_nvar_val = noise_var_tbl_rev3[3]; 16776 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16777 32, &min_nvar_val); 16778 16779 min_nvar_val = noise_var_tbl_rev3[127]; 16780 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16781 127, 32, &min_nvar_val); 16782 } 16783 16784 wlc_phy_workarounds_nphy_gainctrl(pi); 16785 16786 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16787 &dac_control); 16788 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16789 &dac_control); 16790 16791 pdetrange = 16792 (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. 16793 pdetrange : pi->srom_fem2g.pdetrange; 16794 16795 if (pdetrange == 0) { 16796 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 16797 aux_adc_vmid = aux_adc_vmid_rev4; 16798 aux_adc_gain = aux_adc_gain_rev4; 16799 } else { 16800 aux_adc_vmid = aux_adc_vmid_rev3; 16801 aux_adc_gain = aux_adc_gain_rev3; 16802 } 16803 chan_freq_range = 16804 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16805 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16806 switch (chan_freq_range) { 16807 case WL_CHAN_FREQ_RANGE_5GL: 16808 aux_adc_vmid[3] = 0x89; 16809 aux_adc_gain[3] = 0; 16810 break; 16811 case WL_CHAN_FREQ_RANGE_5GM: 16812 aux_adc_vmid[3] = 0x89; 16813 aux_adc_gain[3] = 0; 16814 break; 16815 case WL_CHAN_FREQ_RANGE_5GH: 16816 aux_adc_vmid[3] = 0x89; 16817 aux_adc_gain[3] = 0; 16818 break; 16819 default: 16820 break; 16821 } 16822 } 16823 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16824 0x08, 16, aux_adc_vmid); 16825 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16826 0x18, 16, aux_adc_vmid); 16827 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16828 0x0c, 16, aux_adc_gain); 16829 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16830 0x1c, 16, aux_adc_gain); 16831 } else if (pdetrange == 1) { 16832 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16833 0x08, 16, sk_adc_vmid); 16834 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16835 0x18, 16, sk_adc_vmid); 16836 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16837 0x0c, 16, sk_adc_gain); 16838 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16839 0x1c, 16, sk_adc_gain); 16840 } else if (pdetrange == 2) { 16841 16842 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; 16843 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; 16844 16845 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16846 chan_freq_range = 16847 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16848 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16849 bcm_adc_vmid[3] = 0x8e; 16850 bcm_adc_gain[3] = 0x03; 16851 } else { 16852 bcm_adc_vmid[3] = 0x94; 16853 bcm_adc_gain[3] = 0x03; 16854 } 16855 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 16856 bcm_adc_vmid[3] = 0x84; 16857 bcm_adc_gain[3] = 0x02; 16858 } 16859 16860 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16861 0x08, 16, bcm_adc_vmid); 16862 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16863 0x18, 16, bcm_adc_vmid); 16864 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16865 0x0c, 16, bcm_adc_gain); 16866 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16867 0x1c, 16, bcm_adc_gain); 16868 } else if (pdetrange == 3) { 16869 chan_freq_range = 16870 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16871 if ((NREV_GE(pi->pubpi.phy_rev, 4)) 16872 && (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { 16873 16874 u16 auxadc_vmid[] = { 16875 0xa2, 0xb4, 0xb4, 0x270 16876 }; 16877 u16 auxadc_gain[] = { 16878 0x02, 0x02, 0x02, 0x00 16879 }; 16880 16881 wlc_phy_table_write_nphy(pi, 16882 NPHY_TBL_ID_AFECTRL, 4, 16883 0x08, 16, auxadc_vmid); 16884 wlc_phy_table_write_nphy(pi, 16885 NPHY_TBL_ID_AFECTRL, 4, 16886 0x18, 16, auxadc_vmid); 16887 wlc_phy_table_write_nphy(pi, 16888 NPHY_TBL_ID_AFECTRL, 4, 16889 0x0c, 16, auxadc_gain); 16890 wlc_phy_table_write_nphy(pi, 16891 NPHY_TBL_ID_AFECTRL, 4, 16892 0x1c, 16, auxadc_gain); 16893 } 16894 } else if ((pdetrange == 4) || (pdetrange == 5)) { 16895 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; 16896 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; 16897 u16 Vmid[2], Av[2]; 16898 16899 chan_freq_range = 16900 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16901 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16902 Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; 16903 Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; 16904 Av[0] = (pdetrange == 4) ? 2 : 0; 16905 Av[1] = (pdetrange == 4) ? 2 : 0; 16906 } else { 16907 Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; 16908 Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; 16909 Av[0] = (pdetrange == 4) ? 2 : 0; 16910 Av[1] = (pdetrange == 4) ? 2 : 0; 16911 } 16912 16913 bcm_adc_vmid[3] = Vmid[0]; 16914 bcm_adc_gain[3] = Av[0]; 16915 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16916 0x08, 16, bcm_adc_vmid); 16917 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16918 0x0c, 16, bcm_adc_gain); 16919 16920 bcm_adc_vmid[3] = Vmid[1]; 16921 bcm_adc_gain[3] = Av[1]; 16922 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16923 0x18, 16, bcm_adc_vmid); 16924 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16925 0x1c, 16, bcm_adc_gain); 16926 } 16927 16928 write_radio_reg(pi, 16929 (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), 16930 0x0); 16931 write_radio_reg(pi, 16932 (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), 16933 0x0); 16934 16935 write_radio_reg(pi, 16936 (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), 16937 0x6); 16938 write_radio_reg(pi, 16939 (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), 16940 0x6); 16941 16942 write_radio_reg(pi, 16943 (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), 16944 0x7); 16945 write_radio_reg(pi, 16946 (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), 16947 0x7); 16948 16949 write_radio_reg(pi, 16950 (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), 16951 0x88); 16952 write_radio_reg(pi, 16953 (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), 16954 0x88); 16955 16956 write_radio_reg(pi, 16957 (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), 16958 0x0); 16959 write_radio_reg(pi, 16960 (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), 16961 0x0); 16962 16963 write_radio_reg(pi, 16964 (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), 16965 0x0); 16966 write_radio_reg(pi, 16967 (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), 16968 0x0); 16969 16970 triso = 16971 (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g. 16972 triso : pi->srom_fem2g.triso; 16973 if (triso == 7) { 16974 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 16975 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 16976 } 16977 16978 wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); 16979 16980 if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && 16981 (CHSPEC_IS5G(pi->radio_chanspec))) || 16982 (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || 16983 (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && 16984 (CHSPEC_IS2G(pi->radio_chanspec)))) { 16985 nss1_data_weights = 0x00088888; 16986 ht_data_weights = 0x00088888; 16987 stbc_data_weights = 0x00088888; 16988 } else { 16989 nss1_data_weights = 0x88888888; 16990 ht_data_weights = 0x88888888; 16991 stbc_data_weights = 0x88888888; 16992 } 16993 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16994 1, 1, 32, &nss1_data_weights); 16995 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16996 1, 2, 32, &ht_data_weights); 16997 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16998 1, 3, 32, &stbc_data_weights); 16999 17000 if (NREV_IS(pi->pubpi.phy_rev, 4)) { 17001 if (CHSPEC_IS5G(pi->radio_chanspec)) { 17002 write_radio_reg(pi, 17003 RADIO_2056_TX_GMBB_IDAC | 17004 RADIO_2056_TX0, 0x70); 17005 write_radio_reg(pi, 17006 RADIO_2056_TX_GMBB_IDAC | 17007 RADIO_2056_TX1, 0x70); 17008 } 17009 } 17010 17011 if (!pi->edcrs_threshold_lock) { 17012 write_phy_reg(pi, 0x224, 0x3eb); 17013 write_phy_reg(pi, 0x225, 0x3eb); 17014 write_phy_reg(pi, 0x226, 0x341); 17015 write_phy_reg(pi, 0x227, 0x341); 17016 write_phy_reg(pi, 0x228, 0x42b); 17017 write_phy_reg(pi, 0x229, 0x42b); 17018 write_phy_reg(pi, 0x22a, 0x381); 17019 write_phy_reg(pi, 0x22b, 0x381); 17020 write_phy_reg(pi, 0x22c, 0x42b); 17021 write_phy_reg(pi, 0x22d, 0x42b); 17022 write_phy_reg(pi, 0x22e, 0x381); 17023 write_phy_reg(pi, 0x22f, 0x381); 17024 } 17025 17026 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 17027 17028 if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) 17029 wlapi_bmac_mhf(pi->sh->physhim, MHF4, 17030 MHF4_BPHY_TXCORE0, 17031 MHF4_BPHY_TXCORE0, BRCM_BAND_ALL); 17032 } 17033 } else { 17034 17035 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || 17036 (pi->sh->boardtype == 0x8b)) { 17037 uint i; 17038 u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; 17039 for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) 17040 rfseq_rx2tx_dlys[i] = war_dlys[i]; 17041 } 17042 17043 if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { 17044 and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); 17045 and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); 17046 } else { 17047 or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); 17048 or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); 17049 } 17050 17051 regval = 0x000a; 17052 wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); 17053 wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); 17054 17055 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17056 regval = 0xcdaa; 17057 wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); 17058 wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); 17059 } 17060 17061 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 17062 regval = 0x0000; 17063 wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); 17064 wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); 17065 17066 regval = 0x7aab; 17067 wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); 17068 wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); 17069 17070 regval = 0x0800; 17071 wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); 17072 wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); 17073 } 17074 17075 write_phy_reg(pi, 0xf8, 0x02d8); 17076 write_phy_reg(pi, 0xf9, 0x0301); 17077 write_phy_reg(pi, 0xfa, 0x02d8); 17078 write_phy_reg(pi, 0xfb, 0x0301); 17079 17080 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, 17081 rfseq_rx2tx_dlys, 17082 ARRAY_SIZE(rfseq_rx2tx_events)); 17083 17084 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, 17085 rfseq_tx2rx_dlys, 17086 ARRAY_SIZE(rfseq_tx2rx_events)); 17087 17088 wlc_phy_workarounds_nphy_gainctrl(pi); 17089 17090 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 17091 17092 if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) 17093 wlapi_bmac_mhf(pi->sh->physhim, MHF3, 17094 MHF3_NPHY_MLADV_WAR, 17095 MHF3_NPHY_MLADV_WAR, 17096 BRCM_BAND_ALL); 17097 17098 } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { 17099 write_phy_reg(pi, 0x1e3, 0x0); 17100 write_phy_reg(pi, 0x1e4, 0x0); 17101 } 17102 17103 if (NREV_LT(pi->pubpi.phy_rev, 2)) 17104 mod_phy_reg(pi, 0x90, (0x1 << 7), 0); 17105 17106 alpha0 = 293; 17107 alpha1 = 435; 17108 alpha2 = 261; 17109 beta0 = 366; 17110 beta1 = 205; 17111 beta2 = 32; 17112 write_phy_reg(pi, 0x145, alpha0); 17113 write_phy_reg(pi, 0x146, alpha1); 17114 write_phy_reg(pi, 0x147, alpha2); 17115 write_phy_reg(pi, 0x148, beta0); 17116 write_phy_reg(pi, 0x149, beta1); 17117 write_phy_reg(pi, 0x14a, beta2); 17118 17119 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17120 mod_phy_reg(pi, 0x142, (0xf << 12), 0); 17121 17122 write_phy_reg(pi, 0x192, 0xb5); 17123 write_phy_reg(pi, 0x193, 0xa4); 17124 write_phy_reg(pi, 0x194, 0x0); 17125 } 17126 17127 if (NREV_IS(pi->pubpi.phy_rev, 2)) 17128 mod_phy_reg(pi, 0x221, 17129 NPHY_FORCESIG_DECODEGATEDCLKS, 17130 NPHY_FORCESIG_DECODEGATEDCLKS); 17131 } 17132 17133 if (pi->phyhang_avoid) 17134 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17135 } 17136 17137 static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 17138 { 17139 int j, type = 2; 17140 u16 addr_offset = 0x2c5; 17141 17142 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 17143 write_phy_reg(pi, addr_offset + j, 17144 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 17145 } 17146 17147 static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals) 17148 { 17149 17150 if (write == 0) { 17151 vals[0] = read_phy_reg(pi, 0x2c); 17152 vals[1] = read_phy_reg(pi, 0x42); 17153 } else { 17154 write_phy_reg(pi, 0x2c, vals[0]); 17155 write_phy_reg(pi, 0x42, vals[1]); 17156 } 17157 } 17158 17159 static void wlc_phy_ipa_internal_tssi_setup_nphy(struct brcms_phy *pi) 17160 { 17161 u8 core; 17162 17163 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17164 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17165 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17166 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17167 TX_SSI_MASTER, 0x5); 17168 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17169 TX_SSI_MUX, 0xe); 17170 17171 if (pi->pubpi.radiorev != 5) 17172 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17173 core, TSSIA, 0); 17174 17175 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17176 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17177 core, TSSIG, 0x1); 17178 else 17179 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17180 core, TSSIG, 0x31); 17181 } else { 17182 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17183 TX_SSI_MASTER, 0x9); 17184 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17185 TX_SSI_MUX, 0xc); 17186 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17187 TSSIG, 0); 17188 17189 if (pi->pubpi.radiorev != 5) { 17190 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17191 WRITE_RADIO_REG3(pi, RADIO_2057, 17192 TX, core, 17193 TSSIA, 0x1); 17194 else 17195 WRITE_RADIO_REG3(pi, RADIO_2057, 17196 TX, core, 17197 TSSIA, 0x31); 17198 } 17199 } 17200 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 17201 0); 17202 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 17203 0); 17204 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 17205 0x3); 17206 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 17207 0x0); 17208 } 17209 } else { 17210 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, 17211 (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : 17212 0x80); 17213 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); 17214 WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); 17215 17216 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17217 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, 17218 0x0); 17219 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, 17220 0x0); 17221 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, 17222 0x3); 17223 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, 17224 0x0); 17225 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, 17226 0x8); 17227 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, 17228 0x0); 17229 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, 17230 0x0); 17231 17232 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17233 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17234 TX_SSI_MASTER, 0x5); 17235 17236 if (pi->pubpi.radiorev != 5) 17237 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17238 core, TSSIA, 0x0); 17239 if (NREV_GE(pi->pubpi.phy_rev, 5)) 17240 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17241 core, TSSIG, 0x31); 17242 else 17243 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17244 core, TSSIG, 0x11); 17245 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17246 TX_SSI_MUX, 0xe); 17247 } else { 17248 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17249 TX_SSI_MASTER, 0x9); 17250 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17251 TSSIA, 0x31); 17252 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17253 TSSIG, 0x0); 17254 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17255 TX_SSI_MUX, 0xc); 17256 } 17257 } 17258 } 17259 } 17260 17261 static void 17262 wlc_phy_rfctrl_override_nphy(struct brcms_phy *pi, u16 field, u16 value, 17263 u8 core_mask, u8 off) 17264 { 17265 u8 core_num; 17266 u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = 17267 0, val_mask = 0; 17268 u8 shift = 0, val_shift = 0; 17269 17270 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 17271 17272 en_mask = field; 17273 for (core_num = 0; core_num < 2; core_num++) { 17274 17275 switch (field) { 17276 case (0x1 << 1): 17277 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17278 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17279 val_mask = (0x1 << 0); 17280 val_shift = 0; 17281 break; 17282 case (0x1 << 2): 17283 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17284 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17285 val_mask = (0x1 << 1); 17286 val_shift = 1; 17287 break; 17288 case (0x1 << 3): 17289 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17290 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17291 val_mask = (0x1 << 2); 17292 val_shift = 2; 17293 break; 17294 case (0x1 << 4): 17295 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17296 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17297 val_mask = (0x1 << 4); 17298 val_shift = 4; 17299 break; 17300 case (0x1 << 5): 17301 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17302 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17303 val_mask = (0x1 << 5); 17304 val_shift = 5; 17305 break; 17306 case (0x1 << 6): 17307 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17308 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17309 val_mask = (0x1 << 6); 17310 val_shift = 6; 17311 break; 17312 case (0x1 << 7): 17313 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17314 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17315 val_mask = (0x1 << 7); 17316 val_shift = 7; 17317 break; 17318 case (0x1 << 8): 17319 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17320 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17321 val_mask = (0x7 << 8); 17322 val_shift = 8; 17323 break; 17324 case (0x1 << 11): 17325 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17326 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17327 val_mask = (0x7 << 13); 17328 val_shift = 13; 17329 break; 17330 17331 case (0x1 << 9): 17332 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17333 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17334 val_mask = (0x7 << 0); 17335 val_shift = 0; 17336 break; 17337 17338 case (0x1 << 10): 17339 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17340 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17341 val_mask = (0x7 << 4); 17342 val_shift = 4; 17343 break; 17344 17345 case (0x1 << 12): 17346 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17347 val_addr = (core_num == 0) ? 0x7b : 0x7e; 17348 val_mask = (0xffff << 0); 17349 val_shift = 0; 17350 break; 17351 case (0x1 << 13): 17352 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17353 val_addr = (core_num == 0) ? 0x7c : 0x7f; 17354 val_mask = (0xffff << 0); 17355 val_shift = 0; 17356 break; 17357 case (0x1 << 14): 17358 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17359 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17360 val_mask = (0x3 << 6); 17361 val_shift = 6; 17362 break; 17363 case (0x1 << 0): 17364 en_addr = (core_num == 0) ? 0xe5 : 0xe6; 17365 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17366 val_mask = (0x1 << 15); 17367 val_shift = 15; 17368 break; 17369 default: 17370 addr = 0xffff; 17371 break; 17372 } 17373 17374 if (off) { 17375 and_phy_reg(pi, en_addr, ~en_mask); 17376 and_phy_reg(pi, val_addr, ~val_mask); 17377 } else { 17378 17379 if ((core_mask == 0) 17380 || (core_mask & (1 << core_num))) { 17381 or_phy_reg(pi, en_addr, en_mask); 17382 17383 if (addr != 0xffff) 17384 mod_phy_reg(pi, val_addr, 17385 val_mask, 17386 (value << 17387 val_shift)); 17388 } 17389 } 17390 } 17391 } else { 17392 17393 if (off) { 17394 and_phy_reg(pi, 0xec, ~field); 17395 value = 0x0; 17396 } else { 17397 or_phy_reg(pi, 0xec, field); 17398 } 17399 17400 for (core_num = 0; core_num < 2; core_num++) { 17401 17402 switch (field) { 17403 case (0x1 << 1): 17404 case (0x1 << 9): 17405 case (0x1 << 12): 17406 case (0x1 << 13): 17407 case (0x1 << 14): 17408 addr = 0x78; 17409 17410 core_mask = 0x1; 17411 break; 17412 case (0x1 << 2): 17413 case (0x1 << 3): 17414 case (0x1 << 4): 17415 case (0x1 << 5): 17416 case (0x1 << 6): 17417 case (0x1 << 7): 17418 case (0x1 << 8): 17419 addr = (core_num == 0) ? 0x7a : 0x7d; 17420 break; 17421 case (0x1 << 10): 17422 addr = (core_num == 0) ? 0x7b : 0x7e; 17423 break; 17424 case (0x1 << 11): 17425 addr = (core_num == 0) ? 0x7c : 0x7f; 17426 break; 17427 default: 17428 addr = 0xffff; 17429 } 17430 17431 switch (field) { 17432 case (0x1 << 1): 17433 mask = (0x7 << 3); 17434 shift = 3; 17435 break; 17436 case (0x1 << 9): 17437 mask = (0x1 << 2); 17438 shift = 2; 17439 break; 17440 case (0x1 << 12): 17441 mask = (0x1 << 8); 17442 shift = 8; 17443 break; 17444 case (0x1 << 13): 17445 mask = (0x1 << 9); 17446 shift = 9; 17447 break; 17448 case (0x1 << 14): 17449 mask = (0xf << 12); 17450 shift = 12; 17451 break; 17452 case (0x1 << 2): 17453 mask = (0x1 << 0); 17454 shift = 0; 17455 break; 17456 case (0x1 << 3): 17457 mask = (0x1 << 1); 17458 shift = 1; 17459 break; 17460 case (0x1 << 4): 17461 mask = (0x1 << 2); 17462 shift = 2; 17463 break; 17464 case (0x1 << 5): 17465 mask = (0x3 << 4); 17466 shift = 4; 17467 break; 17468 case (0x1 << 6): 17469 mask = (0x3 << 6); 17470 shift = 6; 17471 break; 17472 case (0x1 << 7): 17473 mask = (0x1 << 8); 17474 shift = 8; 17475 break; 17476 case (0x1 << 8): 17477 mask = (0x1 << 9); 17478 shift = 9; 17479 break; 17480 case (0x1 << 10): 17481 mask = 0x1fff; 17482 shift = 0x0; 17483 break; 17484 case (0x1 << 11): 17485 mask = 0x1fff; 17486 shift = 0x0; 17487 break; 17488 default: 17489 mask = 0x0; 17490 shift = 0x0; 17491 break; 17492 } 17493 17494 if ((addr != 0xffff) && (core_mask & (1 << core_num))) 17495 mod_phy_reg(pi, addr, mask, (value << shift)); 17496 } 17497 17498 or_phy_reg(pi, 0xec, (0x1 << 0)); 17499 or_phy_reg(pi, 0x78, (0x1 << 0)); 17500 udelay(1); 17501 and_phy_reg(pi, 0xec, ~(0x1 << 0)); 17502 } 17503 } 17504 17505 static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi) 17506 { 17507 s32 rssi_buf[4]; 17508 s32 int_val; 17509 17510 if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) 17511 17512 return; 17513 17514 if (PHY_IPA(pi)) 17515 wlc_phy_ipa_internal_tssi_setup_nphy(pi); 17516 17517 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17518 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17519 0, 0x3, 0, 17520 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17521 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17522 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); 17523 17524 wlc_phy_stopplayback_nphy(pi); 17525 17526 wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); 17527 17528 udelay(20); 17529 int_val = 17530 wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, 17531 1); 17532 wlc_phy_stopplayback_nphy(pi); 17533 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); 17534 17535 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17536 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17537 0, 0x3, 1, 17538 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17539 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17540 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); 17541 17542 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17543 17544 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17545 (u8) ((int_val >> 24) & 0xff); 17546 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17547 (u8) ((int_val >> 24) & 0xff); 17548 17549 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17550 (u8) ((int_val >> 8) & 0xff); 17551 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17552 (u8) ((int_val >> 8) & 0xff); 17553 } else { 17554 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17555 (u8) ((int_val >> 24) & 0xff); 17556 17557 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17558 (u8) ((int_val >> 8) & 0xff); 17559 17560 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17561 (u8) ((int_val >> 16) & 0xff); 17562 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17563 (u8) ((int_val) & 0xff); 17564 } 17565 17566 } 17567 17568 static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi) 17569 { 17570 u8 idx, idx2, i, delta_ind; 17571 17572 for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) 17573 pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; 17574 17575 for (i = 0; i < 4; i++) { 17576 idx2 = 0; 17577 17578 delta_ind = 0; 17579 17580 switch (i) { 17581 case 0: 17582 17583 if (CHSPEC_IS40(pi->radio_chanspec) 17584 && NPHY_IS_SROM_REINTERPRET) { 17585 idx = TXP_FIRST_MCS_40_SISO; 17586 } else { 17587 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17588 TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; 17589 delta_ind = 1; 17590 } 17591 break; 17592 17593 case 1: 17594 17595 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17596 TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; 17597 break; 17598 17599 case 2: 17600 17601 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17602 TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; 17603 break; 17604 17605 case 3: 17606 17607 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17608 TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; 17609 break; 17610 } 17611 17612 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17613 pi->tx_power_offset[idx]; 17614 idx = idx + delta_ind; 17615 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17616 pi->tx_power_offset[idx]; 17617 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17618 pi->tx_power_offset[idx]; 17619 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17620 pi->tx_power_offset[idx++]; 17621 17622 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17623 pi->tx_power_offset[idx++]; 17624 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17625 pi->tx_power_offset[idx]; 17626 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17627 pi->tx_power_offset[idx]; 17628 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17629 pi->tx_power_offset[idx++]; 17630 17631 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17632 pi->tx_power_offset[idx++]; 17633 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17634 pi->tx_power_offset[idx]; 17635 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17636 pi->tx_power_offset[idx]; 17637 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17638 pi->tx_power_offset[idx++]; 17639 17640 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17641 pi->tx_power_offset[idx]; 17642 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17643 pi->tx_power_offset[idx++]; 17644 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17645 pi->tx_power_offset[idx]; 17646 idx = idx + 1 - delta_ind; 17647 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17648 pi->tx_power_offset[idx]; 17649 17650 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17651 pi->tx_power_offset[idx]; 17652 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17653 pi->tx_power_offset[idx]; 17654 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17655 pi->tx_power_offset[idx]; 17656 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17657 pi->tx_power_offset[idx]; 17658 } 17659 } 17660 17661 static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi) 17662 { 17663 u32 idx; 17664 s16 a1[2], b0[2], b1[2]; 17665 s8 target_pwr_qtrdbm[2]; 17666 s32 num, den, pwr_est; 17667 u8 chan_freq_range; 17668 u8 idle_tssi[2]; 17669 u32 tbl_id, tbl_len, tbl_offset; 17670 u32 regval[64]; 17671 u8 core; 17672 17673 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17674 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17675 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17676 udelay(1); 17677 } 17678 17679 if (pi->phyhang_avoid) 17680 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17681 17682 or_phy_reg(pi, 0x122, (0x1 << 0)); 17683 17684 if (NREV_GE(pi->pubpi.phy_rev, 3)) 17685 and_phy_reg(pi, 0x1e7, (u16) (~(0x1 << 15))); 17686 else 17687 or_phy_reg(pi, 0x1e7, (0x1 << 15)); 17688 17689 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17690 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17691 17692 if (pi->sh->sromrev < 4) { 17693 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17694 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17695 a1[0] = -424; 17696 a1[1] = -424; 17697 b0[0] = 5612; 17698 b0[1] = 5612; 17699 b1[1] = -1393; 17700 b1[0] = -1393; 17701 } else { 17702 17703 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 17704 switch (chan_freq_range) { 17705 case WL_CHAN_FREQ_RANGE_2G: 17706 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17707 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17708 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; 17709 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; 17710 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; 17711 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; 17712 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; 17713 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; 17714 break; 17715 case WL_CHAN_FREQ_RANGE_5GL: 17716 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17717 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17718 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; 17719 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; 17720 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; 17721 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; 17722 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; 17723 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; 17724 break; 17725 case WL_CHAN_FREQ_RANGE_5GM: 17726 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17727 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17728 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; 17729 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; 17730 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; 17731 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; 17732 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; 17733 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; 17734 break; 17735 case WL_CHAN_FREQ_RANGE_5GH: 17736 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17737 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17738 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; 17739 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; 17740 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; 17741 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; 17742 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; 17743 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; 17744 break; 17745 default: 17746 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17747 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17748 a1[0] = -424; 17749 a1[1] = -424; 17750 b0[0] = 5612; 17751 b0[1] = 5612; 17752 b1[1] = -1393; 17753 b1[0] = -1393; 17754 break; 17755 } 17756 } 17757 17758 /* use the provided transmit power */ 17759 target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; 17760 target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; 17761 17762 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17763 if (pi->srom_fem2g.tssipos) 17764 or_phy_reg(pi, 0x1e9, (0x1 << 14)); 17765 17766 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17767 for (core = 0; core <= 1; core++) { 17768 if (PHY_IPA(pi)) { 17769 if (CHSPEC_IS2G(pi->radio_chanspec)) 17770 WRITE_RADIO_REG3(pi, RADIO_2057, 17771 TX, core, 17772 TX_SSI_MUX, 17773 0xe); 17774 else 17775 WRITE_RADIO_REG3(pi, RADIO_2057, 17776 TX, core, 17777 TX_SSI_MUX, 17778 0xc); 17779 } 17780 } 17781 } else { 17782 if (PHY_IPA(pi)) { 17783 17784 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17785 RADIO_2056_TX0, 17786 (CHSPEC_IS5G 17787 (pi->radio_chanspec)) ? 17788 0xc : 0xe); 17789 write_radio_reg(pi, 17790 RADIO_2056_TX_TX_SSI_MUX | 17791 RADIO_2056_TX1, 17792 (CHSPEC_IS5G 17793 (pi->radio_chanspec)) ? 17794 0xc : 0xe); 17795 } else { 17796 17797 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17798 RADIO_2056_TX0, 0x11); 17799 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17800 RADIO_2056_TX1, 0x11); 17801 } 17802 } 17803 } 17804 17805 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17806 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17807 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17808 udelay(1); 17809 } 17810 17811 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17812 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17813 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17814 else 17815 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17816 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17817 17818 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17819 mod_phy_reg(pi, 0x222, (0xff << 0), 17820 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17821 else if (NREV_GT(pi->pubpi.phy_rev, 1)) 17822 mod_phy_reg(pi, 0x222, (0xff << 0), 17823 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17824 17825 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17826 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17827 17828 write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); 17829 17830 write_phy_reg(pi, 0x1e9, 17831 (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); 17832 17833 write_phy_reg(pi, 0x1ea, 17834 (target_pwr_qtrdbm[0] << 0) | 17835 (target_pwr_qtrdbm[1] << 8)); 17836 17837 tbl_len = 64; 17838 tbl_offset = 0; 17839 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 17840 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 17841 17842 for (idx = 0; idx < tbl_len; idx++) { 17843 num = 8 * 17844 (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); 17845 den = 32768 + a1[tbl_id - 26] * idx; 17846 pwr_est = max(((4 * num + den / 2) / den), -8); 17847 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17848 if (idx <= 17849 (uint) (31 - idle_tssi[tbl_id - 26] + 1)) 17850 pwr_est = 17851 max(pwr_est, 17852 target_pwr_qtrdbm 17853 [tbl_id - 26] + 1); 17854 } 17855 regval[idx] = (u32) pwr_est; 17856 } 17857 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 17858 regval); 17859 } 17860 17861 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 17862 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, 17863 pi->adj_pwr_tbl_nphy); 17864 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, 17865 pi->adj_pwr_tbl_nphy); 17866 17867 if (pi->phyhang_avoid) 17868 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17869 } 17870 17871 static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi) 17872 { 17873 u32 *tx_pwrctrl_tbl = NULL; 17874 17875 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17876 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17877 if ((pi->pubpi.radiorev == 4) 17878 || (pi->pubpi.radiorev == 6)) 17879 tx_pwrctrl_tbl = 17880 nphy_tpc_txgain_ipa_2g_2057rev4n6; 17881 else if (pi->pubpi.radiorev == 3) 17882 tx_pwrctrl_tbl = 17883 nphy_tpc_txgain_ipa_2g_2057rev3; 17884 else if (pi->pubpi.radiorev == 5) 17885 tx_pwrctrl_tbl = 17886 nphy_tpc_txgain_ipa_2g_2057rev5; 17887 else if ((pi->pubpi.radiorev == 7) 17888 || (pi->pubpi.radiorev == 8)) 17889 tx_pwrctrl_tbl = 17890 nphy_tpc_txgain_ipa_2g_2057rev7; 17891 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 17892 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; 17893 if (pi->sh->chip == BCMA_CHIP_ID_BCM47162) 17894 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17895 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 17896 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17897 } else { 17898 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; 17899 } 17900 } else { 17901 17902 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17903 if ((pi->pubpi.radiorev == 3) || 17904 (pi->pubpi.radiorev == 4) || 17905 (pi->pubpi.radiorev == 6)) 17906 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; 17907 else if ((pi->pubpi.radiorev == 7) 17908 || (pi->pubpi.radiorev == 8)) 17909 tx_pwrctrl_tbl = 17910 nphy_tpc_txgain_ipa_5g_2057rev7; 17911 } else { 17912 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; 17913 } 17914 } 17915 17916 return tx_pwrctrl_tbl; 17917 } 17918 17919 static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi) 17920 { 17921 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17922 if (pi->nphy_rssical_chanspec_2G == 0) 17923 return; 17924 17925 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17926 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17927 RADIO_2057_VCM_MASK, 17928 pi->rssical_cache. 17929 rssical_radio_regs_2G[0]); 17930 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17931 RADIO_2057_VCM_MASK, 17932 pi->rssical_cache. 17933 rssical_radio_regs_2G[1]); 17934 } else { 17935 mod_radio_reg(pi, 17936 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17937 RADIO_2056_VCM_MASK, 17938 pi->rssical_cache. 17939 rssical_radio_regs_2G[0]); 17940 mod_radio_reg(pi, 17941 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17942 RADIO_2056_VCM_MASK, 17943 pi->rssical_cache. 17944 rssical_radio_regs_2G[1]); 17945 } 17946 17947 write_phy_reg(pi, 0x1a6, 17948 pi->rssical_cache.rssical_phyregs_2G[0]); 17949 write_phy_reg(pi, 0x1ac, 17950 pi->rssical_cache.rssical_phyregs_2G[1]); 17951 write_phy_reg(pi, 0x1b2, 17952 pi->rssical_cache.rssical_phyregs_2G[2]); 17953 write_phy_reg(pi, 0x1b8, 17954 pi->rssical_cache.rssical_phyregs_2G[3]); 17955 write_phy_reg(pi, 0x1a4, 17956 pi->rssical_cache.rssical_phyregs_2G[4]); 17957 write_phy_reg(pi, 0x1aa, 17958 pi->rssical_cache.rssical_phyregs_2G[5]); 17959 write_phy_reg(pi, 0x1b0, 17960 pi->rssical_cache.rssical_phyregs_2G[6]); 17961 write_phy_reg(pi, 0x1b6, 17962 pi->rssical_cache.rssical_phyregs_2G[7]); 17963 write_phy_reg(pi, 0x1a5, 17964 pi->rssical_cache.rssical_phyregs_2G[8]); 17965 write_phy_reg(pi, 0x1ab, 17966 pi->rssical_cache.rssical_phyregs_2G[9]); 17967 write_phy_reg(pi, 0x1b1, 17968 pi->rssical_cache.rssical_phyregs_2G[10]); 17969 write_phy_reg(pi, 0x1b7, 17970 pi->rssical_cache.rssical_phyregs_2G[11]); 17971 17972 } else { 17973 if (pi->nphy_rssical_chanspec_5G == 0) 17974 return; 17975 17976 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17977 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17978 RADIO_2057_VCM_MASK, 17979 pi->rssical_cache. 17980 rssical_radio_regs_5G[0]); 17981 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17982 RADIO_2057_VCM_MASK, 17983 pi->rssical_cache. 17984 rssical_radio_regs_5G[1]); 17985 } else { 17986 mod_radio_reg(pi, 17987 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17988 RADIO_2056_VCM_MASK, 17989 pi->rssical_cache. 17990 rssical_radio_regs_5G[0]); 17991 mod_radio_reg(pi, 17992 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17993 RADIO_2056_VCM_MASK, 17994 pi->rssical_cache. 17995 rssical_radio_regs_5G[1]); 17996 } 17997 17998 write_phy_reg(pi, 0x1a6, 17999 pi->rssical_cache.rssical_phyregs_5G[0]); 18000 write_phy_reg(pi, 0x1ac, 18001 pi->rssical_cache.rssical_phyregs_5G[1]); 18002 write_phy_reg(pi, 0x1b2, 18003 pi->rssical_cache.rssical_phyregs_5G[2]); 18004 write_phy_reg(pi, 0x1b8, 18005 pi->rssical_cache.rssical_phyregs_5G[3]); 18006 write_phy_reg(pi, 0x1a4, 18007 pi->rssical_cache.rssical_phyregs_5G[4]); 18008 write_phy_reg(pi, 0x1aa, 18009 pi->rssical_cache.rssical_phyregs_5G[5]); 18010 write_phy_reg(pi, 0x1b0, 18011 pi->rssical_cache.rssical_phyregs_5G[6]); 18012 write_phy_reg(pi, 0x1b6, 18013 pi->rssical_cache.rssical_phyregs_5G[7]); 18014 write_phy_reg(pi, 0x1a5, 18015 pi->rssical_cache.rssical_phyregs_5G[8]); 18016 write_phy_reg(pi, 0x1ab, 18017 pi->rssical_cache.rssical_phyregs_5G[9]); 18018 write_phy_reg(pi, 0x1b1, 18019 pi->rssical_cache.rssical_phyregs_5G[10]); 18020 write_phy_reg(pi, 0x1b7, 18021 pi->rssical_cache.rssical_phyregs_5G[11]); 18022 } 18023 } 18024 18025 static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi) 18026 { 18027 u16 txcal_gain[2]; 18028 18029 pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; 18030 pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; 18031 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 18032 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 18033 18034 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 18035 txcal_gain); 18036 18037 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18038 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; 18039 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; 18040 } else { 18041 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; 18042 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; 18043 } 18044 18045 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 18046 txcal_gain); 18047 } 18048 18049 static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi) 18050 { 18051 bool save_bbmult = false; 18052 u8 txcal_index_2057_rev5n7 = 0; 18053 u8 txcal_index_2057_rev3n4n6 = 10; 18054 18055 if (pi->use_int_tx_iqlo_cal_nphy) { 18056 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18057 if ((pi->pubpi.radiorev == 3) || 18058 (pi->pubpi.radiorev == 4) || 18059 (pi->pubpi.radiorev == 6)) { 18060 18061 pi->nphy_txcal_pwr_idx[0] = 18062 txcal_index_2057_rev3n4n6; 18063 pi->nphy_txcal_pwr_idx[1] = 18064 txcal_index_2057_rev3n4n6; 18065 wlc_phy_txpwr_index_nphy( 18066 pi, 3, 18067 txcal_index_2057_rev3n4n6, 18068 false); 18069 } else { 18070 18071 pi->nphy_txcal_pwr_idx[0] = 18072 txcal_index_2057_rev5n7; 18073 pi->nphy_txcal_pwr_idx[1] = 18074 txcal_index_2057_rev5n7; 18075 wlc_phy_txpwr_index_nphy( 18076 pi, 3, 18077 txcal_index_2057_rev5n7, 18078 false); 18079 } 18080 save_bbmult = true; 18081 18082 } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { 18083 wlc_phy_cal_txgainctrl_nphy(pi, 11, false); 18084 if (pi->sh->hw_phytxchain != 3) { 18085 pi->nphy_txcal_pwr_idx[1] = 18086 pi->nphy_txcal_pwr_idx[0]; 18087 wlc_phy_txpwr_index_nphy(pi, 3, 18088 pi-> 18089 nphy_txcal_pwr_idx[0], 18090 true); 18091 save_bbmult = true; 18092 } 18093 18094 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 18095 if (PHY_IPA(pi)) { 18096 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18097 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18098 false); 18099 } else { 18100 pi->nphy_txcal_pwr_idx[0] = 80; 18101 pi->nphy_txcal_pwr_idx[1] = 80; 18102 wlc_phy_txpwr_index_nphy(pi, 3, 80, 18103 false); 18104 save_bbmult = true; 18105 } 18106 } else { 18107 wlc_phy_internal_cal_txgain_nphy(pi); 18108 save_bbmult = true; 18109 } 18110 18111 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 18112 if (PHY_IPA(pi)) { 18113 if (CHSPEC_IS2G(pi->radio_chanspec)) 18114 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18115 false); 18116 else 18117 wlc_phy_cal_txgainctrl_nphy(pi, 14, 18118 false); 18119 } else { 18120 wlc_phy_internal_cal_txgain_nphy(pi); 18121 save_bbmult = true; 18122 } 18123 } 18124 18125 } else { 18126 wlc_phy_cal_txgainctrl_nphy(pi, 10, false); 18127 } 18128 18129 if (save_bbmult) 18130 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 18131 &pi->nphy_txcal_bbmult); 18132 } 18133 18134 static void 18135 wlc_phy_rfctrlintc_override_nphy(struct brcms_phy *pi, u8 field, u16 value, 18136 u8 core_code) 18137 { 18138 u16 mask; 18139 u16 val; 18140 u8 core; 18141 18142 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18143 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18144 if (core_code == RADIO_MIMO_CORESEL_CORE1 18145 && core == PHY_CORE_1) 18146 continue; 18147 else if (core_code == RADIO_MIMO_CORESEL_CORE2 18148 && core == PHY_CORE_0) 18149 continue; 18150 18151 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 18152 18153 mask = (0x1 << 10); 18154 val = 1 << 10; 18155 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18156 0x92, mask, val); 18157 } 18158 18159 if (field == NPHY_RfctrlIntc_override_OFF) { 18160 18161 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18162 0x92, 0); 18163 18164 wlc_phy_force_rfseq_nphy(pi, 18165 NPHY_RFSEQ_RESET2RX); 18166 } else if (field == NPHY_RfctrlIntc_override_TRSW) { 18167 18168 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18169 18170 mask = (0x1 << 6) | (0x1 << 7); 18171 18172 val = value << 6; 18173 mod_phy_reg(pi, 18174 (core == 18175 PHY_CORE_0) ? 0x91 : 0x92, 18176 mask, val); 18177 18178 or_phy_reg(pi, 18179 (core == 18180 PHY_CORE_0) ? 0x91 : 0x92, 18181 (0x1 << 10)); 18182 18183 and_phy_reg(pi, 0x2ff, (u16) 18184 ~(0x3 << 14)); 18185 or_phy_reg(pi, 0x2ff, (0x1 << 13)); 18186 or_phy_reg(pi, 0x2ff, (0x1 << 0)); 18187 } else { 18188 18189 mask = (0x1 << 6) | 18190 (0x1 << 7) | 18191 (0x1 << 8) | (0x1 << 9); 18192 val = value << 6; 18193 mod_phy_reg(pi, 18194 (core == 18195 PHY_CORE_0) ? 0x91 : 0x92, 18196 mask, val); 18197 18198 mask = (0x1 << 0); 18199 val = 1 << 0; 18200 mod_phy_reg(pi, 18201 (core == 18202 PHY_CORE_0) ? 0xe7 : 0xec, 18203 mask, val); 18204 18205 mask = (core == PHY_CORE_0) ? 18206 (0x1 << 0) : (0x1 << 1); 18207 val = 1 << ((core == PHY_CORE_0) ? 18208 0 : 1); 18209 mod_phy_reg(pi, 0x78, mask, val); 18210 18211 SPINWAIT(((read_phy_reg(pi, 0x78) & val) 18212 != 0), 10000); 18213 if (WARN(read_phy_reg(pi, 0x78) & val, 18214 "HW error: override failed")) 18215 return; 18216 18217 mask = (0x1 << 0); 18218 val = 0 << 0; 18219 mod_phy_reg(pi, 18220 (core == 18221 PHY_CORE_0) ? 0xe7 : 0xec, 18222 mask, val); 18223 } 18224 } else if (field == NPHY_RfctrlIntc_override_PA) { 18225 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18226 18227 mask = (0x1 << 4) | (0x1 << 5); 18228 18229 if (CHSPEC_IS5G(pi->radio_chanspec)) 18230 val = value << 5; 18231 else 18232 val = value << 4; 18233 18234 mod_phy_reg(pi, 18235 (core == 18236 PHY_CORE_0) ? 0x91 : 0x92, 18237 mask, val); 18238 18239 or_phy_reg(pi, 18240 (core == 18241 PHY_CORE_0) ? 0x91 : 0x92, 18242 (0x1 << 12)); 18243 } else { 18244 18245 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18246 mask = (0x1 << 5); 18247 val = value << 5; 18248 } else { 18249 mask = (0x1 << 4); 18250 val = value << 4; 18251 } 18252 mod_phy_reg(pi, 18253 (core == 18254 PHY_CORE_0) ? 0x91 : 0x92, 18255 mask, val); 18256 } 18257 } else if (field == 18258 NPHY_RfctrlIntc_override_EXT_LNA_PU) { 18259 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18260 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18261 18262 mask = (0x1 << 0); 18263 val = value << 0; 18264 mod_phy_reg(pi, 18265 (core == 18266 PHY_CORE_0) ? 0x91 18267 : 0x92, mask, val); 18268 18269 mask = (0x1 << 2); 18270 mod_phy_reg(pi, 18271 (core == 18272 PHY_CORE_0) ? 0x91 18273 : 0x92, mask, 0); 18274 } else { 18275 18276 mask = (0x1 << 2); 18277 val = value << 2; 18278 mod_phy_reg(pi, 18279 (core == 18280 PHY_CORE_0) ? 0x91 18281 : 0x92, mask, val); 18282 18283 mask = (0x1 << 0); 18284 mod_phy_reg(pi, 18285 (core == 18286 PHY_CORE_0) ? 0x91 18287 : 0x92, mask, 0); 18288 } 18289 18290 mask = (0x1 << 11); 18291 val = 1 << 11; 18292 mod_phy_reg(pi, 18293 (core == 18294 PHY_CORE_0) ? 0x91 : 0x92, 18295 mask, val); 18296 } else { 18297 18298 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18299 mask = (0x1 << 0); 18300 val = value << 0; 18301 } else { 18302 mask = (0x1 << 2); 18303 val = value << 2; 18304 } 18305 mod_phy_reg(pi, 18306 (core == 18307 PHY_CORE_0) ? 0x91 : 0x92, 18308 mask, val); 18309 } 18310 } else if (field == 18311 NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { 18312 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18313 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18314 18315 mask = (0x1 << 1); 18316 val = value << 1; 18317 mod_phy_reg(pi, 18318 (core == 18319 PHY_CORE_0) ? 0x91 18320 : 0x92, mask, val); 18321 18322 mask = (0x1 << 3); 18323 mod_phy_reg(pi, 18324 (core == 18325 PHY_CORE_0) ? 0x91 18326 : 0x92, mask, 0); 18327 } else { 18328 18329 mask = (0x1 << 3); 18330 val = value << 3; 18331 mod_phy_reg(pi, 18332 (core == 18333 PHY_CORE_0) ? 0x91 18334 : 0x92, mask, val); 18335 18336 mask = (0x1 << 1); 18337 mod_phy_reg(pi, 18338 (core == 18339 PHY_CORE_0) ? 0x91 18340 : 0x92, mask, 0); 18341 } 18342 18343 mask = (0x1 << 11); 18344 val = 1 << 11; 18345 mod_phy_reg(pi, 18346 (core == 18347 PHY_CORE_0) ? 0x91 : 0x92, 18348 mask, val); 18349 } else { 18350 18351 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18352 mask = (0x1 << 1); 18353 val = value << 1; 18354 } else { 18355 mask = (0x1 << 3); 18356 val = value << 3; 18357 } 18358 mod_phy_reg(pi, 18359 (core == 18360 PHY_CORE_0) ? 0x91 : 0x92, 18361 mask, val); 18362 } 18363 } 18364 } 18365 } 18366 } 18367 18368 void 18369 wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, s32 dBm_targetpower, 18370 bool debug) 18371 { 18372 int gainctrl_loopidx; 18373 uint core; 18374 u16 m0m1, curr_m0m1; 18375 s32 delta_power; 18376 s32 txpwrindex; 18377 s32 qdBm_power[2]; 18378 u16 orig_BBConfig; 18379 u16 phy_saveregs[4]; 18380 u32 freq_test; 18381 u16 ampl_test = 250; 18382 uint stepsize; 18383 bool phyhang_avoid_state = false; 18384 18385 if (NREV_GE(pi->pubpi.phy_rev, 7)) 18386 stepsize = 2; 18387 else 18388 stepsize = 1; 18389 18390 if (CHSPEC_IS40(pi->radio_chanspec)) 18391 freq_test = 5000; 18392 else 18393 freq_test = 2500; 18394 18395 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 18396 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 18397 18398 if (pi->phyhang_avoid) 18399 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18400 18401 phyhang_avoid_state = pi->phyhang_avoid; 18402 pi->phyhang_avoid = false; 18403 18404 phy_saveregs[0] = read_phy_reg(pi, 0x91); 18405 phy_saveregs[1] = read_phy_reg(pi, 0x92); 18406 phy_saveregs[2] = read_phy_reg(pi, 0xe7); 18407 phy_saveregs[3] = read_phy_reg(pi, 0xec); 18408 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, 18409 RADIO_MIMO_CORESEL_CORE1 | 18410 RADIO_MIMO_CORESEL_CORE2); 18411 18412 if (!debug) { 18413 wlc_phy_rfctrlintc_override_nphy(pi, 18414 NPHY_RfctrlIntc_override_TRSW, 18415 0x2, RADIO_MIMO_CORESEL_CORE1); 18416 wlc_phy_rfctrlintc_override_nphy(pi, 18417 NPHY_RfctrlIntc_override_TRSW, 18418 0x8, RADIO_MIMO_CORESEL_CORE2); 18419 } else { 18420 wlc_phy_rfctrlintc_override_nphy(pi, 18421 NPHY_RfctrlIntc_override_TRSW, 18422 0x1, RADIO_MIMO_CORESEL_CORE1); 18423 wlc_phy_rfctrlintc_override_nphy(pi, 18424 NPHY_RfctrlIntc_override_TRSW, 18425 0x7, RADIO_MIMO_CORESEL_CORE2); 18426 } 18427 18428 orig_BBConfig = read_phy_reg(pi, 0x01); 18429 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 18430 18431 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 18432 18433 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18434 txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; 18435 18436 for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; 18437 gainctrl_loopidx++) { 18438 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18439 false); 18440 18441 if (core == PHY_CORE_0) 18442 curr_m0m1 = m0m1 & 0xff00; 18443 else 18444 curr_m0m1 = m0m1 & 0x00ff; 18445 18446 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); 18447 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); 18448 18449 udelay(50); 18450 18451 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18452 NPHY_CAL_TSSISAMPS); 18453 18454 pi->nphy_bb_mult_save = 0; 18455 wlc_phy_stopplayback_nphy(pi); 18456 18457 delta_power = (dBm_targetpower * 4) - qdBm_power[core]; 18458 18459 txpwrindex -= stepsize * delta_power; 18460 if (txpwrindex < 0) 18461 txpwrindex = 0; 18462 else if (txpwrindex > 127) 18463 txpwrindex = 127; 18464 18465 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18466 if (NREV_IS(pi->pubpi.phy_rev, 4) && 18467 (pi->srom_fem5g.extpagain == 3)) { 18468 if (txpwrindex < 30) 18469 txpwrindex = 30; 18470 } 18471 } else { 18472 if (NREV_GE(pi->pubpi.phy_rev, 5) && 18473 (pi->srom_fem2g.extpagain == 3)) { 18474 if (txpwrindex < 50) 18475 txpwrindex = 50; 18476 } 18477 } 18478 18479 wlc_phy_txpwr_index_nphy(pi, (1 << core), 18480 (u8) txpwrindex, true); 18481 } 18482 18483 pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; 18484 18485 if (debug) { 18486 u16 radio_gain; 18487 u16 dbg_m0m1; 18488 18489 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18490 18491 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18492 false); 18493 18494 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18495 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); 18496 18497 udelay(100); 18498 18499 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18500 NPHY_CAL_TSSISAMPS); 18501 18502 wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, 18503 &radio_gain); 18504 18505 mdelay(4000); 18506 pi->nphy_bb_mult_save = 0; 18507 wlc_phy_stopplayback_nphy(pi); 18508 } 18509 } 18510 18511 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); 18512 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); 18513 18514 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); 18515 18516 write_phy_reg(pi, 0x01, orig_BBConfig); 18517 18518 write_phy_reg(pi, 0x91, phy_saveregs[0]); 18519 write_phy_reg(pi, 0x92, phy_saveregs[1]); 18520 write_phy_reg(pi, 0xe7, phy_saveregs[2]); 18521 write_phy_reg(pi, 0xec, phy_saveregs[3]); 18522 18523 pi->phyhang_avoid = phyhang_avoid_state; 18524 18525 if (pi->phyhang_avoid) 18526 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18527 } 18528 18529 static void wlc_phy_savecal_nphy(struct brcms_phy *pi) 18530 { 18531 void *tbl_ptr; 18532 int coreNum; 18533 u16 *txcal_radio_regs = NULL; 18534 18535 if (pi->phyhang_avoid) 18536 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18537 18538 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18539 18540 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18541 &pi->calibration_cache. 18542 rxcal_coeffs_2G); 18543 18544 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18545 txcal_radio_regs = 18546 pi->calibration_cache.txcal_radio_regs_2G; 18547 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18548 18549 pi->calibration_cache.txcal_radio_regs_2G[0] = 18550 read_radio_reg(pi, 18551 RADIO_2056_TX_LOFT_FINE_I | 18552 RADIO_2056_TX0); 18553 pi->calibration_cache.txcal_radio_regs_2G[1] = 18554 read_radio_reg(pi, 18555 RADIO_2056_TX_LOFT_FINE_Q | 18556 RADIO_2056_TX0); 18557 pi->calibration_cache.txcal_radio_regs_2G[2] = 18558 read_radio_reg(pi, 18559 RADIO_2056_TX_LOFT_FINE_I | 18560 RADIO_2056_TX1); 18561 pi->calibration_cache.txcal_radio_regs_2G[3] = 18562 read_radio_reg(pi, 18563 RADIO_2056_TX_LOFT_FINE_Q | 18564 RADIO_2056_TX1); 18565 18566 pi->calibration_cache.txcal_radio_regs_2G[4] = 18567 read_radio_reg(pi, 18568 RADIO_2056_TX_LOFT_COARSE_I | 18569 RADIO_2056_TX0); 18570 pi->calibration_cache.txcal_radio_regs_2G[5] = 18571 read_radio_reg(pi, 18572 RADIO_2056_TX_LOFT_COARSE_Q | 18573 RADIO_2056_TX0); 18574 pi->calibration_cache.txcal_radio_regs_2G[6] = 18575 read_radio_reg(pi, 18576 RADIO_2056_TX_LOFT_COARSE_I | 18577 RADIO_2056_TX1); 18578 pi->calibration_cache.txcal_radio_regs_2G[7] = 18579 read_radio_reg(pi, 18580 RADIO_2056_TX_LOFT_COARSE_Q | 18581 RADIO_2056_TX1); 18582 } else { 18583 pi->calibration_cache.txcal_radio_regs_2G[0] = 18584 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18585 pi->calibration_cache.txcal_radio_regs_2G[1] = 18586 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18587 pi->calibration_cache.txcal_radio_regs_2G[2] = 18588 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18589 pi->calibration_cache.txcal_radio_regs_2G[3] = 18590 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18591 } 18592 18593 pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; 18594 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18595 } else { 18596 18597 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18598 &pi->calibration_cache. 18599 rxcal_coeffs_5G); 18600 18601 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18602 txcal_radio_regs = 18603 pi->calibration_cache.txcal_radio_regs_5G; 18604 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18605 18606 pi->calibration_cache.txcal_radio_regs_5G[0] = 18607 read_radio_reg(pi, 18608 RADIO_2056_TX_LOFT_FINE_I | 18609 RADIO_2056_TX0); 18610 pi->calibration_cache.txcal_radio_regs_5G[1] = 18611 read_radio_reg(pi, 18612 RADIO_2056_TX_LOFT_FINE_Q | 18613 RADIO_2056_TX0); 18614 pi->calibration_cache.txcal_radio_regs_5G[2] = 18615 read_radio_reg(pi, 18616 RADIO_2056_TX_LOFT_FINE_I | 18617 RADIO_2056_TX1); 18618 pi->calibration_cache.txcal_radio_regs_5G[3] = 18619 read_radio_reg(pi, 18620 RADIO_2056_TX_LOFT_FINE_Q | 18621 RADIO_2056_TX1); 18622 18623 pi->calibration_cache.txcal_radio_regs_5G[4] = 18624 read_radio_reg(pi, 18625 RADIO_2056_TX_LOFT_COARSE_I | 18626 RADIO_2056_TX0); 18627 pi->calibration_cache.txcal_radio_regs_5G[5] = 18628 read_radio_reg(pi, 18629 RADIO_2056_TX_LOFT_COARSE_Q | 18630 RADIO_2056_TX0); 18631 pi->calibration_cache.txcal_radio_regs_5G[6] = 18632 read_radio_reg(pi, 18633 RADIO_2056_TX_LOFT_COARSE_I | 18634 RADIO_2056_TX1); 18635 pi->calibration_cache.txcal_radio_regs_5G[7] = 18636 read_radio_reg(pi, 18637 RADIO_2056_TX_LOFT_COARSE_Q | 18638 RADIO_2056_TX1); 18639 } else { 18640 pi->calibration_cache.txcal_radio_regs_5G[0] = 18641 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18642 pi->calibration_cache.txcal_radio_regs_5G[1] = 18643 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18644 pi->calibration_cache.txcal_radio_regs_5G[2] = 18645 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18646 pi->calibration_cache.txcal_radio_regs_5G[3] = 18647 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18648 } 18649 18650 pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; 18651 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18652 } 18653 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18654 for (coreNum = 0; coreNum <= 1; coreNum++) { 18655 18656 txcal_radio_regs[2 * coreNum] = 18657 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18658 LOFT_FINE_I); 18659 txcal_radio_regs[2 * coreNum + 1] = 18660 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18661 LOFT_FINE_Q); 18662 18663 txcal_radio_regs[2 * coreNum + 4] = 18664 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18665 LOFT_COARSE_I); 18666 txcal_radio_regs[2 * coreNum + 5] = 18667 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18668 LOFT_COARSE_Q); 18669 } 18670 } 18671 18672 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); 18673 18674 if (pi->phyhang_avoid) 18675 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18676 } 18677 18678 static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi) 18679 { 18680 struct nphy_iq_comp tx_comp; 18681 18682 wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, &tx_comp); 18683 18684 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); 18685 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); 18686 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); 18687 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); 18688 } 18689 18690 static void wlc_phy_restorecal_nphy(struct brcms_phy *pi) 18691 { 18692 u16 *loft_comp; 18693 u16 txcal_coeffs_bphy[4]; 18694 u16 *tbl_ptr; 18695 int coreNum; 18696 u16 *txcal_radio_regs = NULL; 18697 18698 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18699 if (pi->nphy_iqcal_chanspec_2G == 0) 18700 return; 18701 18702 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18703 loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; 18704 } else { 18705 if (pi->nphy_iqcal_chanspec_5G == 0) 18706 return; 18707 18708 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18709 loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; 18710 } 18711 18712 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, tbl_ptr); 18713 18714 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18715 txcal_coeffs_bphy[0] = tbl_ptr[0]; 18716 txcal_coeffs_bphy[1] = tbl_ptr[1]; 18717 txcal_coeffs_bphy[2] = tbl_ptr[2]; 18718 txcal_coeffs_bphy[3] = tbl_ptr[3]; 18719 } else { 18720 txcal_coeffs_bphy[0] = 0; 18721 txcal_coeffs_bphy[1] = 0; 18722 txcal_coeffs_bphy[2] = 0; 18723 txcal_coeffs_bphy[3] = 0; 18724 } 18725 18726 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, 18727 txcal_coeffs_bphy); 18728 18729 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); 18730 18731 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); 18732 18733 if (NREV_LT(pi->pubpi.phy_rev, 2)) 18734 wlc_phy_tx_iq_war_nphy(pi); 18735 18736 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18737 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18738 txcal_radio_regs = 18739 pi->calibration_cache.txcal_radio_regs_2G; 18740 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18741 18742 write_radio_reg(pi, 18743 RADIO_2056_TX_LOFT_FINE_I | 18744 RADIO_2056_TX0, 18745 pi->calibration_cache. 18746 txcal_radio_regs_2G[0]); 18747 write_radio_reg(pi, 18748 RADIO_2056_TX_LOFT_FINE_Q | 18749 RADIO_2056_TX0, 18750 pi->calibration_cache. 18751 txcal_radio_regs_2G[1]); 18752 write_radio_reg(pi, 18753 RADIO_2056_TX_LOFT_FINE_I | 18754 RADIO_2056_TX1, 18755 pi->calibration_cache. 18756 txcal_radio_regs_2G[2]); 18757 write_radio_reg(pi, 18758 RADIO_2056_TX_LOFT_FINE_Q | 18759 RADIO_2056_TX1, 18760 pi->calibration_cache. 18761 txcal_radio_regs_2G[3]); 18762 18763 write_radio_reg(pi, 18764 RADIO_2056_TX_LOFT_COARSE_I | 18765 RADIO_2056_TX0, 18766 pi->calibration_cache. 18767 txcal_radio_regs_2G[4]); 18768 write_radio_reg(pi, 18769 RADIO_2056_TX_LOFT_COARSE_Q | 18770 RADIO_2056_TX0, 18771 pi->calibration_cache. 18772 txcal_radio_regs_2G[5]); 18773 write_radio_reg(pi, 18774 RADIO_2056_TX_LOFT_COARSE_I | 18775 RADIO_2056_TX1, 18776 pi->calibration_cache. 18777 txcal_radio_regs_2G[6]); 18778 write_radio_reg(pi, 18779 RADIO_2056_TX_LOFT_COARSE_Q | 18780 RADIO_2056_TX1, 18781 pi->calibration_cache. 18782 txcal_radio_regs_2G[7]); 18783 } else { 18784 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18785 pi->calibration_cache. 18786 txcal_radio_regs_2G[0]); 18787 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18788 pi->calibration_cache. 18789 txcal_radio_regs_2G[1]); 18790 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18791 pi->calibration_cache. 18792 txcal_radio_regs_2G[2]); 18793 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18794 pi->calibration_cache. 18795 txcal_radio_regs_2G[3]); 18796 } 18797 18798 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18799 &pi->calibration_cache. 18800 rxcal_coeffs_2G); 18801 } else { 18802 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18803 txcal_radio_regs = 18804 pi->calibration_cache.txcal_radio_regs_5G; 18805 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18806 18807 write_radio_reg(pi, 18808 RADIO_2056_TX_LOFT_FINE_I | 18809 RADIO_2056_TX0, 18810 pi->calibration_cache. 18811 txcal_radio_regs_5G[0]); 18812 write_radio_reg(pi, 18813 RADIO_2056_TX_LOFT_FINE_Q | 18814 RADIO_2056_TX0, 18815 pi->calibration_cache. 18816 txcal_radio_regs_5G[1]); 18817 write_radio_reg(pi, 18818 RADIO_2056_TX_LOFT_FINE_I | 18819 RADIO_2056_TX1, 18820 pi->calibration_cache. 18821 txcal_radio_regs_5G[2]); 18822 write_radio_reg(pi, 18823 RADIO_2056_TX_LOFT_FINE_Q | 18824 RADIO_2056_TX1, 18825 pi->calibration_cache. 18826 txcal_radio_regs_5G[3]); 18827 18828 write_radio_reg(pi, 18829 RADIO_2056_TX_LOFT_COARSE_I | 18830 RADIO_2056_TX0, 18831 pi->calibration_cache. 18832 txcal_radio_regs_5G[4]); 18833 write_radio_reg(pi, 18834 RADIO_2056_TX_LOFT_COARSE_Q | 18835 RADIO_2056_TX0, 18836 pi->calibration_cache. 18837 txcal_radio_regs_5G[5]); 18838 write_radio_reg(pi, 18839 RADIO_2056_TX_LOFT_COARSE_I | 18840 RADIO_2056_TX1, 18841 pi->calibration_cache. 18842 txcal_radio_regs_5G[6]); 18843 write_radio_reg(pi, 18844 RADIO_2056_TX_LOFT_COARSE_Q | 18845 RADIO_2056_TX1, 18846 pi->calibration_cache. 18847 txcal_radio_regs_5G[7]); 18848 } else { 18849 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18850 pi->calibration_cache. 18851 txcal_radio_regs_5G[0]); 18852 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18853 pi->calibration_cache. 18854 txcal_radio_regs_5G[1]); 18855 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18856 pi->calibration_cache. 18857 txcal_radio_regs_5G[2]); 18858 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18859 pi->calibration_cache. 18860 txcal_radio_regs_5G[3]); 18861 } 18862 18863 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18864 &pi->calibration_cache. 18865 rxcal_coeffs_5G); 18866 } 18867 18868 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18869 for (coreNum = 0; coreNum <= 1; coreNum++) { 18870 18871 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18872 LOFT_FINE_I, 18873 txcal_radio_regs[2 * coreNum]); 18874 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18875 LOFT_FINE_Q, 18876 txcal_radio_regs[2 * coreNum + 1]); 18877 18878 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18879 LOFT_COARSE_I, 18880 txcal_radio_regs[2 * coreNum + 4]); 18881 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18882 LOFT_COARSE_Q, 18883 txcal_radio_regs[2 * coreNum + 5]); 18884 } 18885 } 18886 } 18887 18888 static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi) 18889 { 18890 u32 idx; 18891 u16 iqloCalbuf[7]; 18892 u32 iqcomp, locomp, curr_locomp; 18893 s8 locomp_i, locomp_q; 18894 s8 curr_locomp_i, curr_locomp_q; 18895 u32 tbl_id, tbl_len, tbl_offset; 18896 u32 regval[128]; 18897 18898 if (pi->phyhang_avoid) 18899 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18900 18901 wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); 18902 18903 tbl_len = 128; 18904 tbl_offset = 320; 18905 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18906 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18907 iqcomp = 18908 (tbl_id == 18909 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | 18910 (iqloCalbuf[1] & 0x3ff) 18911 : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | 18912 (iqloCalbuf[3] & 0x3ff); 18913 18914 for (idx = 0; idx < tbl_len; idx++) 18915 regval[idx] = iqcomp; 18916 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18917 regval); 18918 } 18919 18920 tbl_offset = 448; 18921 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18922 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18923 18924 locomp = 18925 (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); 18926 locomp_i = (s8) ((locomp >> 8) & 0xff); 18927 locomp_q = (s8) ((locomp) & 0xff); 18928 for (idx = 0; idx < tbl_len; idx++) { 18929 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18930 curr_locomp_i = locomp_i; 18931 curr_locomp_q = locomp_q; 18932 } else { 18933 curr_locomp_i = (s8) ((locomp_i * 18934 nphy_tpc_loscale[idx] + 18935 128) >> 8); 18936 curr_locomp_q = 18937 (s8) ((locomp_q * 18938 nphy_tpc_loscale[idx] + 18939 128) >> 8); 18940 } 18941 curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); 18942 curr_locomp |= (u32) (curr_locomp_q & 0xff); 18943 regval[idx] = curr_locomp; 18944 } 18945 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18946 regval); 18947 } 18948 18949 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 18950 18951 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); 18952 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); 18953 } 18954 18955 if (pi->phyhang_avoid) 18956 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18957 } 18958 18959 static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi) 18960 { 18961 u8 tx_lpf_bw = 0; 18962 18963 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18964 if (CHSPEC_IS40(pi->radio_chanspec)) 18965 tx_lpf_bw = 3; 18966 else 18967 tx_lpf_bw = 1; 18968 18969 if (PHY_IPA(pi)) { 18970 if (CHSPEC_IS40(pi->radio_chanspec)) 18971 tx_lpf_bw = 5; 18972 else 18973 tx_lpf_bw = 4; 18974 } 18975 18976 write_phy_reg(pi, 0xe8, 18977 (tx_lpf_bw << 0) | 18978 (tx_lpf_bw << 3) | 18979 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18980 18981 if (PHY_IPA(pi)) { 18982 18983 if (CHSPEC_IS40(pi->radio_chanspec)) 18984 tx_lpf_bw = 4; 18985 else 18986 tx_lpf_bw = 1; 18987 18988 write_phy_reg(pi, 0xe9, 18989 (tx_lpf_bw << 0) | 18990 (tx_lpf_bw << 3) | 18991 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18992 } 18993 } 18994 } 18995 18996 static void 18997 wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr) 18998 { 18999 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 19000 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 19001 CHSPEC_IS40(pi->radio_chanspec)) { 19002 if (!pi->nphy_anarxlpf_adjusted) { 19003 write_radio_reg(pi, 19004 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 19005 RADIO_2056_RX0), 19006 ((pi->nphy_rccal_value + 19007 reduction_factr) | 0x80)); 19008 19009 pi->nphy_anarxlpf_adjusted = true; 19010 } 19011 } else { 19012 if (pi->nphy_anarxlpf_adjusted) { 19013 write_radio_reg(pi, 19014 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 19015 RADIO_2056_RX0), 19016 (pi->nphy_rccal_value | 0x80)); 19017 19018 pi->nphy_anarxlpf_adjusted = false; 19019 } 19020 } 19021 } 19022 } 19023 19024 static void 19025 wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, int ntones, 19026 int *tone_id_buf, u32 *noise_var_buf) 19027 { 19028 int i; 19029 u32 offset; 19030 int tone_id; 19031 int tbllen = 19032 CHSPEC_IS40(pi->radio_chanspec) ? 19033 NPHY_NOISEVAR_TBLLEN40 : NPHY_NOISEVAR_TBLLEN20; 19034 19035 if (pi->nphy_noisevars_adjusted) { 19036 for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { 19037 tone_id = pi->nphy_saved_noisevars.tone_id[i]; 19038 offset = (tone_id >= 0) ? 19039 ((tone_id * 19040 2) + 1) : (tbllen + (tone_id * 2) + 1); 19041 wlc_phy_table_write_nphy( 19042 pi, NPHY_TBL_ID_NOISEVAR, 1, 19043 offset, 32, 19044 &pi->nphy_saved_noisevars.min_noise_vars[i]); 19045 } 19046 19047 pi->nphy_saved_noisevars.bufcount = 0; 19048 pi->nphy_noisevars_adjusted = false; 19049 } 19050 19051 if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { 19052 pi->nphy_saved_noisevars.bufcount = 0; 19053 19054 for (i = 0; i < ntones; i++) { 19055 tone_id = tone_id_buf[i]; 19056 offset = (tone_id >= 0) ? 19057 ((tone_id * 2) + 1) : 19058 (tbllen + (tone_id * 2) + 1); 19059 pi->nphy_saved_noisevars.tone_id[i] = tone_id; 19060 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 19061 offset, 32, 19062 &pi->nphy_saved_noisevars. 19063 min_noise_vars[i]); 19064 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 19065 offset, 32, &noise_var_buf[i]); 19066 pi->nphy_saved_noisevars.bufcount++; 19067 } 19068 19069 pi->nphy_noisevars_adjusted = true; 19070 } 19071 } 19072 19073 static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr) 19074 { 19075 u16 regval; 19076 19077 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19078 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 19079 CHSPEC_IS40(pi->radio_chanspec)) { 19080 if (!pi->nphy_crsminpwr_adjusted) { 19081 regval = read_phy_reg(pi, 0x27d); 19082 pi->nphy_crsminpwr[0] = regval & 0xff; 19083 regval &= 0xff00; 19084 regval |= (u16) minpwr; 19085 write_phy_reg(pi, 0x27d, regval); 19086 19087 regval = read_phy_reg(pi, 0x280); 19088 pi->nphy_crsminpwr[1] = regval & 0xff; 19089 regval &= 0xff00; 19090 regval |= (u16) minpwr; 19091 write_phy_reg(pi, 0x280, regval); 19092 19093 regval = read_phy_reg(pi, 0x283); 19094 pi->nphy_crsminpwr[2] = regval & 0xff; 19095 regval &= 0xff00; 19096 regval |= (u16) minpwr; 19097 write_phy_reg(pi, 0x283, regval); 19098 19099 pi->nphy_crsminpwr_adjusted = true; 19100 } 19101 } else { 19102 if (pi->nphy_crsminpwr_adjusted) { 19103 regval = read_phy_reg(pi, 0x27d); 19104 regval &= 0xff00; 19105 regval |= pi->nphy_crsminpwr[0]; 19106 write_phy_reg(pi, 0x27d, regval); 19107 19108 regval = read_phy_reg(pi, 0x280); 19109 regval &= 0xff00; 19110 regval |= pi->nphy_crsminpwr[1]; 19111 write_phy_reg(pi, 0x280, regval); 19112 19113 regval = read_phy_reg(pi, 0x283); 19114 regval &= 0xff00; 19115 regval |= pi->nphy_crsminpwr[2]; 19116 write_phy_reg(pi, 0x283, regval); 19117 19118 pi->nphy_crsminpwr_adjusted = false; 19119 } 19120 } 19121 } 19122 } 19123 19124 static void wlc_phy_spurwar_nphy(struct brcms_phy *pi) 19125 { 19126 u16 cur_channel = 0; 19127 int nphy_adj_tone_id_buf[] = { 57, 58 }; 19128 u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; 19129 bool isAdjustNoiseVar = false; 19130 uint numTonesAdjust = 0; 19131 u32 tempval = 0; 19132 19133 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19134 if (pi->phyhang_avoid) 19135 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19136 19137 cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 19138 19139 if (pi->nphy_gband_spurwar_en) { 19140 19141 wlc_phy_adjust_rx_analpfbw_nphy( 19142 pi, 19143 NPHY_ANARXLPFBW_REDUCTIONFACT); 19144 19145 if (CHSPEC_IS2G(pi->radio_chanspec)) { 19146 if ((cur_channel == 11) 19147 && CHSPEC_IS40(pi->radio_chanspec)) 19148 wlc_phy_adjust_min_noisevar_nphy( 19149 pi, 2, 19150 nphy_adj_tone_id_buf, 19151 nphy_adj_noise_var_buf); 19152 else 19153 wlc_phy_adjust_min_noisevar_nphy(pi, 0, 19154 NULL, 19155 NULL); 19156 } 19157 19158 wlc_phy_adjust_crsminpwr_nphy(pi, 19159 NPHY_ADJUSTED_MINCRSPOWER); 19160 } 19161 19162 if ((pi->nphy_gband_spurwar2_en) 19163 && CHSPEC_IS2G(pi->radio_chanspec)) { 19164 19165 if (CHSPEC_IS40(pi->radio_chanspec)) { 19166 switch (cur_channel) { 19167 case 3: 19168 nphy_adj_tone_id_buf[0] = 57; 19169 nphy_adj_tone_id_buf[1] = 58; 19170 nphy_adj_noise_var_buf[0] = 0x22f; 19171 nphy_adj_noise_var_buf[1] = 0x25f; 19172 isAdjustNoiseVar = true; 19173 break; 19174 case 4: 19175 nphy_adj_tone_id_buf[0] = 41; 19176 nphy_adj_tone_id_buf[1] = 42; 19177 nphy_adj_noise_var_buf[0] = 0x22f; 19178 nphy_adj_noise_var_buf[1] = 0x25f; 19179 isAdjustNoiseVar = true; 19180 break; 19181 case 5: 19182 nphy_adj_tone_id_buf[0] = 25; 19183 nphy_adj_tone_id_buf[1] = 26; 19184 nphy_adj_noise_var_buf[0] = 0x24f; 19185 nphy_adj_noise_var_buf[1] = 0x25f; 19186 isAdjustNoiseVar = true; 19187 break; 19188 case 6: 19189 nphy_adj_tone_id_buf[0] = 9; 19190 nphy_adj_tone_id_buf[1] = 10; 19191 nphy_adj_noise_var_buf[0] = 0x22f; 19192 nphy_adj_noise_var_buf[1] = 0x24f; 19193 isAdjustNoiseVar = true; 19194 break; 19195 case 7: 19196 nphy_adj_tone_id_buf[0] = 121; 19197 nphy_adj_tone_id_buf[1] = 122; 19198 nphy_adj_noise_var_buf[0] = 0x18f; 19199 nphy_adj_noise_var_buf[1] = 0x24f; 19200 isAdjustNoiseVar = true; 19201 break; 19202 case 8: 19203 nphy_adj_tone_id_buf[0] = 105; 19204 nphy_adj_tone_id_buf[1] = 106; 19205 nphy_adj_noise_var_buf[0] = 0x22f; 19206 nphy_adj_noise_var_buf[1] = 0x25f; 19207 isAdjustNoiseVar = true; 19208 break; 19209 case 9: 19210 nphy_adj_tone_id_buf[0] = 89; 19211 nphy_adj_tone_id_buf[1] = 90; 19212 nphy_adj_noise_var_buf[0] = 0x22f; 19213 nphy_adj_noise_var_buf[1] = 0x24f; 19214 isAdjustNoiseVar = true; 19215 break; 19216 case 10: 19217 nphy_adj_tone_id_buf[0] = 73; 19218 nphy_adj_tone_id_buf[1] = 74; 19219 nphy_adj_noise_var_buf[0] = 0x22f; 19220 nphy_adj_noise_var_buf[1] = 0x24f; 19221 isAdjustNoiseVar = true; 19222 break; 19223 default: 19224 isAdjustNoiseVar = false; 19225 break; 19226 } 19227 } 19228 19229 if (isAdjustNoiseVar) { 19230 numTonesAdjust = ARRAY_SIZE(nphy_adj_tone_id_buf); 19231 19232 wlc_phy_adjust_min_noisevar_nphy( 19233 pi, 19234 numTonesAdjust, 19235 nphy_adj_tone_id_buf, 19236 nphy_adj_noise_var_buf); 19237 19238 tempval = 0; 19239 19240 } else { 19241 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19242 NULL); 19243 } 19244 } 19245 19246 if ((pi->nphy_aband_spurwar_en) && 19247 (CHSPEC_IS5G(pi->radio_chanspec))) { 19248 switch (cur_channel) { 19249 case 54: 19250 nphy_adj_tone_id_buf[0] = 32; 19251 nphy_adj_noise_var_buf[0] = 0x25f; 19252 break; 19253 case 38: 19254 case 102: 19255 case 118: 19256 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) && 19257 (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 19258 nphy_adj_tone_id_buf[0] = 32; 19259 nphy_adj_noise_var_buf[0] = 0x21f; 19260 } else { 19261 nphy_adj_tone_id_buf[0] = 0; 19262 nphy_adj_noise_var_buf[0] = 0x0; 19263 } 19264 break; 19265 case 134: 19266 nphy_adj_tone_id_buf[0] = 32; 19267 nphy_adj_noise_var_buf[0] = 0x21f; 19268 break; 19269 case 151: 19270 nphy_adj_tone_id_buf[0] = 16; 19271 nphy_adj_noise_var_buf[0] = 0x23f; 19272 break; 19273 case 153: 19274 case 161: 19275 nphy_adj_tone_id_buf[0] = 48; 19276 nphy_adj_noise_var_buf[0] = 0x23f; 19277 break; 19278 default: 19279 nphy_adj_tone_id_buf[0] = 0; 19280 nphy_adj_noise_var_buf[0] = 0x0; 19281 break; 19282 } 19283 19284 if (nphy_adj_tone_id_buf[0] 19285 && nphy_adj_noise_var_buf[0]) 19286 wlc_phy_adjust_min_noisevar_nphy( 19287 pi, 1, 19288 nphy_adj_tone_id_buf, 19289 nphy_adj_noise_var_buf); 19290 else 19291 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19292 NULL); 19293 } 19294 19295 if (pi->phyhang_avoid) 19296 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19297 } 19298 } 19299 19300 void wlc_phy_init_nphy(struct brcms_phy *pi) 19301 { 19302 u16 val; 19303 u16 clip1_ths[2]; 19304 struct nphy_txgains target_gain; 19305 u8 tx_pwr_ctrl_state; 19306 bool do_nphy_cal = false; 19307 uint core; 19308 u32 d11_clk_ctl_st; 19309 bool do_rssi_cal = false; 19310 19311 core = 0; 19312 19313 if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) 19314 pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; 19315 19316 if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && 19317 ((pi->sh->chippkg == BCMA_PKG_ID_BCM4717) || 19318 (pi->sh->chippkg == BCMA_PKG_ID_BCM4718))) { 19319 if ((pi->sh->boardflags & BFL_EXTLNA) && 19320 (CHSPEC_IS2G(pi->radio_chanspec))) 19321 bcma_cc_set32(&pi->d11core->bus->drv_cc, 19322 BCMA_CC_CHIPCTL, 0x40); 19323 } 19324 19325 if ((!PHY_IPA(pi)) && (pi->sh->chip == BCMA_CHIP_ID_BCM5357)) 19326 bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 1, 19327 ~CCTRL5357_EXTPA, CCTRL5357_EXTPA); 19328 19329 if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && 19330 CHSPEC_IS40(pi->radio_chanspec)) { 19331 19332 d11_clk_ctl_st = bcma_read32(pi->d11core, 19333 D11REGOFFS(clk_ctl_st)); 19334 bcma_mask32(pi->d11core, D11REGOFFS(clk_ctl_st), 19335 ~(CCS_FORCEHT | CCS_HTAREQ)); 19336 19337 bcma_write32(pi->d11core, D11REGOFFS(clk_ctl_st), 19338 d11_clk_ctl_st); 19339 } 19340 19341 pi->use_int_tx_iqlo_cal_nphy = 19342 (PHY_IPA(pi) || 19343 (NREV_GE(pi->pubpi.phy_rev, 7) || 19344 (NREV_GE(pi->pubpi.phy_rev, 5) 19345 && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); 19346 19347 pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; 19348 19349 pi->nphy_deaf_count = 0; 19350 19351 wlc_phy_tbl_init_nphy(pi); 19352 19353 pi->nphy_crsminpwr_adjusted = false; 19354 pi->nphy_noisevars_adjusted = false; 19355 19356 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19357 write_phy_reg(pi, 0xe7, 0); 19358 write_phy_reg(pi, 0xec, 0); 19359 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19360 write_phy_reg(pi, 0x342, 0); 19361 write_phy_reg(pi, 0x343, 0); 19362 write_phy_reg(pi, 0x346, 0); 19363 write_phy_reg(pi, 0x347, 0); 19364 } 19365 write_phy_reg(pi, 0xe5, 0); 19366 write_phy_reg(pi, 0xe6, 0); 19367 } else { 19368 write_phy_reg(pi, 0xec, 0); 19369 } 19370 19371 write_phy_reg(pi, 0x91, 0); 19372 write_phy_reg(pi, 0x92, 0); 19373 if (NREV_LT(pi->pubpi.phy_rev, 6)) { 19374 write_phy_reg(pi, 0x93, 0); 19375 write_phy_reg(pi, 0x94, 0); 19376 } 19377 19378 and_phy_reg(pi, 0xa1, ~3); 19379 19380 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19381 write_phy_reg(pi, 0x8f, 0); 19382 write_phy_reg(pi, 0xa5, 0); 19383 } else { 19384 write_phy_reg(pi, 0xa5, 0); 19385 } 19386 19387 if (NREV_IS(pi->pubpi.phy_rev, 2)) 19388 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 19389 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 19390 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 19391 19392 write_phy_reg(pi, 0x203, 32); 19393 write_phy_reg(pi, 0x201, 32); 19394 19395 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) 19396 write_phy_reg(pi, 0x20d, 160); 19397 else 19398 write_phy_reg(pi, 0x20d, 184); 19399 19400 write_phy_reg(pi, 0x13a, 200); 19401 19402 write_phy_reg(pi, 0x70, 80); 19403 19404 write_phy_reg(pi, 0x1ff, 48); 19405 19406 if (NREV_LT(pi->pubpi.phy_rev, 8)) 19407 wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); 19408 19409 wlc_phy_stf_chain_upd_nphy(pi); 19410 19411 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 19412 write_phy_reg(pi, 0x180, 0xaa8); 19413 write_phy_reg(pi, 0x181, 0x9a4); 19414 } 19415 19416 if (PHY_IPA(pi)) { 19417 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 19418 19419 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 19420 0x29b, (0x1 << 0), (1) << 0); 19421 19422 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : 19423 0x29c, (0x1ff << 7), 19424 (pi->nphy_papd_epsilon_offset[core]) << 7); 19425 19426 } 19427 19428 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 19429 } else if (NREV_GE(pi->pubpi.phy_rev, 5)) { 19430 wlc_phy_extpa_set_tx_digi_filts_nphy(pi); 19431 } 19432 19433 wlc_phy_workarounds_nphy(pi); 19434 19435 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19436 19437 val = read_phy_reg(pi, 0x01); 19438 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19439 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19440 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19441 19442 wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); 19443 19444 wlc_phy_pa_override_nphy(pi, OFF); 19445 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 19446 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19447 wlc_phy_pa_override_nphy(pi, ON); 19448 19449 wlc_phy_classifier_nphy(pi, 0, 0); 19450 wlc_phy_clip_det_nphy(pi, 0, clip1_ths); 19451 19452 if (CHSPEC_IS2G(pi->radio_chanspec)) 19453 wlc_phy_bphy_init_nphy(pi); 19454 19455 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 19456 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 19457 19458 wlc_phy_txpwr_fixpower_nphy(pi); 19459 19460 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 19461 19462 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 19463 19464 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19465 u32 *tx_pwrctrl_tbl = NULL; 19466 u16 idx; 19467 s16 pga_gn = 0; 19468 s16 pad_gn = 0; 19469 s32 rfpwr_offset; 19470 19471 if (PHY_IPA(pi)) { 19472 tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); 19473 } else { 19474 if (CHSPEC_IS5G(pi->radio_chanspec)) { 19475 if (NREV_IS(pi->pubpi.phy_rev, 3)) 19476 tx_pwrctrl_tbl = 19477 nphy_tpc_5GHz_txgain_rev3; 19478 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 19479 tx_pwrctrl_tbl = 19480 (pi->srom_fem5g.extpagain == 19481 3) ? 19482 nphy_tpc_5GHz_txgain_HiPwrEPA : 19483 nphy_tpc_5GHz_txgain_rev4; 19484 else 19485 tx_pwrctrl_tbl = 19486 nphy_tpc_5GHz_txgain_rev5; 19487 } else { 19488 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19489 if (pi->pubpi.radiorev == 5) 19490 tx_pwrctrl_tbl = 19491 nphy_tpc_txgain_epa_2057rev5; 19492 else if (pi->pubpi.radiorev == 3) 19493 tx_pwrctrl_tbl = 19494 nphy_tpc_txgain_epa_2057rev3; 19495 } else { 19496 if (NREV_GE(pi->pubpi.phy_rev, 5) && 19497 (pi->srom_fem2g.extpagain == 3)) 19498 tx_pwrctrl_tbl = 19499 nphy_tpc_txgain_HiPwrEPA; 19500 else 19501 tx_pwrctrl_tbl = 19502 nphy_tpc_txgain_rev3; 19503 } 19504 } 19505 } 19506 19507 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19508 192, 32, tx_pwrctrl_tbl); 19509 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19510 192, 32, tx_pwrctrl_tbl); 19511 19512 pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); 19513 19514 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19515 19516 for (idx = 0; idx < 128; idx++) { 19517 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19518 pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; 19519 rfpwr_offset = get_rf_pwr_offset(pi, pga_gn, 19520 pad_gn); 19521 wlc_phy_table_write_nphy( 19522 pi, 19523 NPHY_TBL_ID_CORE1TXPWRCTL, 19524 1, 576 + idx, 32, 19525 &rfpwr_offset); 19526 wlc_phy_table_write_nphy( 19527 pi, 19528 NPHY_TBL_ID_CORE2TXPWRCTL, 19529 1, 576 + idx, 32, 19530 &rfpwr_offset); 19531 } 19532 } else { 19533 19534 for (idx = 0; idx < 128; idx++) { 19535 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19536 if (CHSPEC_IS2G(pi->radio_chanspec)) 19537 rfpwr_offset = (s16) 19538 nphy_papd_pga_gain_delta_ipa_2g 19539 [pga_gn]; 19540 else 19541 rfpwr_offset = (s16) 19542 nphy_papd_pga_gain_delta_ipa_5g 19543 [pga_gn]; 19544 19545 wlc_phy_table_write_nphy( 19546 pi, 19547 NPHY_TBL_ID_CORE1TXPWRCTL, 19548 1, 576 + idx, 32, 19549 &rfpwr_offset); 19550 wlc_phy_table_write_nphy( 19551 pi, 19552 NPHY_TBL_ID_CORE2TXPWRCTL, 19553 1, 576 + idx, 32, 19554 &rfpwr_offset); 19555 } 19556 19557 } 19558 } else { 19559 19560 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19561 192, 32, nphy_tpc_txgain); 19562 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19563 192, 32, nphy_tpc_txgain); 19564 } 19565 19566 if (pi->sh->phyrxchain != 0x3) 19567 wlc_phy_rxcore_setstate_nphy((struct brcms_phy_pub *) pi, 19568 pi->sh->phyrxchain); 19569 19570 if (PHY_PERICAL_MPHASE_PENDING(pi)) 19571 wlc_phy_cal_perical_mphase_restart(pi); 19572 19573 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19574 do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19575 (pi->nphy_rssical_chanspec_2G == 0) : 19576 (pi->nphy_rssical_chanspec_5G == 0); 19577 19578 if (do_rssi_cal) 19579 wlc_phy_rssi_cal_nphy(pi); 19580 else 19581 wlc_phy_restore_rssical_nphy(pi); 19582 } else { 19583 wlc_phy_rssi_cal_nphy(pi); 19584 } 19585 19586 if (!SCAN_RM_IN_PROGRESS(pi)) 19587 do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19588 (pi->nphy_iqcal_chanspec_2G == 0) : 19589 (pi->nphy_iqcal_chanspec_5G == 0); 19590 19591 if (!pi->do_initcal) 19592 do_nphy_cal = false; 19593 19594 if (do_nphy_cal) { 19595 19596 target_gain = wlc_phy_get_tx_gain_nphy(pi); 19597 19598 if (pi->antsel_type == ANTSEL_2x3) 19599 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, 19600 true); 19601 19602 if (pi->nphy_perical != PHY_PERICAL_MPHASE) { 19603 wlc_phy_rssi_cal_nphy(pi); 19604 19605 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19606 pi->nphy_cal_orig_pwr_idx[0] = 19607 pi->nphy_txpwrindex[PHY_CORE_0] 19608 . 19609 index_internal; 19610 pi->nphy_cal_orig_pwr_idx[1] = 19611 pi->nphy_txpwrindex[PHY_CORE_1] 19612 . 19613 index_internal; 19614 19615 wlc_phy_precal_txgain_nphy(pi); 19616 target_gain = 19617 wlc_phy_get_tx_gain_nphy(pi); 19618 } 19619 19620 if (wlc_phy_cal_txiqlo_nphy 19621 (pi, target_gain, true, 19622 false) == 0) { 19623 if (wlc_phy_cal_rxiq_nphy 19624 (pi, target_gain, 2, 19625 false) == 0) 19626 wlc_phy_savecal_nphy(pi); 19627 19628 } 19629 } else if (pi->mphase_cal_phase_id == 19630 MPHASE_CAL_STATE_IDLE) { 19631 wlc_phy_cal_perical((struct brcms_phy_pub *) pi, 19632 PHY_PERICAL_PHYINIT); 19633 } 19634 } else { 19635 wlc_phy_restorecal_nphy(pi); 19636 } 19637 19638 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 19639 19640 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 19641 19642 wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); 19643 19644 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) 19645 19646 write_phy_reg(pi, 0x70, 50); 19647 19648 wlc_phy_txlpfbw_nphy(pi); 19649 19650 wlc_phy_spurwar_nphy(pi); 19651 19652 } 19653 19654 static void wlc_phy_resetcca_nphy(struct brcms_phy *pi) 19655 { 19656 u16 val; 19657 19658 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19659 19660 val = read_phy_reg(pi, 0x01); 19661 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19662 udelay(1); 19663 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19664 19665 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19666 19667 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19668 } 19669 19670 void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) 19671 { 19672 u16 rfctrlintc_override_val; 19673 19674 if (!en) { 19675 19676 pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); 19677 pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); 19678 19679 if (NREV_GE(pi->pubpi.phy_rev, 7)) 19680 rfctrlintc_override_val = 0x1480; 19681 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 19682 rfctrlintc_override_val = 19683 CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; 19684 else 19685 rfctrlintc_override_val = 19686 CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 19687 19688 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 19689 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 19690 } else { 19691 write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); 19692 write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); 19693 } 19694 19695 } 19696 19697 void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi) 19698 { 19699 19700 u16 txrx_chain = 19701 (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); 19702 bool CoreActv_override = false; 19703 19704 if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN0) { 19705 txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; 19706 CoreActv_override = true; 19707 19708 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19709 and_phy_reg(pi, 0xa0, ~0x20); 19710 } else if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN1) { 19711 txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; 19712 CoreActv_override = true; 19713 19714 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19715 or_phy_reg(pi, 0xa0, 0x20); 19716 } 19717 19718 mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); 19719 19720 if (CoreActv_override) { 19721 pi->nphy_perical = PHY_PERICAL_DISABLE; 19722 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 19723 } else { 19724 pi->nphy_perical = PHY_PERICAL_MPHASE; 19725 and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); 19726 } 19727 } 19728 19729 void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, u8 rxcore_bitmask) 19730 { 19731 u16 regval; 19732 u16 tbl_buf[16]; 19733 uint i; 19734 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19735 u16 tbl_opcode; 19736 bool suspend; 19737 19738 pi->sh->phyrxchain = rxcore_bitmask; 19739 19740 if (!pi->sh->clk) 19741 return; 19742 19743 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 19744 MCTL_EN_MAC)); 19745 if (!suspend) 19746 wlapi_suspend_mac_and_wait(pi->sh->physhim); 19747 19748 if (pi->phyhang_avoid) 19749 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19750 19751 regval = read_phy_reg(pi, 0xa2); 19752 regval &= ~(0xf << 4); 19753 regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; 19754 write_phy_reg(pi, 0xa2, regval); 19755 19756 if ((rxcore_bitmask & 0x3) != 0x3) { 19757 19758 write_phy_reg(pi, 0x20e, 1); 19759 19760 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19761 if (pi->rx2tx_biasentry == -1) { 19762 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 19763 ARRAY_SIZE(tbl_buf), 80, 19764 16, tbl_buf); 19765 19766 for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { 19767 if (tbl_buf[i] == 19768 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { 19769 pi->rx2tx_biasentry = (u8) i; 19770 tbl_opcode = 19771 NPHY_REV3_RFSEQ_CMD_NOP; 19772 wlc_phy_table_write_nphy( 19773 pi, 19774 NPHY_TBL_ID_RFSEQ, 19775 1, i, 19776 16, 19777 &tbl_opcode); 19778 break; 19779 } else if (tbl_buf[i] == 19780 NPHY_REV3_RFSEQ_CMD_END) 19781 break; 19782 } 19783 } 19784 } 19785 } else { 19786 19787 write_phy_reg(pi, 0x20e, 30); 19788 19789 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19790 if (pi->rx2tx_biasentry != -1) { 19791 tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; 19792 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 19793 1, pi->rx2tx_biasentry, 19794 16, &tbl_opcode); 19795 pi->rx2tx_biasentry = -1; 19796 } 19797 } 19798 } 19799 19800 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19801 19802 if (pi->phyhang_avoid) 19803 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19804 19805 if (!suspend) 19806 wlapi_enable_mac(pi->sh->physhim); 19807 } 19808 19809 u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih) 19810 { 19811 u16 regval, rxen_bits; 19812 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19813 19814 regval = read_phy_reg(pi, 0xa2); 19815 rxen_bits = (regval >> 4) & 0xf; 19816 19817 return (u8) rxen_bits; 19818 } 19819 19820 bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pi) 19821 { 19822 return PHY_IPA(pi); 19823 } 19824 19825 void wlc_phy_cal_init_nphy(struct brcms_phy *pi) 19826 { 19827 } 19828 19829 static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi) 19830 { 19831 19832 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 19833 and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); 19834 19835 or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); 19836 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); 19837 19838 } 19839 19840 static void wlc_phy_radio_init_2057(struct brcms_phy *pi) 19841 { 19842 struct radio_20xx_regs *regs_2057_ptr = NULL; 19843 19844 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 19845 regs_2057_ptr = regs_2057_rev4; 19846 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 19847 || NREV_IS(pi->pubpi.phy_rev, 9)) { 19848 switch (pi->pubpi.radiorev) { 19849 case 5: 19850 19851 if (NREV_IS(pi->pubpi.phy_rev, 8)) 19852 regs_2057_ptr = regs_2057_rev5; 19853 else if (NREV_IS(pi->pubpi.phy_rev, 9)) 19854 regs_2057_ptr = regs_2057_rev5v1; 19855 break; 19856 19857 case 7: 19858 19859 regs_2057_ptr = regs_2057_rev7; 19860 break; 19861 19862 case 8: 19863 19864 regs_2057_ptr = regs_2057_rev8; 19865 break; 19866 19867 default: 19868 break; 19869 } 19870 } 19871 19872 wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); 19873 } 19874 19875 static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi) 19876 { 19877 u16 rcal_reg = 0; 19878 int i; 19879 19880 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19881 19882 if (pi->pubpi.radiorev == 5) { 19883 19884 and_phy_reg(pi, 0x342, ~(0x1 << 1)); 19885 19886 udelay(10); 19887 19888 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); 19889 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19890 0x1); 19891 } 19892 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); 19893 19894 udelay(10); 19895 19896 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); 19897 19898 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19899 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); 19900 if (rcal_reg & 0x1) 19901 break; 19902 19903 udelay(100); 19904 } 19905 19906 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19907 "HW error: radio calib2")) 19908 return 0; 19909 19910 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); 19911 19912 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; 19913 19914 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); 19915 if (pi->pubpi.radiorev == 5) { 19916 19917 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); 19918 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19919 0x0); 19920 } 19921 19922 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 19923 19924 mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, 19925 rcal_reg); 19926 mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, 19927 rcal_reg << 2); 19928 } 19929 19930 } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19931 u16 savereg; 19932 19933 savereg = 19934 read_radio_reg( 19935 pi, 19936 RADIO_2056_SYN_PLL_MAST2 | 19937 RADIO_2056_SYN); 19938 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19939 savereg | 0x7); 19940 udelay(10); 19941 19942 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19943 0x1); 19944 udelay(10); 19945 19946 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19947 0x9); 19948 19949 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19950 rcal_reg = read_radio_reg( 19951 pi, 19952 RADIO_2056_SYN_RCAL_CODE_OUT | 19953 RADIO_2056_SYN); 19954 if (rcal_reg & 0x80) 19955 break; 19956 19957 udelay(100); 19958 } 19959 19960 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19961 "HW error: radio calib3")) 19962 return 0; 19963 19964 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19965 0x1); 19966 19967 rcal_reg = 19968 read_radio_reg(pi, 19969 RADIO_2056_SYN_RCAL_CODE_OUT | 19970 RADIO_2056_SYN); 19971 19972 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19973 0x0); 19974 19975 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19976 savereg); 19977 19978 return rcal_reg & 0x1f; 19979 } 19980 return rcal_reg & 0x3e; 19981 } 19982 19983 static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi) 19984 { 19985 u16 rccal_valid; 19986 int i; 19987 bool chip43226_6362A0; 19988 19989 chip43226_6362A0 = ((pi->pubpi.radiorev == 3) 19990 || (pi->pubpi.radiorev == 4) 19991 || (pi->pubpi.radiorev == 6)); 19992 19993 rccal_valid = 0; 19994 if (chip43226_6362A0) { 19995 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); 19996 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); 19997 } else { 19998 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); 19999 20000 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); 20001 } 20002 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 20003 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 20004 20005 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 20006 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 20007 if (rccal_valid & 0x2) 20008 break; 20009 20010 udelay(500); 20011 } 20012 20013 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 20014 20015 rccal_valid = 0; 20016 if (chip43226_6362A0) { 20017 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); 20018 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 20019 } else { 20020 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); 20021 20022 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); 20023 } 20024 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 20025 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 20026 20027 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 20028 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 20029 if (rccal_valid & 0x2) 20030 break; 20031 20032 udelay(500); 20033 } 20034 20035 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 20036 20037 rccal_valid = 0; 20038 if (chip43226_6362A0) { 20039 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); 20040 20041 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); 20042 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 20043 } else { 20044 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); 20045 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 20046 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); 20047 } 20048 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 20049 20050 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 20051 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 20052 if (rccal_valid & 0x2) 20053 break; 20054 20055 udelay(500); 20056 } 20057 20058 if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) 20059 return 0; 20060 20061 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 20062 20063 return rccal_valid; 20064 } 20065 20066 static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi) 20067 { 20068 20069 mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); 20070 20071 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); 20072 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); 20073 mdelay(2); 20074 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); 20075 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); 20076 20077 if (pi->phy_init_por) { 20078 wlc_phy_radio205x_rcal(pi); 20079 wlc_phy_radio2057_rccal(pi); 20080 } 20081 20082 mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); 20083 } 20084 20085 static void wlc_phy_radio_init_2056(struct brcms_phy *pi) 20086 { 20087 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20088 const struct radio_regs *regs_TX_2056_ptr = NULL; 20089 const struct radio_regs *regs_RX_2056_ptr = NULL; 20090 20091 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20092 regs_SYN_2056_ptr = regs_SYN_2056; 20093 regs_TX_2056_ptr = regs_TX_2056; 20094 regs_RX_2056_ptr = regs_RX_2056; 20095 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20096 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20097 regs_TX_2056_ptr = regs_TX_2056_A1; 20098 regs_RX_2056_ptr = regs_RX_2056_A1; 20099 } else { 20100 switch (pi->pubpi.radiorev) { 20101 case 5: 20102 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20103 regs_TX_2056_ptr = regs_TX_2056_rev5; 20104 regs_RX_2056_ptr = regs_RX_2056_rev5; 20105 break; 20106 20107 case 6: 20108 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20109 regs_TX_2056_ptr = regs_TX_2056_rev6; 20110 regs_RX_2056_ptr = regs_RX_2056_rev6; 20111 break; 20112 20113 case 7: 20114 case 9: 20115 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20116 regs_TX_2056_ptr = regs_TX_2056_rev7; 20117 regs_RX_2056_ptr = regs_RX_2056_rev7; 20118 break; 20119 20120 case 8: 20121 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20122 regs_TX_2056_ptr = regs_TX_2056_rev8; 20123 regs_RX_2056_ptr = regs_RX_2056_rev8; 20124 break; 20125 20126 case 11: 20127 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20128 regs_TX_2056_ptr = regs_TX_2056_rev11; 20129 regs_RX_2056_ptr = regs_RX_2056_rev11; 20130 break; 20131 20132 default: 20133 break; 20134 } 20135 } 20136 20137 wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); 20138 20139 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); 20140 20141 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); 20142 20143 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); 20144 20145 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); 20146 } 20147 20148 static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi) 20149 { 20150 mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); 20151 20152 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); 20153 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); 20154 udelay(1000); 20155 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); 20156 20157 if ((pi->sh->boardflags2 & BFL2_LEGACY) 20158 || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) 20159 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); 20160 else 20161 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); 20162 20163 mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); 20164 20165 if (pi->phy_init_por) 20166 wlc_phy_radio205x_rcal(pi); 20167 } 20168 20169 static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi) 20170 { 20171 20172 and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); 20173 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); 20174 20175 or_phy_reg(pi, 0x78, RFCC_POR_FORCE); 20176 } 20177 20178 static void wlc_phy_radio_init_2055(struct brcms_phy *pi) 20179 { 20180 wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); 20181 } 20182 20183 static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi) 20184 { 20185 20186 and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 20187 ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); 20188 20189 if (((pi->sh->sromrev >= 4) 20190 && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) 20191 || ((pi->sh->sromrev < 4))) { 20192 and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); 20193 and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); 20194 } 20195 20196 mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); 20197 write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); 20198 20199 and_radio_reg(pi, RADIO_2055_CAL_MISC, 20200 ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); 20201 20202 or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); 20203 20204 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); 20205 20206 udelay(1000); 20207 20208 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); 20209 20210 SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20211 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); 20212 20213 if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20214 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, 20215 "HW error: radio calibration1\n")) 20216 return; 20217 20218 and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, 20219 ~(RADIO_2055_CAL_LPO_ENABLE)); 20220 20221 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); 20222 20223 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); 20224 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); 20225 20226 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); 20227 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); 20228 20229 mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, 20230 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20231 mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, 20232 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20233 if (pi->nphy_gain_boost) { 20234 and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20235 ~(RADIO_2055_GAINBST_DISABLE)); 20236 and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20237 ~(RADIO_2055_GAINBST_DISABLE)); 20238 } else { 20239 or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20240 RADIO_2055_GAINBST_DISABLE); 20241 or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20242 RADIO_2055_GAINBST_DISABLE); 20243 } 20244 20245 udelay(2); 20246 } 20247 20248 void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on) 20249 { 20250 if (on) { 20251 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20252 if (!pi->radio_is_on) { 20253 wlc_phy_radio_preinit_205x(pi); 20254 wlc_phy_radio_init_2057(pi); 20255 wlc_phy_radio_postinit_2057(pi); 20256 } 20257 20258 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20259 pi->radio_chanspec); 20260 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20261 wlc_phy_radio_preinit_205x(pi); 20262 wlc_phy_radio_init_2056(pi); 20263 wlc_phy_radio_postinit_2056(pi); 20264 20265 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20266 pi->radio_chanspec); 20267 } else { 20268 wlc_phy_radio_preinit_2055(pi); 20269 wlc_phy_radio_init_2055(pi); 20270 wlc_phy_radio_postinit_2055(pi); 20271 } 20272 20273 pi->radio_is_on = true; 20274 20275 } else { 20276 20277 if (NREV_GE(pi->pubpi.phy_rev, 3) 20278 && NREV_LT(pi->pubpi.phy_rev, 7)) { 20279 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20280 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); 20281 20282 write_radio_reg(pi, 20283 RADIO_2056_TX_PADA_BOOST_TUNE | 20284 RADIO_2056_TX0, 0); 20285 write_radio_reg(pi, 20286 RADIO_2056_TX_PADG_BOOST_TUNE | 20287 RADIO_2056_TX0, 0); 20288 write_radio_reg(pi, 20289 RADIO_2056_TX_PGAA_BOOST_TUNE | 20290 RADIO_2056_TX0, 0); 20291 write_radio_reg(pi, 20292 RADIO_2056_TX_PGAG_BOOST_TUNE | 20293 RADIO_2056_TX0, 0); 20294 mod_radio_reg(pi, 20295 RADIO_2056_TX_MIXA_BOOST_TUNE | 20296 RADIO_2056_TX0, 0xf0, 0); 20297 write_radio_reg(pi, 20298 RADIO_2056_TX_MIXG_BOOST_TUNE | 20299 RADIO_2056_TX0, 0); 20300 20301 write_radio_reg(pi, 20302 RADIO_2056_TX_PADA_BOOST_TUNE | 20303 RADIO_2056_TX1, 0); 20304 write_radio_reg(pi, 20305 RADIO_2056_TX_PADG_BOOST_TUNE | 20306 RADIO_2056_TX1, 0); 20307 write_radio_reg(pi, 20308 RADIO_2056_TX_PGAA_BOOST_TUNE | 20309 RADIO_2056_TX1, 0); 20310 write_radio_reg(pi, 20311 RADIO_2056_TX_PGAG_BOOST_TUNE | 20312 RADIO_2056_TX1, 0); 20313 mod_radio_reg(pi, 20314 RADIO_2056_TX_MIXA_BOOST_TUNE | 20315 RADIO_2056_TX1, 0xf0, 0); 20316 write_radio_reg(pi, 20317 RADIO_2056_TX_MIXG_BOOST_TUNE | 20318 RADIO_2056_TX1, 0); 20319 20320 pi->radio_is_on = false; 20321 } 20322 20323 if (NREV_GE(pi->pubpi.phy_rev, 8)) { 20324 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20325 pi->radio_is_on = false; 20326 } 20327 20328 } 20329 } 20330 20331 static bool 20332 wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, 20333 const struct chan_info_nphy_radio2057 **t0, 20334 const struct chan_info_nphy_radio205x **t1, 20335 const struct chan_info_nphy_radio2057_rev5 **t2, 20336 const struct chan_info_nphy_2055 **t3) 20337 { 20338 uint i; 20339 const struct chan_info_nphy_radio2057 *chan_info_tbl_p_0 = NULL; 20340 const struct chan_info_nphy_radio205x *chan_info_tbl_p_1 = NULL; 20341 const struct chan_info_nphy_radio2057_rev5 *chan_info_tbl_p_2 = NULL; 20342 u32 tbl_len = 0; 20343 20344 int freq = 0; 20345 20346 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20347 20348 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 20349 20350 chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; 20351 tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); 20352 20353 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 20354 || NREV_IS(pi->pubpi.phy_rev, 9)) { 20355 switch (pi->pubpi.radiorev) { 20356 20357 case 5: 20358 20359 if (pi->pubpi.radiover == 0x0) { 20360 20361 chan_info_tbl_p_2 = 20362 chan_info_nphyrev8_2057_rev5; 20363 tbl_len = ARRAY_SIZE( 20364 chan_info_nphyrev8_2057_rev5); 20365 20366 } else if (pi->pubpi.radiover == 0x1) { 20367 20368 chan_info_tbl_p_2 = 20369 chan_info_nphyrev9_2057_rev5v1; 20370 tbl_len = ARRAY_SIZE( 20371 chan_info_nphyrev9_2057_rev5v1); 20372 20373 } 20374 break; 20375 20376 case 7: 20377 chan_info_tbl_p_0 = 20378 chan_info_nphyrev8_2057_rev7; 20379 tbl_len = ARRAY_SIZE( 20380 chan_info_nphyrev8_2057_rev7); 20381 break; 20382 20383 case 8: 20384 chan_info_tbl_p_0 = 20385 chan_info_nphyrev8_2057_rev8; 20386 tbl_len = ARRAY_SIZE( 20387 chan_info_nphyrev8_2057_rev8); 20388 break; 20389 20390 default: 20391 break; 20392 } 20393 } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { 20394 20395 chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; 20396 tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); 20397 } else { 20398 goto fail; 20399 } 20400 20401 for (i = 0; i < tbl_len; i++) { 20402 if (pi->pubpi.radiorev == 5) { 20403 20404 if (chan_info_tbl_p_2[i].chan == channel) 20405 break; 20406 } else { 20407 20408 if (chan_info_tbl_p_0[i].chan == channel) 20409 break; 20410 } 20411 } 20412 20413 if (i >= tbl_len) 20414 goto fail; 20415 20416 if (pi->pubpi.radiorev == 5) { 20417 *t2 = &chan_info_tbl_p_2[i]; 20418 freq = chan_info_tbl_p_2[i].freq; 20419 } else { 20420 *t0 = &chan_info_tbl_p_0[i]; 20421 freq = chan_info_tbl_p_0[i].freq; 20422 } 20423 20424 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20425 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20426 chan_info_tbl_p_1 = chan_info_nphyrev3_2056; 20427 tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); 20428 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20429 chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; 20430 tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); 20431 } else if (NREV_IS(pi->pubpi.phy_rev, 5) 20432 || NREV_IS(pi->pubpi.phy_rev, 6)) { 20433 switch (pi->pubpi.radiorev) { 20434 case 5: 20435 chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; 20436 tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); 20437 break; 20438 case 6: 20439 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; 20440 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); 20441 break; 20442 case 7: 20443 case 9: 20444 chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; 20445 tbl_len = 20446 ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); 20447 break; 20448 case 8: 20449 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; 20450 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); 20451 break; 20452 case 11: 20453 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; 20454 tbl_len = ARRAY_SIZE( 20455 chan_info_nphyrev6_2056v11); 20456 break; 20457 default: 20458 break; 20459 } 20460 } 20461 20462 for (i = 0; i < tbl_len; i++) { 20463 if (chan_info_tbl_p_1[i].chan == channel) 20464 break; 20465 } 20466 20467 if (i >= tbl_len) 20468 goto fail; 20469 20470 *t1 = &chan_info_tbl_p_1[i]; 20471 freq = chan_info_tbl_p_1[i].freq; 20472 20473 } else { 20474 for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) 20475 if (chan_info_nphy_2055[i].chan == channel) 20476 break; 20477 20478 if (i >= ARRAY_SIZE(chan_info_nphy_2055)) 20479 goto fail; 20480 20481 *t3 = &chan_info_nphy_2055[i]; 20482 freq = chan_info_nphy_2055[i].freq; 20483 } 20484 20485 *f = freq; 20486 return true; 20487 20488 fail: 20489 *f = WL_CHAN_FREQ_RANGE_2G; 20490 return false; 20491 } 20492 20493 u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint channel) 20494 { 20495 int freq; 20496 const struct chan_info_nphy_radio2057 *t0 = NULL; 20497 const struct chan_info_nphy_radio205x *t1 = NULL; 20498 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 20499 const struct chan_info_nphy_2055 *t3 = NULL; 20500 20501 if (channel == 0) 20502 channel = CHSPEC_CHANNEL(pi->radio_chanspec); 20503 20504 wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); 20505 20506 if (CHSPEC_IS2G(pi->radio_chanspec)) 20507 return WL_CHAN_FREQ_RANGE_2G; 20508 20509 if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) 20510 return WL_CHAN_FREQ_RANGE_5GL; 20511 else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) 20512 return WL_CHAN_FREQ_RANGE_5GM; 20513 else 20514 return WL_CHAN_FREQ_RANGE_5GH; 20515 } 20516 20517 static void 20518 wlc_phy_chanspec_radio2055_setup(struct brcms_phy *pi, 20519 const struct chan_info_nphy_2055 *ci) 20520 { 20521 20522 write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); 20523 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); 20524 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); 20525 write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); 20526 20527 BRCMS_PHY_WAR_PR51571(pi); 20528 20529 write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); 20530 write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); 20531 write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); 20532 write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); 20533 20534 BRCMS_PHY_WAR_PR51571(pi); 20535 20536 write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); 20537 write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); 20538 write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); 20539 write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); 20540 20541 BRCMS_PHY_WAR_PR51571(pi); 20542 20543 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, 20544 ci->RF_core1_lgbuf_a_tune); 20545 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, 20546 ci->RF_core1_lgbuf_g_tune); 20547 write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); 20548 write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, 20549 ci->RF_core1_tx_pga_pad_tn); 20550 20551 BRCMS_PHY_WAR_PR51571(pi); 20552 20553 write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, 20554 ci->RF_core1_tx_mx_bgtrim); 20555 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, 20556 ci->RF_core2_lgbuf_a_tune); 20557 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, 20558 ci->RF_core2_lgbuf_g_tune); 20559 write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); 20560 20561 BRCMS_PHY_WAR_PR51571(pi); 20562 20563 write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, 20564 ci->RF_core2_tx_pga_pad_tn); 20565 write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, 20566 ci->RF_core2_tx_mx_bgtrim); 20567 20568 udelay(50); 20569 20570 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); 20571 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); 20572 20573 BRCMS_PHY_WAR_PR51571(pi); 20574 20575 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); 20576 20577 udelay(300); 20578 } 20579 20580 static void 20581 wlc_phy_chanspec_radio2056_setup(struct brcms_phy *pi, 20582 const struct chan_info_nphy_radio205x *ci) 20583 { 20584 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20585 20586 write_radio_reg(pi, 20587 RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, 20588 ci->RF_SYN_pll_vcocal1); 20589 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, 20590 ci->RF_SYN_pll_vcocal2); 20591 write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, 20592 ci->RF_SYN_pll_refdiv); 20593 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, 20594 ci->RF_SYN_pll_mmd2); 20595 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, 20596 ci->RF_SYN_pll_mmd1); 20597 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20598 ci->RF_SYN_pll_loopfilter1); 20599 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20600 ci->RF_SYN_pll_loopfilter2); 20601 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, 20602 ci->RF_SYN_pll_loopfilter3); 20603 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20604 ci->RF_SYN_pll_loopfilter4); 20605 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, 20606 ci->RF_SYN_pll_loopfilter5); 20607 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, 20608 ci->RF_SYN_reserved_addr27); 20609 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, 20610 ci->RF_SYN_reserved_addr28); 20611 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, 20612 ci->RF_SYN_reserved_addr29); 20613 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, 20614 ci->RF_SYN_logen_VCOBUF1); 20615 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, 20616 ci->RF_SYN_logen_MIXER2); 20617 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, 20618 ci->RF_SYN_logen_BUF3); 20619 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, 20620 ci->RF_SYN_logen_BUF4); 20621 20622 write_radio_reg(pi, 20623 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, 20624 ci->RF_RX0_lnaa_tune); 20625 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, 20626 ci->RF_RX0_lnag_tune); 20627 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, 20628 ci->RF_TX0_intpaa_boost_tune); 20629 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, 20630 ci->RF_TX0_intpag_boost_tune); 20631 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, 20632 ci->RF_TX0_pada_boost_tune); 20633 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, 20634 ci->RF_TX0_padg_boost_tune); 20635 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, 20636 ci->RF_TX0_pgaa_boost_tune); 20637 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, 20638 ci->RF_TX0_pgag_boost_tune); 20639 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, 20640 ci->RF_TX0_mixa_boost_tune); 20641 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, 20642 ci->RF_TX0_mixg_boost_tune); 20643 20644 write_radio_reg(pi, 20645 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, 20646 ci->RF_RX1_lnaa_tune); 20647 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, 20648 ci->RF_RX1_lnag_tune); 20649 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, 20650 ci->RF_TX1_intpaa_boost_tune); 20651 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, 20652 ci->RF_TX1_intpag_boost_tune); 20653 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, 20654 ci->RF_TX1_pada_boost_tune); 20655 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, 20656 ci->RF_TX1_padg_boost_tune); 20657 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, 20658 ci->RF_TX1_pgaa_boost_tune); 20659 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, 20660 ci->RF_TX1_pgag_boost_tune); 20661 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, 20662 ci->RF_TX1_mixa_boost_tune); 20663 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, 20664 ci->RF_TX1_mixg_boost_tune); 20665 20666 if (NREV_IS(pi->pubpi.phy_rev, 3)) 20667 regs_SYN_2056_ptr = regs_SYN_2056; 20668 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 20669 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20670 else { 20671 switch (pi->pubpi.radiorev) { 20672 case 5: 20673 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20674 break; 20675 case 6: 20676 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20677 break; 20678 case 7: 20679 case 9: 20680 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20681 break; 20682 case 8: 20683 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20684 break; 20685 case 11: 20686 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20687 break; 20688 } 20689 } 20690 if (CHSPEC_IS2G(pi->radio_chanspec)) 20691 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20692 RADIO_2056_SYN, 20693 (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); 20694 else 20695 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20696 RADIO_2056_SYN, 20697 (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); 20698 20699 if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { 20700 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20701 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20702 RADIO_2056_SYN, 0x1f); 20703 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20704 RADIO_2056_SYN, 0x1f); 20705 20706 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20707 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20708 write_radio_reg(pi, 20709 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20710 RADIO_2056_SYN, 0x14); 20711 write_radio_reg(pi, 20712 RADIO_2056_SYN_PLL_CP2 | 20713 RADIO_2056_SYN, 0x00); 20714 } else { 20715 write_radio_reg(pi, 20716 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20717 RADIO_2056_SYN, 0xb); 20718 write_radio_reg(pi, 20719 RADIO_2056_SYN_PLL_CP2 | 20720 RADIO_2056_SYN, 0x14); 20721 } 20722 } 20723 } 20724 20725 if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && 20726 (CHSPEC_IS2G(pi->radio_chanspec))) { 20727 write_radio_reg(pi, 20728 RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20729 0x1f); 20730 write_radio_reg(pi, 20731 RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20732 0x1f); 20733 write_radio_reg(pi, 20734 RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20735 0xb); 20736 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, 20737 0x20); 20738 } 20739 20740 if (pi->sh->boardflags2 & BFL2_APLL_WAR) { 20741 if (CHSPEC_IS5G(pi->radio_chanspec)) { 20742 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20743 RADIO_2056_SYN, 0x1f); 20744 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20745 RADIO_2056_SYN, 0x1f); 20746 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | 20747 RADIO_2056_SYN, 0x5); 20748 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20749 RADIO_2056_SYN, 0xc); 20750 } 20751 } 20752 20753 if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { 20754 u16 pag_boost_tune; 20755 u16 padg_boost_tune; 20756 u16 pgag_boost_tune; 20757 u16 mixg_boost_tune; 20758 u16 bias, cascbias; 20759 uint core; 20760 20761 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20762 20763 if (NREV_GE(pi->pubpi.phy_rev, 5)) { 20764 20765 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20766 PADG_IDAC, 0xcc); 20767 20768 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20769 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20770 bias = 0x40; 20771 cascbias = 0x45; 20772 pag_boost_tune = 0x5; 20773 pgag_boost_tune = 0x33; 20774 padg_boost_tune = 0x77; 20775 mixg_boost_tune = 0x55; 20776 } else { 20777 bias = 0x25; 20778 cascbias = 0x20; 20779 20780 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20781 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20782 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) { 20783 bias = 0x2a; 20784 cascbias = 0x38; 20785 } 20786 20787 pag_boost_tune = 0x4; 20788 pgag_boost_tune = 0x03; 20789 padg_boost_tune = 0x77; 20790 mixg_boost_tune = 0x65; 20791 } 20792 20793 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20794 INTPAG_IMAIN_STAT, bias); 20795 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20796 INTPAG_IAUX_STAT, bias); 20797 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20798 INTPAG_CASCBIAS, cascbias); 20799 20800 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20801 INTPAG_BOOST_TUNE, 20802 pag_boost_tune); 20803 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20804 PGAG_BOOST_TUNE, 20805 pgag_boost_tune); 20806 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20807 PADG_BOOST_TUNE, 20808 padg_boost_tune); 20809 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20810 MIXG_BOOST_TUNE, 20811 mixg_boost_tune); 20812 } else { 20813 20814 bias = (pi->bw == WL_CHANSPEC_BW_40) ? 20815 0x40 : 0x20; 20816 20817 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20818 INTPAG_IMAIN_STAT, bias); 20819 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20820 INTPAG_IAUX_STAT, bias); 20821 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20822 INTPAG_CASCBIAS, 0x30); 20823 } 20824 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, 20825 0xee); 20826 } 20827 } 20828 20829 if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) 20830 && CHSPEC_IS5G(pi->radio_chanspec)) { 20831 u16 paa_boost_tune; 20832 u16 pada_boost_tune; 20833 u16 pgaa_boost_tune; 20834 u16 mixa_boost_tune; 20835 u16 freq, pabias, cascbias; 20836 uint core; 20837 20838 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 20839 20840 if (freq < 5150) { 20841 20842 paa_boost_tune = 0xa; 20843 pada_boost_tune = 0x77; 20844 pgaa_boost_tune = 0xf; 20845 mixa_boost_tune = 0xf; 20846 } else if (freq < 5340) { 20847 20848 paa_boost_tune = 0x8; 20849 pada_boost_tune = 0x77; 20850 pgaa_boost_tune = 0xfb; 20851 mixa_boost_tune = 0xf; 20852 } else if (freq < 5650) { 20853 20854 paa_boost_tune = 0x0; 20855 pada_boost_tune = 0x77; 20856 pgaa_boost_tune = 0xb; 20857 mixa_boost_tune = 0xf; 20858 } else { 20859 20860 paa_boost_tune = 0x0; 20861 pada_boost_tune = 0x77; 20862 if (freq != 5825) 20863 pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; 20864 else 20865 pgaa_boost_tune = 6; 20866 20867 mixa_boost_tune = 0xf; 20868 } 20869 20870 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20871 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20872 INTPAA_BOOST_TUNE, paa_boost_tune); 20873 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20874 PADA_BOOST_TUNE, pada_boost_tune); 20875 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20876 PGAA_BOOST_TUNE, pgaa_boost_tune); 20877 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20878 MIXA_BOOST_TUNE, mixa_boost_tune); 20879 20880 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20881 TXSPARE1, 0x30); 20882 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20883 PA_SPARE2, 0xee); 20884 20885 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20886 PADA_CASCBIAS, 0x3); 20887 20888 cascbias = 0x30; 20889 20890 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20891 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20892 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) 20893 cascbias = 0x35; 20894 20895 pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; 20896 20897 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20898 INTPAA_IAUX_STAT, pabias); 20899 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20900 INTPAA_IMAIN_STAT, pabias); 20901 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20902 INTPAA_CASCBIAS, cascbias); 20903 } 20904 } 20905 20906 udelay(50); 20907 20908 wlc_phy_radio205x_vcocal_nphy(pi); 20909 } 20910 20911 void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi) 20912 { 20913 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20914 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); 20915 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); 20916 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 20917 (1 << 2)); 20918 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); 20919 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20920 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); 20921 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20922 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); 20923 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20924 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); 20925 } 20926 20927 udelay(300); 20928 } 20929 20930 static void 20931 wlc_phy_chanspec_radio2057_setup( 20932 struct brcms_phy *pi, 20933 const struct chan_info_nphy_radio2057 *ci, 20934 const struct chan_info_nphy_radio2057_rev5 * 20935 ci2) 20936 { 20937 int coreNum; 20938 u16 txmix2g_tune_boost_pu = 0; 20939 u16 pad2g_tune_pus = 0; 20940 20941 if (pi->pubpi.radiorev == 5) { 20942 20943 write_radio_reg(pi, 20944 RADIO_2057_VCOCAL_COUNTVAL0, 20945 ci2->RF_vcocal_countval0); 20946 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20947 ci2->RF_vcocal_countval1); 20948 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20949 ci2->RF_rfpll_refmaster_sparextalsize); 20950 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20951 ci2->RF_rfpll_loopfilter_r1); 20952 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20953 ci2->RF_rfpll_loopfilter_c2); 20954 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20955 ci2->RF_rfpll_loopfilter_c1); 20956 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 20957 ci2->RF_cp_kpd_idac); 20958 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); 20959 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); 20960 write_radio_reg(pi, 20961 RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); 20962 write_radio_reg(pi, 20963 RADIO_2057_LOGEN_MX2G_TUNE, 20964 ci2->RF_logen_mx2g_tune); 20965 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20966 ci2->RF_logen_indbuf2g_tune); 20967 20968 write_radio_reg(pi, 20969 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20970 ci2->RF_txmix2g_tune_boost_pu_core0); 20971 write_radio_reg(pi, 20972 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20973 ci2->RF_pad2g_tune_pus_core0); 20974 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20975 ci2->RF_lna2g_tune_core0); 20976 20977 write_radio_reg(pi, 20978 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20979 ci2->RF_txmix2g_tune_boost_pu_core1); 20980 write_radio_reg(pi, 20981 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20982 ci2->RF_pad2g_tune_pus_core1); 20983 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20984 ci2->RF_lna2g_tune_core1); 20985 20986 } else { 20987 20988 write_radio_reg(pi, 20989 RADIO_2057_VCOCAL_COUNTVAL0, 20990 ci->RF_vcocal_countval0); 20991 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20992 ci->RF_vcocal_countval1); 20993 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20994 ci->RF_rfpll_refmaster_sparextalsize); 20995 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20996 ci->RF_rfpll_loopfilter_r1); 20997 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20998 ci->RF_rfpll_loopfilter_c2); 20999 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21000 ci->RF_rfpll_loopfilter_c1); 21001 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); 21002 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); 21003 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); 21004 write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); 21005 write_radio_reg(pi, 21006 RADIO_2057_LOGEN_MX2G_TUNE, 21007 ci->RF_logen_mx2g_tune); 21008 write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, 21009 ci->RF_logen_mx5g_tune); 21010 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 21011 ci->RF_logen_indbuf2g_tune); 21012 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, 21013 ci->RF_logen_indbuf5g_tune); 21014 21015 write_radio_reg(pi, 21016 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 21017 ci->RF_txmix2g_tune_boost_pu_core0); 21018 write_radio_reg(pi, 21019 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 21020 ci->RF_pad2g_tune_pus_core0); 21021 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, 21022 ci->RF_pga_boost_tune_core0); 21023 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, 21024 ci->RF_txmix5g_boost_tune_core0); 21025 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, 21026 ci->RF_pad5g_tune_misc_pus_core0); 21027 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 21028 ci->RF_lna2g_tune_core0); 21029 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, 21030 ci->RF_lna5g_tune_core0); 21031 21032 write_radio_reg(pi, 21033 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 21034 ci->RF_txmix2g_tune_boost_pu_core1); 21035 write_radio_reg(pi, 21036 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 21037 ci->RF_pad2g_tune_pus_core1); 21038 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, 21039 ci->RF_pga_boost_tune_core1); 21040 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, 21041 ci->RF_txmix5g_boost_tune_core1); 21042 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, 21043 ci->RF_pad5g_tune_misc_pus_core1); 21044 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 21045 ci->RF_lna2g_tune_core1); 21046 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, 21047 ci->RF_lna5g_tune_core1); 21048 } 21049 21050 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 21051 21052 if (CHSPEC_IS2G(pi->radio_chanspec)) { 21053 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 21054 0x3f); 21055 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 21056 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21057 0x8); 21058 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 21059 0x8); 21060 } else { 21061 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 21062 0x1f); 21063 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 21064 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21065 0x8); 21066 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 21067 0x8); 21068 } 21069 } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || 21070 (pi->pubpi.radiorev == 8)) { 21071 21072 if (CHSPEC_IS2G(pi->radio_chanspec)) { 21073 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 21074 0x1b); 21075 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); 21076 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21077 0xa); 21078 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 21079 0xa); 21080 } else { 21081 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 21082 0x1f); 21083 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 21084 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21085 0x8); 21086 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 21087 0x8); 21088 } 21089 21090 } 21091 21092 if (CHSPEC_IS2G(pi->radio_chanspec)) { 21093 if (PHY_IPA(pi)) { 21094 if (pi->pubpi.radiorev == 3) 21095 txmix2g_tune_boost_pu = 0x6b; 21096 21097 if (pi->pubpi.radiorev == 5) 21098 pad2g_tune_pus = 0x73; 21099 21100 } else { 21101 if (pi->pubpi.radiorev != 5) { 21102 pad2g_tune_pus = 0x3; 21103 21104 txmix2g_tune_boost_pu = 0x61; 21105 } 21106 } 21107 21108 for (coreNum = 0; coreNum <= 1; coreNum++) { 21109 21110 if (txmix2g_tune_boost_pu != 0) 21111 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21112 TXMIX2G_TUNE_BOOST_PU, 21113 txmix2g_tune_boost_pu); 21114 21115 if (pad2g_tune_pus != 0) 21116 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21117 PAD2G_TUNE_PUS, 21118 pad2g_tune_pus); 21119 } 21120 } 21121 21122 udelay(50); 21123 21124 wlc_phy_radio205x_vcocal_nphy(pi); 21125 } 21126 21127 static void 21128 wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, u16 chanspec, 21129 const struct nphy_sfo_cfg *ci) 21130 { 21131 u16 val; 21132 21133 val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 21134 if (CHSPEC_IS5G(chanspec) && !val) { 21135 21136 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21137 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21138 (val | MAC_PHY_FORCE_CLK)); 21139 21140 or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21141 (BBCFG_RESETCCA | BBCFG_RESETRX)); 21142 21143 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21144 21145 or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); 21146 } else if (!CHSPEC_IS5G(chanspec) && val) { 21147 21148 and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); 21149 21150 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21151 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21152 (val | MAC_PHY_FORCE_CLK)); 21153 21154 and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21155 (u16) (~(BBCFG_RESETCCA | BBCFG_RESETRX))); 21156 21157 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21158 } 21159 21160 write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); 21161 write_phy_reg(pi, 0x1cf, ci->PHY_BW2); 21162 write_phy_reg(pi, 0x1d0, ci->PHY_BW3); 21163 21164 write_phy_reg(pi, 0x1d1, ci->PHY_BW4); 21165 write_phy_reg(pi, 0x1d2, ci->PHY_BW5); 21166 write_phy_reg(pi, 0x1d3, ci->PHY_BW6); 21167 21168 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 21169 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); 21170 21171 or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); 21172 } else { 21173 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 21174 NPHY_ClassifierCtrl_ofdm_en); 21175 21176 if (CHSPEC_IS2G(chanspec)) 21177 and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); 21178 } 21179 21180 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) 21181 wlc_phy_txpwr_fixpower_nphy(pi); 21182 21183 if (NREV_LT(pi->pubpi.phy_rev, 3)) 21184 wlc_phy_adjust_lnagaintbl_nphy(pi); 21185 21186 wlc_phy_txlpfbw_nphy(pi); 21187 21188 if (NREV_GE(pi->pubpi.phy_rev, 3) 21189 && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { 21190 u8 spuravoid = 0; 21191 21192 val = CHSPEC_CHANNEL(chanspec); 21193 if (!CHSPEC_IS40(pi->radio_chanspec)) { 21194 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21195 if ((val == 13) || (val == 14) || (val == 153)) 21196 spuravoid = 1; 21197 } else if (((val >= 5) && (val <= 8)) || (val == 13) 21198 || (val == 14)) { 21199 spuravoid = 1; 21200 } 21201 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21202 if (val == 54) 21203 spuravoid = 1; 21204 } else if (pi->nphy_aband_spurwar_en && 21205 ((val == 38) || (val == 102) || (val == 118))) { 21206 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) 21207 && (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 21208 spuravoid = 0; 21209 } else { 21210 spuravoid = 1; 21211 } 21212 } 21213 21214 if (pi->phy_spuravoid == SPURAVOID_FORCEON) 21215 spuravoid = 1; 21216 21217 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21218 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21219 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21220 spuravoid); 21221 } else { 21222 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); 21223 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21224 spuravoid); 21225 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); 21226 } 21227 21228 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) || 21229 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21230 if (spuravoid == 1) { 21231 bcma_write16(pi->d11core, 21232 D11REGOFFS(tsf_clk_frac_l), 21233 0x5341); 21234 bcma_write16(pi->d11core, 21235 D11REGOFFS(tsf_clk_frac_h), 0x8); 21236 } else { 21237 bcma_write16(pi->d11core, 21238 D11REGOFFS(tsf_clk_frac_l), 21239 0x8889); 21240 bcma_write16(pi->d11core, 21241 D11REGOFFS(tsf_clk_frac_h), 0x8); 21242 } 21243 } 21244 21245 if (!((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21246 (pi->sh->chip == BCMA_CHIP_ID_BCM47162))) 21247 wlapi_bmac_core_phypll_reset(pi->sh->physhim); 21248 21249 mod_phy_reg(pi, 0x01, (0x1 << 15), 21250 ((spuravoid > 0) ? (0x1 << 15) : 0)); 21251 21252 wlc_phy_resetcca_nphy(pi); 21253 21254 pi->phy_isspuravoid = (spuravoid > 0); 21255 } 21256 21257 if (NREV_LT(pi->pubpi.phy_rev, 7)) 21258 write_phy_reg(pi, 0x17e, 0x3830); 21259 21260 wlc_phy_spurwar_nphy(pi); 21261 } 21262 21263 void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec) 21264 { 21265 int freq; 21266 const struct chan_info_nphy_radio2057 *t0 = NULL; 21267 const struct chan_info_nphy_radio205x *t1 = NULL; 21268 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 21269 const struct chan_info_nphy_2055 *t3 = NULL; 21270 21271 if (!wlc_phy_chan2freq_nphy 21272 (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) 21273 return; 21274 21275 wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); 21276 21277 if (CHSPEC_BW(chanspec) != pi->bw) 21278 wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); 21279 21280 if (CHSPEC_IS40(chanspec)) { 21281 if (CHSPEC_SB_UPPER(chanspec)) { 21282 or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); 21283 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21284 or_phy_reg(pi, 0x310, PRIM_SEL_UP20); 21285 } else { 21286 and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); 21287 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21288 and_phy_reg(pi, 0x310, 21289 (~PRIM_SEL_UP20 & 0xffff)); 21290 } 21291 } 21292 21293 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21294 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21295 21296 if ((pi->pubpi.radiorev <= 4) 21297 || (pi->pubpi.radiorev == 6)) { 21298 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, 21299 0x2, 21300 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21301 : 0)); 21302 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, 21303 0x2, 21304 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21305 : 0)); 21306 } 21307 21308 wlc_phy_chanspec_radio2057_setup(pi, t0, t2); 21309 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21310 (pi->pubpi.radiorev == 5) ? 21311 (const struct nphy_sfo_cfg *)&(t2->PHY_BW1a) : 21312 (const struct nphy_sfo_cfg *)&(t0->PHY_BW1a)); 21313 21314 } else { 21315 21316 mod_radio_reg(pi, 21317 RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, 21318 0x4, 21319 (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); 21320 wlc_phy_chanspec_radio2056_setup(pi, t1); 21321 21322 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21323 (const struct nphy_sfo_cfg *) &(t1->PHY_BW1a)); 21324 } 21325 21326 } else { 21327 21328 mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, 21329 (CHSPEC_IS5G(chanspec) ? (0x02 << 4) 21330 : (0x05 << 4))); 21331 21332 wlc_phy_chanspec_radio2055_setup(pi, t3); 21333 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21334 (const struct nphy_sfo_cfg *) 21335 &(t3->PHY_BW1a)); 21336 } 21337 21338 } 21339 21340 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init) 21341 { 21342 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); 21343 u16 mask = 0xfc00; 21344 u32 mc = 0; 21345 21346 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21347 return; 21348 21349 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21350 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; 21351 21352 if (!lut_init) 21353 return; 21354 21355 if (pi->srom_fem2g.antswctrllut == 0) { 21356 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21357 1, 0x02, 16, &v0); 21358 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21359 1, 0x03, 16, &v1); 21360 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21361 1, 0x08, 16, &v2); 21362 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21363 1, 0x0C, 16, &v3); 21364 } 21365 21366 if (pi->srom_fem5g.antswctrllut == 0) { 21367 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21368 1, 0x12, 16, &v0); 21369 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21370 1, 0x13, 16, &v1); 21371 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21372 1, 0x18, 16, &v2); 21373 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21374 1, 0x1C, 16, &v3); 21375 } 21376 } else { 21377 21378 write_phy_reg(pi, 0xc8, 0x0); 21379 write_phy_reg(pi, 0xc9, 0x0); 21380 21381 bcma_chipco_gpio_control(&pi->d11core->bus->drv_cc, mask, mask); 21382 21383 mc = bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 21384 mc &= ~MCTL_GPOUT_SEL_MASK; 21385 bcma_write32(pi->d11core, D11REGOFFS(maccontrol), mc); 21386 21387 bcma_set16(pi->d11core, D11REGOFFS(psm_gpio_oe), mask); 21388 21389 bcma_mask16(pi->d11core, D11REGOFFS(psm_gpio_out), ~mask); 21390 21391 if (lut_init) { 21392 write_phy_reg(pi, 0xf8, 0x02d8); 21393 write_phy_reg(pi, 0xf9, 0x0301); 21394 write_phy_reg(pi, 0xfa, 0x02d8); 21395 write_phy_reg(pi, 0xfb, 0x0301); 21396 } 21397 } 21398 } 21399 21400 u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val) 21401 { 21402 u16 curr_ctl, new_ctl; 21403 bool suspended = false; 21404 21405 if (D11REV_IS(pi->sh->corerev, 16)) { 21406 suspended = (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 21407 MCTL_EN_MAC) ? false : true; 21408 if (!suspended) 21409 wlapi_suspend_mac_and_wait(pi->sh->physhim); 21410 } 21411 21412 curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); 21413 21414 new_ctl = (curr_ctl & (~mask)) | (val & mask); 21415 21416 mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); 21417 21418 if (D11REV_IS(pi->sh->corerev, 16) && !suspended) 21419 wlapi_enable_mac(pi->sh->physhim); 21420 21421 return new_ctl; 21422 } 21423 21424 void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd) 21425 { 21426 u16 trigger_mask, status_mask; 21427 u16 orig_RfseqCoreActv; 21428 21429 switch (cmd) { 21430 case NPHY_RFSEQ_RX2TX: 21431 trigger_mask = NPHY_RfseqTrigger_rx2tx; 21432 status_mask = NPHY_RfseqStatus_rx2tx; 21433 break; 21434 case NPHY_RFSEQ_TX2RX: 21435 trigger_mask = NPHY_RfseqTrigger_tx2rx; 21436 status_mask = NPHY_RfseqStatus_tx2rx; 21437 break; 21438 case NPHY_RFSEQ_RESET2RX: 21439 trigger_mask = NPHY_RfseqTrigger_reset2rx; 21440 status_mask = NPHY_RfseqStatus_reset2rx; 21441 break; 21442 case NPHY_RFSEQ_UPDATEGAINH: 21443 trigger_mask = NPHY_RfseqTrigger_updategainh; 21444 status_mask = NPHY_RfseqStatus_updategainh; 21445 break; 21446 case NPHY_RFSEQ_UPDATEGAINL: 21447 trigger_mask = NPHY_RfseqTrigger_updategainl; 21448 status_mask = NPHY_RfseqStatus_updategainl; 21449 break; 21450 case NPHY_RFSEQ_UPDATEGAINU: 21451 trigger_mask = NPHY_RfseqTrigger_updategainu; 21452 status_mask = NPHY_RfseqStatus_updategainu; 21453 break; 21454 default: 21455 return; 21456 } 21457 21458 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 21459 or_phy_reg(pi, 0xa1, 21460 (NPHY_RfseqMode_CoreActv_override | 21461 NPHY_RfseqMode_Trigger_override)); 21462 or_phy_reg(pi, 0xa3, trigger_mask); 21463 SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); 21464 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 21465 WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); 21466 } 21467 21468 static void 21469 wlc_phy_rfctrl_override_1tomany_nphy(struct brcms_phy *pi, u16 cmd, u16 value, 21470 u8 core_mask, u8 off) 21471 { 21472 u16 rfmxgain = 0, lpfgain = 0; 21473 u16 tgain = 0; 21474 21475 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21476 21477 switch (cmd) { 21478 case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: 21479 wlc_phy_rfctrl_override_nphy_rev7( 21480 pi, (0x1 << 5), 21481 value, core_mask, off, 21482 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21483 wlc_phy_rfctrl_override_nphy_rev7( 21484 pi, (0x1 << 4), value, 21485 core_mask, off, 21486 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21487 wlc_phy_rfctrl_override_nphy_rev7( 21488 pi, (0x1 << 3), value, 21489 core_mask, off, 21490 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21491 break; 21492 case NPHY_REV7_RfctrlOverride_cmd_rx_pu: 21493 wlc_phy_rfctrl_override_nphy_rev7( 21494 pi, (0x1 << 2), 21495 value, core_mask, off, 21496 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21497 wlc_phy_rfctrl_override_nphy_rev7( 21498 pi, (0x1 << 1), value, 21499 core_mask, off, 21500 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21501 wlc_phy_rfctrl_override_nphy_rev7( 21502 pi, (0x1 << 0), value, 21503 core_mask, off, 21504 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21505 wlc_phy_rfctrl_override_nphy_rev7( 21506 pi, (0x1 << 1), value, 21507 core_mask, off, 21508 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21509 wlc_phy_rfctrl_override_nphy_rev7( 21510 pi, (0x1 << 11), 0, 21511 core_mask, off, 21512 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21513 break; 21514 case NPHY_REV7_RfctrlOverride_cmd_tx_pu: 21515 wlc_phy_rfctrl_override_nphy_rev7( 21516 pi, (0x1 << 2), 21517 value, core_mask, off, 21518 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21519 wlc_phy_rfctrl_override_nphy_rev7( 21520 pi, (0x1 << 1), value, 21521 core_mask, off, 21522 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21523 wlc_phy_rfctrl_override_nphy_rev7( 21524 pi, (0x1 << 0), value, 21525 core_mask, off, 21526 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21527 wlc_phy_rfctrl_override_nphy_rev7( 21528 pi, (0x1 << 2), value, 21529 core_mask, off, 21530 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21531 wlc_phy_rfctrl_override_nphy_rev7( 21532 pi, (0x1 << 11), 1, 21533 core_mask, off, 21534 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21535 break; 21536 case NPHY_REV7_RfctrlOverride_cmd_rxgain: 21537 rfmxgain = value & 0x000ff; 21538 lpfgain = value & 0x0ff00; 21539 lpfgain = lpfgain >> 8; 21540 21541 wlc_phy_rfctrl_override_nphy_rev7( 21542 pi, (0x1 << 11), 21543 rfmxgain, core_mask, 21544 off, 21545 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21546 wlc_phy_rfctrl_override_nphy_rev7( 21547 pi, (0x3 << 13), 21548 lpfgain, core_mask, 21549 off, 21550 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21551 break; 21552 case NPHY_REV7_RfctrlOverride_cmd_txgain: 21553 tgain = value & 0x7fff; 21554 lpfgain = value & 0x8000; 21555 lpfgain = lpfgain >> 14; 21556 21557 wlc_phy_rfctrl_override_nphy_rev7( 21558 pi, (0x1 << 12), 21559 tgain, core_mask, off, 21560 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21561 wlc_phy_rfctrl_override_nphy_rev7( 21562 pi, (0x1 << 13), 21563 lpfgain, core_mask, 21564 off, 21565 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21566 break; 21567 } 21568 } 21569 } 21570 21571 static void 21572 wlc_phy_scale_offset_rssi_nphy(struct brcms_phy *pi, u16 scale, s8 offset, 21573 u8 coresel, u8 rail, u8 rssi_type) 21574 { 21575 u16 valuetostuff; 21576 21577 offset = (offset > NPHY_RSSICAL_MAXREAD) ? 21578 NPHY_RSSICAL_MAXREAD : offset; 21579 offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? 21580 -NPHY_RSSICAL_MAXREAD - 1 : offset; 21581 21582 valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); 21583 21584 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21585 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21586 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21587 write_phy_reg(pi, 0x1a6, valuetostuff); 21588 21589 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21590 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21591 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21592 write_phy_reg(pi, 0x1ac, valuetostuff); 21593 21594 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21595 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21596 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21597 write_phy_reg(pi, 0x1b2, valuetostuff); 21598 21599 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21600 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21601 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21602 write_phy_reg(pi, 0x1b8, valuetostuff); 21603 21604 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21605 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21606 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21607 write_phy_reg(pi, 0x1a4, valuetostuff); 21608 21609 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21610 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21611 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21612 write_phy_reg(pi, 0x1aa, valuetostuff); 21613 21614 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21615 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21616 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21617 write_phy_reg(pi, 0x1b0, valuetostuff); 21618 21619 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21620 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21621 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21622 write_phy_reg(pi, 0x1b6, valuetostuff); 21623 21624 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21625 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21626 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21627 write_phy_reg(pi, 0x1a5, valuetostuff); 21628 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21629 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21630 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21631 write_phy_reg(pi, 0x1ab, valuetostuff); 21632 21633 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21634 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21635 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21636 write_phy_reg(pi, 0x1b1, valuetostuff); 21637 21638 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21639 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21640 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21641 write_phy_reg(pi, 0x1b7, valuetostuff); 21642 21643 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21644 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21645 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21646 write_phy_reg(pi, 0x1a7, valuetostuff); 21647 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21648 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21649 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21650 write_phy_reg(pi, 0x1ad, valuetostuff); 21651 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21652 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21653 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21654 write_phy_reg(pi, 0x1b3, valuetostuff); 21655 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21656 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21657 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21658 write_phy_reg(pi, 0x1b9, valuetostuff); 21659 21660 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21661 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21662 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21663 write_phy_reg(pi, 0x1a8, valuetostuff); 21664 21665 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21666 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21667 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21668 write_phy_reg(pi, 0x1ae, valuetostuff); 21669 21670 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21671 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21672 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21673 write_phy_reg(pi, 0x1b4, valuetostuff); 21674 21675 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21676 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21677 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21678 write_phy_reg(pi, 0x1ba, valuetostuff); 21679 21680 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21681 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21682 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21683 write_phy_reg(pi, 0x1a9, valuetostuff); 21684 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21685 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21686 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21687 write_phy_reg(pi, 0x1b5, valuetostuff); 21688 21689 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21690 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21691 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21692 write_phy_reg(pi, 0x1af, valuetostuff); 21693 21694 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21695 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21696 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21697 write_phy_reg(pi, 0x1bb, valuetostuff); 21698 } 21699 21700 static void brcms_phy_wr_tx_mux(struct brcms_phy *pi, u8 core) 21701 { 21702 if (PHY_IPA(pi)) { 21703 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21704 write_radio_reg(pi, 21705 ((core == PHY_CORE_0) ? 21706 RADIO_2057_TX0_TX_SSI_MUX : 21707 RADIO_2057_TX1_TX_SSI_MUX), 21708 (CHSPEC_IS5G(pi->radio_chanspec) ? 21709 0xc : 0xe)); 21710 else 21711 write_radio_reg(pi, 21712 RADIO_2056_TX_TX_SSI_MUX | 21713 ((core == PHY_CORE_0) ? 21714 RADIO_2056_TX0 : RADIO_2056_TX1), 21715 (CHSPEC_IS5G(pi->radio_chanspec) ? 21716 0xc : 0xe)); 21717 } else { 21718 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21719 write_radio_reg(pi, 21720 ((core == PHY_CORE_0) ? 21721 RADIO_2057_TX0_TX_SSI_MUX : 21722 RADIO_2057_TX1_TX_SSI_MUX), 21723 0x11); 21724 21725 if (pi->pubpi.radioid == BCM2057_ID) 21726 write_radio_reg(pi, 21727 RADIO_2057_IQTEST_SEL_PU, 0x1); 21728 21729 } else { 21730 write_radio_reg(pi, 21731 RADIO_2056_TX_TX_SSI_MUX | 21732 ((core == PHY_CORE_0) ? 21733 RADIO_2056_TX0 : RADIO_2056_TX1), 21734 0x11); 21735 } 21736 } 21737 } 21738 21739 void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core_code, u8 rssi_type) 21740 { 21741 u16 mask, val; 21742 u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, 21743 startseq; 21744 u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, 21745 rfctrlovr_trigger_val; 21746 u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; 21747 u16 rfctrlcmd_val, rfctrlovr_val; 21748 u8 core; 21749 21750 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21751 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21752 mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); 21753 mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); 21754 21755 mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); 21756 mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); 21757 21758 mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); 21759 mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); 21760 21761 mask = (0x1 << 2) | 21762 (0x1 << 3) | (0x1 << 4) | (0x1 << 5); 21763 mod_phy_reg(pi, 0xf9, mask, 0); 21764 mod_phy_reg(pi, 0xfb, mask, 0); 21765 21766 } else { 21767 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 21768 if (core_code == RADIO_MIMO_CORESEL_CORE1 21769 && core == PHY_CORE_1) 21770 continue; 21771 else if (core_code == RADIO_MIMO_CORESEL_CORE2 21772 && core == PHY_CORE_0) 21773 continue; 21774 21775 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21776 0x8f : 0xa5, (0x1 << 9), 1 << 9); 21777 21778 if (rssi_type == NPHY_RSSI_SEL_W1 || 21779 rssi_type == NPHY_RSSI_SEL_W2 || 21780 rssi_type == NPHY_RSSI_SEL_NB) { 21781 mod_phy_reg(pi, 21782 (core == 21783 PHY_CORE_0) ? 0xa6 : 0xa7, 21784 (0x3 << 8), 0); 21785 21786 mask = (0x1 << 2) | 21787 (0x1 << 3) | 21788 (0x1 << 4) | (0x1 << 5); 21789 mod_phy_reg(pi, 21790 (core == 21791 PHY_CORE_0) ? 0xf9 : 0xfb, 21792 mask, 0); 21793 21794 if (rssi_type == NPHY_RSSI_SEL_W1) { 21795 if (CHSPEC_IS5G( 21796 pi->radio_chanspec)) { 21797 mask = (0x1 << 2); 21798 val = 1 << 2; 21799 } else { 21800 mask = (0x1 << 3); 21801 val = 1 << 3; 21802 } 21803 } else if (rssi_type == 21804 NPHY_RSSI_SEL_W2) { 21805 mask = (0x1 << 4); 21806 val = 1 << 4; 21807 } else { 21808 mask = (0x1 << 5); 21809 val = 1 << 5; 21810 } 21811 mod_phy_reg(pi, 21812 (core == 21813 PHY_CORE_0) ? 0xf9 : 0xfb, 21814 mask, val); 21815 21816 mask = (0x1 << 5); 21817 val = 1 << 5; 21818 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21819 0xe5 : 0xe6, mask, val); 21820 } else { 21821 if (rssi_type == NPHY_RSSI_SEL_TBD) { 21822 mask = (0x3 << 8); 21823 val = 1 << 8; 21824 mod_phy_reg(pi, 21825 (core == 21826 PHY_CORE_0) ? 0xa6 21827 : 0xa7, mask, val); 21828 mask = (0x3 << 10); 21829 val = 1 << 10; 21830 mod_phy_reg(pi, 21831 (core == 21832 PHY_CORE_0) ? 0xa6 21833 : 0xa7, mask, val); 21834 } else if (rssi_type == 21835 NPHY_RSSI_SEL_IQ) { 21836 mask = (0x3 << 8); 21837 val = 2 << 8; 21838 mod_phy_reg(pi, 21839 (core == 21840 PHY_CORE_0) ? 0xa6 21841 : 0xa7, mask, val); 21842 mask = (0x3 << 10); 21843 val = 2 << 10; 21844 mod_phy_reg(pi, 21845 (core == 21846 PHY_CORE_0) ? 0xa6 21847 : 0xa7, mask, val); 21848 } else { 21849 mask = (0x3 << 8); 21850 val = 3 << 8; 21851 mod_phy_reg(pi, 21852 (core == 21853 PHY_CORE_0) ? 0xa6 21854 : 0xa7, mask, val); 21855 mask = (0x3 << 10); 21856 val = 3 << 10; 21857 mod_phy_reg(pi, 21858 (core == 21859 PHY_CORE_0) ? 0xa6 21860 : 0xa7, mask, val); 21861 brcms_phy_wr_tx_mux(pi, core); 21862 afectrlovr_rssi_val = 1 << 9; 21863 mod_phy_reg(pi, 21864 (core == 21865 PHY_CORE_0) ? 0x8f 21866 : 0xa5, (0x1 << 9), 21867 afectrlovr_rssi_val); 21868 } 21869 } 21870 } 21871 } 21872 } else { 21873 21874 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21875 (rssi_type == NPHY_RSSI_SEL_W2) || 21876 (rssi_type == NPHY_RSSI_SEL_NB)) 21877 val = 0x0; 21878 else if (rssi_type == NPHY_RSSI_SEL_TBD) 21879 val = 0x1; 21880 else if (rssi_type == NPHY_RSSI_SEL_IQ) 21881 val = 0x2; 21882 else 21883 val = 0x3; 21884 21885 mask = ((0x3 << 12) | (0x3 << 14)); 21886 val = (val << 12) | (val << 14); 21887 mod_phy_reg(pi, 0xa6, mask, val); 21888 mod_phy_reg(pi, 0xa7, mask, val); 21889 21890 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21891 (rssi_type == NPHY_RSSI_SEL_W2) || 21892 (rssi_type == NPHY_RSSI_SEL_NB)) { 21893 if (rssi_type == NPHY_RSSI_SEL_W1) 21894 val = 0x1; 21895 if (rssi_type == NPHY_RSSI_SEL_W2) 21896 val = 0x2; 21897 if (rssi_type == NPHY_RSSI_SEL_NB) 21898 val = 0x3; 21899 21900 mask = (0x3 << 4); 21901 val = (val << 4); 21902 mod_phy_reg(pi, 0x7a, mask, val); 21903 mod_phy_reg(pi, 0x7d, mask, val); 21904 } 21905 21906 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21907 afectrlovr_rssi_val = 0; 21908 rfctrlcmd_rxen_val = 0; 21909 rfctrlcmd_coresel_val = 0; 21910 rfctrlovr_rssi_val = 0; 21911 rfctrlovr_rxen_val = 0; 21912 rfctrlovr_coresel_val = 0; 21913 rfctrlovr_trigger_val = 0; 21914 startseq = 0; 21915 } else { 21916 afectrlovr_rssi_val = 1; 21917 rfctrlcmd_rxen_val = 1; 21918 rfctrlcmd_coresel_val = core_code; 21919 rfctrlovr_rssi_val = 1; 21920 rfctrlovr_rxen_val = 1; 21921 rfctrlovr_coresel_val = 1; 21922 rfctrlovr_trigger_val = 1; 21923 startseq = 1; 21924 } 21925 21926 afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); 21927 afectrlovr_rssi_val = (afectrlovr_rssi_val << 21928 12) | (afectrlovr_rssi_val << 13); 21929 mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, 21930 afectrlovr_rssi_val); 21931 21932 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21933 (rssi_type == NPHY_RSSI_SEL_W2) || 21934 (rssi_type == NPHY_RSSI_SEL_NB)) { 21935 rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); 21936 rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | 21937 (rfctrlcmd_coresel_val << 3); 21938 21939 rfctrlovr_mask = ((0x1 << 5) | 21940 (0x1 << 12) | 21941 (0x1 << 1) | (0x1 << 0)); 21942 rfctrlovr_val = (rfctrlovr_rssi_val << 21943 5) | 21944 (rfctrlovr_rxen_val << 12) | 21945 (rfctrlovr_coresel_val << 1) | 21946 (rfctrlovr_trigger_val << 0); 21947 21948 mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); 21949 mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); 21950 21951 mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); 21952 udelay(20); 21953 21954 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 21955 } 21956 } 21957 } 21958 21959 int 21960 wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, 21961 u8 nsamps) 21962 { 21963 s16 rssi0, rssi1; 21964 u16 afectrlCore1_save = 0; 21965 u16 afectrlCore2_save = 0; 21966 u16 afectrlOverride1_save = 0; 21967 u16 afectrlOverride2_save = 0; 21968 u16 rfctrlOverrideAux0_save = 0; 21969 u16 rfctrlOverrideAux1_save = 0; 21970 u16 rfctrlMiscReg1_save = 0; 21971 u16 rfctrlMiscReg2_save = 0; 21972 u16 rfctrlcmd_save = 0; 21973 u16 rfctrloverride_save = 0; 21974 u16 rfctrlrssiothers1_save = 0; 21975 u16 rfctrlrssiothers2_save = 0; 21976 s8 tmp_buf[4]; 21977 u8 ctr = 0, samp = 0; 21978 s32 rssi_out_val; 21979 u16 gpiosel_orig; 21980 21981 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21982 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21983 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21984 rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 21985 rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 21986 afectrlOverride1_save = read_phy_reg(pi, 0x8f); 21987 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21988 rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 21989 rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 21990 } else { 21991 afectrlOverride1_save = read_phy_reg(pi, 0xa5); 21992 rfctrlcmd_save = read_phy_reg(pi, 0x78); 21993 rfctrloverride_save = read_phy_reg(pi, 0xec); 21994 rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); 21995 rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); 21996 } 21997 21998 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 21999 22000 gpiosel_orig = read_phy_reg(pi, 0xca); 22001 if (NREV_LT(pi->pubpi.phy_rev, 2)) 22002 write_phy_reg(pi, 0xca, 5); 22003 22004 for (ctr = 0; ctr < 4; ctr++) 22005 rssi_buf[ctr] = 0; 22006 22007 for (samp = 0; samp < nsamps; samp++) { 22008 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 22009 rssi0 = read_phy_reg(pi, 0x1c9); 22010 rssi1 = read_phy_reg(pi, 0x1ca); 22011 } else { 22012 rssi0 = read_phy_reg(pi, 0x219); 22013 rssi1 = read_phy_reg(pi, 0x21a); 22014 } 22015 22016 ctr = 0; 22017 tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; 22018 tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; 22019 tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; 22020 tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; 22021 22022 for (ctr = 0; ctr < 4; ctr++) 22023 rssi_buf[ctr] += tmp_buf[ctr]; 22024 22025 } 22026 22027 rssi_out_val = rssi_buf[3] & 0xff; 22028 rssi_out_val |= (rssi_buf[2] & 0xff) << 8; 22029 rssi_out_val |= (rssi_buf[1] & 0xff) << 16; 22030 rssi_out_val |= (rssi_buf[0] & 0xff) << 24; 22031 22032 if (NREV_LT(pi->pubpi.phy_rev, 2)) 22033 write_phy_reg(pi, 0xca, gpiosel_orig); 22034 22035 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22036 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22037 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22038 write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); 22039 write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); 22040 write_phy_reg(pi, 0x8f, afectrlOverride1_save); 22041 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22042 write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); 22043 write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); 22044 } else { 22045 write_phy_reg(pi, 0xa5, afectrlOverride1_save); 22046 write_phy_reg(pi, 0x78, rfctrlcmd_save); 22047 write_phy_reg(pi, 0xec, rfctrloverride_save); 22048 write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); 22049 write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); 22050 } 22051 22052 return rssi_out_val; 22053 } 22054 22055 s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi) 22056 { 22057 u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; 22058 u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; 22059 u16 pwrdet_rxtx_core1_save; 22060 u16 pwrdet_rxtx_core2_save; 22061 u16 afectrlCore1_save; 22062 u16 afectrlCore2_save; 22063 u16 afectrlOverride_save; 22064 u16 afectrlOverride2_save; 22065 u16 pd_pll_ts_save; 22066 u16 gpioSel_save; 22067 s32 radio_temp[4]; 22068 s32 radio_temp2[4]; 22069 u16 syn_tempprocsense_save; 22070 s16 offset = 0; 22071 22072 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22073 u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; 22074 u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; 22075 u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; 22076 s32 auxADC_Vl; 22077 u16 RfctrlOverride5_save, RfctrlOverride6_save; 22078 u16 RfctrlMiscReg5_save, RfctrlMiscReg6_save; 22079 u16 RSSIMultCoef0QPowerDet_save; 22080 u16 tempsense_Rcal; 22081 22082 syn_tempprocsense_save = 22083 read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); 22084 22085 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22086 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22087 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22088 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22089 RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); 22090 RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22091 RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22092 RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22093 RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22094 22095 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22096 &auxADC_Vmid_save); 22097 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22098 &auxADC_Av_save); 22099 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22100 &auxADC_rssi_ctrlL_save); 22101 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22102 &auxADC_rssi_ctrlH_save); 22103 22104 write_phy_reg(pi, 0x1ae, 0x0); 22105 22106 auxADC_rssi_ctrlL = 0x0; 22107 auxADC_rssi_ctrlH = 0x20; 22108 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22109 &auxADC_rssi_ctrlL); 22110 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22111 &auxADC_rssi_ctrlH); 22112 22113 tempsense_Rcal = syn_tempprocsense_save & 0x1c; 22114 22115 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22116 tempsense_Rcal | 0x01); 22117 22118 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 22119 1, 0, 0, 22120 NPHY_REV7_RFCTRLOVERRIDE_ID2); 22121 mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); 22122 mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); 22123 mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); 22124 mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); 22125 22126 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 22127 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 22128 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 22129 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 22130 udelay(5); 22131 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 22132 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 22133 mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); 22134 mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); 22135 mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); 22136 mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); 22137 mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); 22138 mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); 22139 mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); 22140 mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); 22141 22142 auxADC_Vmid = 0xA3; 22143 auxADC_Av = 0x0; 22144 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22145 &auxADC_Vmid); 22146 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22147 &auxADC_Av); 22148 22149 udelay(3); 22150 22151 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22152 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22153 tempsense_Rcal | 0x03); 22154 22155 udelay(5); 22156 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22157 22158 auxADC_Av = 0x7; 22159 if (radio_temp[1] + radio_temp2[1] < -30) { 22160 auxADC_Vmid = 0x45; 22161 auxADC_Vl = 263; 22162 } else if (radio_temp[1] + radio_temp2[1] < -9) { 22163 auxADC_Vmid = 0x200; 22164 auxADC_Vl = 467; 22165 } else if (radio_temp[1] + radio_temp2[1] < 11) { 22166 auxADC_Vmid = 0x266; 22167 auxADC_Vl = 634; 22168 } else { 22169 auxADC_Vmid = 0x2D5; 22170 auxADC_Vl = 816; 22171 } 22172 22173 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22174 &auxADC_Vmid); 22175 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22176 &auxADC_Av); 22177 22178 udelay(3); 22179 22180 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22181 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22182 tempsense_Rcal | 0x01); 22183 22184 udelay(5); 22185 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22186 22187 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22188 syn_tempprocsense_save); 22189 22190 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22191 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22192 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22193 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22194 write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); 22195 write_phy_reg(pi, 0x346, RfctrlOverride5_save); 22196 write_phy_reg(pi, 0x347, RfctrlOverride6_save); 22197 write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); 22198 write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); 22199 22200 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22201 &auxADC_Vmid_save); 22202 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22203 &auxADC_Av_save); 22204 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22205 &auxADC_rssi_ctrlL_save); 22206 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22207 &auxADC_rssi_ctrlH_save); 22208 22209 if (pi->sh->chip == BCMA_CHIP_ID_BCM5357) { 22210 radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) 22211 + 88 * (auxADC_Vl) - 27111 + 22212 128) / 256; 22213 } else { 22214 radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) 22215 + 82 * (auxADC_Vl) - 28861 + 22216 128) / 256; 22217 } 22218 22219 offset = (s16) pi->phy_tempsense_offset; 22220 22221 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22222 syn_tempprocsense_save = 22223 read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); 22224 22225 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22226 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22227 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22228 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22229 gpioSel_save = read_phy_reg(pi, 0xca); 22230 22231 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22232 22233 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22234 if (NREV_LT(pi->pubpi.phy_rev, 7)) 22235 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); 22236 22237 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22238 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22239 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); 22240 else 22241 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22242 22243 radio_temp[0] = 22244 (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; 22245 22246 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 22247 syn_tempprocsense_save); 22248 22249 write_phy_reg(pi, 0xca, gpioSel_save); 22250 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22251 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22252 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22253 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22254 22255 offset = (s16) pi->phy_tempsense_offset; 22256 } else { 22257 22258 pwrdet_rxtx_core1_save = 22259 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 22260 pwrdet_rxtx_core2_save = 22261 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 22262 core1_txrf_iqcal1_save = 22263 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 22264 core1_txrf_iqcal2_save = 22265 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 22266 core2_txrf_iqcal1_save = 22267 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 22268 core2_txrf_iqcal2_save = 22269 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 22270 pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); 22271 22272 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22273 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22274 afectrlOverride_save = read_phy_reg(pi, 0xa5); 22275 gpioSel_save = read_phy_reg(pi, 0xca); 22276 22277 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); 22278 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); 22279 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); 22280 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); 22281 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 22282 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 22283 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); 22284 22285 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22286 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22287 22288 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22289 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22290 22291 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22292 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22293 22294 radio_temp[0] = (radio_temp[0] + radio_temp2[0]); 22295 radio_temp[1] = (radio_temp[1] + radio_temp2[1]); 22296 radio_temp[2] = (radio_temp[2] + radio_temp2[2]); 22297 radio_temp[3] = (radio_temp[3] + radio_temp2[3]); 22298 22299 radio_temp[0] = 22300 (radio_temp[0] + radio_temp[1] + radio_temp[2] + 22301 radio_temp[3]); 22302 22303 radio_temp[0] = 22304 (radio_temp[0] + 22305 (8 * 32)) * (950 - 350) / 63 + (350 * 8); 22306 22307 radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; 22308 22309 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 22310 pwrdet_rxtx_core1_save); 22311 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 22312 pwrdet_rxtx_core2_save); 22313 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 22314 core1_txrf_iqcal1_save); 22315 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 22316 core2_txrf_iqcal1_save); 22317 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 22318 core1_txrf_iqcal2_save); 22319 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 22320 core2_txrf_iqcal2_save); 22321 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); 22322 22323 write_phy_reg(pi, 0xca, gpioSel_save); 22324 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22325 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22326 write_phy_reg(pi, 0xa5, afectrlOverride_save); 22327 } 22328 22329 return (s16) radio_temp[0] + offset; 22330 } 22331 22332 static void 22333 wlc_phy_set_rssi_2055_vcm(struct brcms_phy *pi, u8 rssi_type, u8 *vcm_buf) 22334 { 22335 u8 core; 22336 22337 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22338 if (rssi_type == NPHY_RSSI_SEL_NB) { 22339 if (core == PHY_CORE_0) { 22340 mod_radio_reg(pi, 22341 RADIO_2055_CORE1_B0_NBRSSI_VCM, 22342 RADIO_2055_NBRSSI_VCM_I_MASK, 22343 vcm_buf[2 * 22344 core] << 22345 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22346 mod_radio_reg(pi, 22347 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22348 RADIO_2055_NBRSSI_VCM_Q_MASK, 22349 vcm_buf[2 * core + 22350 1] << 22351 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22352 } else { 22353 mod_radio_reg(pi, 22354 RADIO_2055_CORE2_B0_NBRSSI_VCM, 22355 RADIO_2055_NBRSSI_VCM_I_MASK, 22356 vcm_buf[2 * 22357 core] << 22358 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22359 mod_radio_reg(pi, 22360 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22361 RADIO_2055_NBRSSI_VCM_Q_MASK, 22362 vcm_buf[2 * core + 22363 1] << 22364 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22365 } 22366 } else { 22367 if (core == PHY_CORE_0) 22368 mod_radio_reg(pi, 22369 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22370 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22371 vcm_buf[2 * 22372 core] << 22373 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22374 else 22375 mod_radio_reg(pi, 22376 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22377 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22378 vcm_buf[2 * 22379 core] << 22380 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22381 } 22382 } 22383 } 22384 22385 static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi) 22386 { 22387 u16 classif_state; 22388 u16 clip_state[2]; 22389 u16 clip_off[] = { 0xffff, 0xffff }; 22390 s32 target_code; 22391 u8 vcm, min_vcm; 22392 u8 vcm_final = 0; 22393 u8 result_idx; 22394 s32 poll_results[8][4] = { 22395 {0, 0, 0, 0}, 22396 {0, 0, 0, 0}, 22397 {0, 0, 0, 0}, 22398 {0, 0, 0, 0}, 22399 {0, 0, 0, 0}, 22400 {0, 0, 0, 0}, 22401 {0, 0, 0, 0}, 22402 {0, 0, 0, 0} 22403 }; 22404 s32 poll_result_core[4] = { 0, 0, 0, 0 }; 22405 s32 min_d = NPHY_RSSICAL_MAXD, curr_d; 22406 s32 fine_digital_offset[4]; 22407 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22408 s32 min_poll; 22409 u8 vcm_level_max; 22410 u8 core; 22411 u8 wb_cnt; 22412 u8 rssi_type; 22413 u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; 22414 u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; 22415 u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; 22416 u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; 22417 u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; 22418 u16 NPHY_RfctrlCmd_save; 22419 u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; 22420 u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; 22421 u8 rxcore_state; 22422 u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; 22423 u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; 22424 u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; 22425 u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; 22426 22427 NPHY_REV7_RfctrlOverride3_save = 22428 NPHY_REV7_RfctrlOverride4_save = 22429 NPHY_REV7_RfctrlOverride5_save = 22430 NPHY_REV7_RfctrlOverride6_save = 22431 NPHY_REV7_RfctrlMiscReg3_save = 22432 NPHY_REV7_RfctrlMiscReg4_save = 22433 NPHY_REV7_RfctrlMiscReg5_save = 22434 NPHY_REV7_RfctrlMiscReg6_save = 0; 22435 22436 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22437 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22438 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22439 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22440 22441 NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); 22442 NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); 22443 NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); 22444 NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); 22445 NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); 22446 NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); 22447 NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); 22448 NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); 22449 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22450 NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); 22451 NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); 22452 NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22453 NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22454 } 22455 NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 22456 NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 22457 NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); 22458 NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 22459 NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 22460 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22461 NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); 22462 NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); 22463 NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22464 NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22465 } 22466 NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); 22467 NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); 22468 22469 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, 22470 RADIO_MIMO_CORESEL_ALLRXTX); 22471 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, 22472 RADIO_MIMO_CORESEL_ALLRXTX); 22473 22474 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22475 wlc_phy_rfctrl_override_1tomany_nphy( 22476 pi, 22477 NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, 22478 0, 0, 0); 22479 else 22480 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); 22481 22482 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22483 wlc_phy_rfctrl_override_1tomany_nphy( 22484 pi, 22485 NPHY_REV7_RfctrlOverride_cmd_rx_pu, 22486 1, 0, 0); 22487 else 22488 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); 22489 22490 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22491 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 22492 1, 0, 0, 22493 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22494 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, 22495 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22496 } else { 22497 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); 22498 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); 22499 } 22500 22501 if (CHSPEC_IS5G(pi->radio_chanspec)) { 22502 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22503 wlc_phy_rfctrl_override_nphy_rev7( 22504 pi, (0x1 << 5), 22505 0, 0, 0, 22506 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22507 wlc_phy_rfctrl_override_nphy_rev7( 22508 pi, (0x1 << 4), 1, 0, 22509 0, 22510 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22511 } else { 22512 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); 22513 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); 22514 } 22515 22516 } else { 22517 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22518 wlc_phy_rfctrl_override_nphy_rev7( 22519 pi, (0x1 << 4), 22520 0, 0, 0, 22521 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22522 wlc_phy_rfctrl_override_nphy_rev7( 22523 pi, (0x1 << 5), 1, 0, 22524 0, 22525 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22526 } else { 22527 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); 22528 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); 22529 } 22530 } 22531 22532 rxcore_state = wlc_phy_rxcore_getstate_nphy( 22533 (struct brcms_phy_pub *) pi); 22534 22535 vcm_level_max = 8; 22536 22537 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22538 22539 if ((rxcore_state & (1 << core)) == 0) 22540 continue; 22541 22542 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22543 core == 22544 PHY_CORE_0 ? 22545 RADIO_MIMO_CORESEL_CORE1 : 22546 RADIO_MIMO_CORESEL_CORE2, 22547 NPHY_RAIL_I, NPHY_RSSI_SEL_NB); 22548 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22549 core == 22550 PHY_CORE_0 ? 22551 RADIO_MIMO_CORESEL_CORE1 : 22552 RADIO_MIMO_CORESEL_CORE2, 22553 NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); 22554 22555 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22556 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22557 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22558 RADIO_2057_NB_MASTER_CORE0 : 22559 RADIO_2057_NB_MASTER_CORE1, 22560 RADIO_2057_VCM_MASK, vcm); 22561 else 22562 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22563 ((core == 22564 PHY_CORE_0) ? RADIO_2056_RX0 : 22565 RADIO_2056_RX1), 22566 RADIO_2056_VCM_MASK, 22567 vcm << RADIO_2056_RSSI_VCM_SHIFT); 22568 22569 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, 22570 &poll_results[vcm][0], 22571 NPHY_RSSICAL_NPOLL); 22572 } 22573 22574 for (result_idx = 0; result_idx < 4; result_idx++) { 22575 if ((core == result_idx / 2) && 22576 (result_idx % 2 == 0)) { 22577 22578 min_d = NPHY_RSSICAL_MAXD; 22579 min_vcm = 0; 22580 min_poll = 22581 NPHY_RSSICAL_MAXREAD * 22582 NPHY_RSSICAL_NPOLL + 1; 22583 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22584 curr_d = 22585 poll_results[vcm][result_idx] * 22586 poll_results[vcm][result_idx] + 22587 poll_results[vcm][result_idx + 22588 1] * 22589 poll_results[vcm][result_idx + 22590 1]; 22591 if (curr_d < min_d) { 22592 min_d = curr_d; 22593 min_vcm = vcm; 22594 } 22595 if (poll_results[vcm][result_idx] < 22596 min_poll) 22597 min_poll = 22598 poll_results[vcm] 22599 [result_idx]; 22600 } 22601 vcm_final = min_vcm; 22602 poll_results_min[result_idx] = min_poll; 22603 } 22604 } 22605 22606 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22607 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22608 RADIO_2057_NB_MASTER_CORE0 : 22609 RADIO_2057_NB_MASTER_CORE1, 22610 RADIO_2057_VCM_MASK, vcm_final); 22611 else 22612 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22613 ((core == 22614 PHY_CORE_0) ? RADIO_2056_RX0 : 22615 RADIO_2056_RX1), RADIO_2056_VCM_MASK, 22616 vcm_final << RADIO_2056_RSSI_VCM_SHIFT); 22617 22618 for (result_idx = 0; result_idx < 4; result_idx++) { 22619 if (core == result_idx / 2) { 22620 fine_digital_offset[result_idx] = 22621 (NPHY_RSSICAL_NB_TARGET * 22622 NPHY_RSSICAL_NPOLL) - 22623 poll_results[vcm_final][result_idx]; 22624 if (fine_digital_offset[result_idx] < 0) { 22625 fine_digital_offset[result_idx] = 22626 abs(fine_digital_offset 22627 [result_idx]); 22628 fine_digital_offset[result_idx] += 22629 (NPHY_RSSICAL_NPOLL / 2); 22630 fine_digital_offset[result_idx] /= 22631 NPHY_RSSICAL_NPOLL; 22632 fine_digital_offset[result_idx] = 22633 -fine_digital_offset[ 22634 result_idx]; 22635 } else { 22636 fine_digital_offset[result_idx] += 22637 (NPHY_RSSICAL_NPOLL / 2); 22638 fine_digital_offset[result_idx] /= 22639 NPHY_RSSICAL_NPOLL; 22640 } 22641 22642 if (poll_results_min[result_idx] == 22643 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22644 fine_digital_offset[result_idx] = 22645 (NPHY_RSSICAL_NB_TARGET - 22646 NPHY_RSSICAL_MAXREAD - 1); 22647 22648 wlc_phy_scale_offset_rssi_nphy( 22649 pi, 0x0, 22650 (s8) 22651 fine_digital_offset 22652 [result_idx], 22653 (result_idx / 2 == 0) ? 22654 RADIO_MIMO_CORESEL_CORE1 : 22655 RADIO_MIMO_CORESEL_CORE2, 22656 (result_idx % 2 == 0) ? 22657 NPHY_RAIL_I : NPHY_RAIL_Q, 22658 NPHY_RSSI_SEL_NB); 22659 } 22660 } 22661 22662 } 22663 22664 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22665 22666 if ((rxcore_state & (1 << core)) == 0) 22667 continue; 22668 22669 for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { 22670 if (wb_cnt == 0) { 22671 rssi_type = NPHY_RSSI_SEL_W1; 22672 target_code = NPHY_RSSICAL_W1_TARGET_REV3; 22673 } else { 22674 rssi_type = NPHY_RSSI_SEL_W2; 22675 target_code = NPHY_RSSICAL_W2_TARGET_REV3; 22676 } 22677 22678 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22679 core == 22680 PHY_CORE_0 ? 22681 RADIO_MIMO_CORESEL_CORE1 22682 : 22683 RADIO_MIMO_CORESEL_CORE2, 22684 NPHY_RAIL_I, rssi_type); 22685 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22686 core == 22687 PHY_CORE_0 ? 22688 RADIO_MIMO_CORESEL_CORE1 22689 : 22690 RADIO_MIMO_CORESEL_CORE2, 22691 NPHY_RAIL_Q, rssi_type); 22692 22693 wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, 22694 NPHY_RSSICAL_NPOLL); 22695 22696 for (result_idx = 0; result_idx < 4; result_idx++) { 22697 if (core == result_idx / 2) { 22698 fine_digital_offset[result_idx] = 22699 (target_code * 22700 NPHY_RSSICAL_NPOLL) - 22701 poll_result_core[result_idx]; 22702 if (fine_digital_offset[result_idx] < 22703 0) { 22704 fine_digital_offset[result_idx] 22705 = abs( 22706 fine_digital_offset 22707 [result_idx]); 22708 fine_digital_offset[result_idx] 22709 += (NPHY_RSSICAL_NPOLL 22710 / 2); 22711 fine_digital_offset[result_idx] 22712 /= NPHY_RSSICAL_NPOLL; 22713 fine_digital_offset[result_idx] 22714 = -fine_digital_offset 22715 [result_idx]; 22716 } else { 22717 fine_digital_offset[result_idx] 22718 += (NPHY_RSSICAL_NPOLL 22719 / 2); 22720 fine_digital_offset[result_idx] 22721 /= NPHY_RSSICAL_NPOLL; 22722 } 22723 22724 wlc_phy_scale_offset_rssi_nphy( 22725 pi, 0x0, 22726 (s8) 22727 fine_digital_offset 22728 [core * 22729 2], 22730 (core == PHY_CORE_0) ? 22731 RADIO_MIMO_CORESEL_CORE1 : 22732 RADIO_MIMO_CORESEL_CORE2, 22733 (result_idx % 2 == 0) ? 22734 NPHY_RAIL_I : 22735 NPHY_RAIL_Q, 22736 rssi_type); 22737 } 22738 } 22739 22740 } 22741 } 22742 22743 write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); 22744 write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); 22745 22746 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 22747 22748 mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); 22749 mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); 22750 mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); 22751 22752 mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); 22753 mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); 22754 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 22755 22756 write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); 22757 write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); 22758 write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); 22759 write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); 22760 write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); 22761 write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); 22762 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22763 write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); 22764 write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); 22765 write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); 22766 write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); 22767 } 22768 write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); 22769 write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); 22770 write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); 22771 write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); 22772 write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); 22773 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22774 write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); 22775 write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); 22776 write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); 22777 write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); 22778 } 22779 write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); 22780 write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); 22781 22782 if (CHSPEC_IS2G(pi->radio_chanspec)) { 22783 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22784 pi->rssical_cache.rssical_radio_regs_2G[0] = 22785 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22786 pi->rssical_cache.rssical_radio_regs_2G[1] = 22787 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22788 } else { 22789 pi->rssical_cache.rssical_radio_regs_2G[0] = 22790 read_radio_reg(pi, 22791 RADIO_2056_RX_RSSI_MISC | 22792 RADIO_2056_RX0); 22793 pi->rssical_cache.rssical_radio_regs_2G[1] = 22794 read_radio_reg(pi, 22795 RADIO_2056_RX_RSSI_MISC | 22796 RADIO_2056_RX1); 22797 } 22798 22799 pi->rssical_cache.rssical_phyregs_2G[0] = 22800 read_phy_reg(pi, 0x1a6); 22801 pi->rssical_cache.rssical_phyregs_2G[1] = 22802 read_phy_reg(pi, 0x1ac); 22803 pi->rssical_cache.rssical_phyregs_2G[2] = 22804 read_phy_reg(pi, 0x1b2); 22805 pi->rssical_cache.rssical_phyregs_2G[3] = 22806 read_phy_reg(pi, 0x1b8); 22807 pi->rssical_cache.rssical_phyregs_2G[4] = 22808 read_phy_reg(pi, 0x1a4); 22809 pi->rssical_cache.rssical_phyregs_2G[5] = 22810 read_phy_reg(pi, 0x1aa); 22811 pi->rssical_cache.rssical_phyregs_2G[6] = 22812 read_phy_reg(pi, 0x1b0); 22813 pi->rssical_cache.rssical_phyregs_2G[7] = 22814 read_phy_reg(pi, 0x1b6); 22815 pi->rssical_cache.rssical_phyregs_2G[8] = 22816 read_phy_reg(pi, 0x1a5); 22817 pi->rssical_cache.rssical_phyregs_2G[9] = 22818 read_phy_reg(pi, 0x1ab); 22819 pi->rssical_cache.rssical_phyregs_2G[10] = 22820 read_phy_reg(pi, 0x1b1); 22821 pi->rssical_cache.rssical_phyregs_2G[11] = 22822 read_phy_reg(pi, 0x1b7); 22823 22824 pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; 22825 } else { 22826 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22827 pi->rssical_cache.rssical_radio_regs_5G[0] = 22828 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22829 pi->rssical_cache.rssical_radio_regs_5G[1] = 22830 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22831 } else { 22832 pi->rssical_cache.rssical_radio_regs_5G[0] = 22833 read_radio_reg(pi, 22834 RADIO_2056_RX_RSSI_MISC | 22835 RADIO_2056_RX0); 22836 pi->rssical_cache.rssical_radio_regs_5G[1] = 22837 read_radio_reg(pi, 22838 RADIO_2056_RX_RSSI_MISC | 22839 RADIO_2056_RX1); 22840 } 22841 22842 pi->rssical_cache.rssical_phyregs_5G[0] = 22843 read_phy_reg(pi, 0x1a6); 22844 pi->rssical_cache.rssical_phyregs_5G[1] = 22845 read_phy_reg(pi, 0x1ac); 22846 pi->rssical_cache.rssical_phyregs_5G[2] = 22847 read_phy_reg(pi, 0x1b2); 22848 pi->rssical_cache.rssical_phyregs_5G[3] = 22849 read_phy_reg(pi, 0x1b8); 22850 pi->rssical_cache.rssical_phyregs_5G[4] = 22851 read_phy_reg(pi, 0x1a4); 22852 pi->rssical_cache.rssical_phyregs_5G[5] = 22853 read_phy_reg(pi, 0x1aa); 22854 pi->rssical_cache.rssical_phyregs_5G[6] = 22855 read_phy_reg(pi, 0x1b0); 22856 pi->rssical_cache.rssical_phyregs_5G[7] = 22857 read_phy_reg(pi, 0x1b6); 22858 pi->rssical_cache.rssical_phyregs_5G[8] = 22859 read_phy_reg(pi, 0x1a5); 22860 pi->rssical_cache.rssical_phyregs_5G[9] = 22861 read_phy_reg(pi, 0x1ab); 22862 pi->rssical_cache.rssical_phyregs_5G[10] = 22863 read_phy_reg(pi, 0x1b1); 22864 pi->rssical_cache.rssical_phyregs_5G[11] = 22865 read_phy_reg(pi, 0x1b7); 22866 22867 pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; 22868 } 22869 22870 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22871 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22872 } 22873 22874 static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type) 22875 { 22876 s32 target_code; 22877 u16 classif_state; 22878 u16 clip_state[2]; 22879 u16 rssi_ctrl_state[2], pd_state[2]; 22880 u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; 22881 u16 rfctrlintc_override_val; 22882 u16 clip_off[] = { 0xffff, 0xffff }; 22883 u16 rf_pd_val, pd_mask, rssi_ctrl_mask; 22884 u8 vcm, min_vcm, vcm_tmp[4]; 22885 u8 vcm_final[4] = { 0, 0, 0, 0 }; 22886 u8 result_idx, ctr; 22887 s32 poll_results[4][4] = { 22888 {0, 0, 0, 0}, 22889 {0, 0, 0, 0}, 22890 {0, 0, 0, 0}, 22891 {0, 0, 0, 0} 22892 }; 22893 s32 poll_miniq[4][2] = { 22894 {0, 0}, 22895 {0, 0}, 22896 {0, 0}, 22897 {0, 0} 22898 }; 22899 s32 min_d, curr_d; 22900 s32 fine_digital_offset[4]; 22901 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22902 s32 min_poll; 22903 22904 switch (rssi_type) { 22905 case NPHY_RSSI_SEL_NB: 22906 target_code = NPHY_RSSICAL_NB_TARGET; 22907 break; 22908 case NPHY_RSSI_SEL_W1: 22909 target_code = NPHY_RSSICAL_W1_TARGET; 22910 break; 22911 case NPHY_RSSI_SEL_W2: 22912 target_code = NPHY_RSSICAL_W2_TARGET; 22913 break; 22914 default: 22915 return; 22916 } 22917 22918 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22919 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22920 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22921 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22922 22923 rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; 22924 rfctrlintc_override_val = 22925 CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; 22926 22927 rfctrlintc_state[0] = read_phy_reg(pi, 0x91); 22928 rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); 22929 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 22930 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); 22931 22932 rfctrlintc_state[1] = read_phy_reg(pi, 0x92); 22933 rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); 22934 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 22935 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); 22936 22937 pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | 22938 RADIO_2055_WBRSSI_G2_PD; 22939 pd_state[0] = 22940 read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; 22941 pd_state[1] = 22942 read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; 22943 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); 22944 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); 22945 rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | 22946 RADIO_2055_WBRSSI_G2_SEL; 22947 rssi_ctrl_state[0] = 22948 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; 22949 rssi_ctrl_state[1] = 22950 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; 22951 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 22952 22953 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22954 NPHY_RAIL_I, rssi_type); 22955 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22956 NPHY_RAIL_Q, rssi_type); 22957 22958 for (vcm = 0; vcm < 4; vcm++) { 22959 22960 vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; 22961 if (rssi_type != NPHY_RSSI_SEL_W2) 22962 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); 22963 22964 wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], 22965 NPHY_RSSICAL_NPOLL); 22966 22967 if ((rssi_type == NPHY_RSSI_SEL_W1) 22968 || (rssi_type == NPHY_RSSI_SEL_W2)) { 22969 for (ctr = 0; ctr < 2; ctr++) 22970 poll_miniq[vcm][ctr] = 22971 min(poll_results[vcm][ctr * 2 + 0], 22972 poll_results[vcm][ctr * 2 + 1]); 22973 } 22974 } 22975 22976 for (result_idx = 0; result_idx < 4; result_idx++) { 22977 min_d = NPHY_RSSICAL_MAXD; 22978 min_vcm = 0; 22979 min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; 22980 for (vcm = 0; vcm < 4; vcm++) { 22981 curr_d = abs(((rssi_type == NPHY_RSSI_SEL_NB) ? 22982 poll_results[vcm][result_idx] : 22983 poll_miniq[vcm][result_idx / 2]) - 22984 (target_code * NPHY_RSSICAL_NPOLL)); 22985 if (curr_d < min_d) { 22986 min_d = curr_d; 22987 min_vcm = vcm; 22988 } 22989 if (poll_results[vcm][result_idx] < min_poll) 22990 min_poll = poll_results[vcm][result_idx]; 22991 } 22992 vcm_final[result_idx] = min_vcm; 22993 poll_results_min[result_idx] = min_poll; 22994 } 22995 22996 if (rssi_type != NPHY_RSSI_SEL_W2) 22997 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); 22998 22999 for (result_idx = 0; result_idx < 4; result_idx++) { 23000 fine_digital_offset[result_idx] = 23001 (target_code * NPHY_RSSICAL_NPOLL) - 23002 poll_results[vcm_final[result_idx]][result_idx]; 23003 if (fine_digital_offset[result_idx] < 0) { 23004 fine_digital_offset[result_idx] = 23005 abs(fine_digital_offset[result_idx]); 23006 fine_digital_offset[result_idx] += 23007 (NPHY_RSSICAL_NPOLL / 2); 23008 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 23009 fine_digital_offset[result_idx] = 23010 -fine_digital_offset[result_idx]; 23011 } else { 23012 fine_digital_offset[result_idx] += 23013 (NPHY_RSSICAL_NPOLL / 2); 23014 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 23015 } 23016 23017 if (poll_results_min[result_idx] == 23018 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 23019 fine_digital_offset[result_idx] = 23020 (target_code - NPHY_RSSICAL_MAXREAD - 1); 23021 23022 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 23023 (s8) 23024 fine_digital_offset[result_idx], 23025 (result_idx / 2 == 23026 0) ? RADIO_MIMO_CORESEL_CORE1 : 23027 RADIO_MIMO_CORESEL_CORE2, 23028 (result_idx % 2 == 23029 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, 23030 rssi_type); 23031 } 23032 23033 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); 23034 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); 23035 if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) 23036 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 23037 NPHY_RSSI_SEL_NB); 23038 else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) 23039 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 23040 NPHY_RSSI_SEL_W1); 23041 else /* RADIO_2055_WBRSSI_G2_SEL */ 23042 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 23043 NPHY_RSSI_SEL_W2); 23044 if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) 23045 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 23046 NPHY_RSSI_SEL_NB); 23047 else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) 23048 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 23049 NPHY_RSSI_SEL_W1); 23050 else /* RADIO_2055_WBRSSI_G1_SEL */ 23051 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 23052 NPHY_RSSI_SEL_W2); 23053 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); 23054 23055 write_phy_reg(pi, 0x91, rfctrlintc_state[0]); 23056 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); 23057 write_phy_reg(pi, 0x92, rfctrlintc_state[1]); 23058 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); 23059 23060 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 23061 wlc_phy_clip_det_nphy(pi, 1, clip_state); 23062 23063 wlc_phy_resetcca_nphy(pi); 23064 } 23065 23066 void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi) 23067 { 23068 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23069 wlc_phy_rssi_cal_nphy_rev3(pi); 23070 } else { 23071 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); 23072 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); 23073 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); 23074 } 23075 } 23076 23077 int 23078 wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct d11rxhdr *rxh) 23079 { 23080 s16 rxpwr, rxpwr0, rxpwr1; 23081 s16 phyRx0_l, phyRx2_l; 23082 23083 rxpwr = 0; 23084 rxpwr0 = rxh->PhyRxStatus_1 & PRXS1_nphy_PWR0_MASK; 23085 rxpwr1 = (rxh->PhyRxStatus_1 & PRXS1_nphy_PWR1_MASK) >> 8; 23086 23087 if (rxpwr0 > 127) 23088 rxpwr0 -= 256; 23089 if (rxpwr1 > 127) 23090 rxpwr1 -= 256; 23091 23092 phyRx0_l = rxh->PhyRxStatus_0 & 0x00ff; 23093 phyRx2_l = rxh->PhyRxStatus_2 & 0x00ff; 23094 if (phyRx2_l > 127) 23095 phyRx2_l -= 256; 23096 23097 if (((rxpwr0 == 16) || (rxpwr0 == 32))) { 23098 rxpwr0 = rxpwr1; 23099 rxpwr1 = phyRx2_l; 23100 } 23101 23102 if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) 23103 rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; 23104 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) 23105 rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; 23106 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) 23107 rxpwr = (rxpwr0 + rxpwr1) >> 1; 23108 23109 return rxpwr; 23110 } 23111 23112 static void 23113 wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, struct cordic_iq *tone_buf, 23114 u16 num_samps) 23115 { 23116 u16 t; 23117 u32 *data_buf = NULL; 23118 23119 data_buf = kmalloc(sizeof(u32) * num_samps, GFP_ATOMIC); 23120 if (data_buf == NULL) 23121 return; 23122 23123 if (pi->phyhang_avoid) 23124 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23125 23126 for (t = 0; t < num_samps; t++) 23127 data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | 23128 (((unsigned int)tone_buf[t].q) & 0x3ff); 23129 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, 23130 data_buf); 23131 23132 kfree(data_buf); 23133 23134 if (pi->phyhang_avoid) 23135 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23136 } 23137 23138 static u16 23139 wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23140 u8 dac_test_mode) 23141 { 23142 u8 phy_bw, is_phybw40; 23143 u16 num_samps, t, spur; 23144 s32 theta = 0, rot = 0; 23145 u32 tbl_len; 23146 struct cordic_iq *tone_buf = NULL; 23147 23148 is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); 23149 phy_bw = (is_phybw40 == 1) ? 40 : 20; 23150 tbl_len = (phy_bw << 3); 23151 23152 if (dac_test_mode == 1) { 23153 spur = read_phy_reg(pi, 0x01); 23154 spur = (spur >> 15) & 1; 23155 phy_bw = (spur == 1) ? 82 : 80; 23156 phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; 23157 23158 tbl_len = (phy_bw << 1); 23159 } 23160 23161 tone_buf = kmalloc(sizeof(struct cordic_iq) * tbl_len, GFP_ATOMIC); 23162 if (tone_buf == NULL) 23163 return 0; 23164 23165 num_samps = (u16) tbl_len; 23166 rot = ((f_kHz * 36) / phy_bw) / 100; 23167 theta = 0; 23168 23169 for (t = 0; t < num_samps; t++) { 23170 23171 tone_buf[t] = cordic_calc_iq(theta); 23172 23173 theta += rot; 23174 23175 tone_buf[t].q = (s32) FLOAT(tone_buf[t].q * max_val); 23176 tone_buf[t].i = (s32) FLOAT(tone_buf[t].i * max_val); 23177 } 23178 23179 wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); 23180 23181 kfree(tone_buf); 23182 23183 return num_samps; 23184 } 23185 23186 static void 23187 wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 num_samps, u16 loops, 23188 u16 wait, u8 iqmode, u8 dac_test_mode, 23189 bool modify_bbmult) 23190 { 23191 u16 bb_mult; 23192 u8 phy_bw, sample_cmd; 23193 u16 orig_RfseqCoreActv; 23194 u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4, lpf_bw_ctl_miscreg3, 23195 lpf_bw_ctl_miscreg4; 23196 23197 if (pi->phyhang_avoid) 23198 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23199 23200 phy_bw = 20; 23201 if (CHSPEC_IS40(pi->radio_chanspec)) 23202 phy_bw = 40; 23203 23204 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23205 23206 lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); 23207 lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); 23208 if (lpf_bw_ctl_override3 | lpf_bw_ctl_override4) { 23209 lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & 23210 (0x7 << 8); 23211 lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & 23212 (0x7 << 8); 23213 } else { 23214 wlc_phy_rfctrl_override_nphy_rev7( 23215 pi, 23216 (0x1 << 7), 23217 wlc_phy_read_lpf_bw_ctl_nphy 23218 (pi, 23219 0), 0, 0, 23220 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23221 23222 pi->nphy_sample_play_lpf_bw_ctl_ovr = true; 23223 23224 lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & 23225 (0x7 << 8); 23226 lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & 23227 (0x7 << 8); 23228 } 23229 } 23230 23231 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { 23232 23233 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23234 &bb_mult); 23235 pi->nphy_bb_mult_save = 23236 BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); 23237 } 23238 23239 if (modify_bbmult) { 23240 bb_mult = (phy_bw == 20) ? 100 : 71; 23241 bb_mult = (bb_mult << 8) + bb_mult; 23242 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23243 &bb_mult); 23244 } 23245 23246 if (pi->phyhang_avoid) 23247 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23248 23249 write_phy_reg(pi, 0xc6, num_samps - 1); 23250 23251 if (loops != 0xffff) 23252 write_phy_reg(pi, 0xc4, loops - 1); 23253 else 23254 write_phy_reg(pi, 0xc4, loops); 23255 23256 write_phy_reg(pi, 0xc5, wait); 23257 23258 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 23259 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 23260 if (iqmode) { 23261 23262 and_phy_reg(pi, 0xc2, 0x7FFF); 23263 23264 or_phy_reg(pi, 0xc2, 0x8000); 23265 } else { 23266 23267 sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; 23268 write_phy_reg(pi, 0xc3, sample_cmd); 23269 } 23270 23271 SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); 23272 23273 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 23274 } 23275 23276 int 23277 wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23278 u8 iqmode, u8 dac_test_mode, bool modify_bbmult) 23279 { 23280 u16 num_samps; 23281 u16 loops = 0xffff; 23282 u16 wait = 0; 23283 23284 num_samps = wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, 23285 dac_test_mode); 23286 if (num_samps == 0) 23287 return -EBADE; 23288 23289 wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, 23290 dac_test_mode, modify_bbmult); 23291 23292 return 0; 23293 } 23294 23295 void wlc_phy_stopplayback_nphy(struct brcms_phy *pi) 23296 { 23297 u16 playback_status; 23298 u16 bb_mult; 23299 23300 if (pi->phyhang_avoid) 23301 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23302 23303 playback_status = read_phy_reg(pi, 0xc7); 23304 if (playback_status & 0x1) 23305 or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); 23306 else if (playback_status & 0x2) 23307 and_phy_reg(pi, 0xc2, 23308 (u16) ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); 23309 23310 and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); 23311 23312 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { 23313 23314 bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; 23315 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23316 &bb_mult); 23317 23318 pi->nphy_bb_mult_save = 0; 23319 } 23320 23321 if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { 23322 if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { 23323 wlc_phy_rfctrl_override_nphy_rev7( 23324 pi, 23325 (0x1 << 7), 23326 0, 0, 1, 23327 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23328 pi->nphy_sample_play_lpf_bw_ctl_ovr = false; 23329 } 23330 } 23331 23332 if (pi->phyhang_avoid) 23333 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23334 } 23335 23336 static u32 *brcms_phy_get_tx_pwrctrl_tbl(struct brcms_phy *pi) 23337 { 23338 u32 *tx_pwrctrl_tbl = NULL; 23339 uint phyrev = pi->pubpi.phy_rev; 23340 23341 if (PHY_IPA(pi)) { 23342 tx_pwrctrl_tbl = 23343 wlc_phy_get_ipa_gaintbl_nphy(pi); 23344 } else { 23345 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23346 if (NREV_IS(phyrev, 3)) 23347 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; 23348 else if (NREV_IS(phyrev, 4)) 23349 tx_pwrctrl_tbl = 23350 (pi->srom_fem5g.extpagain == 3) ? 23351 nphy_tpc_5GHz_txgain_HiPwrEPA : 23352 nphy_tpc_5GHz_txgain_rev4; 23353 else 23354 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev5; 23355 } else { 23356 if (NREV_GE(phyrev, 7)) { 23357 if (pi->pubpi.radiorev == 3) 23358 tx_pwrctrl_tbl = 23359 nphy_tpc_txgain_epa_2057rev3; 23360 else if (pi->pubpi.radiorev == 5) 23361 tx_pwrctrl_tbl = 23362 nphy_tpc_txgain_epa_2057rev5; 23363 } else { 23364 if (NREV_GE(phyrev, 5) && 23365 (pi->srom_fem2g.extpagain == 3)) 23366 tx_pwrctrl_tbl = 23367 nphy_tpc_txgain_HiPwrEPA; 23368 else 23369 tx_pwrctrl_tbl = 23370 nphy_tpc_txgain_rev3; 23371 } 23372 } 23373 } 23374 return tx_pwrctrl_tbl; 23375 } 23376 23377 struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi) 23378 { 23379 u16 base_idx[2], curr_gain[2]; 23380 u8 core_no; 23381 struct nphy_txgains target_gain; 23382 u32 *tx_pwrctrl_tbl = NULL; 23383 23384 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { 23385 if (pi->phyhang_avoid) 23386 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23387 23388 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 23389 curr_gain); 23390 23391 if (pi->phyhang_avoid) 23392 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23393 23394 for (core_no = 0; core_no < 2; core_no++) { 23395 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23396 target_gain.ipa[core_no] = 23397 curr_gain[core_no] & 0x0007; 23398 target_gain.pad[core_no] = 23399 ((curr_gain[core_no] & 0x00F8) >> 3); 23400 target_gain.pga[core_no] = 23401 ((curr_gain[core_no] & 0x0F00) >> 8); 23402 target_gain.txgm[core_no] = 23403 ((curr_gain[core_no] & 0x7000) >> 12); 23404 target_gain.txlpf[core_no] = 23405 ((curr_gain[core_no] & 0x8000) >> 15); 23406 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23407 target_gain.ipa[core_no] = 23408 curr_gain[core_no] & 0x000F; 23409 target_gain.pad[core_no] = 23410 ((curr_gain[core_no] & 0x00F0) >> 4); 23411 target_gain.pga[core_no] = 23412 ((curr_gain[core_no] & 0x0F00) >> 8); 23413 target_gain.txgm[core_no] = 23414 ((curr_gain[core_no] & 0x7000) >> 12); 23415 } else { 23416 target_gain.ipa[core_no] = 23417 curr_gain[core_no] & 0x0003; 23418 target_gain.pad[core_no] = 23419 ((curr_gain[core_no] & 0x000C) >> 2); 23420 target_gain.pga[core_no] = 23421 ((curr_gain[core_no] & 0x0070) >> 4); 23422 target_gain.txgm[core_no] = 23423 ((curr_gain[core_no] & 0x0380) >> 7); 23424 } 23425 } 23426 } else { 23427 uint phyrev = pi->pubpi.phy_rev; 23428 23429 base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; 23430 base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; 23431 for (core_no = 0; core_no < 2; core_no++) { 23432 if (NREV_GE(phyrev, 3)) { 23433 tx_pwrctrl_tbl = 23434 brcms_phy_get_tx_pwrctrl_tbl(pi); 23435 if (NREV_GE(phyrev, 7)) { 23436 target_gain.ipa[core_no] = 23437 (tx_pwrctrl_tbl 23438 [base_idx[core_no]] 23439 >> 16) & 0x7; 23440 target_gain.pad[core_no] = 23441 (tx_pwrctrl_tbl 23442 [base_idx[core_no]] 23443 >> 19) & 0x1f; 23444 target_gain.pga[core_no] = 23445 (tx_pwrctrl_tbl 23446 [base_idx[core_no]] 23447 >> 24) & 0xf; 23448 target_gain.txgm[core_no] = 23449 (tx_pwrctrl_tbl 23450 [base_idx[core_no]] 23451 >> 28) & 0x7; 23452 target_gain.txlpf[core_no] = 23453 (tx_pwrctrl_tbl 23454 [base_idx[core_no]] 23455 >> 31) & 0x1; 23456 } else { 23457 target_gain.ipa[core_no] = 23458 (tx_pwrctrl_tbl 23459 [base_idx[core_no]] 23460 >> 16) & 0xf; 23461 target_gain.pad[core_no] = 23462 (tx_pwrctrl_tbl 23463 [base_idx[core_no]] 23464 >> 20) & 0xf; 23465 target_gain.pga[core_no] = 23466 (tx_pwrctrl_tbl 23467 [base_idx[core_no]] 23468 >> 24) & 0xf; 23469 target_gain.txgm[core_no] = 23470 (tx_pwrctrl_tbl 23471 [base_idx[core_no]] 23472 >> 28) & 0x7; 23473 } 23474 } else { 23475 target_gain.ipa[core_no] = 23476 (nphy_tpc_txgain[base_idx[core_no]] >> 23477 16) & 0x3; 23478 target_gain.pad[core_no] = 23479 (nphy_tpc_txgain[base_idx[core_no]] >> 23480 18) & 0x3; 23481 target_gain.pga[core_no] = 23482 (nphy_tpc_txgain[base_idx[core_no]] >> 23483 20) & 0x7; 23484 target_gain.txgm[core_no] = 23485 (nphy_tpc_txgain[base_idx[core_no]] >> 23486 23) & 0x7; 23487 } 23488 } 23489 } 23490 23491 return target_gain; 23492 } 23493 23494 static void 23495 wlc_phy_iqcal_gainparams_nphy(struct brcms_phy *pi, u16 core_no, 23496 struct nphy_txgains target_gain, 23497 struct nphy_iqcal_params *params) 23498 { 23499 u8 k; 23500 int idx; 23501 u16 gain_index; 23502 u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); 23503 23504 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23505 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23506 params->txlpf = target_gain.txlpf[core_no]; 23507 23508 params->txgm = target_gain.txgm[core_no]; 23509 params->pga = target_gain.pga[core_no]; 23510 params->pad = target_gain.pad[core_no]; 23511 params->ipa = target_gain.ipa[core_no]; 23512 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23513 params->cal_gain = 23514 ((params->txlpf << 15) | (params->txgm << 12) | 23515 (params->pga << 8) | 23516 (params->pad << 3) | (params->ipa)); 23517 else 23518 params->cal_gain = 23519 ((params->txgm << 12) | (params->pga << 8) | 23520 (params->pad << 4) | (params->ipa)); 23521 23522 params->ncorr[0] = 0x79; 23523 params->ncorr[1] = 0x79; 23524 params->ncorr[2] = 0x79; 23525 params->ncorr[3] = 0x79; 23526 params->ncorr[4] = 0x79; 23527 } else { 23528 23529 gain_index = ((target_gain.pad[core_no] << 0) | 23530 (target_gain.pga[core_no] << 4) | 23531 (target_gain.txgm[core_no] << 8)); 23532 23533 idx = -1; 23534 for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { 23535 if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == 23536 gain_index) { 23537 idx = k; 23538 break; 23539 } 23540 } 23541 23542 params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; 23543 params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; 23544 params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; 23545 params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | 23546 (params->pad << 2)); 23547 params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; 23548 params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; 23549 params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; 23550 params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; 23551 } 23552 } 23553 23554 static void wlc_phy_txcal_radio_setup_nphy(struct brcms_phy *pi) 23555 { 23556 u16 jtag_core, core; 23557 23558 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23559 23560 for (core = 0; core <= 1; core++) { 23561 23562 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23563 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23564 TX_SSI_MASTER); 23565 23566 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23567 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23568 IQCAL_VCM_HG); 23569 23570 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23571 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23572 IQCAL_IDAC); 23573 23574 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23575 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23576 TSSI_VCM); 23577 23578 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; 23579 23580 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23581 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23582 TX_SSI_MUX); 23583 23584 if (pi->pubpi.radiorev != 5) 23585 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23586 READ_RADIO_REG3(pi, RADIO_2057, TX, 23587 core, 23588 TSSIA); 23589 23590 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23591 READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); 23592 23593 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23594 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23595 TSSI_MISC1); 23596 23597 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23598 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23599 TX_SSI_MASTER, 0x0a); 23600 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23601 IQCAL_VCM_HG, 0x43); 23602 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23603 IQCAL_IDAC, 0x55); 23604 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23605 TSSI_VCM, 0x00); 23606 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23607 TSSIG, 0x00); 23608 if (pi->use_int_tx_iqlo_cal_nphy) { 23609 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23610 core, TX_SSI_MUX, 0x4); 23611 if (!(pi-> 23612 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23613 WRITE_RADIO_REG3(pi, RADIO_2057, 23614 TX, core, 23615 TSSIA, 0x31); 23616 else 23617 WRITE_RADIO_REG3(pi, RADIO_2057, 23618 TX, core, 23619 TSSIA, 0x21); 23620 } 23621 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23622 TSSI_MISC1, 0x00); 23623 } else { 23624 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23625 TX_SSI_MASTER, 0x06); 23626 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23627 IQCAL_VCM_HG, 0x43); 23628 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23629 IQCAL_IDAC, 0x55); 23630 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23631 TSSI_VCM, 0x00); 23632 23633 if (pi->pubpi.radiorev != 5) 23634 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23635 core, TSSIA, 0x00); 23636 if (pi->use_int_tx_iqlo_cal_nphy) { 23637 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23638 core, TX_SSI_MUX, 23639 0x06); 23640 if (!(pi-> 23641 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23642 WRITE_RADIO_REG3(pi, RADIO_2057, 23643 TX, core, 23644 TSSIG, 0x31); 23645 else 23646 WRITE_RADIO_REG3(pi, RADIO_2057, 23647 TX, core, 23648 TSSIG, 0x21); 23649 } 23650 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23651 TSSI_MISC1, 0x00); 23652 } 23653 } 23654 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23655 23656 for (core = 0; core <= 1; core++) { 23657 jtag_core = 23658 (core == 23659 PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 23660 23661 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23662 read_radio_reg(pi, 23663 RADIO_2056_TX_TX_SSI_MASTER | 23664 jtag_core); 23665 23666 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23667 read_radio_reg(pi, 23668 RADIO_2056_TX_IQCAL_VCM_HG | 23669 jtag_core); 23670 23671 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23672 read_radio_reg(pi, 23673 RADIO_2056_TX_IQCAL_IDAC | 23674 jtag_core); 23675 23676 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23677 read_radio_reg( 23678 pi, 23679 RADIO_2056_TX_TSSI_VCM | 23680 jtag_core); 23681 23682 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 23683 read_radio_reg(pi, 23684 RADIO_2056_TX_TX_AMP_DET | 23685 jtag_core); 23686 23687 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23688 read_radio_reg(pi, 23689 RADIO_2056_TX_TX_SSI_MUX | 23690 jtag_core); 23691 23692 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23693 read_radio_reg(pi, 23694 RADIO_2056_TX_TSSIA | jtag_core); 23695 23696 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23697 read_radio_reg(pi, 23698 RADIO_2056_TX_TSSIG | jtag_core); 23699 23700 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23701 read_radio_reg(pi, 23702 RADIO_2056_TX_TSSI_MISC1 | 23703 jtag_core); 23704 23705 pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = 23706 read_radio_reg(pi, 23707 RADIO_2056_TX_TSSI_MISC2 | 23708 jtag_core); 23709 23710 pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = 23711 read_radio_reg(pi, 23712 RADIO_2056_TX_TSSI_MISC3 | 23713 jtag_core); 23714 23715 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23716 write_radio_reg(pi, 23717 RADIO_2056_TX_TX_SSI_MASTER | 23718 jtag_core, 0x0a); 23719 write_radio_reg(pi, 23720 RADIO_2056_TX_IQCAL_VCM_HG | 23721 jtag_core, 0x40); 23722 write_radio_reg(pi, 23723 RADIO_2056_TX_IQCAL_IDAC | 23724 jtag_core, 0x55); 23725 write_radio_reg(pi, 23726 RADIO_2056_TX_TSSI_VCM | 23727 jtag_core, 0x00); 23728 write_radio_reg(pi, 23729 RADIO_2056_TX_TX_AMP_DET | 23730 jtag_core, 0x00); 23731 23732 if (PHY_IPA(pi)) { 23733 write_radio_reg( 23734 pi, 23735 RADIO_2056_TX_TX_SSI_MUX 23736 | jtag_core, 0x4); 23737 write_radio_reg(pi, 23738 RADIO_2056_TX_TSSIA | 23739 jtag_core, 0x1); 23740 } else { 23741 write_radio_reg( 23742 pi, 23743 RADIO_2056_TX_TX_SSI_MUX 23744 | jtag_core, 0x00); 23745 write_radio_reg(pi, 23746 RADIO_2056_TX_TSSIA | 23747 jtag_core, 0x2f); 23748 } 23749 write_radio_reg(pi, 23750 RADIO_2056_TX_TSSIG | jtag_core, 23751 0x00); 23752 write_radio_reg(pi, 23753 RADIO_2056_TX_TSSI_MISC1 | 23754 jtag_core, 0x00); 23755 23756 write_radio_reg(pi, 23757 RADIO_2056_TX_TSSI_MISC2 | 23758 jtag_core, 0x00); 23759 write_radio_reg(pi, 23760 RADIO_2056_TX_TSSI_MISC3 | 23761 jtag_core, 0x00); 23762 } else { 23763 write_radio_reg(pi, 23764 RADIO_2056_TX_TX_SSI_MASTER | 23765 jtag_core, 0x06); 23766 write_radio_reg(pi, 23767 RADIO_2056_TX_IQCAL_VCM_HG | 23768 jtag_core, 0x40); 23769 write_radio_reg(pi, 23770 RADIO_2056_TX_IQCAL_IDAC | 23771 jtag_core, 0x55); 23772 write_radio_reg(pi, 23773 RADIO_2056_TX_TSSI_VCM | 23774 jtag_core, 0x00); 23775 write_radio_reg(pi, 23776 RADIO_2056_TX_TX_AMP_DET | 23777 jtag_core, 0x00); 23778 write_radio_reg(pi, 23779 RADIO_2056_TX_TSSIA | jtag_core, 23780 0x00); 23781 23782 if (PHY_IPA(pi)) { 23783 23784 write_radio_reg( 23785 pi, 23786 RADIO_2056_TX_TX_SSI_MUX 23787 | jtag_core, 0x06); 23788 if (NREV_LT(pi->pubpi.phy_rev, 5)) 23789 write_radio_reg( 23790 pi, 23791 RADIO_2056_TX_TSSIG 23792 | jtag_core, 23793 0x11); 23794 else 23795 write_radio_reg( 23796 pi, 23797 RADIO_2056_TX_TSSIG 23798 | jtag_core, 23799 0x1); 23800 } else { 23801 write_radio_reg( 23802 pi, 23803 RADIO_2056_TX_TX_SSI_MUX 23804 | jtag_core, 0x00); 23805 write_radio_reg(pi, 23806 RADIO_2056_TX_TSSIG | 23807 jtag_core, 0x20); 23808 } 23809 23810 write_radio_reg(pi, 23811 RADIO_2056_TX_TSSI_MISC1 | 23812 jtag_core, 0x00); 23813 write_radio_reg(pi, 23814 RADIO_2056_TX_TSSI_MISC2 | 23815 jtag_core, 0x00); 23816 write_radio_reg(pi, 23817 RADIO_2056_TX_TSSI_MISC3 | 23818 jtag_core, 0x00); 23819 } 23820 } 23821 } else { 23822 23823 pi->tx_rx_cal_radio_saveregs[0] = 23824 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 23825 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); 23826 pi->tx_rx_cal_radio_saveregs[1] = 23827 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 23828 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); 23829 23830 pi->tx_rx_cal_radio_saveregs[2] = 23831 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 23832 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); 23833 pi->tx_rx_cal_radio_saveregs[3] = 23834 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 23835 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); 23836 23837 pi->tx_rx_cal_radio_saveregs[4] = 23838 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 23839 pi->tx_rx_cal_radio_saveregs[5] = 23840 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 23841 23842 if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == 23843 0) { 23844 23845 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 23846 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 23847 } else { 23848 23849 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); 23850 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); 23851 } 23852 23853 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 23854 23855 or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); 23856 or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); 23857 } else { 23858 23859 and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); 23860 and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); 23861 } 23862 } 23863 } 23864 23865 static void wlc_phy_txcal_radio_cleanup_nphy(struct brcms_phy *pi) 23866 { 23867 u16 jtag_core, core; 23868 23869 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23870 for (core = 0; core <= 1; core++) { 23871 23872 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23873 TX_SSI_MASTER, 23874 pi-> 23875 tx_rx_cal_radio_saveregs[(core * 11) + 23876 0]); 23877 23878 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 23879 pi-> 23880 tx_rx_cal_radio_saveregs[(core * 11) + 23881 1]); 23882 23883 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 23884 pi-> 23885 tx_rx_cal_radio_saveregs[(core * 11) + 23886 2]); 23887 23888 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 23889 pi-> 23890 tx_rx_cal_radio_saveregs[(core * 11) + 23891 3]); 23892 23893 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, 23894 pi-> 23895 tx_rx_cal_radio_saveregs[(core * 11) + 23896 5]); 23897 23898 if (pi->pubpi.radiorev != 5) 23899 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23900 TSSIA, 23901 pi->tx_rx_cal_radio_saveregs 23902 [(core * 11) + 6]); 23903 23904 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, 23905 pi-> 23906 tx_rx_cal_radio_saveregs[(core * 11) + 23907 7]); 23908 23909 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 23910 pi-> 23911 tx_rx_cal_radio_saveregs[(core * 11) + 23912 8]); 23913 } 23914 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23915 for (core = 0; core <= 1; core++) { 23916 jtag_core = (core == PHY_CORE_0) ? 23917 RADIO_2056_TX0 : RADIO_2056_TX1; 23918 23919 write_radio_reg(pi, 23920 RADIO_2056_TX_TX_SSI_MASTER | jtag_core, 23921 pi-> 23922 tx_rx_cal_radio_saveregs[(core * 11) + 23923 0]); 23924 23925 write_radio_reg(pi, 23926 RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, 23927 pi-> 23928 tx_rx_cal_radio_saveregs[(core * 11) + 23929 1]); 23930 23931 write_radio_reg(pi, 23932 RADIO_2056_TX_IQCAL_IDAC | jtag_core, 23933 pi-> 23934 tx_rx_cal_radio_saveregs[(core * 11) + 23935 2]); 23936 23937 write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, 23938 pi-> 23939 tx_rx_cal_radio_saveregs[(core * 11) + 23940 3]); 23941 23942 write_radio_reg(pi, 23943 RADIO_2056_TX_TX_AMP_DET | jtag_core, 23944 pi-> 23945 tx_rx_cal_radio_saveregs[(core * 11) + 23946 4]); 23947 23948 write_radio_reg(pi, 23949 RADIO_2056_TX_TX_SSI_MUX | jtag_core, 23950 pi-> 23951 tx_rx_cal_radio_saveregs[(core * 11) + 23952 5]); 23953 23954 write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, 23955 pi-> 23956 tx_rx_cal_radio_saveregs[(core * 11) + 23957 6]); 23958 23959 write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, 23960 pi-> 23961 tx_rx_cal_radio_saveregs[(core * 11) + 23962 7]); 23963 23964 write_radio_reg(pi, 23965 RADIO_2056_TX_TSSI_MISC1 | jtag_core, 23966 pi-> 23967 tx_rx_cal_radio_saveregs[(core * 11) + 23968 8]); 23969 23970 write_radio_reg(pi, 23971 RADIO_2056_TX_TSSI_MISC2 | jtag_core, 23972 pi-> 23973 tx_rx_cal_radio_saveregs[(core * 11) + 23974 9]); 23975 23976 write_radio_reg(pi, 23977 RADIO_2056_TX_TSSI_MISC3 | jtag_core, 23978 pi-> 23979 tx_rx_cal_radio_saveregs[(core * 11) + 23980 10]); 23981 } 23982 } else { 23983 23984 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 23985 pi->tx_rx_cal_radio_saveregs[0]); 23986 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 23987 pi->tx_rx_cal_radio_saveregs[1]); 23988 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 23989 pi->tx_rx_cal_radio_saveregs[2]); 23990 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 23991 pi->tx_rx_cal_radio_saveregs[3]); 23992 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 23993 pi->tx_rx_cal_radio_saveregs[4]); 23994 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 23995 pi->tx_rx_cal_radio_saveregs[5]); 23996 } 23997 } 23998 23999 static void wlc_phy_txcal_physetup_nphy(struct brcms_phy *pi) 24000 { 24001 u16 val, mask; 24002 24003 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 24004 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 24005 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 24006 24007 mask = ((0x3 << 8) | (0x3 << 10)); 24008 val = (0x2 << 8); 24009 val |= (0x2 << 10); 24010 mod_phy_reg(pi, 0xa6, mask, val); 24011 mod_phy_reg(pi, 0xa7, mask, val); 24012 24013 val = read_phy_reg(pi, 0x8f); 24014 pi->tx_rx_cal_phy_saveregs[2] = val; 24015 val |= ((0x1 << 9) | (0x1 << 10)); 24016 write_phy_reg(pi, 0x8f, val); 24017 24018 val = read_phy_reg(pi, 0xa5); 24019 pi->tx_rx_cal_phy_saveregs[3] = val; 24020 val |= ((0x1 << 9) | (0x1 << 10)); 24021 write_phy_reg(pi, 0xa5, val); 24022 24023 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); 24024 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 24025 24026 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24027 &val); 24028 pi->tx_rx_cal_phy_saveregs[5] = val; 24029 val = 0; 24030 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24031 &val); 24032 24033 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24034 &val); 24035 pi->tx_rx_cal_phy_saveregs[6] = val; 24036 val = 0; 24037 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24038 &val); 24039 24040 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); 24041 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); 24042 24043 if (!(pi->use_int_tx_iqlo_cal_nphy)) 24044 wlc_phy_rfctrlintc_override_nphy( 24045 pi, 24046 NPHY_RfctrlIntc_override_PA, 24047 1, 24048 RADIO_MIMO_CORESEL_CORE1 24049 | 24050 RADIO_MIMO_CORESEL_CORE2); 24051 else 24052 wlc_phy_rfctrlintc_override_nphy( 24053 pi, 24054 NPHY_RfctrlIntc_override_PA, 24055 0, 24056 RADIO_MIMO_CORESEL_CORE1 24057 | 24058 RADIO_MIMO_CORESEL_CORE2); 24059 24060 wlc_phy_rfctrlintc_override_nphy(pi, 24061 NPHY_RfctrlIntc_override_TRSW, 24062 0x2, RADIO_MIMO_CORESEL_CORE1); 24063 wlc_phy_rfctrlintc_override_nphy(pi, 24064 NPHY_RfctrlIntc_override_TRSW, 24065 0x8, RADIO_MIMO_CORESEL_CORE2); 24066 24067 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 24068 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 24069 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 24070 0x29b, (0x1 << 0), (0) << 0); 24071 24072 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 24073 0x29b, (0x1 << 0), (0) << 0); 24074 24075 if (NREV_IS(pi->pubpi.phy_rev, 7) 24076 || NREV_GE(pi->pubpi.phy_rev, 8)) 24077 wlc_phy_rfctrl_override_nphy_rev7( 24078 pi, (0x1 << 7), 24079 wlc_phy_read_lpf_bw_ctl_nphy 24080 (pi, 24081 0), 0, 0, 24082 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24083 24084 if (pi->use_int_tx_iqlo_cal_nphy 24085 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24086 24087 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24088 24089 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24090 1 << 4); 24091 24092 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24093 mod_radio_reg( 24094 pi, 24095 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24096 1, 0); 24097 mod_radio_reg( 24098 pi, 24099 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24100 1, 0); 24101 } else { 24102 mod_radio_reg( 24103 pi, 24104 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24105 1, 0); 24106 mod_radio_reg( 24107 pi, 24108 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24109 1, 0); 24110 } 24111 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24112 wlc_phy_rfctrl_override_nphy_rev7( 24113 pi, 24114 (0x1 << 3), 0, 24115 0x3, 0, 24116 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24117 } 24118 } 24119 } else { 24120 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 24121 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 24122 24123 mask = ((0x3 << 12) | (0x3 << 14)); 24124 val = (0x2 << 12); 24125 val |= (0x2 << 14); 24126 mod_phy_reg(pi, 0xa6, mask, val); 24127 mod_phy_reg(pi, 0xa7, mask, val); 24128 24129 val = read_phy_reg(pi, 0xa5); 24130 pi->tx_rx_cal_phy_saveregs[2] = val; 24131 val |= ((0x1 << 12) | (0x1 << 13)); 24132 write_phy_reg(pi, 0xa5, val); 24133 24134 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24135 &val); 24136 pi->tx_rx_cal_phy_saveregs[3] = val; 24137 val |= 0x2000; 24138 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24139 &val); 24140 24141 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24142 &val); 24143 pi->tx_rx_cal_phy_saveregs[4] = val; 24144 val |= 0x2000; 24145 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24146 &val); 24147 24148 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); 24149 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); 24150 val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 24151 write_phy_reg(pi, 0x91, val); 24152 write_phy_reg(pi, 0x92, val); 24153 } 24154 } 24155 24156 static void wlc_phy_txcal_phycleanup_nphy(struct brcms_phy *pi) 24157 { 24158 u16 mask; 24159 24160 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 24161 write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); 24162 write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); 24163 write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); 24164 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); 24165 write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); 24166 24167 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24168 &pi->tx_rx_cal_phy_saveregs[5]); 24169 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24170 &pi->tx_rx_cal_phy_saveregs[6]); 24171 24172 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); 24173 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); 24174 24175 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 24176 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 24177 24178 if (NREV_IS(pi->pubpi.phy_rev, 7) 24179 || NREV_GE(pi->pubpi.phy_rev, 8)) 24180 wlc_phy_rfctrl_override_nphy_rev7( 24181 pi, (0x1 << 7), 0, 0, 24182 1, 24183 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24184 24185 wlc_phy_resetcca_nphy(pi); 24186 24187 if (pi->use_int_tx_iqlo_cal_nphy 24188 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24189 24190 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24191 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24192 mod_radio_reg( 24193 pi, 24194 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24195 1, 1); 24196 mod_radio_reg( 24197 pi, 24198 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24199 1, 1); 24200 } else { 24201 mod_radio_reg( 24202 pi, 24203 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24204 1, 1); 24205 mod_radio_reg( 24206 pi, 24207 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24208 1, 1); 24209 } 24210 24211 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24212 0); 24213 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24214 wlc_phy_rfctrl_override_nphy_rev7( 24215 pi, 24216 (0x1 << 3), 0, 24217 0x3, 1, 24218 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24219 } 24220 } 24221 } else { 24222 mask = ((0x3 << 12) | (0x3 << 14)); 24223 mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); 24224 mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); 24225 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); 24226 24227 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24228 &pi->tx_rx_cal_phy_saveregs[3]); 24229 24230 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24231 &pi->tx_rx_cal_phy_saveregs[4]); 24232 24233 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); 24234 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); 24235 } 24236 } 24237 24238 void 24239 wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) 24240 { 24241 u16 tssi_reg; 24242 s32 temp, pwrindex[2]; 24243 s32 idle_tssi[2]; 24244 s32 rssi_buf[4]; 24245 s32 tssival[2]; 24246 u8 tssi_type; 24247 24248 tssi_reg = read_phy_reg(pi, 0x1e9); 24249 24250 temp = (s32) (tssi_reg & 0x3f); 24251 idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); 24252 24253 temp = (s32) ((tssi_reg >> 8) & 0x3f); 24254 idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); 24255 24256 tssi_type = 24257 CHSPEC_IS5G(pi->radio_chanspec) ? 24258 (u8)NPHY_RSSI_SEL_TSSI_5G : (u8)NPHY_RSSI_SEL_TSSI_2G; 24259 24260 wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); 24261 24262 tssival[0] = rssi_buf[0] / ((s32) num_samps); 24263 tssival[1] = rssi_buf[2] / ((s32) num_samps); 24264 24265 pwrindex[0] = idle_tssi[0] - tssival[0] + 64; 24266 pwrindex[1] = idle_tssi[1] - tssival[1] + 64; 24267 24268 if (pwrindex[0] < 0) 24269 pwrindex[0] = 0; 24270 else if (pwrindex[0] > 63) 24271 pwrindex[0] = 63; 24272 24273 if (pwrindex[1] < 0) 24274 pwrindex[1] = 0; 24275 else if (pwrindex[1] > 63) 24276 pwrindex[1] = 63; 24277 24278 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, 24279 (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); 24280 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, 24281 (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); 24282 } 24283 24284 static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core) 24285 { 24286 int index; 24287 u32 bbmult_scale; 24288 u16 bbmult; 24289 u16 tblentry; 24290 24291 static const struct nphy_txiqcal_ladder ladder_lo[] = { 24292 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24293 {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, 24294 {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} 24295 }; 24296 24297 static const struct nphy_txiqcal_ladder ladder_iq[] = { 24298 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24299 {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, 24300 {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} 24301 }; 24302 24303 bbmult = (core == PHY_CORE_0) ? 24304 ((pi->nphy_txcal_bbmult >> 8) & 0xff) : 24305 (pi->nphy_txcal_bbmult & 0xff); 24306 24307 for (index = 0; index < 18; index++) { 24308 bbmult_scale = ladder_lo[index].percent * bbmult; 24309 bbmult_scale /= 100; 24310 24311 tblentry = 24312 ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; 24313 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, 24314 &tblentry); 24315 24316 bbmult_scale = ladder_iq[index].percent * bbmult; 24317 bbmult_scale /= 100; 24318 24319 tblentry = 24320 ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; 24321 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, 24322 16, &tblentry); 24323 } 24324 } 24325 24326 static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core) 24327 { 24328 u16 tmp; 24329 tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); 24330 24331 tmp = (tmp & (0x7f << 8)) >> 8; 24332 return (u8) tmp; 24333 } 24334 24335 static void 24336 wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1) 24337 { 24338 mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); 24339 24340 if (NREV_GT(pi->pubpi.phy_rev, 1)) 24341 mod_phy_reg(pi, 0x222, (0xff << 0), idx1); 24342 } 24343 24344 static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi) 24345 { 24346 u16 m0m1; 24347 24348 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 24349 24350 return m0m1; 24351 } 24352 24353 static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1) 24354 { 24355 u16 m0m1 = (u16) ((m0 << 8) | m1); 24356 24357 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); 24358 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); 24359 } 24360 24361 static void 24362 wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, 24363 struct nphy_papd_restore_state *state, u8 core) 24364 { 24365 s32 tone_freq; 24366 u8 off_core; 24367 u16 mixgain = 0; 24368 24369 off_core = core ^ 0x1; 24370 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24371 24372 if (NREV_IS(pi->pubpi.phy_rev, 7) 24373 || NREV_GE(pi->pubpi.phy_rev, 8)) 24374 wlc_phy_rfctrl_override_nphy_rev7( 24375 pi, (0x1 << 7), 24376 wlc_phy_read_lpf_bw_ctl_nphy 24377 (pi, 24378 0), 0, 0, 24379 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24380 24381 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24382 if (pi->pubpi.radiorev == 5) 24383 mixgain = (core == 0) ? 0x20 : 0x00; 24384 else if ((pi->pubpi.radiorev == 7) 24385 || (pi->pubpi.radiorev == 8)) 24386 mixgain = 0x00; 24387 else if ((pi->pubpi.radiorev <= 4) 24388 || (pi->pubpi.radiorev == 6)) 24389 mixgain = 0x00; 24390 } else { 24391 if ((pi->pubpi.radiorev == 4) || 24392 (pi->pubpi.radiorev == 6)) 24393 mixgain = 0x50; 24394 else if ((pi->pubpi.radiorev == 3) 24395 || (pi->pubpi.radiorev == 7) 24396 || (pi->pubpi.radiorev == 8)) 24397 mixgain = 0x0; 24398 } 24399 24400 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 24401 mixgain, (1 << core), 0, 24402 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24403 24404 wlc_phy_rfctrl_override_1tomany_nphy( 24405 pi, 24406 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24407 1, (1 << core), 0); 24408 wlc_phy_rfctrl_override_1tomany_nphy( 24409 pi, 24410 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24411 0, (1 << off_core), 0); 24412 24413 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24414 0, 0x3, 0, 24415 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24416 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 24417 (1 << core), 0, 24418 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24419 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 24420 (1 << core), 0, 24421 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24422 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 24423 (1 << core), 0, 24424 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24425 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 24426 (1 << core), 0, 24427 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24428 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 24429 (1 << core), 0, 24430 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24431 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 24432 (1 << core), 0, 24433 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24434 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 24435 (1 << core), 0, 24436 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24437 24438 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 24439 0, (1 << core), 0, 24440 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24441 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 24442 (1 << core), 0, 24443 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24444 24445 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24446 0xa6 : 0xa7); 24447 state->afeoverride[core] = 24448 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24449 state->afectrl[off_core] = 24450 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); 24451 state->afeoverride[off_core] = 24452 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); 24453 24454 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24455 (0x1 << 2), 0); 24456 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24457 0xa5), (0x1 << 2), (0x1 << 2)); 24458 24459 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), 24460 (0x1 << 2), (0x1 << 2)); 24461 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : 24462 0x8f), (0x1 << 2), (0x1 << 2)); 24463 24464 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24465 state->pwrup[core] = 24466 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24467 TXRXCOUPLE_2G_PWRUP); 24468 state->atten[core] = 24469 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24470 TXRXCOUPLE_2G_ATTEN); 24471 state->pwrup[off_core] = 24472 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24473 TXRXCOUPLE_2G_PWRUP); 24474 state->atten[off_core] = 24475 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24476 TXRXCOUPLE_2G_ATTEN); 24477 24478 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24479 TXRXCOUPLE_2G_PWRUP, 0xc); 24480 24481 if ((pi->pubpi.radiorev == 3) || 24482 (pi->pubpi.radiorev == 4) || 24483 (pi->pubpi.radiorev == 6)) 24484 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24485 TXRXCOUPLE_2G_ATTEN, 0xf0); 24486 else if (pi->pubpi.radiorev == 5) 24487 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24488 TXRXCOUPLE_2G_ATTEN, 24489 (core == 0) ? 0xf7 : 0xf2); 24490 else if ((pi->pubpi.radiorev == 7) 24491 || (pi->pubpi.radiorev == 8)) 24492 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24493 TXRXCOUPLE_2G_ATTEN, 0xf0); 24494 24495 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24496 TXRXCOUPLE_2G_PWRUP, 0x0); 24497 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24498 TXRXCOUPLE_2G_ATTEN, 0xff); 24499 } else { 24500 state->pwrup[core] = 24501 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24502 TXRXCOUPLE_5G_PWRUP); 24503 state->atten[core] = 24504 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24505 TXRXCOUPLE_5G_ATTEN); 24506 state->pwrup[off_core] = 24507 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24508 TXRXCOUPLE_5G_PWRUP); 24509 state->atten[off_core] = 24510 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24511 TXRXCOUPLE_5G_ATTEN); 24512 24513 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24514 TXRXCOUPLE_5G_PWRUP, 0xc); 24515 24516 if ((pi->pubpi.radiorev == 7) 24517 || (pi->pubpi.radiorev == 8)) 24518 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24519 TXRXCOUPLE_5G_ATTEN, 0xf4); 24520 24521 else 24522 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24523 TXRXCOUPLE_5G_ATTEN, 0xf0); 24524 24525 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24526 TXRXCOUPLE_5G_PWRUP, 0x0); 24527 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24528 TXRXCOUPLE_5G_ATTEN, 0xff); 24529 } 24530 24531 tone_freq = 4000; 24532 24533 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24534 24535 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24536 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 24537 24538 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24539 0x2a4, (0x1 << 13), (1) << 13); 24540 24541 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24542 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); 24543 24544 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : 24545 0x2a4, (0x1 << 13), (0) << 13); 24546 24547 } else { 24548 24549 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); 24550 24551 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); 24552 24553 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); 24554 24555 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); 24556 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); 24557 24558 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24559 0xa6 : 0xa7); 24560 state->afeoverride[core] = 24561 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24562 24563 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24564 (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); 24565 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24566 0xa5), 24567 (0x1 << 0) | 24568 (0x1 << 1) | 24569 (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); 24570 24571 state->vga_master[core] = 24572 READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); 24573 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); 24574 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24575 state->fbmix[core] = 24576 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24577 TXFBMIX_G); 24578 state->intpa_master[core] = 24579 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24580 INTPAG_MASTER); 24581 24582 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, 24583 0x03); 24584 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24585 INTPAG_MASTER, 0x04); 24586 } else { 24587 state->fbmix[core] = 24588 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24589 TXFBMIX_A); 24590 state->intpa_master[core] = 24591 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24592 INTPAA_MASTER); 24593 24594 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, 24595 0x03); 24596 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24597 INTPAA_MASTER, 0x04); 24598 24599 } 24600 24601 tone_freq = 4000; 24602 24603 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24604 24605 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24606 0x29b, (0x1 << 0), (1) << 0); 24607 24608 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24609 0x29b, (0x1 << 0), (0) << 0); 24610 24611 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24612 } 24613 } 24614 24615 static void 24616 wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, 24617 struct nphy_papd_restore_state *state) 24618 { 24619 u8 core; 24620 24621 wlc_phy_stopplayback_nphy(pi); 24622 24623 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24624 24625 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24626 24627 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24628 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24629 TXRXCOUPLE_2G_PWRUP, 0); 24630 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24631 TXRXCOUPLE_2G_ATTEN, 24632 state->atten[core]); 24633 } else { 24634 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24635 TXRXCOUPLE_5G_PWRUP, 0); 24636 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24637 TXRXCOUPLE_5G_ATTEN, 24638 state->atten[core]); 24639 } 24640 } 24641 24642 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 24643 wlc_phy_rfctrl_override_nphy_rev7( 24644 pi, (0x1 << 2), 24645 1, 0x3, 0, 24646 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24647 else 24648 wlc_phy_rfctrl_override_nphy_rev7( 24649 pi, (0x1 << 2), 24650 0, 0x3, 1, 24651 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24652 24653 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 24654 0, 0x3, 1, 24655 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24656 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24657 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24658 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, 24659 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24660 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, 24661 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24662 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, 24663 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24664 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, 24665 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24666 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, 24667 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24668 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, 24669 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24670 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24671 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24672 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, 24673 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24674 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, 24675 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24676 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, 24677 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24678 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, 24679 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24680 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, 24681 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24682 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, 24683 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24684 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, 24685 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24686 24687 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24688 24689 write_phy_reg(pi, (core == PHY_CORE_0) ? 24690 0xa6 : 0xa7, state->afectrl[core]); 24691 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24692 0xa5, state->afeoverride[core]); 24693 } 24694 24695 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24696 (state->mm & 0xff)); 24697 24698 if (NREV_IS(pi->pubpi.phy_rev, 7) 24699 || NREV_GE(pi->pubpi.phy_rev, 8)) 24700 wlc_phy_rfctrl_override_nphy_rev7( 24701 pi, (0x1 << 7), 0, 0, 24702 1, 24703 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24704 } else { 24705 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 24706 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); 24707 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); 24708 24709 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); 24710 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); 24711 24712 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24713 24714 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 24715 state->vga_master[core]); 24716 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24717 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24718 TXFBMIX_G, state->fbmix[core]); 24719 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24720 INTPAG_MASTER, 24721 state->intpa_master[core]); 24722 } else { 24723 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24724 TXFBMIX_A, state->fbmix[core]); 24725 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24726 INTPAA_MASTER, 24727 state->intpa_master[core]); 24728 } 24729 24730 write_phy_reg(pi, (core == PHY_CORE_0) ? 24731 0xa6 : 0xa7, state->afectrl[core]); 24732 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24733 0xa5, state->afeoverride[core]); 24734 } 24735 24736 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24737 (state->mm & 0xff)); 24738 24739 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); 24740 } 24741 } 24742 24743 static void 24744 wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32 start, 24745 u32 end) 24746 { 24747 u32 *buf, *src, *dst, sz; 24748 24749 sz = end - start + 1; 24750 24751 buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); 24752 if (NULL == buf) 24753 return; 24754 24755 src = buf; 24756 dst = buf + NPHY_PAPD_EPS_TBL_SIZE; 24757 24758 wlc_phy_table_read_nphy(pi, 24759 (core == 24760 PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : 24761 NPHY_TBL_ID_EPSILONTBL1), 24762 NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); 24763 24764 do { 24765 u32 phy_a1, phy_a2; 24766 s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; 24767 24768 phy_a1 = end - min(end, (winsz >> 1)); 24769 phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, 24770 end + (winsz >> 1)); 24771 phy_a3 = phy_a2 - phy_a1 + 1; 24772 phy_a6 = 0; 24773 phy_a7 = 0; 24774 24775 do { 24776 wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, 24777 &phy_a5); 24778 phy_a6 += phy_a4; 24779 phy_a7 += phy_a5; 24780 } while (phy_a2-- != phy_a1); 24781 24782 phy_a6 /= phy_a3; 24783 phy_a7 /= phy_a3; 24784 dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); 24785 } while (end-- != start); 24786 24787 wlc_phy_table_write_nphy(pi, 24788 (core == 24789 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : 24790 NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); 24791 24792 kfree(buf); 24793 } 24794 24795 static void 24796 wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *txgains, 24797 enum phy_cal_mode cal_mode, u8 core) 24798 { 24799 u16 phy_a1, phy_a2, phy_a3; 24800 u16 phy_a4, phy_a5; 24801 bool phy_a6; 24802 u8 phy_a7, m[2]; 24803 u32 phy_a8 = 0; 24804 struct nphy_txgains phy_a9; 24805 24806 if (NREV_LT(pi->pubpi.phy_rev, 3)) 24807 return; 24808 24809 phy_a7 = (core == PHY_CORE_0) ? 1 : 0; 24810 24811 phy_a6 = ((cal_mode == CAL_GCTRL) 24812 || (cal_mode == CAL_SOFT)) ? true : false; 24813 24814 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24815 24816 phy_a9 = wlc_phy_get_tx_gain_nphy(pi); 24817 24818 if (CHSPEC_IS2G(pi->radio_chanspec)) 24819 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24820 (phy_a9.txgm[core] << 12) | 24821 (phy_a9.pga[core] << 8) | 24822 (txgains->gains.pad[core] << 3) | 24823 (phy_a9.ipa[core])); 24824 else 24825 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24826 (phy_a9.txgm[core] << 12) | 24827 (txgains->gains.pga[core] << 8) | 24828 (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); 24829 24830 wlc_phy_rfctrl_override_1tomany_nphy( 24831 pi, 24832 NPHY_REV7_RfctrlOverride_cmd_txgain, 24833 phy_a5, (1 << core), 0); 24834 24835 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24836 if ((pi->pubpi.radiorev <= 4) 24837 || (pi->pubpi.radiorev == 6)) 24838 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24839 60 : 79; 24840 else 24841 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24842 45 : 64; 24843 } else { 24844 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24845 } 24846 24847 m[phy_a7] = 0; 24848 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24849 24850 phy_a2 = 63; 24851 24852 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24853 if ((pi->pubpi.radiorev == 4) 24854 || (pi->pubpi.radiorev == 6)) { 24855 phy_a1 = 30; 24856 phy_a3 = 30; 24857 } else { 24858 phy_a1 = 25; 24859 phy_a3 = 25; 24860 } 24861 } else { 24862 if ((pi->pubpi.radiorev == 5) 24863 || (pi->pubpi.radiorev == 7) 24864 || (pi->pubpi.radiorev == 8)) { 24865 phy_a1 = 25; 24866 phy_a3 = 25; 24867 } else { 24868 phy_a1 = 35; 24869 phy_a3 = 35; 24870 } 24871 } 24872 24873 if (cal_mode == CAL_GCTRL) { 24874 if ((pi->pubpi.radiorev == 5) 24875 && (CHSPEC_IS2G(pi->radio_chanspec))) 24876 phy_a1 = 55; 24877 else if (((pi->pubpi.radiorev == 7) && 24878 (CHSPEC_IS2G(pi->radio_chanspec))) || 24879 ((pi->pubpi.radiorev == 8) && 24880 (CHSPEC_IS2G(pi->radio_chanspec)))) 24881 phy_a1 = 60; 24882 else 24883 phy_a1 = 63; 24884 24885 } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { 24886 24887 phy_a1 = 35; 24888 phy_a3 = 35; 24889 } 24890 24891 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24892 0x29b, (0x1 << 0), (1) << 0); 24893 24894 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24895 0x29b, (0x1 << 0), (0) << 0); 24896 24897 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24898 0x2a4, (0x1 << 13), (1) << 13); 24899 24900 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24901 0x2a4, (0x1 << 13), (0) << 13); 24902 24903 write_phy_reg(pi, 0x2a1, 0x80); 24904 write_phy_reg(pi, 0x2a2, 0x100); 24905 24906 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24907 0x2a4, (0x7 << 4), (11) << 4); 24908 24909 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24910 0x2a4, (0x7 << 8), (11) << 8); 24911 24912 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24913 0x2a4, (0x7 << 0), (0x3) << 0); 24914 24915 write_phy_reg(pi, 0x2e5, 0x20); 24916 24917 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24918 24919 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24920 24921 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24922 24923 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24924 1, ((core == 0) ? 1 : 2), 0, 24925 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24926 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24927 0, ((core == 0) ? 2 : 1), 0, 24928 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24929 24930 write_phy_reg(pi, 0x2be, 1); 24931 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24932 24933 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24934 0, 0x3, 0, 24935 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24936 24937 wlc_phy_table_write_nphy(pi, 24938 (core == 24939 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24940 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24941 32, &phy_a8); 24942 24943 if (cal_mode != CAL_GCTRL) { 24944 if (CHSPEC_IS5G(pi->radio_chanspec)) 24945 wlc_phy_a1_nphy(pi, core, 5, 0, 35); 24946 } 24947 24948 wlc_phy_rfctrl_override_1tomany_nphy( 24949 pi, 24950 NPHY_REV7_RfctrlOverride_cmd_txgain, 24951 phy_a5, (1 << core), 1); 24952 24953 } else { 24954 24955 if (txgains) { 24956 if (txgains->useindex) { 24957 phy_a4 = 15 - ((txgains->index) >> 3); 24958 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24959 if (NREV_GE(pi->pubpi.phy_rev, 6) && 24960 pi->sh->chip == BCMA_CHIP_ID_BCM47162) { 24961 phy_a5 = 0x10f7 | (phy_a4 << 8); 24962 } else if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24963 phy_a5 = 0x00f7 | (phy_a4 << 8); 24964 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 24965 phy_a5 = 0x10f7 | (phy_a4 << 8); 24966 } else { 24967 phy_a5 = 0x50f7 | (phy_a4 << 8); 24968 } 24969 } else { 24970 phy_a5 = 0x70f7 | (phy_a4 << 8); 24971 } 24972 wlc_phy_rfctrl_override_nphy(pi, 24973 (0x1 << 13), 24974 phy_a5, 24975 (1 << core), 0); 24976 } else { 24977 wlc_phy_rfctrl_override_nphy(pi, 24978 (0x1 << 13), 24979 0x5bf7, 24980 (1 << core), 0); 24981 } 24982 } 24983 24984 if (CHSPEC_IS2G(pi->radio_chanspec)) 24985 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 45 : 64; 24986 else 24987 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24988 24989 m[phy_a7] = 0; 24990 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24991 24992 phy_a2 = 63; 24993 24994 if (cal_mode == CAL_FULL) { 24995 phy_a1 = 25; 24996 phy_a3 = 25; 24997 } else if (cal_mode == CAL_SOFT) { 24998 phy_a1 = 25; 24999 phy_a3 = 25; 25000 } else if (cal_mode == CAL_GCTRL) { 25001 phy_a1 = 63; 25002 phy_a3 = 25; 25003 } else { 25004 25005 phy_a1 = 25; 25006 phy_a3 = 25; 25007 } 25008 25009 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 25010 0x29b, (0x1 << 0), (1) << 0); 25011 25012 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 25013 0x29b, (0x1 << 0), (0) << 0); 25014 25015 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 25016 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25017 0x2a4, (0x1 << 13), (1) << 13); 25018 25019 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 25020 0x2a4, (0x1 << 13), (0) << 13); 25021 25022 write_phy_reg(pi, 0x2a1, 0x20); 25023 write_phy_reg(pi, 0x2a2, 0x60); 25024 25025 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25026 0x2a4, (0xf << 4), (9) << 4); 25027 25028 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25029 0x2a4, (0xf << 8), (9) << 8); 25030 25031 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25032 0x2a4, (0xf << 0), (0x2) << 0); 25033 25034 write_phy_reg(pi, 0x2e5, 0x20); 25035 } else { 25036 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25037 0x2a4, (0x1 << 11), (1) << 11); 25038 25039 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 25040 0x2a4, (0x1 << 11), (0) << 11); 25041 25042 write_phy_reg(pi, 0x2a1, 0x80); 25043 write_phy_reg(pi, 0x2a2, 0x600); 25044 25045 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25046 0x2a4, (0x7 << 4), (0) << 4); 25047 25048 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25049 0x2a4, (0x7 << 8), (0) << 8); 25050 25051 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 25052 0x2a4, (0x7 << 0), (0x3) << 0); 25053 25054 mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); 25055 25056 } 25057 25058 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 25059 25060 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 25061 25062 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 25063 25064 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); 25065 25066 write_phy_reg(pi, 0x2be, 1); 25067 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 25068 25069 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 25070 25071 wlc_phy_table_write_nphy(pi, 25072 (core == 25073 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 25074 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 25075 32, &phy_a8); 25076 25077 if (cal_mode != CAL_GCTRL) 25078 wlc_phy_a1_nphy(pi, core, 5, 0, 40); 25079 } 25080 } 25081 25082 static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core) 25083 { 25084 int phy_a1; 25085 int phy_a2; 25086 bool phy_a3; 25087 struct nphy_ipa_txcalgains phy_a4; 25088 bool phy_a5 = false; 25089 bool phy_a6 = true; 25090 s32 phy_a7, phy_a8; 25091 u32 phy_a9; 25092 int phy_a10; 25093 bool phy_a11 = false; 25094 int phy_a12; 25095 u8 phy_a13 = 0; 25096 u8 phy_a14; 25097 u8 *phy_a15 = NULL; 25098 25099 phy_a4.useindex = true; 25100 phy_a12 = start_gain; 25101 25102 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25103 25104 phy_a2 = 20; 25105 phy_a1 = 1; 25106 25107 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25108 if (pi->pubpi.radiorev == 5) { 25109 25110 phy_a15 = pad_gain_codes_used_2057rev5; 25111 phy_a13 = 25112 ARRAY_SIZE(pad_gain_codes_used_2057rev5) - 1; 25113 25114 } else if ((pi->pubpi.radiorev == 7) 25115 || (pi->pubpi.radiorev == 8)) { 25116 25117 phy_a15 = pad_gain_codes_used_2057rev7; 25118 phy_a13 = 25119 ARRAY_SIZE(pad_gain_codes_used_2057rev7) - 1; 25120 25121 } else { 25122 25123 phy_a15 = pad_all_gain_codes_2057; 25124 phy_a13 = ARRAY_SIZE(pad_all_gain_codes_2057) - 25125 1; 25126 } 25127 25128 } else { 25129 25130 phy_a15 = pga_all_gain_codes_2057; 25131 phy_a13 = ARRAY_SIZE(pga_all_gain_codes_2057) - 1; 25132 } 25133 25134 phy_a14 = 0; 25135 25136 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25137 if (CHSPEC_IS2G(pi->radio_chanspec)) 25138 phy_a4.gains.pad[core] = 25139 (u16) phy_a15[phy_a12]; 25140 else 25141 phy_a4.gains.pga[core] = 25142 (u16) phy_a15[phy_a12]; 25143 25144 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25145 25146 wlc_phy_table_read_nphy(pi, 25147 (core == 25148 PHY_CORE_0 ? 25149 NPHY_TBL_ID_EPSILONTBL0 : 25150 NPHY_TBL_ID_EPSILONTBL1), 1, 25151 63, 32, &phy_a9); 25152 25153 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25154 25155 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25156 (phy_a8 == 4095) || (phy_a8 == -4096)); 25157 25158 if (!phy_a6 && (phy_a3 != phy_a5)) { 25159 if (!phy_a3) 25160 phy_a12 -= (u8) phy_a1; 25161 25162 phy_a11 = true; 25163 break; 25164 } 25165 25166 if (phy_a3) 25167 phy_a12 += (u8) phy_a1; 25168 else 25169 phy_a12 -= (u8) phy_a1; 25170 25171 if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { 25172 if (phy_a12 < phy_a14) 25173 phy_a12 = phy_a14; 25174 else 25175 phy_a12 = phy_a13; 25176 25177 phy_a11 = true; 25178 break; 25179 } 25180 25181 phy_a6 = false; 25182 phy_a5 = phy_a3; 25183 } 25184 25185 } else { 25186 phy_a2 = 10; 25187 phy_a1 = 8; 25188 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25189 phy_a4.index = (u8) phy_a12; 25190 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25191 25192 wlc_phy_table_read_nphy(pi, 25193 (core == 25194 PHY_CORE_0 ? 25195 NPHY_TBL_ID_EPSILONTBL0 : 25196 NPHY_TBL_ID_EPSILONTBL1), 1, 25197 63, 32, &phy_a9); 25198 25199 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25200 25201 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25202 (phy_a8 == 4095) || (phy_a8 == -4096)); 25203 25204 if (!phy_a6 && (phy_a3 != phy_a5)) { 25205 if (!phy_a3) 25206 phy_a12 -= (u8) phy_a1; 25207 25208 phy_a11 = true; 25209 break; 25210 } 25211 25212 if (phy_a3) 25213 phy_a12 += (u8) phy_a1; 25214 else 25215 phy_a12 -= (u8) phy_a1; 25216 25217 if ((phy_a12 < 0) || (phy_a12 > 127)) { 25218 if (phy_a12 < 0) 25219 phy_a12 = 0; 25220 else 25221 phy_a12 = 127; 25222 25223 phy_a11 = true; 25224 break; 25225 } 25226 25227 phy_a6 = false; 25228 phy_a5 = phy_a3; 25229 } 25230 25231 } 25232 25233 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25234 return (u8) phy_a15[phy_a12]; 25235 else 25236 return (u8) phy_a12; 25237 25238 } 25239 25240 static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal) 25241 { 25242 struct nphy_ipa_txcalgains phy_b1[2]; 25243 struct nphy_papd_restore_state phy_b2; 25244 bool phy_b3; 25245 u8 phy_b4; 25246 u8 phy_b5; 25247 s16 phy_b6, phy_b7, phy_b8; 25248 u16 phy_b9; 25249 s16 phy_b10, phy_b11, phy_b12; 25250 25251 phy_b11 = 0; 25252 phy_b12 = 0; 25253 phy_b7 = 0; 25254 phy_b8 = 0; 25255 phy_b6 = 0; 25256 25257 if (pi->nphy_papd_skip == 1) 25258 return; 25259 25260 phy_b3 = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 25261 MCTL_EN_MAC)); 25262 if (!phy_b3) 25263 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25264 25265 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25266 25267 pi->nphy_force_papd_cal = false; 25268 25269 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) 25270 pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = 25271 wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); 25272 25273 pi->nphy_papd_last_cal = pi->sh->now; 25274 pi->nphy_papd_recal_counter++; 25275 25276 phy_b4 = pi->nphy_txpwrctrl; 25277 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25278 25279 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, 25280 nphy_papd_scaltbl); 25281 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, 25282 nphy_papd_scaltbl); 25283 25284 phy_b9 = read_phy_reg(pi, 0x01); 25285 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 25286 25287 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25288 s32 i, val = 0; 25289 for (i = 0; i < 64; i++) 25290 wlc_phy_table_write_nphy(pi, 25291 ((phy_b5 == 25292 PHY_CORE_0) ? 25293 NPHY_TBL_ID_EPSILONTBL0 : 25294 NPHY_TBL_ID_EPSILONTBL1), 1, 25295 i, 32, &val); 25296 } 25297 25298 wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); 25299 25300 phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); 25301 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25302 wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); 25303 25304 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25305 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25306 if ((pi->pubpi.radiorev == 3) 25307 || (pi->pubpi.radiorev == 4) 25308 || (pi->pubpi.radiorev == 6)) { 25309 pi->nphy_papd_cal_gain_index[phy_b5] = 25310 23; 25311 } else if (pi->pubpi.radiorev == 5) { 25312 pi->nphy_papd_cal_gain_index[phy_b5] = 25313 0; 25314 pi->nphy_papd_cal_gain_index[phy_b5] = 25315 wlc_phy_a3_nphy( 25316 pi, 25317 pi-> 25318 nphy_papd_cal_gain_index 25319 [phy_b5], 25320 phy_b5); 25321 25322 } else if ((pi->pubpi.radiorev == 7) 25323 || (pi->pubpi.radiorev == 8)) { 25324 25325 pi->nphy_papd_cal_gain_index[phy_b5] = 25326 0; 25327 pi->nphy_papd_cal_gain_index[phy_b5] = 25328 wlc_phy_a3_nphy( 25329 pi, 25330 pi-> 25331 nphy_papd_cal_gain_index 25332 [phy_b5], 25333 phy_b5); 25334 25335 } 25336 25337 phy_b1[phy_b5].gains.pad[phy_b5] = 25338 pi->nphy_papd_cal_gain_index[phy_b5]; 25339 25340 } else { 25341 pi->nphy_papd_cal_gain_index[phy_b5] = 0; 25342 pi->nphy_papd_cal_gain_index[phy_b5] = 25343 wlc_phy_a3_nphy( 25344 pi, 25345 pi-> 25346 nphy_papd_cal_gain_index 25347 [phy_b5], phy_b5); 25348 phy_b1[phy_b5].gains.pga[phy_b5] = 25349 pi->nphy_papd_cal_gain_index[phy_b5]; 25350 } 25351 } else { 25352 phy_b1[phy_b5].useindex = true; 25353 phy_b1[phy_b5].index = 16; 25354 phy_b1[phy_b5].index = 25355 wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, 25356 phy_b5); 25357 25358 pi->nphy_papd_cal_gain_index[phy_b5] = 25359 15 - ((phy_b1[phy_b5].index) >> 3); 25360 } 25361 25362 switch (pi->nphy_papd_cal_type) { 25363 case 0: 25364 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); 25365 break; 25366 case 1: 25367 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); 25368 break; 25369 } 25370 25371 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25372 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25373 } 25374 25375 if (NREV_LT(pi->pubpi.phy_rev, 7)) 25376 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25377 25378 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25379 int eps_offset = 0; 25380 25381 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25382 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25383 if (pi->pubpi.radiorev == 3) 25384 eps_offset = -2; 25385 else if (pi->pubpi.radiorev == 5) 25386 eps_offset = 3; 25387 else 25388 eps_offset = -1; 25389 } else { 25390 eps_offset = 2; 25391 } 25392 25393 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25394 phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; 25395 phy_b10 = 0; 25396 if ((pi->pubpi.radiorev == 3) || 25397 (pi->pubpi.radiorev == 4) || 25398 (pi->pubpi.radiorev == 6)) { 25399 phy_b12 = -( 25400 nphy_papd_padgain_dlt_2g_2057rev3n4 25401 [phy_b8] + 1) / 2; 25402 phy_b10 = -1; 25403 } else if (pi->pubpi.radiorev == 5) { 25404 phy_b12 = -( 25405 nphy_papd_padgain_dlt_2g_2057rev5 25406 [phy_b8] + 1) / 2; 25407 } else if ((pi->pubpi.radiorev == 7) || 25408 (pi->pubpi.radiorev == 8)) { 25409 phy_b12 = -( 25410 nphy_papd_padgain_dlt_2g_2057rev7 25411 [phy_b8] + 1) / 2; 25412 } 25413 } else { 25414 phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; 25415 if ((pi->pubpi.radiorev == 3) || 25416 (pi->pubpi.radiorev == 4) || 25417 (pi->pubpi.radiorev == 6)) 25418 phy_b11 = 25419 -(nphy_papd_pgagain_dlt_5g_2057 25420 [phy_b7] 25421 + 1) / 2; 25422 else if ((pi->pubpi.radiorev == 7) 25423 || (pi->pubpi.radiorev == 8)) 25424 phy_b11 = -( 25425 nphy_papd_pgagain_dlt_5g_2057rev7 25426 [phy_b7] + 1) / 2; 25427 25428 phy_b10 = -9; 25429 } 25430 25431 if (CHSPEC_IS2G(pi->radio_chanspec)) 25432 phy_b6 = 25433 -60 + 27 + eps_offset + phy_b12 + 25434 phy_b10; 25435 else 25436 phy_b6 = 25437 -60 + 27 + eps_offset + phy_b11 + 25438 phy_b10; 25439 25440 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25441 0x29c, (0x1ff << 7), (phy_b6) << 7); 25442 25443 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25444 } else { 25445 if (NREV_LT(pi->pubpi.phy_rev, 5)) 25446 eps_offset = 4; 25447 else 25448 eps_offset = 2; 25449 25450 phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); 25451 25452 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25453 phy_b11 = 25454 -(nphy_papd_pga_gain_delta_ipa_2g[ 25455 phy_b7] + 25456 1) / 2; 25457 phy_b10 = 0; 25458 } else { 25459 phy_b11 = 25460 -(nphy_papd_pga_gain_delta_ipa_5g[ 25461 phy_b7] + 25462 1) / 2; 25463 phy_b10 = -9; 25464 } 25465 25466 phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; 25467 25468 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25469 0x29c, (0x1ff << 7), (phy_b6) << 7); 25470 25471 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25472 } 25473 } 25474 25475 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 25476 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25477 25478 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 25479 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25480 25481 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 25482 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25483 0x2a4, (0x1 << 13), (0) << 13); 25484 25485 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25486 0x2a4, (0x1 << 13), (0) << 13); 25487 25488 } else { 25489 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25490 0x2a4, (0x1 << 11), (0) << 11); 25491 25492 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25493 0x2a4, (0x1 << 11), (0) << 11); 25494 25495 } 25496 pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; 25497 25498 write_phy_reg(pi, 0x01, phy_b9); 25499 25500 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 25501 25502 wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); 25503 if (phy_b4 == PHY_TPC_HW_OFF) { 25504 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25505 (s8) (pi->nphy_txpwrindex[0]. 25506 index_internal), false); 25507 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25508 (s8) (pi->nphy_txpwrindex[1]. 25509 index_internal), false); 25510 } 25511 25512 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25513 25514 if (!phy_b3) 25515 wlapi_enable_mac(pi->sh->physhim); 25516 } 25517 25518 void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype) 25519 { 25520 struct nphy_txgains target_gain; 25521 u8 tx_pwr_ctrl_state; 25522 bool fullcal = true; 25523 bool restore_tx_gain = false; 25524 bool mphase; 25525 25526 if (PHY_MUTED(pi)) 25527 return; 25528 25529 if (caltype == PHY_PERICAL_AUTO) 25530 fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); 25531 else if (caltype == PHY_PERICAL_PARTIAL) 25532 fullcal = false; 25533 25534 if (pi->cal_type_override != PHY_PERICAL_AUTO) 25535 fullcal = 25536 (pi->cal_type_override == 25537 PHY_PERICAL_FULL) ? true : false; 25538 25539 if ((pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT)) { 25540 if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) 25541 wlc_phy_cal_perical_mphase_restart(pi); 25542 } 25543 25544 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL)) 25545 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); 25546 25547 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25548 25549 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25550 25551 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || 25552 (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { 25553 pi->nphy_cal_orig_pwr_idx[0] = 25554 (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); 25555 pi->nphy_cal_orig_pwr_idx[1] = 25556 (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); 25557 25558 if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { 25559 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 25560 0x110, 16, 25561 pi->nphy_cal_orig_tx_gain); 25562 } else { 25563 pi->nphy_cal_orig_tx_gain[0] = 0; 25564 pi->nphy_cal_orig_tx_gain[1] = 0; 25565 } 25566 } 25567 target_gain = wlc_phy_get_tx_gain_nphy(pi); 25568 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 25569 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25570 25571 if (pi->antsel_type == ANTSEL_2x3) 25572 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, true); 25573 25574 mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); 25575 if (!mphase) { 25576 25577 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25578 wlc_phy_precal_txgain_nphy(pi); 25579 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25580 restore_tx_gain = true; 25581 25582 target_gain = pi->nphy_cal_target_gain; 25583 } 25584 if (0 == 25585 wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, 25586 mphase)) { 25587 if (PHY_IPA(pi)) 25588 wlc_phy_a4(pi, true); 25589 25590 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25591 wlapi_enable_mac(pi->sh->physhim); 25592 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 25593 10000); 25594 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25595 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25596 25597 if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, 25598 (pi->first_cal_after_assoc || 25599 (pi->cal_type_override == 25600 PHY_PERICAL_FULL)) ? 2 : 0, false)) { 25601 wlc_phy_savecal_nphy(pi); 25602 25603 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25604 25605 pi->nphy_perical_last = pi->sh->now; 25606 } 25607 } 25608 if (caltype != PHY_PERICAL_AUTO) 25609 wlc_phy_rssi_cal_nphy(pi); 25610 25611 if (pi->first_cal_after_assoc 25612 || (pi->cal_type_override == PHY_PERICAL_FULL)) { 25613 pi->first_cal_after_assoc = false; 25614 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25615 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25616 } 25617 25618 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25619 wlc_phy_radio205x_vcocal_nphy(pi); 25620 } else { 25621 switch (pi->mphase_cal_phase_id) { 25622 case MPHASE_CAL_STATE_INIT: 25623 pi->nphy_perical_last = pi->sh->now; 25624 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25625 25626 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25627 wlc_phy_precal_txgain_nphy(pi); 25628 25629 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25630 pi->mphase_cal_phase_id++; 25631 break; 25632 25633 case MPHASE_CAL_STATE_TXPHASE0: 25634 case MPHASE_CAL_STATE_TXPHASE1: 25635 case MPHASE_CAL_STATE_TXPHASE2: 25636 case MPHASE_CAL_STATE_TXPHASE3: 25637 case MPHASE_CAL_STATE_TXPHASE4: 25638 case MPHASE_CAL_STATE_TXPHASE5: 25639 if ((pi->radar_percal_mask & 0x10) != 0) 25640 pi->nphy_rxcal_active = true; 25641 25642 if (wlc_phy_cal_txiqlo_nphy 25643 (pi, pi->nphy_cal_target_gain, fullcal, 25644 true) != 0) { 25645 25646 wlc_phy_cal_perical_mphase_reset(pi); 25647 break; 25648 } 25649 25650 if (NREV_LE(pi->pubpi.phy_rev, 2) && 25651 (pi->mphase_cal_phase_id == 25652 MPHASE_CAL_STATE_TXPHASE4)) 25653 pi->mphase_cal_phase_id += 2; 25654 else 25655 pi->mphase_cal_phase_id++; 25656 break; 25657 25658 case MPHASE_CAL_STATE_PAPDCAL: 25659 if ((pi->radar_percal_mask & 0x2) != 0) 25660 pi->nphy_rxcal_active = true; 25661 25662 if (PHY_IPA(pi)) 25663 wlc_phy_a4(pi, true); 25664 25665 pi->mphase_cal_phase_id++; 25666 break; 25667 25668 case MPHASE_CAL_STATE_RXCAL: 25669 if ((pi->radar_percal_mask & 0x1) != 0) 25670 pi->nphy_rxcal_active = true; 25671 if (wlc_phy_cal_rxiq_nphy(pi, target_gain, 25672 (pi->first_cal_after_assoc || 25673 (pi->cal_type_override == 25674 PHY_PERICAL_FULL)) ? 2 : 0, 25675 false) == 0) 25676 wlc_phy_savecal_nphy(pi); 25677 25678 pi->mphase_cal_phase_id++; 25679 break; 25680 25681 case MPHASE_CAL_STATE_RSSICAL: 25682 if ((pi->radar_percal_mask & 0x4) != 0) 25683 pi->nphy_rxcal_active = true; 25684 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25685 wlc_phy_rssi_cal_nphy(pi); 25686 25687 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25688 wlc_phy_radio205x_vcocal_nphy(pi); 25689 25690 restore_tx_gain = true; 25691 25692 if (pi->first_cal_after_assoc) 25693 pi->mphase_cal_phase_id++; 25694 else 25695 wlc_phy_cal_perical_mphase_reset(pi); 25696 25697 break; 25698 25699 case MPHASE_CAL_STATE_IDLETSSI: 25700 if ((pi->radar_percal_mask & 0x8) != 0) 25701 pi->nphy_rxcal_active = true; 25702 25703 if (pi->first_cal_after_assoc) { 25704 pi->first_cal_after_assoc = false; 25705 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25706 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25707 } 25708 25709 wlc_phy_cal_perical_mphase_reset(pi); 25710 break; 25711 25712 default: 25713 wlc_phy_cal_perical_mphase_reset(pi); 25714 break; 25715 } 25716 } 25717 25718 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25719 if (restore_tx_gain) { 25720 if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { 25721 25722 wlc_phy_txpwr_index_nphy(pi, 1, 25723 pi-> 25724 nphy_cal_orig_pwr_idx 25725 [0], false); 25726 wlc_phy_txpwr_index_nphy(pi, 2, 25727 pi-> 25728 nphy_cal_orig_pwr_idx 25729 [1], false); 25730 25731 pi->nphy_txpwrindex[0].index = -1; 25732 pi->nphy_txpwrindex[1].index = -1; 25733 } else { 25734 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25735 (s8) (pi-> 25736 nphy_txpwrindex 25737 [0]. 25738 index_internal), 25739 false); 25740 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25741 (s8) (pi-> 25742 nphy_txpwrindex 25743 [1]. 25744 index_internal), 25745 false); 25746 } 25747 } 25748 } 25749 25750 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 25751 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25752 wlapi_enable_mac(pi->sh->physhim); 25753 } 25754 25755 int 25756 wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 25757 bool fullcal, bool mphase) 25758 { 25759 u16 val; 25760 u16 tbl_buf[11]; 25761 u8 cal_cnt; 25762 u16 cal_cmd; 25763 u8 num_cals, max_cal_cmds; 25764 u16 core_no, cal_type; 25765 u16 diq_start = 0; 25766 u8 phy_bw; 25767 u16 max_val; 25768 u16 tone_freq; 25769 u16 gain_save[2]; 25770 u16 cal_gain[2]; 25771 struct nphy_iqcal_params cal_params[2]; 25772 u32 tbl_len; 25773 const void *tbl_ptr; 25774 bool ladder_updated[2]; 25775 u8 mphase_cal_lastphase = 0; 25776 int bcmerror = 0; 25777 bool phyhang_avoid_state = false; 25778 25779 static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { 25780 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, 25781 0x1902, 25782 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, 25783 0x6407 25784 }; 25785 25786 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { 25787 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, 25788 0x3200, 25789 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, 25790 0x6407 25791 }; 25792 25793 static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { 25794 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, 25795 0x1202, 25796 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, 25797 0x4707 25798 }; 25799 25800 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { 25801 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, 25802 0x2300, 25803 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, 25804 0x4707 25805 }; 25806 25807 static const u16 tbl_tx_iqlo_cal_startcoefs[] = { 25808 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25809 0x0000 25810 }; 25811 25812 static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { 25813 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, 25814 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 25815 }; 25816 25817 static const u16 tbl_tx_iqlo_cal_cmds_recal[] = { 25818 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, 25819 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 25820 }; 25821 25822 static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { 25823 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25824 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25825 0x0000 25826 }; 25827 25828 static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { 25829 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, 25830 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 25831 }; 25832 25833 static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { 25834 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, 25835 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 25836 }; 25837 25838 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25839 25840 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 25841 phyhang_avoid_state = pi->phyhang_avoid; 25842 pi->phyhang_avoid = false; 25843 } 25844 25845 if (CHSPEC_IS40(pi->radio_chanspec)) 25846 phy_bw = 40; 25847 else 25848 phy_bw = 20; 25849 25850 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 25851 25852 for (core_no = 0; core_no <= 1; core_no++) { 25853 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 25854 &cal_params[core_no]); 25855 cal_gain[core_no] = cal_params[core_no].cal_gain; 25856 } 25857 25858 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 25859 25860 wlc_phy_txcal_radio_setup_nphy(pi); 25861 25862 wlc_phy_txcal_physetup_nphy(pi); 25863 25864 ladder_updated[0] = ladder_updated[1] = false; 25865 if (!(NREV_GE(pi->pubpi.phy_rev, 6) || 25866 (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) 25867 && (CHSPEC_IS2G(pi->radio_chanspec))))) { 25868 25869 if (phy_bw == 40) { 25870 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; 25871 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); 25872 } else { 25873 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; 25874 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); 25875 } 25876 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, 25877 16, tbl_ptr); 25878 25879 if (phy_bw == 40) { 25880 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; 25881 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); 25882 } else { 25883 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; 25884 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); 25885 } 25886 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, 25887 16, tbl_ptr); 25888 } 25889 25890 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25891 write_phy_reg(pi, 0xc2, 0x8ad9); 25892 else 25893 write_phy_reg(pi, 0xc2, 0x8aa9); 25894 25895 max_val = 250; 25896 tone_freq = (phy_bw == 20) ? 2500 : 5000; 25897 25898 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25899 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); 25900 bcmerror = 0; 25901 } else { 25902 bcmerror = 25903 wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, 25904 false); 25905 } 25906 25907 if (bcmerror == 0) { 25908 25909 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25910 tbl_ptr = pi->mphase_txcal_bestcoeffs; 25911 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25912 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25913 tbl_len -= 2; 25914 } else { 25915 if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { 25916 25917 tbl_ptr = pi->nphy_txiqlocal_bestc; 25918 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25919 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25920 tbl_len -= 2; 25921 } else { 25922 25923 fullcal = true; 25924 25925 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25926 tbl_ptr = 25927 tbl_tx_iqlo_cal_startcoefs_nphyrev3; 25928 tbl_len = ARRAY_SIZE( 25929 tbl_tx_iqlo_cal_startcoefs_nphyrev3); 25930 } else { 25931 tbl_ptr = tbl_tx_iqlo_cal_startcoefs; 25932 tbl_len = ARRAY_SIZE( 25933 tbl_tx_iqlo_cal_startcoefs); 25934 } 25935 } 25936 } 25937 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, 25938 16, tbl_ptr); 25939 25940 if (fullcal) { 25941 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25942 ARRAY_SIZE( 25943 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : 25944 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); 25945 } else { 25946 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25947 ARRAY_SIZE( 25948 tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : 25949 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); 25950 } 25951 25952 if (mphase) { 25953 cal_cnt = pi->mphase_txcal_cmdidx; 25954 if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) 25955 num_cals = cal_cnt + pi->mphase_txcal_numcmds; 25956 else 25957 num_cals = max_cal_cmds; 25958 } else { 25959 cal_cnt = 0; 25960 num_cals = max_cal_cmds; 25961 } 25962 25963 for (; cal_cnt < num_cals; cal_cnt++) { 25964 25965 if (fullcal) { 25966 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25967 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 25968 [cal_cnt] : 25969 tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; 25970 } else { 25971 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25972 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[ 25973 cal_cnt] 25974 : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; 25975 } 25976 25977 core_no = ((cal_cmd & 0x3000) >> 12); 25978 cal_type = ((cal_cmd & 0x0F00) >> 8); 25979 25980 if (NREV_GE(pi->pubpi.phy_rev, 6) || 25981 (NREV_IS(pi->pubpi.phy_rev, 5) && 25982 PHY_IPA(pi) 25983 && (CHSPEC_IS2G(pi->radio_chanspec)))) { 25984 if (!ladder_updated[core_no]) { 25985 wlc_phy_update_txcal_ladder_nphy( 25986 pi, 25987 core_no); 25988 ladder_updated[core_no] = true; 25989 } 25990 } 25991 25992 val = 25993 (cal_params[core_no]. 25994 ncorr[cal_type] << 8) | NPHY_N_GCTL; 25995 write_phy_reg(pi, 0xc1, val); 25996 25997 if ((cal_type == 1) || (cal_type == 3) 25998 || (cal_type == 4)) { 25999 26000 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26001 1, 69 + core_no, 16, 26002 tbl_buf); 26003 26004 diq_start = tbl_buf[0]; 26005 26006 tbl_buf[0] = 0; 26007 wlc_phy_table_write_nphy(pi, 26008 NPHY_TBL_ID_IQLOCAL, 1, 26009 69 + core_no, 16, 26010 tbl_buf); 26011 } 26012 26013 write_phy_reg(pi, 0xc0, cal_cmd); 26014 26015 SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), 26016 20000); 26017 if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, 26018 "HW error: txiq calib")) 26019 return -EIO; 26020 26021 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26022 tbl_len, 96, 16, tbl_buf); 26023 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26024 tbl_len, 64, 16, tbl_buf); 26025 26026 if ((cal_type == 1) || (cal_type == 3) 26027 || (cal_type == 4)) { 26028 26029 tbl_buf[0] = diq_start; 26030 26031 } 26032 26033 } 26034 26035 if (mphase) { 26036 pi->mphase_txcal_cmdidx = num_cals; 26037 if (pi->mphase_txcal_cmdidx >= max_cal_cmds) 26038 pi->mphase_txcal_cmdidx = 0; 26039 } 26040 26041 mphase_cal_lastphase = 26042 (NREV_LE(pi->pubpi.phy_rev, 2)) ? 26043 MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; 26044 26045 if (!mphase 26046 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { 26047 26048 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, 26049 16, tbl_buf); 26050 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 26051 16, tbl_buf); 26052 26053 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 26054 26055 tbl_buf[0] = 0; 26056 tbl_buf[1] = 0; 26057 tbl_buf[2] = 0; 26058 tbl_buf[3] = 0; 26059 26060 } 26061 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 26062 16, tbl_buf); 26063 26064 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, 26065 16, tbl_buf); 26066 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 26067 16, tbl_buf); 26068 26069 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 26070 16, tbl_buf); 26071 26072 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 26073 if (NREV_LT(pi->pubpi.phy_rev, 3)) 26074 tbl_len -= 2; 26075 26076 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26077 tbl_len, 96, 16, 26078 pi->nphy_txiqlocal_bestc); 26079 26080 pi->nphy_txiqlocal_coeffsvalid = true; 26081 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 26082 } else { 26083 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 26084 if (NREV_LT(pi->pubpi.phy_rev, 3)) 26085 tbl_len -= 2; 26086 26087 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26088 tbl_len, 96, 16, 26089 pi->mphase_txcal_bestcoeffs); 26090 } 26091 26092 wlc_phy_stopplayback_nphy(pi); 26093 26094 write_phy_reg(pi, 0xc2, 0x0000); 26095 26096 } 26097 26098 wlc_phy_txcal_phycleanup_nphy(pi); 26099 26100 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 26101 gain_save); 26102 26103 wlc_phy_txcal_radio_cleanup_nphy(pi); 26104 26105 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 26106 if (!mphase 26107 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) 26108 wlc_phy_tx_iq_war_nphy(pi); 26109 } 26110 26111 if (NREV_GE(pi->pubpi.phy_rev, 4)) 26112 pi->phyhang_avoid = phyhang_avoid_state; 26113 26114 wlc_phy_stay_in_carriersearch_nphy(pi, false); 26115 26116 return bcmerror; 26117 } 26118 26119 static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi) 26120 { 26121 u16 tbl_buf[7]; 26122 26123 if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && 26124 (pi->nphy_txiqlocal_coeffsvalid)) { 26125 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26126 ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); 26127 26128 if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || 26129 (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || 26130 (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || 26131 (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { 26132 26133 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 26134 16, pi->nphy_txiqlocal_bestc); 26135 26136 tbl_buf[0] = 0; 26137 tbl_buf[1] = 0; 26138 tbl_buf[2] = 0; 26139 tbl_buf[3] = 0; 26140 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 26141 16, tbl_buf); 26142 26143 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 26144 16, 26145 &pi->nphy_txiqlocal_bestc[5]); 26146 26147 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 26148 16, 26149 &pi->nphy_txiqlocal_bestc[5]); 26150 } 26151 } 26152 } 26153 26154 void 26155 wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, 26156 struct nphy_iq_comp *pcomp) 26157 { 26158 if (write) { 26159 write_phy_reg(pi, 0x9a, pcomp->a0); 26160 write_phy_reg(pi, 0x9b, pcomp->b0); 26161 write_phy_reg(pi, 0x9c, pcomp->a1); 26162 write_phy_reg(pi, 0x9d, pcomp->b1); 26163 } else { 26164 pcomp->a0 = read_phy_reg(pi, 0x9a); 26165 pcomp->b0 = read_phy_reg(pi, 0x9b); 26166 pcomp->a1 = read_phy_reg(pi, 0x9c); 26167 pcomp->b1 = read_phy_reg(pi, 0x9d); 26168 } 26169 } 26170 26171 void 26172 wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, 26173 u16 num_samps, u8 wait_time, u8 wait_for_crs) 26174 { 26175 u8 core; 26176 26177 write_phy_reg(pi, 0x12b, num_samps); 26178 mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); 26179 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, 26180 (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); 26181 26182 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); 26183 26184 SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), 26185 10000); 26186 if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, 26187 "HW error: rxiq est")) 26188 return; 26189 26190 if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { 26191 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 26192 est[core].i_pwr = 26193 (read_phy_reg(pi, 26194 NPHY_IqestipwrAccHi(core)) << 16) 26195 | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); 26196 est[core].q_pwr = 26197 (read_phy_reg(pi, 26198 NPHY_IqestqpwrAccHi(core)) << 16) 26199 | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); 26200 est[core].iq_prod = 26201 (read_phy_reg(pi, 26202 NPHY_IqestIqAccHi(core)) << 16) | 26203 read_phy_reg(pi, NPHY_IqestIqAccLo(core)); 26204 } 26205 } 26206 } 26207 26208 #define CAL_RETRY_CNT 2 26209 static void wlc_phy_calc_rx_iq_comp_nphy(struct brcms_phy *pi, u8 core_mask) 26210 { 26211 u8 curr_core; 26212 struct phy_iq_est est[PHY_CORE_MAX]; 26213 struct nphy_iq_comp old_comp, new_comp; 26214 s32 iq = 0; 26215 u32 ii = 0, qq = 0; 26216 s16 iq_nbits, qq_nbits, brsh, arsh; 26217 s32 a, b, temp; 26218 int bcmerror = 0; 26219 uint cal_retry = 0; 26220 26221 if (core_mask == 0x0) 26222 return; 26223 26224 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); 26225 new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; 26226 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26227 26228 cal_try: 26229 wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); 26230 26231 new_comp = old_comp; 26232 26233 for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { 26234 26235 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26236 iq = est[curr_core].iq_prod; 26237 ii = est[curr_core].i_pwr; 26238 qq = est[curr_core].q_pwr; 26239 } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26240 iq = est[curr_core].iq_prod; 26241 ii = est[curr_core].i_pwr; 26242 qq = est[curr_core].q_pwr; 26243 } else { 26244 continue; 26245 } 26246 26247 if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { 26248 bcmerror = -EBADE; 26249 break; 26250 } 26251 26252 iq_nbits = wlc_phy_nbits(iq); 26253 qq_nbits = wlc_phy_nbits(qq); 26254 26255 arsh = 10 - (30 - iq_nbits); 26256 if (arsh >= 0) { 26257 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); 26258 temp = (s32) (ii >> arsh); 26259 if (temp == 0) { 26260 bcmerror = -EBADE; 26261 break; 26262 } 26263 } else { 26264 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); 26265 temp = (s32) (ii << -arsh); 26266 if (temp == 0) { 26267 bcmerror = -EBADE; 26268 break; 26269 } 26270 } 26271 26272 a /= temp; 26273 26274 brsh = qq_nbits - 31 + 20; 26275 if (brsh >= 0) { 26276 b = (qq << (31 - qq_nbits)); 26277 temp = (s32) (ii >> brsh); 26278 if (temp == 0) { 26279 bcmerror = -EBADE; 26280 break; 26281 } 26282 } else { 26283 b = (qq << (31 - qq_nbits)); 26284 temp = (s32) (ii << -brsh); 26285 if (temp == 0) { 26286 bcmerror = -EBADE; 26287 break; 26288 } 26289 } 26290 b /= temp; 26291 b -= a * a; 26292 b = (s32) int_sqrt((unsigned long) b); 26293 b -= (1 << 10); 26294 26295 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26296 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26297 new_comp.a0 = (s16) a & 0x3ff; 26298 new_comp.b0 = (s16) b & 0x3ff; 26299 } else { 26300 26301 new_comp.a0 = (s16) b & 0x3ff; 26302 new_comp.b0 = (s16) a & 0x3ff; 26303 } 26304 } 26305 if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26306 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26307 new_comp.a1 = (s16) a & 0x3ff; 26308 new_comp.b1 = (s16) b & 0x3ff; 26309 } else { 26310 26311 new_comp.a1 = (s16) b & 0x3ff; 26312 new_comp.b1 = (s16) a & 0x3ff; 26313 } 26314 } 26315 } 26316 26317 if (bcmerror != 0) { 26318 pr_debug("%s: Failed, cnt = %d\n", __func__, cal_retry); 26319 26320 if (cal_retry < CAL_RETRY_CNT) { 26321 cal_retry++; 26322 goto cal_try; 26323 } 26324 26325 new_comp = old_comp; 26326 } 26327 26328 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26329 } 26330 26331 static void wlc_phy_rxcal_radio_setup_nphy(struct brcms_phy *pi, u8 rx_core) 26332 { 26333 u16 offtune_val; 26334 u16 bias_g = 0; 26335 u16 bias_a = 0; 26336 26337 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26338 if (rx_core == PHY_CORE_0) { 26339 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26340 pi->tx_rx_cal_radio_saveregs[0] = 26341 read_radio_reg(pi, 26342 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); 26343 pi->tx_rx_cal_radio_saveregs[1] = 26344 read_radio_reg(pi, 26345 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); 26346 26347 write_radio_reg(pi, 26348 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26349 0x3); 26350 write_radio_reg(pi, 26351 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26352 0xaf); 26353 26354 } else { 26355 pi->tx_rx_cal_radio_saveregs[0] = 26356 read_radio_reg(pi, 26357 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); 26358 pi->tx_rx_cal_radio_saveregs[1] = 26359 read_radio_reg(pi, 26360 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); 26361 26362 write_radio_reg( 26363 pi, 26364 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26365 0x3); 26366 write_radio_reg( 26367 pi, 26368 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26369 0x7f); 26370 } 26371 26372 } else { 26373 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26374 pi->tx_rx_cal_radio_saveregs[0] = 26375 read_radio_reg(pi, 26376 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); 26377 pi->tx_rx_cal_radio_saveregs[1] = 26378 read_radio_reg(pi, 26379 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); 26380 26381 write_radio_reg( 26382 pi, 26383 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26384 0x3); 26385 write_radio_reg( 26386 pi, 26387 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26388 0xaf); 26389 26390 } else { 26391 pi->tx_rx_cal_radio_saveregs[0] = 26392 read_radio_reg(pi, 26393 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); 26394 pi->tx_rx_cal_radio_saveregs[1] = 26395 read_radio_reg(pi, 26396 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); 26397 26398 write_radio_reg(pi, 26399 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26400 0x3); 26401 write_radio_reg(pi, 26402 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26403 0x7f); 26404 } 26405 } 26406 26407 } else { 26408 if (rx_core == PHY_CORE_0) { 26409 pi->tx_rx_cal_radio_saveregs[0] = 26410 read_radio_reg(pi, 26411 RADIO_2056_TX_RXIQCAL_TXMUX | 26412 RADIO_2056_TX1); 26413 pi->tx_rx_cal_radio_saveregs[1] = 26414 read_radio_reg(pi, 26415 RADIO_2056_RX_RXIQCAL_RXMUX | 26416 RADIO_2056_RX0); 26417 26418 if (pi->pubpi.radiorev >= 5) { 26419 pi->tx_rx_cal_radio_saveregs[2] = 26420 read_radio_reg(pi, 26421 RADIO_2056_RX_RXSPARE2 | 26422 RADIO_2056_RX0); 26423 pi->tx_rx_cal_radio_saveregs[3] = 26424 read_radio_reg(pi, 26425 RADIO_2056_TX_TXSPARE2 | 26426 RADIO_2056_TX1); 26427 } 26428 26429 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26430 26431 if (pi->pubpi.radiorev >= 5) { 26432 pi->tx_rx_cal_radio_saveregs[4] = 26433 read_radio_reg(pi, 26434 RADIO_2056_RX_LNAA_MASTER 26435 | RADIO_2056_RX0); 26436 26437 write_radio_reg( 26438 pi, 26439 RADIO_2056_RX_LNAA_MASTER 26440 | RADIO_2056_RX0, 0x40); 26441 26442 write_radio_reg(pi, 26443 RADIO_2056_TX_TXSPARE2 | 26444 RADIO_2056_TX1, bias_a); 26445 26446 write_radio_reg(pi, 26447 RADIO_2056_RX_RXSPARE2 | 26448 RADIO_2056_RX0, bias_a); 26449 } else { 26450 pi->tx_rx_cal_radio_saveregs[4] = 26451 read_radio_reg(pi, 26452 RADIO_2056_RX_LNAA_TUNE 26453 | RADIO_2056_RX0); 26454 26455 offtune_val = 26456 (pi->tx_rx_cal_radio_saveregs 26457 [2] & 0xF0) >> 8; 26458 offtune_val = 26459 (offtune_val <= 0x7) ? 0xF : 0; 26460 26461 mod_radio_reg(pi, 26462 RADIO_2056_RX_LNAA_TUNE | 26463 RADIO_2056_RX0, 0xF0, 26464 (offtune_val << 8)); 26465 } 26466 26467 write_radio_reg(pi, 26468 RADIO_2056_TX_RXIQCAL_TXMUX | 26469 RADIO_2056_TX1, 0x9); 26470 write_radio_reg(pi, 26471 RADIO_2056_RX_RXIQCAL_RXMUX | 26472 RADIO_2056_RX0, 0x9); 26473 } else { 26474 if (pi->pubpi.radiorev >= 5) { 26475 pi->tx_rx_cal_radio_saveregs[4] = 26476 read_radio_reg( 26477 pi, 26478 RADIO_2056_RX_LNAG_MASTER 26479 | RADIO_2056_RX0); 26480 26481 write_radio_reg( 26482 pi, 26483 RADIO_2056_RX_LNAG_MASTER 26484 | RADIO_2056_RX0, 0x40); 26485 26486 write_radio_reg( 26487 pi, 26488 RADIO_2056_TX_TXSPARE2 26489 | 26490 RADIO_2056_TX1, bias_g); 26491 26492 write_radio_reg( 26493 pi, 26494 RADIO_2056_RX_RXSPARE2 26495 | 26496 RADIO_2056_RX0, bias_g); 26497 26498 } else { 26499 pi->tx_rx_cal_radio_saveregs[4] = 26500 read_radio_reg( 26501 pi, 26502 RADIO_2056_RX_LNAG_TUNE 26503 | RADIO_2056_RX0); 26504 26505 offtune_val = 26506 (pi-> 26507 tx_rx_cal_radio_saveregs[2] & 26508 0xF0) >> 8; 26509 offtune_val = 26510 (offtune_val <= 0x7) ? 0xF : 0; 26511 26512 mod_radio_reg(pi, 26513 RADIO_2056_RX_LNAG_TUNE | 26514 RADIO_2056_RX0, 0xF0, 26515 (offtune_val << 8)); 26516 } 26517 26518 write_radio_reg(pi, 26519 RADIO_2056_TX_RXIQCAL_TXMUX | 26520 RADIO_2056_TX1, 0x6); 26521 write_radio_reg(pi, 26522 RADIO_2056_RX_RXIQCAL_RXMUX | 26523 RADIO_2056_RX0, 0x6); 26524 } 26525 26526 } else { 26527 pi->tx_rx_cal_radio_saveregs[0] = 26528 read_radio_reg(pi, 26529 RADIO_2056_TX_RXIQCAL_TXMUX | 26530 RADIO_2056_TX0); 26531 pi->tx_rx_cal_radio_saveregs[1] = 26532 read_radio_reg(pi, 26533 RADIO_2056_RX_RXIQCAL_RXMUX | 26534 RADIO_2056_RX1); 26535 26536 if (pi->pubpi.radiorev >= 5) { 26537 pi->tx_rx_cal_radio_saveregs[2] = 26538 read_radio_reg(pi, 26539 RADIO_2056_RX_RXSPARE2 | 26540 RADIO_2056_RX1); 26541 pi->tx_rx_cal_radio_saveregs[3] = 26542 read_radio_reg(pi, 26543 RADIO_2056_TX_TXSPARE2 | 26544 RADIO_2056_TX0); 26545 } 26546 26547 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26548 26549 if (pi->pubpi.radiorev >= 5) { 26550 pi->tx_rx_cal_radio_saveregs[4] = 26551 read_radio_reg( 26552 pi, 26553 RADIO_2056_RX_LNAA_MASTER 26554 | RADIO_2056_RX1); 26555 26556 write_radio_reg( 26557 pi, 26558 RADIO_2056_RX_LNAA_MASTER | 26559 RADIO_2056_RX1, 0x40); 26560 26561 write_radio_reg( 26562 pi, 26563 RADIO_2056_TX_TXSPARE2 26564 | 26565 RADIO_2056_TX0, bias_a); 26566 26567 write_radio_reg( 26568 pi, 26569 RADIO_2056_RX_RXSPARE2 26570 | 26571 RADIO_2056_RX1, bias_a); 26572 } else { 26573 pi->tx_rx_cal_radio_saveregs[4] = 26574 read_radio_reg( 26575 pi, 26576 RADIO_2056_RX_LNAA_TUNE 26577 | RADIO_2056_RX1); 26578 26579 offtune_val = 26580 (pi-> 26581 tx_rx_cal_radio_saveregs[2] & 26582 0xF0) >> 8; 26583 offtune_val = 26584 (offtune_val <= 0x7) ? 0xF : 0; 26585 26586 mod_radio_reg(pi, 26587 RADIO_2056_RX_LNAA_TUNE | 26588 RADIO_2056_RX1, 0xF0, 26589 (offtune_val << 8)); 26590 } 26591 26592 write_radio_reg(pi, 26593 RADIO_2056_TX_RXIQCAL_TXMUX | 26594 RADIO_2056_TX0, 0x9); 26595 write_radio_reg(pi, 26596 RADIO_2056_RX_RXIQCAL_RXMUX | 26597 RADIO_2056_RX1, 0x9); 26598 } else { 26599 if (pi->pubpi.radiorev >= 5) { 26600 pi->tx_rx_cal_radio_saveregs[4] = 26601 read_radio_reg( 26602 pi, 26603 RADIO_2056_RX_LNAG_MASTER 26604 | RADIO_2056_RX1); 26605 26606 write_radio_reg( 26607 pi, 26608 RADIO_2056_RX_LNAG_MASTER 26609 | RADIO_2056_RX1, 0x40); 26610 26611 write_radio_reg( 26612 pi, 26613 RADIO_2056_TX_TXSPARE2 26614 | 26615 RADIO_2056_TX0, bias_g); 26616 26617 write_radio_reg( 26618 pi, 26619 RADIO_2056_RX_RXSPARE2 26620 | 26621 RADIO_2056_RX1, bias_g); 26622 } else { 26623 pi->tx_rx_cal_radio_saveregs[4] = 26624 read_radio_reg( 26625 pi, 26626 RADIO_2056_RX_LNAG_TUNE 26627 | RADIO_2056_RX1); 26628 26629 offtune_val = 26630 (pi-> 26631 tx_rx_cal_radio_saveregs[2] & 26632 0xF0) >> 8; 26633 offtune_val = 26634 (offtune_val <= 0x7) ? 0xF : 0; 26635 26636 mod_radio_reg(pi, 26637 RADIO_2056_RX_LNAG_TUNE | 26638 RADIO_2056_RX1, 0xF0, 26639 (offtune_val << 8)); 26640 } 26641 26642 write_radio_reg(pi, 26643 RADIO_2056_TX_RXIQCAL_TXMUX | 26644 RADIO_2056_TX0, 0x6); 26645 write_radio_reg(pi, 26646 RADIO_2056_RX_RXIQCAL_RXMUX | 26647 RADIO_2056_RX1, 0x6); 26648 } 26649 } 26650 } 26651 } 26652 26653 static void wlc_phy_rxcal_radio_cleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26654 { 26655 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26656 if (rx_core == PHY_CORE_0) { 26657 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26658 write_radio_reg( 26659 pi, 26660 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26661 pi-> 26662 tx_rx_cal_radio_saveregs[0]); 26663 write_radio_reg( 26664 pi, 26665 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26666 pi-> 26667 tx_rx_cal_radio_saveregs[1]); 26668 26669 } else { 26670 write_radio_reg( 26671 pi, 26672 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26673 pi-> 26674 tx_rx_cal_radio_saveregs[0]); 26675 write_radio_reg( 26676 pi, 26677 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26678 pi-> 26679 tx_rx_cal_radio_saveregs[1]); 26680 } 26681 26682 } else { 26683 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26684 write_radio_reg( 26685 pi, 26686 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26687 pi-> 26688 tx_rx_cal_radio_saveregs[0]); 26689 write_radio_reg( 26690 pi, 26691 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26692 pi-> 26693 tx_rx_cal_radio_saveregs[1]); 26694 26695 } else { 26696 write_radio_reg( 26697 pi, 26698 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26699 pi-> 26700 tx_rx_cal_radio_saveregs[0]); 26701 write_radio_reg( 26702 pi, 26703 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26704 pi-> 26705 tx_rx_cal_radio_saveregs[1]); 26706 } 26707 } 26708 26709 } else { 26710 if (rx_core == PHY_CORE_0) { 26711 write_radio_reg(pi, 26712 RADIO_2056_TX_RXIQCAL_TXMUX | 26713 RADIO_2056_TX1, 26714 pi->tx_rx_cal_radio_saveregs[0]); 26715 26716 write_radio_reg(pi, 26717 RADIO_2056_RX_RXIQCAL_RXMUX | 26718 RADIO_2056_RX0, 26719 pi->tx_rx_cal_radio_saveregs[1]); 26720 26721 if (pi->pubpi.radiorev >= 5) { 26722 write_radio_reg(pi, 26723 RADIO_2056_RX_RXSPARE2 | 26724 RADIO_2056_RX0, 26725 pi-> 26726 tx_rx_cal_radio_saveregs[2]); 26727 26728 write_radio_reg(pi, 26729 RADIO_2056_TX_TXSPARE2 | 26730 RADIO_2056_TX1, 26731 pi-> 26732 tx_rx_cal_radio_saveregs[3]); 26733 } 26734 26735 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26736 if (pi->pubpi.radiorev >= 5) 26737 write_radio_reg( 26738 pi, 26739 RADIO_2056_RX_LNAA_MASTER 26740 | RADIO_2056_RX0, 26741 pi-> 26742 tx_rx_cal_radio_saveregs 26743 [4]); 26744 else 26745 write_radio_reg( 26746 pi, 26747 RADIO_2056_RX_LNAA_TUNE 26748 | RADIO_2056_RX0, 26749 pi-> 26750 tx_rx_cal_radio_saveregs 26751 [4]); 26752 } else { 26753 if (pi->pubpi.radiorev >= 5) 26754 write_radio_reg( 26755 pi, 26756 RADIO_2056_RX_LNAG_MASTER 26757 | RADIO_2056_RX0, 26758 pi-> 26759 tx_rx_cal_radio_saveregs 26760 [4]); 26761 else 26762 write_radio_reg( 26763 pi, 26764 RADIO_2056_RX_LNAG_TUNE 26765 | RADIO_2056_RX0, 26766 pi-> 26767 tx_rx_cal_radio_saveregs 26768 [4]); 26769 } 26770 26771 } else { 26772 write_radio_reg(pi, 26773 RADIO_2056_TX_RXIQCAL_TXMUX | 26774 RADIO_2056_TX0, 26775 pi->tx_rx_cal_radio_saveregs[0]); 26776 26777 write_radio_reg(pi, 26778 RADIO_2056_RX_RXIQCAL_RXMUX | 26779 RADIO_2056_RX1, 26780 pi->tx_rx_cal_radio_saveregs[1]); 26781 26782 if (pi->pubpi.radiorev >= 5) { 26783 write_radio_reg(pi, 26784 RADIO_2056_RX_RXSPARE2 | 26785 RADIO_2056_RX1, 26786 pi-> 26787 tx_rx_cal_radio_saveregs[2]); 26788 26789 write_radio_reg(pi, 26790 RADIO_2056_TX_TXSPARE2 | 26791 RADIO_2056_TX0, 26792 pi-> 26793 tx_rx_cal_radio_saveregs[3]); 26794 } 26795 26796 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26797 if (pi->pubpi.radiorev >= 5) 26798 write_radio_reg( 26799 pi, 26800 RADIO_2056_RX_LNAA_MASTER 26801 | RADIO_2056_RX1, 26802 pi-> 26803 tx_rx_cal_radio_saveregs 26804 [4]); 26805 else 26806 write_radio_reg( 26807 pi, 26808 RADIO_2056_RX_LNAA_TUNE 26809 | RADIO_2056_RX1, 26810 pi-> 26811 tx_rx_cal_radio_saveregs 26812 [4]); 26813 } else { 26814 if (pi->pubpi.radiorev >= 5) 26815 write_radio_reg( 26816 pi, 26817 RADIO_2056_RX_LNAG_MASTER 26818 | RADIO_2056_RX1, 26819 pi-> 26820 tx_rx_cal_radio_saveregs 26821 [4]); 26822 else 26823 write_radio_reg( 26824 pi, 26825 RADIO_2056_RX_LNAG_TUNE 26826 | RADIO_2056_RX1, 26827 pi-> 26828 tx_rx_cal_radio_saveregs 26829 [4]); 26830 } 26831 } 26832 } 26833 } 26834 26835 static void wlc_phy_rxcal_physetup_nphy(struct brcms_phy *pi, u8 rx_core) 26836 { 26837 u8 tx_core; 26838 u16 rx_antval, tx_antval; 26839 26840 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26841 tx_core = rx_core; 26842 else 26843 tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; 26844 26845 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); 26846 pi->tx_rx_cal_phy_saveregs[1] = 26847 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); 26848 pi->tx_rx_cal_phy_saveregs[2] = 26849 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); 26850 pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); 26851 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); 26852 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); 26853 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); 26854 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); 26855 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); 26856 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26857 pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); 26858 pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); 26859 pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); 26860 pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); 26861 } 26862 26863 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 26864 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 26865 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 26866 0x29b, (0x1 << 0), (0) << 0); 26867 26868 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 26869 0x29b, (0x1 << 0), (0) << 0); 26870 26871 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26872 26873 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26874 26875 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); 26876 26877 } else { 26878 26879 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 26880 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26881 mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); 26882 mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); 26883 } 26884 26885 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); 26886 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26887 (0x1 << 2), (0x1 << 2)); 26888 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 26889 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 26890 (0x1 << 0) | (0x1 << 1), 0); 26891 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 26892 0x8f : 0xa5, 26893 (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); 26894 } 26895 26896 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, 26897 RADIO_MIMO_CORESEL_CORE1 | 26898 RADIO_MIMO_CORESEL_CORE2); 26899 26900 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26901 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 26902 0, 0, 0, 26903 NPHY_REV7_RFCTRLOVERRIDE_ID0); 26904 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, 26905 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26906 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, 26907 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26908 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, 26909 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26910 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, 26911 NPHY_REV7_RFCTRLOVERRIDE_ID2); 26912 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, 26913 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26914 if (CHSPEC_IS40(pi->radio_chanspec)) 26915 wlc_phy_rfctrl_override_nphy_rev7( 26916 pi, 26917 (0x1 << 7), 26918 2, 0, 0, 26919 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26920 else 26921 wlc_phy_rfctrl_override_nphy_rev7( 26922 pi, 26923 (0x1 << 7), 26924 0, 0, 0, 26925 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26926 26927 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 26928 0, 0, 0, 26929 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26930 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, 26931 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26932 } else { 26933 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); 26934 } 26935 26936 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 26937 26938 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26939 26940 wlc_phy_rfctrlintc_override_nphy(pi, 26941 NPHY_RfctrlIntc_override_TRSW, 26942 0x1, rx_core + 1); 26943 } else { 26944 26945 if (rx_core == PHY_CORE_0) { 26946 rx_antval = 0x1; 26947 tx_antval = 0x8; 26948 } else { 26949 rx_antval = 0x4; 26950 tx_antval = 0x2; 26951 } 26952 26953 wlc_phy_rfctrlintc_override_nphy(pi, 26954 NPHY_RfctrlIntc_override_TRSW, 26955 rx_antval, rx_core + 1); 26956 wlc_phy_rfctrlintc_override_nphy(pi, 26957 NPHY_RfctrlIntc_override_TRSW, 26958 tx_antval, tx_core + 1); 26959 } 26960 } 26961 26962 static void wlc_phy_rxcal_phycleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26963 { 26964 26965 write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); 26966 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, 26967 pi->tx_rx_cal_phy_saveregs[1]); 26968 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26969 pi->tx_rx_cal_phy_saveregs[2]); 26970 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); 26971 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); 26972 26973 write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); 26974 write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); 26975 write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); 26976 write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); 26977 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26978 write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); 26979 write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); 26980 write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); 26981 write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); 26982 } 26983 26984 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 26985 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 26986 } 26987 26988 static void 26989 wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rx_core, 26990 u16 *rxgain, u8 cal_type) 26991 { 26992 26993 u16 num_samps; 26994 struct phy_iq_est est[PHY_CORE_MAX]; 26995 u8 tx_core; 26996 struct nphy_iq_comp save_comp, zero_comp; 26997 u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, 26998 thresh_pwr = 10000; 26999 s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; 27000 bool gainctrl_done = false; 27001 u8 mix_tia_gain = 3; 27002 s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; 27003 s8 curr_gaintbl_index = 3; 27004 u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; 27005 const struct nphy_ipa_txrxgain *nphy_rxcal_gaintbl; 27006 u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; 27007 int fine_gain_idx; 27008 s8 txpwrindex; 27009 u16 nphy_rxcal_txgain[2]; 27010 27011 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27012 tx_core = rx_core; 27013 else 27014 tx_core = 1 - rx_core; 27015 27016 num_samps = 1024; 27017 desired_log2_pwr = 13; 27018 27019 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); 27020 zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; 27021 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); 27022 27023 if (CHSPEC_IS5G(pi->radio_chanspec)) { 27024 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27025 mix_tia_gain = 3; 27026 else if (NREV_GE(pi->pubpi.phy_rev, 4)) 27027 mix_tia_gain = 4; 27028 else 27029 mix_tia_gain = 6; 27030 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27031 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; 27032 else 27033 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; 27034 } else { 27035 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27036 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; 27037 else 27038 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; 27039 } 27040 27041 do { 27042 27043 hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? 27044 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; 27045 lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; 27046 lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; 27047 lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; 27048 lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; 27049 txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; 27050 27051 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27052 wlc_phy_rfctrl_override_1tomany_nphy( 27053 pi, 27054 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27055 ((lpf_biq1 << 12) | 27056 (lpf_biq0 << 8) | 27057 (mix_tia_gain << 4) | (lna2 << 2) 27058 | lna1), 0x3, 0); 27059 else 27060 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 27061 ((hpvga << 12) | 27062 (lpf_biq1 << 10) | 27063 (lpf_biq0 << 8) | 27064 (mix_tia_gain << 4) | 27065 (lna2 << 2) | lna1), 0x3, 27066 0); 27067 27068 pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; 27069 27070 if (txpwrindex == -1) { 27071 nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; 27072 nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; 27073 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 27074 2, 0x110, 16, 27075 nphy_rxcal_txgain); 27076 } else { 27077 wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, 27078 false); 27079 } 27080 27081 wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? 27082 NPHY_RXCAL_TONEFREQ_40MHz : 27083 NPHY_RXCAL_TONEFREQ_20MHz, 27084 NPHY_RXCAL_TONEAMP, 0, cal_type, false); 27085 27086 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27087 i_pwr = (est[rx_core].i_pwr + num_samps / 2) / num_samps; 27088 q_pwr = (est[rx_core].q_pwr + num_samps / 2) / num_samps; 27089 curr_pwr = i_pwr + q_pwr; 27090 27091 switch (gainctrl_dirn) { 27092 case NPHY_RXCAL_GAIN_INIT: 27093 if (curr_pwr > thresh_pwr) { 27094 gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; 27095 prev_gaintbl_index = curr_gaintbl_index; 27096 curr_gaintbl_index--; 27097 } else { 27098 gainctrl_dirn = NPHY_RXCAL_GAIN_UP; 27099 prev_gaintbl_index = curr_gaintbl_index; 27100 curr_gaintbl_index++; 27101 } 27102 break; 27103 27104 case NPHY_RXCAL_GAIN_UP: 27105 if (curr_pwr > thresh_pwr) { 27106 gainctrl_done = true; 27107 optim_pwr = prev_pwr; 27108 optim_gaintbl_index = prev_gaintbl_index; 27109 } else { 27110 prev_gaintbl_index = curr_gaintbl_index; 27111 curr_gaintbl_index++; 27112 } 27113 break; 27114 27115 case NPHY_RXCAL_GAIN_DOWN: 27116 if (curr_pwr > thresh_pwr) { 27117 prev_gaintbl_index = curr_gaintbl_index; 27118 curr_gaintbl_index--; 27119 } else { 27120 gainctrl_done = true; 27121 optim_pwr = curr_pwr; 27122 optim_gaintbl_index = curr_gaintbl_index; 27123 } 27124 break; 27125 27126 default: 27127 break; 27128 } 27129 27130 if ((curr_gaintbl_index < 0) || 27131 (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { 27132 gainctrl_done = true; 27133 optim_pwr = curr_pwr; 27134 optim_gaintbl_index = prev_gaintbl_index; 27135 } else { 27136 prev_pwr = curr_pwr; 27137 } 27138 27139 wlc_phy_stopplayback_nphy(pi); 27140 } while (!gainctrl_done); 27141 27142 hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; 27143 lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; 27144 lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; 27145 lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; 27146 lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; 27147 txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; 27148 27149 actual_log2_pwr = wlc_phy_nbits(optim_pwr); 27150 delta_pwr = desired_log2_pwr - actual_log2_pwr; 27151 27152 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 27153 fine_gain_idx = (int)lpf_biq1 + delta_pwr; 27154 27155 if (fine_gain_idx + (int)lpf_biq0 > 10) 27156 lpf_biq1 = 10 - lpf_biq0; 27157 else 27158 lpf_biq1 = (u16) max(fine_gain_idx, 0); 27159 27160 wlc_phy_rfctrl_override_1tomany_nphy( 27161 pi, 27162 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27163 ((lpf_biq1 << 12) | 27164 (lpf_biq0 << 8) | 27165 (mix_tia_gain << 4) | 27166 (lna2 << 2) | lna1), 0x3, 27167 0); 27168 } else { 27169 hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); 27170 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 27171 ((hpvga << 12) | 27172 (lpf_biq1 << 10) | 27173 (lpf_biq0 << 8) | 27174 (mix_tia_gain << 4) | 27175 (lna2 << 2) | 27176 lna1), 0x3, 0); 27177 } 27178 27179 if (rxgain != NULL) { 27180 *rxgain++ = lna1; 27181 *rxgain++ = lna2; 27182 *rxgain++ = mix_tia_gain; 27183 *rxgain++ = lpf_biq0; 27184 *rxgain++ = lpf_biq1; 27185 *rxgain = hpvga; 27186 } 27187 27188 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); 27189 } 27190 27191 static void 27192 wlc_phy_rxcal_gainctrl_nphy(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, 27193 u8 cal_type) 27194 { 27195 wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); 27196 } 27197 27198 static u8 27199 wlc_phy_rc_sweep_nphy(struct brcms_phy *pi, u8 core_idx, u8 loopback_type) 27200 { 27201 u32 target_bws[2] = { 9500, 21000 }; 27202 u32 ref_tones[2] = { 3000, 6000 }; 27203 u32 target_bw, ref_tone; 27204 27205 u32 target_pwr_ratios[2] = { 28606, 18468 }; 27206 u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; 27207 27208 u16 start_rccal_ovr_val = 128; 27209 u16 txlpf_rccal_lpc_ovr_val = 128; 27210 u16 rxlpf_rccal_hpc_ovr_val = 159; 27211 27212 u16 orig_txlpf_rccal_lpc_ovr_val; 27213 u16 orig_rxlpf_rccal_hpc_ovr_val; 27214 u16 radio_addr_offset_rx; 27215 u16 radio_addr_offset_tx; 27216 u16 orig_dcBypass; 27217 u16 orig_RxStrnFilt40Num[6]; 27218 u16 orig_RxStrnFilt40Den[4]; 27219 u16 orig_rfctrloverride[2]; 27220 u16 orig_rfctrlauxreg[2]; 27221 u16 orig_rfctrlrssiothers; 27222 u16 tx_lpf_bw = 4; 27223 27224 u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; 27225 u16 lpf_hpc = 7, hpvga_hpc = 7; 27226 27227 s8 rccal_stepsize; 27228 u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; 27229 u32 ref_iq_vals = 0, target_iq_vals = 0; 27230 u16 num_samps, log_num_samps = 10; 27231 struct phy_iq_est est[PHY_CORE_MAX]; 27232 27233 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27234 return 0; 27235 27236 num_samps = (1 << log_num_samps); 27237 27238 if (CHSPEC_IS40(pi->radio_chanspec)) { 27239 target_bw = target_bws[1]; 27240 target_pwr_ratio = target_pwr_ratios[1]; 27241 ref_tone = ref_tones[1]; 27242 rx_lpf_bw = rx_lpf_bws[1]; 27243 } else { 27244 target_bw = target_bws[0]; 27245 target_pwr_ratio = target_pwr_ratios[0]; 27246 ref_tone = ref_tones[0]; 27247 rx_lpf_bw = rx_lpf_bws[0]; 27248 } 27249 27250 if (core_idx == 0) { 27251 radio_addr_offset_rx = RADIO_2056_RX0; 27252 radio_addr_offset_tx = 27253 (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 27254 } else { 27255 radio_addr_offset_rx = RADIO_2056_RX1; 27256 radio_addr_offset_tx = 27257 (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; 27258 } 27259 27260 orig_txlpf_rccal_lpc_ovr_val = 27261 read_radio_reg(pi, 27262 (RADIO_2056_TX_TXLPF_RCCAL | 27263 radio_addr_offset_tx)); 27264 orig_rxlpf_rccal_hpc_ovr_val = 27265 read_radio_reg(pi, 27266 (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27267 radio_addr_offset_rx)); 27268 27269 orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); 27270 27271 orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); 27272 orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); 27273 orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); 27274 orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); 27275 orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); 27276 orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); 27277 orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); 27278 orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); 27279 orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); 27280 orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); 27281 27282 orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); 27283 orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); 27284 orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); 27285 orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); 27286 orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); 27287 27288 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27289 txlpf_rccal_lpc_ovr_val); 27290 27291 write_radio_reg(pi, 27292 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27293 rxlpf_rccal_hpc_ovr_val); 27294 27295 mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); 27296 27297 write_phy_reg(pi, 0x267, 0x02d4); 27298 write_phy_reg(pi, 0x268, 0x0000); 27299 write_phy_reg(pi, 0x269, 0x0000); 27300 write_phy_reg(pi, 0x26a, 0x0000); 27301 write_phy_reg(pi, 0x26b, 0x0000); 27302 write_phy_reg(pi, 0x26c, 0x02d4); 27303 write_phy_reg(pi, 0x26d, 0x0000); 27304 write_phy_reg(pi, 0x26e, 0x0000); 27305 write_phy_reg(pi, 0x26f, 0x0000); 27306 write_phy_reg(pi, 0x270, 0x0000); 27307 27308 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); 27309 or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); 27310 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); 27311 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); 27312 27313 mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, 27314 (0x7 << 10), (tx_lpf_bw << 10)); 27315 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27316 (0x7 << 0), (hpvga_hpc << 0)); 27317 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27318 (0x7 << 4), (lpf_hpc << 4)); 27319 mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, 27320 (0x7 << 8), (rx_lpf_bw << 8)); 27321 27322 rccal_stepsize = 16; 27323 rccal_val = start_rccal_ovr_val + rccal_stepsize; 27324 27325 while (rccal_stepsize >= 0) { 27326 write_radio_reg(pi, 27327 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27328 radio_addr_offset_rx), rccal_val); 27329 27330 if (rccal_stepsize == 16) { 27331 27332 wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, 27333 0, 1, false); 27334 udelay(2); 27335 27336 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27337 27338 if (core_idx == 0) 27339 ref_iq_vals = 27340 max_t(u32, (est[0].i_pwr + 27341 est[0].q_pwr) >> 27342 (log_num_samps + 1), 27343 1); 27344 else 27345 ref_iq_vals = 27346 max_t(u32, (est[1].i_pwr + 27347 est[1].q_pwr) >> 27348 (log_num_samps + 1), 27349 1); 27350 27351 wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, 27352 0, 1, false); 27353 udelay(2); 27354 } 27355 27356 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27357 27358 if (core_idx == 0) 27359 target_iq_vals = (est[0].i_pwr + est[0].q_pwr) >> 27360 (log_num_samps + 1); 27361 else 27362 target_iq_vals = 27363 (est[1].i_pwr + 27364 est[1].q_pwr) >> (log_num_samps + 1); 27365 27366 pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); 27367 27368 if (rccal_stepsize == 0) 27369 rccal_stepsize--; 27370 else if (rccal_stepsize == 1) { 27371 last_rccal_val = rccal_val; 27372 rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; 27373 last_pwr_ratio = pwr_ratio; 27374 rccal_stepsize--; 27375 } else { 27376 rccal_stepsize = (rccal_stepsize >> 1); 27377 rccal_val += ((pwr_ratio > target_pwr_ratio) ? 27378 rccal_stepsize : (-rccal_stepsize)); 27379 } 27380 27381 if (rccal_stepsize == -1) { 27382 best_rccal_val = 27383 (abs((int)last_pwr_ratio - 27384 (int)target_pwr_ratio) < 27385 abs((int)pwr_ratio - 27386 (int)target_pwr_ratio)) ? last_rccal_val : 27387 rccal_val; 27388 27389 if (CHSPEC_IS40(pi->radio_chanspec)) { 27390 if ((best_rccal_val > 140) 27391 || (best_rccal_val < 135)) 27392 best_rccal_val = 138; 27393 } else { 27394 if ((best_rccal_val > 142) 27395 || (best_rccal_val < 137)) 27396 best_rccal_val = 140; 27397 } 27398 27399 write_radio_reg(pi, 27400 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27401 radio_addr_offset_rx), best_rccal_val); 27402 } 27403 } 27404 27405 wlc_phy_stopplayback_nphy(pi); 27406 27407 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27408 orig_txlpf_rccal_lpc_ovr_val); 27409 write_radio_reg(pi, 27410 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27411 orig_rxlpf_rccal_hpc_ovr_val); 27412 27413 mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); 27414 27415 write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); 27416 write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); 27417 write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); 27418 write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); 27419 write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); 27420 write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); 27421 write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); 27422 write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); 27423 write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); 27424 write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); 27425 27426 write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); 27427 write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); 27428 write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); 27429 write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); 27430 write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); 27431 27432 pi->nphy_anarxlpf_adjusted = false; 27433 27434 return best_rccal_val - 0x80; 27435 } 27436 27437 #define WAIT_FOR_SCOPE 4000 27438 static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, 27439 struct nphy_txgains target_gain, 27440 u8 cal_type, bool debug) 27441 { 27442 u16 orig_BBConfig; 27443 u8 core_no, rx_core; 27444 u8 best_rccal[2]; 27445 u16 gain_save[2]; 27446 u16 cal_gain[2]; 27447 struct nphy_iqcal_params cal_params[2]; 27448 u8 rxcore_state; 27449 s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; 27450 s8 txlpf_idac; 27451 bool phyhang_avoid_state = false; 27452 bool skip_rxiqcal = false; 27453 27454 orig_BBConfig = read_phy_reg(pi, 0x01); 27455 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 27456 27457 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27458 27459 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 27460 phyhang_avoid_state = pi->phyhang_avoid; 27461 pi->phyhang_avoid = false; 27462 } 27463 27464 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27465 27466 for (core_no = 0; core_no <= 1; core_no++) { 27467 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27468 &cal_params[core_no]); 27469 cal_gain[core_no] = cal_params[core_no].cal_gain; 27470 } 27471 27472 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27473 27474 rxcore_state = wlc_phy_rxcore_getstate_nphy( 27475 (struct brcms_phy_pub *) pi); 27476 27477 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27478 27479 skip_rxiqcal = 27480 ((rxcore_state & (1 << rx_core)) == 0) ? true : false; 27481 27482 wlc_phy_rxcal_physetup_nphy(pi, rx_core); 27483 27484 wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); 27485 27486 if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { 27487 27488 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); 27489 27490 wlc_phy_tx_tone_nphy(pi, 27491 (CHSPEC_IS40( 27492 pi->radio_chanspec)) ? 27493 NPHY_RXCAL_TONEFREQ_40MHz : 27494 NPHY_RXCAL_TONEFREQ_20MHz, 27495 NPHY_RXCAL_TONEAMP, 0, cal_type, 27496 false); 27497 27498 if (debug) 27499 mdelay(WAIT_FOR_SCOPE); 27500 27501 wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); 27502 wlc_phy_stopplayback_nphy(pi); 27503 } 27504 27505 if (((cal_type == 1) || (cal_type == 2)) 27506 && NREV_LT(pi->pubpi.phy_rev, 7)) { 27507 27508 if (rx_core == PHY_CORE_1) { 27509 27510 if (rxcore_state == 1) 27511 wlc_phy_rxcore_setstate_nphy( 27512 (struct brcms_phy_pub *) pi, 3); 27513 27514 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 27515 1); 27516 27517 best_rccal[rx_core] = 27518 wlc_phy_rc_sweep_nphy(pi, rx_core, 1); 27519 pi->nphy_rccal_value = best_rccal[rx_core]; 27520 27521 if (rxcore_state == 1) 27522 wlc_phy_rxcore_setstate_nphy( 27523 (struct brcms_phy_pub *) pi, 27524 rxcore_state); 27525 } 27526 } 27527 27528 wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); 27529 27530 wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); 27531 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27532 } 27533 27534 if ((cal_type == 1) || (cal_type == 2)) { 27535 27536 best_rccal[0] = best_rccal[1]; 27537 write_radio_reg(pi, 27538 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27539 RADIO_2056_RX0), (best_rccal[0] | 0x80)); 27540 27541 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27542 rxlpf_rccal_hpc = 27543 (((int)best_rccal[rx_core] - 12) >> 1) + 10; 27544 txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; 27545 27546 if (PHY_IPA(pi)) { 27547 txlpf_rccal_lpc += 27548 (pi->bw == WL_CHANSPEC_BW_40) ? 24 : 12; 27549 txlpf_idac = (pi->bw == WL_CHANSPEC_BW_40) ? 27550 0x0e : 0x13; 27551 WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, 27552 TXLPF_IDAC_4, txlpf_idac); 27553 } 27554 27555 rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 27556 0); 27557 txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 27558 0); 27559 27560 write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27561 ((rx_core == 27562 PHY_CORE_0) ? RADIO_2056_RX0 : 27563 RADIO_2056_RX1)), 27564 (rxlpf_rccal_hpc | 0x80)); 27565 27566 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | 27567 ((rx_core == 27568 PHY_CORE_0) ? RADIO_2056_TX0 : 27569 RADIO_2056_TX1)), 27570 (txlpf_rccal_lpc | 0x80)); 27571 } 27572 } 27573 27574 write_phy_reg(pi, 0x01, orig_BBConfig); 27575 27576 wlc_phy_resetcca_nphy(pi); 27577 27578 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27579 wlc_phy_rfctrl_override_1tomany_nphy( 27580 pi, 27581 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27582 0, 0x3, 1); 27583 else 27584 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 27585 27586 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27587 27588 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27589 gain_save); 27590 27591 if (NREV_GE(pi->pubpi.phy_rev, 4)) 27592 pi->phyhang_avoid = phyhang_avoid_state; 27593 27594 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27595 27596 return 0; 27597 } 27598 27599 static int 27600 wlc_phy_cal_rxiq_nphy_rev2(struct brcms_phy *pi, 27601 struct nphy_txgains target_gain, bool debug) 27602 { 27603 struct phy_iq_est est[PHY_CORE_MAX]; 27604 u8 core_num, rx_core, tx_core; 27605 u16 lna_vals[] = { 0x3, 0x3, 0x1 }; 27606 u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; 27607 u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; 27608 s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; 27609 s16 desired_log2_pwr, actual_log2_pwr, hpf_change; 27610 u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; 27611 u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; 27612 u16 num_samps; 27613 u32 i_pwr, q_pwr, tot_pwr[3]; 27614 u8 gain_pass, use_hpf_num; 27615 u16 mask, val1, val2; 27616 u16 core_no; 27617 u16 gain_save[2]; 27618 u16 cal_gain[2]; 27619 struct nphy_iqcal_params cal_params[2]; 27620 u8 phy_bw; 27621 int bcmerror = 0; 27622 bool first_playtone = true; 27623 27624 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27625 27626 if (NREV_LT(pi->pubpi.phy_rev, 2)) 27627 wlc_phy_reapply_txcal_coeffs_nphy(pi); 27628 27629 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27630 27631 for (core_no = 0; core_no <= 1; core_no++) { 27632 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27633 &cal_params[core_no]); 27634 cal_gain[core_no] = cal_params[core_no].cal_gain; 27635 } 27636 27637 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27638 27639 num_samps = 1024; 27640 desired_log2_pwr = 13; 27641 27642 for (core_num = 0; core_num < 2; core_num++) { 27643 27644 rx_core = core_num; 27645 tx_core = 1 - core_num; 27646 27647 orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); 27648 orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27649 0xa6 : 0xa7); 27650 orig_AfectrlOverride = read_phy_reg(pi, 0xa5); 27651 orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27652 0x91 : 0x92); 27653 orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? 27654 0x91 : 0x92); 27655 27656 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 27657 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 27658 27659 or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 27660 ((0x1 << 1) | (0x1 << 2))); 27661 or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); 27662 27663 if (((pi->nphy_rxcalparams) & 0xff000000)) 27664 write_phy_reg(pi, 27665 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27666 (CHSPEC_IS5G(pi->radio_chanspec) ? 27667 0x140 : 0x110)); 27668 else 27669 write_phy_reg(pi, 27670 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27671 (CHSPEC_IS5G(pi->radio_chanspec) ? 27672 0x180 : 0x120)); 27673 27674 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, 27675 (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : 27676 0x114)); 27677 27678 mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; 27679 if (rx_core == PHY_CORE_0) { 27680 val1 = RADIO_2055_COUPLE_RX_MASK; 27681 val2 = RADIO_2055_COUPLE_TX_MASK; 27682 } else { 27683 val1 = RADIO_2055_COUPLE_TX_MASK; 27684 val2 = RADIO_2055_COUPLE_RX_MASK; 27685 } 27686 27687 if ((pi->nphy_rxcalparams & 0x10000)) { 27688 mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, 27689 val1); 27690 mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, 27691 val2); 27692 } 27693 27694 for (gain_pass = 0; gain_pass < 4; gain_pass++) { 27695 27696 if (debug) 27697 mdelay(WAIT_FOR_SCOPE); 27698 27699 if (gain_pass < 3) { 27700 curr_lna = lna_vals[gain_pass]; 27701 curr_hpf1 = hpf1_vals[gain_pass]; 27702 curr_hpf2 = hpf2_vals[gain_pass]; 27703 } else { 27704 27705 if (tot_pwr[1] > 10000) { 27706 curr_lna = lna_vals[2]; 27707 curr_hpf1 = hpf1_vals[2]; 27708 curr_hpf2 = hpf2_vals[2]; 27709 use_hpf_num = 1; 27710 curr_hpf = curr_hpf1; 27711 actual_log2_pwr = 27712 wlc_phy_nbits(tot_pwr[2]); 27713 } else { 27714 if (tot_pwr[0] > 10000) { 27715 curr_lna = lna_vals[1]; 27716 curr_hpf1 = hpf1_vals[1]; 27717 curr_hpf2 = hpf2_vals[1]; 27718 use_hpf_num = 1; 27719 curr_hpf = curr_hpf1; 27720 actual_log2_pwr = 27721 wlc_phy_nbits( 27722 tot_pwr[1]); 27723 } else { 27724 curr_lna = lna_vals[0]; 27725 curr_hpf1 = hpf1_vals[0]; 27726 curr_hpf2 = hpf2_vals[0]; 27727 use_hpf_num = 2; 27728 curr_hpf = curr_hpf2; 27729 actual_log2_pwr = 27730 wlc_phy_nbits( 27731 tot_pwr[0]); 27732 } 27733 } 27734 27735 hpf_change = desired_log2_pwr - actual_log2_pwr; 27736 curr_hpf += hpf_change; 27737 curr_hpf = max(min_t(u16, curr_hpf, 10), 0); 27738 if (use_hpf_num == 1) 27739 curr_hpf1 = curr_hpf; 27740 else 27741 curr_hpf2 = curr_hpf; 27742 } 27743 27744 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 27745 ((curr_hpf2 << 8) | 27746 (curr_hpf1 << 4) | 27747 (curr_lna << 2)), 0x3, 0); 27748 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27749 27750 wlc_phy_stopplayback_nphy(pi); 27751 27752 if (first_playtone) { 27753 bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, 27754 (u16) (pi->nphy_rxcalparams & 27755 0xffff), 0, 0, true); 27756 first_playtone = false; 27757 } else { 27758 phy_bw = (CHSPEC_IS40(pi->radio_chanspec)) ? 27759 40 : 20; 27760 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 27761 0, 0, 0, true); 27762 } 27763 27764 if (bcmerror == 0) { 27765 if (gain_pass < 3) { 27766 27767 wlc_phy_rx_iq_est_nphy(pi, est, 27768 num_samps, 32, 27769 0); 27770 i_pwr = (est[rx_core].i_pwr + 27771 num_samps / 2) / num_samps; 27772 q_pwr = (est[rx_core].q_pwr + 27773 num_samps / 2) / num_samps; 27774 tot_pwr[gain_pass] = i_pwr + q_pwr; 27775 } else { 27776 27777 wlc_phy_calc_rx_iq_comp_nphy(pi, 27778 (1 << 27779 rx_core)); 27780 } 27781 27782 wlc_phy_stopplayback_nphy(pi); 27783 } 27784 27785 if (bcmerror != 0) 27786 break; 27787 } 27788 27789 and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); 27790 and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); 27791 27792 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 27793 0x92, orig_RfctrlIntcTx); 27794 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : 27795 0x92, orig_RfctrlIntcRx); 27796 write_phy_reg(pi, 0xa5, orig_AfectrlOverride); 27797 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 27798 0xa7, orig_AfectrlCore); 27799 write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); 27800 27801 if (bcmerror != 0) 27802 break; 27803 } 27804 27805 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); 27806 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27807 27808 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27809 gain_save); 27810 27811 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27812 27813 return bcmerror; 27814 } 27815 27816 int 27817 wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 27818 u8 cal_type, bool debug) 27819 { 27820 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27821 cal_type = 0; 27822 27823 if (NREV_GE(pi->pubpi.phy_rev, 3)) 27824 return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, 27825 debug); 27826 else 27827 return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); 27828 } 27829 27830 void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi) 27831 { 27832 uint core; 27833 u32 txgain; 27834 u16 rad_gain, dac_gain, bbmult, m1m2; 27835 u8 txpi[2], chan_freq_range; 27836 s32 rfpwr_offset; 27837 27838 if (pi->phyhang_avoid) 27839 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27840 27841 if (pi->sh->sromrev < 4) { 27842 txpi[0] = txpi[1] = 72; 27843 } else { 27844 27845 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 27846 switch (chan_freq_range) { 27847 case WL_CHAN_FREQ_RANGE_2G: 27848 case WL_CHAN_FREQ_RANGE_5GL: 27849 case WL_CHAN_FREQ_RANGE_5GM: 27850 case WL_CHAN_FREQ_RANGE_5GH: 27851 txpi[0] = 0; 27852 txpi[1] = 0; 27853 break; 27854 default: 27855 txpi[0] = txpi[1] = 91; 27856 break; 27857 } 27858 } 27859 27860 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27861 txpi[0] = txpi[1] = 30; 27862 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 27863 txpi[0] = txpi[1] = 40; 27864 27865 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 27866 27867 if ((txpi[0] < 40) || (txpi[0] > 100) || 27868 (txpi[1] < 40) || (txpi[1] > 100)) 27869 txpi[0] = txpi[1] = 91; 27870 } 27871 27872 pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; 27873 pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; 27874 pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; 27875 pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; 27876 27877 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 27878 uint phyrev = pi->pubpi.phy_rev; 27879 27880 if (NREV_GE(phyrev, 3)) { 27881 if (PHY_IPA(pi)) { 27882 u32 *tx_gaintbl = 27883 wlc_phy_get_ipa_gaintbl_nphy(pi); 27884 txgain = tx_gaintbl[txpi[core]]; 27885 } else { 27886 if (CHSPEC_IS5G(pi->radio_chanspec)) { 27887 if (NREV_IS(phyrev, 3)) { 27888 txgain = 27889 nphy_tpc_5GHz_txgain_rev3 27890 [txpi[core]]; 27891 } else if (NREV_IS(phyrev, 4)) { 27892 txgain = ( 27893 pi->srom_fem5g.extpagain == 27894 3) ? 27895 nphy_tpc_5GHz_txgain_HiPwrEPA 27896 [txpi[core]] : 27897 nphy_tpc_5GHz_txgain_rev4 27898 [txpi[core]]; 27899 } else { 27900 txgain = 27901 nphy_tpc_5GHz_txgain_rev5 27902 [txpi[core]]; 27903 } 27904 } else { 27905 if (NREV_GE(phyrev, 5) && 27906 (pi->srom_fem2g.extpagain == 3)) { 27907 txgain = 27908 nphy_tpc_txgain_HiPwrEPA 27909 [txpi[core]]; 27910 } else { 27911 txgain = nphy_tpc_txgain_rev3 27912 [txpi[core]]; 27913 } 27914 } 27915 } 27916 } else { 27917 txgain = nphy_tpc_txgain[txpi[core]]; 27918 } 27919 27920 if (NREV_GE(phyrev, 3)) 27921 rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); 27922 else 27923 rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); 27924 27925 if (NREV_GE(phyrev, 7)) 27926 dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); 27927 else 27928 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 27929 27930 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 27931 27932 if (NREV_GE(phyrev, 3)) 27933 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 27934 0xa5), (0x1 << 8), (0x1 << 8)); 27935 else 27936 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 27937 27938 write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); 27939 27940 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 27941 &rad_gain); 27942 27943 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 27944 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 27945 m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); 27946 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 27947 27948 if (PHY_IPA(pi)) { 27949 wlc_phy_table_read_nphy(pi, 27950 (core == 27951 PHY_CORE_0 ? 27952 NPHY_TBL_ID_CORE1TXPWRCTL : 27953 NPHY_TBL_ID_CORE2TXPWRCTL), 1, 27954 576 + txpi[core], 32, 27955 &rfpwr_offset); 27956 27957 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27958 0x29b, (0x1ff << 4), 27959 ((s16) rfpwr_offset) << 4); 27960 27961 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27962 0x29b, (0x1 << 2), (1) << 2); 27963 27964 } 27965 } 27966 27967 and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); 27968 27969 if (pi->phyhang_avoid) 27970 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27971 } 27972 27973 static void 27974 wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, 27975 u8 tmp_max_pwr, u8 rate_start, 27976 u8 rate_end) 27977 { 27978 u8 rate; 27979 u8 word_num, nibble_num; 27980 u8 tmp_nibble; 27981 27982 for (rate = rate_start; rate <= rate_end; rate++) { 27983 word_num = (rate - rate_start) >> 2; 27984 nibble_num = (rate - rate_start) & 0x3; 27985 tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; 27986 27987 srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; 27988 } 27989 } 27990 27991 static void 27992 wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, 27993 u8 rate_start, u8 rate_end) 27994 { 27995 u8 rate; 27996 27997 for (rate = rate_start; rate <= rate_end; rate++) 27998 srom_max[rate] -= 2 * pwr_offset; 27999 } 28000 28001 void 28002 wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, 28003 u8 rate_mcs_end, u8 rate_ofdm_start) 28004 { 28005 u8 rate1, rate2; 28006 28007 rate2 = rate_ofdm_start; 28008 for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { 28009 power[rate1] = power[rate2]; 28010 rate2 += (rate1 == rate_mcs_start) ? 2 : 1; 28011 } 28012 power[rate_mcs_end] = power[rate_mcs_end - 1]; 28013 } 28014 28015 void 28016 wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, 28017 u8 rate_ofdm_end, u8 rate_mcs_start) 28018 { 28019 u8 rate1, rate2; 28020 28021 for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; 28022 rate1 <= rate_ofdm_end; rate1++, rate2++) { 28023 power[rate1] = power[rate2]; 28024 if (rate1 == rate_ofdm_start) 28025 power[++rate1] = power[rate2]; 28026 } 28027 } 28028 28029 void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi) 28030 { 28031 uint rate1, rate2, band_num; 28032 u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; 28033 u8 tmp_max_pwr = 0; 28034 u16 pwr_offsets1[2], *pwr_offsets2 = NULL; 28035 u8 *tx_srom_max_rate = NULL; 28036 28037 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 28038 band_num++) { 28039 switch (band_num) { 28040 case 0: 28041 28042 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, 28043 pi->nphy_pwrctrl_info[1].max_pwr_2g); 28044 28045 pwr_offsets1[0] = pi->cck2gpo; 28046 wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, 28047 pwr_offsets1, 28048 tmp_max_pwr, 28049 TXP_FIRST_CCK, 28050 TXP_LAST_CCK); 28051 28052 pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); 28053 pwr_offsets1[1] = 28054 (u16) (pi->ofdm2gpo >> 16) & 0xffff; 28055 28056 pwr_offsets2 = pi->mcs2gpo; 28057 28058 tmp_cddpo = pi->cdd2gpo; 28059 tmp_stbcpo = pi->stbc2gpo; 28060 tmp_bw40po = pi->bw402gpo; 28061 28062 tx_srom_max_rate = pi->tx_srom_max_rate_2g; 28063 break; 28064 case 1: 28065 28066 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, 28067 pi->nphy_pwrctrl_info[1].max_pwr_5gm); 28068 28069 pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); 28070 pwr_offsets1[1] = 28071 (u16) (pi->ofdm5gpo >> 16) & 0xffff; 28072 28073 pwr_offsets2 = pi->mcs5gpo; 28074 28075 tmp_cddpo = pi->cdd5gpo; 28076 tmp_stbcpo = pi->stbc5gpo; 28077 tmp_bw40po = pi->bw405gpo; 28078 28079 tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; 28080 break; 28081 case 2: 28082 28083 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, 28084 pi->nphy_pwrctrl_info[1].max_pwr_5gl); 28085 28086 pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); 28087 pwr_offsets1[1] = 28088 (u16) (pi->ofdm5glpo >> 16) & 0xffff; 28089 28090 pwr_offsets2 = pi->mcs5glpo; 28091 28092 tmp_cddpo = pi->cdd5glpo; 28093 tmp_stbcpo = pi->stbc5glpo; 28094 tmp_bw40po = pi->bw405glpo; 28095 28096 tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; 28097 break; 28098 case 3: 28099 28100 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, 28101 pi->nphy_pwrctrl_info[1].max_pwr_5gh); 28102 28103 pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); 28104 pwr_offsets1[1] = 28105 (u16) (pi->ofdm5ghpo >> 16) & 0xffff; 28106 28107 pwr_offsets2 = pi->mcs5ghpo; 28108 28109 tmp_cddpo = pi->cdd5ghpo; 28110 tmp_stbcpo = pi->stbc5ghpo; 28111 tmp_bw40po = pi->bw405ghpo; 28112 28113 tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; 28114 break; 28115 } 28116 28117 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, 28118 tmp_max_pwr, TXP_FIRST_OFDM, 28119 TXP_LAST_OFDM); 28120 28121 wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, 28122 TXP_FIRST_MCS_20_SISO, 28123 TXP_LAST_MCS_20_SISO, 28124 TXP_FIRST_OFDM); 28125 28126 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28127 tmp_max_pwr, 28128 TXP_FIRST_MCS_20_CDD, 28129 TXP_LAST_MCS_20_CDD); 28130 28131 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28132 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28133 TXP_FIRST_MCS_20_CDD, 28134 TXP_LAST_MCS_20_CDD); 28135 28136 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28137 TXP_FIRST_OFDM_20_CDD, 28138 TXP_LAST_OFDM_20_CDD, 28139 TXP_FIRST_MCS_20_CDD); 28140 28141 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28142 tmp_max_pwr, 28143 TXP_FIRST_MCS_20_STBC, 28144 TXP_LAST_MCS_20_STBC); 28145 28146 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28147 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28148 tmp_stbcpo, 28149 TXP_FIRST_MCS_20_STBC, 28150 TXP_LAST_MCS_20_STBC); 28151 28152 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28153 &pwr_offsets2[2], tmp_max_pwr, 28154 TXP_FIRST_MCS_20_SDM, 28155 TXP_LAST_MCS_20_SDM); 28156 28157 if (NPHY_IS_SROM_REINTERPRET) { 28158 28159 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28160 &pwr_offsets2[4], 28161 tmp_max_pwr, 28162 TXP_FIRST_MCS_40_SISO, 28163 TXP_LAST_MCS_40_SISO); 28164 28165 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28166 TXP_FIRST_OFDM_40_SISO, 28167 TXP_LAST_OFDM_40_SISO, 28168 TXP_FIRST_MCS_40_SISO); 28169 28170 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28171 &pwr_offsets2[4], 28172 tmp_max_pwr, 28173 TXP_FIRST_MCS_40_CDD, 28174 TXP_LAST_MCS_40_CDD); 28175 28176 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28177 TXP_FIRST_MCS_40_CDD, 28178 TXP_LAST_MCS_40_CDD); 28179 28180 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28181 TXP_FIRST_OFDM_40_CDD, 28182 TXP_LAST_OFDM_40_CDD, 28183 TXP_FIRST_MCS_40_CDD); 28184 28185 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28186 &pwr_offsets2[4], 28187 tmp_max_pwr, 28188 TXP_FIRST_MCS_40_STBC, 28189 TXP_LAST_MCS_40_STBC); 28190 28191 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28192 tmp_stbcpo, 28193 TXP_FIRST_MCS_40_STBC, 28194 TXP_LAST_MCS_40_STBC); 28195 28196 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28197 &pwr_offsets2[6], 28198 tmp_max_pwr, 28199 TXP_FIRST_MCS_40_SDM, 28200 TXP_LAST_MCS_40_SDM); 28201 } else { 28202 28203 for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = 28204 TXP_FIRST_OFDM; 28205 rate1 <= TXP_LAST_MCS_40_SDM; 28206 rate1++, rate2++) 28207 tx_srom_max_rate[rate1] = 28208 tx_srom_max_rate[rate2]; 28209 } 28210 28211 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28212 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28213 tmp_bw40po, 28214 TXP_FIRST_OFDM_40_SISO, 28215 TXP_LAST_MCS_40_SDM); 28216 28217 tx_srom_max_rate[TXP_MCS_32] = 28218 tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; 28219 } 28220 28221 return; 28222 } 28223 28224 void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi) 28225 { 28226 u8 tx_pwr_ctrl_state; 28227 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 28228 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 28229 28230 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28231 28232 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 28233 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 28234 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 28235 udelay(1); 28236 } 28237 28238 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28239 28240 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 28241 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 28242 } 28243 28244 static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi) 28245 { 28246 return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | 28247 (0x1 << 14) | (0x1 << 13)); 28248 } 28249 28250 u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi) 28251 { 28252 u16 tmp; 28253 u16 pwr_idx[2]; 28254 28255 if (wlc_phy_txpwr_ison_nphy(pi)) { 28256 pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); 28257 pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); 28258 28259 tmp = (pwr_idx[0] << 8) | pwr_idx[1]; 28260 } else { 28261 tmp = ((pi->nphy_txpwrindex[PHY_CORE_0].index_internal & 0xff) 28262 << 8) | 28263 (pi->nphy_txpwrindex[PHY_CORE_1].index_internal & 0xff); 28264 } 28265 28266 return tmp; 28267 } 28268 28269 void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi) 28270 { 28271 if (PHY_IPA(pi) 28272 && (pi->nphy_force_papd_cal 28273 || (wlc_phy_txpwr_ison_nphy(pi) 28274 && 28275 (((u32) 28276 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - 28277 pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) 28278 || ((u32) 28279 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - 28280 pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) 28281 wlc_phy_a4(pi, true); 28282 } 28283 28284 void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type) 28285 { 28286 u16 mask = 0, val = 0, ishw = 0; 28287 u8 ctr; 28288 uint core; 28289 u32 tbl_offset; 28290 u32 tbl_len; 28291 u16 regval[84]; 28292 28293 if (pi->phyhang_avoid) 28294 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28295 28296 switch (ctrl_type) { 28297 case PHY_TPC_HW_OFF: 28298 case PHY_TPC_HW_ON: 28299 pi->nphy_txpwrctrl = ctrl_type; 28300 break; 28301 default: 28302 break; 28303 } 28304 28305 if (ctrl_type == PHY_TPC_HW_OFF) { 28306 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28307 28308 if (wlc_phy_txpwr_ison_nphy(pi)) { 28309 for (core = 0; core < pi->pubpi.phy_corenum; 28310 core++) 28311 pi->nphy_txpwr_idx[core] = 28312 wlc_phy_txpwr_idx_cur_get_nphy( 28313 pi, 28314 (u8) core); 28315 } 28316 28317 } 28318 28319 tbl_len = 84; 28320 tbl_offset = 64; 28321 for (ctr = 0; ctr < tbl_len; ctr++) 28322 regval[ctr] = 0; 28323 wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, 28324 regval); 28325 wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, 28326 regval); 28327 28328 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28329 and_phy_reg(pi, 0x1e7, 28330 (u16) (~((0x1 << 15) | 28331 (0x1 << 14) | (0x1 << 13)))); 28332 else 28333 and_phy_reg(pi, 0x1e7, 28334 (u16) (~((0x1 << 14) | (0x1 << 13)))); 28335 28336 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28337 or_phy_reg(pi, 0x8f, (0x1 << 8)); 28338 or_phy_reg(pi, 0xa5, (0x1 << 8)); 28339 } else { 28340 or_phy_reg(pi, 0xa5, (0x1 << 14)); 28341 } 28342 28343 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28344 mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); 28345 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28346 mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); 28347 28348 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28349 pi->bw == WL_CHANSPEC_BW_40) 28350 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28351 MHF1_IQSWAP_WAR, BRCM_BAND_ALL); 28352 28353 } else { 28354 28355 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 28356 8, pi->adj_pwr_tbl_nphy); 28357 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 28358 8, pi->adj_pwr_tbl_nphy); 28359 28360 ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; 28361 mask = (0x1 << 14) | (0x1 << 13); 28362 val = (ishw << 14) | (ishw << 13); 28363 28364 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28365 mask |= (0x1 << 15); 28366 val |= (ishw << 15); 28367 } 28368 28369 mod_phy_reg(pi, 0x1e7, mask, val); 28370 28371 if (CHSPEC_IS5G(pi->radio_chanspec)) { 28372 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 28373 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); 28374 mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); 28375 } else { 28376 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); 28377 if (NREV_GT(pi->pubpi.phy_rev, 1)) 28378 mod_phy_reg(pi, 0x222, 28379 (0xff << 0), 0x64); 28380 } 28381 } 28382 28383 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28384 if ((pi->nphy_txpwr_idx[0] != 128) 28385 && (pi->nphy_txpwr_idx[1] != 128)) 28386 wlc_phy_txpwr_idx_cur_set_nphy(pi, 28387 pi-> 28388 nphy_txpwr_idx 28389 [0], 28390 pi-> 28391 nphy_txpwr_idx 28392 [1]); 28393 } 28394 28395 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28396 and_phy_reg(pi, 0x8f, ~(0x1 << 8)); 28397 and_phy_reg(pi, 0xa5, ~(0x1 << 8)); 28398 } else { 28399 and_phy_reg(pi, 0xa5, ~(0x1 << 14)); 28400 } 28401 28402 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28403 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 28404 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28405 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 28406 28407 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28408 pi->bw == WL_CHANSPEC_BW_40) 28409 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28410 0x0, BRCM_BAND_ALL); 28411 28412 if (PHY_IPA(pi)) { 28413 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 28414 0x29b, (0x1 << 2), (0) << 2); 28415 28416 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 28417 0x29b, (0x1 << 2), (0) << 2); 28418 28419 } 28420 28421 } 28422 28423 if (pi->phyhang_avoid) 28424 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28425 } 28426 28427 void 28428 wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, 28429 bool restore_cals) 28430 { 28431 u8 core, txpwrctl_tbl; 28432 u16 tx_ind0, iq_ind0, lo_ind0; 28433 u16 m1m2; 28434 u32 txgain; 28435 u16 rad_gain, dac_gain; 28436 u8 bbmult; 28437 u32 iqcomp; 28438 u16 iqcomp_a, iqcomp_b; 28439 u32 locomp; 28440 u16 tmpval; 28441 u8 tx_pwr_ctrl_state; 28442 s32 rfpwr_offset; 28443 u16 regval[2]; 28444 28445 if (pi->phyhang_avoid) 28446 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28447 28448 tx_ind0 = 192; 28449 iq_ind0 = 320; 28450 lo_ind0 = 448; 28451 28452 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 28453 28454 if ((core_mask & (1 << core)) == 0) 28455 continue; 28456 28457 txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; 28458 28459 if (txpwrindex < 0) { 28460 if (pi->nphy_txpwrindex[core].index < 0) 28461 continue; 28462 28463 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28464 mod_phy_reg(pi, 0x8f, 28465 (0x1 << 8), 28466 pi->nphy_txpwrindex[core]. 28467 AfectrlOverride); 28468 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28469 pi->nphy_txpwrindex[core]. 28470 AfectrlOverride); 28471 } else { 28472 mod_phy_reg(pi, 0xa5, 28473 (0x1 << 14), 28474 pi->nphy_txpwrindex[core]. 28475 AfectrlOverride); 28476 } 28477 28478 write_phy_reg(pi, (core == PHY_CORE_0) ? 28479 0xaa : 0xab, 28480 pi->nphy_txpwrindex[core].AfeCtrlDacGain); 28481 28482 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28483 &pi->nphy_txpwrindex[core]. 28484 rad_gain); 28485 28486 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28487 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28488 m1m2 |= ((core == PHY_CORE_0) ? 28489 (pi->nphy_txpwrindex[core].bbmult << 8) : 28490 (pi->nphy_txpwrindex[core].bbmult << 0)); 28491 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28492 28493 if (restore_cals) { 28494 wlc_phy_table_write_nphy( 28495 pi, 15, 2, (80 + 2 * core), 16, 28496 &pi->nphy_txpwrindex[core].iqcomp_a); 28497 wlc_phy_table_write_nphy( 28498 pi, 15, 1, (85 + core), 16, 28499 &pi->nphy_txpwrindex[core].locomp); 28500 wlc_phy_table_write_nphy( 28501 pi, 15, 1, (93 + core), 16, 28502 &pi->nphy_txpwrindex[core].locomp); 28503 } 28504 28505 wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); 28506 28507 pi->nphy_txpwrindex[core].index_internal = 28508 pi->nphy_txpwrindex[core].index_internal_save; 28509 } else { 28510 28511 if (pi->nphy_txpwrindex[core].index < 0) { 28512 28513 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28514 mod_phy_reg(pi, 0x8f, 28515 (0x1 << 8), 28516 pi->nphy_txpwrindex[core]. 28517 AfectrlOverride); 28518 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28519 pi->nphy_txpwrindex[core]. 28520 AfectrlOverride); 28521 } else { 28522 pi->nphy_txpwrindex[core]. 28523 AfectrlOverride = 28524 read_phy_reg(pi, 0xa5); 28525 } 28526 28527 pi->nphy_txpwrindex[core].AfeCtrlDacGain = 28528 read_phy_reg(pi, (core == PHY_CORE_0) ? 28529 0xaa : 0xab); 28530 28531 wlc_phy_table_read_nphy(pi, 7, 1, 28532 (0x110 + core), 16, 28533 &pi-> 28534 nphy_txpwrindex[core]. 28535 rad_gain); 28536 28537 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 28538 &tmpval); 28539 tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); 28540 tmpval &= 0xff; 28541 pi->nphy_txpwrindex[core].bbmult = (u8) tmpval; 28542 28543 wlc_phy_table_read_nphy(pi, 15, 2, 28544 (80 + 2 * core), 16, 28545 &pi-> 28546 nphy_txpwrindex[core]. 28547 iqcomp_a); 28548 28549 wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), 28550 16, 28551 &pi-> 28552 nphy_txpwrindex[core]. 28553 locomp); 28554 28555 pi->nphy_txpwrindex[core].index_internal_save = 28556 pi->nphy_txpwrindex[core]. 28557 index_internal; 28558 } 28559 28560 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28561 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 28562 28563 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28564 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 28565 28566 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28567 (tx_ind0 + txpwrindex), 32, 28568 &txgain); 28569 28570 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28571 rad_gain = (txgain >> 16) & 28572 ((1 << (32 - 16 + 1)) - 1); 28573 else 28574 rad_gain = (txgain >> 16) & 28575 ((1 << (28 - 16 + 1)) - 1); 28576 28577 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 28578 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 28579 28580 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28581 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 28582 0xa5), (0x1 << 8), (0x1 << 8)); 28583 else 28584 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 28585 28586 write_phy_reg(pi, (core == PHY_CORE_0) ? 28587 0xaa : 0xab, dac_gain); 28588 28589 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28590 &rad_gain); 28591 28592 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28593 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28594 m1m2 |= ((core == PHY_CORE_0) ? 28595 (bbmult << 8) : (bbmult << 0)); 28596 28597 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28598 28599 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28600 (iq_ind0 + txpwrindex), 32, 28601 &iqcomp); 28602 iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); 28603 iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); 28604 28605 if (restore_cals) { 28606 regval[0] = (u16) iqcomp_a; 28607 regval[1] = (u16) iqcomp_b; 28608 wlc_phy_table_write_nphy(pi, 15, 2, 28609 (80 + 2 * core), 16, 28610 regval); 28611 } 28612 28613 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28614 (lo_ind0 + txpwrindex), 32, 28615 &locomp); 28616 if (restore_cals) 28617 wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), 28618 16, &locomp); 28619 28620 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28621 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 28622 28623 if (PHY_IPA(pi)) { 28624 wlc_phy_table_read_nphy(pi, 28625 (core == PHY_CORE_0 ? 28626 NPHY_TBL_ID_CORE1TXPWRCTL : 28627 NPHY_TBL_ID_CORE2TXPWRCTL), 28628 1, 576 + txpwrindex, 32, 28629 &rfpwr_offset); 28630 28631 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28632 0x29b, (0x1ff << 4), 28633 ((s16) rfpwr_offset) << 4); 28634 28635 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28636 0x29b, (0x1 << 2), (1) << 2); 28637 28638 } 28639 28640 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28641 } 28642 28643 pi->nphy_txpwrindex[core].index = txpwrindex; 28644 } 28645 28646 if (pi->phyhang_avoid) 28647 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28648 } 28649 28650 void 28651 wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, 28652 u8 txp_rate_idx) 28653 { 28654 u8 chan_freq_range; 28655 28656 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); 28657 switch (chan_freq_range) { 28658 case WL_CHAN_FREQ_RANGE_2G: 28659 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28660 break; 28661 case WL_CHAN_FREQ_RANGE_5GM: 28662 *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; 28663 break; 28664 case WL_CHAN_FREQ_RANGE_5GL: 28665 *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; 28666 break; 28667 case WL_CHAN_FREQ_RANGE_5GH: 28668 *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; 28669 break; 28670 default: 28671 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28672 break; 28673 } 28674 28675 return; 28676 } 28677 28678 void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, bool enable) 28679 { 28680 u16 clip_off[] = { 0xffff, 0xffff }; 28681 28682 if (enable) { 28683 if (pi->nphy_deaf_count == 0) { 28684 pi->classifier_state = 28685 wlc_phy_classifier_nphy(pi, 0, 0); 28686 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 28687 wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); 28688 wlc_phy_clip_det_nphy(pi, 1, clip_off); 28689 } 28690 28691 pi->nphy_deaf_count++; 28692 28693 wlc_phy_resetcca_nphy(pi); 28694 28695 } else { 28696 pi->nphy_deaf_count--; 28697 28698 if (pi->nphy_deaf_count == 0) { 28699 wlc_phy_classifier_nphy(pi, (0x7 << 0), 28700 pi->classifier_state); 28701 wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); 28702 } 28703 } 28704 } 28705 28706 void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode) 28707 { 28708 wlapi_suspend_mac_and_wait(pi->sh->physhim); 28709 28710 if (mode) { 28711 if (pi->nphy_deaf_count == 0) 28712 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28713 } else if (pi->nphy_deaf_count > 0) { 28714 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28715 } 28716 28717 wlapi_enable_mac(pi->sh->physhim); 28718 } 28719