1 /* 2 * Copyright (c) 2010 Broadcom Corporation 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include <linux/kernel.h> 20 #include <linux/delay.h> 21 #include <linux/cordic.h> 22 23 #include <brcm_hw_ids.h> 24 #include <aiutils.h> 25 #include <chipcommon.h> 26 #include <pmu.h> 27 #include <d11.h> 28 #include <phy_shim.h> 29 #include "phy_int.h" 30 #include "phy_hal.h" 31 #include "phy_radio.h" 32 #include "phyreg_n.h" 33 #include "phytbl_n.h" 34 #include "soc.h" 35 36 #define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ 37 read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 38 ((core == PHY_CORE_0) ? \ 39 radio_type##_##jspace##0 : \ 40 radio_type##_##jspace##1)) 41 42 #define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ 43 write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 44 ((core == PHY_CORE_0) ? \ 45 radio_type##_##jspace##0 : \ 46 radio_type##_##jspace##1), value) 47 48 #define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ 49 write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value) 50 51 #define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ 52 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 53 radio_type##_##jspace##0##_##reg_name : \ 54 radio_type##_##jspace##1##_##reg_name)) 55 56 #define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ 57 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 58 radio_type##_##jspace##0##_##reg_name : \ 59 radio_type##_##jspace##1##_##reg_name), \ 60 value) 61 62 #define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ 63 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 64 radio_type##_##reg_name##_##jspace##0 : \ 65 radio_type##_##reg_name##_##jspace##1)) 66 67 #define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ 68 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 69 radio_type##_##reg_name##_##jspace##0 : \ 70 radio_type##_##reg_name##_##jspace##1), \ 71 value) 72 73 #define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 74 #define NPHY_ACI_CHANNEL_DELTA 5 75 #define NPHY_ACI_CHANNEL_SKIP 4 76 #define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 77 #define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 78 #define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 79 #define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 80 #define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 81 #define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 82 83 #define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 84 85 #define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 86 87 #define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 88 89 #define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 90 91 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 92 93 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 94 95 #define NPHY_NOISE_NOASSOC_ENTER_TH 400 96 97 #define NPHY_NOISE_ASSOC_ENTER_TH 400 98 99 #define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 100 101 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 102 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 103 104 #define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 105 106 #define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 107 108 #define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) 109 110 #define NPHY_RSSICAL_MAXREAD 31 111 112 #define NPHY_RSSICAL_NPOLL 8 113 #define NPHY_RSSICAL_MAXD (1<<20) 114 #define NPHY_MIN_RXIQ_PWR 2 115 116 #define NPHY_RSSICAL_W1_TARGET 25 117 #define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET 118 #define NPHY_RSSICAL_NB_TARGET 0 119 120 #define NPHY_RSSICAL_W1_TARGET_REV3 29 121 #define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 122 123 #define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 124 #define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 125 #define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 126 #define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \ 127 NPHY_RSSICAL_MAXREAD) 128 #define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS 129 #define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \ 130 NPHY_RSSICAL_MAXREAD) 131 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) 132 #define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ 133 ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) 134 #define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ 135 ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) 136 #define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ 137 ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) 138 139 #define NPHY_IQCAL_NUMGAINS 9 140 #define NPHY_N_GCTL 0x66 141 142 #define NPHY_PAPD_EPS_TBL_SIZE 64 143 #define NPHY_PAPD_SCL_TBL_SIZE 64 144 #define NPHY_NUM_DIG_FILT_COEFFS 15 145 146 #define NPHY_PAPD_COMP_OFF 0 147 #define NPHY_PAPD_COMP_ON 1 148 149 #define NPHY_SROM_TEMPSHIFT 32 150 #define NPHY_SROM_MAXTEMPOFFSET 16 151 #define NPHY_SROM_MINTEMPOFFSET -16 152 153 #define NPHY_CAL_MAXTEMPDELTA 64 154 155 #define NPHY_NOISEVAR_TBLLEN40 256 156 #define NPHY_NOISEVAR_TBLLEN20 128 157 158 #define NPHY_ANARXLPFBW_REDUCTIONFACT 7 159 160 #define NPHY_ADJUSTED_MINCRSPOWER 0x1e 161 162 /* 5357 Chip specific ChipControl register bits */ 163 #define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ 164 #define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ 165 166 #define NPHY_CAL_TSSISAMPS 64 167 #define NPHY_TEST_TONE_FREQ_40MHz 4000 168 #define NPHY_TEST_TONE_FREQ_20MHz 2500 169 170 #define MAX_205x_RCAL_WAITLOOPS 10000 171 172 #define NPHY_RXCAL_TONEAMP 181 173 #define NPHY_RXCAL_TONEFREQ_40MHz 4000 174 #define NPHY_RXCAL_TONEFREQ_20MHz 2000 175 176 #define TXFILT_SHAPING_OFDM20 0 177 #define TXFILT_SHAPING_OFDM40 1 178 #define TXFILT_SHAPING_CCK 2 179 #define TXFILT_DEFAULT_OFDM20 3 180 #define TXFILT_DEFAULT_OFDM40 4 181 182 struct nphy_iqcal_params { 183 u16 txlpf; 184 u16 txgm; 185 u16 pga; 186 u16 pad; 187 u16 ipa; 188 u16 cal_gain; 189 u16 ncorr[5]; 190 }; 191 192 struct nphy_txiqcal_ladder { 193 u8 percent; 194 u8 g_env; 195 }; 196 197 struct nphy_ipa_txcalgains { 198 struct nphy_txgains gains; 199 bool useindex; 200 u8 index; 201 }; 202 203 struct nphy_papd_restore_state { 204 u16 fbmix[2]; 205 u16 vga_master[2]; 206 u16 intpa_master[2]; 207 u16 afectrl[2]; 208 u16 afeoverride[2]; 209 u16 pwrup[2]; 210 u16 atten[2]; 211 u16 mm; 212 }; 213 214 struct nphy_ipa_txrxgain { 215 u16 hpvga; 216 u16 lpf_biq1; 217 u16 lpf_biq0; 218 u16 lna2; 219 u16 lna1; 220 s8 txpwrindex; 221 }; 222 223 #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) 224 225 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz[] = { 226 {0, 0, 0, 0, 0, 100}, 227 {0, 0, 0, 0, 0, 50}, 228 {0, 0, 0, 0, 0, -1}, 229 {0, 0, 0, 3, 0, -1}, 230 {0, 0, 3, 3, 0, -1}, 231 {0, 2, 3, 3, 0, -1} 232 }; 233 234 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz[] = { 235 {0, 0, 0, 0, 0, 128}, 236 {0, 0, 0, 0, 0, 70}, 237 {0, 0, 0, 0, 0, 20}, 238 {0, 0, 0, 3, 0, 20}, 239 {0, 0, 3, 3, 0, 20}, 240 {0, 2, 3, 3, 0, 20} 241 }; 242 243 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { 244 {0, 0, 0, 0, 0, 100}, 245 {0, 0, 0, 0, 0, 50}, 246 {0, 0, 0, 0, 0, -1}, 247 {0, 0, 0, 3, 0, -1}, 248 {0, 0, 3, 3, 0, -1}, 249 {0, 0, 5, 3, 0, -1} 250 }; 251 252 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { 253 {0, 0, 0, 0, 0, 10}, 254 {0, 0, 0, 1, 0, 10}, 255 {0, 0, 1, 2, 0, 10}, 256 {0, 0, 1, 3, 0, 10}, 257 {0, 0, 4, 3, 0, 10}, 258 {0, 0, 6, 3, 0, 10} 259 }; 260 261 enum { 262 NPHY_RXCAL_GAIN_INIT = 0, 263 NPHY_RXCAL_GAIN_UP, 264 NPHY_RXCAL_GAIN_DOWN 265 }; 266 267 #define wlc_phy_get_papd_nphy(pi) \ 268 (read_phy_reg((pi), 0x1e7) & \ 269 ((0x1 << 15) | \ 270 (0x1 << 14) | \ 271 (0x1 << 13))) 272 273 static const u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { 274 {-377, 137, -407, 208, -1527, 956, 93, 186, 93, 275 230, -44, 230, 201, -191, 201}, 276 {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, 277 26, 34, -32, 34}, 278 {-360, 164, -376, 164, -1533, 576, 308, -314, 308, 279 121, -73, 121, 91, 124, 91}, 280 {-295, 200, -363, 142, -1391, 826, 151, 301, 151, 281 151, 301, 151, 602, -752, 602}, 282 {-92, 58, -96, 49, -104, 44, 17, 35, 17, 283 12, 25, 12, 13, 27, 13}, 284 {-375, 136, -399, 209, -1479, 949, 130, 260, 130, 285 230, -44, 230, 201, -191, 201}, 286 {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, 287 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} 288 }; 289 290 struct chan_info_nphy_2055 { 291 u16 chan; 292 u16 freq; 293 uint unknown; 294 u8 RF_pll_ref; 295 u8 RF_rf_pll_mod1; 296 u8 RF_rf_pll_mod0; 297 u8 RF_vco_cap_tail; 298 u8 RF_vco_cal1; 299 u8 RF_vco_cal2; 300 u8 RF_pll_lf_c1; 301 u8 RF_pll_lf_r1; 302 u8 RF_pll_lf_c2; 303 u8 RF_lgbuf_cen_buf; 304 u8 RF_lgen_tune1; 305 u8 RF_lgen_tune2; 306 u8 RF_core1_lgbuf_a_tune; 307 u8 RF_core1_lgbuf_g_tune; 308 u8 RF_core1_rxrf_reg1; 309 u8 RF_core1_tx_pga_pad_tn; 310 u8 RF_core1_tx_mx_bgtrim; 311 u8 RF_core2_lgbuf_a_tune; 312 u8 RF_core2_lgbuf_g_tune; 313 u8 RF_core2_rxrf_reg1; 314 u8 RF_core2_tx_pga_pad_tn; 315 u8 RF_core2_tx_mx_bgtrim; 316 u16 PHY_BW1a; 317 u16 PHY_BW2; 318 u16 PHY_BW3; 319 u16 PHY_BW4; 320 u16 PHY_BW5; 321 u16 PHY_BW6; 322 }; 323 324 struct chan_info_nphy_radio205x { 325 u16 chan; 326 u16 freq; 327 u8 RF_SYN_pll_vcocal1; 328 u8 RF_SYN_pll_vcocal2; 329 u8 RF_SYN_pll_refdiv; 330 u8 RF_SYN_pll_mmd2; 331 u8 RF_SYN_pll_mmd1; 332 u8 RF_SYN_pll_loopfilter1; 333 u8 RF_SYN_pll_loopfilter2; 334 u8 RF_SYN_pll_loopfilter3; 335 u8 RF_SYN_pll_loopfilter4; 336 u8 RF_SYN_pll_loopfilter5; 337 u8 RF_SYN_reserved_addr27; 338 u8 RF_SYN_reserved_addr28; 339 u8 RF_SYN_reserved_addr29; 340 u8 RF_SYN_logen_VCOBUF1; 341 u8 RF_SYN_logen_MIXER2; 342 u8 RF_SYN_logen_BUF3; 343 u8 RF_SYN_logen_BUF4; 344 u8 RF_RX0_lnaa_tune; 345 u8 RF_RX0_lnag_tune; 346 u8 RF_TX0_intpaa_boost_tune; 347 u8 RF_TX0_intpag_boost_tune; 348 u8 RF_TX0_pada_boost_tune; 349 u8 RF_TX0_padg_boost_tune; 350 u8 RF_TX0_pgaa_boost_tune; 351 u8 RF_TX0_pgag_boost_tune; 352 u8 RF_TX0_mixa_boost_tune; 353 u8 RF_TX0_mixg_boost_tune; 354 u8 RF_RX1_lnaa_tune; 355 u8 RF_RX1_lnag_tune; 356 u8 RF_TX1_intpaa_boost_tune; 357 u8 RF_TX1_intpag_boost_tune; 358 u8 RF_TX1_pada_boost_tune; 359 u8 RF_TX1_padg_boost_tune; 360 u8 RF_TX1_pgaa_boost_tune; 361 u8 RF_TX1_pgag_boost_tune; 362 u8 RF_TX1_mixa_boost_tune; 363 u8 RF_TX1_mixg_boost_tune; 364 u16 PHY_BW1a; 365 u16 PHY_BW2; 366 u16 PHY_BW3; 367 u16 PHY_BW4; 368 u16 PHY_BW5; 369 u16 PHY_BW6; 370 }; 371 372 struct chan_info_nphy_radio2057 { 373 u16 chan; 374 u16 freq; 375 u8 RF_vcocal_countval0; 376 u8 RF_vcocal_countval1; 377 u8 RF_rfpll_refmaster_sparextalsize; 378 u8 RF_rfpll_loopfilter_r1; 379 u8 RF_rfpll_loopfilter_c2; 380 u8 RF_rfpll_loopfilter_c1; 381 u8 RF_cp_kpd_idac; 382 u8 RF_rfpll_mmd0; 383 u8 RF_rfpll_mmd1; 384 u8 RF_vcobuf_tune; 385 u8 RF_logen_mx2g_tune; 386 u8 RF_logen_mx5g_tune; 387 u8 RF_logen_indbuf2g_tune; 388 u8 RF_logen_indbuf5g_tune; 389 u8 RF_txmix2g_tune_boost_pu_core0; 390 u8 RF_pad2g_tune_pus_core0; 391 u8 RF_pga_boost_tune_core0; 392 u8 RF_txmix5g_boost_tune_core0; 393 u8 RF_pad5g_tune_misc_pus_core0; 394 u8 RF_lna2g_tune_core0; 395 u8 RF_lna5g_tune_core0; 396 u8 RF_txmix2g_tune_boost_pu_core1; 397 u8 RF_pad2g_tune_pus_core1; 398 u8 RF_pga_boost_tune_core1; 399 u8 RF_txmix5g_boost_tune_core1; 400 u8 RF_pad5g_tune_misc_pus_core1; 401 u8 RF_lna2g_tune_core1; 402 u8 RF_lna5g_tune_core1; 403 u16 PHY_BW1a; 404 u16 PHY_BW2; 405 u16 PHY_BW3; 406 u16 PHY_BW4; 407 u16 PHY_BW5; 408 u16 PHY_BW6; 409 }; 410 411 struct chan_info_nphy_radio2057_rev5 { 412 u16 chan; 413 u16 freq; 414 u8 RF_vcocal_countval0; 415 u8 RF_vcocal_countval1; 416 u8 RF_rfpll_refmaster_sparextalsize; 417 u8 RF_rfpll_loopfilter_r1; 418 u8 RF_rfpll_loopfilter_c2; 419 u8 RF_rfpll_loopfilter_c1; 420 u8 RF_cp_kpd_idac; 421 u8 RF_rfpll_mmd0; 422 u8 RF_rfpll_mmd1; 423 u8 RF_vcobuf_tune; 424 u8 RF_logen_mx2g_tune; 425 u8 RF_logen_indbuf2g_tune; 426 u8 RF_txmix2g_tune_boost_pu_core0; 427 u8 RF_pad2g_tune_pus_core0; 428 u8 RF_lna2g_tune_core0; 429 u8 RF_txmix2g_tune_boost_pu_core1; 430 u8 RF_pad2g_tune_pus_core1; 431 u8 RF_lna2g_tune_core1; 432 u16 PHY_BW1a; 433 u16 PHY_BW2; 434 u16 PHY_BW3; 435 u16 PHY_BW4; 436 u16 PHY_BW5; 437 u16 PHY_BW6; 438 }; 439 440 struct nphy_sfo_cfg { 441 u16 PHY_BW1a; 442 u16 PHY_BW2; 443 u16 PHY_BW3; 444 u16 PHY_BW4; 445 u16 PHY_BW5; 446 u16 PHY_BW6; 447 }; 448 449 static const struct chan_info_nphy_2055 chan_info_nphy_2055[] = { 450 { 451 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 452 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 453 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, 454 { 455 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 456 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 457 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, 458 { 459 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 460 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 461 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, 462 { 463 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 464 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 465 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, 466 { 467 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 468 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 469 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, 470 { 471 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 472 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 473 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, 474 { 475 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 476 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 477 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, 478 { 479 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 480 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 481 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, 482 { 483 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 484 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 485 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, 486 { 487 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 488 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 489 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, 490 { 491 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 492 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 493 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, 494 { 495 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 496 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 497 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, 498 { 499 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 500 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 501 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, 502 { 503 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 504 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 505 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, 506 { 507 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 508 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 509 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, 510 { 511 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 512 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 513 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, 514 { 515 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 516 0x00, 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0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, 860 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 861 0x00, 0x80, 0x924, 0x920, 0x91C, 0x1C0, 0x1C1, 0x1C2}, 862 { 863 170, 5850, 3900, 0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, 864 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 865 0x00, 0x80, 0x928, 0x924, 0x920, 0x1BF, 0x1C0, 0x1C1}, 866 { 867 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, 868 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 869 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, 870 { 871 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, 872 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 873 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, 874 { 875 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, 876 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 877 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, 878 { 879 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, 880 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 881 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, 882 { 883 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, 884 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 885 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, 886 { 887 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, 888 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 889 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, 890 { 891 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, 892 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, 893 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, 894 { 895 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, 896 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, 897 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, 898 { 899 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, 900 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 901 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, 902 { 903 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, 904 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 905 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, 906 { 907 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, 908 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, 909 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, 910 { 911 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, 912 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, 913 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, 914 { 915 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, 916 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, 917 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, 918 { 919 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, 920 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, 921 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, 922 { 923 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, 924 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, 925 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, 926 { 927 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, 928 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, 929 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, 930 { 931 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, 932 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, 933 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, 934 { 935 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, 936 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, 937 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, 938 { 939 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, 940 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, 941 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, 942 { 943 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, 944 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, 945 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} 946 }; 947 948 static const struct chan_info_nphy_radio205x chan_info_nphyrev3_2056[] = { 949 { 950 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 951 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 952 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 953 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 954 { 955 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 956 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 957 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 958 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 959 { 960 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 961 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 962 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 963 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 964 { 965 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 966 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 967 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 968 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 969 { 970 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 971 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 972 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 973 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 974 { 975 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 976 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 977 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 978 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 979 { 980 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 981 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 982 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 983 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 984 { 985 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 986 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 987 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 988 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 989 { 990 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 991 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 992 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 993 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 994 { 995 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 996 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 997 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 998 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 999 { 1000 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1001 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1002 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1003 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1004 { 1005 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1006 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1007 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1008 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1009 { 1010 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1011 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1012 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1013 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1014 { 1015 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1016 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1017 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1018 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1019 { 1020 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1021 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1022 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1023 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1024 { 1025 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1026 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1027 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1028 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1029 { 1030 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1031 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1032 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1033 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1034 { 1035 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1036 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1037 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1038 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1039 { 1040 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1041 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1042 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1043 0x00, 0xff, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1044 { 1045 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1046 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1047 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1048 0x00, 0xfc, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1049 { 1050 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1051 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1052 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1053 0x00, 0xfc, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1054 { 1055 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1056 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1057 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1058 0x00, 0xfc, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1059 { 1060 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1061 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1062 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1063 0x00, 0xfc, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1064 { 1065 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1066 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1067 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1068 0x00, 0xfc, 0x00, 0x0814, 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{ 1555 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 1556 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x05, 0x00, 1557 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf3, 0x00, 0x05, 0x00, 0x70, 0x00, 1558 0x0f, 0x00, 0x0d, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 1559 { 1560 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 1561 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 1562 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, 1563 0x0f, 0x00, 0x0d, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 1564 { 1565 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 1566 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 1567 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, 1568 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 1569 }; 1570 1571 static const struct chan_info_nphy_radio205x chan_info_nphyrev4_2056_A1[] = { 1572 { 1573 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 1574 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1575 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1576 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 1577 { 1578 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 1579 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1580 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1581 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 1582 { 1583 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 1584 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1585 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1586 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 1587 { 1588 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 1589 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1590 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1591 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 1592 { 1593 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 1594 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1595 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1596 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 1597 { 1598 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 1599 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1600 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1601 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 1602 { 1603 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 1604 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1605 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1606 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 1607 { 1608 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 1609 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1610 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1611 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 1612 { 1613 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 1614 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1615 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1616 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 1617 { 1618 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 1619 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1620 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1621 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 1622 { 1623 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1624 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1625 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1626 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1627 { 1628 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1629 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1630 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1631 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1632 { 1633 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1634 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1635 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1636 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1637 { 1638 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1639 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1640 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1641 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1642 { 1643 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1644 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1645 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1646 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1647 { 1648 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1649 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1650 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1651 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1652 { 1653 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1654 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1655 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1656 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1657 { 1658 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1659 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1660 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1661 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1662 { 1663 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1664 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1665 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1666 0x00, 0xfe, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1667 { 1668 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1669 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1670 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1671 0x00, 0xfe, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1672 { 1673 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1674 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1675 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1676 0x00, 0xfe, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1677 { 1678 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1679 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1680 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1681 0x00, 0xfe, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1682 { 1683 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1684 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 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{ 1848 96, 5480, 0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, 0x0c, 0x01, 1849 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5d, 0x00, 0x07, 0x00, 0x7f, 1850 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1851 0x00, 0xf8, 0x00, 0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df}, 1852 { 1853 98, 5490, 0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, 0x0c, 0x01, 1854 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 1855 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1856 0x00, 0xf8, 0x00, 0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de}, 1857 { 1858 100, 5500, 0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, 0x0c, 0x01, 1859 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 1860 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1861 0x00, 0xf6, 0x00, 0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd}, 1862 { 1863 102, 5510, 0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, 0x0c, 0x01, 1864 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1865 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1866 0x00, 0xf6, 0x00, 0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd}, 1867 { 1868 104, 5520, 0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, 0x0c, 0x01, 1869 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1870 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1871 0x00, 0xf6, 0x00, 0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc}, 1872 { 1873 106, 5530, 0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, 0x0c, 0x01, 1874 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1875 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1876 0x00, 0xf6, 0x00, 0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db}, 1877 { 1878 108, 5540, 0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1879 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1880 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1881 0x00, 0xf6, 0x00, 0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da}, 1882 { 1883 110, 5550, 0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1884 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1885 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1886 0x00, 0xf6, 0x00, 0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9}, 1887 { 1888 112, 5560, 0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1889 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 1890 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1891 0x00, 0xf6, 0x00, 0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8}, 1892 { 1893 114, 5570, 0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1894 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 1895 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1896 0x00, 0xf6, 0x00, 0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7}, 1897 { 1898 116, 5580, 0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1899 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1900 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1901 0x00, 0xf6, 0x00, 0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7}, 1902 { 1903 118, 5590, 0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1904 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1905 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1906 0x00, 0xf6, 0x00, 0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6}, 1907 { 1908 120, 5600, 0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, 0x0c, 0x01, 1909 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 1910 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1911 0x00, 0xf4, 0x00, 0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5}, 1912 { 1913 122, 5610, 0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, 0x0c, 0x01, 1914 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1915 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1916 0x00, 0xf4, 0x00, 0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4}, 1917 { 1918 124, 5620, 0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, 0x0c, 0x01, 1919 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1920 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1921 0x00, 0xf4, 0x00, 0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3}, 1922 { 1923 126, 5630, 0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, 0x0c, 0x01, 1924 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1925 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1926 0x00, 0xf4, 0x00, 0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2}, 1927 { 1928 128, 5640, 0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, 0x0c, 0x01, 1929 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1930 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1931 0x00, 0xf4, 0x00, 0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2}, 1932 { 1933 130, 5650, 0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, 0x0c, 0x01, 1934 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1935 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1936 0x00, 0xf4, 0x00, 0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1}, 1937 { 1938 132, 5660, 0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, 0x0c, 0x01, 1939 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1940 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1941 0x00, 0xf4, 0x00, 0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0}, 1942 { 1943 134, 5670, 0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, 0x0c, 0x01, 1944 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1945 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1946 0x00, 0xf4, 0x00, 0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf}, 1947 { 1948 136, 5680, 0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, 0x0c, 0x01, 1949 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1950 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1951 0x00, 0xf4, 0x00, 0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce}, 1952 { 1953 138, 5690, 0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, 0x0c, 0x01, 1954 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 1955 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1956 0x00, 0xf4, 0x00, 0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce}, 1957 { 1958 140, 5700, 0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1959 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1960 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1961 0x00, 0xf2, 0x00, 0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd}, 1962 { 1963 142, 5710, 0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1964 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1965 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1966 0x00, 0xf2, 0x00, 0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc}, 1967 { 1968 144, 5720, 0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1969 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1970 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1971 0x00, 0xf2, 0x00, 0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb}, 1972 { 1973 145, 5725, 0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, 0x10, 0x01, 1974 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1975 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1976 0x00, 0xf2, 0x00, 0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb}, 1977 { 1978 146, 5730, 0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1979 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1980 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1981 0x00, 0xf2, 0x00, 0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca}, 1982 { 1983 147, 5735, 0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, 0x10, 0x01, 1984 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1985 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1986 0x00, 0xf2, 0x00, 0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca}, 1987 { 1988 148, 5740, 0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1989 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1990 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1991 0x00, 0xf2, 0x00, 0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9}, 1992 { 1993 149, 5745, 0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, 0x10, 0x01, 1994 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1995 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1996 0x00, 0xf2, 0x00, 0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9}, 1997 { 1998 150, 5750, 0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1999 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 2000 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2001 0x00, 0xf2, 0x00, 0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9}, 2002 { 2003 151, 5755, 0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, 0x10, 0x01, 2004 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2005 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2006 0x00, 0xf2, 0x00, 0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8}, 2007 { 2008 152, 5760, 0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, 0x0c, 0x01, 2009 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2010 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2011 0x00, 0xf2, 0x00, 0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8}, 2012 { 2013 153, 5765, 0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, 0x10, 0x01, 2014 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2015 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2016 0x00, 0xf2, 0x00, 0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8}, 2017 { 2018 154, 5770, 0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, 0x0c, 0x01, 2019 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2020 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2021 0x00, 0xf2, 0x00, 0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7}, 2022 { 2023 155, 5775, 0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, 0x10, 0x01, 2024 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2025 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2026 0x00, 0xf2, 0x00, 0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7}, 2027 { 2028 156, 5780, 0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, 0x0c, 0x01, 2029 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2030 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2031 0x00, 0xf2, 0x00, 0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6}, 2032 { 2033 157, 5785, 0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, 0x10, 0x01, 2034 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2035 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2036 0x00, 0xf2, 0x00, 0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6}, 2037 { 2038 158, 5790, 0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, 0x0c, 0x01, 2039 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2040 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2041 0x00, 0xf2, 0x00, 0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6}, 2042 { 2043 159, 5795, 0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, 0x10, 0x01, 2044 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2045 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2046 0x00, 0xf2, 0x00, 0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5}, 2047 { 2048 160, 5800, 0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, 0x0c, 0x01, 2049 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2050 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2051 0x00, 0xf0, 0x00, 0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5}, 2052 { 2053 161, 5805, 0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, 0x10, 0x01, 2054 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2055 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2056 0x00, 0xf0, 0x00, 0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4}, 2057 { 2058 162, 5810, 0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, 0x0c, 0x01, 2059 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2060 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2061 0x00, 0xf0, 0x00, 0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4}, 2062 { 2063 163, 5815, 0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, 0x10, 0x01, 2064 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2065 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2066 0x00, 0xf0, 0x00, 0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4}, 2067 { 2068 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2069 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2070 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2071 0x00, 0xf0, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2072 { 2073 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2074 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2075 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2076 0x00, 0xf0, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2077 { 2078 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2079 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2080 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2081 0x00, 0xf0, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2082 { 2083 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2084 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2085 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2086 0x00, 0xf0, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2087 { 2088 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2089 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2090 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2091 0x00, 0xf0, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2092 { 2093 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2094 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2095 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2096 0x00, 0xf0, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2097 { 2098 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2099 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2100 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2101 0x00, 0xf0, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2102 { 2103 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2104 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2105 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2106 0x00, 0xf0, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2107 { 2108 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2109 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2110 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2111 0x00, 0xf0, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2112 { 2113 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2114 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 2115 0x00, 0x07, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2116 0x00, 0xf0, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2117 { 2118 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2119 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 2120 0x00, 0x07, 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2121 0x00, 0xf0, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2122 { 2123 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2124 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2125 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2126 0x0f, 0x00, 0x0e, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2127 { 2128 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2129 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2130 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2131 0x0f, 0x00, 0x0e, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2132 { 2133 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2134 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2135 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2136 0x0f, 0x00, 0x0e, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2137 { 2138 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2139 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 2140 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00, 2141 0x0f, 0x00, 0x0e, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2142 { 2143 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2144 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 2145 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00, 2146 0x0f, 0x00, 0x0e, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2147 { 2148 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2149 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 2150 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00, 2151 0x0f, 0x00, 0x0e, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2152 { 2153 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2154 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 2155 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00, 2156 0x0f, 0x00, 0x0e, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2157 { 2158 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2159 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 2160 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00, 2161 0x0f, 0x00, 0x0e, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2162 { 2163 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2164 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 2165 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00, 2166 0x0f, 0x00, 0x0e, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2167 { 2168 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2169 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 2170 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, 2171 0x0f, 0x00, 0x0e, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2172 { 2173 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2174 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 2175 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, 2176 0x0f, 0x00, 0x0e, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2177 { 2178 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2179 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 2180 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, 2181 0x0f, 0x00, 0x0e, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2182 { 2183 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2184 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 2185 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, 2186 0x0f, 0x00, 0x0e, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2187 { 2188 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2189 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 2190 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, 2191 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2192 }; 2193 2194 static const struct chan_info_nphy_radio205x chan_info_nphyrev5_2056v5[] = { 2195 { 2196 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2197 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2198 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 2199 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2200 { 2201 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2202 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2203 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2204 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2205 { 2206 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2207 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2208 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2209 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2210 { 2211 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2212 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2213 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2214 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2215 { 2216 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2217 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2218 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 2219 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2220 { 2221 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2222 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2223 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2224 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2225 { 2226 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2227 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2228 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2229 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2230 { 2231 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2232 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2233 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2234 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 2235 { 2236 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 2237 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2238 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2239 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 2240 { 2241 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 2242 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2243 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2244 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 2245 { 2246 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 2247 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2248 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 2249 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 2250 { 2251 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 2252 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2253 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2254 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 2255 { 2256 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 2257 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2258 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2259 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 2260 { 2261 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 2262 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2263 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2264 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 2265 { 2266 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 2267 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 2268 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2269 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 2270 { 2271 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 2272 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 2273 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2274 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 2275 { 2276 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 2277 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2278 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2279 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 2280 { 2281 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 2282 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2283 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2284 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 2285 { 2286 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 2287 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2288 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2289 0x00, 0x6f, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 2290 { 2291 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 2292 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2293 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2294 0x00, 0x6f, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 2295 { 2296 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 2297 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2298 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2299 0x00, 0x6f, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 2300 { 2301 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 2302 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 2303 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, 2304 0x00, 0x6f, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 2305 { 2306 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 2307 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2308 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, 2309 0x00, 0x6f, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 2310 { 2311 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 2312 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2313 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, 2314 0x00, 0x6e, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 2315 { 2316 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 2317 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 2318 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2319 0x00, 0x6e, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 2320 { 2321 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, 2322 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2323 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2324 0x00, 0x6e, 0x00, 0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb}, 2325 { 2326 38, 5190, 0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, 0x0c, 0x01, 2327 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2328 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2329 0x00, 0x6e, 0x00, 0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa}, 2330 { 2331 40, 5200, 0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, 0x0c, 0x01, 2332 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2333 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2334 0x00, 0x6e, 0x00, 0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9}, 2335 { 2336 42, 5210, 0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, 0x0c, 0x01, 2337 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2338 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2339 0x00, 0x6e, 0x00, 0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8}, 2340 { 2341 44, 5220, 0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2342 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2343 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2344 0x00, 0x6e, 0x00, 0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7}, 2345 { 2346 46, 5230, 0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2347 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xea, 0x00, 0x06, 0x00, 0x70, 2348 0x00, 0x08, 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08, 2349 0x00, 0x6e, 0x00, 0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 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0x01c2, 0x01c3, 0x01c4}, 2690 { 2691 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2692 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2693 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2694 0x00, 0x82, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2695 { 2696 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2697 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2698 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2699 0x00, 0x82, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2700 { 2701 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2702 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2703 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2704 0x00, 0x72, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2705 { 2706 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2707 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2708 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2709 0x00, 0x72, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2710 { 2711 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2712 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2713 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2714 0x00, 0x72, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2715 { 2716 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2717 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2718 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2719 0x00, 0x72, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2720 { 2721 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2722 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2723 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2724 0x00, 0x71, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2725 { 2726 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2727 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2728 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2729 0x00, 0x71, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2730 { 2731 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2732 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2733 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2734 0x00, 0x71, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2735 { 2736 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2737 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2738 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2739 0x00, 0x71, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2740 { 2741 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2742 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2743 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2744 0x00, 0x71, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2745 { 2746 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2747 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2748 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2749 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2750 { 2751 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2752 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2753 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2754 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2755 { 2756 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2757 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 2758 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00, 2759 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2760 { 2761 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2762 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 2763 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00, 2764 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2765 { 2766 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2767 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 2768 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00, 2769 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2770 { 2771 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2772 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 2773 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00, 2774 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2775 { 2776 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2777 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 2778 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00, 2779 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2780 { 2781 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2782 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 2783 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00, 2784 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2785 { 2786 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2787 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 2788 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00, 2789 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2790 { 2791 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2792 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 2793 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00, 2794 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2795 { 2796 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2797 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 2798 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00, 2799 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2800 { 2801 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2802 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 2803 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00, 2804 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2805 { 2806 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2807 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 2808 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00, 2809 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2810 { 2811 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2812 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 2813 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 2814 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2815 }; 2816 2817 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v6[] = { 2818 { 2819 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2820 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2821 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2822 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2823 { 2824 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2825 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2826 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2827 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2828 { 2829 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2830 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2831 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2832 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2833 { 2834 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2835 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2836 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2837 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2838 { 2839 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2840 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2841 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2842 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2843 { 2844 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2845 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2846 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2847 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2848 { 2849 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2850 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2851 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2852 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 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0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 3323 { 3324 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 3325 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3326 0x00, 0x05, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, 3327 0x00, 0x69, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 3328 { 3329 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 3330 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3331 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3332 0x00, 0x69, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 3333 { 3334 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 3335 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3336 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3337 0x00, 0x69, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 3338 { 3339 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 3340 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3341 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3342 0x00, 0x69, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 3343 { 3344 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 3345 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3346 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3347 0x00, 0x68, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 3348 { 3349 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 3350 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3351 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3352 0x00, 0x68, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 3353 { 3354 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 3355 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3356 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3357 0x00, 0x68, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 3358 { 3359 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 3360 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3361 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3362 0x00, 0x68, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 3363 { 3364 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 3365 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3366 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3367 0x00, 0x68, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3368 { 3369 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3370 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3371 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3372 0x0b, 0x00, 0x0a, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3373 { 3374 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3375 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3376 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3377 0x0b, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3378 { 3379 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3380 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 3381 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, 3382 0x0b, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3383 { 3384 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3385 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 3386 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, 3387 0x0a, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 3388 { 3389 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 3390 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 3391 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, 3392 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 3393 { 3394 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 3395 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 3396 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, 3397 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 3398 { 3399 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 3400 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 3401 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 3402 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 3403 { 3404 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 3405 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 3406 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 3407 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 3408 { 3409 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 3410 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 3411 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, 3412 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 3413 { 3414 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 3415 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 3416 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, 3417 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 3418 { 3419 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 3420 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 3421 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, 3422 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 3423 { 3424 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 3425 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3426 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3427 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 3428 { 3429 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 3430 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3431 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3432 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 3433 { 3434 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 3435 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 3436 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 3437 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 3438 }; 3439 3440 static const struct chan_info_nphy_radio205x chan_info_nphyrev5n6_2056v7[] = { 3441 { 3442 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 3443 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3444 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 3445 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 3446 { 3447 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 3448 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3449 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3450 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 3451 { 3452 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 3453 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3454 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3455 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 3456 { 3457 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 3458 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3459 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3460 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 3461 { 3462 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 3463 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3464 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 3465 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 3466 { 3467 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 3468 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3469 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3470 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 3471 { 3472 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 3473 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3474 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3475 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 3476 { 3477 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 3478 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3479 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3480 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 3481 { 3482 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 3483 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3484 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3485 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 3486 { 3487 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 3488 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3489 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3490 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 3491 { 3492 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 3493 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3494 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 3495 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 3496 { 3497 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 3498 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3499 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 3500 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 3501 { 3502 208, 5040, 0xef, 0x01, 0x01, 0x01, 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0x01, 3988 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 3989 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 3990 0x00, 0x91, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3991 { 3992 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3993 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3994 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3995 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3996 { 3997 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3998 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3999 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 4000 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 4001 { 4002 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 4003 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 4004 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 4005 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 4006 { 4007 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 4008 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 4009 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 4010 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 4011 { 4012 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 4013 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 4014 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4015 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4016 { 4017 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4018 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 4019 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4020 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4021 { 4022 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4023 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 4024 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00, 4025 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4026 { 4027 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4028 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 4029 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4030 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4031 { 4032 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4033 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4034 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4035 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4036 { 4037 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4038 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4039 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4040 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4041 { 4042 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4043 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 4044 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4045 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4046 { 4047 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4048 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 4049 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4050 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4051 { 4052 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4053 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 4054 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4055 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4056 { 4057 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4058 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4059 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4060 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4061 }; 4062 4063 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v8[] = { 4064 { 4065 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 4066 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4067 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4068 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4069 { 4070 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 4071 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4072 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4073 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4074 { 4075 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 4076 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4077 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4078 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4079 { 4080 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 4081 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4082 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4083 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4084 { 4085 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 4086 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4087 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4088 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4089 { 4090 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 4091 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4092 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4093 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4094 { 4095 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 4096 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4097 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4098 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4099 { 4100 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 4101 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4102 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4103 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4104 { 4105 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 4106 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4107 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4108 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4109 { 4110 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 4111 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4112 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4113 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4114 { 4115 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 4116 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4117 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4118 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4119 { 4120 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 4121 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4122 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4123 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4124 { 4125 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 4126 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4127 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4128 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4129 { 4130 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 4131 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4132 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4133 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4134 { 4135 212, 5060, 0xe6, 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0x56, 0x00, 0x03, 0x00, 4637 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4638 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4639 { 4640 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4641 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 4642 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4643 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4644 { 4645 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4646 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4647 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00, 0x70, 0x00, 4648 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4649 { 4650 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4651 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4652 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4653 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4654 { 4655 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4656 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 4657 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4658 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4659 { 4660 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4661 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 4662 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4663 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4664 { 4665 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4666 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 4667 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4668 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4669 { 4670 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4671 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4672 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4673 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4674 { 4675 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4676 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4677 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4678 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4679 { 4680 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4681 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4682 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4683 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4684 }; 4685 4686 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v11[] = { 4687 { 4688 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, 4689 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4690 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4691 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4692 { 4693 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x02, 0x0c, 0x01, 4694 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4695 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4696 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4697 { 4698 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x02, 0x0c, 0x01, 4699 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4700 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4701 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4702 { 4703 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x02, 0x0c, 0x01, 4704 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4705 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4706 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4707 { 4708 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x02, 0x0c, 0x01, 4709 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4710 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4711 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4712 { 4713 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x02, 0x0c, 0x01, 4714 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4715 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4716 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4717 { 4718 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x02, 0x0c, 0x01, 4719 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4720 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4721 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4722 { 4723 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x02, 0x0c, 0x01, 4724 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4725 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4726 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4727 { 4728 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x02, 0x0c, 0x01, 4729 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4730 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4731 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4732 { 4733 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x02, 0x0c, 0x01, 4734 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4735 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4736 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4737 { 4738 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x02, 0x0c, 0x01, 4739 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4740 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4741 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4742 { 4743 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x02, 0x0c, 0x01, 4744 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4745 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4746 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4747 { 4748 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x02, 0x0c, 0x01, 4749 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4750 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4751 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4752 { 4753 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x02, 0x0c, 0x01, 4754 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4755 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4756 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4757 { 4758 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x02, 0x0c, 0x01, 4759 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4760 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4761 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 4762 { 4763 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x02, 0x0c, 0x01, 4764 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4765 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4766 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 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0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 5286 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 5287 { 5288 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x06, 0x06, 0x04, 0x2b, 0x01, 5289 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 5290 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 5291 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 5292 { 5293 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x06, 0x06, 0x04, 0x2b, 0x01, 5294 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5295 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 5296 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 5297 { 5298 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x06, 0x06, 0x04, 0x2b, 0x01, 5299 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5300 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 5301 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 5302 { 5303 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x06, 0x06, 0x04, 0x2b, 0x01, 5304 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 5305 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 5306 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 5307 }; 5308 5309 static const struct chan_info_nphy_radio2057 chan_info_nphyrev7_2057_rev4[] = { 5310 { 5311 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 5312 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5313 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b4, 0x07b0, 0x07ac, 0x0214, 5314 0x0215, 5315 0x0216, 5316 }, 5317 { 5318 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 5319 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5320 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b8, 0x07b4, 0x07b0, 0x0213, 5321 0x0214, 5322 0x0215, 5323 }, 5324 { 5325 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 5326 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5327 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07bc, 0x07b8, 0x07b4, 0x0212, 5328 0x0213, 5329 0x0214, 5330 }, 5331 { 5332 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 5333 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5334 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c0, 0x07bc, 0x07b8, 0x0211, 5335 0x0212, 5336 0x0213, 5337 }, 5338 { 5339 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 5340 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5341 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c4, 0x07c0, 0x07bc, 0x020f, 5342 0x0211, 5343 0x0212, 5344 }, 5345 { 5346 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 5347 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5348 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c8, 0x07c4, 0x07c0, 0x020e, 5349 0x020f, 5350 0x0211, 5351 }, 5352 { 5353 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 5354 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5355 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07cc, 0x07c8, 0x07c4, 0x020d, 5356 0x020e, 5357 0x020f, 5358 }, 5359 { 5360 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 5361 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5362 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d0, 0x07cc, 0x07c8, 0x020c, 5363 0x020d, 5364 0x020e, 5365 }, 5366 { 5367 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 5368 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5369 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d4, 0x07d0, 0x07cc, 0x020b, 5370 0x020c, 5371 0x020d, 5372 }, 5373 { 5374 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 5375 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5376 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d8, 0x07d4, 0x07d0, 0x020a, 5377 0x020b, 5378 0x020c, 5379 }, 5380 { 5381 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 5382 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5383 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07dc, 0x07d8, 0x07d4, 0x0209, 5384 0x020a, 5385 0x020b, 5386 }, 5387 { 5388 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 5389 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5390 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e0, 0x07dc, 0x07d8, 0x0208, 5391 0x0209, 5392 0x020a, 5393 }, 5394 { 5395 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 5396 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5397 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e4, 0x07e0, 0x07dc, 0x0207, 5398 0x0208, 5399 0x0209, 5400 }, 5401 { 5402 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 5403 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5404 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e8, 0x07e4, 0x07e0, 0x0206, 5405 0x0207, 5406 0x0208, 5407 }, 5408 { 5409 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 5410 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5411 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x07ec, 0x07e8, 0x07e4, 0x0205, 5412 0x0206, 5413 0x0207, 5414 }, 5415 { 5416 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 5417 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5418 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f0, 0x07ec, 0x07e8, 0x0204, 5419 0x0205, 5420 0x0206, 5421 }, 5422 { 5423 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 5424 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5425 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f4, 0x07f0, 0x07ec, 0x0203, 5426 0x0204, 5427 0x0205, 5428 }, 5429 { 5430 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 5431 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5432 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07f8, 0x07f4, 0x07f0, 0x0202, 5433 0x0203, 5434 0x0204, 5435 }, 5436 { 5437 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 5438 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5439 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07fc, 0x07f8, 0x07f4, 0x0201, 5440 0x0202, 5441 0x0203, 5442 }, 5443 { 5444 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 5445 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5446 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0800, 0x07fc, 0x07f8, 0x0200, 5447 0x0201, 5448 0x0202, 5449 }, 5450 { 5451 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 5452 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5453 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0804, 0x0800, 0x07fc, 0x01ff, 5454 0x0200, 5455 0x0201, 5456 }, 5457 { 5458 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 5459 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5460 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0808, 0x0804, 0x0800, 0x01fe, 5461 0x01ff, 5462 0x0200, 5463 }, 5464 { 5465 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 5466 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5467 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x080c, 0x0808, 0x0804, 0x01fd, 5468 0x01fe, 5469 0x01ff, 5470 }, 5471 { 5472 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 5473 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5474 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0814, 0x0810, 0x080c, 0x01fb, 5475 0x01fc, 5476 0x01fd, 5477 }, 5478 { 5479 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 5480 0x00, 0x0d, 0x00, 0xdd, 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170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 6033 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6034 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 6035 0x01c0, 6036 0x01c1, 6037 }, 6038 { 6039 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 6040 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6041 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 6042 0x01bf, 6043 0x01c0, 6044 }, 6045 { 6046 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 6047 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6048 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 6049 0x01bf, 6050 0x01bf, 6051 }, 6052 { 6053 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 6054 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6055 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 6056 0x01be, 6057 0x01bf, 6058 }, 6059 { 6060 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 6061 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6062 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 6063 0x01bd, 6064 0x01be, 6065 }, 6066 { 6067 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 6068 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6069 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 6070 0x01bc, 6071 0x01bd, 6072 }, 6073 { 6074 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 6075 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6076 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 6077 0x043f, 6078 0x0443, 6079 }, 6080 { 6081 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 6082 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6083 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 6084 0x043d, 6085 0x0441, 6086 }, 6087 { 6088 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 6089 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6090 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 6091 0x043a, 6092 0x043f, 6093 }, 6094 { 6095 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 6096 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6097 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 6098 0x0438, 6099 0x043d, 6100 }, 6101 { 6102 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 6103 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6104 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 6105 0x0436, 6106 0x043a, 6107 }, 6108 { 6109 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 6110 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6111 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 6112 0x0434, 6113 0x0438, 6114 }, 6115 { 6116 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 6117 0x07, 0x00, 0x07, 0x00, 0x51, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6118 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 6119 0x0431, 6120 0x0436, 6121 }, 6122 { 6123 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6124 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6125 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6126 0x042f, 6127 0x0434, 6128 }, 6129 { 6130 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6131 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6132 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6133 0x042d, 6134 0x0431, 6135 }, 6136 { 6137 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6138 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6139 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6140 0x042b, 6141 0x042f, 6142 }, 6143 { 6144 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6145 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6146 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 6147 0x0429, 6148 0x042d, 6149 }, 6150 { 6151 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 6152 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6153 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 6154 0x0427, 6155 0x042b, 6156 }, 6157 { 6158 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 6159 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6160 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 6161 0x0424, 6162 0x0429, 6163 }, 6164 { 6165 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 6166 0x04, 0x00, 0x04, 0x00, 0x11, 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x11, 6167 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 6168 0x041f, 6169 0x0424} 6170 }; 6171 6172 static const struct chan_info_nphy_radio2057_rev5 6173 chan_info_nphyrev8_2057_rev5[] = { 6174 { 6175 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6176 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6177 0x043a, 0x043f, 0x0443}, 6178 { 6179 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6180 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6181 0x0438, 0x043d, 0x0441}, 6182 { 6183 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6184 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6185 0x0436, 0x043a, 0x043f}, 6186 { 6187 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6188 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6189 0x0434, 0x0438, 0x043d}, 6190 { 6191 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6192 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6193 0x0431, 0x0436, 0x043a}, 6194 { 6195 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6196 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6197 0x042f, 0x0434, 0x0438}, 6198 { 6199 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6200 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6201 0x042d, 0x0431, 0x0436}, 6202 { 6203 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6204 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6205 0x042b, 0x042f, 0x0434}, 6206 { 6207 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6208 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6209 0x0429, 0x042d, 0x0431}, 6210 { 6211 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6212 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6213 0x0427, 0x042b, 0x042f}, 6214 { 6215 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6216 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6217 0x0424, 0x0429, 0x042d}, 6218 { 6219 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6220 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6221 0x0422, 0x0427, 0x042b}, 6222 { 6223 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6224 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6225 0x0420, 0x0424, 0x0429}, 6226 { 6227 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6228 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6229 0x041b, 0x041f, 0x0424} 6230 }; 6231 6232 static const struct chan_info_nphy_radio2057_rev5 6233 chan_info_nphyrev9_2057_rev5v1[] = { 6234 { 6235 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6236 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6237 0x043a, 0x043f, 0x0443}, 6238 { 6239 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6240 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6241 0x0438, 0x043d, 0x0441}, 6242 { 6243 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6244 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6245 0x0436, 0x043a, 0x043f}, 6246 { 6247 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6248 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6249 0x0434, 0x0438, 0x043d}, 6250 { 6251 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6252 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6253 0x0431, 0x0436, 0x043a}, 6254 { 6255 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6256 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6257 0x042f, 0x0434, 0x0438}, 6258 { 6259 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6260 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6261 0x042d, 0x0431, 0x0436}, 6262 { 6263 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6264 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6265 0x042b, 0x042f, 0x0434}, 6266 { 6267 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6268 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6269 0x0429, 0x042d, 0x0431}, 6270 { 6271 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6272 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6273 0x0427, 0x042b, 0x042f}, 6274 { 6275 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6276 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6277 0x0424, 0x0429, 0x042d}, 6278 { 6279 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6280 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6281 0x0422, 0x0427, 0x042b}, 6282 { 6283 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6284 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6285 0x0420, 0x0424, 0x0429}, 6286 { 6287 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6288 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6289 0x041b, 0x041f, 0x0424} 6290 }; 6291 6292 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev7[] = { 6293 { 6294 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 6295 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6296 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b4, 0x07b0, 0x07ac, 0x0214, 6297 0x0215, 6298 0x0216}, 6299 { 6300 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 6301 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6302 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 6303 0x0214, 6304 0x0215}, 6305 { 6306 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 6307 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6308 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 6309 0x0213, 6310 0x0214}, 6311 { 6312 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 6313 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6314 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 6315 0x0212, 6316 0x0213}, 6317 { 6318 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 6319 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6320 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 6321 0x0211, 6322 0x0212}, 6323 { 6324 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 6325 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6326 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 6327 0x020f, 6328 0x0211}, 6329 { 6330 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 6331 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6332 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 6333 0x020e, 6334 0x020f}, 6335 { 6336 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 6337 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6338 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 6339 0x020d, 6340 0x020e}, 6341 { 6342 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 6343 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6344 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 6345 0x020c, 6346 0x020d}, 6347 { 6348 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 6349 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6350 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 6351 0x020b, 6352 0x020c}, 6353 { 6354 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 6355 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6356 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 6357 0x020a, 6358 0x020b}, 6359 { 6360 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 6361 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6362 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 6363 0x0209, 6364 0x020a}, 6365 { 6366 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 6367 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6368 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 6369 0x0208, 6370 0x0209}, 6371 { 6372 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 6373 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6374 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 6375 0x0207, 6376 0x0208}, 6377 { 6378 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 6379 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6380 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 6381 0x0206, 6382 0x0207}, 6383 { 6384 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 6385 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6386 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 6387 0x0205, 6388 0x0206}, 6389 { 6390 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 6391 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6392 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 6393 0x0204, 6394 0x0205}, 6395 { 6396 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 6397 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6398 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 6399 0x0203, 6400 0x0204}, 6401 { 6402 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 6403 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6404 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 6405 0x0202, 6406 0x0203}, 6407 { 6408 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 6409 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6410 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 6411 0x0201, 6412 0x0202}, 6413 { 6414 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 6415 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6416 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 6417 0x0200, 6418 0x0201}, 6419 { 6420 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 6421 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6422 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 6423 0x01ff, 6424 0x0200}, 6425 { 6426 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 6427 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6428 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 6429 0x01fe, 6430 0x01ff}, 6431 { 6432 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 6433 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6434 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 6435 0x01fc, 6436 0x01fd}, 6437 { 6438 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 6439 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6440 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 6441 0x01fb, 6442 0x01fc}, 6443 { 6444 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 6445 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6446 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x081c, 0x0818, 0x0814, 0x01f9, 6447 0x01fa, 6448 0x01fb}, 6449 { 6450 38, 5190, 0xc2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x07, 0x02, 0x0c, 6451 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6452 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0820, 0x081c, 0x0818, 0x01f8, 6453 0x01f9, 6454 0x01fa}, 6455 { 6456 40, 5200, 0xc5, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x08, 0x02, 0x0c, 6457 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6458 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0824, 0x0820, 0x081c, 0x01f7, 6459 0x01f8, 6460 0x01f9}, 6461 { 6462 42, 5210, 0xc8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x09, 0x02, 0x0c, 6463 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6464 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0828, 0x0824, 0x0820, 0x01f6, 6465 0x01f7, 6466 0x01f8}, 6467 { 6468 44, 5220, 0xcc, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0a, 0x02, 0x0c, 6469 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6470 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x082c, 0x0828, 0x0824, 0x01f5, 6471 0x01f6, 6472 0x01f7}, 6473 { 6474 46, 5230, 0xcf, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0b, 0x02, 0x0c, 6475 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6476 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0830, 0x082c, 0x0828, 0x01f4, 6477 0x01f5, 6478 0x01f6}, 6479 { 6480 48, 5240, 0xd2, 0x16, 0x10, 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0x03d1, 0x03cd, 0x042d, 6987 0x0431, 6988 0x0436}, 6989 { 6990 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6991 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6992 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6993 0x042f, 6994 0x0434}, 6995 { 6996 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6997 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6998 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6999 0x042d, 7000 0x0431}, 7001 { 7002 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7003 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7004 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7005 0x042b, 7006 0x042f}, 7007 { 7008 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7009 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7010 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7011 0x0429, 7012 0x042d}, 7013 { 7014 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7015 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7016 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7017 0x0427, 7018 0x042b}, 7019 { 7020 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7021 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7022 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7023 0x0424, 7024 0x0429}, 7025 { 7026 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7027 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7028 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7029 0x041f, 7030 0x0424} 7031 }; 7032 7033 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev8[] = { 7034 { 7035 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 7036 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7037 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 7038 0x0214, 7039 0x0215}, 7040 { 7041 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 7042 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7043 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 7044 0x0213, 7045 0x0214}, 7046 { 7047 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 7048 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7049 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 7050 0x0212, 7051 0x0213}, 7052 { 7053 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 7054 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7055 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 7056 0x0211, 7057 0x0212}, 7058 { 7059 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 7060 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7061 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 7062 0x020f, 7063 0x0211}, 7064 { 7065 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 7066 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7067 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 7068 0x020e, 7069 0x020f}, 7070 { 7071 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 7072 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7073 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 7074 0x020d, 7075 0x020e}, 7076 { 7077 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 7078 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7079 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 7080 0x020c, 7081 0x020d}, 7082 { 7083 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 7084 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7085 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 7086 0x020b, 7087 0x020c}, 7088 { 7089 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 7090 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7091 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 7092 0x020a, 7093 0x020b}, 7094 { 7095 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 7096 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7097 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 7098 0x0209, 7099 0x020a}, 7100 { 7101 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 7102 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7103 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 7104 0x0208, 7105 0x0209}, 7106 { 7107 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 7108 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7109 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 7110 0x0207, 7111 0x0208}, 7112 { 7113 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 7114 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7115 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 7116 0x0206, 7117 0x0207}, 7118 { 7119 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 7120 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7121 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 7122 0x0205, 7123 0x0206}, 7124 { 7125 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 7126 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7127 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 7128 0x0204, 7129 0x0205}, 7130 { 7131 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 7132 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7133 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 7134 0x0203, 7135 0x0204}, 7136 { 7137 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 7138 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7139 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 7140 0x0202, 7141 0x0203}, 7142 { 7143 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 7144 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7145 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 7146 0x0201, 7147 0x0202}, 7148 { 7149 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 7150 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7151 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 7152 0x0200, 7153 0x0201}, 7154 { 7155 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 7156 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7157 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 7158 0x01ff, 7159 0x0200}, 7160 { 7161 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 7162 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7163 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 7164 0x01fe, 7165 0x01ff}, 7166 { 7167 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 7168 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7169 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 7170 0x01fc, 7171 0x01fd}, 7172 { 7173 34, 5170, 0xbb, 0x16, 0x10, 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0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x47, 0x02, 0x05, 7636 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7637 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 7638 0x01c2, 7639 0x01c2}, 7640 { 7641 168, 5840, 0x9a, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x48, 0x02, 0x05, 7642 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7643 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 7644 0x01c1, 7645 0x01c2}, 7646 { 7647 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 7648 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7649 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 7650 0x01c0, 7651 0x01c1}, 7652 { 7653 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 7654 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7655 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 7656 0x01bf, 7657 0x01c0}, 7658 { 7659 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 7660 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7661 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 7662 0x01bf, 7663 0x01bf}, 7664 { 7665 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 7666 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7667 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 7668 0x01be, 7669 0x01bf}, 7670 { 7671 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 7672 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7673 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 7674 0x01bd, 7675 0x01be}, 7676 { 7677 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 7678 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7679 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 7680 0x01bc, 7681 0x01bd}, 7682 { 7683 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 7684 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7685 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 7686 0x043f, 7687 0x0443}, 7688 { 7689 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 7690 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7691 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 7692 0x043d, 7693 0x0441}, 7694 { 7695 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 7696 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7697 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 7698 0x043a, 7699 0x043f}, 7700 { 7701 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 7702 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7703 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 7704 0x0438, 7705 0x043d}, 7706 { 7707 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 7708 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7709 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 7710 0x0436, 7711 0x043a}, 7712 { 7713 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 7714 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7715 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 7716 0x0434, 7717 0x0438}, 7718 { 7719 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 7720 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7721 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 7722 0x0431, 7723 0x0436}, 7724 { 7725 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 7726 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7727 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 7728 0x042f, 7729 0x0434}, 7730 { 7731 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 7732 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7733 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 7734 0x042d, 7735 0x0431}, 7736 { 7737 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7738 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7739 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7740 0x042b, 7741 0x042f}, 7742 { 7743 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7744 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7745 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7746 0x0429, 7747 0x042d}, 7748 { 7749 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7750 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7751 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7752 0x0427, 7753 0x042b}, 7754 { 7755 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7756 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7757 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7758 0x0424, 7759 0x0429}, 7760 { 7761 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7762 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7763 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7764 0x041f, 7765 0x0424} 7766 }; 7767 7768 static struct radio_regs regs_2055[] = { 7769 {0x02, 0x80, 0x80, 0, 0}, 7770 {0x03, 0, 0, 0, 0}, 7771 {0x04, 0x27, 0x27, 0, 0}, 7772 {0x05, 0, 0, 0, 0}, 7773 {0x06, 0x27, 0x27, 0, 0}, 7774 {0x07, 0x7f, 0x7f, 1, 1}, 7775 {0x08, 0x7, 0x7, 1, 1}, 7776 {0x09, 0x7f, 0x7f, 1, 1}, 7777 {0x0A, 0x7, 0x7, 1, 1}, 7778 {0x0B, 0x15, 0x15, 0, 0}, 7779 {0x0C, 0x15, 0x15, 0, 0}, 7780 {0x0D, 0x4f, 0x4f, 1, 1}, 7781 {0x0E, 0x5, 0x5, 1, 1}, 7782 {0x0F, 0x4f, 0x4f, 1, 1}, 7783 {0x10, 0x5, 0x5, 1, 1}, 7784 {0x11, 0xd0, 0xd0, 0, 0}, 7785 {0x12, 0x2, 0x2, 0, 0}, 7786 {0x13, 0, 0, 0, 0}, 7787 {0x14, 0x40, 0x40, 0, 0}, 7788 {0x15, 0, 0, 0, 0}, 7789 {0x16, 0, 0, 0, 0}, 7790 {0x17, 0, 0, 0, 0}, 7791 {0x18, 0, 0, 0, 0}, 7792 {0x19, 0, 0, 0, 0}, 7793 {0x1A, 0, 0, 0, 0}, 7794 {0x1B, 0, 0, 0, 0}, 7795 {0x1C, 0, 0, 0, 0}, 7796 {0x1D, 0xc0, 0xc0, 0, 0}, 7797 {0x1E, 0xff, 0xff, 0, 0}, 7798 {0x1F, 0xc0, 0xc0, 0, 0}, 7799 {0x20, 0xff, 0xff, 0, 0}, 7800 {0x21, 0xc0, 0xc0, 0, 0}, 7801 {0x22, 0, 0, 0, 0}, 7802 {0x23, 0x2c, 0x2c, 0, 0}, 7803 {0x24, 0, 0, 0, 0}, 7804 {0x25, 0, 0, 0, 0}, 7805 {0x26, 0, 0, 0, 0}, 7806 {0x27, 0, 0, 0, 0}, 7807 {0x28, 0, 0, 0, 0}, 7808 {0x29, 0, 0, 0, 0}, 7809 {0x2A, 0, 0, 0, 0}, 7810 {0x2B, 0, 0, 0, 0}, 7811 {0x2C, 0, 0, 0, 0}, 7812 {0x2D, 0xa4, 0xa4, 0, 0}, 7813 {0x2E, 0x38, 0x38, 0, 0}, 7814 {0x2F, 0, 0, 0, 0}, 7815 {0x30, 0x4, 0x4, 1, 1}, 7816 {0x31, 0, 0, 0, 0}, 7817 {0x32, 0xa, 0xa, 0, 0}, 7818 {0x33, 0x87, 0x87, 0, 0}, 7819 {0x34, 0x9, 0x9, 0, 0}, 7820 {0x35, 0x70, 0x70, 0, 0}, 7821 {0x36, 0x11, 0x11, 0, 0}, 7822 {0x37, 0x18, 0x18, 1, 1}, 7823 {0x38, 0x6, 0x6, 0, 0}, 7824 {0x39, 0x4, 0x4, 1, 1}, 7825 {0x3A, 0x6, 0x6, 0, 0}, 7826 {0x3B, 0x9e, 0x9e, 0, 0}, 7827 {0x3C, 0x9, 0x9, 0, 0}, 7828 {0x3D, 0xc8, 0xc8, 1, 1}, 7829 {0x3E, 0x88, 0x88, 0, 0}, 7830 {0x3F, 0, 0, 0, 0}, 7831 {0x40, 0, 0, 0, 0}, 7832 {0x41, 0, 0, 0, 0}, 7833 {0x42, 0x1, 0x1, 0, 0}, 7834 {0x43, 0x2, 0x2, 0, 0}, 7835 {0x44, 0x96, 0x96, 0, 0}, 7836 {0x45, 0x3e, 0x3e, 0, 0}, 7837 {0x46, 0x3e, 0x3e, 0, 0}, 7838 {0x47, 0x13, 0x13, 0, 0}, 7839 {0x48, 0x2, 0x2, 0, 0}, 7840 {0x49, 0x15, 0x15, 0, 0}, 7841 {0x4A, 0x7, 0x7, 0, 0}, 7842 {0x4B, 0, 0, 0, 0}, 7843 {0x4C, 0, 0, 0, 0}, 7844 {0x4D, 0, 0, 0, 0}, 7845 {0x4E, 0, 0, 0, 0}, 7846 {0x4F, 0, 0, 0, 0}, 7847 {0x50, 0x8, 0x8, 0, 0}, 7848 {0x51, 0x8, 0x8, 0, 0}, 7849 {0x52, 0x6, 0x6, 0, 0}, 7850 {0x53, 0x84, 0x84, 1, 1}, 7851 {0x54, 0xc3, 0xc3, 0, 0}, 7852 {0x55, 0x8f, 0x8f, 0, 0}, 7853 {0x56, 0xff, 0xff, 0, 0}, 7854 {0x57, 0xff, 0xff, 0, 0}, 7855 {0x58, 0x88, 0x88, 0, 0}, 7856 {0x59, 0x88, 0x88, 0, 0}, 7857 {0x5A, 0, 0, 0, 0}, 7858 {0x5B, 0xcc, 0xcc, 0, 0}, 7859 {0x5C, 0x6, 0x6, 0, 0}, 7860 {0x5D, 0x80, 0x80, 0, 0}, 7861 {0x5E, 0x80, 0x80, 0, 0}, 7862 {0x5F, 0xf8, 0xf8, 0, 0}, 7863 {0x60, 0x88, 0x88, 0, 0}, 7864 {0x61, 0x88, 0x88, 0, 0}, 7865 {0x62, 0x88, 0x8, 1, 1}, 7866 {0x63, 0x88, 0x88, 0, 0}, 7867 {0x64, 0, 0, 0, 0}, 7868 {0x65, 0x1, 0x1, 1, 1}, 7869 {0x66, 0x8a, 0x8a, 0, 0}, 7870 {0x67, 0x8, 0x8, 0, 0}, 7871 {0x68, 0x83, 0x83, 0, 0}, 7872 {0x69, 0x6, 0x6, 0, 0}, 7873 {0x6A, 0xa0, 0xa0, 0, 0}, 7874 {0x6B, 0xa, 0xa, 0, 0}, 7875 {0x6C, 0x87, 0x87, 1, 1}, 7876 {0x6D, 0x2a, 0x2a, 0, 0}, 7877 {0x6E, 0x2a, 0x2a, 0, 0}, 7878 {0x6F, 0x2a, 0x2a, 0, 0}, 7879 {0x70, 0x2a, 0x2a, 0, 0}, 7880 {0x71, 0x18, 0x18, 0, 0}, 7881 {0x72, 0x6a, 0x6a, 1, 1}, 7882 {0x73, 0xab, 0xab, 1, 1}, 7883 {0x74, 0x13, 0x13, 1, 1}, 7884 {0x75, 0xc1, 0xc1, 1, 1}, 7885 {0x76, 0xaa, 0xaa, 1, 1}, 7886 {0x77, 0x87, 0x87, 1, 1}, 7887 {0x78, 0, 0, 0, 0}, 7888 {0x79, 0x6, 0x6, 0, 0}, 7889 {0x7A, 0x7, 0x7, 0, 0}, 7890 {0x7B, 0x7, 0x7, 0, 0}, 7891 {0x7C, 0x15, 0x15, 0, 0}, 7892 {0x7D, 0x55, 0x55, 0, 0}, 7893 {0x7E, 0x97, 0x97, 1, 1}, 7894 {0x7F, 0x8, 0x8, 0, 0}, 7895 {0x80, 0x14, 0x14, 1, 1}, 7896 {0x81, 0x33, 0x33, 0, 0}, 7897 {0x82, 0x88, 0x88, 0, 0}, 7898 {0x83, 0x6, 0x6, 0, 0}, 7899 {0x84, 0x3, 0x3, 1, 1}, 7900 {0x85, 0xa, 0xa, 0, 0}, 7901 {0x86, 0x3, 0x3, 1, 1}, 7902 {0x87, 0x2a, 0x2a, 0, 0}, 7903 {0x88, 0xa4, 0xa4, 0, 0}, 7904 {0x89, 0x18, 0x18, 0, 0}, 7905 {0x8A, 0x28, 0x28, 0, 0}, 7906 {0x8B, 0, 0, 0, 0}, 7907 {0x8C, 0x4a, 0x4a, 0, 0}, 7908 {0x8D, 0, 0, 0, 0}, 7909 {0x8E, 0xf8, 0xf8, 0, 0}, 7910 {0x8F, 0x88, 0x88, 0, 0}, 7911 {0x90, 0x88, 0x88, 0, 0}, 7912 {0x91, 0x88, 0x8, 1, 1}, 7913 {0x92, 0x88, 0x88, 0, 0}, 7914 {0x93, 0, 0, 0, 0}, 7915 {0x94, 0x1, 0x1, 1, 1}, 7916 {0x95, 0x8a, 0x8a, 0, 0}, 7917 {0x96, 0x8, 0x8, 0, 0}, 7918 {0x97, 0x83, 0x83, 0, 0}, 7919 {0x98, 0x6, 0x6, 0, 0}, 7920 {0x99, 0xa0, 0xa0, 0, 0}, 7921 {0x9A, 0xa, 0xa, 0, 0}, 7922 {0x9B, 0x87, 0x87, 1, 1}, 7923 {0x9C, 0x2a, 0x2a, 0, 0}, 7924 {0x9D, 0x2a, 0x2a, 0, 0}, 7925 {0x9E, 0x2a, 0x2a, 0, 0}, 7926 {0x9F, 0x2a, 0x2a, 0, 0}, 7927 {0xA0, 0x18, 0x18, 0, 0}, 7928 {0xA1, 0x6a, 0x6a, 1, 1}, 7929 {0xA2, 0xab, 0xab, 1, 1}, 7930 {0xA3, 0x13, 0x13, 1, 1}, 7931 {0xA4, 0xc1, 0xc1, 1, 1}, 7932 {0xA5, 0xaa, 0xaa, 1, 1}, 7933 {0xA6, 0x87, 0x87, 1, 1}, 7934 {0xA7, 0, 0, 0, 0}, 7935 {0xA8, 0x6, 0x6, 0, 0}, 7936 {0xA9, 0x7, 0x7, 0, 0}, 7937 {0xAA, 0x7, 0x7, 0, 0}, 7938 {0xAB, 0x15, 0x15, 0, 0}, 7939 {0xAC, 0x55, 0x55, 0, 0}, 7940 {0xAD, 0x97, 0x97, 1, 1}, 7941 {0xAE, 0x8, 0x8, 0, 0}, 7942 {0xAF, 0x14, 0x14, 1, 1}, 7943 {0xB0, 0x33, 0x33, 0, 0}, 7944 {0xB1, 0x88, 0x88, 0, 0}, 7945 {0xB2, 0x6, 0x6, 0, 0}, 7946 {0xB3, 0x3, 0x3, 1, 1}, 7947 {0xB4, 0xa, 0xa, 0, 0}, 7948 {0xB5, 0x3, 0x3, 1, 1}, 7949 {0xB6, 0x2a, 0x2a, 0, 0}, 7950 {0xB7, 0xa4, 0xa4, 0, 0}, 7951 {0xB8, 0x18, 0x18, 0, 0}, 7952 {0xB9, 0x28, 0x28, 0, 0}, 7953 {0xBA, 0, 0, 0, 0}, 7954 {0xBB, 0x4a, 0x4a, 0, 0}, 7955 {0xBC, 0, 0, 0, 0}, 7956 {0xBD, 0x71, 0x71, 0, 0}, 7957 {0xBE, 0x72, 0x72, 0, 0}, 7958 {0xBF, 0x73, 0x73, 0, 0}, 7959 {0xC0, 0x74, 0x74, 0, 0}, 7960 {0xC1, 0x75, 0x75, 0, 0}, 7961 {0xC2, 0x76, 0x76, 0, 0}, 7962 {0xC3, 0x77, 0x77, 0, 0}, 7963 {0xC4, 0x78, 0x78, 0, 0}, 7964 {0xC5, 0x79, 0x79, 0, 0}, 7965 {0xC6, 0x7a, 0x7a, 0, 0}, 7966 {0xC7, 0, 0, 0, 0}, 7967 {0xC8, 0, 0, 0, 0}, 7968 {0xC9, 0, 0, 0, 0}, 7969 {0xCA, 0, 0, 0, 0}, 7970 {0xCB, 0, 0, 0, 0}, 7971 {0xCC, 0, 0, 0, 0}, 7972 {0xCD, 0, 0, 0, 0}, 7973 {0xCE, 0x6, 0x6, 0, 0}, 7974 {0xCF, 0, 0, 0, 0}, 7975 {0xD0, 0, 0, 0, 0}, 7976 {0xD1, 0x18, 0x18, 0, 0}, 7977 {0xD2, 0x88, 0x88, 0, 0}, 7978 {0xD3, 0, 0, 0, 0}, 7979 {0xD4, 0, 0, 0, 0}, 7980 {0xD5, 0, 0, 0, 0}, 7981 {0xD6, 0, 0, 0, 0}, 7982 {0xD7, 0, 0, 0, 0}, 7983 {0xD8, 0, 0, 0, 0}, 7984 {0xD9, 0, 0, 0, 0}, 7985 {0xDA, 0x6, 0x6, 0, 0}, 7986 {0xDB, 0, 0, 0, 0}, 7987 {0xDC, 0, 0, 0, 0}, 7988 {0xDD, 0x18, 0x18, 0, 0}, 7989 {0xDE, 0x88, 0x88, 0, 0}, 7990 {0xDF, 0, 0, 0, 0}, 7991 {0xE0, 0, 0, 0, 0}, 7992 {0xE1, 0, 0, 0, 0}, 7993 {0xE2, 0, 0, 0, 0}, 7994 {0xFFFF, 0, 0, 0, 0}, 7995 }; 7996 7997 static struct radio_regs regs_SYN_2056[] = { 7998 {0x02, 0, 0, 0, 0}, 7999 {0x03, 0, 0, 0, 0}, 8000 {0x04, 0, 0, 0, 0}, 8001 {0x05, 0, 0, 0, 0}, 8002 {0x06, 0, 0, 0, 0}, 8003 {0x07, 0, 0, 0, 0}, 8004 {0x08, 0, 0, 0, 0}, 8005 {0x09, 0x1, 0x1, 0, 0}, 8006 {0x0A, 0, 0, 0, 0}, 8007 {0x0B, 0, 0, 0, 0}, 8008 {0x0C, 0, 0, 0, 0}, 8009 {0x0D, 0, 0, 0, 0}, 8010 {0x0E, 0, 0, 0, 0}, 8011 {0x0F, 0, 0, 0, 0}, 8012 {0x10, 0, 0, 0, 0}, 8013 {0x11, 0, 0, 0, 0}, 8014 {0x12, 0, 0, 0, 0}, 8015 {0x13, 0, 0, 0, 0}, 8016 {0x14, 0, 0, 0, 0}, 8017 {0x15, 0, 0, 0, 0}, 8018 {0x16, 0, 0, 0, 0}, 8019 {0x17, 0, 0, 0, 0}, 8020 {0x18, 0, 0, 0, 0}, 8021 {0x19, 0, 0, 0, 0}, 8022 {0x1A, 0, 0, 0, 0}, 8023 {0x1B, 0, 0, 0, 0}, 8024 {0x1C, 0, 0, 0, 0}, 8025 {0x1D, 0, 0, 0, 0}, 8026 {0x1E, 0, 0, 0, 0}, 8027 {0x1F, 0, 0, 0, 0}, 8028 {0x20, 0, 0, 0, 0}, 8029 {0x21, 0, 0, 0, 0}, 8030 {0x22, 0x60, 0x60, 0, 0}, 8031 {0x23, 0x6, 0x6, 0, 0}, 8032 {0x24, 0xc, 0xc, 0, 0}, 8033 {0x25, 0, 0, 0, 0}, 8034 {0x26, 0, 0, 0, 0}, 8035 {0x27, 0, 0, 0, 0}, 8036 {0x28, 0x1, 0x1, 0, 0}, 8037 {0x29, 0, 0, 0, 0}, 8038 {0x2A, 0, 0, 0, 0}, 8039 {0x2B, 0, 0, 0, 0}, 8040 {0x2C, 0, 0, 0, 0}, 8041 {0x2D, 0, 0, 0, 0}, 8042 {0x2E, 0xd, 0xd, 0, 0}, 8043 {0x2F, 0x1f, 0x1f, 0, 0}, 8044 {0x30, 0x15, 0x15, 0, 0}, 8045 {0x31, 0xf, 0xf, 0, 0}, 8046 {0x32, 0, 0, 0, 0}, 8047 {0x33, 0, 0, 0, 0}, 8048 {0x34, 0, 0, 0, 0}, 8049 {0x35, 0, 0, 0, 0}, 8050 {0x36, 0, 0, 0, 0}, 8051 {0x37, 0, 0, 0, 0}, 8052 {0x38, 0, 0, 0, 0}, 8053 {0x39, 0, 0, 0, 0}, 8054 {0x3A, 0, 0, 0, 0}, 8055 {0x3B, 0, 0, 0, 0}, 8056 {0x3C, 0x13, 0x13, 0, 0}, 8057 {0x3D, 0xf, 0xf, 0, 0}, 8058 {0x3E, 0x18, 0x18, 0, 0}, 8059 {0x3F, 0, 0, 0, 0}, 8060 {0x40, 0, 0, 0, 0}, 8061 {0x41, 0x20, 0x20, 0, 0}, 8062 {0x42, 0x20, 0x20, 0, 0}, 8063 {0x43, 0, 0, 0, 0}, 8064 {0x44, 0x77, 0x77, 0, 0}, 8065 {0x45, 0x7, 0x7, 0, 0}, 8066 {0x46, 0x1, 0x1, 0, 0}, 8067 {0x47, 0x4, 0x4, 0, 0}, 8068 {0x48, 0xf, 0xf, 0, 0}, 8069 {0x49, 0x30, 0x30, 0, 0}, 8070 {0x4A, 0x32, 0x32, 0, 0}, 8071 {0x4B, 0xd, 0xd, 0, 0}, 8072 {0x4C, 0xd, 0xd, 0, 0}, 8073 {0x4D, 0x4, 0x4, 0, 0}, 8074 {0x4E, 0x6, 0x6, 0, 0}, 8075 {0x4F, 0x1, 0x1, 0, 0}, 8076 {0x50, 0x1c, 0x1c, 0, 0}, 8077 {0x51, 0x2, 0x2, 0, 0}, 8078 {0x52, 0x2, 0x2, 0, 0}, 8079 {0x53, 0xf7, 0xf7, 1, 1}, 8080 {0x54, 0xb4, 0xb4, 0, 0}, 8081 {0x55, 0xd2, 0xd2, 0, 0}, 8082 {0x56, 0, 0, 0, 0}, 8083 {0x57, 0, 0, 0, 0}, 8084 {0x58, 0x4, 0x4, 0, 0}, 8085 {0x59, 0x96, 0x96, 0, 0}, 8086 {0x5A, 0x3e, 0x3e, 0, 0}, 8087 {0x5B, 0x3e, 0x3e, 0, 0}, 8088 {0x5C, 0x13, 0x13, 0, 0}, 8089 {0x5D, 0x2, 0x2, 0, 0}, 8090 {0x5E, 0, 0, 0, 0}, 8091 {0x5F, 0x7, 0x7, 0, 0}, 8092 {0x60, 0x7, 0x7, 1, 1}, 8093 {0x61, 0x8, 0x8, 0, 0}, 8094 {0x62, 0x3, 0x3, 0, 0}, 8095 {0x63, 0, 0, 0, 0}, 8096 {0x64, 0, 0, 0, 0}, 8097 {0x65, 0, 0, 0, 0}, 8098 {0x66, 0, 0, 0, 0}, 8099 {0x67, 0, 0, 0, 0}, 8100 {0x68, 0x40, 0x40, 0, 0}, 8101 {0x69, 0, 0, 0, 0}, 8102 {0x6A, 0, 0, 0, 0}, 8103 {0x6B, 0, 0, 0, 0}, 8104 {0x6C, 0, 0, 0, 0}, 8105 {0x6D, 0x1, 0x1, 0, 0}, 8106 {0x6E, 0, 0, 0, 0}, 8107 {0x6F, 0, 0, 0, 0}, 8108 {0x70, 0x60, 0x60, 0, 0}, 8109 {0x71, 0x66, 0x66, 0, 0}, 8110 {0x72, 0xc, 0xc, 0, 0}, 8111 {0x73, 0x66, 0x66, 0, 0}, 8112 {0x74, 0x8f, 0x8f, 1, 1}, 8113 {0x75, 0, 0, 0, 0}, 8114 {0x76, 0xcc, 0xcc, 0, 0}, 8115 {0x77, 0x1, 0x1, 0, 0}, 8116 {0x78, 0x66, 0x66, 0, 0}, 8117 {0x79, 0x66, 0x66, 0, 0}, 8118 {0x7A, 0, 0, 0, 0}, 8119 {0x7B, 0, 0, 0, 0}, 8120 {0x7C, 0, 0, 0, 0}, 8121 {0x7D, 0, 0, 0, 0}, 8122 {0x7E, 0, 0, 0, 0}, 8123 {0x7F, 0, 0, 0, 0}, 8124 {0x80, 0, 0, 0, 0}, 8125 {0x81, 0, 0, 0, 0}, 8126 {0x82, 0, 0, 0, 0}, 8127 {0x83, 0, 0, 0, 0}, 8128 {0x84, 0, 0, 0, 0}, 8129 {0x85, 0xff, 0xff, 0, 0}, 8130 {0x86, 0, 0, 0, 0}, 8131 {0x87, 0, 0, 0, 0}, 8132 {0x88, 0, 0, 0, 0}, 8133 {0x89, 0, 0, 0, 0}, 8134 {0x8A, 0, 0, 0, 0}, 8135 {0x8B, 0, 0, 0, 0}, 8136 {0x8C, 0, 0, 0, 0}, 8137 {0x8D, 0, 0, 0, 0}, 8138 {0x8E, 0, 0, 0, 0}, 8139 {0x8F, 0, 0, 0, 0}, 8140 {0x90, 0, 0, 0, 0}, 8141 {0x91, 0, 0, 0, 0}, 8142 {0x92, 0, 0, 0, 0}, 8143 {0x93, 0, 0, 0, 0}, 8144 {0x94, 0, 0, 0, 0}, 8145 {0x95, 0, 0, 0, 0}, 8146 {0x96, 0, 0, 0, 0}, 8147 {0x97, 0, 0, 0, 0}, 8148 {0x98, 0, 0, 0, 0}, 8149 {0x99, 0, 0, 0, 0}, 8150 {0x9A, 0, 0, 0, 0}, 8151 {0x9B, 0, 0, 0, 0}, 8152 {0x9C, 0, 0, 0, 0}, 8153 {0x9D, 0, 0, 0, 0}, 8154 {0x9E, 0, 0, 0, 0}, 8155 {0x9F, 0x6, 0x6, 0, 0}, 8156 {0xA0, 0x66, 0x66, 0, 0}, 8157 {0xA1, 0x66, 0x66, 0, 0}, 8158 {0xA2, 0x66, 0x66, 0, 0}, 8159 {0xA3, 0x66, 0x66, 0, 0}, 8160 {0xA4, 0x66, 0x66, 0, 0}, 8161 {0xA5, 0x66, 0x66, 0, 0}, 8162 {0xA6, 0x66, 0x66, 0, 0}, 8163 {0xA7, 0x66, 0x66, 0, 0}, 8164 {0xA8, 0x66, 0x66, 0, 0}, 8165 {0xA9, 0x66, 0x66, 0, 0}, 8166 {0xAA, 0x66, 0x66, 0, 0}, 8167 {0xAB, 0x66, 0x66, 0, 0}, 8168 {0xAC, 0x66, 0x66, 0, 0}, 8169 {0xAD, 0x66, 0x66, 0, 0}, 8170 {0xAE, 0x66, 0x66, 0, 0}, 8171 {0xAF, 0x66, 0x66, 0, 0}, 8172 {0xB0, 0x66, 0x66, 0, 0}, 8173 {0xB1, 0x66, 0x66, 0, 0}, 8174 {0xB2, 0x66, 0x66, 0, 0}, 8175 {0xB3, 0xa, 0xa, 0, 0}, 8176 {0xB4, 0, 0, 0, 0}, 8177 {0xB5, 0, 0, 0, 0}, 8178 {0xB6, 0, 0, 0, 0}, 8179 {0xFFFF, 0, 0, 0, 0} 8180 }; 8181 8182 static struct radio_regs regs_TX_2056[] = { 8183 {0x02, 0, 0, 0, 0}, 8184 {0x03, 0, 0, 0, 0}, 8185 {0x04, 0, 0, 0, 0}, 8186 {0x05, 0, 0, 0, 0}, 8187 {0x06, 0, 0, 0, 0}, 8188 {0x07, 0, 0, 0, 0}, 8189 {0x08, 0, 0, 0, 0}, 8190 {0x09, 0, 0, 0, 0}, 8191 {0x0A, 0, 0, 0, 0}, 8192 {0x0B, 0, 0, 0, 0}, 8193 {0x0C, 0, 0, 0, 0}, 8194 {0x0D, 0, 0, 0, 0}, 8195 {0x0E, 0, 0, 0, 0}, 8196 {0x0F, 0, 0, 0, 0}, 8197 {0x10, 0, 0, 0, 0}, 8198 {0x11, 0, 0, 0, 0}, 8199 {0x12, 0, 0, 0, 0}, 8200 {0x13, 0, 0, 0, 0}, 8201 {0x14, 0, 0, 0, 0}, 8202 {0x15, 0, 0, 0, 0}, 8203 {0x16, 0, 0, 0, 0}, 8204 {0x17, 0, 0, 0, 0}, 8205 {0x18, 0, 0, 0, 0}, 8206 {0x19, 0, 0, 0, 0}, 8207 {0x1A, 0, 0, 0, 0}, 8208 {0x1B, 0, 0, 0, 0}, 8209 {0x1C, 0, 0, 0, 0}, 8210 {0x1D, 0, 0, 0, 0}, 8211 {0x1E, 0, 0, 0, 0}, 8212 {0x1F, 0, 0, 0, 0}, 8213 {0x20, 0, 0, 0, 0}, 8214 {0x21, 0x88, 0x88, 0, 0}, 8215 {0x22, 0x88, 0x88, 0, 0}, 8216 {0x23, 0x88, 0x88, 0, 0}, 8217 {0x24, 0x88, 0x88, 0, 0}, 8218 {0x25, 0xc, 0xc, 0, 0}, 8219 {0x26, 0, 0, 0, 0}, 8220 {0x27, 0x3, 0x3, 0, 0}, 8221 {0x28, 0, 0, 0, 0}, 8222 {0x29, 0x3, 0x3, 0, 0}, 8223 {0x2A, 0x37, 0x37, 0, 0}, 8224 {0x2B, 0x3, 0x3, 0, 0}, 8225 {0x2C, 0, 0, 0, 0}, 8226 {0x2D, 0, 0, 0, 0}, 8227 {0x2E, 0x1, 0x1, 0, 0}, 8228 {0x2F, 0x1, 0x1, 0, 0}, 8229 {0x30, 0, 0, 0, 0}, 8230 {0x31, 0, 0, 0, 0}, 8231 {0x32, 0, 0, 0, 0}, 8232 {0x33, 0x11, 0x11, 0, 0}, 8233 {0x34, 0x11, 0x11, 0, 0}, 8234 {0x35, 0, 0, 0, 0}, 8235 {0x36, 0, 0, 0, 0}, 8236 {0x37, 0x3, 0x3, 0, 0}, 8237 {0x38, 0xf, 0xf, 0, 0}, 8238 {0x39, 0, 0, 0, 0}, 8239 {0x3A, 0x2d, 0x2d, 0, 0}, 8240 {0x3B, 0, 0, 0, 0}, 8241 {0x3C, 0x6e, 0x6e, 0, 0}, 8242 {0x3D, 0xf0, 0xf0, 1, 1}, 8243 {0x3E, 0, 0, 0, 0}, 8244 {0x3F, 0, 0, 0, 0}, 8245 {0x40, 0, 0, 0, 0}, 8246 {0x41, 0x3, 0x3, 0, 0}, 8247 {0x42, 0x3, 0x3, 0, 0}, 8248 {0x43, 0, 0, 0, 0}, 8249 {0x44, 0x1e, 0x1e, 0, 0}, 8250 {0x45, 0, 0, 0, 0}, 8251 {0x46, 0x6e, 0x6e, 0, 0}, 8252 {0x47, 0xf0, 0xf0, 1, 1}, 8253 {0x48, 0, 0, 0, 0}, 8254 {0x49, 0x2, 0x2, 0, 0}, 8255 {0x4A, 0xff, 0xff, 1, 1}, 8256 {0x4B, 0xc, 0xc, 0, 0}, 8257 {0x4C, 0, 0, 0, 0}, 8258 {0x4D, 0x38, 0x38, 0, 0}, 8259 {0x4E, 0x70, 0x70, 1, 1}, 8260 {0x4F, 0x2, 0x2, 0, 0}, 8261 {0x50, 0x88, 0x88, 0, 0}, 8262 {0x51, 0xc, 0xc, 0, 0}, 8263 {0x52, 0, 0, 0, 0}, 8264 {0x53, 0x8, 0x8, 0, 0}, 8265 {0x54, 0x70, 0x70, 1, 1}, 8266 {0x55, 0x2, 0x2, 0, 0}, 8267 {0x56, 0xff, 0xff, 1, 1}, 8268 {0x57, 0, 0, 0, 0}, 8269 {0x58, 0x83, 0x83, 0, 0}, 8270 {0x59, 0x77, 0x77, 1, 1}, 8271 {0x5A, 0, 0, 0, 0}, 8272 {0x5B, 0x2, 0x2, 0, 0}, 8273 {0x5C, 0x88, 0x88, 0, 0}, 8274 {0x5D, 0, 0, 0, 0}, 8275 {0x5E, 0x8, 0x8, 0, 0}, 8276 {0x5F, 0x77, 0x77, 1, 1}, 8277 {0x60, 0x1, 0x1, 0, 0}, 8278 {0x61, 0, 0, 0, 0}, 8279 {0x62, 0x7, 0x7, 0, 0}, 8280 {0x63, 0, 0, 0, 0}, 8281 {0x64, 0x7, 0x7, 0, 0}, 8282 {0x65, 0, 0, 0, 0}, 8283 {0x66, 0, 0, 0, 0}, 8284 {0x67, 0x74, 0x74, 1, 1}, 8285 {0x68, 0, 0, 0, 0}, 8286 {0x69, 0xa, 0xa, 0, 0}, 8287 {0x6A, 0, 0, 0, 0}, 8288 {0x6B, 0, 0, 0, 0}, 8289 {0x6C, 0, 0, 0, 0}, 8290 {0x6D, 0, 0, 0, 0}, 8291 {0x6E, 0, 0, 0, 0}, 8292 {0x6F, 0, 0, 0, 0}, 8293 {0x70, 0, 0, 0, 0}, 8294 {0x71, 0x2, 0x2, 0, 0}, 8295 {0x72, 0, 0, 0, 0}, 8296 {0x73, 0, 0, 0, 0}, 8297 {0x74, 0xe, 0xe, 0, 0}, 8298 {0x75, 0xe, 0xe, 0, 0}, 8299 {0x76, 0xe, 0xe, 0, 0}, 8300 {0x77, 0x13, 0x13, 0, 0}, 8301 {0x78, 0x13, 0x13, 0, 0}, 8302 {0x79, 0x1b, 0x1b, 0, 0}, 8303 {0x7A, 0x1b, 0x1b, 0, 0}, 8304 {0x7B, 0x55, 0x55, 0, 0}, 8305 {0x7C, 0x5b, 0x5b, 0, 0}, 8306 {0x7D, 0, 0, 0, 0}, 8307 {0x7E, 0, 0, 0, 0}, 8308 {0x7F, 0, 0, 0, 0}, 8309 {0x80, 0, 0, 0, 0}, 8310 {0x81, 0, 0, 0, 0}, 8311 {0x82, 0, 0, 0, 0}, 8312 {0x83, 0, 0, 0, 0}, 8313 {0x84, 0, 0, 0, 0}, 8314 {0x85, 0, 0, 0, 0}, 8315 {0x86, 0, 0, 0, 0}, 8316 {0x87, 0, 0, 0, 0}, 8317 {0x88, 0, 0, 0, 0}, 8318 {0x89, 0, 0, 0, 0}, 8319 {0x8A, 0, 0, 0, 0}, 8320 {0x8B, 0, 0, 0, 0}, 8321 {0x8C, 0, 0, 0, 0}, 8322 {0x8D, 0, 0, 0, 0}, 8323 {0x8E, 0, 0, 0, 0}, 8324 {0x8F, 0, 0, 0, 0}, 8325 {0x90, 0, 0, 0, 0}, 8326 {0x91, 0, 0, 0, 0}, 8327 {0x92, 0, 0, 0, 0}, 8328 {0xFFFF, 0, 0, 0, 0} 8329 }; 8330 8331 static struct radio_regs regs_RX_2056[] = { 8332 {0x02, 0, 0, 0, 0}, 8333 {0x03, 0, 0, 0, 0}, 8334 {0x04, 0, 0, 0, 0}, 8335 {0x05, 0, 0, 0, 0}, 8336 {0x06, 0, 0, 0, 0}, 8337 {0x07, 0, 0, 0, 0}, 8338 {0x08, 0, 0, 0, 0}, 8339 {0x09, 0, 0, 0, 0}, 8340 {0x0A, 0, 0, 0, 0}, 8341 {0x0B, 0, 0, 0, 0}, 8342 {0x0C, 0, 0, 0, 0}, 8343 {0x0D, 0, 0, 0, 0}, 8344 {0x0E, 0, 0, 0, 0}, 8345 {0x0F, 0, 0, 0, 0}, 8346 {0x10, 0, 0, 0, 0}, 8347 {0x11, 0, 0, 0, 0}, 8348 {0x12, 0, 0, 0, 0}, 8349 {0x13, 0, 0, 0, 0}, 8350 {0x14, 0, 0, 0, 0}, 8351 {0x15, 0, 0, 0, 0}, 8352 {0x16, 0, 0, 0, 0}, 8353 {0x17, 0, 0, 0, 0}, 8354 {0x18, 0, 0, 0, 0}, 8355 {0x19, 0, 0, 0, 0}, 8356 {0x1A, 0, 0, 0, 0}, 8357 {0x1B, 0, 0, 0, 0}, 8358 {0x1C, 0, 0, 0, 0}, 8359 {0x1D, 0, 0, 0, 0}, 8360 {0x1E, 0, 0, 0, 0}, 8361 {0x1F, 0, 0, 0, 0}, 8362 {0x20, 0x3, 0x3, 0, 0}, 8363 {0x21, 0, 0, 0, 0}, 8364 {0x22, 0, 0, 0, 0}, 8365 {0x23, 0x90, 0x90, 0, 0}, 8366 {0x24, 0x55, 0x55, 0, 0}, 8367 {0x25, 0x15, 0x15, 0, 0}, 8368 {0x26, 0x5, 0x5, 0, 0}, 8369 {0x27, 0x15, 0x15, 0, 0}, 8370 {0x28, 0x5, 0x5, 0, 0}, 8371 {0x29, 0x20, 0x20, 0, 0}, 8372 {0x2A, 0x11, 0x11, 0, 0}, 8373 {0x2B, 0x90, 0x90, 0, 0}, 8374 {0x2C, 0, 0, 0, 0}, 8375 {0x2D, 0x88, 0x88, 0, 0}, 8376 {0x2E, 0x32, 0x32, 0, 0}, 8377 {0x2F, 0x77, 0x77, 0, 0}, 8378 {0x30, 0x17, 0x17, 1, 1}, 8379 {0x31, 0xff, 0xff, 1, 1}, 8380 {0x32, 0x20, 0x20, 0, 0}, 8381 {0x33, 0, 0, 0, 0}, 8382 {0x34, 0x88, 0x88, 0, 0}, 8383 {0x35, 0x32, 0x32, 0, 0}, 8384 {0x36, 0x77, 0x77, 0, 0}, 8385 {0x37, 0x17, 0x17, 1, 1}, 8386 {0x38, 0xf0, 0xf0, 1, 1}, 8387 {0x39, 0x20, 0x20, 0, 0}, 8388 {0x3A, 0x8, 0x8, 0, 0}, 8389 {0x3B, 0x99, 0x99, 0, 0}, 8390 {0x3C, 0, 0, 0, 0}, 8391 {0x3D, 0x44, 0x44, 1, 1}, 8392 {0x3E, 0, 0, 0, 0}, 8393 {0x3F, 0x44, 0x44, 0, 0}, 8394 {0x40, 0xf, 0xf, 1, 1}, 8395 {0x41, 0x6, 0x6, 0, 0}, 8396 {0x42, 0x4, 0x4, 0, 0}, 8397 {0x43, 0x50, 0x50, 1, 1}, 8398 {0x44, 0x8, 0x8, 0, 0}, 8399 {0x45, 0x99, 0x99, 0, 0}, 8400 {0x46, 0, 0, 0, 0}, 8401 {0x47, 0x11, 0x11, 0, 0}, 8402 {0x48, 0, 0, 0, 0}, 8403 {0x49, 0x44, 0x44, 0, 0}, 8404 {0x4A, 0x7, 0x7, 0, 0}, 8405 {0x4B, 0x6, 0x6, 0, 0}, 8406 {0x4C, 0x4, 0x4, 0, 0}, 8407 {0x4D, 0, 0, 0, 0}, 8408 {0x4E, 0, 0, 0, 0}, 8409 {0x4F, 0x66, 0x66, 0, 0}, 8410 {0x50, 0x66, 0x66, 0, 0}, 8411 {0x51, 0x57, 0x57, 0, 0}, 8412 {0x52, 0x57, 0x57, 0, 0}, 8413 {0x53, 0x44, 0x44, 0, 0}, 8414 {0x54, 0, 0, 0, 0}, 8415 {0x55, 0, 0, 0, 0}, 8416 {0x56, 0x8, 0x8, 0, 0}, 8417 {0x57, 0x8, 0x8, 0, 0}, 8418 {0x58, 0x7, 0x7, 0, 0}, 8419 {0x59, 0x22, 0x22, 0, 0}, 8420 {0x5A, 0x22, 0x22, 0, 0}, 8421 {0x5B, 0x2, 0x2, 0, 0}, 8422 {0x5C, 0x23, 0x23, 0, 0}, 8423 {0x5D, 0x7, 0x7, 0, 0}, 8424 {0x5E, 0x55, 0x55, 0, 0}, 8425 {0x5F, 0x23, 0x23, 0, 0}, 8426 {0x60, 0x41, 0x41, 0, 0}, 8427 {0x61, 0x1, 0x1, 0, 0}, 8428 {0x62, 0xa, 0xa, 0, 0}, 8429 {0x63, 0, 0, 0, 0}, 8430 {0x64, 0, 0, 0, 0}, 8431 {0x65, 0, 0, 0, 0}, 8432 {0x66, 0, 0, 0, 0}, 8433 {0x67, 0, 0, 0, 0}, 8434 {0x68, 0, 0, 0, 0}, 8435 {0x69, 0, 0, 0, 0}, 8436 {0x6A, 0, 0, 0, 0}, 8437 {0x6B, 0xc, 0xc, 0, 0}, 8438 {0x6C, 0, 0, 0, 0}, 8439 {0x6D, 0, 0, 0, 0}, 8440 {0x6E, 0, 0, 0, 0}, 8441 {0x6F, 0, 0, 0, 0}, 8442 {0x70, 0, 0, 0, 0}, 8443 {0x71, 0, 0, 0, 0}, 8444 {0x72, 0x22, 0x22, 0, 0}, 8445 {0x73, 0x22, 0x22, 0, 0}, 8446 {0x74, 0x2, 0x2, 0, 0}, 8447 {0x75, 0xa, 0xa, 0, 0}, 8448 {0x76, 0x1, 0x1, 0, 0}, 8449 {0x77, 0x22, 0x22, 0, 0}, 8450 {0x78, 0x30, 0x30, 0, 0}, 8451 {0x79, 0, 0, 0, 0}, 8452 {0x7A, 0, 0, 0, 0}, 8453 {0x7B, 0, 0, 0, 0}, 8454 {0x7C, 0, 0, 0, 0}, 8455 {0x7D, 0, 0, 0, 0}, 8456 {0x7E, 0, 0, 0, 0}, 8457 {0x7F, 0, 0, 0, 0}, 8458 {0x80, 0, 0, 0, 0}, 8459 {0x81, 0, 0, 0, 0}, 8460 {0x82, 0, 0, 0, 0}, 8461 {0x83, 0, 0, 0, 0}, 8462 {0x84, 0, 0, 0, 0}, 8463 {0x85, 0, 0, 0, 0}, 8464 {0x86, 0, 0, 0, 0}, 8465 {0x87, 0, 0, 0, 0}, 8466 {0x88, 0, 0, 0, 0}, 8467 {0x89, 0, 0, 0, 0}, 8468 {0x8A, 0, 0, 0, 0}, 8469 {0x8B, 0, 0, 0, 0}, 8470 {0x8C, 0, 0, 0, 0}, 8471 {0x8D, 0, 0, 0, 0}, 8472 {0x8E, 0, 0, 0, 0}, 8473 {0x8F, 0, 0, 0, 0}, 8474 {0x90, 0, 0, 0, 0}, 8475 {0x91, 0, 0, 0, 0}, 8476 {0x92, 0, 0, 0, 0}, 8477 {0x93, 0, 0, 0, 0}, 8478 {0x94, 0, 0, 0, 0}, 8479 {0xFFFF, 0, 0, 0, 0} 8480 }; 8481 8482 static struct radio_regs regs_SYN_2056_A1[] = { 8483 {0x02, 0, 0, 0, 0}, 8484 {0x03, 0, 0, 0, 0}, 8485 {0x04, 0, 0, 0, 0}, 8486 {0x05, 0, 0, 0, 0}, 8487 {0x06, 0, 0, 0, 0}, 8488 {0x07, 0, 0, 0, 0}, 8489 {0x08, 0, 0, 0, 0}, 8490 {0x09, 0x1, 0x1, 0, 0}, 8491 {0x0A, 0, 0, 0, 0}, 8492 {0x0B, 0, 0, 0, 0}, 8493 {0x0C, 0, 0, 0, 0}, 8494 {0x0D, 0, 0, 0, 0}, 8495 {0x0E, 0, 0, 0, 0}, 8496 {0x0F, 0, 0, 0, 0}, 8497 {0x10, 0, 0, 0, 0}, 8498 {0x11, 0, 0, 0, 0}, 8499 {0x12, 0, 0, 0, 0}, 8500 {0x13, 0, 0, 0, 0}, 8501 {0x14, 0, 0, 0, 0}, 8502 {0x15, 0, 0, 0, 0}, 8503 {0x16, 0, 0, 0, 0}, 8504 {0x17, 0, 0, 0, 0}, 8505 {0x18, 0, 0, 0, 0}, 8506 {0x19, 0, 0, 0, 0}, 8507 {0x1A, 0, 0, 0, 0}, 8508 {0x1B, 0, 0, 0, 0}, 8509 {0x1C, 0, 0, 0, 0}, 8510 {0x1D, 0, 0, 0, 0}, 8511 {0x1E, 0, 0, 0, 0}, 8512 {0x1F, 0, 0, 0, 0}, 8513 {0x20, 0, 0, 0, 0}, 8514 {0x21, 0, 0, 0, 0}, 8515 {0x22, 0x60, 0x60, 0, 0}, 8516 {0x23, 0x6, 0x6, 0, 0}, 8517 {0x24, 0xc, 0xc, 0, 0}, 8518 {0x25, 0, 0, 0, 0}, 8519 {0x26, 0, 0, 0, 0}, 8520 {0x27, 0, 0, 0, 0}, 8521 {0x28, 0x1, 0x1, 0, 0}, 8522 {0x29, 0, 0, 0, 0}, 8523 {0x2A, 0, 0, 0, 0}, 8524 {0x2B, 0, 0, 0, 0}, 8525 {0x2C, 0, 0, 0, 0}, 8526 {0x2D, 0, 0, 0, 0}, 8527 {0x2E, 0xd, 0xd, 0, 0}, 8528 {0x2F, 0x1f, 0x1f, 0, 0}, 8529 {0x30, 0x15, 0x15, 0, 0}, 8530 {0x31, 0xf, 0xf, 0, 0}, 8531 {0x32, 0, 0, 0, 0}, 8532 {0x33, 0, 0, 0, 0}, 8533 {0x34, 0, 0, 0, 0}, 8534 {0x35, 0, 0, 0, 0}, 8535 {0x36, 0, 0, 0, 0}, 8536 {0x37, 0, 0, 0, 0}, 8537 {0x38, 0, 0, 0, 0}, 8538 {0x39, 0, 0, 0, 0}, 8539 {0x3A, 0, 0, 0, 0}, 8540 {0x3B, 0, 0, 0, 0}, 8541 {0x3C, 0x13, 0x13, 0, 0}, 8542 {0x3D, 0xf, 0xf, 0, 0}, 8543 {0x3E, 0x18, 0x18, 0, 0}, 8544 {0x3F, 0, 0, 0, 0}, 8545 {0x40, 0, 0, 0, 0}, 8546 {0x41, 0x20, 0x20, 0, 0}, 8547 {0x42, 0x20, 0x20, 0, 0}, 8548 {0x43, 0, 0, 0, 0}, 8549 {0x44, 0x77, 0x77, 0, 0}, 8550 {0x45, 0x7, 0x7, 0, 0}, 8551 {0x46, 0x1, 0x1, 0, 0}, 8552 {0x47, 0x4, 0x4, 0, 0}, 8553 {0x48, 0xf, 0xf, 0, 0}, 8554 {0x49, 0x30, 0x30, 0, 0}, 8555 {0x4A, 0x32, 0x32, 0, 0}, 8556 {0x4B, 0xd, 0xd, 0, 0}, 8557 {0x4C, 0xd, 0xd, 0, 0}, 8558 {0x4D, 0x4, 0x4, 0, 0}, 8559 {0x4E, 0x6, 0x6, 0, 0}, 8560 {0x4F, 0x1, 0x1, 0, 0}, 8561 {0x50, 0x1c, 0x1c, 0, 0}, 8562 {0x51, 0x2, 0x2, 0, 0}, 8563 {0x52, 0x2, 0x2, 0, 0}, 8564 {0x53, 0xf7, 0xf7, 1, 1}, 8565 {0x54, 0xb4, 0xb4, 0, 0}, 8566 {0x55, 0xd2, 0xd2, 0, 0}, 8567 {0x56, 0, 0, 0, 0}, 8568 {0x57, 0, 0, 0, 0}, 8569 {0x58, 0x4, 0x4, 0, 0}, 8570 {0x59, 0x96, 0x96, 0, 0}, 8571 {0x5A, 0x3e, 0x3e, 0, 0}, 8572 {0x5B, 0x3e, 0x3e, 0, 0}, 8573 {0x5C, 0x13, 0x13, 0, 0}, 8574 {0x5D, 0x2, 0x2, 0, 0}, 8575 {0x5E, 0, 0, 0, 0}, 8576 {0x5F, 0x7, 0x7, 0, 0}, 8577 {0x60, 0x7, 0x7, 1, 1}, 8578 {0x61, 0x8, 0x8, 0, 0}, 8579 {0x62, 0x3, 0x3, 0, 0}, 8580 {0x63, 0, 0, 0, 0}, 8581 {0x64, 0, 0, 0, 0}, 8582 {0x65, 0, 0, 0, 0}, 8583 {0x66, 0, 0, 0, 0}, 8584 {0x67, 0, 0, 0, 0}, 8585 {0x68, 0x40, 0x40, 0, 0}, 8586 {0x69, 0, 0, 0, 0}, 8587 {0x6A, 0, 0, 0, 0}, 8588 {0x6B, 0, 0, 0, 0}, 8589 {0x6C, 0, 0, 0, 0}, 8590 {0x6D, 0x1, 0x1, 0, 0}, 8591 {0x6E, 0, 0, 0, 0}, 8592 {0x6F, 0, 0, 0, 0}, 8593 {0x70, 0x60, 0x60, 0, 0}, 8594 {0x71, 0x66, 0x66, 0, 0}, 8595 {0x72, 0xc, 0xc, 0, 0}, 8596 {0x73, 0x66, 0x66, 0, 0}, 8597 {0x74, 0x8f, 0x8f, 1, 1}, 8598 {0x75, 0, 0, 0, 0}, 8599 {0x76, 0xcc, 0xcc, 0, 0}, 8600 {0x77, 0x1, 0x1, 0, 0}, 8601 {0x78, 0x66, 0x66, 0, 0}, 8602 {0x79, 0x66, 0x66, 0, 0}, 8603 {0x7A, 0, 0, 0, 0}, 8604 {0x7B, 0, 0, 0, 0}, 8605 {0x7C, 0, 0, 0, 0}, 8606 {0x7D, 0, 0, 0, 0}, 8607 {0x7E, 0, 0, 0, 0}, 8608 {0x7F, 0, 0, 0, 0}, 8609 {0x80, 0, 0, 0, 0}, 8610 {0x81, 0, 0, 0, 0}, 8611 {0x82, 0, 0, 0, 0}, 8612 {0x83, 0, 0, 0, 0}, 8613 {0x84, 0, 0, 0, 0}, 8614 {0x85, 0xff, 0xff, 0, 0}, 8615 {0x86, 0, 0, 0, 0}, 8616 {0x87, 0, 0, 0, 0}, 8617 {0x88, 0, 0, 0, 0}, 8618 {0x89, 0, 0, 0, 0}, 8619 {0x8A, 0, 0, 0, 0}, 8620 {0x8B, 0, 0, 0, 0}, 8621 {0x8C, 0, 0, 0, 0}, 8622 {0x8D, 0, 0, 0, 0}, 8623 {0x8E, 0, 0, 0, 0}, 8624 {0x8F, 0, 0, 0, 0}, 8625 {0x90, 0, 0, 0, 0}, 8626 {0x91, 0, 0, 0, 0}, 8627 {0x92, 0, 0, 0, 0}, 8628 {0x93, 0, 0, 0, 0}, 8629 {0x94, 0, 0, 0, 0}, 8630 {0x95, 0, 0, 0, 0}, 8631 {0x96, 0, 0, 0, 0}, 8632 {0x97, 0, 0, 0, 0}, 8633 {0x98, 0, 0, 0, 0}, 8634 {0x99, 0, 0, 0, 0}, 8635 {0x9A, 0, 0, 0, 0}, 8636 {0x9B, 0, 0, 0, 0}, 8637 {0x9C, 0, 0, 0, 0}, 8638 {0x9D, 0, 0, 0, 0}, 8639 {0x9E, 0, 0, 0, 0}, 8640 {0x9F, 0x6, 0x6, 0, 0}, 8641 {0xA0, 0x66, 0x66, 0, 0}, 8642 {0xA1, 0x66, 0x66, 0, 0}, 8643 {0xA2, 0x66, 0x66, 0, 0}, 8644 {0xA3, 0x66, 0x66, 0, 0}, 8645 {0xA4, 0x66, 0x66, 0, 0}, 8646 {0xA5, 0x66, 0x66, 0, 0}, 8647 {0xA6, 0x66, 0x66, 0, 0}, 8648 {0xA7, 0x66, 0x66, 0, 0}, 8649 {0xA8, 0x66, 0x66, 0, 0}, 8650 {0xA9, 0x66, 0x66, 0, 0}, 8651 {0xAA, 0x66, 0x66, 0, 0}, 8652 {0xAB, 0x66, 0x66, 0, 0}, 8653 {0xAC, 0x66, 0x66, 0, 0}, 8654 {0xAD, 0x66, 0x66, 0, 0}, 8655 {0xAE, 0x66, 0x66, 0, 0}, 8656 {0xAF, 0x66, 0x66, 0, 0}, 8657 {0xB0, 0x66, 0x66, 0, 0}, 8658 {0xB1, 0x66, 0x66, 0, 0}, 8659 {0xB2, 0x66, 0x66, 0, 0}, 8660 {0xB3, 0xa, 0xa, 0, 0}, 8661 {0xB4, 0, 0, 0, 0}, 8662 {0xB5, 0, 0, 0, 0}, 8663 {0xB6, 0, 0, 0, 0}, 8664 {0xFFFF, 0, 0, 0, 0} 8665 }; 8666 8667 static struct radio_regs regs_TX_2056_A1[] = { 8668 {0x02, 0, 0, 0, 0}, 8669 {0x03, 0, 0, 0, 0}, 8670 {0x04, 0, 0, 0, 0}, 8671 {0x05, 0, 0, 0, 0}, 8672 {0x06, 0, 0, 0, 0}, 8673 {0x07, 0, 0, 0, 0}, 8674 {0x08, 0, 0, 0, 0}, 8675 {0x09, 0, 0, 0, 0}, 8676 {0x0A, 0, 0, 0, 0}, 8677 {0x0B, 0, 0, 0, 0}, 8678 {0x0C, 0, 0, 0, 0}, 8679 {0x0D, 0, 0, 0, 0}, 8680 {0x0E, 0, 0, 0, 0}, 8681 {0x0F, 0, 0, 0, 0}, 8682 {0x10, 0, 0, 0, 0}, 8683 {0x11, 0, 0, 0, 0}, 8684 {0x12, 0, 0, 0, 0}, 8685 {0x13, 0, 0, 0, 0}, 8686 {0x14, 0, 0, 0, 0}, 8687 {0x15, 0, 0, 0, 0}, 8688 {0x16, 0, 0, 0, 0}, 8689 {0x17, 0, 0, 0, 0}, 8690 {0x18, 0, 0, 0, 0}, 8691 {0x19, 0, 0, 0, 0}, 8692 {0x1A, 0, 0, 0, 0}, 8693 {0x1B, 0, 0, 0, 0}, 8694 {0x1C, 0, 0, 0, 0}, 8695 {0x1D, 0, 0, 0, 0}, 8696 {0x1E, 0, 0, 0, 0}, 8697 {0x1F, 0, 0, 0, 0}, 8698 {0x20, 0, 0, 0, 0}, 8699 {0x21, 0x88, 0x88, 0, 0}, 8700 {0x22, 0x88, 0x88, 0, 0}, 8701 {0x23, 0x88, 0x88, 0, 0}, 8702 {0x24, 0x88, 0x88, 0, 0}, 8703 {0x25, 0xc, 0xc, 0, 0}, 8704 {0x26, 0, 0, 0, 0}, 8705 {0x27, 0x3, 0x3, 0, 0}, 8706 {0x28, 0, 0, 0, 0}, 8707 {0x29, 0x3, 0x3, 0, 0}, 8708 {0x2A, 0x37, 0x37, 0, 0}, 8709 {0x2B, 0x3, 0x3, 0, 0}, 8710 {0x2C, 0, 0, 0, 0}, 8711 {0x2D, 0, 0, 0, 0}, 8712 {0x2E, 0x1, 0x1, 0, 0}, 8713 {0x2F, 0x1, 0x1, 0, 0}, 8714 {0x30, 0, 0, 0, 0}, 8715 {0x31, 0, 0, 0, 0}, 8716 {0x32, 0, 0, 0, 0}, 8717 {0x33, 0x11, 0x11, 0, 0}, 8718 {0x34, 0x11, 0x11, 0, 0}, 8719 {0x35, 0, 0, 0, 0}, 8720 {0x36, 0, 0, 0, 0}, 8721 {0x37, 0x3, 0x3, 0, 0}, 8722 {0x38, 0xf, 0xf, 0, 0}, 8723 {0x39, 0, 0, 0, 0}, 8724 {0x3A, 0x2d, 0x2d, 0, 0}, 8725 {0x3B, 0, 0, 0, 0}, 8726 {0x3C, 0x6e, 0x6e, 0, 0}, 8727 {0x3D, 0xf0, 0xf0, 1, 1}, 8728 {0x3E, 0, 0, 0, 0}, 8729 {0x3F, 0, 0, 0, 0}, 8730 {0x40, 0, 0, 0, 0}, 8731 {0x41, 0x3, 0x3, 0, 0}, 8732 {0x42, 0x3, 0x3, 0, 0}, 8733 {0x43, 0, 0, 0, 0}, 8734 {0x44, 0x1e, 0x1e, 0, 0}, 8735 {0x45, 0, 0, 0, 0}, 8736 {0x46, 0x6e, 0x6e, 0, 0}, 8737 {0x47, 0xf0, 0xf0, 1, 1}, 8738 {0x48, 0, 0, 0, 0}, 8739 {0x49, 0x2, 0x2, 0, 0}, 8740 {0x4A, 0xff, 0xff, 1, 1}, 8741 {0x4B, 0xc, 0xc, 0, 0}, 8742 {0x4C, 0, 0, 0, 0}, 8743 {0x4D, 0x38, 0x38, 0, 0}, 8744 {0x4E, 0x70, 0x70, 1, 1}, 8745 {0x4F, 0x2, 0x2, 0, 0}, 8746 {0x50, 0x88, 0x88, 0, 0}, 8747 {0x51, 0xc, 0xc, 0, 0}, 8748 {0x52, 0, 0, 0, 0}, 8749 {0x53, 0x8, 0x8, 0, 0}, 8750 {0x54, 0x70, 0x70, 1, 1}, 8751 {0x55, 0x2, 0x2, 0, 0}, 8752 {0x56, 0xff, 0xff, 1, 1}, 8753 {0x57, 0, 0, 0, 0}, 8754 {0x58, 0x83, 0x83, 0, 0}, 8755 {0x59, 0x77, 0x77, 1, 1}, 8756 {0x5A, 0, 0, 0, 0}, 8757 {0x5B, 0x2, 0x2, 0, 0}, 8758 {0x5C, 0x88, 0x88, 0, 0}, 8759 {0x5D, 0, 0, 0, 0}, 8760 {0x5E, 0x8, 0x8, 0, 0}, 8761 {0x5F, 0x77, 0x77, 1, 1}, 8762 {0x60, 0x1, 0x1, 0, 0}, 8763 {0x61, 0, 0, 0, 0}, 8764 {0x62, 0x7, 0x7, 0, 0}, 8765 {0x63, 0, 0, 0, 0}, 8766 {0x64, 0x7, 0x7, 0, 0}, 8767 {0x65, 0, 0, 0, 0}, 8768 {0x66, 0, 0, 0, 0}, 8769 {0x67, 0x72, 0x72, 1, 1}, 8770 {0x68, 0, 0, 0, 0}, 8771 {0x69, 0xa, 0xa, 0, 0}, 8772 {0x6A, 0, 0, 0, 0}, 8773 {0x6B, 0, 0, 0, 0}, 8774 {0x6C, 0, 0, 0, 0}, 8775 {0x6D, 0, 0, 0, 0}, 8776 {0x6E, 0, 0, 0, 0}, 8777 {0x6F, 0, 0, 0, 0}, 8778 {0x70, 0, 0, 0, 0}, 8779 {0x71, 0x2, 0x2, 0, 0}, 8780 {0x72, 0, 0, 0, 0}, 8781 {0x73, 0, 0, 0, 0}, 8782 {0x74, 0xe, 0xe, 0, 0}, 8783 {0x75, 0xe, 0xe, 0, 0}, 8784 {0x76, 0xe, 0xe, 0, 0}, 8785 {0x77, 0x13, 0x13, 0, 0}, 8786 {0x78, 0x13, 0x13, 0, 0}, 8787 {0x79, 0x1b, 0x1b, 0, 0}, 8788 {0x7A, 0x1b, 0x1b, 0, 0}, 8789 {0x7B, 0x55, 0x55, 0, 0}, 8790 {0x7C, 0x5b, 0x5b, 0, 0}, 8791 {0x7D, 0, 0, 0, 0}, 8792 {0x7E, 0, 0, 0, 0}, 8793 {0x7F, 0, 0, 0, 0}, 8794 {0x80, 0, 0, 0, 0}, 8795 {0x81, 0, 0, 0, 0}, 8796 {0x82, 0, 0, 0, 0}, 8797 {0x83, 0, 0, 0, 0}, 8798 {0x84, 0, 0, 0, 0}, 8799 {0x85, 0, 0, 0, 0}, 8800 {0x86, 0, 0, 0, 0}, 8801 {0x87, 0, 0, 0, 0}, 8802 {0x88, 0, 0, 0, 0}, 8803 {0x89, 0, 0, 0, 0}, 8804 {0x8A, 0, 0, 0, 0}, 8805 {0x8B, 0, 0, 0, 0}, 8806 {0x8C, 0, 0, 0, 0}, 8807 {0x8D, 0, 0, 0, 0}, 8808 {0x8E, 0, 0, 0, 0}, 8809 {0x8F, 0, 0, 0, 0}, 8810 {0x90, 0, 0, 0, 0}, 8811 {0x91, 0, 0, 0, 0}, 8812 {0x92, 0, 0, 0, 0}, 8813 {0xFFFF, 0, 0, 0, 0} 8814 }; 8815 8816 static struct radio_regs regs_RX_2056_A1[] = { 8817 {0x02, 0, 0, 0, 0}, 8818 {0x03, 0, 0, 0, 0}, 8819 {0x04, 0, 0, 0, 0}, 8820 {0x05, 0, 0, 0, 0}, 8821 {0x06, 0, 0, 0, 0}, 8822 {0x07, 0, 0, 0, 0}, 8823 {0x08, 0, 0, 0, 0}, 8824 {0x09, 0, 0, 0, 0}, 8825 {0x0A, 0, 0, 0, 0}, 8826 {0x0B, 0, 0, 0, 0}, 8827 {0x0C, 0, 0, 0, 0}, 8828 {0x0D, 0, 0, 0, 0}, 8829 {0x0E, 0, 0, 0, 0}, 8830 {0x0F, 0, 0, 0, 0}, 8831 {0x10, 0, 0, 0, 0}, 8832 {0x11, 0, 0, 0, 0}, 8833 {0x12, 0, 0, 0, 0}, 8834 {0x13, 0, 0, 0, 0}, 8835 {0x14, 0, 0, 0, 0}, 8836 {0x15, 0, 0, 0, 0}, 8837 {0x16, 0, 0, 0, 0}, 8838 {0x17, 0, 0, 0, 0}, 8839 {0x18, 0, 0, 0, 0}, 8840 {0x19, 0, 0, 0, 0}, 8841 {0x1A, 0, 0, 0, 0}, 8842 {0x1B, 0, 0, 0, 0}, 8843 {0x1C, 0, 0, 0, 0}, 8844 {0x1D, 0, 0, 0, 0}, 8845 {0x1E, 0, 0, 0, 0}, 8846 {0x1F, 0, 0, 0, 0}, 8847 {0x20, 0x3, 0x3, 0, 0}, 8848 {0x21, 0, 0, 0, 0}, 8849 {0x22, 0, 0, 0, 0}, 8850 {0x23, 0x90, 0x90, 0, 0}, 8851 {0x24, 0x55, 0x55, 0, 0}, 8852 {0x25, 0x15, 0x15, 0, 0}, 8853 {0x26, 0x5, 0x5, 0, 0}, 8854 {0x27, 0x15, 0x15, 0, 0}, 8855 {0x28, 0x5, 0x5, 0, 0}, 8856 {0x29, 0x20, 0x20, 0, 0}, 8857 {0x2A, 0x11, 0x11, 0, 0}, 8858 {0x2B, 0x90, 0x90, 0, 0}, 8859 {0x2C, 0, 0, 0, 0}, 8860 {0x2D, 0x88, 0x88, 0, 0}, 8861 {0x2E, 0x32, 0x32, 0, 0}, 8862 {0x2F, 0x77, 0x77, 0, 0}, 8863 {0x30, 0x17, 0x17, 1, 1}, 8864 {0x31, 0xff, 0xff, 1, 1}, 8865 {0x32, 0x20, 0x20, 0, 0}, 8866 {0x33, 0, 0, 0, 0}, 8867 {0x34, 0x88, 0x88, 0, 0}, 8868 {0x35, 0x32, 0x32, 0, 0}, 8869 {0x36, 0x77, 0x77, 0, 0}, 8870 {0x37, 0x17, 0x17, 1, 1}, 8871 {0x38, 0xf0, 0xf0, 1, 1}, 8872 {0x39, 0x20, 0x20, 0, 0}, 8873 {0x3A, 0x8, 0x8, 0, 0}, 8874 {0x3B, 0x55, 0x55, 1, 1}, 8875 {0x3C, 0, 0, 0, 0}, 8876 {0x3D, 0x44, 0x44, 1, 1}, 8877 {0x3E, 0, 0, 0, 0}, 8878 {0x3F, 0x44, 0x44, 0, 0}, 8879 {0x40, 0xf, 0xf, 1, 1}, 8880 {0x41, 0x6, 0x6, 0, 0}, 8881 {0x42, 0x4, 0x4, 0, 0}, 8882 {0x43, 0x50, 0x50, 1, 1}, 8883 {0x44, 0x8, 0x8, 0, 0}, 8884 {0x45, 0x55, 0x55, 1, 1}, 8885 {0x46, 0, 0, 0, 0}, 8886 {0x47, 0x11, 0x11, 0, 0}, 8887 {0x48, 0, 0, 0, 0}, 8888 {0x49, 0x44, 0x44, 0, 0}, 8889 {0x4A, 0x7, 0x7, 0, 0}, 8890 {0x4B, 0x6, 0x6, 0, 0}, 8891 {0x4C, 0x4, 0x4, 0, 0}, 8892 {0x4D, 0, 0, 0, 0}, 8893 {0x4E, 0, 0, 0, 0}, 8894 {0x4F, 0x26, 0x26, 1, 1}, 8895 {0x50, 0x26, 0x26, 1, 1}, 8896 {0x51, 0xf, 0xf, 1, 1}, 8897 {0x52, 0xf, 0xf, 1, 1}, 8898 {0x53, 0x44, 0x44, 0, 0}, 8899 {0x54, 0, 0, 0, 0}, 8900 {0x55, 0, 0, 0, 0}, 8901 {0x56, 0x8, 0x8, 0, 0}, 8902 {0x57, 0x8, 0x8, 0, 0}, 8903 {0x58, 0x7, 0x7, 0, 0}, 8904 {0x59, 0x22, 0x22, 0, 0}, 8905 {0x5A, 0x22, 0x22, 0, 0}, 8906 {0x5B, 0x2, 0x2, 0, 0}, 8907 {0x5C, 0x2f, 0x2f, 1, 1}, 8908 {0x5D, 0x7, 0x7, 0, 0}, 8909 {0x5E, 0x55, 0x55, 0, 0}, 8910 {0x5F, 0x23, 0x23, 0, 0}, 8911 {0x60, 0x41, 0x41, 0, 0}, 8912 {0x61, 0x1, 0x1, 0, 0}, 8913 {0x62, 0xa, 0xa, 0, 0}, 8914 {0x63, 0, 0, 0, 0}, 8915 {0x64, 0, 0, 0, 0}, 8916 {0x65, 0, 0, 0, 0}, 8917 {0x66, 0, 0, 0, 0}, 8918 {0x67, 0, 0, 0, 0}, 8919 {0x68, 0, 0, 0, 0}, 8920 {0x69, 0, 0, 0, 0}, 8921 {0x6A, 0, 0, 0, 0}, 8922 {0x6B, 0xc, 0xc, 0, 0}, 8923 {0x6C, 0, 0, 0, 0}, 8924 {0x6D, 0, 0, 0, 0}, 8925 {0x6E, 0, 0, 0, 0}, 8926 {0x6F, 0, 0, 0, 0}, 8927 {0x70, 0, 0, 0, 0}, 8928 {0x71, 0, 0, 0, 0}, 8929 {0x72, 0x22, 0x22, 0, 0}, 8930 {0x73, 0x22, 0x22, 0, 0}, 8931 {0x74, 0, 0, 1, 1}, 8932 {0x75, 0xa, 0xa, 0, 0}, 8933 {0x76, 0x1, 0x1, 0, 0}, 8934 {0x77, 0x22, 0x22, 0, 0}, 8935 {0x78, 0x30, 0x30, 0, 0}, 8936 {0x79, 0, 0, 0, 0}, 8937 {0x7A, 0, 0, 0, 0}, 8938 {0x7B, 0, 0, 0, 0}, 8939 {0x7C, 0, 0, 0, 0}, 8940 {0x7D, 0, 0, 0, 0}, 8941 {0x7E, 0, 0, 0, 0}, 8942 {0x7F, 0, 0, 0, 0}, 8943 {0x80, 0, 0, 0, 0}, 8944 {0x81, 0, 0, 0, 0}, 8945 {0x82, 0, 0, 0, 0}, 8946 {0x83, 0, 0, 0, 0}, 8947 {0x84, 0, 0, 0, 0}, 8948 {0x85, 0, 0, 0, 0}, 8949 {0x86, 0, 0, 0, 0}, 8950 {0x87, 0, 0, 0, 0}, 8951 {0x88, 0, 0, 0, 0}, 8952 {0x89, 0, 0, 0, 0}, 8953 {0x8A, 0, 0, 0, 0}, 8954 {0x8B, 0, 0, 0, 0}, 8955 {0x8C, 0, 0, 0, 0}, 8956 {0x8D, 0, 0, 0, 0}, 8957 {0x8E, 0, 0, 0, 0}, 8958 {0x8F, 0, 0, 0, 0}, 8959 {0x90, 0, 0, 0, 0}, 8960 {0x91, 0, 0, 0, 0}, 8961 {0x92, 0, 0, 0, 0}, 8962 {0x93, 0, 0, 0, 0}, 8963 {0x94, 0, 0, 0, 0}, 8964 {0xFFFF, 0, 0, 0, 0} 8965 }; 8966 8967 static struct radio_regs regs_SYN_2056_rev5[] = { 8968 {0x02, 0, 0, 0, 0}, 8969 {0x03, 0, 0, 0, 0}, 8970 {0x04, 0, 0, 0, 0}, 8971 {0x05, 0, 0, 0, 0}, 8972 {0x06, 0, 0, 0, 0}, 8973 {0x07, 0, 0, 0, 0}, 8974 {0x08, 0, 0, 0, 0}, 8975 {0x09, 0x1, 0x1, 0, 0}, 8976 {0x0A, 0, 0, 0, 0}, 8977 {0x0B, 0, 0, 0, 0}, 8978 {0x0C, 0, 0, 0, 0}, 8979 {0x0D, 0, 0, 0, 0}, 8980 {0x0E, 0, 0, 0, 0}, 8981 {0x0F, 0, 0, 0, 0}, 8982 {0x10, 0, 0, 0, 0}, 8983 {0x11, 0, 0, 0, 0}, 8984 {0x12, 0, 0, 0, 0}, 8985 {0x13, 0, 0, 0, 0}, 8986 {0x14, 0, 0, 0, 0}, 8987 {0x15, 0, 0, 0, 0}, 8988 {0x16, 0, 0, 0, 0}, 8989 {0x17, 0, 0, 0, 0}, 8990 {0x18, 0, 0, 0, 0}, 8991 {0x19, 0, 0, 0, 0}, 8992 {0x1A, 0, 0, 0, 0}, 8993 {0x1B, 0, 0, 0, 0}, 8994 {0x1C, 0, 0, 0, 0}, 8995 {0x1D, 0, 0, 0, 0}, 8996 {0x1E, 0, 0, 0, 0}, 8997 {0x1F, 0, 0, 0, 0}, 8998 {0x20, 0, 0, 0, 0}, 8999 {0x21, 0, 0, 0, 0}, 9000 {0x22, 0x60, 0x60, 0, 0}, 9001 {0x23, 0x6, 0x6, 0, 0}, 9002 {0x24, 0xc, 0xc, 0, 0}, 9003 {0x25, 0, 0, 0, 0}, 9004 {0x26, 0, 0, 0, 0}, 9005 {0x27, 0, 0, 0, 0}, 9006 {0x28, 0x1, 0x1, 0, 0}, 9007 {0x29, 0, 0, 0, 0}, 9008 {0x2A, 0, 0, 0, 0}, 9009 {0x2B, 0, 0, 0, 0}, 9010 {0x2C, 0, 0, 0, 0}, 9011 {0x2D, 0, 0, 0, 0}, 9012 {0x2E, 0, 0, 0, 0}, 9013 {0x2F, 0x1f, 0x1f, 0, 0}, 9014 {0x30, 0x15, 0x15, 0, 0}, 9015 {0x31, 0xf, 0xf, 0, 0}, 9016 {0x32, 0, 0, 0, 0}, 9017 {0x33, 0, 0, 0, 0}, 9018 {0x34, 0, 0, 0, 0}, 9019 {0x35, 0, 0, 0, 0}, 9020 {0x36, 0, 0, 0, 0}, 9021 {0x37, 0, 0, 0, 0}, 9022 {0x38, 0, 0, 0, 0}, 9023 {0x39, 0, 0, 0, 0}, 9024 {0x3A, 0, 0, 0, 0}, 9025 {0x3B, 0, 0, 0, 0}, 9026 {0x3C, 0x13, 0x13, 0, 0}, 9027 {0x3D, 0xf, 0xf, 0, 0}, 9028 {0x3E, 0x18, 0x18, 0, 0}, 9029 {0x3F, 0, 0, 0, 0}, 9030 {0x40, 0, 0, 0, 0}, 9031 {0x41, 0x20, 0x20, 0, 0}, 9032 {0x42, 0x20, 0x20, 0, 0}, 9033 {0x43, 0, 0, 0, 0}, 9034 {0x44, 0x77, 0x77, 0, 0}, 9035 {0x45, 0x7, 0x7, 0, 0}, 9036 {0x46, 0x1, 0x1, 0, 0}, 9037 {0x47, 0x4, 0x4, 0, 0}, 9038 {0x48, 0xf, 0xf, 0, 0}, 9039 {0x49, 0x30, 0x30, 0, 0}, 9040 {0x4A, 0x32, 0x32, 0, 0}, 9041 {0x4B, 0xd, 0xd, 0, 0}, 9042 {0x4C, 0xd, 0xd, 0, 0}, 9043 {0x4D, 0x4, 0x4, 0, 0}, 9044 {0x4E, 0x6, 0x6, 0, 0}, 9045 {0x4F, 0x1, 0x1, 0, 0}, 9046 {0x50, 0x1c, 0x1c, 0, 0}, 9047 {0x51, 0x2, 0x2, 0, 0}, 9048 {0x52, 0x2, 0x2, 0, 0}, 9049 {0x53, 0xf7, 0xf7, 1, 1}, 9050 {0x54, 0xb4, 0xb4, 0, 0}, 9051 {0x55, 0xd2, 0xd2, 0, 0}, 9052 {0x56, 0, 0, 0, 0}, 9053 {0x57, 0, 0, 0, 0}, 9054 {0x58, 0x4, 0x4, 0, 0}, 9055 {0x59, 0x96, 0x96, 0, 0}, 9056 {0x5A, 0x3e, 0x3e, 0, 0}, 9057 {0x5B, 0x3e, 0x3e, 0, 0}, 9058 {0x5C, 0x13, 0x13, 0, 0}, 9059 {0x5D, 0x2, 0x2, 0, 0}, 9060 {0x5E, 0, 0, 0, 0}, 9061 {0x5F, 0x7, 0x7, 0, 0}, 9062 {0x60, 0x7, 0x7, 1, 1}, 9063 {0x61, 0x8, 0x8, 0, 0}, 9064 {0x62, 0x3, 0x3, 0, 0}, 9065 {0x63, 0, 0, 0, 0}, 9066 {0x64, 0, 0, 0, 0}, 9067 {0x65, 0, 0, 0, 0}, 9068 {0x66, 0, 0, 0, 0}, 9069 {0x67, 0, 0, 0, 0}, 9070 {0x68, 0x40, 0x40, 0, 0}, 9071 {0x69, 0, 0, 0, 0}, 9072 {0x6A, 0, 0, 0, 0}, 9073 {0x6B, 0, 0, 0, 0}, 9074 {0x6C, 0, 0, 0, 0}, 9075 {0x6D, 0x1, 0x1, 0, 0}, 9076 {0x6E, 0, 0, 0, 0}, 9077 {0x6F, 0, 0, 0, 0}, 9078 {0x70, 0x60, 0x60, 0, 0}, 9079 {0x71, 0x66, 0x66, 0, 0}, 9080 {0x72, 0xc, 0xc, 0, 0}, 9081 {0x73, 0x66, 0x66, 0, 0}, 9082 {0x74, 0x8f, 0x8f, 1, 1}, 9083 {0x75, 0, 0, 0, 0}, 9084 {0x76, 0xcc, 0xcc, 0, 0}, 9085 {0x77, 0x1, 0x1, 0, 0}, 9086 {0x78, 0x66, 0x66, 0, 0}, 9087 {0x79, 0x66, 0x66, 0, 0}, 9088 {0x7A, 0, 0, 0, 0}, 9089 {0x7B, 0, 0, 0, 0}, 9090 {0x7C, 0, 0, 0, 0}, 9091 {0x7D, 0, 0, 0, 0}, 9092 {0x7E, 0, 0, 0, 0}, 9093 {0x7F, 0, 0, 0, 0}, 9094 {0x80, 0, 0, 0, 0}, 9095 {0x81, 0, 0, 0, 0}, 9096 {0x82, 0, 0, 0, 0}, 9097 {0x83, 0, 0, 0, 0}, 9098 {0x84, 0, 0, 0, 0}, 9099 {0x85, 0xff, 0xff, 0, 0}, 9100 {0x86, 0, 0, 0, 0}, 9101 {0x87, 0, 0, 0, 0}, 9102 {0x88, 0, 0, 0, 0}, 9103 {0x89, 0, 0, 0, 0}, 9104 {0x8A, 0, 0, 0, 0}, 9105 {0x8B, 0, 0, 0, 0}, 9106 {0x8C, 0, 0, 0, 0}, 9107 {0x8D, 0, 0, 0, 0}, 9108 {0x8E, 0, 0, 0, 0}, 9109 {0x8F, 0, 0, 0, 0}, 9110 {0x90, 0, 0, 0, 0}, 9111 {0x91, 0, 0, 0, 0}, 9112 {0x92, 0, 0, 0, 0}, 9113 {0x93, 0, 0, 0, 0}, 9114 {0x94, 0, 0, 0, 0}, 9115 {0x95, 0, 0, 0, 0}, 9116 {0x96, 0, 0, 0, 0}, 9117 {0x97, 0, 0, 0, 0}, 9118 {0x98, 0, 0, 0, 0}, 9119 {0x99, 0, 0, 0, 0}, 9120 {0x9A, 0, 0, 0, 0}, 9121 {0x9B, 0, 0, 0, 0}, 9122 {0x9C, 0, 0, 0, 0}, 9123 {0x9D, 0, 0, 0, 0}, 9124 {0x9E, 0, 0, 0, 0}, 9125 {0x9F, 0x6, 0x6, 0, 0}, 9126 {0xA0, 0x66, 0x66, 0, 0}, 9127 {0xA1, 0x66, 0x66, 0, 0}, 9128 {0xA2, 0x66, 0x66, 0, 0}, 9129 {0xA3, 0x66, 0x66, 0, 0}, 9130 {0xA4, 0x66, 0x66, 0, 0}, 9131 {0xA5, 0x66, 0x66, 0, 0}, 9132 {0xA6, 0x66, 0x66, 0, 0}, 9133 {0xA7, 0x66, 0x66, 0, 0}, 9134 {0xA8, 0x66, 0x66, 0, 0}, 9135 {0xA9, 0x66, 0x66, 0, 0}, 9136 {0xAA, 0x66, 0x66, 0, 0}, 9137 {0xAB, 0x66, 0x66, 0, 0}, 9138 {0xAC, 0x66, 0x66, 0, 0}, 9139 {0xAD, 0x66, 0x66, 0, 0}, 9140 {0xAE, 0x66, 0x66, 0, 0}, 9141 {0xAF, 0x66, 0x66, 0, 0}, 9142 {0xB0, 0x66, 0x66, 0, 0}, 9143 {0xB1, 0x66, 0x66, 0, 0}, 9144 {0xB2, 0x66, 0x66, 0, 0}, 9145 {0xB3, 0xa, 0xa, 0, 0}, 9146 {0xB4, 0, 0, 0, 0}, 9147 {0xB5, 0, 0, 0, 0}, 9148 {0xB6, 0, 0, 0, 0}, 9149 {0xFFFF, 0, 0, 0, 0} 9150 }; 9151 9152 static struct radio_regs regs_TX_2056_rev5[] = { 9153 {0x02, 0, 0, 0, 0}, 9154 {0x03, 0, 0, 0, 0}, 9155 {0x04, 0, 0, 0, 0}, 9156 {0x05, 0, 0, 0, 0}, 9157 {0x06, 0, 0, 0, 0}, 9158 {0x07, 0, 0, 0, 0}, 9159 {0x08, 0, 0, 0, 0}, 9160 {0x09, 0, 0, 0, 0}, 9161 {0x0A, 0, 0, 0, 0}, 9162 {0x0B, 0, 0, 0, 0}, 9163 {0x0C, 0, 0, 0, 0}, 9164 {0x0D, 0, 0, 0, 0}, 9165 {0x0E, 0, 0, 0, 0}, 9166 {0x0F, 0, 0, 0, 0}, 9167 {0x10, 0, 0, 0, 0}, 9168 {0x11, 0, 0, 0, 0}, 9169 {0x12, 0, 0, 0, 0}, 9170 {0x13, 0, 0, 0, 0}, 9171 {0x14, 0, 0, 0, 0}, 9172 {0x15, 0, 0, 0, 0}, 9173 {0x16, 0, 0, 0, 0}, 9174 {0x17, 0, 0, 0, 0}, 9175 {0x18, 0, 0, 0, 0}, 9176 {0x19, 0, 0, 0, 0}, 9177 {0x1A, 0, 0, 0, 0}, 9178 {0x1B, 0, 0, 0, 0}, 9179 {0x1C, 0, 0, 0, 0}, 9180 {0x1D, 0, 0, 0, 0}, 9181 {0x1E, 0, 0, 0, 0}, 9182 {0x1F, 0, 0, 0, 0}, 9183 {0x20, 0, 0, 0, 0}, 9184 {0x21, 0x88, 0x88, 0, 0}, 9185 {0x22, 0x88, 0x88, 0, 0}, 9186 {0x23, 0x88, 0x88, 0, 0}, 9187 {0x24, 0x88, 0x88, 0, 0}, 9188 {0x25, 0xc, 0xc, 0, 0}, 9189 {0x26, 0, 0, 0, 0}, 9190 {0x27, 0x3, 0x3, 0, 0}, 9191 {0x28, 0, 0, 0, 0}, 9192 {0x29, 0x3, 0x3, 0, 0}, 9193 {0x2A, 0x37, 0x37, 0, 0}, 9194 {0x2B, 0x3, 0x3, 0, 0}, 9195 {0x2C, 0, 0, 0, 0}, 9196 {0x2D, 0, 0, 0, 0}, 9197 {0x2E, 0x1, 0x1, 0, 0}, 9198 {0x2F, 0x1, 0x1, 0, 0}, 9199 {0x30, 0, 0, 0, 0}, 9200 {0x31, 0, 0, 0, 0}, 9201 {0x32, 0, 0, 0, 0}, 9202 {0x33, 0x11, 0x11, 0, 0}, 9203 {0x34, 0x11, 0x11, 0, 0}, 9204 {0x35, 0, 0, 0, 0}, 9205 {0x36, 0, 0, 0, 0}, 9206 {0x37, 0x3, 0x3, 0, 0}, 9207 {0x38, 0xf, 0xf, 0, 0}, 9208 {0x39, 0, 0, 0, 0}, 9209 {0x3A, 0x2d, 0x2d, 0, 0}, 9210 {0x3B, 0, 0, 0, 0}, 9211 {0x3C, 0x6e, 0x6e, 0, 0}, 9212 {0x3D, 0xf0, 0xf0, 1, 1}, 9213 {0x3E, 0, 0, 0, 0}, 9214 {0x3F, 0, 0, 0, 0}, 9215 {0x40, 0, 0, 0, 0}, 9216 {0x41, 0x3, 0x3, 0, 0}, 9217 {0x42, 0x3, 0x3, 0, 0}, 9218 {0x43, 0, 0, 0, 0}, 9219 {0x44, 0x1e, 0x1e, 0, 0}, 9220 {0x45, 0, 0, 0, 0}, 9221 {0x46, 0x6e, 0x6e, 0, 0}, 9222 {0x47, 0xf0, 0xf0, 1, 1}, 9223 {0x48, 0, 0, 0, 0}, 9224 {0x49, 0x2, 0x2, 0, 0}, 9225 {0x4A, 0xff, 0xff, 1, 1}, 9226 {0x4B, 0xc, 0xc, 0, 0}, 9227 {0x4C, 0, 0, 0, 0}, 9228 {0x4D, 0x38, 0x38, 0, 0}, 9229 {0x4E, 0x70, 0x70, 1, 1}, 9230 {0x4F, 0x2, 0x2, 0, 0}, 9231 {0x50, 0x88, 0x88, 0, 0}, 9232 {0x51, 0xc, 0xc, 0, 0}, 9233 {0x52, 0, 0, 0, 0}, 9234 {0x53, 0x8, 0x8, 0, 0}, 9235 {0x54, 0x70, 0x70, 1, 1}, 9236 {0x55, 0x2, 0x2, 0, 0}, 9237 {0x56, 0xff, 0xff, 1, 1}, 9238 {0x57, 0, 0, 0, 0}, 9239 {0x58, 0x83, 0x83, 0, 0}, 9240 {0x59, 0x77, 0x77, 1, 1}, 9241 {0x5A, 0, 0, 0, 0}, 9242 {0x5B, 0x2, 0x2, 0, 0}, 9243 {0x5C, 0x88, 0x88, 0, 0}, 9244 {0x5D, 0, 0, 0, 0}, 9245 {0x5E, 0x8, 0x8, 0, 0}, 9246 {0x5F, 0x77, 0x77, 1, 1}, 9247 {0x60, 0x1, 0x1, 0, 0}, 9248 {0x61, 0, 0, 0, 0}, 9249 {0x62, 0x7, 0x7, 0, 0}, 9250 {0x63, 0, 0, 0, 0}, 9251 {0x64, 0x7, 0x7, 0, 0}, 9252 {0x65, 0, 0, 0, 0}, 9253 {0x66, 0, 0, 0, 0}, 9254 {0x67, 0, 0, 1, 1}, 9255 {0x68, 0, 0, 0, 0}, 9256 {0x69, 0xa, 0xa, 0, 0}, 9257 {0x6A, 0, 0, 0, 0}, 9258 {0x6B, 0, 0, 0, 0}, 9259 {0x6C, 0, 0, 0, 0}, 9260 {0x6D, 0, 0, 0, 0}, 9261 {0x6E, 0, 0, 0, 0}, 9262 {0x6F, 0, 0, 0, 0}, 9263 {0x70, 0, 0, 0, 0}, 9264 {0x71, 0x2, 0x2, 0, 0}, 9265 {0x72, 0, 0, 0, 0}, 9266 {0x73, 0, 0, 0, 0}, 9267 {0x74, 0xe, 0xe, 0, 0}, 9268 {0x75, 0xe, 0xe, 0, 0}, 9269 {0x76, 0xe, 0xe, 0, 0}, 9270 {0x77, 0x13, 0x13, 0, 0}, 9271 {0x78, 0x13, 0x13, 0, 0}, 9272 {0x79, 0x1b, 0x1b, 0, 0}, 9273 {0x7A, 0x1b, 0x1b, 0, 0}, 9274 {0x7B, 0x55, 0x55, 0, 0}, 9275 {0x7C, 0x5b, 0x5b, 0, 0}, 9276 {0x7D, 0, 0, 0, 0}, 9277 {0x7E, 0, 0, 0, 0}, 9278 {0x7F, 0, 0, 0, 0}, 9279 {0x80, 0, 0, 0, 0}, 9280 {0x81, 0, 0, 0, 0}, 9281 {0x82, 0, 0, 0, 0}, 9282 {0x83, 0, 0, 0, 0}, 9283 {0x84, 0, 0, 0, 0}, 9284 {0x85, 0, 0, 0, 0}, 9285 {0x86, 0, 0, 0, 0}, 9286 {0x87, 0, 0, 0, 0}, 9287 {0x88, 0, 0, 0, 0}, 9288 {0x89, 0, 0, 0, 0}, 9289 {0x8A, 0, 0, 0, 0}, 9290 {0x8B, 0, 0, 0, 0}, 9291 {0x8C, 0, 0, 0, 0}, 9292 {0x8D, 0, 0, 0, 0}, 9293 {0x8E, 0, 0, 0, 0}, 9294 {0x8F, 0, 0, 0, 0}, 9295 {0x90, 0, 0, 0, 0}, 9296 {0x91, 0, 0, 0, 0}, 9297 {0x92, 0, 0, 0, 0}, 9298 {0x93, 0x70, 0x70, 0, 0}, 9299 {0x94, 0x70, 0x70, 0, 0}, 9300 {0x95, 0x71, 0x71, 1, 1}, 9301 {0x96, 0x71, 0x71, 1, 1}, 9302 {0x97, 0x72, 0x72, 1, 1}, 9303 {0x98, 0x73, 0x73, 1, 1}, 9304 {0x99, 0x74, 0x74, 1, 1}, 9305 {0x9A, 0x75, 0x75, 1, 1}, 9306 {0xFFFF, 0, 0, 0, 0} 9307 }; 9308 9309 static struct radio_regs regs_RX_2056_rev5[] = { 9310 {0x02, 0, 0, 0, 0}, 9311 {0x03, 0, 0, 0, 0}, 9312 {0x04, 0, 0, 0, 0}, 9313 {0x05, 0, 0, 0, 0}, 9314 {0x06, 0, 0, 0, 0}, 9315 {0x07, 0, 0, 0, 0}, 9316 {0x08, 0, 0, 0, 0}, 9317 {0x09, 0, 0, 0, 0}, 9318 {0x0A, 0, 0, 0, 0}, 9319 {0x0B, 0, 0, 0, 0}, 9320 {0x0C, 0, 0, 0, 0}, 9321 {0x0D, 0, 0, 0, 0}, 9322 {0x0E, 0, 0, 0, 0}, 9323 {0x0F, 0, 0, 0, 0}, 9324 {0x10, 0, 0, 0, 0}, 9325 {0x11, 0, 0, 0, 0}, 9326 {0x12, 0, 0, 0, 0}, 9327 {0x13, 0, 0, 0, 0}, 9328 {0x14, 0, 0, 0, 0}, 9329 {0x15, 0, 0, 0, 0}, 9330 {0x16, 0, 0, 0, 0}, 9331 {0x17, 0, 0, 0, 0}, 9332 {0x18, 0, 0, 0, 0}, 9333 {0x19, 0, 0, 0, 0}, 9334 {0x1A, 0, 0, 0, 0}, 9335 {0x1B, 0, 0, 0, 0}, 9336 {0x1C, 0, 0, 0, 0}, 9337 {0x1D, 0, 0, 0, 0}, 9338 {0x1E, 0, 0, 0, 0}, 9339 {0x1F, 0, 0, 0, 0}, 9340 {0x20, 0x3, 0x3, 0, 0}, 9341 {0x21, 0, 0, 0, 0}, 9342 {0x22, 0, 0, 0, 0}, 9343 {0x23, 0x90, 0x90, 0, 0}, 9344 {0x24, 0x55, 0x55, 0, 0}, 9345 {0x25, 0x15, 0x15, 0, 0}, 9346 {0x26, 0x5, 0x5, 0, 0}, 9347 {0x27, 0x15, 0x15, 0, 0}, 9348 {0x28, 0x5, 0x5, 0, 0}, 9349 {0x29, 0x20, 0x20, 0, 0}, 9350 {0x2A, 0x11, 0x11, 0, 0}, 9351 {0x2B, 0x90, 0x90, 0, 0}, 9352 {0x2C, 0, 0, 0, 0}, 9353 {0x2D, 0x88, 0x88, 0, 0}, 9354 {0x2E, 0x32, 0x32, 0, 0}, 9355 {0x2F, 0x77, 0x77, 0, 0}, 9356 {0x30, 0x17, 0x17, 1, 1}, 9357 {0x31, 0xff, 0xff, 1, 1}, 9358 {0x32, 0x20, 0x20, 0, 0}, 9359 {0x33, 0, 0, 0, 0}, 9360 {0x34, 0x88, 0x88, 0, 0}, 9361 {0x35, 0x32, 0x32, 0, 0}, 9362 {0x36, 0x77, 0x77, 0, 0}, 9363 {0x37, 0x17, 0x17, 1, 1}, 9364 {0x38, 0xf0, 0xf0, 1, 1}, 9365 {0x39, 0x20, 0x20, 0, 0}, 9366 {0x3A, 0x8, 0x8, 0, 0}, 9367 {0x3B, 0x55, 0x55, 1, 1}, 9368 {0x3C, 0, 0, 0, 0}, 9369 {0x3D, 0x88, 0x88, 1, 1}, 9370 {0x3E, 0, 0, 0, 0}, 9371 {0x3F, 0, 0, 1, 1}, 9372 {0x40, 0x7, 0x7, 1, 1}, 9373 {0x41, 0x6, 0x6, 0, 0}, 9374 {0x42, 0x4, 0x4, 0, 0}, 9375 {0x43, 0, 0, 0, 0}, 9376 {0x44, 0x8, 0x8, 0, 0}, 9377 {0x45, 0x55, 0x55, 1, 1}, 9378 {0x46, 0, 0, 0, 0}, 9379 {0x47, 0x11, 0x11, 0, 0}, 9380 {0x48, 0, 0, 0, 0}, 9381 {0x49, 0, 0, 1, 1}, 9382 {0x4A, 0x7, 0x7, 0, 0}, 9383 {0x4B, 0x6, 0x6, 0, 0}, 9384 {0x4C, 0x4, 0x4, 0, 0}, 9385 {0x4D, 0, 0, 0, 0}, 9386 {0x4E, 0, 0, 0, 0}, 9387 {0x4F, 0x26, 0x26, 1, 1}, 9388 {0x50, 0x26, 0x26, 1, 1}, 9389 {0x51, 0xf, 0xf, 1, 1}, 9390 {0x52, 0xf, 0xf, 1, 1}, 9391 {0x53, 0x44, 0x44, 0, 0}, 9392 {0x54, 0, 0, 0, 0}, 9393 {0x55, 0, 0, 0, 0}, 9394 {0x56, 0x8, 0x8, 0, 0}, 9395 {0x57, 0x8, 0x8, 0, 0}, 9396 {0x58, 0x7, 0x7, 0, 0}, 9397 {0x59, 0x22, 0x22, 0, 0}, 9398 {0x5A, 0x22, 0x22, 0, 0}, 9399 {0x5B, 0x2, 0x2, 0, 0}, 9400 {0x5C, 0x4, 0x4, 1, 1}, 9401 {0x5D, 0x7, 0x7, 0, 0}, 9402 {0x5E, 0x55, 0x55, 0, 0}, 9403 {0x5F, 0x23, 0x23, 0, 0}, 9404 {0x60, 0x41, 0x41, 0, 0}, 9405 {0x61, 0x1, 0x1, 0, 0}, 9406 {0x62, 0xa, 0xa, 0, 0}, 9407 {0x63, 0, 0, 0, 0}, 9408 {0x64, 0, 0, 0, 0}, 9409 {0x65, 0, 0, 0, 0}, 9410 {0x66, 0, 0, 0, 0}, 9411 {0x67, 0, 0, 0, 0}, 9412 {0x68, 0, 0, 0, 0}, 9413 {0x69, 0, 0, 0, 0}, 9414 {0x6A, 0, 0, 0, 0}, 9415 {0x6B, 0xc, 0xc, 0, 0}, 9416 {0x6C, 0, 0, 0, 0}, 9417 {0x6D, 0, 0, 0, 0}, 9418 {0x6E, 0, 0, 0, 0}, 9419 {0x6F, 0, 0, 0, 0}, 9420 {0x70, 0, 0, 0, 0}, 9421 {0x71, 0, 0, 0, 0}, 9422 {0x72, 0x22, 0x22, 0, 0}, 9423 {0x73, 0x22, 0x22, 0, 0}, 9424 {0x74, 0, 0, 1, 1}, 9425 {0x75, 0xa, 0xa, 0, 0}, 9426 {0x76, 0x1, 0x1, 0, 0}, 9427 {0x77, 0x22, 0x22, 0, 0}, 9428 {0x78, 0x30, 0x30, 0, 0}, 9429 {0x79, 0, 0, 0, 0}, 9430 {0x7A, 0, 0, 0, 0}, 9431 {0x7B, 0, 0, 0, 0}, 9432 {0x7C, 0, 0, 0, 0}, 9433 {0x7D, 0, 0, 0, 0}, 9434 {0x7E, 0, 0, 0, 0}, 9435 {0x7F, 0, 0, 0, 0}, 9436 {0x80, 0, 0, 0, 0}, 9437 {0x81, 0, 0, 0, 0}, 9438 {0x82, 0, 0, 0, 0}, 9439 {0x83, 0, 0, 0, 0}, 9440 {0x84, 0, 0, 0, 0}, 9441 {0x85, 0, 0, 0, 0}, 9442 {0x86, 0, 0, 0, 0}, 9443 {0x87, 0, 0, 0, 0}, 9444 {0x88, 0, 0, 0, 0}, 9445 {0x89, 0, 0, 0, 0}, 9446 {0x8A, 0, 0, 0, 0}, 9447 {0x8B, 0, 0, 0, 0}, 9448 {0x8C, 0, 0, 0, 0}, 9449 {0x8D, 0, 0, 0, 0}, 9450 {0x8E, 0, 0, 0, 0}, 9451 {0x8F, 0, 0, 0, 0}, 9452 {0x90, 0, 0, 0, 0}, 9453 {0x91, 0, 0, 0, 0}, 9454 {0x92, 0, 0, 0, 0}, 9455 {0x93, 0, 0, 0, 0}, 9456 {0x94, 0, 0, 0, 0}, 9457 {0xFFFF, 0, 0, 0, 0} 9458 }; 9459 9460 static struct radio_regs regs_SYN_2056_rev6[] = { 9461 {0x02, 0, 0, 0, 0}, 9462 {0x03, 0, 0, 0, 0}, 9463 {0x04, 0, 0, 0, 0}, 9464 {0x05, 0, 0, 0, 0}, 9465 {0x06, 0, 0, 0, 0}, 9466 {0x07, 0, 0, 0, 0}, 9467 {0x08, 0, 0, 0, 0}, 9468 {0x09, 0x1, 0x1, 0, 0}, 9469 {0x0A, 0, 0, 0, 0}, 9470 {0x0B, 0, 0, 0, 0}, 9471 {0x0C, 0, 0, 0, 0}, 9472 {0x0D, 0, 0, 0, 0}, 9473 {0x0E, 0, 0, 0, 0}, 9474 {0x0F, 0, 0, 0, 0}, 9475 {0x10, 0, 0, 0, 0}, 9476 {0x11, 0, 0, 0, 0}, 9477 {0x12, 0, 0, 0, 0}, 9478 {0x13, 0, 0, 0, 0}, 9479 {0x14, 0, 0, 0, 0}, 9480 {0x15, 0, 0, 0, 0}, 9481 {0x16, 0, 0, 0, 0}, 9482 {0x17, 0, 0, 0, 0}, 9483 {0x18, 0, 0, 0, 0}, 9484 {0x19, 0, 0, 0, 0}, 9485 {0x1A, 0, 0, 0, 0}, 9486 {0x1B, 0, 0, 0, 0}, 9487 {0x1C, 0, 0, 0, 0}, 9488 {0x1D, 0, 0, 0, 0}, 9489 {0x1E, 0, 0, 0, 0}, 9490 {0x1F, 0, 0, 0, 0}, 9491 {0x20, 0, 0, 0, 0}, 9492 {0x21, 0, 0, 0, 0}, 9493 {0x22, 0x60, 0x60, 0, 0}, 9494 {0x23, 0x6, 0x6, 0, 0}, 9495 {0x24, 0xc, 0xc, 0, 0}, 9496 {0x25, 0, 0, 0, 0}, 9497 {0x26, 0, 0, 0, 0}, 9498 {0x27, 0, 0, 0, 0}, 9499 {0x28, 0x1, 0x1, 0, 0}, 9500 {0x29, 0, 0, 0, 0}, 9501 {0x2A, 0, 0, 0, 0}, 9502 {0x2B, 0, 0, 0, 0}, 9503 {0x2C, 0, 0, 0, 0}, 9504 {0x2D, 0, 0, 0, 0}, 9505 {0x2E, 0, 0, 0, 0}, 9506 {0x2F, 0x1f, 0x1f, 0, 0}, 9507 {0x30, 0x15, 0x15, 0, 0}, 9508 {0x31, 0xf, 0xf, 0, 0}, 9509 {0x32, 0, 0, 0, 0}, 9510 {0x33, 0, 0, 0, 0}, 9511 {0x34, 0, 0, 0, 0}, 9512 {0x35, 0, 0, 0, 0}, 9513 {0x36, 0, 0, 0, 0}, 9514 {0x37, 0, 0, 0, 0}, 9515 {0x38, 0, 0, 0, 0}, 9516 {0x39, 0, 0, 0, 0}, 9517 {0x3A, 0, 0, 0, 0}, 9518 {0x3B, 0, 0, 0, 0}, 9519 {0x3C, 0x13, 0x13, 0, 0}, 9520 {0x3D, 0xf, 0xf, 0, 0}, 9521 {0x3E, 0x18, 0x18, 0, 0}, 9522 {0x3F, 0, 0, 0, 0}, 9523 {0x40, 0, 0, 0, 0}, 9524 {0x41, 0x20, 0x20, 0, 0}, 9525 {0x42, 0x20, 0x20, 0, 0}, 9526 {0x43, 0, 0, 0, 0}, 9527 {0x44, 0x77, 0x77, 0, 0}, 9528 {0x45, 0x7, 0x7, 0, 0}, 9529 {0x46, 0x1, 0x1, 0, 0}, 9530 {0x47, 0x4, 0x4, 0, 0}, 9531 {0x48, 0xf, 0xf, 0, 0}, 9532 {0x49, 0x30, 0x30, 0, 0}, 9533 {0x4A, 0x32, 0x32, 0, 0}, 9534 {0x4B, 0xd, 0xd, 0, 0}, 9535 {0x4C, 0xd, 0xd, 0, 0}, 9536 {0x4D, 0x4, 0x4, 0, 0}, 9537 {0x4E, 0x6, 0x6, 0, 0}, 9538 {0x4F, 0x1, 0x1, 0, 0}, 9539 {0x50, 0x1c, 0x1c, 0, 0}, 9540 {0x51, 0x2, 0x2, 0, 0}, 9541 {0x52, 0x2, 0x2, 0, 0}, 9542 {0x53, 0xf7, 0xf7, 1, 1}, 9543 {0x54, 0xb4, 0xb4, 0, 0}, 9544 {0x55, 0xd2, 0xd2, 0, 0}, 9545 {0x56, 0, 0, 0, 0}, 9546 {0x57, 0, 0, 0, 0}, 9547 {0x58, 0x4, 0x4, 0, 0}, 9548 {0x59, 0x96, 0x96, 0, 0}, 9549 {0x5A, 0x3e, 0x3e, 0, 0}, 9550 {0x5B, 0x3e, 0x3e, 0, 0}, 9551 {0x5C, 0x13, 0x13, 0, 0}, 9552 {0x5D, 0x2, 0x2, 0, 0}, 9553 {0x5E, 0, 0, 0, 0}, 9554 {0x5F, 0x7, 0x7, 0, 0}, 9555 {0x60, 0x7, 0x7, 1, 1}, 9556 {0x61, 0x8, 0x8, 0, 0}, 9557 {0x62, 0x3, 0x3, 0, 0}, 9558 {0x63, 0, 0, 0, 0}, 9559 {0x64, 0, 0, 0, 0}, 9560 {0x65, 0, 0, 0, 0}, 9561 {0x66, 0, 0, 0, 0}, 9562 {0x67, 0, 0, 0, 0}, 9563 {0x68, 0x40, 0x40, 0, 0}, 9564 {0x69, 0, 0, 0, 0}, 9565 {0x6A, 0, 0, 0, 0}, 9566 {0x6B, 0, 0, 0, 0}, 9567 {0x6C, 0, 0, 0, 0}, 9568 {0x6D, 0x1, 0x1, 0, 0}, 9569 {0x6E, 0, 0, 0, 0}, 9570 {0x6F, 0, 0, 0, 0}, 9571 {0x70, 0x60, 0x60, 0, 0}, 9572 {0x71, 0x66, 0x66, 0, 0}, 9573 {0x72, 0xc, 0xc, 0, 0}, 9574 {0x73, 0x66, 0x66, 0, 0}, 9575 {0x74, 0x8f, 0x8f, 1, 1}, 9576 {0x75, 0, 0, 0, 0}, 9577 {0x76, 0xcc, 0xcc, 0, 0}, 9578 {0x77, 0x1, 0x1, 0, 0}, 9579 {0x78, 0x66, 0x66, 0, 0}, 9580 {0x79, 0x66, 0x66, 0, 0}, 9581 {0x7A, 0, 0, 0, 0}, 9582 {0x7B, 0, 0, 0, 0}, 9583 {0x7C, 0, 0, 0, 0}, 9584 {0x7D, 0, 0, 0, 0}, 9585 {0x7E, 0, 0, 0, 0}, 9586 {0x7F, 0, 0, 0, 0}, 9587 {0x80, 0, 0, 0, 0}, 9588 {0x81, 0, 0, 0, 0}, 9589 {0x82, 0, 0, 0, 0}, 9590 {0x83, 0, 0, 0, 0}, 9591 {0x84, 0, 0, 0, 0}, 9592 {0x85, 0xff, 0xff, 0, 0}, 9593 {0x86, 0, 0, 0, 0}, 9594 {0x87, 0, 0, 0, 0}, 9595 {0x88, 0, 0, 0, 0}, 9596 {0x89, 0, 0, 0, 0}, 9597 {0x8A, 0, 0, 0, 0}, 9598 {0x8B, 0, 0, 0, 0}, 9599 {0x8C, 0, 0, 0, 0}, 9600 {0x8D, 0, 0, 0, 0}, 9601 {0x8E, 0, 0, 0, 0}, 9602 {0x8F, 0, 0, 0, 0}, 9603 {0x90, 0, 0, 0, 0}, 9604 {0x91, 0, 0, 0, 0}, 9605 {0x92, 0, 0, 0, 0}, 9606 {0x93, 0, 0, 0, 0}, 9607 {0x94, 0, 0, 0, 0}, 9608 {0x95, 0, 0, 0, 0}, 9609 {0x96, 0, 0, 0, 0}, 9610 {0x97, 0, 0, 0, 0}, 9611 {0x98, 0, 0, 0, 0}, 9612 {0x99, 0, 0, 0, 0}, 9613 {0x9A, 0, 0, 0, 0}, 9614 {0x9B, 0, 0, 0, 0}, 9615 {0x9C, 0, 0, 0, 0}, 9616 {0x9D, 0, 0, 0, 0}, 9617 {0x9E, 0, 0, 0, 0}, 9618 {0x9F, 0x6, 0x6, 0, 0}, 9619 {0xA0, 0x66, 0x66, 0, 0}, 9620 {0xA1, 0x66, 0x66, 0, 0}, 9621 {0xA2, 0x66, 0x66, 0, 0}, 9622 {0xA3, 0x66, 0x66, 0, 0}, 9623 {0xA4, 0x66, 0x66, 0, 0}, 9624 {0xA5, 0x66, 0x66, 0, 0}, 9625 {0xA6, 0x66, 0x66, 0, 0}, 9626 {0xA7, 0x66, 0x66, 0, 0}, 9627 {0xA8, 0x66, 0x66, 0, 0}, 9628 {0xA9, 0x66, 0x66, 0, 0}, 9629 {0xAA, 0x66, 0x66, 0, 0}, 9630 {0xAB, 0x66, 0x66, 0, 0}, 9631 {0xAC, 0x66, 0x66, 0, 0}, 9632 {0xAD, 0x66, 0x66, 0, 0}, 9633 {0xAE, 0x66, 0x66, 0, 0}, 9634 {0xAF, 0x66, 0x66, 0, 0}, 9635 {0xB0, 0x66, 0x66, 0, 0}, 9636 {0xB1, 0x66, 0x66, 0, 0}, 9637 {0xB2, 0x66, 0x66, 0, 0}, 9638 {0xB3, 0xa, 0xa, 0, 0}, 9639 {0xB4, 0, 0, 0, 0}, 9640 {0xB5, 0, 0, 0, 0}, 9641 {0xB6, 0, 0, 0, 0}, 9642 {0xFFFF, 0, 0, 0, 0} 9643 }; 9644 9645 static struct radio_regs regs_TX_2056_rev6[] = { 9646 {0x02, 0, 0, 0, 0}, 9647 {0x03, 0, 0, 0, 0}, 9648 {0x04, 0, 0, 0, 0}, 9649 {0x05, 0, 0, 0, 0}, 9650 {0x06, 0, 0, 0, 0}, 9651 {0x07, 0, 0, 0, 0}, 9652 {0x08, 0, 0, 0, 0}, 9653 {0x09, 0, 0, 0, 0}, 9654 {0x0A, 0, 0, 0, 0}, 9655 {0x0B, 0, 0, 0, 0}, 9656 {0x0C, 0, 0, 0, 0}, 9657 {0x0D, 0, 0, 0, 0}, 9658 {0x0E, 0, 0, 0, 0}, 9659 {0x0F, 0, 0, 0, 0}, 9660 {0x10, 0, 0, 0, 0}, 9661 {0x11, 0, 0, 0, 0}, 9662 {0x12, 0, 0, 0, 0}, 9663 {0x13, 0, 0, 0, 0}, 9664 {0x14, 0, 0, 0, 0}, 9665 {0x15, 0, 0, 0, 0}, 9666 {0x16, 0, 0, 0, 0}, 9667 {0x17, 0, 0, 0, 0}, 9668 {0x18, 0, 0, 0, 0}, 9669 {0x19, 0, 0, 0, 0}, 9670 {0x1A, 0, 0, 0, 0}, 9671 {0x1B, 0, 0, 0, 0}, 9672 {0x1C, 0, 0, 0, 0}, 9673 {0x1D, 0, 0, 0, 0}, 9674 {0x1E, 0, 0, 0, 0}, 9675 {0x1F, 0, 0, 0, 0}, 9676 {0x20, 0, 0, 0, 0}, 9677 {0x21, 0x88, 0x88, 0, 0}, 9678 {0x22, 0x88, 0x88, 0, 0}, 9679 {0x23, 0x88, 0x88, 0, 0}, 9680 {0x24, 0x88, 0x88, 0, 0}, 9681 {0x25, 0xc, 0xc, 0, 0}, 9682 {0x26, 0, 0, 0, 0}, 9683 {0x27, 0x3, 0x3, 0, 0}, 9684 {0x28, 0, 0, 0, 0}, 9685 {0x29, 0x3, 0x3, 0, 0}, 9686 {0x2A, 0x37, 0x37, 0, 0}, 9687 {0x2B, 0x3, 0x3, 0, 0}, 9688 {0x2C, 0, 0, 0, 0}, 9689 {0x2D, 0, 0, 0, 0}, 9690 {0x2E, 0x1, 0x1, 0, 0}, 9691 {0x2F, 0x1, 0x1, 0, 0}, 9692 {0x30, 0, 0, 0, 0}, 9693 {0x31, 0, 0, 0, 0}, 9694 {0x32, 0, 0, 0, 0}, 9695 {0x33, 0x11, 0x11, 0, 0}, 9696 {0x34, 0xee, 0xee, 1, 1}, 9697 {0x35, 0, 0, 0, 0}, 9698 {0x36, 0, 0, 0, 0}, 9699 {0x37, 0x3, 0x3, 0, 0}, 9700 {0x38, 0x50, 0x50, 1, 1}, 9701 {0x39, 0, 0, 0, 0}, 9702 {0x3A, 0x50, 0x50, 1, 1}, 9703 {0x3B, 0, 0, 0, 0}, 9704 {0x3C, 0x6e, 0x6e, 0, 0}, 9705 {0x3D, 0xf0, 0xf0, 1, 1}, 9706 {0x3E, 0, 0, 0, 0}, 9707 {0x3F, 0, 0, 0, 0}, 9708 {0x40, 0, 0, 0, 0}, 9709 {0x41, 0x3, 0x3, 0, 0}, 9710 {0x42, 0x3, 0x3, 0, 0}, 9711 {0x43, 0, 0, 0, 0}, 9712 {0x44, 0x1e, 0x1e, 0, 0}, 9713 {0x45, 0, 0, 0, 0}, 9714 {0x46, 0x6e, 0x6e, 0, 0}, 9715 {0x47, 0xf0, 0xf0, 1, 1}, 9716 {0x48, 0, 0, 0, 0}, 9717 {0x49, 0x2, 0x2, 0, 0}, 9718 {0x4A, 0xff, 0xff, 1, 1}, 9719 {0x4B, 0xc, 0xc, 0, 0}, 9720 {0x4C, 0, 0, 0, 0}, 9721 {0x4D, 0x38, 0x38, 0, 0}, 9722 {0x4E, 0x70, 0x70, 1, 1}, 9723 {0x4F, 0x2, 0x2, 0, 0}, 9724 {0x50, 0x88, 0x88, 0, 0}, 9725 {0x51, 0xc, 0xc, 0, 0}, 9726 {0x52, 0, 0, 0, 0}, 9727 {0x53, 0x8, 0x8, 0, 0}, 9728 {0x54, 0x70, 0x70, 1, 1}, 9729 {0x55, 0x2, 0x2, 0, 0}, 9730 {0x56, 0xff, 0xff, 1, 1}, 9731 {0x57, 0, 0, 0, 0}, 9732 {0x58, 0x83, 0x83, 0, 0}, 9733 {0x59, 0x77, 0x77, 1, 1}, 9734 {0x5A, 0, 0, 0, 0}, 9735 {0x5B, 0x2, 0x2, 0, 0}, 9736 {0x5C, 0x88, 0x88, 0, 0}, 9737 {0x5D, 0, 0, 0, 0}, 9738 {0x5E, 0x8, 0x8, 0, 0}, 9739 {0x5F, 0x77, 0x77, 1, 1}, 9740 {0x60, 0x1, 0x1, 0, 0}, 9741 {0x61, 0, 0, 0, 0}, 9742 {0x62, 0x7, 0x7, 0, 0}, 9743 {0x63, 0, 0, 0, 0}, 9744 {0x64, 0x7, 0x7, 0, 0}, 9745 {0x65, 0, 0, 0, 0}, 9746 {0x66, 0, 0, 0, 0}, 9747 {0x67, 0, 0, 1, 1}, 9748 {0x68, 0, 0, 0, 0}, 9749 {0x69, 0xa, 0xa, 0, 0}, 9750 {0x6A, 0, 0, 0, 0}, 9751 {0x6B, 0, 0, 0, 0}, 9752 {0x6C, 0, 0, 0, 0}, 9753 {0x6D, 0, 0, 0, 0}, 9754 {0x6E, 0, 0, 0, 0}, 9755 {0x6F, 0, 0, 0, 0}, 9756 {0x70, 0, 0, 0, 0}, 9757 {0x71, 0x2, 0x2, 0, 0}, 9758 {0x72, 0, 0, 0, 0}, 9759 {0x73, 0, 0, 0, 0}, 9760 {0x74, 0xe, 0xe, 0, 0}, 9761 {0x75, 0xe, 0xe, 0, 0}, 9762 {0x76, 0xe, 0xe, 0, 0}, 9763 {0x77, 0x13, 0x13, 0, 0}, 9764 {0x78, 0x13, 0x13, 0, 0}, 9765 {0x79, 0x1b, 0x1b, 0, 0}, 9766 {0x7A, 0x1b, 0x1b, 0, 0}, 9767 {0x7B, 0x55, 0x55, 0, 0}, 9768 {0x7C, 0x5b, 0x5b, 0, 0}, 9769 {0x7D, 0x30, 0x30, 1, 1}, 9770 {0x7E, 0, 0, 0, 0}, 9771 {0x7F, 0, 0, 0, 0}, 9772 {0x80, 0, 0, 0, 0}, 9773 {0x81, 0, 0, 0, 0}, 9774 {0x82, 0, 0, 0, 0}, 9775 {0x83, 0, 0, 0, 0}, 9776 {0x84, 0, 0, 0, 0}, 9777 {0x85, 0, 0, 0, 0}, 9778 {0x86, 0, 0, 0, 0}, 9779 {0x87, 0, 0, 0, 0}, 9780 {0x88, 0, 0, 0, 0}, 9781 {0x89, 0, 0, 0, 0}, 9782 {0x8A, 0, 0, 0, 0}, 9783 {0x8B, 0, 0, 0, 0}, 9784 {0x8C, 0, 0, 0, 0}, 9785 {0x8D, 0, 0, 0, 0}, 9786 {0x8E, 0, 0, 0, 0}, 9787 {0x8F, 0, 0, 0, 0}, 9788 {0x90, 0, 0, 0, 0}, 9789 {0x91, 0, 0, 0, 0}, 9790 {0x92, 0, 0, 0, 0}, 9791 {0x93, 0x70, 0x70, 0, 0}, 9792 {0x94, 0x70, 0x70, 0, 0}, 9793 {0x95, 0x70, 0x70, 0, 0}, 9794 {0x96, 0x70, 0x70, 0, 0}, 9795 {0x97, 0x70, 0x70, 0, 0}, 9796 {0x98, 0x70, 0x70, 0, 0}, 9797 {0x99, 0x70, 0x70, 0, 0}, 9798 {0x9A, 0x70, 0x70, 0, 0}, 9799 {0xFFFF, 0, 0, 0, 0} 9800 }; 9801 9802 static struct radio_regs regs_RX_2056_rev6[] = { 9803 {0x02, 0, 0, 0, 0}, 9804 {0x03, 0, 0, 0, 0}, 9805 {0x04, 0, 0, 0, 0}, 9806 {0x05, 0, 0, 0, 0}, 9807 {0x06, 0, 0, 0, 0}, 9808 {0x07, 0, 0, 0, 0}, 9809 {0x08, 0, 0, 0, 0}, 9810 {0x09, 0, 0, 0, 0}, 9811 {0x0A, 0, 0, 0, 0}, 9812 {0x0B, 0, 0, 0, 0}, 9813 {0x0C, 0, 0, 0, 0}, 9814 {0x0D, 0, 0, 0, 0}, 9815 {0x0E, 0, 0, 0, 0}, 9816 {0x0F, 0, 0, 0, 0}, 9817 {0x10, 0, 0, 0, 0}, 9818 {0x11, 0, 0, 0, 0}, 9819 {0x12, 0, 0, 0, 0}, 9820 {0x13, 0, 0, 0, 0}, 9821 {0x14, 0, 0, 0, 0}, 9822 {0x15, 0, 0, 0, 0}, 9823 {0x16, 0, 0, 0, 0}, 9824 {0x17, 0, 0, 0, 0}, 9825 {0x18, 0, 0, 0, 0}, 9826 {0x19, 0, 0, 0, 0}, 9827 {0x1A, 0, 0, 0, 0}, 9828 {0x1B, 0, 0, 0, 0}, 9829 {0x1C, 0, 0, 0, 0}, 9830 {0x1D, 0, 0, 0, 0}, 9831 {0x1E, 0, 0, 0, 0}, 9832 {0x1F, 0, 0, 0, 0}, 9833 {0x20, 0x3, 0x3, 0, 0}, 9834 {0x21, 0, 0, 0, 0}, 9835 {0x22, 0, 0, 0, 0}, 9836 {0x23, 0x90, 0x90, 0, 0}, 9837 {0x24, 0x55, 0x55, 0, 0}, 9838 {0x25, 0x15, 0x15, 0, 0}, 9839 {0x26, 0x5, 0x5, 0, 0}, 9840 {0x27, 0x15, 0x15, 0, 0}, 9841 {0x28, 0x5, 0x5, 0, 0}, 9842 {0x29, 0x20, 0x20, 0, 0}, 9843 {0x2A, 0x11, 0x11, 0, 0}, 9844 {0x2B, 0x90, 0x90, 0, 0}, 9845 {0x2C, 0, 0, 0, 0}, 9846 {0x2D, 0x88, 0x88, 0, 0}, 9847 {0x2E, 0x32, 0x32, 0, 0}, 9848 {0x2F, 0x77, 0x77, 0, 0}, 9849 {0x30, 0x17, 0x17, 1, 1}, 9850 {0x31, 0xff, 0xff, 1, 1}, 9851 {0x32, 0x20, 0x20, 0, 0}, 9852 {0x33, 0, 0, 0, 0}, 9853 {0x34, 0x88, 0x88, 0, 0}, 9854 {0x35, 0x32, 0x32, 0, 0}, 9855 {0x36, 0x77, 0x77, 0, 0}, 9856 {0x37, 0x17, 0x17, 1, 1}, 9857 {0x38, 0xf0, 0xf0, 1, 1}, 9858 {0x39, 0x20, 0x20, 0, 0}, 9859 {0x3A, 0x8, 0x8, 0, 0}, 9860 {0x3B, 0x55, 0x55, 1, 1}, 9861 {0x3C, 0, 0, 0, 0}, 9862 {0x3D, 0x88, 0x88, 1, 1}, 9863 {0x3E, 0, 0, 0, 0}, 9864 {0x3F, 0x44, 0x44, 0, 0}, 9865 {0x40, 0x7, 0x7, 1, 1}, 9866 {0x41, 0x6, 0x6, 0, 0}, 9867 {0x42, 0x4, 0x4, 0, 0}, 9868 {0x43, 0, 0, 0, 0}, 9869 {0x44, 0x8, 0x8, 0, 0}, 9870 {0x45, 0x55, 0x55, 1, 1}, 9871 {0x46, 0, 0, 0, 0}, 9872 {0x47, 0x11, 0x11, 0, 0}, 9873 {0x48, 0, 0, 0, 0}, 9874 {0x49, 0x44, 0x44, 0, 0}, 9875 {0x4A, 0x7, 0x7, 0, 0}, 9876 {0x4B, 0x6, 0x6, 0, 0}, 9877 {0x4C, 0x4, 0x4, 0, 0}, 9878 {0x4D, 0, 0, 0, 0}, 9879 {0x4E, 0, 0, 0, 0}, 9880 {0x4F, 0x26, 0x26, 1, 1}, 9881 {0x50, 0x26, 0x26, 1, 1}, 9882 {0x51, 0xf, 0xf, 1, 1}, 9883 {0x52, 0xf, 0xf, 1, 1}, 9884 {0x53, 0x44, 0x44, 0, 0}, 9885 {0x54, 0, 0, 0, 0}, 9886 {0x55, 0, 0, 0, 0}, 9887 {0x56, 0x8, 0x8, 0, 0}, 9888 {0x57, 0x8, 0x8, 0, 0}, 9889 {0x58, 0x7, 0x7, 0, 0}, 9890 {0x59, 0x22, 0x22, 0, 0}, 9891 {0x5A, 0x22, 0x22, 0, 0}, 9892 {0x5B, 0x2, 0x2, 0, 0}, 9893 {0x5C, 0x4, 0x4, 1, 1}, 9894 {0x5D, 0x7, 0x7, 0, 0}, 9895 {0x5E, 0x55, 0x55, 0, 0}, 9896 {0x5F, 0x23, 0x23, 0, 0}, 9897 {0x60, 0x41, 0x41, 0, 0}, 9898 {0x61, 0x1, 0x1, 0, 0}, 9899 {0x62, 0xa, 0xa, 0, 0}, 9900 {0x63, 0, 0, 0, 0}, 9901 {0x64, 0, 0, 0, 0}, 9902 {0x65, 0, 0, 0, 0}, 9903 {0x66, 0, 0, 0, 0}, 9904 {0x67, 0, 0, 0, 0}, 9905 {0x68, 0, 0, 0, 0}, 9906 {0x69, 0, 0, 0, 0}, 9907 {0x6A, 0, 0, 0, 0}, 9908 {0x6B, 0xc, 0xc, 0, 0}, 9909 {0x6C, 0, 0, 0, 0}, 9910 {0x6D, 0, 0, 0, 0}, 9911 {0x6E, 0, 0, 0, 0}, 9912 {0x6F, 0, 0, 0, 0}, 9913 {0x70, 0, 0, 0, 0}, 9914 {0x71, 0, 0, 0, 0}, 9915 {0x72, 0x22, 0x22, 0, 0}, 9916 {0x73, 0x22, 0x22, 0, 0}, 9917 {0x74, 0, 0, 1, 1}, 9918 {0x75, 0xa, 0xa, 0, 0}, 9919 {0x76, 0x1, 0x1, 0, 0}, 9920 {0x77, 0x22, 0x22, 0, 0}, 9921 {0x78, 0x30, 0x30, 0, 0}, 9922 {0x79, 0, 0, 0, 0}, 9923 {0x7A, 0, 0, 0, 0}, 9924 {0x7B, 0, 0, 0, 0}, 9925 {0x7C, 0, 0, 0, 0}, 9926 {0x7D, 0x5, 0x5, 1, 1}, 9927 {0x7E, 0, 0, 0, 0}, 9928 {0x7F, 0, 0, 0, 0}, 9929 {0x80, 0, 0, 0, 0}, 9930 {0x81, 0, 0, 0, 0}, 9931 {0x82, 0, 0, 0, 0}, 9932 {0x83, 0, 0, 0, 0}, 9933 {0x84, 0, 0, 0, 0}, 9934 {0x85, 0, 0, 0, 0}, 9935 {0x86, 0, 0, 0, 0}, 9936 {0x87, 0, 0, 0, 0}, 9937 {0x88, 0, 0, 0, 0}, 9938 {0x89, 0, 0, 0, 0}, 9939 {0x8A, 0, 0, 0, 0}, 9940 {0x8B, 0, 0, 0, 0}, 9941 {0x8C, 0, 0, 0, 0}, 9942 {0x8D, 0, 0, 0, 0}, 9943 {0x8E, 0, 0, 0, 0}, 9944 {0x8F, 0, 0, 0, 0}, 9945 {0x90, 0, 0, 0, 0}, 9946 {0x91, 0, 0, 0, 0}, 9947 {0x92, 0, 0, 0, 0}, 9948 {0x93, 0, 0, 0, 0}, 9949 {0x94, 0, 0, 0, 0}, 9950 {0xFFFF, 0, 0, 0, 0} 9951 }; 9952 9953 static struct radio_regs regs_SYN_2056_rev7[] = { 9954 {0x02, 0, 0, 0, 0}, 9955 {0x03, 0, 0, 0, 0}, 9956 {0x04, 0, 0, 0, 0}, 9957 {0x05, 0, 0, 0, 0}, 9958 {0x06, 0, 0, 0, 0}, 9959 {0x07, 0, 0, 0, 0}, 9960 {0x08, 0, 0, 0, 0}, 9961 {0x09, 0x1, 0x1, 0, 0}, 9962 {0x0A, 0, 0, 0, 0}, 9963 {0x0B, 0, 0, 0, 0}, 9964 {0x0C, 0, 0, 0, 0}, 9965 {0x0D, 0, 0, 0, 0}, 9966 {0x0E, 0, 0, 0, 0}, 9967 {0x0F, 0, 0, 0, 0}, 9968 {0x10, 0, 0, 0, 0}, 9969 {0x11, 0, 0, 0, 0}, 9970 {0x12, 0, 0, 0, 0}, 9971 {0x13, 0, 0, 0, 0}, 9972 {0x14, 0, 0, 0, 0}, 9973 {0x15, 0, 0, 0, 0}, 9974 {0x16, 0, 0, 0, 0}, 9975 {0x17, 0, 0, 0, 0}, 9976 {0x18, 0, 0, 0, 0}, 9977 {0x19, 0, 0, 0, 0}, 9978 {0x1A, 0, 0, 0, 0}, 9979 {0x1B, 0, 0, 0, 0}, 9980 {0x1C, 0, 0, 0, 0}, 9981 {0x1D, 0, 0, 0, 0}, 9982 {0x1E, 0, 0, 0, 0}, 9983 {0x1F, 0, 0, 0, 0}, 9984 {0x20, 0, 0, 0, 0}, 9985 {0x21, 0, 0, 0, 0}, 9986 {0x22, 0x60, 0x60, 0, 0}, 9987 {0x23, 0x6, 0x6, 0, 0}, 9988 {0x24, 0xc, 0xc, 0, 0}, 9989 {0x25, 0, 0, 0, 0}, 9990 {0x26, 0, 0, 0, 0}, 9991 {0x27, 0, 0, 0, 0}, 9992 {0x28, 0x1, 0x1, 0, 0}, 9993 {0x29, 0, 0, 0, 0}, 9994 {0x2A, 0, 0, 0, 0}, 9995 {0x2B, 0, 0, 0, 0}, 9996 {0x2C, 0, 0, 0, 0}, 9997 {0x2D, 0, 0, 0, 0}, 9998 {0x2E, 0, 0, 0, 0}, 9999 {0x2F, 0x1f, 0x1f, 0, 0}, 10000 {0x30, 0x15, 0x15, 0, 0}, 10001 {0x31, 0xf, 0xf, 0, 0}, 10002 {0x32, 0, 0, 0, 0}, 10003 {0x33, 0, 0, 0, 0}, 10004 {0x34, 0, 0, 0, 0}, 10005 {0x35, 0, 0, 0, 0}, 10006 {0x36, 0, 0, 0, 0}, 10007 {0x37, 0, 0, 0, 0}, 10008 {0x38, 0, 0, 0, 0}, 10009 {0x39, 0, 0, 0, 0}, 10010 {0x3A, 0, 0, 0, 0}, 10011 {0x3B, 0, 0, 0, 0}, 10012 {0x3C, 0x13, 0x13, 0, 0}, 10013 {0x3D, 0xf, 0xf, 0, 0}, 10014 {0x3E, 0x18, 0x18, 0, 0}, 10015 {0x3F, 0, 0, 0, 0}, 10016 {0x40, 0, 0, 0, 0}, 10017 {0x41, 0x20, 0x20, 0, 0}, 10018 {0x42, 0x20, 0x20, 0, 0}, 10019 {0x43, 0, 0, 0, 0}, 10020 {0x44, 0x77, 0x77, 0, 0}, 10021 {0x45, 0x7, 0x7, 0, 0}, 10022 {0x46, 0x1, 0x1, 0, 0}, 10023 {0x47, 0x4, 0x4, 0, 0}, 10024 {0x48, 0xf, 0xf, 0, 0}, 10025 {0x49, 0x30, 0x30, 0, 0}, 10026 {0x4A, 0x32, 0x32, 0, 0}, 10027 {0x4B, 0xd, 0xd, 0, 0}, 10028 {0x4C, 0xd, 0xd, 0, 0}, 10029 {0x4D, 0x4, 0x4, 0, 0}, 10030 {0x4E, 0x6, 0x6, 0, 0}, 10031 {0x4F, 0x1, 0x1, 0, 0}, 10032 {0x50, 0x1c, 0x1c, 0, 0}, 10033 {0x51, 0x2, 0x2, 0, 0}, 10034 {0x52, 0x2, 0x2, 0, 0}, 10035 {0x53, 0xf7, 0xf7, 1, 1}, 10036 {0x54, 0xb4, 0xb4, 0, 0}, 10037 {0x55, 0xd2, 0xd2, 0, 0}, 10038 {0x56, 0, 0, 0, 0}, 10039 {0x57, 0, 0, 0, 0}, 10040 {0x58, 0x4, 0x4, 0, 0}, 10041 {0x59, 0x96, 0x96, 0, 0}, 10042 {0x5A, 0x3e, 0x3e, 0, 0}, 10043 {0x5B, 0x3e, 0x3e, 0, 0}, 10044 {0x5C, 0x13, 0x13, 0, 0}, 10045 {0x5D, 0x2, 0x2, 0, 0}, 10046 {0x5E, 0, 0, 0, 0}, 10047 {0x5F, 0x7, 0x7, 0, 0}, 10048 {0x60, 0x7, 0x7, 1, 1}, 10049 {0x61, 0x8, 0x8, 0, 0}, 10050 {0x62, 0x3, 0x3, 0, 0}, 10051 {0x63, 0, 0, 0, 0}, 10052 {0x64, 0, 0, 0, 0}, 10053 {0x65, 0, 0, 0, 0}, 10054 {0x66, 0, 0, 0, 0}, 10055 {0x67, 0, 0, 0, 0}, 10056 {0x68, 0x40, 0x40, 0, 0}, 10057 {0x69, 0, 0, 0, 0}, 10058 {0x6A, 0, 0, 0, 0}, 10059 {0x6B, 0, 0, 0, 0}, 10060 {0x6C, 0, 0, 0, 0}, 10061 {0x6D, 0x1, 0x1, 0, 0}, 10062 {0x6E, 0, 0, 0, 0}, 10063 {0x6F, 0, 0, 0, 0}, 10064 {0x70, 0x60, 0x60, 0, 0}, 10065 {0x71, 0x66, 0x66, 0, 0}, 10066 {0x72, 0xc, 0xc, 0, 0}, 10067 {0x73, 0x66, 0x66, 0, 0}, 10068 {0x74, 0x8f, 0x8f, 1, 1}, 10069 {0x75, 0, 0, 0, 0}, 10070 {0x76, 0xcc, 0xcc, 0, 0}, 10071 {0x77, 0x1, 0x1, 0, 0}, 10072 {0x78, 0x66, 0x66, 0, 0}, 10073 {0x79, 0x66, 0x66, 0, 0}, 10074 {0x7A, 0, 0, 0, 0}, 10075 {0x7B, 0, 0, 0, 0}, 10076 {0x7C, 0, 0, 0, 0}, 10077 {0x7D, 0, 0, 0, 0}, 10078 {0x7E, 0, 0, 0, 0}, 10079 {0x7F, 0, 0, 0, 0}, 10080 {0x80, 0, 0, 0, 0}, 10081 {0x81, 0, 0, 0, 0}, 10082 {0x82, 0, 0, 0, 0}, 10083 {0x83, 0, 0, 0, 0}, 10084 {0x84, 0, 0, 0, 0}, 10085 {0x85, 0xff, 0xff, 0, 0}, 10086 {0x86, 0, 0, 0, 0}, 10087 {0x87, 0, 0, 0, 0}, 10088 {0x88, 0, 0, 0, 0}, 10089 {0x89, 0, 0, 0, 0}, 10090 {0x8A, 0, 0, 0, 0}, 10091 {0x8B, 0, 0, 0, 0}, 10092 {0x8C, 0, 0, 0, 0}, 10093 {0x8D, 0, 0, 0, 0}, 10094 {0x8E, 0, 0, 0, 0}, 10095 {0x8F, 0, 0, 0, 0}, 10096 {0x90, 0, 0, 0, 0}, 10097 {0x91, 0, 0, 0, 0}, 10098 {0x92, 0, 0, 0, 0}, 10099 {0x93, 0, 0, 0, 0}, 10100 {0x94, 0, 0, 0, 0}, 10101 {0x95, 0, 0, 0, 0}, 10102 {0x96, 0, 0, 0, 0}, 10103 {0x97, 0, 0, 0, 0}, 10104 {0x98, 0, 0, 0, 0}, 10105 {0x99, 0, 0, 0, 0}, 10106 {0x9A, 0, 0, 0, 0}, 10107 {0x9B, 0, 0, 0, 0}, 10108 {0x9C, 0, 0, 0, 0}, 10109 {0x9D, 0, 0, 0, 0}, 10110 {0x9E, 0, 0, 0, 0}, 10111 {0x9F, 0x6, 0x6, 0, 0}, 10112 {0xA0, 0x66, 0x66, 0, 0}, 10113 {0xA1, 0x66, 0x66, 0, 0}, 10114 {0xA2, 0x66, 0x66, 0, 0}, 10115 {0xA3, 0x66, 0x66, 0, 0}, 10116 {0xA4, 0x66, 0x66, 0, 0}, 10117 {0xA5, 0x66, 0x66, 0, 0}, 10118 {0xA6, 0x66, 0x66, 0, 0}, 10119 {0xA7, 0x66, 0x66, 0, 0}, 10120 {0xA8, 0x66, 0x66, 0, 0}, 10121 {0xA9, 0x66, 0x66, 0, 0}, 10122 {0xAA, 0x66, 0x66, 0, 0}, 10123 {0xAB, 0x66, 0x66, 0, 0}, 10124 {0xAC, 0x66, 0x66, 0, 0}, 10125 {0xAD, 0x66, 0x66, 0, 0}, 10126 {0xAE, 0x66, 0x66, 0, 0}, 10127 {0xAF, 0x66, 0x66, 0, 0}, 10128 {0xB0, 0x66, 0x66, 0, 0}, 10129 {0xB1, 0x66, 0x66, 0, 0}, 10130 {0xB2, 0x66, 0x66, 0, 0}, 10131 {0xB3, 0xa, 0xa, 0, 0}, 10132 {0xB4, 0, 0, 0, 0}, 10133 {0xB5, 0, 0, 0, 0}, 10134 {0xB6, 0, 0, 0, 0}, 10135 {0xFFFF, 0, 0, 0, 0}, 10136 }; 10137 10138 static struct radio_regs regs_TX_2056_rev7[] = { 10139 {0x02, 0, 0, 0, 0}, 10140 {0x03, 0, 0, 0, 0}, 10141 {0x04, 0, 0, 0, 0}, 10142 {0x05, 0, 0, 0, 0}, 10143 {0x06, 0, 0, 0, 0}, 10144 {0x07, 0, 0, 0, 0}, 10145 {0x08, 0, 0, 0, 0}, 10146 {0x09, 0, 0, 0, 0}, 10147 {0x0A, 0, 0, 0, 0}, 10148 {0x0B, 0, 0, 0, 0}, 10149 {0x0C, 0, 0, 0, 0}, 10150 {0x0D, 0, 0, 0, 0}, 10151 {0x0E, 0, 0, 0, 0}, 10152 {0x0F, 0, 0, 0, 0}, 10153 {0x10, 0, 0, 0, 0}, 10154 {0x11, 0, 0, 0, 0}, 10155 {0x12, 0, 0, 0, 0}, 10156 {0x13, 0, 0, 0, 0}, 10157 {0x14, 0, 0, 0, 0}, 10158 {0x15, 0, 0, 0, 0}, 10159 {0x16, 0, 0, 0, 0}, 10160 {0x17, 0, 0, 0, 0}, 10161 {0x18, 0, 0, 0, 0}, 10162 {0x19, 0, 0, 0, 0}, 10163 {0x1A, 0, 0, 0, 0}, 10164 {0x1B, 0, 0, 0, 0}, 10165 {0x1C, 0, 0, 0, 0}, 10166 {0x1D, 0, 0, 0, 0}, 10167 {0x1E, 0, 0, 0, 0}, 10168 {0x1F, 0, 0, 0, 0}, 10169 {0x20, 0, 0, 0, 0}, 10170 {0x21, 0x88, 0x88, 0, 0}, 10171 {0x22, 0x88, 0x88, 0, 0}, 10172 {0x23, 0x88, 0x88, 0, 0}, 10173 {0x24, 0x88, 0x88, 0, 0}, 10174 {0x25, 0xc, 0xc, 0, 0}, 10175 {0x26, 0, 0, 0, 0}, 10176 {0x27, 0x3, 0x3, 0, 0}, 10177 {0x28, 0, 0, 0, 0}, 10178 {0x29, 0x3, 0x3, 0, 0}, 10179 {0x2A, 0x37, 0x37, 0, 0}, 10180 {0x2B, 0x3, 0x3, 0, 0}, 10181 {0x2C, 0, 0, 0, 0}, 10182 {0x2D, 0, 0, 0, 0}, 10183 {0x2E, 0x1, 0x1, 0, 0}, 10184 {0x2F, 0x1, 0x1, 0, 0}, 10185 {0x30, 0, 0, 0, 0}, 10186 {0x31, 0, 0, 0, 0}, 10187 {0x32, 0, 0, 0, 0}, 10188 {0x33, 0x11, 0x11, 0, 0}, 10189 {0x34, 0xee, 0xee, 1, 1}, 10190 {0x35, 0, 0, 0, 0}, 10191 {0x36, 0, 0, 0, 0}, 10192 {0x37, 0x3, 0x3, 0, 0}, 10193 {0x38, 0x50, 0x50, 1, 1}, 10194 {0x39, 0, 0, 0, 0}, 10195 {0x3A, 0x50, 0x50, 1, 1}, 10196 {0x3B, 0, 0, 0, 0}, 10197 {0x3C, 0x6e, 0x6e, 0, 0}, 10198 {0x3D, 0xf0, 0xf0, 1, 1}, 10199 {0x3E, 0, 0, 0, 0}, 10200 {0x3F, 0, 0, 0, 0}, 10201 {0x40, 0, 0, 0, 0}, 10202 {0x41, 0x3, 0x3, 0, 0}, 10203 {0x42, 0x3, 0x3, 0, 0}, 10204 {0x43, 0, 0, 0, 0}, 10205 {0x44, 0x1e, 0x1e, 0, 0}, 10206 {0x45, 0, 0, 0, 0}, 10207 {0x46, 0x6e, 0x6e, 0, 0}, 10208 {0x47, 0xf0, 0xf0, 1, 1}, 10209 {0x48, 0, 0, 0, 0}, 10210 {0x49, 0x2, 0x2, 0, 0}, 10211 {0x4A, 0xff, 0xff, 1, 1}, 10212 {0x4B, 0xc, 0xc, 0, 0}, 10213 {0x4C, 0, 0, 0, 0}, 10214 {0x4D, 0x38, 0x38, 0, 0}, 10215 {0x4E, 0x70, 0x70, 1, 1}, 10216 {0x4F, 0x2, 0x2, 0, 0}, 10217 {0x50, 0x88, 0x88, 0, 0}, 10218 {0x51, 0xc, 0xc, 0, 0}, 10219 {0x52, 0, 0, 0, 0}, 10220 {0x53, 0x8, 0x8, 0, 0}, 10221 {0x54, 0x70, 0x70, 1, 1}, 10222 {0x55, 0x2, 0x2, 0, 0}, 10223 {0x56, 0xff, 0xff, 1, 1}, 10224 {0x57, 0, 0, 0, 0}, 10225 {0x58, 0x83, 0x83, 0, 0}, 10226 {0x59, 0x77, 0x77, 1, 1}, 10227 {0x5A, 0, 0, 0, 0}, 10228 {0x5B, 0x2, 0x2, 0, 0}, 10229 {0x5C, 0x88, 0x88, 0, 0}, 10230 {0x5D, 0, 0, 0, 0}, 10231 {0x5E, 0x8, 0x8, 0, 0}, 10232 {0x5F, 0x77, 0x77, 1, 1}, 10233 {0x60, 0x1, 0x1, 0, 0}, 10234 {0x61, 0, 0, 0, 0}, 10235 {0x62, 0x7, 0x7, 0, 0}, 10236 {0x63, 0, 0, 0, 0}, 10237 {0x64, 0x7, 0x7, 0, 0}, 10238 {0x65, 0, 0, 0, 0}, 10239 {0x66, 0, 0, 0, 0}, 10240 {0x67, 0, 0, 1, 1}, 10241 {0x68, 0, 0, 0, 0}, 10242 {0x69, 0xa, 0xa, 0, 0}, 10243 {0x6A, 0, 0, 0, 0}, 10244 {0x6B, 0, 0, 0, 0}, 10245 {0x6C, 0, 0, 0, 0}, 10246 {0x6D, 0, 0, 0, 0}, 10247 {0x6E, 0, 0, 0, 0}, 10248 {0x6F, 0, 0, 0, 0}, 10249 {0x70, 0, 0, 0, 0}, 10250 {0x71, 0x2, 0x2, 0, 0}, 10251 {0x72, 0, 0, 0, 0}, 10252 {0x73, 0, 0, 0, 0}, 10253 {0x74, 0xe, 0xe, 0, 0}, 10254 {0x75, 0xe, 0xe, 0, 0}, 10255 {0x76, 0xe, 0xe, 0, 0}, 10256 {0x77, 0x13, 0x13, 0, 0}, 10257 {0x78, 0x13, 0x13, 0, 0}, 10258 {0x79, 0x1b, 0x1b, 0, 0}, 10259 {0x7A, 0x1b, 0x1b, 0, 0}, 10260 {0x7B, 0x55, 0x55, 0, 0}, 10261 {0x7C, 0x5b, 0x5b, 0, 0}, 10262 {0x7D, 0x30, 0x30, 1, 1}, 10263 {0x7E, 0, 0, 0, 0}, 10264 {0x7F, 0, 0, 0, 0}, 10265 {0x80, 0, 0, 0, 0}, 10266 {0x81, 0, 0, 0, 0}, 10267 {0x82, 0, 0, 0, 0}, 10268 {0x83, 0, 0, 0, 0}, 10269 {0x84, 0, 0, 0, 0}, 10270 {0x85, 0, 0, 0, 0}, 10271 {0x86, 0, 0, 0, 0}, 10272 {0x87, 0, 0, 0, 0}, 10273 {0x88, 0, 0, 0, 0}, 10274 {0x89, 0, 0, 0, 0}, 10275 {0x8A, 0, 0, 0, 0}, 10276 {0x8B, 0, 0, 0, 0}, 10277 {0x8C, 0, 0, 0, 0}, 10278 {0x8D, 0, 0, 0, 0}, 10279 {0x8E, 0, 0, 0, 0}, 10280 {0x8F, 0, 0, 0, 0}, 10281 {0x90, 0, 0, 0, 0}, 10282 {0x91, 0, 0, 0, 0}, 10283 {0x92, 0, 0, 0, 0}, 10284 {0x93, 0x70, 0x70, 0, 0}, 10285 {0x94, 0x70, 0x70, 0, 0}, 10286 {0x95, 0x71, 0x71, 1, 1}, 10287 {0x96, 0x71, 0x71, 1, 1}, 10288 {0x97, 0x72, 0x72, 1, 1}, 10289 {0x98, 0x73, 0x73, 1, 1}, 10290 {0x99, 0x74, 0x74, 1, 1}, 10291 {0x9A, 0x75, 0x75, 1, 1}, 10292 {0xFFFF, 0, 0, 0, 0}, 10293 }; 10294 10295 static struct radio_regs regs_RX_2056_rev7[] = { 10296 {0x02, 0, 0, 0, 0}, 10297 {0x03, 0, 0, 0, 0}, 10298 {0x04, 0, 0, 0, 0}, 10299 {0x05, 0, 0, 0, 0}, 10300 {0x06, 0, 0, 0, 0}, 10301 {0x07, 0, 0, 0, 0}, 10302 {0x08, 0, 0, 0, 0}, 10303 {0x09, 0, 0, 0, 0}, 10304 {0x0A, 0, 0, 0, 0}, 10305 {0x0B, 0, 0, 0, 0}, 10306 {0x0C, 0, 0, 0, 0}, 10307 {0x0D, 0, 0, 0, 0}, 10308 {0x0E, 0, 0, 0, 0}, 10309 {0x0F, 0, 0, 0, 0}, 10310 {0x10, 0, 0, 0, 0}, 10311 {0x11, 0, 0, 0, 0}, 10312 {0x12, 0, 0, 0, 0}, 10313 {0x13, 0, 0, 0, 0}, 10314 {0x14, 0, 0, 0, 0}, 10315 {0x15, 0, 0, 0, 0}, 10316 {0x16, 0, 0, 0, 0}, 10317 {0x17, 0, 0, 0, 0}, 10318 {0x18, 0, 0, 0, 0}, 10319 {0x19, 0, 0, 0, 0}, 10320 {0x1A, 0, 0, 0, 0}, 10321 {0x1B, 0, 0, 0, 0}, 10322 {0x1C, 0, 0, 0, 0}, 10323 {0x1D, 0, 0, 0, 0}, 10324 {0x1E, 0, 0, 0, 0}, 10325 {0x1F, 0, 0, 0, 0}, 10326 {0x20, 0x3, 0x3, 0, 0}, 10327 {0x21, 0, 0, 0, 0}, 10328 {0x22, 0, 0, 0, 0}, 10329 {0x23, 0x90, 0x90, 0, 0}, 10330 {0x24, 0x55, 0x55, 0, 0}, 10331 {0x25, 0x15, 0x15, 0, 0}, 10332 {0x26, 0x5, 0x5, 0, 0}, 10333 {0x27, 0x15, 0x15, 0, 0}, 10334 {0x28, 0x5, 0x5, 0, 0}, 10335 {0x29, 0x20, 0x20, 0, 0}, 10336 {0x2A, 0x11, 0x11, 0, 0}, 10337 {0x2B, 0x90, 0x90, 0, 0}, 10338 {0x2C, 0, 0, 0, 0}, 10339 {0x2D, 0x88, 0x88, 0, 0}, 10340 {0x2E, 0x32, 0x32, 0, 0}, 10341 {0x2F, 0x77, 0x77, 0, 0}, 10342 {0x30, 0x17, 0x17, 1, 1}, 10343 {0x31, 0xff, 0xff, 1, 1}, 10344 {0x32, 0x20, 0x20, 0, 0}, 10345 {0x33, 0, 0, 0, 0}, 10346 {0x34, 0x88, 0x88, 0, 0}, 10347 {0x35, 0x32, 0x32, 0, 0}, 10348 {0x36, 0x77, 0x77, 0, 0}, 10349 {0x37, 0x17, 0x17, 1, 1}, 10350 {0x38, 0xf0, 0xf0, 1, 1}, 10351 {0x39, 0x20, 0x20, 0, 0}, 10352 {0x3A, 0x8, 0x8, 0, 0}, 10353 {0x3B, 0x55, 0x55, 1, 1}, 10354 {0x3C, 0, 0, 0, 0}, 10355 {0x3D, 0x88, 0x88, 1, 1}, 10356 {0x3E, 0, 0, 0, 0}, 10357 {0x3F, 0, 0, 1, 1}, 10358 {0x40, 0x7, 0x7, 1, 1}, 10359 {0x41, 0x6, 0x6, 0, 0}, 10360 {0x42, 0x4, 0x4, 0, 0}, 10361 {0x43, 0, 0, 0, 0}, 10362 {0x44, 0x8, 0x8, 0, 0}, 10363 {0x45, 0x55, 0x55, 1, 1}, 10364 {0x46, 0, 0, 0, 0}, 10365 {0x47, 0x11, 0x11, 0, 0}, 10366 {0x48, 0, 0, 0, 0}, 10367 {0x49, 0, 0, 1, 1}, 10368 {0x4A, 0x7, 0x7, 0, 0}, 10369 {0x4B, 0x6, 0x6, 0, 0}, 10370 {0x4C, 0x4, 0x4, 0, 0}, 10371 {0x4D, 0, 0, 0, 0}, 10372 {0x4E, 0, 0, 0, 0}, 10373 {0x4F, 0x26, 0x26, 1, 1}, 10374 {0x50, 0x26, 0x26, 1, 1}, 10375 {0x51, 0xf, 0xf, 1, 1}, 10376 {0x52, 0xf, 0xf, 1, 1}, 10377 {0x53, 0x44, 0x44, 0, 0}, 10378 {0x54, 0, 0, 0, 0}, 10379 {0x55, 0, 0, 0, 0}, 10380 {0x56, 0x8, 0x8, 0, 0}, 10381 {0x57, 0x8, 0x8, 0, 0}, 10382 {0x58, 0x7, 0x7, 0, 0}, 10383 {0x59, 0x22, 0x22, 0, 0}, 10384 {0x5A, 0x22, 0x22, 0, 0}, 10385 {0x5B, 0x2, 0x2, 0, 0}, 10386 {0x5C, 0x4, 0x4, 1, 1}, 10387 {0x5D, 0x7, 0x7, 0, 0}, 10388 {0x5E, 0x55, 0x55, 0, 0}, 10389 {0x5F, 0x23, 0x23, 0, 0}, 10390 {0x60, 0x41, 0x41, 0, 0}, 10391 {0x61, 0x1, 0x1, 0, 0}, 10392 {0x62, 0xa, 0xa, 0, 0}, 10393 {0x63, 0, 0, 0, 0}, 10394 {0x64, 0, 0, 0, 0}, 10395 {0x65, 0, 0, 0, 0}, 10396 {0x66, 0, 0, 0, 0}, 10397 {0x67, 0, 0, 0, 0}, 10398 {0x68, 0, 0, 0, 0}, 10399 {0x69, 0, 0, 0, 0}, 10400 {0x6A, 0, 0, 0, 0}, 10401 {0x6B, 0xc, 0xc, 0, 0}, 10402 {0x6C, 0, 0, 0, 0}, 10403 {0x6D, 0, 0, 0, 0}, 10404 {0x6E, 0, 0, 0, 0}, 10405 {0x6F, 0, 0, 0, 0}, 10406 {0x70, 0, 0, 0, 0}, 10407 {0x71, 0, 0, 0, 0}, 10408 {0x72, 0x22, 0x22, 0, 0}, 10409 {0x73, 0x22, 0x22, 0, 0}, 10410 {0x74, 0, 0, 1, 1}, 10411 {0x75, 0xa, 0xa, 0, 0}, 10412 {0x76, 0x1, 0x1, 0, 0}, 10413 {0x77, 0x22, 0x22, 0, 0}, 10414 {0x78, 0x30, 0x30, 0, 0}, 10415 {0x79, 0, 0, 0, 0}, 10416 {0x7A, 0, 0, 0, 0}, 10417 {0x7B, 0, 0, 0, 0}, 10418 {0x7C, 0, 0, 0, 0}, 10419 {0x7D, 0, 0, 0, 0}, 10420 {0x7E, 0, 0, 0, 0}, 10421 {0x7F, 0, 0, 0, 0}, 10422 {0x80, 0, 0, 0, 0}, 10423 {0x81, 0, 0, 0, 0}, 10424 {0x82, 0, 0, 0, 0}, 10425 {0x83, 0, 0, 0, 0}, 10426 {0x84, 0, 0, 0, 0}, 10427 {0x85, 0, 0, 0, 0}, 10428 {0x86, 0, 0, 0, 0}, 10429 {0x87, 0, 0, 0, 0}, 10430 {0x88, 0, 0, 0, 0}, 10431 {0x89, 0, 0, 0, 0}, 10432 {0x8A, 0, 0, 0, 0}, 10433 {0x8B, 0, 0, 0, 0}, 10434 {0x8C, 0, 0, 0, 0}, 10435 {0x8D, 0, 0, 0, 0}, 10436 {0x8E, 0, 0, 0, 0}, 10437 {0x8F, 0, 0, 0, 0}, 10438 {0x90, 0, 0, 0, 0}, 10439 {0x91, 0, 0, 0, 0}, 10440 {0x92, 0, 0, 0, 0}, 10441 {0x93, 0, 0, 0, 0}, 10442 {0x94, 0, 0, 0, 0}, 10443 {0xFFFF, 0, 0, 0, 0}, 10444 }; 10445 10446 static struct radio_regs regs_SYN_2056_rev8[] = { 10447 {0x02, 0, 0, 0, 0}, 10448 {0x03, 0, 0, 0, 0}, 10449 {0x04, 0, 0, 0, 0}, 10450 {0x05, 0, 0, 0, 0}, 10451 {0x06, 0, 0, 0, 0}, 10452 {0x07, 0, 0, 0, 0}, 10453 {0x08, 0, 0, 0, 0}, 10454 {0x09, 0x1, 0x1, 0, 0}, 10455 {0x0A, 0, 0, 0, 0}, 10456 {0x0B, 0, 0, 0, 0}, 10457 {0x0C, 0, 0, 0, 0}, 10458 {0x0D, 0, 0, 0, 0}, 10459 {0x0E, 0, 0, 0, 0}, 10460 {0x0F, 0, 0, 0, 0}, 10461 {0x10, 0, 0, 0, 0}, 10462 {0x11, 0, 0, 0, 0}, 10463 {0x12, 0, 0, 0, 0}, 10464 {0x13, 0, 0, 0, 0}, 10465 {0x14, 0, 0, 0, 0}, 10466 {0x15, 0, 0, 0, 0}, 10467 {0x16, 0, 0, 0, 0}, 10468 {0x17, 0, 0, 0, 0}, 10469 {0x18, 0, 0, 0, 0}, 10470 {0x19, 0, 0, 0, 0}, 10471 {0x1A, 0, 0, 0, 0}, 10472 {0x1B, 0, 0, 0, 0}, 10473 {0x1C, 0, 0, 0, 0}, 10474 {0x1D, 0, 0, 0, 0}, 10475 {0x1E, 0, 0, 0, 0}, 10476 {0x1F, 0, 0, 0, 0}, 10477 {0x20, 0, 0, 0, 0}, 10478 {0x21, 0, 0, 0, 0}, 10479 {0x22, 0x60, 0x60, 0, 0}, 10480 {0x23, 0x6, 0x6, 0, 0}, 10481 {0x24, 0xc, 0xc, 0, 0}, 10482 {0x25, 0, 0, 0, 0}, 10483 {0x26, 0, 0, 0, 0}, 10484 {0x27, 0, 0, 0, 0}, 10485 {0x28, 0x1, 0x1, 0, 0}, 10486 {0x29, 0, 0, 0, 0}, 10487 {0x2A, 0, 0, 0, 0}, 10488 {0x2B, 0, 0, 0, 0}, 10489 {0x2C, 0, 0, 0, 0}, 10490 {0x2D, 0, 0, 0, 0}, 10491 {0x2E, 0, 0, 0, 0}, 10492 {0x2F, 0x1f, 0x1f, 0, 0}, 10493 {0x30, 0x15, 0x15, 0, 0}, 10494 {0x31, 0xf, 0xf, 0, 0}, 10495 {0x32, 0, 0, 0, 0}, 10496 {0x33, 0, 0, 0, 0}, 10497 {0x34, 0, 0, 0, 0}, 10498 {0x35, 0, 0, 0, 0}, 10499 {0x36, 0, 0, 0, 0}, 10500 {0x37, 0, 0, 0, 0}, 10501 {0x38, 0, 0, 0, 0}, 10502 {0x39, 0, 0, 0, 0}, 10503 {0x3A, 0, 0, 0, 0}, 10504 {0x3B, 0, 0, 0, 0}, 10505 {0x3C, 0x13, 0x13, 0, 0}, 10506 {0x3D, 0xf, 0xf, 0, 0}, 10507 {0x3E, 0x18, 0x18, 0, 0}, 10508 {0x3F, 0, 0, 0, 0}, 10509 {0x40, 0, 0, 0, 0}, 10510 {0x41, 0x20, 0x20, 0, 0}, 10511 {0x42, 0x20, 0x20, 0, 0}, 10512 {0x43, 0, 0, 0, 0}, 10513 {0x44, 0x77, 0x77, 0, 0}, 10514 {0x45, 0x7, 0x7, 0, 0}, 10515 {0x46, 0x1, 0x1, 0, 0}, 10516 {0x47, 0x4, 0x4, 0, 0}, 10517 {0x48, 0xf, 0xf, 0, 0}, 10518 {0x49, 0x30, 0x30, 0, 0}, 10519 {0x4A, 0x32, 0x32, 0, 0}, 10520 {0x4B, 0xd, 0xd, 0, 0}, 10521 {0x4C, 0xd, 0xd, 0, 0}, 10522 {0x4D, 0x4, 0x4, 0, 0}, 10523 {0x4E, 0x6, 0x6, 0, 0}, 10524 {0x4F, 0x1, 0x1, 0, 0}, 10525 {0x50, 0x1c, 0x1c, 0, 0}, 10526 {0x51, 0x2, 0x2, 0, 0}, 10527 {0x52, 0x2, 0x2, 0, 0}, 10528 {0x53, 0xf7, 0xf7, 1, 1}, 10529 {0x54, 0xb4, 0xb4, 0, 0}, 10530 {0x55, 0xd2, 0xd2, 0, 0}, 10531 {0x56, 0, 0, 0, 0}, 10532 {0x57, 0, 0, 0, 0}, 10533 {0x58, 0x4, 0x4, 0, 0}, 10534 {0x59, 0x96, 0x96, 0, 0}, 10535 {0x5A, 0x3e, 0x3e, 0, 0}, 10536 {0x5B, 0x3e, 0x3e, 0, 0}, 10537 {0x5C, 0x13, 0x13, 0, 0}, 10538 {0x5D, 0x2, 0x2, 0, 0}, 10539 {0x5E, 0, 0, 0, 0}, 10540 {0x5F, 0x7, 0x7, 0, 0}, 10541 {0x60, 0x7, 0x7, 1, 1}, 10542 {0x61, 0x8, 0x8, 0, 0}, 10543 {0x62, 0x3, 0x3, 0, 0}, 10544 {0x63, 0, 0, 0, 0}, 10545 {0x64, 0, 0, 0, 0}, 10546 {0x65, 0, 0, 0, 0}, 10547 {0x66, 0, 0, 0, 0}, 10548 {0x67, 0, 0, 0, 0}, 10549 {0x68, 0x40, 0x40, 0, 0}, 10550 {0x69, 0, 0, 0, 0}, 10551 {0x6A, 0, 0, 0, 0}, 10552 {0x6B, 0, 0, 0, 0}, 10553 {0x6C, 0, 0, 0, 0}, 10554 {0x6D, 0x1, 0x1, 0, 0}, 10555 {0x6E, 0, 0, 0, 0}, 10556 {0x6F, 0, 0, 0, 0}, 10557 {0x70, 0x60, 0x60, 0, 0}, 10558 {0x71, 0x66, 0x66, 0, 0}, 10559 {0x72, 0xc, 0xc, 0, 0}, 10560 {0x73, 0x66, 0x66, 0, 0}, 10561 {0x74, 0x8f, 0x8f, 1, 1}, 10562 {0x75, 0, 0, 0, 0}, 10563 {0x76, 0xcc, 0xcc, 0, 0}, 10564 {0x77, 0x1, 0x1, 0, 0}, 10565 {0x78, 0x66, 0x66, 0, 0}, 10566 {0x79, 0x66, 0x66, 0, 0}, 10567 {0x7A, 0, 0, 0, 0}, 10568 {0x7B, 0, 0, 0, 0}, 10569 {0x7C, 0, 0, 0, 0}, 10570 {0x7D, 0, 0, 0, 0}, 10571 {0x7E, 0, 0, 0, 0}, 10572 {0x7F, 0, 0, 0, 0}, 10573 {0x80, 0, 0, 0, 0}, 10574 {0x81, 0, 0, 0, 0}, 10575 {0x82, 0, 0, 0, 0}, 10576 {0x83, 0, 0, 0, 0}, 10577 {0x84, 0, 0, 0, 0}, 10578 {0x85, 0xff, 0xff, 0, 0}, 10579 {0x86, 0, 0, 0, 0}, 10580 {0x87, 0, 0, 0, 0}, 10581 {0x88, 0, 0, 0, 0}, 10582 {0x89, 0, 0, 0, 0}, 10583 {0x8A, 0, 0, 0, 0}, 10584 {0x8B, 0, 0, 0, 0}, 10585 {0x8C, 0, 0, 0, 0}, 10586 {0x8D, 0, 0, 0, 0}, 10587 {0x8E, 0, 0, 0, 0}, 10588 {0x8F, 0, 0, 0, 0}, 10589 {0x90, 0, 0, 0, 0}, 10590 {0x91, 0, 0, 0, 0}, 10591 {0x92, 0, 0, 0, 0}, 10592 {0x93, 0, 0, 0, 0}, 10593 {0x94, 0, 0, 0, 0}, 10594 {0x95, 0, 0, 0, 0}, 10595 {0x96, 0, 0, 0, 0}, 10596 {0x97, 0, 0, 0, 0}, 10597 {0x98, 0, 0, 0, 0}, 10598 {0x99, 0, 0, 0, 0}, 10599 {0x9A, 0, 0, 0, 0}, 10600 {0x9B, 0, 0, 0, 0}, 10601 {0x9C, 0, 0, 0, 0}, 10602 {0x9D, 0, 0, 0, 0}, 10603 {0x9E, 0, 0, 0, 0}, 10604 {0x9F, 0x6, 0x6, 0, 0}, 10605 {0xA0, 0x66, 0x66, 0, 0}, 10606 {0xA1, 0x66, 0x66, 0, 0}, 10607 {0xA2, 0x66, 0x66, 0, 0}, 10608 {0xA3, 0x66, 0x66, 0, 0}, 10609 {0xA4, 0x66, 0x66, 0, 0}, 10610 {0xA5, 0x66, 0x66, 0, 0}, 10611 {0xA6, 0x66, 0x66, 0, 0}, 10612 {0xA7, 0x66, 0x66, 0, 0}, 10613 {0xA8, 0x66, 0x66, 0, 0}, 10614 {0xA9, 0x66, 0x66, 0, 0}, 10615 {0xAA, 0x66, 0x66, 0, 0}, 10616 {0xAB, 0x66, 0x66, 0, 0}, 10617 {0xAC, 0x66, 0x66, 0, 0}, 10618 {0xAD, 0x66, 0x66, 0, 0}, 10619 {0xAE, 0x66, 0x66, 0, 0}, 10620 {0xAF, 0x66, 0x66, 0, 0}, 10621 {0xB0, 0x66, 0x66, 0, 0}, 10622 {0xB1, 0x66, 0x66, 0, 0}, 10623 {0xB2, 0x66, 0x66, 0, 0}, 10624 {0xB3, 0xa, 0xa, 0, 0}, 10625 {0xB4, 0, 0, 0, 0}, 10626 {0xB5, 0, 0, 0, 0}, 10627 {0xB6, 0, 0, 0, 0}, 10628 {0xFFFF, 0, 0, 0, 0}, 10629 }; 10630 10631 static struct radio_regs regs_TX_2056_rev8[] = { 10632 {0x02, 0, 0, 0, 0}, 10633 {0x03, 0, 0, 0, 0}, 10634 {0x04, 0, 0, 0, 0}, 10635 {0x05, 0, 0, 0, 0}, 10636 {0x06, 0, 0, 0, 0}, 10637 {0x07, 0, 0, 0, 0}, 10638 {0x08, 0, 0, 0, 0}, 10639 {0x09, 0, 0, 0, 0}, 10640 {0x0A, 0, 0, 0, 0}, 10641 {0x0B, 0, 0, 0, 0}, 10642 {0x0C, 0, 0, 0, 0}, 10643 {0x0D, 0, 0, 0, 0}, 10644 {0x0E, 0, 0, 0, 0}, 10645 {0x0F, 0, 0, 0, 0}, 10646 {0x10, 0, 0, 0, 0}, 10647 {0x11, 0, 0, 0, 0}, 10648 {0x12, 0, 0, 0, 0}, 10649 {0x13, 0, 0, 0, 0}, 10650 {0x14, 0, 0, 0, 0}, 10651 {0x15, 0, 0, 0, 0}, 10652 {0x16, 0, 0, 0, 0}, 10653 {0x17, 0, 0, 0, 0}, 10654 {0x18, 0, 0, 0, 0}, 10655 {0x19, 0, 0, 0, 0}, 10656 {0x1A, 0, 0, 0, 0}, 10657 {0x1B, 0, 0, 0, 0}, 10658 {0x1C, 0, 0, 0, 0}, 10659 {0x1D, 0, 0, 0, 0}, 10660 {0x1E, 0, 0, 0, 0}, 10661 {0x1F, 0, 0, 0, 0}, 10662 {0x20, 0, 0, 0, 0}, 10663 {0x21, 0x88, 0x88, 0, 0}, 10664 {0x22, 0x88, 0x88, 0, 0}, 10665 {0x23, 0x88, 0x88, 0, 0}, 10666 {0x24, 0x88, 0x88, 0, 0}, 10667 {0x25, 0xc, 0xc, 0, 0}, 10668 {0x26, 0, 0, 0, 0}, 10669 {0x27, 0x3, 0x3, 0, 0}, 10670 {0x28, 0, 0, 0, 0}, 10671 {0x29, 0x3, 0x3, 0, 0}, 10672 {0x2A, 0x37, 0x37, 0, 0}, 10673 {0x2B, 0x3, 0x3, 0, 0}, 10674 {0x2C, 0, 0, 0, 0}, 10675 {0x2D, 0, 0, 0, 0}, 10676 {0x2E, 0x1, 0x1, 0, 0}, 10677 {0x2F, 0x1, 0x1, 0, 0}, 10678 {0x30, 0, 0, 0, 0}, 10679 {0x31, 0, 0, 0, 0}, 10680 {0x32, 0, 0, 0, 0}, 10681 {0x33, 0x11, 0x11, 0, 0}, 10682 {0x34, 0xee, 0xee, 1, 1}, 10683 {0x35, 0, 0, 0, 0}, 10684 {0x36, 0, 0, 0, 0}, 10685 {0x37, 0x3, 0x3, 0, 0}, 10686 {0x38, 0x50, 0x50, 1, 1}, 10687 {0x39, 0, 0, 0, 0}, 10688 {0x3A, 0x50, 0x50, 1, 1}, 10689 {0x3B, 0, 0, 0, 0}, 10690 {0x3C, 0x6e, 0x6e, 0, 0}, 10691 {0x3D, 0xf0, 0xf0, 1, 1}, 10692 {0x3E, 0, 0, 0, 0}, 10693 {0x3F, 0, 0, 0, 0}, 10694 {0x40, 0, 0, 0, 0}, 10695 {0x41, 0x3, 0x3, 0, 0}, 10696 {0x42, 0x3, 0x3, 0, 0}, 10697 {0x43, 0, 0, 0, 0}, 10698 {0x44, 0x1e, 0x1e, 0, 0}, 10699 {0x45, 0, 0, 0, 0}, 10700 {0x46, 0x6e, 0x6e, 0, 0}, 10701 {0x47, 0xf0, 0xf0, 1, 1}, 10702 {0x48, 0, 0, 0, 0}, 10703 {0x49, 0x2, 0x2, 0, 0}, 10704 {0x4A, 0xff, 0xff, 1, 1}, 10705 {0x4B, 0xc, 0xc, 0, 0}, 10706 {0x4C, 0, 0, 0, 0}, 10707 {0x4D, 0x38, 0x38, 0, 0}, 10708 {0x4E, 0x70, 0x70, 1, 1}, 10709 {0x4F, 0x2, 0x2, 0, 0}, 10710 {0x50, 0x88, 0x88, 0, 0}, 10711 {0x51, 0xc, 0xc, 0, 0}, 10712 {0x52, 0, 0, 0, 0}, 10713 {0x53, 0x8, 0x8, 0, 0}, 10714 {0x54, 0x70, 0x70, 1, 1}, 10715 {0x55, 0x2, 0x2, 0, 0}, 10716 {0x56, 0xff, 0xff, 1, 1}, 10717 {0x57, 0, 0, 0, 0}, 10718 {0x58, 0x83, 0x83, 0, 0}, 10719 {0x59, 0x77, 0x77, 1, 1}, 10720 {0x5A, 0, 0, 0, 0}, 10721 {0x5B, 0x2, 0x2, 0, 0}, 10722 {0x5C, 0x88, 0x88, 0, 0}, 10723 {0x5D, 0, 0, 0, 0}, 10724 {0x5E, 0x8, 0x8, 0, 0}, 10725 {0x5F, 0x77, 0x77, 1, 1}, 10726 {0x60, 0x1, 0x1, 0, 0}, 10727 {0x61, 0, 0, 0, 0}, 10728 {0x62, 0x7, 0x7, 0, 0}, 10729 {0x63, 0, 0, 0, 0}, 10730 {0x64, 0x7, 0x7, 0, 0}, 10731 {0x65, 0, 0, 0, 0}, 10732 {0x66, 0, 0, 0, 0}, 10733 {0x67, 0, 0, 1, 1}, 10734 {0x68, 0, 0, 0, 0}, 10735 {0x69, 0xa, 0xa, 0, 0}, 10736 {0x6A, 0, 0, 0, 0}, 10737 {0x6B, 0, 0, 0, 0}, 10738 {0x6C, 0, 0, 0, 0}, 10739 {0x6D, 0, 0, 0, 0}, 10740 {0x6E, 0, 0, 0, 0}, 10741 {0x6F, 0, 0, 0, 0}, 10742 {0x70, 0, 0, 0, 0}, 10743 {0x71, 0x2, 0x2, 0, 0}, 10744 {0x72, 0, 0, 0, 0}, 10745 {0x73, 0, 0, 0, 0}, 10746 {0x74, 0xe, 0xe, 0, 0}, 10747 {0x75, 0xe, 0xe, 0, 0}, 10748 {0x76, 0xe, 0xe, 0, 0}, 10749 {0x77, 0x13, 0x13, 0, 0}, 10750 {0x78, 0x13, 0x13, 0, 0}, 10751 {0x79, 0x1b, 0x1b, 0, 0}, 10752 {0x7A, 0x1b, 0x1b, 0, 0}, 10753 {0x7B, 0x55, 0x55, 0, 0}, 10754 {0x7C, 0x5b, 0x5b, 0, 0}, 10755 {0x7D, 0x30, 0x30, 1, 1}, 10756 {0x7E, 0, 0, 0, 0}, 10757 {0x7F, 0, 0, 0, 0}, 10758 {0x80, 0, 0, 0, 0}, 10759 {0x81, 0, 0, 0, 0}, 10760 {0x82, 0, 0, 0, 0}, 10761 {0x83, 0, 0, 0, 0}, 10762 {0x84, 0, 0, 0, 0}, 10763 {0x85, 0, 0, 0, 0}, 10764 {0x86, 0, 0, 0, 0}, 10765 {0x87, 0, 0, 0, 0}, 10766 {0x88, 0, 0, 0, 0}, 10767 {0x89, 0, 0, 0, 0}, 10768 {0x8A, 0, 0, 0, 0}, 10769 {0x8B, 0, 0, 0, 0}, 10770 {0x8C, 0, 0, 0, 0}, 10771 {0x8D, 0, 0, 0, 0}, 10772 {0x8E, 0, 0, 0, 0}, 10773 {0x8F, 0, 0, 0, 0}, 10774 {0x90, 0, 0, 0, 0}, 10775 {0x91, 0, 0, 0, 0}, 10776 {0x92, 0, 0, 0, 0}, 10777 {0x93, 0x70, 0x70, 0, 0}, 10778 {0x94, 0x70, 0x70, 0, 0}, 10779 {0x95, 0x70, 0x70, 0, 0}, 10780 {0x96, 0x70, 0x70, 0, 0}, 10781 {0x97, 0x70, 0x70, 0, 0}, 10782 {0x98, 0x70, 0x70, 0, 0}, 10783 {0x99, 0x70, 0x70, 0, 0}, 10784 {0x9A, 0x70, 0x70, 0, 0}, 10785 {0xFFFF, 0, 0, 0, 0}, 10786 }; 10787 10788 static struct radio_regs regs_RX_2056_rev8[] = { 10789 {0x02, 0, 0, 0, 0}, 10790 {0x03, 0, 0, 0, 0}, 10791 {0x04, 0, 0, 0, 0}, 10792 {0x05, 0, 0, 0, 0}, 10793 {0x06, 0, 0, 0, 0}, 10794 {0x07, 0, 0, 0, 0}, 10795 {0x08, 0, 0, 0, 0}, 10796 {0x09, 0, 0, 0, 0}, 10797 {0x0A, 0, 0, 0, 0}, 10798 {0x0B, 0, 0, 0, 0}, 10799 {0x0C, 0, 0, 0, 0}, 10800 {0x0D, 0, 0, 0, 0}, 10801 {0x0E, 0, 0, 0, 0}, 10802 {0x0F, 0, 0, 0, 0}, 10803 {0x10, 0, 0, 0, 0}, 10804 {0x11, 0, 0, 0, 0}, 10805 {0x12, 0, 0, 0, 0}, 10806 {0x13, 0, 0, 0, 0}, 10807 {0x14, 0, 0, 0, 0}, 10808 {0x15, 0, 0, 0, 0}, 10809 {0x16, 0, 0, 0, 0}, 10810 {0x17, 0, 0, 0, 0}, 10811 {0x18, 0, 0, 0, 0}, 10812 {0x19, 0, 0, 0, 0}, 10813 {0x1A, 0, 0, 0, 0}, 10814 {0x1B, 0, 0, 0, 0}, 10815 {0x1C, 0, 0, 0, 0}, 10816 {0x1D, 0, 0, 0, 0}, 10817 {0x1E, 0, 0, 0, 0}, 10818 {0x1F, 0, 0, 0, 0}, 10819 {0x20, 0x3, 0x3, 0, 0}, 10820 {0x21, 0, 0, 0, 0}, 10821 {0x22, 0, 0, 0, 0}, 10822 {0x23, 0x90, 0x90, 0, 0}, 10823 {0x24, 0x55, 0x55, 0, 0}, 10824 {0x25, 0x15, 0x15, 0, 0}, 10825 {0x26, 0x5, 0x5, 0, 0}, 10826 {0x27, 0x15, 0x15, 0, 0}, 10827 {0x28, 0x5, 0x5, 0, 0}, 10828 {0x29, 0x20, 0x20, 0, 0}, 10829 {0x2A, 0x11, 0x11, 0, 0}, 10830 {0x2B, 0x90, 0x90, 0, 0}, 10831 {0x2C, 0, 0, 0, 0}, 10832 {0x2D, 0x88, 0x88, 0, 0}, 10833 {0x2E, 0x32, 0x32, 0, 0}, 10834 {0x2F, 0x77, 0x77, 0, 0}, 10835 {0x30, 0x17, 0x17, 1, 1}, 10836 {0x31, 0xff, 0xff, 1, 1}, 10837 {0x32, 0x20, 0x20, 0, 0}, 10838 {0x33, 0, 0, 0, 0}, 10839 {0x34, 0x88, 0x88, 0, 0}, 10840 {0x35, 0x32, 0x32, 0, 0}, 10841 {0x36, 0x77, 0x77, 0, 0}, 10842 {0x37, 0x17, 0x17, 1, 1}, 10843 {0x38, 0xf0, 0xf0, 1, 1}, 10844 {0x39, 0x20, 0x20, 0, 0}, 10845 {0x3A, 0x8, 0x8, 0, 0}, 10846 {0x3B, 0x55, 0x55, 1, 1}, 10847 {0x3C, 0, 0, 0, 0}, 10848 {0x3D, 0x88, 0x88, 1, 1}, 10849 {0x3E, 0, 0, 0, 0}, 10850 {0x3F, 0x44, 0x44, 0, 0}, 10851 {0x40, 0x7, 0x7, 1, 1}, 10852 {0x41, 0x6, 0x6, 0, 0}, 10853 {0x42, 0x4, 0x4, 0, 0}, 10854 {0x43, 0, 0, 0, 0}, 10855 {0x44, 0x8, 0x8, 0, 0}, 10856 {0x45, 0x55, 0x55, 1, 1}, 10857 {0x46, 0, 0, 0, 0}, 10858 {0x47, 0x11, 0x11, 0, 0}, 10859 {0x48, 0, 0, 0, 0}, 10860 {0x49, 0x44, 0x44, 0, 0}, 10861 {0x4A, 0x7, 0x7, 0, 0}, 10862 {0x4B, 0x6, 0x6, 0, 0}, 10863 {0x4C, 0x4, 0x4, 0, 0}, 10864 {0x4D, 0, 0, 0, 0}, 10865 {0x4E, 0, 0, 0, 0}, 10866 {0x4F, 0x26, 0x26, 1, 1}, 10867 {0x50, 0x26, 0x26, 1, 1}, 10868 {0x51, 0xf, 0xf, 1, 1}, 10869 {0x52, 0xf, 0xf, 1, 1}, 10870 {0x53, 0x44, 0x44, 0, 0}, 10871 {0x54, 0, 0, 0, 0}, 10872 {0x55, 0, 0, 0, 0}, 10873 {0x56, 0x8, 0x8, 0, 0}, 10874 {0x57, 0x8, 0x8, 0, 0}, 10875 {0x58, 0x7, 0x7, 0, 0}, 10876 {0x59, 0x22, 0x22, 0, 0}, 10877 {0x5A, 0x22, 0x22, 0, 0}, 10878 {0x5B, 0x2, 0x2, 0, 0}, 10879 {0x5C, 0x4, 0x4, 1, 1}, 10880 {0x5D, 0x7, 0x7, 0, 0}, 10881 {0x5E, 0x55, 0x55, 0, 0}, 10882 {0x5F, 0x23, 0x23, 0, 0}, 10883 {0x60, 0x41, 0x41, 0, 0}, 10884 {0x61, 0x1, 0x1, 0, 0}, 10885 {0x62, 0xa, 0xa, 0, 0}, 10886 {0x63, 0, 0, 0, 0}, 10887 {0x64, 0, 0, 0, 0}, 10888 {0x65, 0, 0, 0, 0}, 10889 {0x66, 0, 0, 0, 0}, 10890 {0x67, 0, 0, 0, 0}, 10891 {0x68, 0, 0, 0, 0}, 10892 {0x69, 0, 0, 0, 0}, 10893 {0x6A, 0, 0, 0, 0}, 10894 {0x6B, 0xc, 0xc, 0, 0}, 10895 {0x6C, 0, 0, 0, 0}, 10896 {0x6D, 0, 0, 0, 0}, 10897 {0x6E, 0, 0, 0, 0}, 10898 {0x6F, 0, 0, 0, 0}, 10899 {0x70, 0, 0, 0, 0}, 10900 {0x71, 0, 0, 0, 0}, 10901 {0x72, 0x22, 0x22, 0, 0}, 10902 {0x73, 0x22, 0x22, 0, 0}, 10903 {0x74, 0, 0, 1, 1}, 10904 {0x75, 0xa, 0xa, 0, 0}, 10905 {0x76, 0x1, 0x1, 0, 0}, 10906 {0x77, 0x22, 0x22, 0, 0}, 10907 {0x78, 0x30, 0x30, 0, 0}, 10908 {0x79, 0, 0, 0, 0}, 10909 {0x7A, 0, 0, 0, 0}, 10910 {0x7B, 0, 0, 0, 0}, 10911 {0x7C, 0, 0, 0, 0}, 10912 {0x7D, 0x5, 0x5, 1, 1}, 10913 {0x7E, 0, 0, 0, 0}, 10914 {0x7F, 0, 0, 0, 0}, 10915 {0x80, 0, 0, 0, 0}, 10916 {0x81, 0, 0, 0, 0}, 10917 {0x82, 0, 0, 0, 0}, 10918 {0x83, 0, 0, 0, 0}, 10919 {0x84, 0, 0, 0, 0}, 10920 {0x85, 0, 0, 0, 0}, 10921 {0x86, 0, 0, 0, 0}, 10922 {0x87, 0, 0, 0, 0}, 10923 {0x88, 0, 0, 0, 0}, 10924 {0x89, 0, 0, 0, 0}, 10925 {0x8A, 0, 0, 0, 0}, 10926 {0x8B, 0, 0, 0, 0}, 10927 {0x8C, 0, 0, 0, 0}, 10928 {0x8D, 0, 0, 0, 0}, 10929 {0x8E, 0, 0, 0, 0}, 10930 {0x8F, 0, 0, 0, 0}, 10931 {0x90, 0, 0, 0, 0}, 10932 {0x91, 0, 0, 0, 0}, 10933 {0x92, 0, 0, 0, 0}, 10934 {0x93, 0, 0, 0, 0}, 10935 {0x94, 0, 0, 0, 0}, 10936 {0xFFFF, 0, 0, 0, 0}, 10937 }; 10938 10939 static const struct radio_regs regs_SYN_2056_rev11[] = { 10940 {0x02, 0, 0, 0, 0}, 10941 {0x03, 0, 0, 0, 0}, 10942 {0x04, 0, 0, 0, 0}, 10943 {0x05, 0, 0, 0, 0}, 10944 {0x06, 0, 0, 0, 0}, 10945 {0x07, 0, 0, 0, 0}, 10946 {0x08, 0, 0, 0, 0}, 10947 {0x09, 0x1, 0x1, 0, 0}, 10948 {0x0A, 0, 0, 0, 0}, 10949 {0x0B, 0, 0, 0, 0}, 10950 {0x0C, 0, 0, 0, 0}, 10951 {0x0D, 0, 0, 0, 0}, 10952 {0x0E, 0, 0, 0, 0}, 10953 {0x0F, 0, 0, 0, 0}, 10954 {0x10, 0, 0, 0, 0}, 10955 {0x11, 0, 0, 0, 0}, 10956 {0x12, 0, 0, 0, 0}, 10957 {0x13, 0, 0, 0, 0}, 10958 {0x14, 0, 0, 0, 0}, 10959 {0x15, 0, 0, 0, 0}, 10960 {0x16, 0, 0, 0, 0}, 10961 {0x17, 0, 0, 0, 0}, 10962 {0x18, 0, 0, 0, 0}, 10963 {0x19, 0, 0, 0, 0}, 10964 {0x1A, 0, 0, 0, 0}, 10965 {0x1B, 0, 0, 0, 0}, 10966 {0x1C, 0, 0, 0, 0}, 10967 {0x1D, 0, 0, 0, 0}, 10968 {0x1E, 0, 0, 0, 0}, 10969 {0x1F, 0, 0, 0, 0}, 10970 {0x20, 0, 0, 0, 0}, 10971 {0x21, 0, 0, 0, 0}, 10972 {0x22, 0x60, 0x60, 0, 0}, 10973 {0x23, 0x6, 0x6, 0, 0}, 10974 {0x24, 0xc, 0xc, 0, 0}, 10975 {0x25, 0, 0, 0, 0}, 10976 {0x26, 0, 0, 0, 0}, 10977 {0x27, 0, 0, 0, 0}, 10978 {0x28, 0x1, 0x1, 0, 0}, 10979 {0x29, 0, 0, 0, 0}, 10980 {0x2A, 0, 0, 0, 0}, 10981 {0x2B, 0, 0, 0, 0}, 10982 {0x2C, 0, 0, 0, 0}, 10983 {0x2D, 0, 0, 0, 0}, 10984 {0x2E, 0, 0, 0, 0}, 10985 {0x2F, 0x1f, 0x1f, 0, 0}, 10986 {0x30, 0x15, 0x15, 0, 0}, 10987 {0x31, 0xf, 0xf, 0, 0}, 10988 {0x32, 0, 0, 0, 0}, 10989 {0x33, 0, 0, 0, 0}, 10990 {0x34, 0, 0, 0, 0}, 10991 {0x35, 0, 0, 0, 0}, 10992 {0x36, 0, 0, 0, 0}, 10993 {0x37, 0, 0, 0, 0}, 10994 {0x38, 0, 0, 0, 0}, 10995 {0x39, 0, 0, 0, 0}, 10996 {0x3A, 0, 0, 0, 0}, 10997 {0x3B, 0, 0, 0, 0}, 10998 {0x3C, 0x13, 0x13, 0, 0}, 10999 {0x3D, 0xf, 0xf, 0, 0}, 11000 {0x3E, 0x18, 0x18, 0, 0}, 11001 {0x3F, 0, 0, 0, 0}, 11002 {0x40, 0, 0, 0, 0}, 11003 {0x41, 0x20, 0x20, 0, 0}, 11004 {0x42, 0x20, 0x20, 0, 0}, 11005 {0x43, 0, 0, 0, 0}, 11006 {0x44, 0x77, 0x77, 0, 0}, 11007 {0x45, 0x7, 0x7, 0, 0}, 11008 {0x46, 0x1, 0x1, 0, 0}, 11009 {0x47, 0x6, 0x6, 1, 1}, 11010 {0x48, 0xf, 0xf, 0, 0}, 11011 {0x49, 0x3f, 0x3f, 1, 1}, 11012 {0x4A, 0x32, 0x32, 0, 0}, 11013 {0x4B, 0x6, 0x6, 1, 1}, 11014 {0x4C, 0x6, 0x6, 1, 1}, 11015 {0x4D, 0x4, 0x4, 0, 0}, 11016 {0x4E, 0x2b, 0x2b, 1, 1}, 11017 {0x4F, 0x1, 0x1, 0, 0}, 11018 {0x50, 0x1c, 0x1c, 0, 0}, 11019 {0x51, 0x2, 0x2, 0, 0}, 11020 {0x52, 0x2, 0x2, 0, 0}, 11021 {0x53, 0xf7, 0xf7, 1, 1}, 11022 {0x54, 0xb4, 0xb4, 0, 0}, 11023 {0x55, 0xd2, 0xd2, 0, 0}, 11024 {0x56, 0, 0, 0, 0}, 11025 {0x57, 0, 0, 0, 0}, 11026 {0x58, 0x4, 0x4, 0, 0}, 11027 {0x59, 0x96, 0x96, 0, 0}, 11028 {0x5A, 0x3e, 0x3e, 0, 0}, 11029 {0x5B, 0x3e, 0x3e, 0, 0}, 11030 {0x5C, 0x13, 0x13, 0, 0}, 11031 {0x5D, 0x2, 0x2, 0, 0}, 11032 {0x5E, 0, 0, 0, 0}, 11033 {0x5F, 0x7, 0x7, 0, 0}, 11034 {0x60, 0x7, 0x7, 1, 1}, 11035 {0x61, 0x8, 0x8, 0, 0}, 11036 {0x62, 0x3, 0x3, 0, 0}, 11037 {0x63, 0, 0, 0, 0}, 11038 {0x64, 0, 0, 0, 0}, 11039 {0x65, 0, 0, 0, 0}, 11040 {0x66, 0, 0, 0, 0}, 11041 {0x67, 0, 0, 0, 0}, 11042 {0x68, 0x40, 0x40, 0, 0}, 11043 {0x69, 0, 0, 0, 0}, 11044 {0x6A, 0, 0, 0, 0}, 11045 {0x6B, 0, 0, 0, 0}, 11046 {0x6C, 0, 0, 0, 0}, 11047 {0x6D, 0x1, 0x1, 0, 0}, 11048 {0x6E, 0, 0, 0, 0}, 11049 {0x6F, 0, 0, 0, 0}, 11050 {0x70, 0x60, 0x60, 0, 0}, 11051 {0x71, 0x66, 0x66, 0, 0}, 11052 {0x72, 0xc, 0xc, 0, 0}, 11053 {0x73, 0x66, 0x66, 0, 0}, 11054 {0x74, 0x8f, 0x8f, 1, 1}, 11055 {0x75, 0, 0, 0, 0}, 11056 {0x76, 0xcc, 0xcc, 0, 0}, 11057 {0x77, 0x1, 0x1, 0, 0}, 11058 {0x78, 0x66, 0x66, 0, 0}, 11059 {0x79, 0x66, 0x66, 0, 0}, 11060 {0x7A, 0, 0, 0, 0}, 11061 {0x7B, 0, 0, 0, 0}, 11062 {0x7C, 0, 0, 0, 0}, 11063 {0x7D, 0, 0, 0, 0}, 11064 {0x7E, 0, 0, 0, 0}, 11065 {0x7F, 0, 0, 0, 0}, 11066 {0x80, 0, 0, 0, 0}, 11067 {0x81, 0, 0, 0, 0}, 11068 {0x82, 0, 0, 0, 0}, 11069 {0x83, 0, 0, 0, 0}, 11070 {0x84, 0, 0, 0, 0}, 11071 {0x85, 0xff, 0xff, 0, 0}, 11072 {0x86, 0, 0, 0, 0}, 11073 {0x87, 0, 0, 0, 0}, 11074 {0x88, 0, 0, 0, 0}, 11075 {0x89, 0, 0, 0, 0}, 11076 {0x8A, 0, 0, 0, 0}, 11077 {0x8B, 0, 0, 0, 0}, 11078 {0x8C, 0, 0, 0, 0}, 11079 {0x8D, 0, 0, 0, 0}, 11080 {0x8E, 0, 0, 0, 0}, 11081 {0x8F, 0, 0, 0, 0}, 11082 {0x90, 0, 0, 0, 0}, 11083 {0x91, 0, 0, 0, 0}, 11084 {0x92, 0, 0, 0, 0}, 11085 {0x93, 0, 0, 0, 0}, 11086 {0x94, 0, 0, 0, 0}, 11087 {0x95, 0, 0, 0, 0}, 11088 {0x96, 0, 0, 0, 0}, 11089 {0x97, 0, 0, 0, 0}, 11090 {0x98, 0, 0, 0, 0}, 11091 {0x99, 0, 0, 0, 0}, 11092 {0x9A, 0, 0, 0, 0}, 11093 {0x9B, 0, 0, 0, 0}, 11094 {0x9C, 0, 0, 0, 0}, 11095 {0x9D, 0, 0, 0, 0}, 11096 {0x9E, 0, 0, 0, 0}, 11097 {0x9F, 0x6, 0x6, 0, 0}, 11098 {0xA0, 0x66, 0x66, 0, 0}, 11099 {0xA1, 0x66, 0x66, 0, 0}, 11100 {0xA2, 0x66, 0x66, 0, 0}, 11101 {0xA3, 0x66, 0x66, 0, 0}, 11102 {0xA4, 0x66, 0x66, 0, 0}, 11103 {0xA5, 0x66, 0x66, 0, 0}, 11104 {0xA6, 0x66, 0x66, 0, 0}, 11105 {0xA7, 0x66, 0x66, 0, 0}, 11106 {0xA8, 0x66, 0x66, 0, 0}, 11107 {0xA9, 0x66, 0x66, 0, 0}, 11108 {0xAA, 0x66, 0x66, 0, 0}, 11109 {0xAB, 0x66, 0x66, 0, 0}, 11110 {0xAC, 0x66, 0x66, 0, 0}, 11111 {0xAD, 0x66, 0x66, 0, 0}, 11112 {0xAE, 0x66, 0x66, 0, 0}, 11113 {0xAF, 0x66, 0x66, 0, 0}, 11114 {0xB0, 0x66, 0x66, 0, 0}, 11115 {0xB1, 0x66, 0x66, 0, 0}, 11116 {0xB2, 0x66, 0x66, 0, 0}, 11117 {0xB3, 0xa, 0xa, 0, 0}, 11118 {0xB4, 0, 0, 0, 0}, 11119 {0xB5, 0, 0, 0, 0}, 11120 {0xB6, 0, 0, 0, 0}, 11121 {0xFFFF, 0, 0, 0, 0}, 11122 }; 11123 11124 static const struct radio_regs regs_TX_2056_rev11[] = { 11125 {0x02, 0, 0, 0, 0}, 11126 {0x03, 0, 0, 0, 0}, 11127 {0x04, 0, 0, 0, 0}, 11128 {0x05, 0, 0, 0, 0}, 11129 {0x06, 0, 0, 0, 0}, 11130 {0x07, 0, 0, 0, 0}, 11131 {0x08, 0, 0, 0, 0}, 11132 {0x09, 0, 0, 0, 0}, 11133 {0x0A, 0, 0, 0, 0}, 11134 {0x0B, 0, 0, 0, 0}, 11135 {0x0C, 0, 0, 0, 0}, 11136 {0x0D, 0, 0, 0, 0}, 11137 {0x0E, 0, 0, 0, 0}, 11138 {0x0F, 0, 0, 0, 0}, 11139 {0x10, 0, 0, 0, 0}, 11140 {0x11, 0, 0, 0, 0}, 11141 {0x12, 0, 0, 0, 0}, 11142 {0x13, 0, 0, 0, 0}, 11143 {0x14, 0, 0, 0, 0}, 11144 {0x15, 0, 0, 0, 0}, 11145 {0x16, 0, 0, 0, 0}, 11146 {0x17, 0, 0, 0, 0}, 11147 {0x18, 0, 0, 0, 0}, 11148 {0x19, 0, 0, 0, 0}, 11149 {0x1A, 0, 0, 0, 0}, 11150 {0x1B, 0, 0, 0, 0}, 11151 {0x1C, 0, 0, 0, 0}, 11152 {0x1D, 0, 0, 0, 0}, 11153 {0x1E, 0, 0, 0, 0}, 11154 {0x1F, 0, 0, 0, 0}, 11155 {0x20, 0, 0, 0, 0}, 11156 {0x21, 0x88, 0x88, 0, 0}, 11157 {0x22, 0x88, 0x88, 0, 0}, 11158 {0x23, 0x88, 0x88, 0, 0}, 11159 {0x24, 0x88, 0x88, 0, 0}, 11160 {0x25, 0xc, 0xc, 0, 0}, 11161 {0x26, 0, 0, 0, 0}, 11162 {0x27, 0x3, 0x3, 0, 0}, 11163 {0x28, 0, 0, 0, 0}, 11164 {0x29, 0x3, 0x3, 0, 0}, 11165 {0x2A, 0x37, 0x37, 0, 0}, 11166 {0x2B, 0x3, 0x3, 0, 0}, 11167 {0x2C, 0, 0, 0, 0}, 11168 {0x2D, 0, 0, 0, 0}, 11169 {0x2E, 0x1, 0x1, 0, 0}, 11170 {0x2F, 0x1, 0x1, 0, 0}, 11171 {0x30, 0, 0, 0, 0}, 11172 {0x31, 0, 0, 0, 0}, 11173 {0x32, 0, 0, 0, 0}, 11174 {0x33, 0x11, 0x11, 0, 0}, 11175 {0x34, 0xee, 0xee, 1, 1}, 11176 {0x35, 0, 0, 0, 0}, 11177 {0x36, 0, 0, 0, 0}, 11178 {0x37, 0x3, 0x3, 0, 0}, 11179 {0x38, 0x50, 0x50, 1, 1}, 11180 {0x39, 0, 0, 0, 0}, 11181 {0x3A, 0x50, 0x50, 1, 1}, 11182 {0x3B, 0, 0, 0, 0}, 11183 {0x3C, 0x6e, 0x6e, 0, 0}, 11184 {0x3D, 0xf0, 0xf0, 1, 1}, 11185 {0x3E, 0, 0, 0, 0}, 11186 {0x3F, 0, 0, 0, 0}, 11187 {0x40, 0, 0, 0, 0}, 11188 {0x41, 0x3, 0x3, 0, 0}, 11189 {0x42, 0x3, 0x3, 0, 0}, 11190 {0x43, 0, 0, 0, 0}, 11191 {0x44, 0x1e, 0x1e, 0, 0}, 11192 {0x45, 0, 0, 0, 0}, 11193 {0x46, 0x6e, 0x6e, 0, 0}, 11194 {0x47, 0xf0, 0xf0, 1, 1}, 11195 {0x48, 0, 0, 0, 0}, 11196 {0x49, 0x2, 0x2, 0, 0}, 11197 {0x4A, 0xff, 0xff, 1, 1}, 11198 {0x4B, 0xc, 0xc, 0, 0}, 11199 {0x4C, 0, 0, 0, 0}, 11200 {0x4D, 0x38, 0x38, 0, 0}, 11201 {0x4E, 0x70, 0x70, 1, 1}, 11202 {0x4F, 0x2, 0x2, 0, 0}, 11203 {0x50, 0x88, 0x88, 0, 0}, 11204 {0x51, 0xc, 0xc, 0, 0}, 11205 {0x52, 0, 0, 0, 0}, 11206 {0x53, 0x8, 0x8, 0, 0}, 11207 {0x54, 0x70, 0x70, 1, 1}, 11208 {0x55, 0x2, 0x2, 0, 0}, 11209 {0x56, 0xff, 0xff, 1, 1}, 11210 {0x57, 0, 0, 0, 0}, 11211 {0x58, 0x83, 0x83, 0, 0}, 11212 {0x59, 0x77, 0x77, 1, 1}, 11213 {0x5A, 0, 0, 0, 0}, 11214 {0x5B, 0x2, 0x2, 0, 0}, 11215 {0x5C, 0x88, 0x88, 0, 0}, 11216 {0x5D, 0, 0, 0, 0}, 11217 {0x5E, 0x8, 0x8, 0, 0}, 11218 {0x5F, 0x77, 0x77, 1, 1}, 11219 {0x60, 0x1, 0x1, 0, 0}, 11220 {0x61, 0, 0, 0, 0}, 11221 {0x62, 0x7, 0x7, 0, 0}, 11222 {0x63, 0, 0, 0, 0}, 11223 {0x64, 0x7, 0x7, 0, 0}, 11224 {0x65, 0, 0, 0, 0}, 11225 {0x66, 0, 0, 0, 0}, 11226 {0x67, 0, 0, 1, 1}, 11227 {0x68, 0, 0, 0, 0}, 11228 {0x69, 0xa, 0xa, 0, 0}, 11229 {0x6A, 0, 0, 0, 0}, 11230 {0x6B, 0, 0, 0, 0}, 11231 {0x6C, 0, 0, 0, 0}, 11232 {0x6D, 0, 0, 0, 0}, 11233 {0x6E, 0, 0, 0, 0}, 11234 {0x6F, 0, 0, 0, 0}, 11235 {0x70, 0, 0, 0, 0}, 11236 {0x71, 0x2, 0x2, 0, 0}, 11237 {0x72, 0, 0, 0, 0}, 11238 {0x73, 0, 0, 0, 0}, 11239 {0x74, 0xe, 0xe, 0, 0}, 11240 {0x75, 0xe, 0xe, 0, 0}, 11241 {0x76, 0xe, 0xe, 0, 0}, 11242 {0x77, 0x13, 0x13, 0, 0}, 11243 {0x78, 0x13, 0x13, 0, 0}, 11244 {0x79, 0x1b, 0x1b, 0, 0}, 11245 {0x7A, 0x1b, 0x1b, 0, 0}, 11246 {0x7B, 0x55, 0x55, 0, 0}, 11247 {0x7C, 0x5b, 0x5b, 0, 0}, 11248 {0x7D, 0x30, 0x30, 1, 1}, 11249 {0x7E, 0, 0, 0, 0}, 11250 {0x7F, 0, 0, 0, 0}, 11251 {0x80, 0, 0, 0, 0}, 11252 {0x81, 0, 0, 0, 0}, 11253 {0x82, 0, 0, 0, 0}, 11254 {0x83, 0, 0, 0, 0}, 11255 {0x84, 0, 0, 0, 0}, 11256 {0x85, 0, 0, 0, 0}, 11257 {0x86, 0, 0, 0, 0}, 11258 {0x87, 0, 0, 0, 0}, 11259 {0x88, 0, 0, 0, 0}, 11260 {0x89, 0, 0, 0, 0}, 11261 {0x8A, 0, 0, 0, 0}, 11262 {0x8B, 0, 0, 0, 0}, 11263 {0x8C, 0, 0, 0, 0}, 11264 {0x8D, 0, 0, 0, 0}, 11265 {0x8E, 0, 0, 0, 0}, 11266 {0x8F, 0, 0, 0, 0}, 11267 {0x90, 0, 0, 0, 0}, 11268 {0x91, 0, 0, 0, 0}, 11269 {0x92, 0, 0, 0, 0}, 11270 {0x93, 0x70, 0x70, 0, 0}, 11271 {0x94, 0x70, 0x70, 0, 0}, 11272 {0x95, 0x70, 0x70, 0, 0}, 11273 {0x96, 0x70, 0x70, 0, 0}, 11274 {0x97, 0x70, 0x70, 0, 0}, 11275 {0x98, 0x70, 0x70, 0, 0}, 11276 {0x99, 0x70, 0x70, 0, 0}, 11277 {0x9A, 0x70, 0x70, 0, 0}, 11278 {0xFFFF, 0, 0, 0, 0}, 11279 }; 11280 11281 static const struct radio_regs regs_RX_2056_rev11[] = { 11282 {0x02, 0, 0, 0, 0}, 11283 {0x03, 0, 0, 0, 0}, 11284 {0x04, 0, 0, 0, 0}, 11285 {0x05, 0, 0, 0, 0}, 11286 {0x06, 0, 0, 0, 0}, 11287 {0x07, 0, 0, 0, 0}, 11288 {0x08, 0, 0, 0, 0}, 11289 {0x09, 0, 0, 0, 0}, 11290 {0x0A, 0, 0, 0, 0}, 11291 {0x0B, 0, 0, 0, 0}, 11292 {0x0C, 0, 0, 0, 0}, 11293 {0x0D, 0, 0, 0, 0}, 11294 {0x0E, 0, 0, 0, 0}, 11295 {0x0F, 0, 0, 0, 0}, 11296 {0x10, 0, 0, 0, 0}, 11297 {0x11, 0, 0, 0, 0}, 11298 {0x12, 0, 0, 0, 0}, 11299 {0x13, 0, 0, 0, 0}, 11300 {0x14, 0, 0, 0, 0}, 11301 {0x15, 0, 0, 0, 0}, 11302 {0x16, 0, 0, 0, 0}, 11303 {0x17, 0, 0, 0, 0}, 11304 {0x18, 0, 0, 0, 0}, 11305 {0x19, 0, 0, 0, 0}, 11306 {0x1A, 0, 0, 0, 0}, 11307 {0x1B, 0, 0, 0, 0}, 11308 {0x1C, 0, 0, 0, 0}, 11309 {0x1D, 0, 0, 0, 0}, 11310 {0x1E, 0, 0, 0, 0}, 11311 {0x1F, 0, 0, 0, 0}, 11312 {0x20, 0x3, 0x3, 0, 0}, 11313 {0x21, 0, 0, 0, 0}, 11314 {0x22, 0, 0, 0, 0}, 11315 {0x23, 0x90, 0x90, 0, 0}, 11316 {0x24, 0x55, 0x55, 0, 0}, 11317 {0x25, 0x15, 0x15, 0, 0}, 11318 {0x26, 0x5, 0x5, 0, 0}, 11319 {0x27, 0x15, 0x15, 0, 0}, 11320 {0x28, 0x5, 0x5, 0, 0}, 11321 {0x29, 0x20, 0x20, 0, 0}, 11322 {0x2A, 0x11, 0x11, 0, 0}, 11323 {0x2B, 0x90, 0x90, 0, 0}, 11324 {0x2C, 0, 0, 0, 0}, 11325 {0x2D, 0x88, 0x88, 0, 0}, 11326 {0x2E, 0x32, 0x32, 0, 0}, 11327 {0x2F, 0x77, 0x77, 0, 0}, 11328 {0x30, 0x17, 0x17, 1, 1}, 11329 {0x31, 0xff, 0xff, 1, 1}, 11330 {0x32, 0x20, 0x20, 0, 0}, 11331 {0x33, 0, 0, 0, 0}, 11332 {0x34, 0x88, 0x88, 0, 0}, 11333 {0x35, 0x32, 0x32, 0, 0}, 11334 {0x36, 0x77, 0x77, 0, 0}, 11335 {0x37, 0x17, 0x17, 1, 1}, 11336 {0x38, 0xf0, 0xf0, 1, 1}, 11337 {0x39, 0x20, 0x20, 0, 0}, 11338 {0x3A, 0x8, 0x8, 0, 0}, 11339 {0x3B, 0x55, 0x55, 1, 1}, 11340 {0x3C, 0, 0, 0, 0}, 11341 {0x3D, 0x88, 0x88, 1, 1}, 11342 {0x3E, 0, 0, 0, 0}, 11343 {0x3F, 0x44, 0x44, 0, 0}, 11344 {0x40, 0x7, 0x7, 1, 1}, 11345 {0x41, 0x6, 0x6, 0, 0}, 11346 {0x42, 0x4, 0x4, 0, 0}, 11347 {0x43, 0, 0, 0, 0}, 11348 {0x44, 0x8, 0x8, 0, 0}, 11349 {0x45, 0x55, 0x55, 1, 1}, 11350 {0x46, 0, 0, 0, 0}, 11351 {0x47, 0x11, 0x11, 0, 0}, 11352 {0x48, 0, 0, 0, 0}, 11353 {0x49, 0x44, 0x44, 0, 0}, 11354 {0x4A, 0x7, 0x7, 0, 0}, 11355 {0x4B, 0x6, 0x6, 0, 0}, 11356 {0x4C, 0x4, 0x4, 0, 0}, 11357 {0x4D, 0, 0, 0, 0}, 11358 {0x4E, 0, 0, 0, 0}, 11359 {0x4F, 0x26, 0x26, 1, 1}, 11360 {0x50, 0x26, 0x26, 1, 1}, 11361 {0x51, 0xf, 0xf, 1, 1}, 11362 {0x52, 0xf, 0xf, 1, 1}, 11363 {0x53, 0x44, 0x44, 0, 0}, 11364 {0x54, 0, 0, 0, 0}, 11365 {0x55, 0, 0, 0, 0}, 11366 {0x56, 0x8, 0x8, 0, 0}, 11367 {0x57, 0x8, 0x8, 0, 0}, 11368 {0x58, 0x7, 0x7, 0, 0}, 11369 {0x59, 0x22, 0x22, 0, 0}, 11370 {0x5A, 0x22, 0x22, 0, 0}, 11371 {0x5B, 0x2, 0x2, 0, 0}, 11372 {0x5C, 0x4, 0x4, 1, 1}, 11373 {0x5D, 0x7, 0x7, 0, 0}, 11374 {0x5E, 0x55, 0x55, 0, 0}, 11375 {0x5F, 0x23, 0x23, 0, 0}, 11376 {0x60, 0x41, 0x41, 0, 0}, 11377 {0x61, 0x1, 0x1, 0, 0}, 11378 {0x62, 0xa, 0xa, 0, 0}, 11379 {0x63, 0, 0, 0, 0}, 11380 {0x64, 0, 0, 0, 0}, 11381 {0x65, 0, 0, 0, 0}, 11382 {0x66, 0, 0, 0, 0}, 11383 {0x67, 0, 0, 0, 0}, 11384 {0x68, 0, 0, 0, 0}, 11385 {0x69, 0, 0, 0, 0}, 11386 {0x6A, 0, 0, 0, 0}, 11387 {0x6B, 0xc, 0xc, 0, 0}, 11388 {0x6C, 0, 0, 0, 0}, 11389 {0x6D, 0, 0, 0, 0}, 11390 {0x6E, 0, 0, 0, 0}, 11391 {0x6F, 0, 0, 0, 0}, 11392 {0x70, 0, 0, 0, 0}, 11393 {0x71, 0, 0, 0, 0}, 11394 {0x72, 0x22, 0x22, 0, 0}, 11395 {0x73, 0x22, 0x22, 0, 0}, 11396 {0x74, 0, 0, 1, 1}, 11397 {0x75, 0xa, 0xa, 0, 0}, 11398 {0x76, 0x1, 0x1, 0, 0}, 11399 {0x77, 0x22, 0x22, 0, 0}, 11400 {0x78, 0x30, 0x30, 0, 0}, 11401 {0x79, 0, 0, 0, 0}, 11402 {0x7A, 0, 0, 0, 0}, 11403 {0x7B, 0, 0, 0, 0}, 11404 {0x7C, 0, 0, 0, 0}, 11405 {0x7D, 0x5, 0x5, 1, 1}, 11406 {0x7E, 0, 0, 0, 0}, 11407 {0x7F, 0, 0, 0, 0}, 11408 {0x80, 0, 0, 0, 0}, 11409 {0x81, 0, 0, 0, 0}, 11410 {0x82, 0, 0, 0, 0}, 11411 {0x83, 0, 0, 0, 0}, 11412 {0x84, 0, 0, 0, 0}, 11413 {0x85, 0, 0, 0, 0}, 11414 {0x86, 0, 0, 0, 0}, 11415 {0x87, 0, 0, 0, 0}, 11416 {0x88, 0, 0, 0, 0}, 11417 {0x89, 0, 0, 0, 0}, 11418 {0x8A, 0, 0, 0, 0}, 11419 {0x8B, 0, 0, 0, 0}, 11420 {0x8C, 0, 0, 0, 0}, 11421 {0x8D, 0, 0, 0, 0}, 11422 {0x8E, 0, 0, 0, 0}, 11423 {0x8F, 0, 0, 0, 0}, 11424 {0x90, 0, 0, 0, 0}, 11425 {0x91, 0, 0, 0, 0}, 11426 {0x92, 0, 0, 0, 0}, 11427 {0x93, 0, 0, 0, 0}, 11428 {0x94, 0, 0, 0, 0}, 11429 {0xFFFF, 0, 0, 0, 0}, 11430 }; 11431 11432 static struct radio_20xx_regs regs_2057_rev4[] = { 11433 {0x00, 0x84, 0}, 11434 {0x01, 0, 0}, 11435 {0x02, 0x60, 0}, 11436 {0x03, 0x1f, 0}, 11437 {0x04, 0x4, 0}, 11438 {0x05, 0x2, 0}, 11439 {0x06, 0x1, 0}, 11440 {0x07, 0x1, 0}, 11441 {0x08, 0x1, 0}, 11442 {0x09, 0x69, 0}, 11443 {0x0A, 0x66, 0}, 11444 {0x0B, 0x6, 0}, 11445 {0x0C, 0x18, 0}, 11446 {0x0D, 0x3, 0}, 11447 {0x0E, 0x20, 1}, 11448 {0x0F, 0x20, 0}, 11449 {0x10, 0, 0}, 11450 {0x11, 0x7c, 0}, 11451 {0x12, 0x42, 0}, 11452 {0x13, 0xbd, 0}, 11453 {0x14, 0x7, 0}, 11454 {0x15, 0xf7, 0}, 11455 {0x16, 0x8, 0}, 11456 {0x17, 0x17, 0}, 11457 {0x18, 0x7, 0}, 11458 {0x19, 0, 0}, 11459 {0x1A, 0x2, 0}, 11460 {0x1B, 0x13, 0}, 11461 {0x1C, 0x3e, 0}, 11462 {0x1D, 0x3e, 0}, 11463 {0x1E, 0x96, 0}, 11464 {0x1F, 0x4, 0}, 11465 {0x20, 0, 0}, 11466 {0x21, 0, 0}, 11467 {0x22, 0x17, 0}, 11468 {0x23, 0x4, 0}, 11469 {0x24, 0x1, 0}, 11470 {0x25, 0x6, 0}, 11471 {0x26, 0x4, 0}, 11472 {0x27, 0xd, 0}, 11473 {0x28, 0xd, 0}, 11474 {0x29, 0x30, 0}, 11475 {0x2A, 0x32, 0}, 11476 {0x2B, 0x8, 0}, 11477 {0x2C, 0x1c, 0}, 11478 {0x2D, 0x2, 0}, 11479 {0x2E, 0x4, 0}, 11480 {0x2F, 0x7f, 0}, 11481 {0x30, 0x27, 0}, 11482 {0x31, 0, 1}, 11483 {0x32, 0, 1}, 11484 {0x33, 0, 1}, 11485 {0x34, 0, 0}, 11486 {0x35, 0x26, 1}, 11487 {0x36, 0x18, 0}, 11488 {0x37, 0x7, 0}, 11489 {0x38, 0x66, 0}, 11490 {0x39, 0x66, 0}, 11491 {0x3A, 0x66, 0}, 11492 {0x3B, 0x66, 0}, 11493 {0x3C, 0xff, 1}, 11494 {0x3D, 0xff, 1}, 11495 {0x3E, 0xff, 1}, 11496 {0x3F, 0xff, 1}, 11497 {0x40, 0x16, 0}, 11498 {0x41, 0x7, 0}, 11499 {0x42, 0x19, 0}, 11500 {0x43, 0x7, 0}, 11501 {0x44, 0x6, 0}, 11502 {0x45, 0x3, 0}, 11503 {0x46, 0x1, 0}, 11504 {0x47, 0x7, 0}, 11505 {0x48, 0x33, 0}, 11506 {0x49, 0x5, 0}, 11507 {0x4A, 0x77, 0}, 11508 {0x4B, 0x66, 0}, 11509 {0x4C, 0x66, 0}, 11510 {0x4D, 0, 0}, 11511 {0x4E, 0x4, 0}, 11512 {0x4F, 0xc, 0}, 11513 {0x50, 0, 0}, 11514 {0x51, 0x75, 0}, 11515 {0x56, 0x7, 0}, 11516 {0x57, 0, 0}, 11517 {0x58, 0, 0}, 11518 {0x59, 0xa8, 0}, 11519 {0x5A, 0, 0}, 11520 {0x5B, 0x1f, 0}, 11521 {0x5C, 0x30, 0}, 11522 {0x5D, 0x1, 0}, 11523 {0x5E, 0x30, 0}, 11524 {0x5F, 0x70, 0}, 11525 {0x60, 0, 0}, 11526 {0x61, 0, 0}, 11527 {0x62, 0x33, 1}, 11528 {0x63, 0x19, 0}, 11529 {0x64, 0x62, 0}, 11530 {0x65, 0, 0}, 11531 {0x66, 0x11, 0}, 11532 {0x69, 0, 0}, 11533 {0x6A, 0x7e, 0}, 11534 {0x6B, 0x3f, 0}, 11535 {0x6C, 0x7f, 0}, 11536 {0x6D, 0x78, 0}, 11537 {0x6E, 0xc8, 0}, 11538 {0x6F, 0x88, 0}, 11539 {0x70, 0x8, 0}, 11540 {0x71, 0xf, 0}, 11541 {0x72, 0xbc, 0}, 11542 {0x73, 0x8, 0}, 11543 {0x74, 0x60, 0}, 11544 {0x75, 0x1e, 0}, 11545 {0x76, 0x70, 0}, 11546 {0x77, 0, 0}, 11547 {0x78, 0, 0}, 11548 {0x79, 0, 0}, 11549 {0x7A, 0x33, 0}, 11550 {0x7B, 0x1e, 0}, 11551 {0x7C, 0x62, 0}, 11552 {0x7D, 0x11, 0}, 11553 {0x80, 0x3c, 0}, 11554 {0x81, 0x9c, 0}, 11555 {0x82, 0xa, 0}, 11556 {0x83, 0x9d, 0}, 11557 {0x84, 0xa, 0}, 11558 {0x85, 0, 0}, 11559 {0x86, 0x40, 0}, 11560 {0x87, 0x40, 0}, 11561 {0x88, 0x88, 0}, 11562 {0x89, 0x10, 0}, 11563 {0x8A, 0xf0, 1}, 11564 {0x8B, 0x10, 1}, 11565 {0x8C, 0xf0, 1}, 11566 {0x8D, 0, 0}, 11567 {0x8E, 0, 0}, 11568 {0x8F, 0x10, 0}, 11569 {0x90, 0x55, 0}, 11570 {0x91, 0x3f, 1}, 11571 {0x92, 0x36, 1}, 11572 {0x93, 0, 0}, 11573 {0x94, 0, 0}, 11574 {0x95, 0, 0}, 11575 {0x96, 0x87, 0}, 11576 {0x97, 0x11, 0}, 11577 {0x98, 0, 0}, 11578 {0x99, 0x33, 0}, 11579 {0x9A, 0x88, 0}, 11580 {0x9B, 0, 0}, 11581 {0x9C, 0x87, 0}, 11582 {0x9D, 0x11, 0}, 11583 {0x9E, 0, 0}, 11584 {0x9F, 0x33, 0}, 11585 {0xA0, 0x88, 0}, 11586 {0xA1, 0xe1, 0}, 11587 {0xA2, 0x3f, 0}, 11588 {0xA3, 0x44, 0}, 11589 {0xA4, 0x8c, 1}, 11590 {0xA5, 0x6d, 0}, 11591 {0xA6, 0x22, 0}, 11592 {0xA7, 0xbe, 0}, 11593 {0xA8, 0x55, 1}, 11594 {0xA9, 0xc, 0}, 11595 {0xAA, 0xc, 0}, 11596 {0xAB, 0xaa, 0}, 11597 {0xAC, 0x2, 0}, 11598 {0xAD, 0, 0}, 11599 {0xAE, 0x10, 0}, 11600 {0xAF, 0x1, 1}, 11601 {0xB0, 0, 0}, 11602 {0xB1, 0, 0}, 11603 {0xB2, 0x80, 0}, 11604 {0xB3, 0x60, 0}, 11605 {0xB4, 0x44, 0}, 11606 {0xB5, 0x55, 0}, 11607 {0xB6, 0x1, 0}, 11608 {0xB7, 0x55, 0}, 11609 {0xB8, 0x1, 0}, 11610 {0xB9, 0x5, 0}, 11611 {0xBA, 0x55, 0}, 11612 {0xBB, 0x55, 0}, 11613 {0xC1, 0, 0}, 11614 {0xC2, 0, 0}, 11615 {0xC3, 0, 0}, 11616 {0xC4, 0, 0}, 11617 {0xC5, 0, 0}, 11618 {0xC6, 0, 0}, 11619 {0xC7, 0, 0}, 11620 {0xC8, 0, 0}, 11621 {0xC9, 0, 0}, 11622 {0xCA, 0, 0}, 11623 {0xCB, 0, 0}, 11624 {0xCC, 0, 0}, 11625 {0xCD, 0, 0}, 11626 {0xCE, 0x5e, 0}, 11627 {0xCF, 0xc, 0}, 11628 {0xD0, 0xc, 0}, 11629 {0xD1, 0xc, 0}, 11630 {0xD2, 0, 0}, 11631 {0xD3, 0x2b, 0}, 11632 {0xD4, 0xc, 0}, 11633 {0xD5, 0, 0}, 11634 {0xD6, 0x75, 0}, 11635 {0xDB, 0x7, 0}, 11636 {0xDC, 0, 0}, 11637 {0xDD, 0, 0}, 11638 {0xDE, 0xa8, 0}, 11639 {0xDF, 0, 0}, 11640 {0xE0, 0x1f, 0}, 11641 {0xE1, 0x30, 0}, 11642 {0xE2, 0x1, 0}, 11643 {0xE3, 0x30, 0}, 11644 {0xE4, 0x70, 0}, 11645 {0xE5, 0, 0}, 11646 {0xE6, 0, 0}, 11647 {0xE7, 0x33, 0}, 11648 {0xE8, 0x19, 0}, 11649 {0xE9, 0x62, 0}, 11650 {0xEA, 0, 0}, 11651 {0xEB, 0x11, 0}, 11652 {0xEE, 0, 0}, 11653 {0xEF, 0x7e, 0}, 11654 {0xF0, 0x3f, 0}, 11655 {0xF1, 0x7f, 0}, 11656 {0xF2, 0x78, 0}, 11657 {0xF3, 0xc8, 0}, 11658 {0xF4, 0x88, 0}, 11659 {0xF5, 0x8, 0}, 11660 {0xF6, 0xf, 0}, 11661 {0xF7, 0xbc, 0}, 11662 {0xF8, 0x8, 0}, 11663 {0xF9, 0x60, 0}, 11664 {0xFA, 0x1e, 0}, 11665 {0xFB, 0x70, 0}, 11666 {0xFC, 0, 0}, 11667 {0xFD, 0, 0}, 11668 {0xFE, 0, 0}, 11669 {0xFF, 0x33, 0}, 11670 {0x100, 0x1e, 0}, 11671 {0x101, 0x62, 0}, 11672 {0x102, 0x11, 0}, 11673 {0x105, 0x3c, 0}, 11674 {0x106, 0x9c, 0}, 11675 {0x107, 0xa, 0}, 11676 {0x108, 0x9d, 0}, 11677 {0x109, 0xa, 0}, 11678 {0x10A, 0, 0}, 11679 {0x10B, 0x40, 0}, 11680 {0x10C, 0x40, 0}, 11681 {0x10D, 0x88, 0}, 11682 {0x10E, 0x10, 0}, 11683 {0x10F, 0xf0, 1}, 11684 {0x110, 0x10, 1}, 11685 {0x111, 0xf0, 1}, 11686 {0x112, 0, 0}, 11687 {0x113, 0, 0}, 11688 {0x114, 0x10, 0}, 11689 {0x115, 0x55, 0}, 11690 {0x116, 0x3f, 1}, 11691 {0x117, 0x36, 1}, 11692 {0x118, 0, 0}, 11693 {0x119, 0, 0}, 11694 {0x11A, 0, 0}, 11695 {0x11B, 0x87, 0}, 11696 {0x11C, 0x11, 0}, 11697 {0x11D, 0, 0}, 11698 {0x11E, 0x33, 0}, 11699 {0x11F, 0x88, 0}, 11700 {0x120, 0, 0}, 11701 {0x121, 0x87, 0}, 11702 {0x122, 0x11, 0}, 11703 {0x123, 0, 0}, 11704 {0x124, 0x33, 0}, 11705 {0x125, 0x88, 0}, 11706 {0x126, 0xe1, 0}, 11707 {0x127, 0x3f, 0}, 11708 {0x128, 0x44, 0}, 11709 {0x129, 0x8c, 1}, 11710 {0x12A, 0x6d, 0}, 11711 {0x12B, 0x22, 0}, 11712 {0x12C, 0xbe, 0}, 11713 {0x12D, 0x55, 1}, 11714 {0x12E, 0xc, 0}, 11715 {0x12F, 0xc, 0}, 11716 {0x130, 0xaa, 0}, 11717 {0x131, 0x2, 0}, 11718 {0x132, 0, 0}, 11719 {0x133, 0x10, 0}, 11720 {0x134, 0x1, 1}, 11721 {0x135, 0, 0}, 11722 {0x136, 0, 0}, 11723 {0x137, 0x80, 0}, 11724 {0x138, 0x60, 0}, 11725 {0x139, 0x44, 0}, 11726 {0x13A, 0x55, 0}, 11727 {0x13B, 0x1, 0}, 11728 {0x13C, 0x55, 0}, 11729 {0x13D, 0x1, 0}, 11730 {0x13E, 0x5, 0}, 11731 {0x13F, 0x55, 0}, 11732 {0x140, 0x55, 0}, 11733 {0x146, 0, 0}, 11734 {0x147, 0, 0}, 11735 {0x148, 0, 0}, 11736 {0x149, 0, 0}, 11737 {0x14A, 0, 0}, 11738 {0x14B, 0, 0}, 11739 {0x14C, 0, 0}, 11740 {0x14D, 0, 0}, 11741 {0x14E, 0, 0}, 11742 {0x14F, 0, 0}, 11743 {0x150, 0, 0}, 11744 {0x151, 0, 0}, 11745 {0x152, 0, 0}, 11746 {0x153, 0, 0}, 11747 {0x154, 0xc, 0}, 11748 {0x155, 0xc, 0}, 11749 {0x156, 0xc, 0}, 11750 {0x157, 0, 0}, 11751 {0x158, 0x2b, 0}, 11752 {0x159, 0x84, 0}, 11753 {0x15A, 0x15, 0}, 11754 {0x15B, 0xf, 0}, 11755 {0x15C, 0, 0}, 11756 {0x15D, 0, 0}, 11757 {0x15E, 0, 1}, 11758 {0x15F, 0, 1}, 11759 {0x160, 0, 1}, 11760 {0x161, 0, 1}, 11761 {0x162, 0, 1}, 11762 {0x163, 0, 1}, 11763 {0x164, 0, 0}, 11764 {0x165, 0, 0}, 11765 {0x166, 0, 0}, 11766 {0x167, 0, 0}, 11767 {0x168, 0, 0}, 11768 {0x169, 0x2, 1}, 11769 {0x16A, 0, 1}, 11770 {0x16B, 0, 1}, 11771 {0x16C, 0, 1}, 11772 {0x16D, 0, 0}, 11773 {0x170, 0, 0}, 11774 {0x171, 0x77, 0}, 11775 {0x172, 0x77, 0}, 11776 {0x173, 0x77, 0}, 11777 {0x174, 0x77, 0}, 11778 {0x175, 0, 0}, 11779 {0x176, 0x3, 0}, 11780 {0x177, 0x37, 0}, 11781 {0x178, 0x3, 0}, 11782 {0x179, 0, 0}, 11783 {0x17A, 0x21, 0}, 11784 {0x17B, 0x21, 0}, 11785 {0x17C, 0, 0}, 11786 {0x17D, 0xaa, 0}, 11787 {0x17E, 0, 0}, 11788 {0x17F, 0xaa, 0}, 11789 {0x180, 0, 0}, 11790 {0x190, 0, 0}, 11791 {0x191, 0x77, 0}, 11792 {0x192, 0x77, 0}, 11793 {0x193, 0x77, 0}, 11794 {0x194, 0x77, 0}, 11795 {0x195, 0, 0}, 11796 {0x196, 0x3, 0}, 11797 {0x197, 0x37, 0}, 11798 {0x198, 0x3, 0}, 11799 {0x199, 0, 0}, 11800 {0x19A, 0x21, 0}, 11801 {0x19B, 0x21, 0}, 11802 {0x19C, 0, 0}, 11803 {0x19D, 0xaa, 0}, 11804 {0x19E, 0, 0}, 11805 {0x19F, 0xaa, 0}, 11806 {0x1A0, 0, 0}, 11807 {0x1A1, 0x2, 0}, 11808 {0x1A2, 0xf, 0}, 11809 {0x1A3, 0xf, 0}, 11810 {0x1A4, 0, 1}, 11811 {0x1A5, 0, 1}, 11812 {0x1A6, 0, 1}, 11813 {0x1A7, 0x2, 0}, 11814 {0x1A8, 0xf, 0}, 11815 {0x1A9, 0xf, 0}, 11816 {0x1AA, 0, 1}, 11817 {0x1AB, 0, 1}, 11818 {0x1AC, 0, 1}, 11819 {0xFFFF, 0, 0}, 11820 }; 11821 11822 static struct radio_20xx_regs regs_2057_rev5[] = { 11823 {0x00, 0, 1}, 11824 {0x01, 0x57, 1}, 11825 {0x02, 0x20, 1}, 11826 {0x03, 0x1f, 0}, 11827 {0x04, 0x4, 0}, 11828 {0x05, 0x2, 0}, 11829 {0x06, 0x1, 0}, 11830 {0x07, 0x1, 0}, 11831 {0x08, 0x1, 0}, 11832 {0x09, 0x69, 0}, 11833 {0x0A, 0x66, 0}, 11834 {0x0B, 0x6, 0}, 11835 {0x0C, 0x18, 0}, 11836 {0x0D, 0x3, 0}, 11837 {0x0E, 0x20, 0}, 11838 {0x0F, 0x20, 0}, 11839 {0x10, 0, 0}, 11840 {0x11, 0x7c, 0}, 11841 {0x12, 0x42, 0}, 11842 {0x13, 0xbd, 0}, 11843 {0x14, 0x7, 0}, 11844 {0x15, 0x87, 0}, 11845 {0x16, 0x8, 0}, 11846 {0x17, 0x17, 0}, 11847 {0x18, 0x7, 0}, 11848 {0x19, 0, 0}, 11849 {0x1A, 0x2, 0}, 11850 {0x1B, 0x13, 0}, 11851 {0x1C, 0x3e, 0}, 11852 {0x1D, 0x3e, 0}, 11853 {0x1E, 0x96, 0}, 11854 {0x1F, 0x4, 0}, 11855 {0x20, 0, 0}, 11856 {0x21, 0, 0}, 11857 {0x22, 0x17, 0}, 11858 {0x23, 0x6, 1}, 11859 {0x24, 0x1, 0}, 11860 {0x25, 0x6, 0}, 11861 {0x26, 0x4, 0}, 11862 {0x27, 0xd, 0}, 11863 {0x28, 0xd, 0}, 11864 {0x29, 0x30, 0}, 11865 {0x2A, 0x32, 0}, 11866 {0x2B, 0x8, 0}, 11867 {0x2C, 0x1c, 0}, 11868 {0x2D, 0x2, 0}, 11869 {0x2E, 0x4, 0}, 11870 {0x2F, 0x7f, 0}, 11871 {0x30, 0x27, 0}, 11872 {0x31, 0, 1}, 11873 {0x32, 0, 1}, 11874 {0x33, 0, 1}, 11875 {0x34, 0, 0}, 11876 {0x35, 0x20, 0}, 11877 {0x36, 0x18, 0}, 11878 {0x37, 0x7, 0}, 11879 {0x38, 0x66, 0}, 11880 {0x39, 0x66, 0}, 11881 {0x3C, 0xff, 0}, 11882 {0x3D, 0xff, 0}, 11883 {0x40, 0x16, 0}, 11884 {0x41, 0x7, 0}, 11885 {0x45, 0x3, 0}, 11886 {0x46, 0x1, 0}, 11887 {0x47, 0x7, 0}, 11888 {0x4B, 0x66, 0}, 11889 {0x4C, 0x66, 0}, 11890 {0x4D, 0, 0}, 11891 {0x4E, 0x4, 0}, 11892 {0x4F, 0xc, 0}, 11893 {0x50, 0, 0}, 11894 {0x51, 0x70, 1}, 11895 {0x56, 0x7, 0}, 11896 {0x57, 0, 0}, 11897 {0x58, 0, 0}, 11898 {0x59, 0x88, 1}, 11899 {0x5A, 0, 0}, 11900 {0x5B, 0x1f, 0}, 11901 {0x5C, 0x20, 1}, 11902 {0x5D, 0x1, 0}, 11903 {0x5E, 0x30, 0}, 11904 {0x5F, 0x70, 0}, 11905 {0x60, 0, 0}, 11906 {0x61, 0, 0}, 11907 {0x62, 0x33, 1}, 11908 {0x63, 0xf, 1}, 11909 {0x64, 0xf, 1}, 11910 {0x65, 0, 0}, 11911 {0x66, 0x11, 0}, 11912 {0x80, 0x3c, 0}, 11913 {0x81, 0x1, 1}, 11914 {0x82, 0xa, 0}, 11915 {0x85, 0, 0}, 11916 {0x86, 0x40, 0}, 11917 {0x87, 0x40, 0}, 11918 {0x88, 0x88, 0}, 11919 {0x89, 0x10, 0}, 11920 {0x8A, 0xf0, 0}, 11921 {0x8B, 0x10, 0}, 11922 {0x8C, 0xf0, 0}, 11923 {0x8F, 0x10, 0}, 11924 {0x90, 0x55, 0}, 11925 {0x91, 0x3f, 1}, 11926 {0x92, 0x36, 1}, 11927 {0x93, 0, 0}, 11928 {0x94, 0, 0}, 11929 {0x95, 0, 0}, 11930 {0x96, 0x87, 0}, 11931 {0x97, 0x11, 0}, 11932 {0x98, 0, 0}, 11933 {0x99, 0x33, 0}, 11934 {0x9A, 0x88, 0}, 11935 {0xA1, 0x20, 1}, 11936 {0xA2, 0x3f, 0}, 11937 {0xA3, 0x44, 0}, 11938 {0xA4, 0x8c, 0}, 11939 {0xA5, 0x6c, 0}, 11940 {0xA6, 0x22, 0}, 11941 {0xA7, 0xbe, 0}, 11942 {0xA8, 0x55, 0}, 11943 {0xAA, 0xc, 0}, 11944 {0xAB, 0xaa, 0}, 11945 {0xAC, 0x2, 0}, 11946 {0xAD, 0, 0}, 11947 {0xAE, 0x10, 0}, 11948 {0xAF, 0x1, 0}, 11949 {0xB0, 0, 0}, 11950 {0xB1, 0, 0}, 11951 {0xB2, 0x80, 0}, 11952 {0xB3, 0x60, 0}, 11953 {0xB4, 0x44, 0}, 11954 {0xB5, 0x55, 0}, 11955 {0xB6, 0x1, 0}, 11956 {0xB7, 0x55, 0}, 11957 {0xB8, 0x1, 0}, 11958 {0xB9, 0x5, 0}, 11959 {0xBA, 0x55, 0}, 11960 {0xBB, 0x55, 0}, 11961 {0xC3, 0, 0}, 11962 {0xC4, 0, 0}, 11963 {0xC5, 0, 0}, 11964 {0xC6, 0, 0}, 11965 {0xC7, 0, 0}, 11966 {0xC8, 0, 0}, 11967 {0xC9, 0, 0}, 11968 {0xCA, 0, 0}, 11969 {0xCB, 0, 0}, 11970 {0xCD, 0, 0}, 11971 {0xCE, 0x5e, 0}, 11972 {0xCF, 0xc, 0}, 11973 {0xD0, 0xc, 0}, 11974 {0xD1, 0xc, 0}, 11975 {0xD2, 0, 0}, 11976 {0xD3, 0x2b, 0}, 11977 {0xD4, 0xc, 0}, 11978 {0xD5, 0, 0}, 11979 {0xD6, 0x70, 1}, 11980 {0xDB, 0x7, 0}, 11981 {0xDC, 0, 0}, 11982 {0xDD, 0, 0}, 11983 {0xDE, 0x88, 1}, 11984 {0xDF, 0, 0}, 11985 {0xE0, 0x1f, 0}, 11986 {0xE1, 0x20, 1}, 11987 {0xE2, 0x1, 0}, 11988 {0xE3, 0x30, 0}, 11989 {0xE4, 0x70, 0}, 11990 {0xE5, 0, 0}, 11991 {0xE6, 0, 0}, 11992 {0xE7, 0x33, 0}, 11993 {0xE8, 0xf, 1}, 11994 {0xE9, 0xf, 1}, 11995 {0xEA, 0, 0}, 11996 {0xEB, 0x11, 0}, 11997 {0x105, 0x3c, 0}, 11998 {0x106, 0x1, 1}, 11999 {0x107, 0xa, 0}, 12000 {0x10A, 0, 0}, 12001 {0x10B, 0x40, 0}, 12002 {0x10C, 0x40, 0}, 12003 {0x10D, 0x88, 0}, 12004 {0x10E, 0x10, 0}, 12005 {0x10F, 0xf0, 0}, 12006 {0x110, 0x10, 0}, 12007 {0x111, 0xf0, 0}, 12008 {0x114, 0x10, 0}, 12009 {0x115, 0x55, 0}, 12010 {0x116, 0x3f, 1}, 12011 {0x117, 0x36, 1}, 12012 {0x118, 0, 0}, 12013 {0x119, 0, 0}, 12014 {0x11A, 0, 0}, 12015 {0x11B, 0x87, 0}, 12016 {0x11C, 0x11, 0}, 12017 {0x11D, 0, 0}, 12018 {0x11E, 0x33, 0}, 12019 {0x11F, 0x88, 0}, 12020 {0x126, 0x20, 1}, 12021 {0x127, 0x3f, 0}, 12022 {0x128, 0x44, 0}, 12023 {0x129, 0x8c, 0}, 12024 {0x12A, 0x6c, 0}, 12025 {0x12B, 0x22, 0}, 12026 {0x12C, 0xbe, 0}, 12027 {0x12D, 0x55, 0}, 12028 {0x12F, 0xc, 0}, 12029 {0x130, 0xaa, 0}, 12030 {0x131, 0x2, 0}, 12031 {0x132, 0, 0}, 12032 {0x133, 0x10, 0}, 12033 {0x134, 0x1, 0}, 12034 {0x135, 0, 0}, 12035 {0x136, 0, 0}, 12036 {0x137, 0x80, 0}, 12037 {0x138, 0x60, 0}, 12038 {0x139, 0x44, 0}, 12039 {0x13A, 0x55, 0}, 12040 {0x13B, 0x1, 0}, 12041 {0x13C, 0x55, 0}, 12042 {0x13D, 0x1, 0}, 12043 {0x13E, 0x5, 0}, 12044 {0x13F, 0x55, 0}, 12045 {0x140, 0x55, 0}, 12046 {0x148, 0, 0}, 12047 {0x149, 0, 0}, 12048 {0x14A, 0, 0}, 12049 {0x14B, 0, 0}, 12050 {0x14C, 0, 0}, 12051 {0x14D, 0, 0}, 12052 {0x14E, 0, 0}, 12053 {0x14F, 0, 0}, 12054 {0x150, 0, 0}, 12055 {0x154, 0xc, 0}, 12056 {0x155, 0xc, 0}, 12057 {0x156, 0xc, 0}, 12058 {0x157, 0, 0}, 12059 {0x158, 0x2b, 0}, 12060 {0x159, 0x84, 0}, 12061 {0x15A, 0x15, 0}, 12062 {0x15B, 0xf, 0}, 12063 {0x15C, 0, 0}, 12064 {0x15D, 0, 0}, 12065 {0x15E, 0, 1}, 12066 {0x15F, 0, 1}, 12067 {0x160, 0, 1}, 12068 {0x161, 0, 1}, 12069 {0x162, 0, 1}, 12070 {0x163, 0, 1}, 12071 {0x164, 0, 0}, 12072 {0x165, 0, 0}, 12073 {0x166, 0, 0}, 12074 {0x167, 0, 0}, 12075 {0x168, 0, 0}, 12076 {0x169, 0, 0}, 12077 {0x16A, 0, 1}, 12078 {0x16B, 0, 1}, 12079 {0x16C, 0, 1}, 12080 {0x16D, 0, 0}, 12081 {0x170, 0, 0}, 12082 {0x171, 0x77, 0}, 12083 {0x172, 0x77, 0}, 12084 {0x173, 0x77, 0}, 12085 {0x174, 0x77, 0}, 12086 {0x175, 0, 0}, 12087 {0x176, 0x3, 0}, 12088 {0x177, 0x37, 0}, 12089 {0x178, 0x3, 0}, 12090 {0x179, 0, 0}, 12091 {0x17B, 0x21, 0}, 12092 {0x17C, 0, 0}, 12093 {0x17D, 0xaa, 0}, 12094 {0x17E, 0, 0}, 12095 {0x190, 0, 0}, 12096 {0x191, 0x77, 0}, 12097 {0x192, 0x77, 0}, 12098 {0x193, 0x77, 0}, 12099 {0x194, 0x77, 0}, 12100 {0x195, 0, 0}, 12101 {0x196, 0x3, 0}, 12102 {0x197, 0x37, 0}, 12103 {0x198, 0x3, 0}, 12104 {0x199, 0, 0}, 12105 {0x19B, 0x21, 0}, 12106 {0x19C, 0, 0}, 12107 {0x19D, 0xaa, 0}, 12108 {0x19E, 0, 0}, 12109 {0x1A1, 0x2, 0}, 12110 {0x1A2, 0xf, 0}, 12111 {0x1A3, 0xf, 0}, 12112 {0x1A4, 0, 1}, 12113 {0x1A5, 0, 1}, 12114 {0x1A6, 0, 1}, 12115 {0x1A7, 0x2, 0}, 12116 {0x1A8, 0xf, 0}, 12117 {0x1A9, 0xf, 0}, 12118 {0x1AA, 0, 1}, 12119 {0x1AB, 0, 1}, 12120 {0x1AC, 0, 1}, 12121 {0x1AD, 0x84, 0}, 12122 {0x1AE, 0x60, 0}, 12123 {0x1AF, 0x47, 0}, 12124 {0x1B0, 0x47, 0}, 12125 {0x1B1, 0, 0}, 12126 {0x1B2, 0, 0}, 12127 {0x1B3, 0, 0}, 12128 {0x1B4, 0, 0}, 12129 {0x1B5, 0, 0}, 12130 {0x1B6, 0, 0}, 12131 {0x1B7, 0xc, 1}, 12132 {0x1B8, 0, 0}, 12133 {0x1B9, 0, 0}, 12134 {0x1BA, 0, 0}, 12135 {0x1BB, 0, 0}, 12136 {0x1BC, 0, 0}, 12137 {0x1BD, 0, 0}, 12138 {0x1BE, 0, 0}, 12139 {0x1BF, 0, 0}, 12140 {0x1C0, 0, 0}, 12141 {0x1C1, 0x1, 1}, 12142 {0x1C2, 0x80, 1}, 12143 {0x1C3, 0, 0}, 12144 {0x1C4, 0, 0}, 12145 {0x1C5, 0, 0}, 12146 {0x1C6, 0, 0}, 12147 {0x1C7, 0, 0}, 12148 {0x1C8, 0, 0}, 12149 {0x1C9, 0, 0}, 12150 {0x1CA, 0, 0}, 12151 {0xFFFF, 0, 0} 12152 }; 12153 12154 static struct radio_20xx_regs regs_2057_rev5v1[] = { 12155 {0x00, 0x15, 1}, 12156 {0x01, 0x57, 1}, 12157 {0x02, 0x20, 1}, 12158 {0x03, 0x1f, 0}, 12159 {0x04, 0x4, 0}, 12160 {0x05, 0x2, 0}, 12161 {0x06, 0x1, 0}, 12162 {0x07, 0x1, 0}, 12163 {0x08, 0x1, 0}, 12164 {0x09, 0x69, 0}, 12165 {0x0A, 0x66, 0}, 12166 {0x0B, 0x6, 0}, 12167 {0x0C, 0x18, 0}, 12168 {0x0D, 0x3, 0}, 12169 {0x0E, 0x20, 0}, 12170 {0x0F, 0x20, 0}, 12171 {0x10, 0, 0}, 12172 {0x11, 0x7c, 0}, 12173 {0x12, 0x42, 0}, 12174 {0x13, 0xbd, 0}, 12175 {0x14, 0x7, 0}, 12176 {0x15, 0x87, 0}, 12177 {0x16, 0x8, 0}, 12178 {0x17, 0x17, 0}, 12179 {0x18, 0x7, 0}, 12180 {0x19, 0, 0}, 12181 {0x1A, 0x2, 0}, 12182 {0x1B, 0x13, 0}, 12183 {0x1C, 0x3e, 0}, 12184 {0x1D, 0x3e, 0}, 12185 {0x1E, 0x96, 0}, 12186 {0x1F, 0x4, 0}, 12187 {0x20, 0, 0}, 12188 {0x21, 0, 0}, 12189 {0x22, 0x17, 0}, 12190 {0x23, 0x6, 1}, 12191 {0x24, 0x1, 0}, 12192 {0x25, 0x6, 0}, 12193 {0x26, 0x4, 0}, 12194 {0x27, 0xd, 0}, 12195 {0x28, 0xd, 0}, 12196 {0x29, 0x30, 0}, 12197 {0x2A, 0x32, 0}, 12198 {0x2B, 0x8, 0}, 12199 {0x2C, 0x1c, 0}, 12200 {0x2D, 0x2, 0}, 12201 {0x2E, 0x4, 0}, 12202 {0x2F, 0x7f, 0}, 12203 {0x30, 0x27, 0}, 12204 {0x31, 0, 1}, 12205 {0x32, 0, 1}, 12206 {0x33, 0, 1}, 12207 {0x34, 0, 0}, 12208 {0x35, 0x20, 0}, 12209 {0x36, 0x18, 0}, 12210 {0x37, 0x7, 0}, 12211 {0x38, 0x66, 0}, 12212 {0x39, 0x66, 0}, 12213 {0x3C, 0xff, 0}, 12214 {0x3D, 0xff, 0}, 12215 {0x40, 0x16, 0}, 12216 {0x41, 0x7, 0}, 12217 {0x45, 0x3, 0}, 12218 {0x46, 0x1, 0}, 12219 {0x47, 0x7, 0}, 12220 {0x4B, 0x66, 0}, 12221 {0x4C, 0x66, 0}, 12222 {0x4D, 0, 0}, 12223 {0x4E, 0x4, 0}, 12224 {0x4F, 0xc, 0}, 12225 {0x50, 0, 0}, 12226 {0x51, 0x70, 1}, 12227 {0x56, 0x7, 0}, 12228 {0x57, 0, 0}, 12229 {0x58, 0, 0}, 12230 {0x59, 0x88, 1}, 12231 {0x5A, 0, 0}, 12232 {0x5B, 0x1f, 0}, 12233 {0x5C, 0x20, 1}, 12234 {0x5D, 0x1, 0}, 12235 {0x5E, 0x30, 0}, 12236 {0x5F, 0x70, 0}, 12237 {0x60, 0, 0}, 12238 {0x61, 0, 0}, 12239 {0x62, 0x33, 1}, 12240 {0x63, 0xf, 1}, 12241 {0x64, 0xf, 1}, 12242 {0x65, 0, 0}, 12243 {0x66, 0x11, 0}, 12244 {0x80, 0x3c, 0}, 12245 {0x81, 0x1, 1}, 12246 {0x82, 0xa, 0}, 12247 {0x85, 0, 0}, 12248 {0x86, 0x40, 0}, 12249 {0x87, 0x40, 0}, 12250 {0x88, 0x88, 0}, 12251 {0x89, 0x10, 0}, 12252 {0x8A, 0xf0, 0}, 12253 {0x8B, 0x10, 0}, 12254 {0x8C, 0xf0, 0}, 12255 {0x8F, 0x10, 0}, 12256 {0x90, 0x55, 0}, 12257 {0x91, 0x3f, 1}, 12258 {0x92, 0x36, 1}, 12259 {0x93, 0, 0}, 12260 {0x94, 0, 0}, 12261 {0x95, 0, 0}, 12262 {0x96, 0x87, 0}, 12263 {0x97, 0x11, 0}, 12264 {0x98, 0, 0}, 12265 {0x99, 0x33, 0}, 12266 {0x9A, 0x88, 0}, 12267 {0xA1, 0x20, 1}, 12268 {0xA2, 0x3f, 0}, 12269 {0xA3, 0x44, 0}, 12270 {0xA4, 0x8c, 0}, 12271 {0xA5, 0x6c, 0}, 12272 {0xA6, 0x22, 0}, 12273 {0xA7, 0xbe, 0}, 12274 {0xA8, 0x55, 0}, 12275 {0xAA, 0xc, 0}, 12276 {0xAB, 0xaa, 0}, 12277 {0xAC, 0x2, 0}, 12278 {0xAD, 0, 0}, 12279 {0xAE, 0x10, 0}, 12280 {0xAF, 0x1, 0}, 12281 {0xB0, 0, 0}, 12282 {0xB1, 0, 0}, 12283 {0xB2, 0x80, 0}, 12284 {0xB3, 0x60, 0}, 12285 {0xB4, 0x44, 0}, 12286 {0xB5, 0x55, 0}, 12287 {0xB6, 0x1, 0}, 12288 {0xB7, 0x55, 0}, 12289 {0xB8, 0x1, 0}, 12290 {0xB9, 0x5, 0}, 12291 {0xBA, 0x55, 0}, 12292 {0xBB, 0x55, 0}, 12293 {0xC3, 0, 0}, 12294 {0xC4, 0, 0}, 12295 {0xC5, 0, 0}, 12296 {0xC6, 0, 0}, 12297 {0xC7, 0, 0}, 12298 {0xC8, 0, 0}, 12299 {0xC9, 0x1, 1}, 12300 {0xCA, 0, 0}, 12301 {0xCB, 0, 0}, 12302 {0xCD, 0, 0}, 12303 {0xCE, 0x5e, 0}, 12304 {0xCF, 0xc, 0}, 12305 {0xD0, 0xc, 0}, 12306 {0xD1, 0xc, 0}, 12307 {0xD2, 0, 0}, 12308 {0xD3, 0x2b, 0}, 12309 {0xD4, 0xc, 0}, 12310 {0xD5, 0, 0}, 12311 {0xD6, 0x70, 1}, 12312 {0xDB, 0x7, 0}, 12313 {0xDC, 0, 0}, 12314 {0xDD, 0, 0}, 12315 {0xDE, 0x88, 1}, 12316 {0xDF, 0, 0}, 12317 {0xE0, 0x1f, 0}, 12318 {0xE1, 0x20, 1}, 12319 {0xE2, 0x1, 0}, 12320 {0xE3, 0x30, 0}, 12321 {0xE4, 0x70, 0}, 12322 {0xE5, 0, 0}, 12323 {0xE6, 0, 0}, 12324 {0xE7, 0x33, 0}, 12325 {0xE8, 0xf, 1}, 12326 {0xE9, 0xf, 1}, 12327 {0xEA, 0, 0}, 12328 {0xEB, 0x11, 0}, 12329 {0x105, 0x3c, 0}, 12330 {0x106, 0x1, 1}, 12331 {0x107, 0xa, 0}, 12332 {0x10A, 0, 0}, 12333 {0x10B, 0x40, 0}, 12334 {0x10C, 0x40, 0}, 12335 {0x10D, 0x88, 0}, 12336 {0x10E, 0x10, 0}, 12337 {0x10F, 0xf0, 0}, 12338 {0x110, 0x10, 0}, 12339 {0x111, 0xf0, 0}, 12340 {0x114, 0x10, 0}, 12341 {0x115, 0x55, 0}, 12342 {0x116, 0x3f, 1}, 12343 {0x117, 0x36, 1}, 12344 {0x118, 0, 0}, 12345 {0x119, 0, 0}, 12346 {0x11A, 0, 0}, 12347 {0x11B, 0x87, 0}, 12348 {0x11C, 0x11, 0}, 12349 {0x11D, 0, 0}, 12350 {0x11E, 0x33, 0}, 12351 {0x11F, 0x88, 0}, 12352 {0x126, 0x20, 1}, 12353 {0x127, 0x3f, 0}, 12354 {0x128, 0x44, 0}, 12355 {0x129, 0x8c, 0}, 12356 {0x12A, 0x6c, 0}, 12357 {0x12B, 0x22, 0}, 12358 {0x12C, 0xbe, 0}, 12359 {0x12D, 0x55, 0}, 12360 {0x12F, 0xc, 0}, 12361 {0x130, 0xaa, 0}, 12362 {0x131, 0x2, 0}, 12363 {0x132, 0, 0}, 12364 {0x133, 0x10, 0}, 12365 {0x134, 0x1, 0}, 12366 {0x135, 0, 0}, 12367 {0x136, 0, 0}, 12368 {0x137, 0x80, 0}, 12369 {0x138, 0x60, 0}, 12370 {0x139, 0x44, 0}, 12371 {0x13A, 0x55, 0}, 12372 {0x13B, 0x1, 0}, 12373 {0x13C, 0x55, 0}, 12374 {0x13D, 0x1, 0}, 12375 {0x13E, 0x5, 0}, 12376 {0x13F, 0x55, 0}, 12377 {0x140, 0x55, 0}, 12378 {0x148, 0, 0}, 12379 {0x149, 0, 0}, 12380 {0x14A, 0, 0}, 12381 {0x14B, 0, 0}, 12382 {0x14C, 0, 0}, 12383 {0x14D, 0, 0}, 12384 {0x14E, 0x1, 1}, 12385 {0x14F, 0, 0}, 12386 {0x150, 0, 0}, 12387 {0x154, 0xc, 0}, 12388 {0x155, 0xc, 0}, 12389 {0x156, 0xc, 0}, 12390 {0x157, 0, 0}, 12391 {0x158, 0x2b, 0}, 12392 {0x159, 0x84, 0}, 12393 {0x15A, 0x15, 0}, 12394 {0x15B, 0xf, 0}, 12395 {0x15C, 0, 0}, 12396 {0x15D, 0, 0}, 12397 {0x15E, 0, 1}, 12398 {0x15F, 0, 1}, 12399 {0x160, 0, 1}, 12400 {0x161, 0, 1}, 12401 {0x162, 0, 1}, 12402 {0x163, 0, 1}, 12403 {0x164, 0, 0}, 12404 {0x165, 0, 0}, 12405 {0x166, 0, 0}, 12406 {0x167, 0, 0}, 12407 {0x168, 0, 0}, 12408 {0x169, 0, 0}, 12409 {0x16A, 0, 1}, 12410 {0x16B, 0, 1}, 12411 {0x16C, 0, 1}, 12412 {0x16D, 0, 0}, 12413 {0x170, 0, 0}, 12414 {0x171, 0x77, 0}, 12415 {0x172, 0x77, 0}, 12416 {0x173, 0x77, 0}, 12417 {0x174, 0x77, 0}, 12418 {0x175, 0, 0}, 12419 {0x176, 0x3, 0}, 12420 {0x177, 0x37, 0}, 12421 {0x178, 0x3, 0}, 12422 {0x179, 0, 0}, 12423 {0x17B, 0x21, 0}, 12424 {0x17C, 0, 0}, 12425 {0x17D, 0xaa, 0}, 12426 {0x17E, 0, 0}, 12427 {0x190, 0, 0}, 12428 {0x191, 0x77, 0}, 12429 {0x192, 0x77, 0}, 12430 {0x193, 0x77, 0}, 12431 {0x194, 0x77, 0}, 12432 {0x195, 0, 0}, 12433 {0x196, 0x3, 0}, 12434 {0x197, 0x37, 0}, 12435 {0x198, 0x3, 0}, 12436 {0x199, 0, 0}, 12437 {0x19B, 0x21, 0}, 12438 {0x19C, 0, 0}, 12439 {0x19D, 0xaa, 0}, 12440 {0x19E, 0, 0}, 12441 {0x1A1, 0x2, 0}, 12442 {0x1A2, 0xf, 0}, 12443 {0x1A3, 0xf, 0}, 12444 {0x1A4, 0, 1}, 12445 {0x1A5, 0, 1}, 12446 {0x1A6, 0, 1}, 12447 {0x1A7, 0x2, 0}, 12448 {0x1A8, 0xf, 0}, 12449 {0x1A9, 0xf, 0}, 12450 {0x1AA, 0, 1}, 12451 {0x1AB, 0, 1}, 12452 {0x1AC, 0, 1}, 12453 {0x1AD, 0x84, 0}, 12454 {0x1AE, 0x60, 0}, 12455 {0x1AF, 0x47, 0}, 12456 {0x1B0, 0x47, 0}, 12457 {0x1B1, 0, 0}, 12458 {0x1B2, 0, 0}, 12459 {0x1B3, 0, 0}, 12460 {0x1B4, 0, 0}, 12461 {0x1B5, 0, 0}, 12462 {0x1B6, 0, 0}, 12463 {0x1B7, 0xc, 1}, 12464 {0x1B8, 0, 0}, 12465 {0x1B9, 0, 0}, 12466 {0x1BA, 0, 0}, 12467 {0x1BB, 0, 0}, 12468 {0x1BC, 0, 0}, 12469 {0x1BD, 0, 0}, 12470 {0x1BE, 0, 0}, 12471 {0x1BF, 0, 0}, 12472 {0x1C0, 0, 0}, 12473 {0x1C1, 0x1, 1}, 12474 {0x1C2, 0x80, 1}, 12475 {0x1C3, 0, 0}, 12476 {0x1C4, 0, 0}, 12477 {0x1C5, 0, 0}, 12478 {0x1C6, 0, 0}, 12479 {0x1C7, 0, 0}, 12480 {0x1C8, 0, 0}, 12481 {0x1C9, 0, 0}, 12482 {0x1CA, 0, 0}, 12483 {0xFFFF, 0, 0} 12484 }; 12485 12486 static struct radio_20xx_regs regs_2057_rev7[] = { 12487 {0x00, 0, 1}, 12488 {0x01, 0x57, 1}, 12489 {0x02, 0x20, 1}, 12490 {0x03, 0x1f, 0}, 12491 {0x04, 0x4, 0}, 12492 {0x05, 0x2, 0}, 12493 {0x06, 0x1, 0}, 12494 {0x07, 0x1, 0}, 12495 {0x08, 0x1, 0}, 12496 {0x09, 0x69, 0}, 12497 {0x0A, 0x66, 0}, 12498 {0x0B, 0x6, 0}, 12499 {0x0C, 0x18, 0}, 12500 {0x0D, 0x3, 0}, 12501 {0x0E, 0x20, 0}, 12502 {0x0F, 0x20, 0}, 12503 {0x10, 0, 0}, 12504 {0x11, 0x7c, 0}, 12505 {0x12, 0x42, 0}, 12506 {0x13, 0xbd, 0}, 12507 {0x14, 0x7, 0}, 12508 {0x15, 0x87, 0}, 12509 {0x16, 0x8, 0}, 12510 {0x17, 0x17, 0}, 12511 {0x18, 0x7, 0}, 12512 {0x19, 0, 0}, 12513 {0x1A, 0x2, 0}, 12514 {0x1B, 0x13, 0}, 12515 {0x1C, 0x3e, 0}, 12516 {0x1D, 0x3e, 0}, 12517 {0x1E, 0x96, 0}, 12518 {0x1F, 0x4, 0}, 12519 {0x20, 0, 0}, 12520 {0x21, 0, 0}, 12521 {0x22, 0x17, 0}, 12522 {0x23, 0x6, 0}, 12523 {0x24, 0x1, 0}, 12524 {0x25, 0x6, 0}, 12525 {0x26, 0x4, 0}, 12526 {0x27, 0xd, 0}, 12527 {0x28, 0xd, 0}, 12528 {0x29, 0x30, 0}, 12529 {0x2A, 0x32, 0}, 12530 {0x2B, 0x8, 0}, 12531 {0x2C, 0x1c, 0}, 12532 {0x2D, 0x2, 0}, 12533 {0x2E, 0x4, 0}, 12534 {0x2F, 0x7f, 0}, 12535 {0x30, 0x27, 0}, 12536 {0x31, 0, 1}, 12537 {0x32, 0, 1}, 12538 {0x33, 0, 1}, 12539 {0x34, 0, 0}, 12540 {0x35, 0x20, 0}, 12541 {0x36, 0x18, 0}, 12542 {0x37, 0x7, 0}, 12543 {0x38, 0x66, 0}, 12544 {0x39, 0x66, 0}, 12545 {0x3A, 0x66, 0}, 12546 {0x3B, 0x66, 0}, 12547 {0x3C, 0xff, 0}, 12548 {0x3D, 0xff, 0}, 12549 {0x3E, 0xff, 0}, 12550 {0x3F, 0xff, 0}, 12551 {0x40, 0x16, 0}, 12552 {0x41, 0x7, 0}, 12553 {0x42, 0x19, 0}, 12554 {0x43, 0x7, 0}, 12555 {0x44, 0x6, 0}, 12556 {0x45, 0x3, 0}, 12557 {0x46, 0x1, 0}, 12558 {0x47, 0x7, 0}, 12559 {0x48, 0x33, 0}, 12560 {0x49, 0x5, 0}, 12561 {0x4A, 0x77, 0}, 12562 {0x4B, 0x66, 0}, 12563 {0x4C, 0x66, 0}, 12564 {0x4D, 0, 0}, 12565 {0x4E, 0x4, 0}, 12566 {0x4F, 0xc, 0}, 12567 {0x50, 0, 0}, 12568 {0x51, 0x70, 1}, 12569 {0x56, 0x7, 0}, 12570 {0x57, 0, 0}, 12571 {0x58, 0, 0}, 12572 {0x59, 0x88, 1}, 12573 {0x5A, 0, 0}, 12574 {0x5B, 0x1f, 0}, 12575 {0x5C, 0x20, 1}, 12576 {0x5D, 0x1, 0}, 12577 {0x5E, 0x30, 0}, 12578 {0x5F, 0x70, 0}, 12579 {0x60, 0, 0}, 12580 {0x61, 0, 0}, 12581 {0x62, 0x33, 1}, 12582 {0x63, 0xf, 1}, 12583 {0x64, 0x13, 1}, 12584 {0x65, 0, 0}, 12585 {0x66, 0xee, 1}, 12586 {0x69, 0, 0}, 12587 {0x6A, 0x7e, 0}, 12588 {0x6B, 0x3f, 0}, 12589 {0x6C, 0x7f, 0}, 12590 {0x6D, 0x78, 0}, 12591 {0x6E, 0x58, 1}, 12592 {0x6F, 0x88, 0}, 12593 {0x70, 0x8, 0}, 12594 {0x71, 0xf, 0}, 12595 {0x72, 0xbc, 0}, 12596 {0x73, 0x8, 0}, 12597 {0x74, 0x60, 0}, 12598 {0x75, 0x13, 1}, 12599 {0x76, 0x70, 0}, 12600 {0x77, 0, 0}, 12601 {0x78, 0, 0}, 12602 {0x79, 0, 0}, 12603 {0x7A, 0x33, 0}, 12604 {0x7B, 0x13, 1}, 12605 {0x7C, 0x14, 1}, 12606 {0x7D, 0xee, 1}, 12607 {0x80, 0x3c, 0}, 12608 {0x81, 0x1, 1}, 12609 {0x82, 0xa, 0}, 12610 {0x83, 0x9d, 0}, 12611 {0x84, 0xa, 0}, 12612 {0x85, 0, 0}, 12613 {0x86, 0x40, 0}, 12614 {0x87, 0x40, 0}, 12615 {0x88, 0x88, 0}, 12616 {0x89, 0x10, 0}, 12617 {0x8A, 0xf0, 0}, 12618 {0x8B, 0x10, 0}, 12619 {0x8C, 0xf0, 0}, 12620 {0x8D, 0, 0}, 12621 {0x8E, 0, 0}, 12622 {0x8F, 0x10, 0}, 12623 {0x90, 0x55, 0}, 12624 {0x91, 0x3f, 1}, 12625 {0x92, 0x36, 1}, 12626 {0x93, 0, 0}, 12627 {0x94, 0, 0}, 12628 {0x95, 0, 0}, 12629 {0x96, 0x87, 0}, 12630 {0x97, 0x11, 0}, 12631 {0x98, 0, 0}, 12632 {0x99, 0x33, 0}, 12633 {0x9A, 0x88, 0}, 12634 {0x9B, 0, 0}, 12635 {0x9C, 0x87, 0}, 12636 {0x9D, 0x11, 0}, 12637 {0x9E, 0, 0}, 12638 {0x9F, 0x33, 0}, 12639 {0xA0, 0x88, 0}, 12640 {0xA1, 0x20, 1}, 12641 {0xA2, 0x3f, 0}, 12642 {0xA3, 0x44, 0}, 12643 {0xA4, 0x8c, 0}, 12644 {0xA5, 0x6c, 0}, 12645 {0xA6, 0x22, 0}, 12646 {0xA7, 0xbe, 0}, 12647 {0xA8, 0x55, 0}, 12648 {0xAA, 0xc, 0}, 12649 {0xAB, 0xaa, 0}, 12650 {0xAC, 0x2, 0}, 12651 {0xAD, 0, 0}, 12652 {0xAE, 0x10, 0}, 12653 {0xAF, 0x1, 0}, 12654 {0xB0, 0, 0}, 12655 {0xB1, 0, 0}, 12656 {0xB2, 0x80, 0}, 12657 {0xB3, 0x60, 0}, 12658 {0xB4, 0x44, 0}, 12659 {0xB5, 0x55, 0}, 12660 {0xB6, 0x1, 0}, 12661 {0xB7, 0x55, 0}, 12662 {0xB8, 0x1, 0}, 12663 {0xB9, 0x5, 0}, 12664 {0xBA, 0x55, 0}, 12665 {0xBB, 0x55, 0}, 12666 {0xC1, 0, 0}, 12667 {0xC2, 0, 0}, 12668 {0xC3, 0, 0}, 12669 {0xC4, 0, 0}, 12670 {0xC5, 0, 0}, 12671 {0xC6, 0, 0}, 12672 {0xC7, 0, 0}, 12673 {0xC8, 0, 0}, 12674 {0xC9, 0, 0}, 12675 {0xCA, 0, 0}, 12676 {0xCB, 0, 0}, 12677 {0xCC, 0, 0}, 12678 {0xCD, 0, 0}, 12679 {0xCE, 0x5e, 0}, 12680 {0xCF, 0xc, 0}, 12681 {0xD0, 0xc, 0}, 12682 {0xD1, 0xc, 0}, 12683 {0xD2, 0, 0}, 12684 {0xD3, 0x2b, 0}, 12685 {0xD4, 0xc, 0}, 12686 {0xD5, 0, 0}, 12687 {0xD6, 0x70, 1}, 12688 {0xDB, 0x7, 0}, 12689 {0xDC, 0, 0}, 12690 {0xDD, 0, 0}, 12691 {0xDE, 0x88, 1}, 12692 {0xDF, 0, 0}, 12693 {0xE0, 0x1f, 0}, 12694 {0xE1, 0x20, 1}, 12695 {0xE2, 0x1, 0}, 12696 {0xE3, 0x30, 0}, 12697 {0xE4, 0x70, 0}, 12698 {0xE5, 0, 0}, 12699 {0xE6, 0, 0}, 12700 {0xE7, 0x33, 0}, 12701 {0xE8, 0xf, 1}, 12702 {0xE9, 0x13, 1}, 12703 {0xEA, 0, 0}, 12704 {0xEB, 0xee, 1}, 12705 {0xEE, 0, 0}, 12706 {0xEF, 0x7e, 0}, 12707 {0xF0, 0x3f, 0}, 12708 {0xF1, 0x7f, 0}, 12709 {0xF2, 0x78, 0}, 12710 {0xF3, 0x58, 1}, 12711 {0xF4, 0x88, 0}, 12712 {0xF5, 0x8, 0}, 12713 {0xF6, 0xf, 0}, 12714 {0xF7, 0xbc, 0}, 12715 {0xF8, 0x8, 0}, 12716 {0xF9, 0x60, 0}, 12717 {0xFA, 0x13, 1}, 12718 {0xFB, 0x70, 0}, 12719 {0xFC, 0, 0}, 12720 {0xFD, 0, 0}, 12721 {0xFE, 0, 0}, 12722 {0xFF, 0x33, 0}, 12723 {0x100, 0x13, 1}, 12724 {0x101, 0x14, 1}, 12725 {0x102, 0xee, 1}, 12726 {0x105, 0x3c, 0}, 12727 {0x106, 0x1, 1}, 12728 {0x107, 0xa, 0}, 12729 {0x108, 0x9d, 0}, 12730 {0x109, 0xa, 0}, 12731 {0x10A, 0, 0}, 12732 {0x10B, 0x40, 0}, 12733 {0x10C, 0x40, 0}, 12734 {0x10D, 0x88, 0}, 12735 {0x10E, 0x10, 0}, 12736 {0x10F, 0xf0, 0}, 12737 {0x110, 0x10, 0}, 12738 {0x111, 0xf0, 0}, 12739 {0x112, 0, 0}, 12740 {0x113, 0, 0}, 12741 {0x114, 0x10, 0}, 12742 {0x115, 0x55, 0}, 12743 {0x116, 0x3f, 1}, 12744 {0x117, 0x36, 1}, 12745 {0x118, 0, 0}, 12746 {0x119, 0, 0}, 12747 {0x11A, 0, 0}, 12748 {0x11B, 0x87, 0}, 12749 {0x11C, 0x11, 0}, 12750 {0x11D, 0, 0}, 12751 {0x11E, 0x33, 0}, 12752 {0x11F, 0x88, 0}, 12753 {0x120, 0, 0}, 12754 {0x121, 0x87, 0}, 12755 {0x122, 0x11, 0}, 12756 {0x123, 0, 0}, 12757 {0x124, 0x33, 0}, 12758 {0x125, 0x88, 0}, 12759 {0x126, 0x20, 1}, 12760 {0x127, 0x3f, 0}, 12761 {0x128, 0x44, 0}, 12762 {0x129, 0x8c, 0}, 12763 {0x12A, 0x6c, 0}, 12764 {0x12B, 0x22, 0}, 12765 {0x12C, 0xbe, 0}, 12766 {0x12D, 0x55, 0}, 12767 {0x12F, 0xc, 0}, 12768 {0x130, 0xaa, 0}, 12769 {0x131, 0x2, 0}, 12770 {0x132, 0, 0}, 12771 {0x133, 0x10, 0}, 12772 {0x134, 0x1, 0}, 12773 {0x135, 0, 0}, 12774 {0x136, 0, 0}, 12775 {0x137, 0x80, 0}, 12776 {0x138, 0x60, 0}, 12777 {0x139, 0x44, 0}, 12778 {0x13A, 0x55, 0}, 12779 {0x13B, 0x1, 0}, 12780 {0x13C, 0x55, 0}, 12781 {0x13D, 0x1, 0}, 12782 {0x13E, 0x5, 0}, 12783 {0x13F, 0x55, 0}, 12784 {0x140, 0x55, 0}, 12785 {0x146, 0, 0}, 12786 {0x147, 0, 0}, 12787 {0x148, 0, 0}, 12788 {0x149, 0, 0}, 12789 {0x14A, 0, 0}, 12790 {0x14B, 0, 0}, 12791 {0x14C, 0, 0}, 12792 {0x14D, 0, 0}, 12793 {0x14E, 0, 0}, 12794 {0x14F, 0, 0}, 12795 {0x150, 0, 0}, 12796 {0x151, 0, 0}, 12797 {0x154, 0xc, 0}, 12798 {0x155, 0xc, 0}, 12799 {0x156, 0xc, 0}, 12800 {0x157, 0, 0}, 12801 {0x158, 0x2b, 0}, 12802 {0x159, 0x84, 0}, 12803 {0x15A, 0x15, 0}, 12804 {0x15B, 0xf, 0}, 12805 {0x15C, 0, 0}, 12806 {0x15D, 0, 0}, 12807 {0x15E, 0, 1}, 12808 {0x15F, 0, 1}, 12809 {0x160, 0, 1}, 12810 {0x161, 0, 1}, 12811 {0x162, 0, 1}, 12812 {0x163, 0, 1}, 12813 {0x164, 0, 0}, 12814 {0x165, 0, 0}, 12815 {0x166, 0, 0}, 12816 {0x167, 0, 0}, 12817 {0x168, 0, 0}, 12818 {0x169, 0, 0}, 12819 {0x16A, 0, 1}, 12820 {0x16B, 0, 1}, 12821 {0x16C, 0, 1}, 12822 {0x16D, 0, 0}, 12823 {0x170, 0, 0}, 12824 {0x171, 0x77, 0}, 12825 {0x172, 0x77, 0}, 12826 {0x173, 0x77, 0}, 12827 {0x174, 0x77, 0}, 12828 {0x175, 0, 0}, 12829 {0x176, 0x3, 0}, 12830 {0x177, 0x37, 0}, 12831 {0x178, 0x3, 0}, 12832 {0x179, 0, 0}, 12833 {0x17A, 0x21, 0}, 12834 {0x17B, 0x21, 0}, 12835 {0x17C, 0, 0}, 12836 {0x17D, 0xaa, 0}, 12837 {0x17E, 0, 0}, 12838 {0x17F, 0xaa, 0}, 12839 {0x180, 0, 0}, 12840 {0x190, 0, 0}, 12841 {0x191, 0x77, 0}, 12842 {0x192, 0x77, 0}, 12843 {0x193, 0x77, 0}, 12844 {0x194, 0x77, 0}, 12845 {0x195, 0, 0}, 12846 {0x196, 0x3, 0}, 12847 {0x197, 0x37, 0}, 12848 {0x198, 0x3, 0}, 12849 {0x199, 0, 0}, 12850 {0x19A, 0x21, 0}, 12851 {0x19B, 0x21, 0}, 12852 {0x19C, 0, 0}, 12853 {0x19D, 0xaa, 0}, 12854 {0x19E, 0, 0}, 12855 {0x19F, 0xaa, 0}, 12856 {0x1A0, 0, 0}, 12857 {0x1A1, 0x2, 0}, 12858 {0x1A2, 0xf, 0}, 12859 {0x1A3, 0xf, 0}, 12860 {0x1A4, 0, 1}, 12861 {0x1A5, 0, 1}, 12862 {0x1A6, 0, 1}, 12863 {0x1A7, 0x2, 0}, 12864 {0x1A8, 0xf, 0}, 12865 {0x1A9, 0xf, 0}, 12866 {0x1AA, 0, 1}, 12867 {0x1AB, 0, 1}, 12868 {0x1AC, 0, 1}, 12869 {0x1AD, 0x84, 0}, 12870 {0x1AE, 0x60, 0}, 12871 {0x1AF, 0x47, 0}, 12872 {0x1B0, 0x47, 0}, 12873 {0x1B1, 0, 0}, 12874 {0x1B2, 0, 0}, 12875 {0x1B3, 0, 0}, 12876 {0x1B4, 0, 0}, 12877 {0x1B5, 0, 0}, 12878 {0x1B6, 0, 0}, 12879 {0x1B7, 0x5, 1}, 12880 {0x1B8, 0, 0}, 12881 {0x1B9, 0, 0}, 12882 {0x1BA, 0, 0}, 12883 {0x1BB, 0, 0}, 12884 {0x1BC, 0, 0}, 12885 {0x1BD, 0, 0}, 12886 {0x1BE, 0, 0}, 12887 {0x1BF, 0, 0}, 12888 {0x1C0, 0, 0}, 12889 {0x1C1, 0, 0}, 12890 {0x1C2, 0xa0, 1}, 12891 {0x1C3, 0, 0}, 12892 {0x1C4, 0, 0}, 12893 {0x1C5, 0, 0}, 12894 {0x1C6, 0, 0}, 12895 {0x1C7, 0, 0}, 12896 {0x1C8, 0, 0}, 12897 {0x1C9, 0, 0}, 12898 {0x1CA, 0, 0}, 12899 {0xFFFF, 0, 0} 12900 }; 12901 12902 static struct radio_20xx_regs regs_2057_rev8[] = { 12903 {0x00, 0x8, 1}, 12904 {0x01, 0x57, 1}, 12905 {0x02, 0x20, 1}, 12906 {0x03, 0x1f, 0}, 12907 {0x04, 0x4, 0}, 12908 {0x05, 0x2, 0}, 12909 {0x06, 0x1, 0}, 12910 {0x07, 0x1, 0}, 12911 {0x08, 0x1, 0}, 12912 {0x09, 0x69, 0}, 12913 {0x0A, 0x66, 0}, 12914 {0x0B, 0x6, 0}, 12915 {0x0C, 0x18, 0}, 12916 {0x0D, 0x3, 0}, 12917 {0x0E, 0x20, 0}, 12918 {0x0F, 0x20, 0}, 12919 {0x10, 0, 0}, 12920 {0x11, 0x7c, 0}, 12921 {0x12, 0x42, 0}, 12922 {0x13, 0xbd, 0}, 12923 {0x14, 0x7, 0}, 12924 {0x15, 0x87, 0}, 12925 {0x16, 0x8, 0}, 12926 {0x17, 0x17, 0}, 12927 {0x18, 0x7, 0}, 12928 {0x19, 0, 0}, 12929 {0x1A, 0x2, 0}, 12930 {0x1B, 0x13, 0}, 12931 {0x1C, 0x3e, 0}, 12932 {0x1D, 0x3e, 0}, 12933 {0x1E, 0x96, 0}, 12934 {0x1F, 0x4, 0}, 12935 {0x20, 0, 0}, 12936 {0x21, 0, 0}, 12937 {0x22, 0x17, 0}, 12938 {0x23, 0x6, 0}, 12939 {0x24, 0x1, 0}, 12940 {0x25, 0x6, 0}, 12941 {0x26, 0x4, 0}, 12942 {0x27, 0xd, 0}, 12943 {0x28, 0xd, 0}, 12944 {0x29, 0x30, 0}, 12945 {0x2A, 0x32, 0}, 12946 {0x2B, 0x8, 0}, 12947 {0x2C, 0x1c, 0}, 12948 {0x2D, 0x2, 0}, 12949 {0x2E, 0x4, 0}, 12950 {0x2F, 0x7f, 0}, 12951 {0x30, 0x27, 0}, 12952 {0x31, 0, 1}, 12953 {0x32, 0, 1}, 12954 {0x33, 0, 1}, 12955 {0x34, 0, 0}, 12956 {0x35, 0x20, 0}, 12957 {0x36, 0x18, 0}, 12958 {0x37, 0x7, 0}, 12959 {0x38, 0x66, 0}, 12960 {0x39, 0x66, 0}, 12961 {0x3A, 0x66, 0}, 12962 {0x3B, 0x66, 0}, 12963 {0x3C, 0xff, 0}, 12964 {0x3D, 0xff, 0}, 12965 {0x3E, 0xff, 0}, 12966 {0x3F, 0xff, 0}, 12967 {0x40, 0x16, 0}, 12968 {0x41, 0x7, 0}, 12969 {0x42, 0x19, 0}, 12970 {0x43, 0x7, 0}, 12971 {0x44, 0x6, 0}, 12972 {0x45, 0x3, 0}, 12973 {0x46, 0x1, 0}, 12974 {0x47, 0x7, 0}, 12975 {0x48, 0x33, 0}, 12976 {0x49, 0x5, 0}, 12977 {0x4A, 0x77, 0}, 12978 {0x4B, 0x66, 0}, 12979 {0x4C, 0x66, 0}, 12980 {0x4D, 0, 0}, 12981 {0x4E, 0x4, 0}, 12982 {0x4F, 0xc, 0}, 12983 {0x50, 0, 0}, 12984 {0x51, 0x70, 1}, 12985 {0x56, 0x7, 0}, 12986 {0x57, 0, 0}, 12987 {0x58, 0, 0}, 12988 {0x59, 0x88, 1}, 12989 {0x5A, 0, 0}, 12990 {0x5B, 0x1f, 0}, 12991 {0x5C, 0x20, 1}, 12992 {0x5D, 0x1, 0}, 12993 {0x5E, 0x30, 0}, 12994 {0x5F, 0x70, 0}, 12995 {0x60, 0, 0}, 12996 {0x61, 0, 0}, 12997 {0x62, 0x33, 1}, 12998 {0x63, 0xf, 1}, 12999 {0x64, 0xf, 1}, 13000 {0x65, 0, 0}, 13001 {0x66, 0x11, 0}, 13002 {0x69, 0, 0}, 13003 {0x6A, 0x7e, 0}, 13004 {0x6B, 0x3f, 0}, 13005 {0x6C, 0x7f, 0}, 13006 {0x6D, 0x78, 0}, 13007 {0x6E, 0x58, 1}, 13008 {0x6F, 0x88, 0}, 13009 {0x70, 0x8, 0}, 13010 {0x71, 0xf, 0}, 13011 {0x72, 0xbc, 0}, 13012 {0x73, 0x8, 0}, 13013 {0x74, 0x60, 0}, 13014 {0x75, 0x13, 1}, 13015 {0x76, 0x70, 0}, 13016 {0x77, 0, 0}, 13017 {0x78, 0, 0}, 13018 {0x79, 0, 0}, 13019 {0x7A, 0x33, 0}, 13020 {0x7B, 0x13, 1}, 13021 {0x7C, 0xf, 1}, 13022 {0x7D, 0xee, 1}, 13023 {0x80, 0x3c, 0}, 13024 {0x81, 0x1, 1}, 13025 {0x82, 0xa, 0}, 13026 {0x83, 0x9d, 0}, 13027 {0x84, 0xa, 0}, 13028 {0x85, 0, 0}, 13029 {0x86, 0x40, 0}, 13030 {0x87, 0x40, 0}, 13031 {0x88, 0x88, 0}, 13032 {0x89, 0x10, 0}, 13033 {0x8A, 0xf0, 0}, 13034 {0x8B, 0x10, 0}, 13035 {0x8C, 0xf0, 0}, 13036 {0x8D, 0, 0}, 13037 {0x8E, 0, 0}, 13038 {0x8F, 0x10, 0}, 13039 {0x90, 0x55, 0}, 13040 {0x91, 0x3f, 1}, 13041 {0x92, 0x36, 1}, 13042 {0x93, 0, 0}, 13043 {0x94, 0, 0}, 13044 {0x95, 0, 0}, 13045 {0x96, 0x87, 0}, 13046 {0x97, 0x11, 0}, 13047 {0x98, 0, 0}, 13048 {0x99, 0x33, 0}, 13049 {0x9A, 0x88, 0}, 13050 {0x9B, 0, 0}, 13051 {0x9C, 0x87, 0}, 13052 {0x9D, 0x11, 0}, 13053 {0x9E, 0, 0}, 13054 {0x9F, 0x33, 0}, 13055 {0xA0, 0x88, 0}, 13056 {0xA1, 0x20, 1}, 13057 {0xA2, 0x3f, 0}, 13058 {0xA3, 0x44, 0}, 13059 {0xA4, 0x8c, 0}, 13060 {0xA5, 0x6c, 0}, 13061 {0xA6, 0x22, 0}, 13062 {0xA7, 0xbe, 0}, 13063 {0xA8, 0x55, 0}, 13064 {0xAA, 0xc, 0}, 13065 {0xAB, 0xaa, 0}, 13066 {0xAC, 0x2, 0}, 13067 {0xAD, 0, 0}, 13068 {0xAE, 0x10, 0}, 13069 {0xAF, 0x1, 0}, 13070 {0xB0, 0, 0}, 13071 {0xB1, 0, 0}, 13072 {0xB2, 0x80, 0}, 13073 {0xB3, 0x60, 0}, 13074 {0xB4, 0x44, 0}, 13075 {0xB5, 0x55, 0}, 13076 {0xB6, 0x1, 0}, 13077 {0xB7, 0x55, 0}, 13078 {0xB8, 0x1, 0}, 13079 {0xB9, 0x5, 0}, 13080 {0xBA, 0x55, 0}, 13081 {0xBB, 0x55, 0}, 13082 {0xC1, 0, 0}, 13083 {0xC2, 0, 0}, 13084 {0xC3, 0, 0}, 13085 {0xC4, 0, 0}, 13086 {0xC5, 0, 0}, 13087 {0xC6, 0, 0}, 13088 {0xC7, 0, 0}, 13089 {0xC8, 0, 0}, 13090 {0xC9, 0x1, 1}, 13091 {0xCA, 0, 0}, 13092 {0xCB, 0, 0}, 13093 {0xCC, 0, 0}, 13094 {0xCD, 0, 0}, 13095 {0xCE, 0x5e, 0}, 13096 {0xCF, 0xc, 0}, 13097 {0xD0, 0xc, 0}, 13098 {0xD1, 0xc, 0}, 13099 {0xD2, 0, 0}, 13100 {0xD3, 0x2b, 0}, 13101 {0xD4, 0xc, 0}, 13102 {0xD5, 0, 0}, 13103 {0xD6, 0x70, 1}, 13104 {0xDB, 0x7, 0}, 13105 {0xDC, 0, 0}, 13106 {0xDD, 0, 0}, 13107 {0xDE, 0x88, 1}, 13108 {0xDF, 0, 0}, 13109 {0xE0, 0x1f, 0}, 13110 {0xE1, 0x20, 1}, 13111 {0xE2, 0x1, 0}, 13112 {0xE3, 0x30, 0}, 13113 {0xE4, 0x70, 0}, 13114 {0xE5, 0, 0}, 13115 {0xE6, 0, 0}, 13116 {0xE7, 0x33, 0}, 13117 {0xE8, 0xf, 1}, 13118 {0xE9, 0xf, 1}, 13119 {0xEA, 0, 0}, 13120 {0xEB, 0x11, 0}, 13121 {0xEE, 0, 0}, 13122 {0xEF, 0x7e, 0}, 13123 {0xF0, 0x3f, 0}, 13124 {0xF1, 0x7f, 0}, 13125 {0xF2, 0x78, 0}, 13126 {0xF3, 0x58, 1}, 13127 {0xF4, 0x88, 0}, 13128 {0xF5, 0x8, 0}, 13129 {0xF6, 0xf, 0}, 13130 {0xF7, 0xbc, 0}, 13131 {0xF8, 0x8, 0}, 13132 {0xF9, 0x60, 0}, 13133 {0xFA, 0x13, 1}, 13134 {0xFB, 0x70, 0}, 13135 {0xFC, 0, 0}, 13136 {0xFD, 0, 0}, 13137 {0xFE, 0, 0}, 13138 {0xFF, 0x33, 0}, 13139 {0x100, 0x13, 1}, 13140 {0x101, 0xf, 1}, 13141 {0x102, 0xee, 1}, 13142 {0x105, 0x3c, 0}, 13143 {0x106, 0x1, 1}, 13144 {0x107, 0xa, 0}, 13145 {0x108, 0x9d, 0}, 13146 {0x109, 0xa, 0}, 13147 {0x10A, 0, 0}, 13148 {0x10B, 0x40, 0}, 13149 {0x10C, 0x40, 0}, 13150 {0x10D, 0x88, 0}, 13151 {0x10E, 0x10, 0}, 13152 {0x10F, 0xf0, 0}, 13153 {0x110, 0x10, 0}, 13154 {0x111, 0xf0, 0}, 13155 {0x112, 0, 0}, 13156 {0x113, 0, 0}, 13157 {0x114, 0x10, 0}, 13158 {0x115, 0x55, 0}, 13159 {0x116, 0x3f, 1}, 13160 {0x117, 0x36, 1}, 13161 {0x118, 0, 0}, 13162 {0x119, 0, 0}, 13163 {0x11A, 0, 0}, 13164 {0x11B, 0x87, 0}, 13165 {0x11C, 0x11, 0}, 13166 {0x11D, 0, 0}, 13167 {0x11E, 0x33, 0}, 13168 {0x11F, 0x88, 0}, 13169 {0x120, 0, 0}, 13170 {0x121, 0x87, 0}, 13171 {0x122, 0x11, 0}, 13172 {0x123, 0, 0}, 13173 {0x124, 0x33, 0}, 13174 {0x125, 0x88, 0}, 13175 {0x126, 0x20, 1}, 13176 {0x127, 0x3f, 0}, 13177 {0x128, 0x44, 0}, 13178 {0x129, 0x8c, 0}, 13179 {0x12A, 0x6c, 0}, 13180 {0x12B, 0x22, 0}, 13181 {0x12C, 0xbe, 0}, 13182 {0x12D, 0x55, 0}, 13183 {0x12F, 0xc, 0}, 13184 {0x130, 0xaa, 0}, 13185 {0x131, 0x2, 0}, 13186 {0x132, 0, 0}, 13187 {0x133, 0x10, 0}, 13188 {0x134, 0x1, 0}, 13189 {0x135, 0, 0}, 13190 {0x136, 0, 0}, 13191 {0x137, 0x80, 0}, 13192 {0x138, 0x60, 0}, 13193 {0x139, 0x44, 0}, 13194 {0x13A, 0x55, 0}, 13195 {0x13B, 0x1, 0}, 13196 {0x13C, 0x55, 0}, 13197 {0x13D, 0x1, 0}, 13198 {0x13E, 0x5, 0}, 13199 {0x13F, 0x55, 0}, 13200 {0x140, 0x55, 0}, 13201 {0x146, 0, 0}, 13202 {0x147, 0, 0}, 13203 {0x148, 0, 0}, 13204 {0x149, 0, 0}, 13205 {0x14A, 0, 0}, 13206 {0x14B, 0, 0}, 13207 {0x14C, 0, 0}, 13208 {0x14D, 0, 0}, 13209 {0x14E, 0x1, 1}, 13210 {0x14F, 0, 0}, 13211 {0x150, 0, 0}, 13212 {0x151, 0, 0}, 13213 {0x154, 0xc, 0}, 13214 {0x155, 0xc, 0}, 13215 {0x156, 0xc, 0}, 13216 {0x157, 0, 0}, 13217 {0x158, 0x2b, 0}, 13218 {0x159, 0x84, 0}, 13219 {0x15A, 0x15, 0}, 13220 {0x15B, 0xf, 0}, 13221 {0x15C, 0, 0}, 13222 {0x15D, 0, 0}, 13223 {0x15E, 0, 1}, 13224 {0x15F, 0, 1}, 13225 {0x160, 0, 1}, 13226 {0x161, 0, 1}, 13227 {0x162, 0, 1}, 13228 {0x163, 0, 1}, 13229 {0x164, 0, 0}, 13230 {0x165, 0, 0}, 13231 {0x166, 0, 0}, 13232 {0x167, 0, 0}, 13233 {0x168, 0, 0}, 13234 {0x169, 0, 0}, 13235 {0x16A, 0, 1}, 13236 {0x16B, 0, 1}, 13237 {0x16C, 0, 1}, 13238 {0x16D, 0, 0}, 13239 {0x170, 0, 0}, 13240 {0x171, 0x77, 0}, 13241 {0x172, 0x77, 0}, 13242 {0x173, 0x77, 0}, 13243 {0x174, 0x77, 0}, 13244 {0x175, 0, 0}, 13245 {0x176, 0x3, 0}, 13246 {0x177, 0x37, 0}, 13247 {0x178, 0x3, 0}, 13248 {0x179, 0, 0}, 13249 {0x17A, 0x21, 0}, 13250 {0x17B, 0x21, 0}, 13251 {0x17C, 0, 0}, 13252 {0x17D, 0xaa, 0}, 13253 {0x17E, 0, 0}, 13254 {0x17F, 0xaa, 0}, 13255 {0x180, 0, 0}, 13256 {0x190, 0, 0}, 13257 {0x191, 0x77, 0}, 13258 {0x192, 0x77, 0}, 13259 {0x193, 0x77, 0}, 13260 {0x194, 0x77, 0}, 13261 {0x195, 0, 0}, 13262 {0x196, 0x3, 0}, 13263 {0x197, 0x37, 0}, 13264 {0x198, 0x3, 0}, 13265 {0x199, 0, 0}, 13266 {0x19A, 0x21, 0}, 13267 {0x19B, 0x21, 0}, 13268 {0x19C, 0, 0}, 13269 {0x19D, 0xaa, 0}, 13270 {0x19E, 0, 0}, 13271 {0x19F, 0xaa, 0}, 13272 {0x1A0, 0, 0}, 13273 {0x1A1, 0x2, 0}, 13274 {0x1A2, 0xf, 0}, 13275 {0x1A3, 0xf, 0}, 13276 {0x1A4, 0, 1}, 13277 {0x1A5, 0, 1}, 13278 {0x1A6, 0, 1}, 13279 {0x1A7, 0x2, 0}, 13280 {0x1A8, 0xf, 0}, 13281 {0x1A9, 0xf, 0}, 13282 {0x1AA, 0, 1}, 13283 {0x1AB, 0, 1}, 13284 {0x1AC, 0, 1}, 13285 {0x1AD, 0x84, 0}, 13286 {0x1AE, 0x60, 0}, 13287 {0x1AF, 0x47, 0}, 13288 {0x1B0, 0x47, 0}, 13289 {0x1B1, 0, 0}, 13290 {0x1B2, 0, 0}, 13291 {0x1B3, 0, 0}, 13292 {0x1B4, 0, 0}, 13293 {0x1B5, 0, 0}, 13294 {0x1B6, 0, 0}, 13295 {0x1B7, 0x5, 1}, 13296 {0x1B8, 0, 0}, 13297 {0x1B9, 0, 0}, 13298 {0x1BA, 0, 0}, 13299 {0x1BB, 0, 0}, 13300 {0x1BC, 0, 0}, 13301 {0x1BD, 0, 0}, 13302 {0x1BE, 0, 0}, 13303 {0x1BF, 0, 0}, 13304 {0x1C0, 0, 0}, 13305 {0x1C1, 0, 0}, 13306 {0x1C2, 0xa0, 1}, 13307 {0x1C3, 0, 0}, 13308 {0x1C4, 0, 0}, 13309 {0x1C5, 0, 0}, 13310 {0x1C6, 0, 0}, 13311 {0x1C7, 0, 0}, 13312 {0x1C8, 0, 0}, 13313 {0x1C9, 0, 0}, 13314 {0x1CA, 0, 0}, 13315 {0xFFFF, 0, 0} 13316 }; 13317 13318 static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; 13319 13320 static s32 nphy_lnagain_est0[] = { -315, 40370 }; 13321 static s32 nphy_lnagain_est1[] = { -224, 23242 }; 13322 13323 static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { 13324 { 13325 {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, 13326 {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, 13327 {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, 13328 {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, 13329 {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, 13330 {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, 13331 {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, 13332 {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, 13333 {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} 13334 }, 13335 { 13336 {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13337 {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13338 {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, 13339 {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, 13340 {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, 13341 {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, 13342 {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, 13343 {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, 13344 {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} 13345 } 13346 }; 13347 13348 static const u32 nphy_tpc_txgain[] = { 13349 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, 13350 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, 13351 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, 13352 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, 13353 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, 13354 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, 13355 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, 13356 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, 13357 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, 13358 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, 13359 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, 13360 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, 13361 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, 13362 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, 13363 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, 13364 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, 13365 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, 13366 0x03902942, 0x03902844, 0x03902842, 0x03902744, 13367 0x03902742, 0x03902644, 0x03902642, 0x03902544, 13368 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, 13369 0x03802a42, 0x03802944, 0x03802942, 0x03802844, 13370 0x03802842, 0x03802744, 0x03802742, 0x03802644, 13371 0x03802642, 0x03802544, 0x03802542, 0x03802444, 13372 0x03802442, 0x03802344, 0x03802342, 0x03802244, 13373 0x03802242, 0x03802144, 0x03802142, 0x03802044, 13374 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, 13375 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, 13376 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, 13377 0x03801a42, 0x03801944, 0x03801942, 0x03801844, 13378 0x03801842, 0x03801744, 0x03801742, 0x03801644, 13379 0x03801642, 0x03801544, 0x03801542, 0x03801444, 13380 0x03801442, 0x03801344, 0x03801342, 0x00002b00 13381 }; 13382 13383 static const u16 nphy_tpc_loscale[] = { 13384 256, 256, 271, 271, 287, 256, 256, 271, 13385 271, 287, 287, 304, 304, 256, 256, 271, 13386 271, 287, 287, 304, 304, 322, 322, 341, 13387 341, 362, 362, 383, 383, 256, 256, 271, 13388 271, 287, 287, 304, 304, 322, 322, 256, 13389 256, 271, 271, 287, 287, 304, 304, 322, 13390 322, 341, 341, 362, 362, 256, 256, 271, 13391 271, 287, 287, 304, 304, 322, 322, 256, 13392 256, 271, 271, 287, 287, 304, 304, 322, 13393 322, 341, 341, 362, 362, 256, 256, 271, 13394 271, 287, 287, 304, 304, 322, 322, 341, 13395 341, 362, 362, 383, 383, 406, 406, 430, 13396 430, 455, 455, 482, 482, 511, 511, 541, 13397 541, 573, 573, 607, 607, 643, 643, 681, 13398 681, 722, 722, 764, 764, 810, 810, 858, 13399 858, 908, 908, 962, 962, 1019, 1019, 256 13400 }; 13401 13402 static u32 nphy_tpc_txgain_ipa[] = { 13403 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, 13404 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, 13405 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, 13406 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, 13407 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, 13408 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, 13409 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, 13410 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, 13411 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, 13412 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, 13413 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, 13414 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, 13415 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, 13416 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, 13417 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, 13418 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, 13419 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, 13420 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, 13421 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, 13422 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, 13423 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, 13424 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, 13425 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, 13426 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, 13427 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, 13428 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, 13429 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, 13430 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, 13431 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, 13432 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, 13433 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, 13434 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 13435 }; 13436 13437 static u32 nphy_tpc_txgain_ipa_rev5[] = { 13438 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, 13439 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, 13440 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, 13441 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, 13442 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, 13443 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, 13444 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, 13445 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, 13446 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, 13447 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, 13448 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, 13449 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, 13450 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, 13451 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, 13452 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, 13453 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, 13454 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, 13455 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, 13456 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, 13457 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, 13458 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, 13459 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, 13460 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, 13461 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, 13462 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, 13463 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, 13464 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, 13465 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, 13466 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, 13467 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, 13468 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, 13469 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 13470 }; 13471 13472 static u32 nphy_tpc_txgain_ipa_rev6[] = { 13473 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, 13474 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, 13475 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, 13476 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, 13477 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, 13478 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, 13479 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, 13480 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, 13481 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, 13482 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, 13483 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, 13484 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, 13485 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, 13486 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, 13487 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, 13488 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, 13489 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, 13490 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, 13491 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, 13492 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, 13493 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, 13494 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, 13495 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, 13496 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, 13497 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, 13498 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, 13499 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, 13500 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, 13501 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, 13502 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, 13503 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, 13504 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 13505 }; 13506 13507 static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { 13508 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, 13509 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, 13510 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, 13511 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, 13512 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, 13513 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, 13514 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, 13515 0x70470028, 0x70470026, 0x70470024, 0x70470022, 13516 0x7047001f, 0x70370027, 0x70370024, 0x70370022, 13517 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, 13518 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, 13519 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, 13520 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, 13521 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, 13522 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, 13523 0x70170019, 0x70170018, 0x70170016, 0x70170015, 13524 0x70170014, 0x70170013, 0x70170012, 0x70170010, 13525 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, 13526 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, 13527 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, 13528 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, 13529 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, 13530 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, 13531 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, 13532 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, 13533 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, 13534 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, 13535 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, 13536 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, 13537 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, 13538 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, 13539 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 13540 }; 13541 13542 static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { 13543 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, 13544 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, 13545 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, 13546 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, 13547 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, 13548 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, 13549 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, 13550 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, 13551 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, 13552 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, 13553 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, 13554 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, 13555 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, 13556 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, 13557 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, 13558 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, 13559 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, 13560 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, 13561 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, 13562 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, 13563 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, 13564 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, 13565 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, 13566 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, 13567 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, 13568 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, 13569 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, 13570 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, 13571 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, 13572 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, 13573 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, 13574 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 13575 }; 13576 13577 static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { 13578 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13579 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13580 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13581 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13582 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13583 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13584 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13585 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13586 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13587 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13588 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13589 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13590 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13591 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13592 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13593 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13594 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13595 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13596 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13597 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13598 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13599 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13600 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13601 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13602 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13603 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13604 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13605 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13606 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13607 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13608 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13609 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13610 }; 13611 13612 static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { 13613 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13614 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13615 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13616 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13617 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13618 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13619 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13620 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13621 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13622 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13623 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13624 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13625 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13626 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13627 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13628 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13629 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13630 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13631 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13632 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13633 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13634 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13635 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13636 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13637 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13638 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13639 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13640 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13641 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13642 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13643 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13644 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13645 }; 13646 13647 static u32 nphy_tpc_txgain_ipa_5g[] = { 13648 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, 13649 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, 13650 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, 13651 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, 13652 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, 13653 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, 13654 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, 13655 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, 13656 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, 13657 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, 13658 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, 13659 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, 13660 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, 13661 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, 13662 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, 13663 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, 13664 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, 13665 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, 13666 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, 13667 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, 13668 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, 13669 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, 13670 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, 13671 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, 13672 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, 13673 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, 13674 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, 13675 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, 13676 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, 13677 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, 13678 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, 13679 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f 13680 }; 13681 13682 static u32 nphy_tpc_txgain_ipa_5g_2057[] = { 13683 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, 13684 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, 13685 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, 13686 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, 13687 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, 13688 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, 13689 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, 13690 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, 13691 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, 13692 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, 13693 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, 13694 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, 13695 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, 13696 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, 13697 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, 13698 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, 13699 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, 13700 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, 13701 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, 13702 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, 13703 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, 13704 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, 13705 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, 13706 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, 13707 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, 13708 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, 13709 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, 13710 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, 13711 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13712 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13713 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, 13714 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 13715 }; 13716 13717 static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { 13718 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, 13719 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, 13720 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, 13721 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, 13722 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, 13723 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, 13724 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, 13725 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, 13726 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, 13727 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, 13728 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, 13729 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, 13730 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, 13731 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, 13732 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, 13733 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, 13734 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, 13735 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, 13736 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, 13737 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, 13738 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, 13739 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, 13740 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, 13741 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, 13742 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, 13743 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, 13744 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, 13745 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13746 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13747 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13748 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, 13749 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 13750 }; 13751 13752 static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { 13753 -114, -108, -98, -91, -84, -78, -70, -62, 13754 -54, -46, -39, -31, -23, -15, -8, 0 13755 }; 13756 13757 static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { 13758 -100, -95, -89, -83, -77, -70, -63, -56, 13759 -48, -41, -33, -25, -19, -12, -6, 0 13760 }; 13761 13762 static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { 13763 -159, -113, -86, -72, -62, -54, -48, -43, 13764 -39, -35, -31, -28, -25, -23, -20, -18, 13765 -17, -15, -13, -11, -10, -8, -7, -6, 13766 -5, -4, -3, -3, -2, -1, -1, 0 13767 }; 13768 13769 static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { 13770 -109, -109, -82, -68, -58, -50, -44, -39, 13771 -35, -31, -28, -26, -23, -21, -19, -17, 13772 -16, -14, -13, -11, -10, -9, -8, -7, 13773 -5, -5, -4, -3, -2, -1, -1, 0 13774 }; 13775 13776 static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { 13777 -122, -122, -95, -80, -69, -61, -54, -49, 13778 -43, -39, -35, -32, -28, -26, -23, -21, 13779 -18, -16, -15, -13, -11, -10, -8, -7, 13780 -6, -5, -4, -3, -2, -1, -1, 0 13781 }; 13782 13783 static s8 nphy_papd_pgagain_dlt_5g_2057[] = { 13784 -107, -101, -92, -85, -78, -71, -62, -55, 13785 -47, -39, -32, -24, -19, -12, -6, 0 13786 }; 13787 13788 static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { 13789 -110, -104, -95, -88, -81, -74, -66, -58, 13790 -50, -44, -36, -28, -23, -15, -8, 0 13791 }; 13792 13793 static u8 pad_gain_codes_used_2057rev5[] = { 13794 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 13795 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 13796 }; 13797 13798 static u8 pad_gain_codes_used_2057rev7[] = { 13799 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 13800 5, 4, 3, 2, 1 13801 }; 13802 13803 static u8 pad_all_gain_codes_2057[] = { 13804 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 13805 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 13806 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 13807 1, 0 13808 }; 13809 13810 static u8 pga_all_gain_codes_2057[] = { 13811 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 13812 }; 13813 13814 static u32 nphy_papd_scaltbl[] = { 13815 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, 13816 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, 13817 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, 13818 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, 13819 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, 13820 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, 13821 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, 13822 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, 13823 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, 13824 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, 13825 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, 13826 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, 13827 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, 13828 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, 13829 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, 13830 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 13831 }; 13832 13833 static u32 nphy_tpc_txgain_rev3[] = { 13834 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, 13835 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, 13836 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, 13837 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, 13838 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, 13839 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, 13840 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, 13841 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, 13842 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, 13843 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, 13844 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, 13845 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, 13846 0x19410044, 0x19410042, 0x19410040, 0x1941003e, 13847 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, 13848 0x18410044, 0x18410042, 0x18410040, 0x1841003e, 13849 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, 13850 0x17410044, 0x17410042, 0x17410040, 0x1741003e, 13851 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, 13852 0x16410044, 0x16410042, 0x16410040, 0x1641003e, 13853 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, 13854 0x15410044, 0x15410042, 0x15410040, 0x1541003e, 13855 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, 13856 0x14410044, 0x14410042, 0x14410040, 0x1441003e, 13857 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, 13858 0x13410044, 0x13410042, 0x13410040, 0x1341003e, 13859 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, 13860 0x12410044, 0x12410042, 0x12410040, 0x1241003e, 13861 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, 13862 0x11410044, 0x11410042, 0x11410040, 0x1141003e, 13863 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, 13864 0x10410044, 0x10410042, 0x10410040, 0x1041003e, 13865 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 13866 }; 13867 13868 static u32 nphy_tpc_txgain_HiPwrEPA[] = { 13869 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, 13870 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, 13871 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, 13872 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, 13873 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, 13874 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, 13875 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, 13876 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, 13877 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, 13878 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, 13879 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, 13880 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, 13881 0x09410044, 0x09410042, 0x09410040, 0x0941003e, 13882 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, 13883 0x08410044, 0x08410042, 0x08410040, 0x0841003e, 13884 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, 13885 0x07410044, 0x07410042, 0x07410040, 0x0741003e, 13886 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, 13887 0x06410044, 0x06410042, 0x06410040, 0x0641003e, 13888 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, 13889 0x05410044, 0x05410042, 0x05410040, 0x0541003e, 13890 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, 13891 0x04410044, 0x04410042, 0x04410040, 0x0441003e, 13892 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, 13893 0x03410044, 0x03410042, 0x03410040, 0x0341003e, 13894 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, 13895 0x02410044, 0x02410042, 0x02410040, 0x0241003e, 13896 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, 13897 0x01410044, 0x01410042, 0x01410040, 0x0141003e, 13898 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, 13899 0x00410044, 0x00410042, 0x00410040, 0x0041003e, 13900 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 13901 }; 13902 13903 static u32 nphy_tpc_txgain_epa_2057rev3[] = { 13904 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, 13905 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, 13906 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, 13907 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, 13908 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, 13909 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, 13910 0x80390038, 0x80390035, 0x8031003a, 0x80310036, 13911 0x80310033, 0x8029003a, 0x80290037, 0x80290034, 13912 0x80290031, 0x80210039, 0x80210036, 0x80210033, 13913 0x80210030, 0x8019003c, 0x80190039, 0x80190036, 13914 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, 13915 0x80190028, 0x8011003a, 0x80110036, 0x80110033, 13916 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, 13917 0x80110027, 0x80110024, 0x80110022, 0x80110020, 13918 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, 13919 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, 13920 0x80090029, 0x80090027, 0x80090025, 0x80090023, 13921 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, 13922 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, 13923 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, 13924 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13925 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13926 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13927 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13928 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13929 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13930 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13931 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13932 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13933 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13934 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13935 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d 13936 }; 13937 13938 static u32 nphy_tpc_txgain_epa_2057rev5[] = { 13939 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, 13940 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, 13941 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, 13942 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, 13943 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, 13944 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, 13945 0x10390038, 0x10390035, 0x1031003a, 0x10310036, 13946 0x10310033, 0x1029003a, 0x10290037, 0x10290034, 13947 0x10290031, 0x10210039, 0x10210036, 0x10210033, 13948 0x10210030, 0x1019003c, 0x10190039, 0x10190036, 13949 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, 13950 0x10190028, 0x1011003a, 0x10110036, 0x10110033, 13951 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, 13952 0x10110027, 0x10110024, 0x10110022, 0x10110020, 13953 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, 13954 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, 13955 0x10090029, 0x10090027, 0x10090025, 0x10090023, 13956 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, 13957 0x1009001a, 0x10090018, 0x10090017, 0x10090016, 13958 0x10090015, 0x10090013, 0x10090012, 0x10090011, 13959 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, 13960 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, 13961 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, 13962 0x10090008, 0x10090008, 0x10090007, 0x10090007, 13963 0x10090007, 0x10090006, 0x10090006, 0x10090005, 13964 0x10090005, 0x10090005, 0x10090005, 0x10090004, 13965 0x10090004, 0x10090004, 0x10090004, 0x10090003, 13966 0x10090003, 0x10090003, 0x10090003, 0x10090003, 13967 0x10090003, 0x10090002, 0x10090002, 0x10090002, 13968 0x10090002, 0x10090002, 0x10090002, 0x10090002, 13969 0x10090002, 0x10090002, 0x10090001, 0x10090001, 13970 0x10090001, 0x10090001, 0x10090001, 0x10090001 13971 }; 13972 13973 static u32 nphy_tpc_5GHz_txgain_rev3[] = { 13974 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, 13975 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, 13976 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, 13977 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, 13978 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, 13979 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, 13980 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, 13981 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, 13982 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, 13983 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, 13984 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, 13985 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, 13986 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, 13987 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, 13988 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, 13989 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, 13990 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, 13991 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, 13992 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, 13993 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, 13994 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, 13995 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, 13996 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, 13997 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, 13998 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, 13999 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, 14000 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, 14001 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, 14002 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, 14003 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, 14004 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, 14005 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 14006 }; 14007 14008 static u32 nphy_tpc_5GHz_txgain_rev4[] = { 14009 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, 14010 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, 14011 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, 14012 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, 14013 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, 14014 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, 14015 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, 14016 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, 14017 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, 14018 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, 14019 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, 14020 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, 14021 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, 14022 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, 14023 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, 14024 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, 14025 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, 14026 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, 14027 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, 14028 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, 14029 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, 14030 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, 14031 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, 14032 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, 14033 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, 14034 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, 14035 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, 14036 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, 14037 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, 14038 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, 14039 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, 14040 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 14041 }; 14042 14043 static u32 nphy_tpc_5GHz_txgain_rev5[] = { 14044 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, 14045 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, 14046 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, 14047 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, 14048 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, 14049 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, 14050 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, 14051 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, 14052 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, 14053 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, 14054 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, 14055 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, 14056 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, 14057 0x09620039, 0x09620037, 0x09620035, 0x09620033, 14058 0x08620044, 0x08620042, 0x08620040, 0x0862003e, 14059 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, 14060 0x07620043, 0x07620042, 0x07620040, 0x0762003f, 14061 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, 14062 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, 14063 0x06620039, 0x06620037, 0x06620035, 0x06620033, 14064 0x05620046, 0x05620044, 0x05620042, 0x05620040, 14065 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, 14066 0x04620044, 0x04620042, 0x04620040, 0x0462003e, 14067 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, 14068 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, 14069 0x03620038, 0x03620037, 0x03620035, 0x03620033, 14070 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, 14071 0x02620046, 0x02620044, 0x02620043, 0x02620042, 14072 0x0162004a, 0x01620048, 0x01620046, 0x01620044, 14073 0x01620043, 0x01620042, 0x01620041, 0x01620040, 14074 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, 14075 0x0062003b, 0x00620039, 0x00620037, 0x00620035 14076 }; 14077 14078 static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { 14079 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, 14080 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, 14081 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, 14082 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, 14083 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, 14084 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, 14085 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, 14086 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, 14087 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, 14088 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, 14089 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, 14090 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, 14091 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, 14092 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, 14093 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, 14094 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, 14095 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, 14096 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, 14097 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, 14098 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, 14099 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, 14100 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, 14101 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, 14102 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, 14103 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, 14104 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, 14105 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, 14106 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, 14107 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, 14108 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, 14109 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, 14110 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 14111 }; 14112 14113 static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; 14114 static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; 14115 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { 14116 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a 14117 }; 14118 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 14119 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 14120 }; 14121 14122 bool wlc_phy_bist_check_phy(struct brcms_phy_pub *pih) 14123 { 14124 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 14125 u32 phybist0, phybist1, phybist2, phybist3, phybist4; 14126 14127 if (NREV_GE(pi->pubpi.phy_rev, 16)) 14128 return true; 14129 14130 phybist0 = read_phy_reg(pi, 0x0e); 14131 phybist1 = read_phy_reg(pi, 0x0f); 14132 phybist2 = read_phy_reg(pi, 0xea); 14133 phybist3 = read_phy_reg(pi, 0xeb); 14134 phybist4 = read_phy_reg(pi, 0x156); 14135 14136 if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && 14137 (phybist3 == 0) && (phybist4 == 0)) 14138 return true; 14139 14140 return false; 14141 } 14142 14143 static void wlc_phy_bphy_init_nphy(struct brcms_phy *pi) 14144 { 14145 u16 addr, val; 14146 14147 val = 0x1e1f; 14148 for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); 14149 addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { 14150 write_phy_reg(pi, addr, val); 14151 if (addr == (NPHY_TO_BPHY_OFF + 0x97)) 14152 val = 0x3e3f; 14153 else 14154 val -= 0x0202; 14155 } 14156 14157 write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); 14158 } 14159 14160 void 14161 wlc_phy_table_write_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14162 u32 width, const void *data) 14163 { 14164 struct phytbl_info tbl; 14165 14166 tbl.tbl_id = id; 14167 tbl.tbl_len = len; 14168 tbl.tbl_offset = offset; 14169 tbl.tbl_width = width; 14170 tbl.tbl_ptr = data; 14171 wlc_phy_write_table_nphy(pi, &tbl); 14172 } 14173 14174 void 14175 wlc_phy_table_read_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14176 u32 width, void *data) 14177 { 14178 struct phytbl_info tbl; 14179 14180 tbl.tbl_id = id; 14181 tbl.tbl_len = len; 14182 tbl.tbl_offset = offset; 14183 tbl.tbl_width = width; 14184 tbl.tbl_ptr = data; 14185 wlc_phy_read_table_nphy(pi, &tbl); 14186 } 14187 14188 static void 14189 wlc_phy_static_table_download_nphy(struct brcms_phy *pi) 14190 { 14191 uint idx; 14192 14193 if (NREV_GE(pi->pubpi.phy_rev, 16)) { 14194 for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) 14195 wlc_phy_write_table_nphy(pi, 14196 &mimophytbl_info_rev16[idx]); 14197 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14198 for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) 14199 wlc_phy_write_table_nphy(pi, 14200 &mimophytbl_info_rev7[idx]); 14201 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14202 for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) 14203 wlc_phy_write_table_nphy(pi, 14204 &mimophytbl_info_rev3[idx]); 14205 } else { 14206 for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) 14207 wlc_phy_write_table_nphy(pi, 14208 &mimophytbl_info_rev0[idx]); 14209 } 14210 } 14211 14212 static void wlc_phy_tbl_init_nphy(struct brcms_phy *pi) 14213 { 14214 uint idx = 0; 14215 u8 antswctrllut; 14216 14217 if (pi->phy_init_por) 14218 wlc_phy_static_table_download_nphy(pi); 14219 14220 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14221 14222 antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? 14223 pi->srom_fem2g.antswctrllut : pi->srom_fem5g. 14224 antswctrllut; 14225 14226 switch (antswctrllut) { 14227 case 0: 14228 14229 break; 14230 14231 case 1: 14232 14233 if (pi->aa2g == 7) 14234 wlc_phy_table_write_nphy( 14235 pi, 14236 NPHY_TBL_ID_ANTSWCTRLLUT, 14237 2, 0x21, 8, 14238 &ant_sw_ctrl_tbl_rev8_2o3[0]); 14239 else 14240 wlc_phy_table_write_nphy( 14241 pi, 14242 NPHY_TBL_ID_ANTSWCTRLLUT, 14243 2, 0x21, 8, 14244 &ant_sw_ctrl_tbl_rev8 14245 [0]); 14246 14247 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14248 2, 0x25, 8, 14249 &ant_sw_ctrl_tbl_rev8[2]); 14250 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14251 2, 0x29, 8, 14252 &ant_sw_ctrl_tbl_rev8[4]); 14253 break; 14254 14255 case 2: 14256 14257 wlc_phy_table_write_nphy( 14258 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14259 2, 0x1, 8, 14260 &ant_sw_ctrl_tbl_rev8_2057v7_core0[0]); 14261 wlc_phy_table_write_nphy( 14262 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14263 2, 0x5, 8, 14264 &ant_sw_ctrl_tbl_rev8_2057v7_core0[2]); 14265 wlc_phy_table_write_nphy( 14266 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14267 2, 0x9, 8, 14268 &ant_sw_ctrl_tbl_rev8_2057v7_core0[4]); 14269 14270 wlc_phy_table_write_nphy( 14271 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14272 2, 0x21, 8, 14273 &ant_sw_ctrl_tbl_rev8_2057v7_core1[0]); 14274 wlc_phy_table_write_nphy( 14275 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14276 2, 0x25, 8, 14277 &ant_sw_ctrl_tbl_rev8_2057v7_core1[2]); 14278 wlc_phy_table_write_nphy( 14279 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14280 2, 0x29, 8, 14281 &ant_sw_ctrl_tbl_rev8_2057v7_core1[4]); 14282 break; 14283 14284 default: 14285 break; 14286 } 14287 14288 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14289 for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { 14290 14291 if (idx == ANT_SWCTRL_TBL_REV3_IDX) { 14292 antswctrllut = 14293 CHSPEC_IS2G(pi->radio_chanspec) ? 14294 pi->srom_fem2g.antswctrllut : 14295 pi->srom_fem5g.antswctrllut; 14296 switch (antswctrllut) { 14297 case 0: 14298 wlc_phy_write_table_nphy( 14299 pi, 14300 &mimophytbl_info_rev3_volatile 14301 [idx]); 14302 break; 14303 case 1: 14304 wlc_phy_write_table_nphy( 14305 pi, 14306 &mimophytbl_info_rev3_volatile1 14307 [idx]); 14308 break; 14309 case 2: 14310 wlc_phy_write_table_nphy( 14311 pi, 14312 &mimophytbl_info_rev3_volatile2 14313 [idx]); 14314 break; 14315 case 3: 14316 wlc_phy_write_table_nphy( 14317 pi, 14318 &mimophytbl_info_rev3_volatile3 14319 [idx]); 14320 break; 14321 default: 14322 break; 14323 } 14324 } else { 14325 wlc_phy_write_table_nphy( 14326 pi, 14327 &mimophytbl_info_rev3_volatile[idx]); 14328 } 14329 } 14330 } else { 14331 for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) 14332 wlc_phy_write_table_nphy(pi, 14333 &mimophytbl_info_rev0_volatile 14334 [idx]); 14335 } 14336 } 14337 14338 static void 14339 wlc_phy_write_txmacreg_nphy(struct brcms_phy *pi, u16 holdoff, u16 delay) 14340 { 14341 write_phy_reg(pi, 0x77, holdoff); 14342 write_phy_reg(pi, 0xb4, delay); 14343 } 14344 14345 void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs) 14346 { 14347 u16 holdoff, delay; 14348 14349 if (rifs) { 14350 14351 holdoff = 0x10; 14352 delay = 0x258; 14353 } else { 14354 14355 holdoff = 0x15; 14356 delay = 0x320; 14357 } 14358 14359 wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); 14360 14361 if (pi->sh && (pi->sh->_rifs_phy != rifs)) 14362 pi->sh->_rifs_phy = rifs; 14363 } 14364 14365 static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi) 14366 { 14367 14368 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14369 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14370 pi->phy_5g_pwrgain = true; 14371 return; 14372 } 14373 14374 pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; 14375 pi->phy_5g_pwrgain = false; 14376 14377 if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && 14378 NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) 14379 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14380 else if ((pi->sh->sromrev >= 4) 14381 && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) 14382 pi->phy_5g_pwrgain = true; 14383 } 14384 14385 static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi) 14386 { 14387 u16 bw40po, cddpo, stbcpo, bwduppo; 14388 uint band_num; 14389 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14390 14391 if (pi->sh->sromrev >= 9) 14392 return; 14393 14394 bw40po = sprom->bw40po; 14395 pi->bw402gpo = bw40po & 0xf; 14396 pi->bw405gpo = (bw40po & 0xf0) >> 4; 14397 pi->bw405glpo = (bw40po & 0xf00) >> 8; 14398 pi->bw405ghpo = (bw40po & 0xf000) >> 12; 14399 14400 cddpo = sprom->cddpo; 14401 pi->cdd2gpo = cddpo & 0xf; 14402 pi->cdd5gpo = (cddpo & 0xf0) >> 4; 14403 pi->cdd5glpo = (cddpo & 0xf00) >> 8; 14404 pi->cdd5ghpo = (cddpo & 0xf000) >> 12; 14405 14406 stbcpo = sprom->stbcpo; 14407 pi->stbc2gpo = stbcpo & 0xf; 14408 pi->stbc5gpo = (stbcpo & 0xf0) >> 4; 14409 pi->stbc5glpo = (stbcpo & 0xf00) >> 8; 14410 pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; 14411 14412 bwduppo = sprom->bwduppo; 14413 pi->bwdup2gpo = bwduppo & 0xf; 14414 pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; 14415 pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; 14416 pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; 14417 14418 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 14419 band_num++) { 14420 switch (band_num) { 14421 case 0: 14422 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = 14423 sprom->core_pwr_info[0].maxpwr_2g; 14424 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = 14425 sprom->core_pwr_info[1].maxpwr_2g; 14426 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = 14427 sprom->core_pwr_info[0].pa_2g[0]; 14428 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = 14429 sprom->core_pwr_info[1].pa_2g[0]; 14430 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = 14431 sprom->core_pwr_info[0].pa_2g[1]; 14432 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = 14433 sprom->core_pwr_info[1].pa_2g[1]; 14434 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = 14435 sprom->core_pwr_info[0].pa_2g[2]; 14436 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = 14437 sprom->core_pwr_info[1].pa_2g[2]; 14438 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = 14439 sprom->core_pwr_info[0].itssi_2g; 14440 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = 14441 sprom->core_pwr_info[1].itssi_2g; 14442 14443 pi->cck2gpo = sprom->cck2gpo; 14444 14445 pi->ofdm2gpo = sprom->ofdm2gpo; 14446 14447 pi->mcs2gpo[0] = sprom->mcs2gpo[0]; 14448 pi->mcs2gpo[1] = sprom->mcs2gpo[1]; 14449 pi->mcs2gpo[2] = sprom->mcs2gpo[2]; 14450 pi->mcs2gpo[3] = sprom->mcs2gpo[3]; 14451 pi->mcs2gpo[4] = sprom->mcs2gpo[4]; 14452 pi->mcs2gpo[5] = sprom->mcs2gpo[5]; 14453 pi->mcs2gpo[6] = sprom->mcs2gpo[6]; 14454 pi->mcs2gpo[7] = sprom->mcs2gpo[7]; 14455 break; 14456 case 1: 14457 14458 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = 14459 sprom->core_pwr_info[0].maxpwr_5g; 14460 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = 14461 sprom->core_pwr_info[1].maxpwr_5g; 14462 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = 14463 sprom->core_pwr_info[0].pa_5g[0]; 14464 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = 14465 sprom->core_pwr_info[1].pa_5g[0]; 14466 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = 14467 sprom->core_pwr_info[0].pa_5g[1]; 14468 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = 14469 sprom->core_pwr_info[1].pa_5g[1]; 14470 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = 14471 sprom->core_pwr_info[0].pa_5g[2]; 14472 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = 14473 sprom->core_pwr_info[1].pa_5g[2]; 14474 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = 14475 sprom->core_pwr_info[0].itssi_5g; 14476 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = 14477 sprom->core_pwr_info[1].itssi_5g; 14478 14479 pi->ofdm5gpo = sprom->ofdm5gpo; 14480 14481 pi->mcs5gpo[0] = sprom->mcs5gpo[0]; 14482 pi->mcs5gpo[1] = sprom->mcs5gpo[1]; 14483 pi->mcs5gpo[2] = sprom->mcs5gpo[2]; 14484 pi->mcs5gpo[3] = sprom->mcs5gpo[3]; 14485 pi->mcs5gpo[4] = sprom->mcs5gpo[4]; 14486 pi->mcs5gpo[5] = sprom->mcs5gpo[5]; 14487 pi->mcs5gpo[6] = sprom->mcs5gpo[6]; 14488 pi->mcs5gpo[7] = sprom->mcs5gpo[7]; 14489 break; 14490 case 2: 14491 14492 pi->nphy_pwrctrl_info[0].max_pwr_5gl = 14493 sprom->core_pwr_info[0].maxpwr_5gl; 14494 pi->nphy_pwrctrl_info[1].max_pwr_5gl = 14495 sprom->core_pwr_info[1].maxpwr_5gl; 14496 pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = 14497 sprom->core_pwr_info[0].pa_5gl[0]; 14498 pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = 14499 sprom->core_pwr_info[1].pa_5gl[0]; 14500 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = 14501 sprom->core_pwr_info[0].pa_5gl[1]; 14502 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = 14503 sprom->core_pwr_info[1].pa_5gl[1]; 14504 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = 14505 sprom->core_pwr_info[0].pa_5gl[2]; 14506 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = 14507 sprom->core_pwr_info[1].pa_5gl[2]; 14508 pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; 14509 pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; 14510 14511 pi->ofdm5glpo = sprom->ofdm5glpo; 14512 14513 pi->mcs5glpo[0] = sprom->mcs5glpo[0]; 14514 pi->mcs5glpo[1] = sprom->mcs5glpo[1]; 14515 pi->mcs5glpo[2] = sprom->mcs5glpo[2]; 14516 pi->mcs5glpo[3] = sprom->mcs5glpo[3]; 14517 pi->mcs5glpo[4] = sprom->mcs5glpo[4]; 14518 pi->mcs5glpo[5] = sprom->mcs5glpo[5]; 14519 pi->mcs5glpo[6] = sprom->mcs5glpo[6]; 14520 pi->mcs5glpo[7] = sprom->mcs5glpo[7]; 14521 break; 14522 case 3: 14523 14524 pi->nphy_pwrctrl_info[0].max_pwr_5gh = 14525 sprom->core_pwr_info[0].maxpwr_5gh; 14526 pi->nphy_pwrctrl_info[1].max_pwr_5gh = 14527 sprom->core_pwr_info[1].maxpwr_5gh; 14528 pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = 14529 sprom->core_pwr_info[0].pa_5gh[0]; 14530 pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = 14531 sprom->core_pwr_info[1].pa_5gh[0]; 14532 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = 14533 sprom->core_pwr_info[0].pa_5gh[1]; 14534 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = 14535 sprom->core_pwr_info[1].pa_5gh[1]; 14536 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = 14537 sprom->core_pwr_info[0].pa_5gh[2]; 14538 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = 14539 sprom->core_pwr_info[1].pa_5gh[2]; 14540 pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; 14541 pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; 14542 14543 pi->ofdm5ghpo = sprom->ofdm5ghpo; 14544 14545 pi->mcs5ghpo[0] = sprom->mcs5ghpo[0]; 14546 pi->mcs5ghpo[1] = sprom->mcs5ghpo[1]; 14547 pi->mcs5ghpo[2] = sprom->mcs5ghpo[2]; 14548 pi->mcs5ghpo[3] = sprom->mcs5ghpo[3]; 14549 pi->mcs5ghpo[4] = sprom->mcs5ghpo[4]; 14550 pi->mcs5ghpo[5] = sprom->mcs5ghpo[5]; 14551 pi->mcs5ghpo[6] = sprom->mcs5ghpo[6]; 14552 pi->mcs5ghpo[7] = sprom->mcs5ghpo[7]; 14553 break; 14554 } 14555 } 14556 14557 wlc_phy_txpwr_apply_nphy(pi); 14558 } 14559 14560 static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) 14561 { 14562 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14563 14564 pi->antswitch = sprom->antswitch; 14565 pi->aa2g = sprom->ant_available_bg; 14566 pi->aa5g = sprom->ant_available_a; 14567 14568 pi->srom_fem2g.tssipos = sprom->fem.ghz2.tssipos; 14569 pi->srom_fem2g.extpagain = sprom->fem.ghz2.extpa_gain; 14570 pi->srom_fem2g.pdetrange = sprom->fem.ghz2.pdet_range; 14571 pi->srom_fem2g.triso = sprom->fem.ghz2.tr_iso; 14572 pi->srom_fem2g.antswctrllut = sprom->fem.ghz2.antswlut; 14573 14574 pi->srom_fem5g.tssipos = sprom->fem.ghz5.tssipos; 14575 pi->srom_fem5g.extpagain = sprom->fem.ghz5.extpa_gain; 14576 pi->srom_fem5g.pdetrange = sprom->fem.ghz5.pdet_range; 14577 pi->srom_fem5g.triso = sprom->fem.ghz5.tr_iso; 14578 if (sprom->fem.ghz5.antswlut) 14579 pi->srom_fem5g.antswctrllut = sprom->fem.ghz5.antswlut; 14580 else 14581 pi->srom_fem5g.antswctrllut = sprom->fem.ghz2.antswlut; 14582 14583 wlc_phy_txpower_ipa_upd(pi); 14584 14585 pi->phy_txcore_disable_temp = sprom->tempthresh; 14586 if (pi->phy_txcore_disable_temp == 0) 14587 pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; 14588 14589 pi->phy_tempsense_offset = sprom->tempoffset; 14590 if (pi->phy_tempsense_offset != 0) { 14591 if (pi->phy_tempsense_offset > 14592 (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) 14593 pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; 14594 else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + 14595 NPHY_SROM_MINTEMPOFFSET)) 14596 pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; 14597 else 14598 pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; 14599 } 14600 14601 pi->phy_txcore_enable_temp = 14602 pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; 14603 14604 pi->phycal_tempdelta = sprom->phycal_tempdelta; 14605 if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) 14606 pi->phycal_tempdelta = 0; 14607 14608 wlc_phy_txpwr_srom_read_ppr_nphy(pi); 14609 14610 return true; 14611 } 14612 14613 bool wlc_phy_attach_nphy(struct brcms_phy *pi) 14614 { 14615 uint i; 14616 14617 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) 14618 pi->phyhang_avoid = true; 14619 14620 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14621 pi->nphy_gband_spurwar_en = true; 14622 if (pi->sh->boardflags2 & BFL2_SPUR_WAR) 14623 pi->nphy_aband_spurwar_en = true; 14624 } 14625 if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14626 if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) 14627 pi->nphy_gband_spurwar2_en = true; 14628 } 14629 14630 pi->n_preamble_override = AUTO; 14631 if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) 14632 pi->n_preamble_override = BRCMS_N_PREAMBLE_MIXEDMODE; 14633 14634 pi->nphy_txrx_chain = AUTO; 14635 pi->phy_scraminit = AUTO; 14636 14637 pi->nphy_rxcalparams = 0x010100B5; 14638 14639 pi->nphy_perical = PHY_PERICAL_MPHASE; 14640 pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; 14641 pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; 14642 14643 pi->nphy_gain_boost = true; 14644 pi->nphy_elna_gain_config = false; 14645 pi->radio_is_on = false; 14646 14647 for (i = 0; i < pi->pubpi.phy_corenum; i++) 14648 pi->nphy_txpwrindex[i].index = AUTO; 14649 14650 wlc_phy_txpwrctrl_config_nphy(pi); 14651 if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) 14652 pi->hwpwrctrl_capable = true; 14653 14654 pi->pi_fptr.init = wlc_phy_init_nphy; 14655 pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; 14656 pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; 14657 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; 14658 14659 if (!wlc_phy_txpwr_srom_read_nphy(pi)) 14660 return false; 14661 14662 return true; 14663 } 14664 14665 static s32 get_rf_pwr_offset(struct brcms_phy *pi, s16 pga_gn, s16 pad_gn) 14666 { 14667 s32 rfpwr_offset = 0; 14668 14669 if (CHSPEC_IS2G(pi->radio_chanspec)) { 14670 if ((pi->pubpi.radiorev == 3) || 14671 (pi->pubpi.radiorev == 4) || 14672 (pi->pubpi.radiorev == 6)) 14673 rfpwr_offset = (s16) 14674 nphy_papd_padgain_dlt_2g_2057rev3n4 14675 [pad_gn]; 14676 else if (pi->pubpi.radiorev == 5) 14677 rfpwr_offset = (s16) 14678 nphy_papd_padgain_dlt_2g_2057rev5 14679 [pad_gn]; 14680 else if ((pi->pubpi.radiorev == 7) 14681 || (pi->pubpi.radiorev == 14682 8)) 14683 rfpwr_offset = (s16) 14684 nphy_papd_padgain_dlt_2g_2057rev7 14685 [pad_gn]; 14686 } else { 14687 if ((pi->pubpi.radiorev == 3) || 14688 (pi->pubpi.radiorev == 4) || 14689 (pi->pubpi.radiorev == 6)) 14690 rfpwr_offset = (s16) 14691 nphy_papd_pgagain_dlt_5g_2057 14692 [pga_gn]; 14693 else if ((pi->pubpi.radiorev == 7) 14694 || (pi->pubpi.radiorev == 14695 8)) 14696 rfpwr_offset = (s16) 14697 nphy_papd_pgagain_dlt_5g_2057rev7 14698 [pga_gn]; 14699 } 14700 return rfpwr_offset; 14701 } 14702 14703 static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble) 14704 { 14705 bool gf_preamble = false; 14706 u16 val; 14707 14708 if (preamble == BRCMS_N_PREAMBLE_GF) 14709 gf_preamble = true; 14710 14711 val = read_phy_reg(pi, 0xed); 14712 14713 val |= RX_GF_MM_AUTO; 14714 val &= ~RX_GF_OR_MM; 14715 if (gf_preamble) 14716 val |= RX_GF_OR_MM; 14717 14718 write_phy_reg(pi, 0xed, val); 14719 } 14720 14721 static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 14722 { 14723 int j, type; 14724 u16 addr_offset[] = { 0x186, 0x195, 0x2c5}; 14725 14726 for (type = 0; type < 3; type++) { 14727 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14728 write_phy_reg(pi, addr_offset[type] + j, 14729 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 14730 } 14731 14732 if (pi->bw == WL_CHANSPEC_BW_40) { 14733 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14734 write_phy_reg(pi, 0x186 + j, 14735 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14736 } else { 14737 if (CHSPEC_IS5G(pi->radio_chanspec)) { 14738 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14739 write_phy_reg(pi, 0x186 + j, 14740 NPHY_IPA_REV4_txdigi_filtcoeffs[5][j]); 14741 } 14742 14743 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 14744 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14745 write_phy_reg(pi, 0x2c5 + j, 14746 NPHY_IPA_REV4_txdigi_filtcoeffs[6][j]); 14747 } 14748 } 14749 } 14750 14751 static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi) 14752 { 14753 int j; 14754 14755 if (pi->bw == WL_CHANSPEC_BW_40) { 14756 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14757 write_phy_reg(pi, 0x195 + j, 14758 NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); 14759 } else { 14760 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14761 write_phy_reg(pi, 0x186 + j, 14762 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14763 } 14764 } 14765 14766 static void 14767 wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events, 14768 const u8 *dlys, u8 len) 14769 { 14770 u32 t1_offset, t2_offset; 14771 u8 ctr; 14772 u8 end_event = 14773 NREV_GE(pi->pubpi.phy_rev, 14774 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; 14775 u8 end_dly = 1; 14776 14777 if (pi->phyhang_avoid) 14778 wlc_phy_stay_in_carriersearch_nphy(pi, true); 14779 14780 t1_offset = cmd << 4; 14781 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, 14782 events); 14783 t2_offset = t1_offset + 0x080; 14784 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, 14785 dlys); 14786 14787 for (ctr = len; ctr < 16; ctr++) { 14788 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14789 t1_offset + ctr, 8, &end_event); 14790 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14791 t2_offset + ctr, 8, &end_dly); 14792 } 14793 14794 if (pi->phyhang_avoid) 14795 wlc_phy_stay_in_carriersearch_nphy(pi, false); 14796 } 14797 14798 static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset) 14799 { 14800 u16 lpf_bw_ctl_val = 0; 14801 u16 rx2tx_lpf_rc_lut_offset = 0; 14802 14803 if (offset == 0) { 14804 if (CHSPEC_IS40(pi->radio_chanspec)) 14805 rx2tx_lpf_rc_lut_offset = 0x159; 14806 else 14807 rx2tx_lpf_rc_lut_offset = 0x154; 14808 } else { 14809 rx2tx_lpf_rc_lut_offset = offset; 14810 } 14811 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14812 (u32) rx2tx_lpf_rc_lut_offset, 16, 14813 &lpf_bw_ctl_val); 14814 14815 lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; 14816 14817 return lpf_bw_ctl_val; 14818 } 14819 14820 static void 14821 wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, 14822 u8 core_mask, u8 off, u8 override_id) 14823 { 14824 u8 core_num; 14825 u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; 14826 u8 val_shift = 0; 14827 14828 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14829 en_mask = field; 14830 for (core_num = 0; core_num < 2; core_num++) { 14831 if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { 14832 14833 switch (field) { 14834 case (0x1 << 2): 14835 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14836 val_addr = (core_num == 0) ? 0x7a : 14837 0x7d; 14838 val_mask = (0x1 << 1); 14839 val_shift = 1; 14840 break; 14841 case (0x1 << 3): 14842 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14843 val_addr = (core_num == 0) ? 0x7a : 14844 0x7d; 14845 val_mask = (0x1 << 2); 14846 val_shift = 2; 14847 break; 14848 case (0x1 << 4): 14849 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14850 val_addr = (core_num == 0) ? 0x7a : 14851 0x7d; 14852 val_mask = (0x1 << 4); 14853 val_shift = 4; 14854 break; 14855 case (0x1 << 5): 14856 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14857 val_addr = (core_num == 0) ? 0x7a : 14858 0x7d; 14859 val_mask = (0x1 << 5); 14860 val_shift = 5; 14861 break; 14862 case (0x1 << 6): 14863 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14864 val_addr = (core_num == 0) ? 0x7a : 14865 0x7d; 14866 val_mask = (0x1 << 6); 14867 val_shift = 6; 14868 break; 14869 case (0x1 << 7): 14870 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14871 val_addr = (core_num == 0) ? 0x7a : 14872 0x7d; 14873 val_mask = (0x1 << 7); 14874 val_shift = 7; 14875 break; 14876 case (0x1 << 10): 14877 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14878 val_addr = (core_num == 0) ? 0xf8 : 14879 0xfa; 14880 val_mask = (0x7 << 4); 14881 val_shift = 4; 14882 break; 14883 case (0x1 << 11): 14884 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14885 val_addr = (core_num == 0) ? 0x7b : 14886 0x7e; 14887 val_mask = (0xffff << 0); 14888 val_shift = 0; 14889 break; 14890 case (0x1 << 12): 14891 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14892 val_addr = (core_num == 0) ? 0x7c : 14893 0x7f; 14894 val_mask = (0xffff << 0); 14895 val_shift = 0; 14896 break; 14897 case (0x3 << 13): 14898 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14899 val_addr = (core_num == 0) ? 0x348 : 14900 0x349; 14901 val_mask = (0xff << 0); 14902 val_shift = 0; 14903 break; 14904 case (0x1 << 13): 14905 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14906 val_addr = (core_num == 0) ? 0x348 : 14907 0x349; 14908 val_mask = (0xf << 0); 14909 val_shift = 0; 14910 break; 14911 default: 14912 addr = 0xffff; 14913 break; 14914 } 14915 } else if (override_id == 14916 NPHY_REV7_RFCTRLOVERRIDE_ID1) { 14917 14918 switch (field) { 14919 case (0x1 << 1): 14920 en_addr = (core_num == 0) ? 0x342 : 14921 0x343; 14922 val_addr = (core_num == 0) ? 0x340 : 14923 0x341; 14924 val_mask = (0x1 << 1); 14925 val_shift = 1; 14926 break; 14927 case (0x1 << 3): 14928 en_addr = (core_num == 0) ? 0x342 : 14929 0x343; 14930 val_addr = (core_num == 0) ? 0x340 : 14931 0x341; 14932 val_mask = (0x1 << 3); 14933 val_shift = 3; 14934 break; 14935 case (0x1 << 5): 14936 en_addr = (core_num == 0) ? 0x342 : 14937 0x343; 14938 val_addr = (core_num == 0) ? 0x340 : 14939 0x341; 14940 val_mask = (0x1 << 5); 14941 val_shift = 5; 14942 break; 14943 case (0x1 << 4): 14944 en_addr = (core_num == 0) ? 0x342 : 14945 0x343; 14946 val_addr = (core_num == 0) ? 0x340 : 14947 0x341; 14948 val_mask = (0x1 << 4); 14949 val_shift = 4; 14950 break; 14951 case (0x1 << 2): 14952 14953 en_addr = (core_num == 0) ? 0x342 : 14954 0x343; 14955 val_addr = (core_num == 0) ? 0x340 : 14956 0x341; 14957 val_mask = (0x1 << 2); 14958 val_shift = 2; 14959 break; 14960 case (0x1 << 7): 14961 14962 en_addr = (core_num == 0) ? 0x342 : 14963 0x343; 14964 val_addr = (core_num == 0) ? 0x340 : 14965 0x341; 14966 val_mask = (0x7 << 8); 14967 val_shift = 8; 14968 break; 14969 case (0x1 << 11): 14970 en_addr = (core_num == 0) ? 0x342 : 14971 0x343; 14972 val_addr = (core_num == 0) ? 0x340 : 14973 0x341; 14974 val_mask = (0x1 << 14); 14975 val_shift = 14; 14976 break; 14977 case (0x1 << 10): 14978 en_addr = (core_num == 0) ? 0x342 : 14979 0x343; 14980 val_addr = (core_num == 0) ? 0x340 : 14981 0x341; 14982 val_mask = (0x1 << 13); 14983 val_shift = 13; 14984 break; 14985 case (0x1 << 9): 14986 en_addr = (core_num == 0) ? 0x342 : 14987 0x343; 14988 val_addr = (core_num == 0) ? 0x340 : 14989 0x341; 14990 val_mask = (0x1 << 12); 14991 val_shift = 12; 14992 break; 14993 case (0x1 << 8): 14994 en_addr = (core_num == 0) ? 0x342 : 14995 0x343; 14996 val_addr = (core_num == 0) ? 0x340 : 14997 0x341; 14998 val_mask = (0x1 << 11); 14999 val_shift = 11; 15000 break; 15001 case (0x1 << 6): 15002 en_addr = (core_num == 0) ? 0x342 : 15003 0x343; 15004 val_addr = (core_num == 0) ? 0x340 : 15005 0x341; 15006 val_mask = (0x1 << 6); 15007 val_shift = 6; 15008 break; 15009 case (0x1 << 0): 15010 en_addr = (core_num == 0) ? 0x342 : 15011 0x343; 15012 val_addr = (core_num == 0) ? 0x340 : 15013 0x341; 15014 val_mask = (0x1 << 0); 15015 val_shift = 0; 15016 break; 15017 default: 15018 addr = 0xffff; 15019 break; 15020 } 15021 } else if (override_id == 15022 NPHY_REV7_RFCTRLOVERRIDE_ID2) { 15023 15024 switch (field) { 15025 case (0x1 << 3): 15026 en_addr = (core_num == 0) ? 0x346 : 15027 0x347; 15028 val_addr = (core_num == 0) ? 0x344 : 15029 0x345; 15030 val_mask = (0x1 << 3); 15031 val_shift = 3; 15032 break; 15033 case (0x1 << 1): 15034 en_addr = (core_num == 0) ? 0x346 : 15035 0x347; 15036 val_addr = (core_num == 0) ? 0x344 : 15037 0x345; 15038 val_mask = (0x1 << 1); 15039 val_shift = 1; 15040 break; 15041 case (0x1 << 0): 15042 en_addr = (core_num == 0) ? 0x346 : 15043 0x347; 15044 val_addr = (core_num == 0) ? 0x344 : 15045 0x345; 15046 val_mask = (0x1 << 0); 15047 val_shift = 0; 15048 break; 15049 case (0x1 << 2): 15050 en_addr = (core_num == 0) ? 0x346 : 15051 0x347; 15052 val_addr = (core_num == 0) ? 0x344 : 15053 0x345; 15054 val_mask = (0x1 << 2); 15055 val_shift = 2; 15056 break; 15057 case (0x1 << 4): 15058 en_addr = (core_num == 0) ? 0x346 : 15059 0x347; 15060 val_addr = (core_num == 0) ? 0x344 : 15061 0x345; 15062 val_mask = (0x1 << 4); 15063 val_shift = 4; 15064 break; 15065 default: 15066 addr = 0xffff; 15067 break; 15068 } 15069 } 15070 15071 if (off) { 15072 and_phy_reg(pi, en_addr, ~en_mask); 15073 and_phy_reg(pi, val_addr, ~val_mask); 15074 } else { 15075 15076 if ((core_mask == 0) 15077 || (core_mask & (1 << core_num))) { 15078 or_phy_reg(pi, en_addr, en_mask); 15079 15080 if (addr != 0xffff) 15081 mod_phy_reg(pi, val_addr, 15082 val_mask, 15083 (value << 15084 val_shift)); 15085 } 15086 } 15087 } 15088 } 15089 } 15090 15091 static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi) 15092 { 15093 uint core; 15094 int ctr; 15095 s16 gain_delta[2]; 15096 u8 curr_channel; 15097 u16 minmax_gain[2]; 15098 u16 regval[4]; 15099 15100 if (pi->phyhang_avoid) 15101 wlc_phy_stay_in_carriersearch_nphy(pi, true); 15102 15103 if (pi->nphy_gain_boost) { 15104 if ((CHSPEC_IS2G(pi->radio_chanspec))) { 15105 15106 gain_delta[0] = 6; 15107 gain_delta[1] = 6; 15108 } else { 15109 15110 curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 15111 gain_delta[0] = 15112 (s16) 15113 PHY_HW_ROUND(((nphy_lnagain_est0[0] * 15114 curr_channel) + 15115 nphy_lnagain_est0[1]), 13); 15116 gain_delta[1] = 15117 (s16) 15118 PHY_HW_ROUND(((nphy_lnagain_est1[0] * 15119 curr_channel) + 15120 nphy_lnagain_est1[1]), 13); 15121 } 15122 } else { 15123 15124 gain_delta[0] = 0; 15125 gain_delta[1] = 0; 15126 } 15127 15128 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 15129 if (pi->nphy_elna_gain_config) { 15130 15131 regval[0] = nphy_def_lnagains[2] + gain_delta[core]; 15132 regval[1] = nphy_def_lnagains[3] + gain_delta[core]; 15133 regval[2] = nphy_def_lnagains[3] + gain_delta[core]; 15134 regval[3] = nphy_def_lnagains[3] + gain_delta[core]; 15135 } else { 15136 for (ctr = 0; ctr < 4; ctr++) 15137 regval[ctr] = 15138 nphy_def_lnagains[ctr] + 15139 gain_delta[core]; 15140 } 15141 wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); 15142 15143 minmax_gain[core] = 15144 (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); 15145 } 15146 15147 mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); 15148 mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); 15149 15150 if (pi->phyhang_avoid) 15151 wlc_phy_stay_in_carriersearch_nphy(pi, false); 15152 } 15153 15154 static void 15155 wlc_phy_war_force_trsw_to_R_cliplo_nphy(struct brcms_phy *pi, u8 core) 15156 { 15157 if (core == PHY_CORE_0) { 15158 write_phy_reg(pi, 0x38, 0x4); 15159 if (CHSPEC_IS2G(pi->radio_chanspec)) 15160 write_phy_reg(pi, 0x37, 0x0060); 15161 else 15162 write_phy_reg(pi, 0x37, 0x1080); 15163 } else if (core == PHY_CORE_1) { 15164 write_phy_reg(pi, 0x2ae, 0x4); 15165 if (CHSPEC_IS2G(pi->radio_chanspec)) 15166 write_phy_reg(pi, 0x2ad, 0x0060); 15167 else 15168 write_phy_reg(pi, 0x2ad, 0x1080); 15169 } 15170 } 15171 15172 static void wlc_phy_war_txchain_upd_nphy(struct brcms_phy *pi, u8 txchain) 15173 { 15174 u8 txchain0, txchain1; 15175 15176 txchain0 = txchain & 0x1; 15177 txchain1 = (txchain & 0x2) >> 1; 15178 if (!txchain0) 15179 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 15180 15181 if (!txchain1) 15182 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 15183 } 15184 15185 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi) 15186 { 15187 s8 lna1_gain_db[] = { 8, 13, 17, 22 }; 15188 s8 lna2_gain_db[] = { -2, 7, 11, 15 }; 15189 s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; 15190 s8 tia_gainbits[] = { 15191 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15192 15193 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15194 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15195 15196 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15197 15198 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); 15199 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); 15200 15201 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, 15202 lna1_gain_db); 15203 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, 15204 lna1_gain_db); 15205 15206 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, 15207 lna2_gain_db); 15208 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, 15209 lna2_gain_db); 15210 15211 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15212 tia_gain_db); 15213 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15214 tia_gain_db); 15215 15216 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15217 tia_gainbits); 15218 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15219 tia_gainbits); 15220 15221 write_phy_reg(pi, 0x37, 0x74); 15222 write_phy_reg(pi, 0x2ad, 0x74); 15223 write_phy_reg(pi, 0x38, 0x18); 15224 write_phy_reg(pi, 0x2ae, 0x18); 15225 15226 write_phy_reg(pi, 0x2b, 0xe8); 15227 write_phy_reg(pi, 0x41, 0xe8); 15228 15229 if (CHSPEC_IS20(pi->radio_chanspec)) { 15230 15231 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); 15232 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); 15233 } else { 15234 15235 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); 15236 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); 15237 } 15238 } 15239 15240 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi) 15241 { 15242 u16 currband; 15243 static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; 15244 const s8 *lna1_gain_db = NULL; 15245 const s8 *lna1_gain_db_2 = NULL; 15246 const s8 *lna2_gain_db = NULL; 15247 static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; 15248 const s8 *tia_gain_db; 15249 static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; 15250 const s8 *tia_gainbits; 15251 static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; 15252 const u16 *rfseq_init_gain; 15253 u16 init_gaincode; 15254 u16 clip1hi_gaincode; 15255 u16 clip1md_gaincode = 0; 15256 u16 clip1md_gaincode_B; 15257 u16 clip1lo_gaincode; 15258 u16 clip1lo_gaincode_B; 15259 u8 crsminl_th = 0; 15260 u8 crsminu_th; 15261 u16 nbclip_th = 0; 15262 u8 w1clip_th; 15263 u16 freq; 15264 s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; 15265 u8 chg_nbclip_th = 0; 15266 15267 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15268 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15269 15270 currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15271 if (currband == 0) { 15272 15273 lna1_gain_db = lna1G_gain_db_rev7; 15274 15275 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15276 lna1_gain_db); 15277 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15278 lna1_gain_db); 15279 15280 mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); 15281 15282 if (CHSPEC_IS40(pi->radio_chanspec)) { 15283 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); 15284 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); 15285 } 15286 15287 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15288 15289 if (CHSPEC_IS20(pi->radio_chanspec)) { 15290 mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); 15291 mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); 15292 } 15293 } else { 15294 15295 init_gaincode = 0x9e; 15296 clip1hi_gaincode = 0x9e; 15297 clip1md_gaincode_B = 0x24; 15298 clip1lo_gaincode = 0x8a; 15299 clip1lo_gaincode_B = 8; 15300 rfseq_init_gain = rfseqA_init_gain_rev7; 15301 15302 tia_gain_db = tiaA_gain_db_rev7; 15303 tia_gainbits = tiaA_gainbits_rev7; 15304 15305 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 15306 if (CHSPEC_IS20(pi->radio_chanspec)) { 15307 15308 w1clip_th = 25; 15309 clip1md_gaincode = 0x82; 15310 15311 if ((freq <= 5080) || (freq == 5825)) { 15312 15313 static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; 15314 static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25}; 15315 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15316 15317 crsminu_th = 0x3e; 15318 lna1_gain_db = lna1A_gain_db_rev7; 15319 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15320 lna2_gain_db = lna2A_gain_db_rev7; 15321 } else if ((freq >= 5500) && (freq <= 5700)) { 15322 15323 static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; 15324 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15325 static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; 15326 15327 crsminu_th = 0x45; 15328 clip1md_gaincode_B = 0x14; 15329 nbclip_th = 0xff; 15330 chg_nbclip_th = 1; 15331 lna1_gain_db = lna1A_gain_db_rev7; 15332 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15333 lna2_gain_db = lna2A_gain_db_rev7; 15334 } else { 15335 15336 static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; 15337 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15338 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15339 15340 crsminu_th = 0x41; 15341 lna1_gain_db = lna1A_gain_db_rev7; 15342 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15343 lna2_gain_db = lna2A_gain_db_rev7; 15344 } 15345 15346 if (freq <= 4920) { 15347 nvar_baseline_offset0 = 5; 15348 nvar_baseline_offset1 = 5; 15349 } else if ((freq > 4920) && (freq <= 5320)) { 15350 nvar_baseline_offset0 = 3; 15351 nvar_baseline_offset1 = 5; 15352 } else if ((freq > 5320) && (freq <= 5700)) { 15353 nvar_baseline_offset0 = 3; 15354 nvar_baseline_offset1 = 2; 15355 } else { 15356 nvar_baseline_offset0 = 4; 15357 nvar_baseline_offset1 = 0; 15358 } 15359 } else { 15360 15361 crsminu_th = 0x3a; 15362 crsminl_th = 0x3a; 15363 w1clip_th = 20; 15364 15365 if ((freq >= 4920) && (freq <= 5320)) { 15366 nvar_baseline_offset0 = 4; 15367 nvar_baseline_offset1 = 5; 15368 } else if ((freq > 5320) && (freq <= 5550)) { 15369 nvar_baseline_offset0 = 4; 15370 nvar_baseline_offset1 = 2; 15371 } else { 15372 nvar_baseline_offset0 = 5; 15373 nvar_baseline_offset1 = 3; 15374 } 15375 } 15376 15377 write_phy_reg(pi, 0x20, init_gaincode); 15378 write_phy_reg(pi, 0x2a7, init_gaincode); 15379 15380 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15381 pi->pubpi.phy_corenum, 0x106, 16, 15382 rfseq_init_gain); 15383 15384 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15385 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15386 15387 write_phy_reg(pi, 0x36, clip1md_gaincode_B); 15388 write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); 15389 15390 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15391 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15392 write_phy_reg(pi, 0x38, clip1lo_gaincode_B); 15393 write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); 15394 15395 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15396 tia_gain_db); 15397 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15398 tia_gain_db); 15399 15400 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15401 tia_gainbits); 15402 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15403 tia_gainbits); 15404 15405 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15406 15407 if (chg_nbclip_th == 1) { 15408 write_phy_reg(pi, 0x2b, nbclip_th); 15409 write_phy_reg(pi, 0x41, nbclip_th); 15410 } 15411 15412 mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); 15413 mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); 15414 15415 mod_phy_reg(pi, 0x2e4, 15416 (0x3f << 0), (nvar_baseline_offset0 << 0)); 15417 15418 mod_phy_reg(pi, 0x2e4, 15419 (0x3f << 6), (nvar_baseline_offset1 << 6)); 15420 15421 if (CHSPEC_IS20(pi->radio_chanspec)) { 15422 15423 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15424 lna1_gain_db); 15425 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15426 lna1_gain_db_2); 15427 15428 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15429 8, lna2_gain_db); 15430 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15431 8, lna2_gain_db); 15432 15433 write_phy_reg(pi, 0x24, clip1md_gaincode); 15434 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15435 } else { 15436 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15437 } 15438 } 15439 } 15440 15441 static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi) 15442 { 15443 u16 w1th, hpf_code, currband; 15444 int ctr; 15445 u8 rfseq_updategainu_events[] = { 15446 NPHY_RFSEQ_CMD_RX_GAIN, 15447 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 15448 NPHY_RFSEQ_CMD_SET_HPF_BW 15449 }; 15450 static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; 15451 static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; 15452 static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; 15453 static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; 15454 static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; 15455 static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; 15456 static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; 15457 static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; 15458 static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; 15459 static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; 15460 const s8 *lna1_gain_db = NULL; 15461 static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; 15462 static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; 15463 static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; 15464 static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; 15465 static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; 15466 static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; 15467 static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; 15468 static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; 15469 const s8 *lna2_gain_db = NULL; 15470 static const s8 tiaG_gain_db[] = { 15471 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; 15472 static const s8 tiaA_gain_db[] = { 15473 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; 15474 static const s8 tiaA_gain_db_rev4[] = { 15475 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15476 static const s8 tiaA_gain_db_rev5[] = { 15477 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15478 static const s8 tiaA_gain_db_rev6[] = { 15479 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15480 const s8 *tia_gain_db; 15481 static const s8 tiaG_gainbits[] = { 15482 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15483 static const s8 tiaA_gainbits[] = { 15484 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; 15485 static const s8 tiaA_gainbits_rev4[] = { 15486 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15487 static const s8 tiaA_gainbits_rev5[] = { 15488 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15489 static const s8 tiaA_gainbits_rev6[] = { 15490 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15491 const s8 *tia_gainbits; 15492 static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; 15493 static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; 15494 static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; 15495 static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; 15496 static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; 15497 static const u16 rfseqG_init_gain_rev5_elna[] = { 15498 0x013f, 0x013f, 0x013f, 0x013f }; 15499 static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; 15500 static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; 15501 static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; 15502 static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; 15503 static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; 15504 static const u16 rfseqA_init_gain_rev4_elna[] = { 15505 0x314f, 0x314f, 0x314f, 0x314f }; 15506 static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; 15507 static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; 15508 const u16 *rfseq_init_gain; 15509 u16 initG_gaincode = 0x627e; 15510 u16 initG_gaincode_rev4 = 0x527e; 15511 u16 initG_gaincode_rev5 = 0x427e; 15512 u16 initG_gaincode_rev5_elna = 0x027e; 15513 u16 initG_gaincode_rev6 = 0x527e; 15514 u16 initG_gaincode_rev6_224B0 = 0x427e; 15515 u16 initG_gaincode_rev6_elna = 0x127e; 15516 u16 initA_gaincode = 0x52de; 15517 u16 initA_gaincode_rev4 = 0x629e; 15518 u16 initA_gaincode_rev4_elna = 0x329e; 15519 u16 initA_gaincode_rev5 = 0x729e; 15520 u16 initA_gaincode_rev6 = 0x729e; 15521 u16 init_gaincode; 15522 u16 clip1hiG_gaincode = 0x107e; 15523 u16 clip1hiG_gaincode_rev4 = 0x007e; 15524 u16 clip1hiG_gaincode_rev5 = 0x1076; 15525 u16 clip1hiG_gaincode_rev6 = 0x007e; 15526 u16 clip1hiA_gaincode = 0x00de; 15527 u16 clip1hiA_gaincode_rev4 = 0x029e; 15528 u16 clip1hiA_gaincode_rev5 = 0x029e; 15529 u16 clip1hiA_gaincode_rev6 = 0x029e; 15530 u16 clip1hi_gaincode; 15531 u16 clip1mdG_gaincode = 0x0066; 15532 u16 clip1mdA_gaincode = 0x00ca; 15533 u16 clip1mdA_gaincode_rev4 = 0x1084; 15534 u16 clip1mdA_gaincode_rev5 = 0x2084; 15535 u16 clip1mdA_gaincode_rev6 = 0x2084; 15536 u16 clip1md_gaincode = 0; 15537 u16 clip1loG_gaincode = 0x0074; 15538 static const u16 clip1loG_gaincode_rev5[] = { 15539 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c 15540 }; 15541 static const u16 clip1loG_gaincode_rev6[] = { 15542 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e 15543 }; 15544 u16 clip1loG_gaincode_rev6_224B0 = 0x1074; 15545 u16 clip1loA_gaincode = 0x00cc; 15546 u16 clip1loA_gaincode_rev4 = 0x0086; 15547 u16 clip1loA_gaincode_rev5 = 0x2086; 15548 u16 clip1loA_gaincode_rev6 = 0x2086; 15549 u16 clip1lo_gaincode; 15550 u8 crsminG_th = 0x18; 15551 u8 crsminG_th_rev5 = 0x18; 15552 u8 crsminG_th_rev6 = 0x18; 15553 u8 crsminA_th = 0x1e; 15554 u8 crsminA_th_rev4 = 0x24; 15555 u8 crsminA_th_rev5 = 0x24; 15556 u8 crsminA_th_rev6 = 0x24; 15557 u8 crsmin_th; 15558 u8 crsminlG_th = 0x18; 15559 u8 crsminlG_th_rev5 = 0x18; 15560 u8 crsminlG_th_rev6 = 0x18; 15561 u8 crsminlA_th = 0x1e; 15562 u8 crsminlA_th_rev4 = 0x24; 15563 u8 crsminlA_th_rev5 = 0x24; 15564 u8 crsminlA_th_rev6 = 0x24; 15565 u8 crsminl_th = 0; 15566 u8 crsminuG_th = 0x18; 15567 u8 crsminuG_th_rev5 = 0x18; 15568 u8 crsminuG_th_rev6 = 0x18; 15569 u8 crsminuA_th = 0x1e; 15570 u8 crsminuA_th_rev4 = 0x24; 15571 u8 crsminuA_th_rev5 = 0x24; 15572 u8 crsminuA_th_rev6 = 0x24; 15573 u8 crsminuA_th_rev6_224B0 = 0x2d; 15574 u8 crsminu_th; 15575 u16 nbclipG_th = 0x20d; 15576 u16 nbclipG_th_rev4 = 0x1a1; 15577 u16 nbclipG_th_rev5 = 0x1d0; 15578 u16 nbclipG_th_rev6 = 0x1d0; 15579 u16 nbclipA_th = 0x1a1; 15580 u16 nbclipA_th_rev4 = 0x107; 15581 u16 nbclipA_th_rev5 = 0x0a9; 15582 u16 nbclipA_th_rev6 = 0x0f0; 15583 u16 nbclip_th = 0; 15584 u8 w1clipG_th = 5; 15585 u8 w1clipG_th_rev5 = 9; 15586 u8 w1clipG_th_rev6 = 5; 15587 u8 w1clipA_th = 25, w1clip_th; 15588 u8 rssi_gain_default = 0x50; 15589 u8 rssiG_gain_rev6_224B0 = 0x50; 15590 u8 rssiA_gain_rev5 = 0x90; 15591 u8 rssiA_gain_rev6 = 0x90; 15592 u8 rssi_gain; 15593 u16 regval[21]; 15594 u8 triso; 15595 15596 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : 15597 pi->srom_fem2g.triso; 15598 15599 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 15600 if (pi->pubpi.radiorev == 5) { 15601 wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); 15602 } else if (pi->pubpi.radiorev == 7) { 15603 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15604 15605 mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); 15606 mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); 15607 15608 } else if ((pi->pubpi.radiorev == 3) 15609 || (pi->pubpi.radiorev == 8)) { 15610 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15611 15612 if (pi->pubpi.radiorev == 8) { 15613 mod_phy_reg(pi, 0x283, 15614 (0xff << 0), (0x44 << 0)); 15615 mod_phy_reg(pi, 0x280, 15616 (0xff << 0), (0x44 << 0)); 15617 } 15618 } else { 15619 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15620 } 15621 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 15622 15623 mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); 15624 15625 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15626 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15627 15628 currband = 15629 read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15630 if (currband == 0) { 15631 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15632 if (pi->pubpi.radiorev == 11) { 15633 lna1_gain_db = lna1G_gain_db_rev6_224B0; 15634 lna2_gain_db = lna2G_gain_db_rev6_224B0; 15635 rfseq_init_gain = 15636 rfseqG_init_gain_rev6_224B0; 15637 init_gaincode = 15638 initG_gaincode_rev6_224B0; 15639 clip1hi_gaincode = 15640 clip1hiG_gaincode_rev6; 15641 clip1lo_gaincode = 15642 clip1loG_gaincode_rev6_224B0; 15643 nbclip_th = nbclipG_th_rev6; 15644 w1clip_th = w1clipG_th_rev6; 15645 crsmin_th = crsminG_th_rev6; 15646 crsminl_th = crsminlG_th_rev6; 15647 crsminu_th = crsminuG_th_rev6; 15648 rssi_gain = rssiG_gain_rev6_224B0; 15649 } else { 15650 lna1_gain_db = lna1G_gain_db_rev6; 15651 lna2_gain_db = lna2G_gain_db_rev6; 15652 if (pi->sh->boardflags & BFL_EXTLNA) { 15653 15654 rfseq_init_gain = 15655 rfseqG_init_gain_rev6_elna; 15656 init_gaincode = 15657 initG_gaincode_rev6_elna; 15658 } else { 15659 rfseq_init_gain = 15660 rfseqG_init_gain_rev6; 15661 init_gaincode = 15662 initG_gaincode_rev6; 15663 } 15664 clip1hi_gaincode = 15665 clip1hiG_gaincode_rev6; 15666 switch (triso) { 15667 case 0: 15668 clip1lo_gaincode = 15669 clip1loG_gaincode_rev6 15670 [0]; 15671 break; 15672 case 1: 15673 clip1lo_gaincode = 15674 clip1loG_gaincode_rev6 15675 [1]; 15676 break; 15677 case 2: 15678 clip1lo_gaincode = 15679 clip1loG_gaincode_rev6 15680 [2]; 15681 break; 15682 case 3: 15683 default: 15684 15685 clip1lo_gaincode = 15686 clip1loG_gaincode_rev6 15687 [3]; 15688 break; 15689 case 4: 15690 clip1lo_gaincode = 15691 clip1loG_gaincode_rev6 15692 [4]; 15693 break; 15694 case 5: 15695 clip1lo_gaincode = 15696 clip1loG_gaincode_rev6 15697 [5]; 15698 break; 15699 case 6: 15700 clip1lo_gaincode = 15701 clip1loG_gaincode_rev6 15702 [6]; 15703 break; 15704 case 7: 15705 clip1lo_gaincode = 15706 clip1loG_gaincode_rev6 15707 [7]; 15708 break; 15709 } 15710 nbclip_th = nbclipG_th_rev6; 15711 w1clip_th = w1clipG_th_rev6; 15712 crsmin_th = crsminG_th_rev6; 15713 crsminl_th = crsminlG_th_rev6; 15714 crsminu_th = crsminuG_th_rev6; 15715 rssi_gain = rssi_gain_default; 15716 } 15717 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15718 lna1_gain_db = lna1G_gain_db_rev5; 15719 lna2_gain_db = lna2G_gain_db_rev5; 15720 if (pi->sh->boardflags & BFL_EXTLNA) { 15721 15722 rfseq_init_gain = 15723 rfseqG_init_gain_rev5_elna; 15724 init_gaincode = 15725 initG_gaincode_rev5_elna; 15726 } else { 15727 rfseq_init_gain = rfseqG_init_gain_rev5; 15728 init_gaincode = initG_gaincode_rev5; 15729 } 15730 clip1hi_gaincode = clip1hiG_gaincode_rev5; 15731 switch (triso) { 15732 case 0: 15733 clip1lo_gaincode = 15734 clip1loG_gaincode_rev5[0]; 15735 break; 15736 case 1: 15737 clip1lo_gaincode = 15738 clip1loG_gaincode_rev5[1]; 15739 break; 15740 case 2: 15741 clip1lo_gaincode = 15742 clip1loG_gaincode_rev5[2]; 15743 break; 15744 case 3: 15745 15746 clip1lo_gaincode = 15747 clip1loG_gaincode_rev5[3]; 15748 break; 15749 case 4: 15750 clip1lo_gaincode = 15751 clip1loG_gaincode_rev5[4]; 15752 break; 15753 case 5: 15754 clip1lo_gaincode = 15755 clip1loG_gaincode_rev5[5]; 15756 break; 15757 case 6: 15758 clip1lo_gaincode = 15759 clip1loG_gaincode_rev5[6]; 15760 break; 15761 case 7: 15762 clip1lo_gaincode = 15763 clip1loG_gaincode_rev5[7]; 15764 break; 15765 default: 15766 clip1lo_gaincode = 15767 clip1loG_gaincode_rev5[3]; 15768 break; 15769 } 15770 nbclip_th = nbclipG_th_rev5; 15771 w1clip_th = w1clipG_th_rev5; 15772 crsmin_th = crsminG_th_rev5; 15773 crsminl_th = crsminlG_th_rev5; 15774 crsminu_th = crsminuG_th_rev5; 15775 rssi_gain = rssi_gain_default; 15776 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15777 lna1_gain_db = lna1G_gain_db_rev4; 15778 lna2_gain_db = lna2G_gain_db; 15779 rfseq_init_gain = rfseqG_init_gain_rev4; 15780 init_gaincode = initG_gaincode_rev4; 15781 clip1hi_gaincode = clip1hiG_gaincode_rev4; 15782 clip1lo_gaincode = clip1loG_gaincode; 15783 nbclip_th = nbclipG_th_rev4; 15784 w1clip_th = w1clipG_th; 15785 crsmin_th = crsminG_th; 15786 crsminl_th = crsminlG_th; 15787 crsminu_th = crsminuG_th; 15788 rssi_gain = rssi_gain_default; 15789 } else { 15790 lna1_gain_db = lna1G_gain_db; 15791 lna2_gain_db = lna2G_gain_db; 15792 rfseq_init_gain = rfseqG_init_gain; 15793 init_gaincode = initG_gaincode; 15794 clip1hi_gaincode = clip1hiG_gaincode; 15795 clip1lo_gaincode = clip1loG_gaincode; 15796 nbclip_th = nbclipG_th; 15797 w1clip_th = w1clipG_th; 15798 crsmin_th = crsminG_th; 15799 crsminl_th = crsminlG_th; 15800 crsminu_th = crsminuG_th; 15801 rssi_gain = rssi_gain_default; 15802 } 15803 tia_gain_db = tiaG_gain_db; 15804 tia_gainbits = tiaG_gainbits; 15805 clip1md_gaincode = clip1mdG_gaincode; 15806 } else { 15807 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15808 lna1_gain_db = lna1A_gain_db_rev6; 15809 lna2_gain_db = lna2A_gain_db_rev6; 15810 tia_gain_db = tiaA_gain_db_rev6; 15811 tia_gainbits = tiaA_gainbits_rev6; 15812 rfseq_init_gain = rfseqA_init_gain_rev6; 15813 init_gaincode = initA_gaincode_rev6; 15814 clip1hi_gaincode = clip1hiA_gaincode_rev6; 15815 clip1md_gaincode = clip1mdA_gaincode_rev6; 15816 clip1lo_gaincode = clip1loA_gaincode_rev6; 15817 crsmin_th = crsminA_th_rev6; 15818 crsminl_th = crsminlA_th_rev6; 15819 if ((pi->pubpi.radiorev == 11) && 15820 (CHSPEC_IS40(pi->radio_chanspec) == 0)) 15821 crsminu_th = crsminuA_th_rev6_224B0; 15822 else 15823 crsminu_th = crsminuA_th_rev6; 15824 15825 nbclip_th = nbclipA_th_rev6; 15826 rssi_gain = rssiA_gain_rev6; 15827 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15828 lna1_gain_db = lna1A_gain_db_rev5; 15829 lna2_gain_db = lna2A_gain_db_rev5; 15830 tia_gain_db = tiaA_gain_db_rev5; 15831 tia_gainbits = tiaA_gainbits_rev5; 15832 rfseq_init_gain = rfseqA_init_gain_rev5; 15833 init_gaincode = initA_gaincode_rev5; 15834 clip1hi_gaincode = clip1hiA_gaincode_rev5; 15835 clip1md_gaincode = clip1mdA_gaincode_rev5; 15836 clip1lo_gaincode = clip1loA_gaincode_rev5; 15837 crsmin_th = crsminA_th_rev5; 15838 crsminl_th = crsminlA_th_rev5; 15839 crsminu_th = crsminuA_th_rev5; 15840 nbclip_th = nbclipA_th_rev5; 15841 rssi_gain = rssiA_gain_rev5; 15842 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15843 lna1_gain_db = lna1A_gain_db_rev4; 15844 lna2_gain_db = lna2A_gain_db_rev4; 15845 tia_gain_db = tiaA_gain_db_rev4; 15846 tia_gainbits = tiaA_gainbits_rev4; 15847 if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { 15848 15849 rfseq_init_gain = 15850 rfseqA_init_gain_rev4_elna; 15851 init_gaincode = 15852 initA_gaincode_rev4_elna; 15853 } else { 15854 rfseq_init_gain = rfseqA_init_gain_rev4; 15855 init_gaincode = initA_gaincode_rev4; 15856 } 15857 clip1hi_gaincode = clip1hiA_gaincode_rev4; 15858 clip1md_gaincode = clip1mdA_gaincode_rev4; 15859 clip1lo_gaincode = clip1loA_gaincode_rev4; 15860 crsmin_th = crsminA_th_rev4; 15861 crsminl_th = crsminlA_th_rev4; 15862 crsminu_th = crsminuA_th_rev4; 15863 nbclip_th = nbclipA_th_rev4; 15864 rssi_gain = rssi_gain_default; 15865 } else { 15866 lna1_gain_db = lna1A_gain_db; 15867 lna2_gain_db = lna2A_gain_db; 15868 tia_gain_db = tiaA_gain_db; 15869 tia_gainbits = tiaA_gainbits; 15870 rfseq_init_gain = rfseqA_init_gain; 15871 init_gaincode = initA_gaincode; 15872 clip1hi_gaincode = clip1hiA_gaincode; 15873 clip1md_gaincode = clip1mdA_gaincode; 15874 clip1lo_gaincode = clip1loA_gaincode; 15875 crsmin_th = crsminA_th; 15876 crsminl_th = crsminlA_th; 15877 crsminu_th = crsminuA_th; 15878 nbclip_th = nbclipA_th; 15879 rssi_gain = rssi_gain_default; 15880 } 15881 w1clip_th = w1clipA_th; 15882 } 15883 15884 write_radio_reg(pi, 15885 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15886 RADIO_2056_RX0), 0x17); 15887 write_radio_reg(pi, 15888 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15889 RADIO_2056_RX1), 0x17); 15890 15891 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), 15892 0xf0); 15893 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), 15894 0xf0); 15895 15896 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), 15897 0x0); 15898 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), 15899 0x0); 15900 15901 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), 15902 rssi_gain); 15903 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), 15904 rssi_gain); 15905 15906 write_radio_reg(pi, 15907 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15908 RADIO_2056_RX0), 0x17); 15909 write_radio_reg(pi, 15910 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15911 RADIO_2056_RX1), 0x17); 15912 15913 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), 15914 0xFF); 15915 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), 15916 0xFF); 15917 15918 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 15919 8, lna1_gain_db); 15920 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 15921 8, lna1_gain_db); 15922 15923 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15924 8, lna2_gain_db); 15925 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15926 8, lna2_gain_db); 15927 15928 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 15929 8, tia_gain_db); 15930 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 15931 8, tia_gain_db); 15932 15933 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 15934 8, tia_gainbits); 15935 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 15936 8, tia_gainbits); 15937 15938 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, 15939 8, &lpf_gain_db); 15940 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, 15941 8, &lpf_gain_db); 15942 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, 15943 8, &lpf_gainbits); 15944 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, 15945 8, &lpf_gainbits); 15946 15947 write_phy_reg(pi, 0x20, init_gaincode); 15948 write_phy_reg(pi, 0x2a7, init_gaincode); 15949 15950 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15951 pi->pubpi.phy_corenum, 0x106, 16, 15952 rfseq_init_gain); 15953 15954 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15955 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15956 15957 write_phy_reg(pi, 0x24, clip1md_gaincode); 15958 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15959 15960 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15961 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15962 15963 mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); 15964 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15965 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15966 15967 write_phy_reg(pi, 0x2b, nbclip_th); 15968 write_phy_reg(pi, 0x41, nbclip_th); 15969 15970 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); 15971 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); 15972 15973 write_phy_reg(pi, 0x150, 0x809c); 15974 15975 } else { 15976 15977 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15978 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15979 15980 write_phy_reg(pi, 0x2b, 0x84); 15981 write_phy_reg(pi, 0x41, 0x84); 15982 15983 if (CHSPEC_IS20(pi->radio_chanspec)) { 15984 write_phy_reg(pi, 0x6b, 0x2b); 15985 write_phy_reg(pi, 0x6c, 0x2b); 15986 write_phy_reg(pi, 0x6d, 0x9); 15987 write_phy_reg(pi, 0x6e, 0x9); 15988 } 15989 15990 w1th = NPHY_RSSICAL_W1_TARGET - 4; 15991 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); 15992 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); 15993 15994 if (CHSPEC_IS20(pi->radio_chanspec)) { 15995 mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); 15996 mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); 15997 15998 mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); 15999 mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); 16000 } 16001 16002 write_phy_reg(pi, 0x150, 0x809c); 16003 16004 if (pi->nphy_gain_boost) 16005 if ((CHSPEC_IS2G(pi->radio_chanspec)) && 16006 (CHSPEC_IS40(pi->radio_chanspec))) 16007 hpf_code = 4; 16008 else 16009 hpf_code = 5; 16010 else if (CHSPEC_IS40(pi->radio_chanspec)) 16011 hpf_code = 6; 16012 else 16013 hpf_code = 7; 16014 16015 mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); 16016 mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); 16017 16018 for (ctr = 0; ctr < 4; ctr++) 16019 regval[ctr] = (hpf_code << 8) | 0x7c; 16020 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16021 16022 wlc_phy_adjust_lnagaintbl_nphy(pi); 16023 16024 if (pi->nphy_elna_gain_config) { 16025 regval[0] = 0; 16026 regval[1] = 1; 16027 regval[2] = 1; 16028 regval[3] = 1; 16029 wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); 16030 wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); 16031 16032 for (ctr = 0; ctr < 4; ctr++) 16033 regval[ctr] = (hpf_code << 8) | 0x74; 16034 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16035 } 16036 16037 if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16038 for (ctr = 0; ctr < 21; ctr++) 16039 regval[ctr] = 3 * ctr; 16040 wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); 16041 wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); 16042 16043 for (ctr = 0; ctr < 21; ctr++) 16044 regval[ctr] = (u16) ctr; 16045 wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); 16046 wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); 16047 } 16048 16049 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, 16050 rfseq_updategainu_events, 16051 rfseq_updategainu_dlys, 16052 sizeof(rfseq_updategainu_events) / 16053 sizeof(rfseq_updategainu_events[0])); 16054 16055 mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); 16056 16057 if (CHSPEC_IS2G(pi->radio_chanspec)) 16058 mod_phy_reg(pi, 16059 (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), 16060 0x7f, 0x4); 16061 } 16062 } 16063 16064 static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi) 16065 { 16066 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16067 NPHY_REV3_RFSEQ_CMD_NOP, 16068 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16069 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16070 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16071 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16072 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16073 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16074 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16075 NPHY_REV3_RFSEQ_CMD_END 16076 }; 16077 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16078 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16079 static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; 16080 u32 leg_data_weights; 16081 u8 chan_freq_range = 0; 16082 static const u16 dac_control = 0x0002; 16083 u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; 16084 u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; 16085 u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; 16086 s32 min_nvar_val = 0x18d; 16087 s32 min_nvar_offset_6mbps = 20; 16088 u8 pdetrange; 16089 u16 afectrl_adc_ctrl1_rev7 = 0x20; 16090 u16 afectrl_adc_ctrl2_rev7 = 0x0; 16091 u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; 16092 u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; 16093 u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; 16094 static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; 16095 static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16096 static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16097 u16 ipalvlshift_3p3_war_en = 0; 16098 u16 rccal_bcap_val, rccal_scap_val; 16099 u16 rccal_tx20_11b_bcap = 0; 16100 u16 rccal_tx20_11b_scap = 0; 16101 u16 rccal_tx20_11n_bcap = 0; 16102 u16 rccal_tx20_11n_scap = 0; 16103 u16 rccal_tx40_11n_bcap = 0; 16104 u16 rccal_tx40_11n_scap = 0; 16105 u16 rx2tx_lpf_rc_lut_tx20_11b = 0; 16106 u16 rx2tx_lpf_rc_lut_tx20_11n = 0; 16107 u16 rx2tx_lpf_rc_lut_tx40_11n = 0; 16108 u16 tx_lpf_bw_ofdm_20mhz = 0; 16109 u16 tx_lpf_bw_ofdm_40mhz = 0; 16110 u16 tx_lpf_bw_11b = 0; 16111 u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; 16112 u16 txgm_idac_bleed = 0; 16113 bool rccal_ovrd = false; 16114 u16 freq; 16115 int coreNum; 16116 16117 16118 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 16119 mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); 16120 16121 mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); 16122 mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); 16123 mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); 16124 mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); 16125 mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); 16126 mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); 16127 mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); 16128 mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); 16129 mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); 16130 mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); 16131 mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); 16132 mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); 16133 mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); 16134 mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); 16135 mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); 16136 mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); 16137 } 16138 16139 if (NREV_LE(pi->pubpi.phy_rev, 8)) { 16140 write_phy_reg(pi, 0x23f, 0x1b0); 16141 write_phy_reg(pi, 0x240, 0x1b0); 16142 } 16143 16144 if (NREV_GE(pi->pubpi.phy_rev, 8)) 16145 mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); 16146 16147 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16148 &dac_control); 16149 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16150 &dac_control); 16151 16152 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16153 1, 0, 32, &leg_data_weights); 16154 leg_data_weights = leg_data_weights & 0xffffff; 16155 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16156 1, 0, 32, &leg_data_weights); 16157 16158 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 16159 2, 0x15e, 16, rfseq_rx2tx_dacbufpu_rev7); 16160 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, 16161 rfseq_rx2tx_dacbufpu_rev7); 16162 16163 if (PHY_IPA(pi)) 16164 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16165 rfseq_rx2tx_events_rev3_ipa, 16166 rfseq_rx2tx_dlys_rev3_ipa, 16167 ARRAY_SIZE 16168 (rfseq_rx2tx_events_rev3_ipa)); 16169 16170 mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); 16171 mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); 16172 16173 tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); 16174 tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); 16175 tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); 16176 16177 if (PHY_IPA(pi)) { 16178 16179 if (((pi->pubpi.radiorev == 5) 16180 && (CHSPEC_IS40(pi->radio_chanspec) == 1)) 16181 || (pi->pubpi.radiorev == 7) 16182 || (pi->pubpi.radiorev == 8)) { 16183 16184 rccal_bcap_val = 16185 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16186 rccal_scap_val = 16187 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16188 16189 rccal_tx20_11b_bcap = rccal_bcap_val; 16190 rccal_tx20_11b_scap = rccal_scap_val; 16191 16192 if ((pi->pubpi.radiorev == 5) && 16193 (CHSPEC_IS40(pi->radio_chanspec) == 1)) { 16194 16195 rccal_tx20_11n_bcap = rccal_bcap_val; 16196 rccal_tx20_11n_scap = rccal_scap_val; 16197 rccal_tx40_11n_bcap = 0xc; 16198 rccal_tx40_11n_scap = 0xc; 16199 16200 rccal_ovrd = true; 16201 16202 } else if ((pi->pubpi.radiorev == 7) 16203 || (pi->pubpi.radiorev == 8)) { 16204 16205 tx_lpf_bw_ofdm_20mhz = 4; 16206 tx_lpf_bw_11b = 1; 16207 16208 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16209 rccal_tx20_11n_bcap = 0xc; 16210 rccal_tx20_11n_scap = 0xc; 16211 rccal_tx40_11n_bcap = 0xa; 16212 rccal_tx40_11n_scap = 0xa; 16213 } else { 16214 rccal_tx20_11n_bcap = 0x14; 16215 rccal_tx20_11n_scap = 0x14; 16216 rccal_tx40_11n_bcap = 0xf; 16217 rccal_tx40_11n_scap = 0xf; 16218 } 16219 16220 rccal_ovrd = true; 16221 } 16222 } 16223 16224 } else { 16225 16226 if (pi->pubpi.radiorev == 5) { 16227 16228 tx_lpf_bw_ofdm_20mhz = 1; 16229 tx_lpf_bw_ofdm_40mhz = 3; 16230 16231 rccal_bcap_val = 16232 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16233 rccal_scap_val = 16234 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16235 16236 rccal_tx20_11b_bcap = rccal_bcap_val; 16237 rccal_tx20_11b_scap = rccal_scap_val; 16238 16239 rccal_tx20_11n_bcap = 0x13; 16240 rccal_tx20_11n_scap = 0x11; 16241 rccal_tx40_11n_bcap = 0x13; 16242 rccal_tx40_11n_scap = 0x11; 16243 16244 rccal_ovrd = true; 16245 } 16246 } 16247 16248 if (rccal_ovrd) { 16249 16250 rx2tx_lpf_rc_lut_tx20_11b = 16251 (rccal_tx20_11b_bcap << 8) | 16252 (rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b; 16253 rx2tx_lpf_rc_lut_tx20_11n = 16254 (rccal_tx20_11n_bcap << 8) | 16255 (rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz; 16256 rx2tx_lpf_rc_lut_tx40_11n = 16257 (rccal_tx40_11n_bcap << 8) | 16258 (rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz; 16259 16260 for (coreNum = 0; coreNum <= 1; coreNum++) { 16261 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16262 0x152 + coreNum * 0x10, 16, 16263 &rx2tx_lpf_rc_lut_tx20_11b); 16264 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16265 0x153 + coreNum * 0x10, 16, 16266 &rx2tx_lpf_rc_lut_tx20_11n); 16267 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16268 0x154 + coreNum * 0x10, 16, 16269 &rx2tx_lpf_rc_lut_tx20_11n); 16270 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16271 0x155 + coreNum * 0x10, 16, 16272 &rx2tx_lpf_rc_lut_tx40_11n); 16273 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16274 0x156 + coreNum * 0x10, 16, 16275 &rx2tx_lpf_rc_lut_tx40_11n); 16276 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16277 0x157 + coreNum * 0x10, 16, 16278 &rx2tx_lpf_rc_lut_tx40_11n); 16279 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16280 0x158 + coreNum * 0x10, 16, 16281 &rx2tx_lpf_rc_lut_tx40_11n); 16282 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16283 0x159 + coreNum * 0x10, 16, 16284 &rx2tx_lpf_rc_lut_tx40_11n); 16285 } 16286 16287 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0x3, 0, 16288 NPHY_REV7_RFCTRLOVERRIDE_ID2); 16289 } 16290 16291 write_phy_reg(pi, 0x32f, 0x3); 16292 16293 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 16294 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 0, 16295 NPHY_REV7_RFCTRLOVERRIDE_ID0); 16296 16297 if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || 16298 (pi->pubpi.radiorev == 6)) { 16299 if ((pi->sh->sromrev >= 8) 16300 && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) 16301 ipalvlshift_3p3_war_en = 1; 16302 16303 if (ipalvlshift_3p3_war_en) { 16304 write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, 0x5); 16305 write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, 0x30); 16306 write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); 16307 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE0, 0x1); 16308 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE1, 0x1); 16309 16310 ipa2g_mainbias = 0x1f; 16311 16312 ipa2g_casconv = 0x6f; 16313 16314 ipa2g_biasfilt = 0xaa; 16315 } else { 16316 16317 ipa2g_mainbias = 0x2b; 16318 16319 ipa2g_casconv = 0x7f; 16320 16321 ipa2g_biasfilt = 0xee; 16322 } 16323 16324 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16325 for (coreNum = 0; coreNum <= 1; coreNum++) { 16326 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16327 coreNum, IPA2G_IMAIN, 16328 ipa2g_mainbias); 16329 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16330 coreNum, IPA2G_CASCONV, 16331 ipa2g_casconv); 16332 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16333 coreNum, 16334 IPA2G_BIAS_FILTER, 16335 ipa2g_biasfilt); 16336 } 16337 } 16338 } 16339 16340 if (PHY_IPA(pi)) { 16341 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16342 if ((pi->pubpi.radiorev == 3) 16343 || (pi->pubpi.radiorev == 4) 16344 || (pi->pubpi.radiorev == 6)) 16345 txgm_idac_bleed = 0x7f; 16346 16347 for (coreNum = 0; coreNum <= 1; coreNum++) { 16348 if (txgm_idac_bleed != 0) 16349 WRITE_RADIO_REG4(pi, RADIO_2057, 16350 CORE, coreNum, 16351 TXGM_IDAC_BLEED, 16352 txgm_idac_bleed); 16353 } 16354 16355 if (pi->pubpi.radiorev == 5) { 16356 for (coreNum = 0; coreNum <= 1; coreNum++) { 16357 WRITE_RADIO_REG4(pi, RADIO_2057, 16358 CORE, coreNum, 16359 IPA2G_CASCONV, 16360 0x13); 16361 WRITE_RADIO_REG4(pi, RADIO_2057, 16362 CORE, coreNum, 16363 IPA2G_IMAIN, 16364 0x1f); 16365 WRITE_RADIO_REG4(pi, RADIO_2057, 16366 CORE, coreNum, 16367 IPA2G_BIAS_FILTER, 16368 0xee); 16369 WRITE_RADIO_REG4(pi, RADIO_2057, 16370 CORE, coreNum, 16371 PAD2G_IDACS, 16372 0x8a); 16373 WRITE_RADIO_REG4(pi, RADIO_2057, 16374 CORE, coreNum, 16375 PAD_BIAS_FILTER_BWS, 16376 0x3e); 16377 } 16378 } else if ((pi->pubpi.radiorev == 7) || 16379 (pi->pubpi.radiorev == 8)) { 16380 16381 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16382 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16383 0, IPA2G_IMAIN, 0x14); 16384 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16385 1, IPA2G_IMAIN, 0x12); 16386 } else { 16387 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16388 0, IPA2G_IMAIN, 0x16); 16389 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16390 1, IPA2G_IMAIN, 0x16); 16391 } 16392 } 16393 16394 } else { 16395 freq = 16396 CHAN5G_FREQ(CHSPEC_CHANNEL 16397 (pi->radio_chanspec)); 16398 if (((freq >= 5180) && (freq <= 5230)) 16399 || ((freq >= 5745) && (freq <= 5805))) { 16400 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16401 0, IPA5G_BIAS_FILTER, 0xff); 16402 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16403 1, IPA5G_BIAS_FILTER, 0xff); 16404 } 16405 } 16406 } else { 16407 16408 if (pi->pubpi.radiorev != 5) { 16409 for (coreNum = 0; coreNum <= 1; coreNum++) { 16410 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16411 TXMIX2G_TUNE_BOOST_PU, 0x61); 16412 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16413 TXGM_IDAC_BLEED, 0x70); 16414 } 16415 } 16416 } 16417 16418 if (pi->pubpi.radiorev == 4) { 16419 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16420 &afectrl_adc_ctrl1_rev7); 16421 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16422 &afectrl_adc_ctrl1_rev7); 16423 16424 for (coreNum = 0; coreNum <= 1; coreNum++) { 16425 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16426 AFE_VCM_CAL_MASTER, 0x0); 16427 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16428 AFE_SET_VCM_I, 0x3f); 16429 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16430 AFE_SET_VCM_Q, 0x3f); 16431 } 16432 } else { 16433 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 16434 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 16435 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 16436 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 16437 16438 mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); 16439 mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); 16440 mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); 16441 mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); 16442 16443 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16444 &afectrl_adc_ctrl2_rev7); 16445 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16446 &afectrl_adc_ctrl2_rev7); 16447 16448 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 16449 mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); 16450 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 16451 mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); 16452 } 16453 16454 write_phy_reg(pi, 0x6a, 0x2); 16455 16456 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, 16457 &min_nvar_offset_6mbps); 16458 16459 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, 16460 &rfseq_pktgn_lpf_hpc_rev7); 16461 16462 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, 16463 &rfseq_pktgn_lpf_h_hpc_rev7); 16464 16465 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, 16466 &rfseq_htpktgn_lpf_hpc_rev7); 16467 16468 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, 16469 &rfseq_cckpktgn_lpf_hpc_rev7); 16470 16471 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, 16472 &rfseq_tx2rx_lpf_h_hpc_rev7); 16473 16474 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, 16475 &rfseq_rx2tx_lpf_h_hpc_rev7); 16476 16477 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16478 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16479 32, &min_nvar_val); 16480 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16481 127, 32, &min_nvar_val); 16482 } else { 16483 min_nvar_val = noise_var_tbl_rev7[3]; 16484 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16485 32, &min_nvar_val); 16486 16487 min_nvar_val = noise_var_tbl_rev7[127]; 16488 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16489 127, 32, &min_nvar_val); 16490 } 16491 16492 wlc_phy_workarounds_nphy_gainctrl(pi); 16493 16494 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16495 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16496 16497 if (pdetrange == 0) { 16498 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16499 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16500 aux_adc_vmid_rev7_core0[3] = 0x70; 16501 aux_adc_vmid_rev7_core1[3] = 0x70; 16502 aux_adc_gain_rev7[3] = 2; 16503 } else { 16504 aux_adc_vmid_rev7_core0[3] = 0x80; 16505 aux_adc_vmid_rev7_core1[3] = 0x80; 16506 aux_adc_gain_rev7[3] = 3; 16507 } 16508 } else if (pdetrange == 1) { 16509 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16510 aux_adc_vmid_rev7_core0[3] = 0x7c; 16511 aux_adc_vmid_rev7_core1[3] = 0x7c; 16512 aux_adc_gain_rev7[3] = 2; 16513 } else { 16514 aux_adc_vmid_rev7_core0[3] = 0x8c; 16515 aux_adc_vmid_rev7_core1[3] = 0x8c; 16516 aux_adc_gain_rev7[3] = 1; 16517 } 16518 } else if (pdetrange == 2) { 16519 if (pi->pubpi.radioid == BCM2057_ID) { 16520 if ((pi->pubpi.radiorev == 5) 16521 || (pi->pubpi.radiorev == 7) 16522 || (pi->pubpi.radiorev == 8)) { 16523 if (chan_freq_range == 16524 WL_CHAN_FREQ_RANGE_2G) { 16525 aux_adc_vmid_rev7_core0[3] = 0x8c; 16526 aux_adc_vmid_rev7_core1[3] = 0x8c; 16527 aux_adc_gain_rev7[3] = 0; 16528 } else { 16529 aux_adc_vmid_rev7_core0[3] = 0x96; 16530 aux_adc_vmid_rev7_core1[3] = 0x96; 16531 aux_adc_gain_rev7[3] = 0; 16532 } 16533 } 16534 } 16535 16536 } else if (pdetrange == 3) { 16537 if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { 16538 aux_adc_vmid_rev7_core0[3] = 0x89; 16539 aux_adc_vmid_rev7_core1[3] = 0x89; 16540 aux_adc_gain_rev7[3] = 0; 16541 } 16542 16543 } else if (pdetrange == 5) { 16544 16545 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16546 aux_adc_vmid_rev7_core0[3] = 0x80; 16547 aux_adc_vmid_rev7_core1[3] = 0x80; 16548 aux_adc_gain_rev7[3] = 3; 16549 } else { 16550 aux_adc_vmid_rev7_core0[3] = 0x70; 16551 aux_adc_vmid_rev7_core1[3] = 0x70; 16552 aux_adc_gain_rev7[3] = 2; 16553 } 16554 } 16555 16556 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, 16557 &aux_adc_vmid_rev7_core0); 16558 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, 16559 &aux_adc_vmid_rev7_core1); 16560 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, 16561 &aux_adc_gain_rev7); 16562 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, 16563 &aux_adc_gain_rev7); 16564 } 16565 16566 static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi) 16567 { 16568 static const u8 rfseq_tx2rx_events_rev3[] = { 16569 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16570 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16571 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16572 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16573 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16574 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16575 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16576 NPHY_REV3_RFSEQ_CMD_END 16577 }; 16578 static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; 16579 u8 rfseq_rx2tx_events_rev3[] = { 16580 NPHY_REV3_RFSEQ_CMD_NOP, 16581 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16582 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16583 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16584 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16585 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16586 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16587 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16588 NPHY_REV3_RFSEQ_CMD_END 16589 }; 16590 u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; 16591 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16592 NPHY_REV3_RFSEQ_CMD_NOP, 16593 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16594 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16595 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16596 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16597 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16598 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16599 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16600 NPHY_REV3_RFSEQ_CMD_END 16601 }; 16602 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16603 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16604 s16 alpha0, alpha1, alpha2; 16605 s16 beta0, beta1, beta2; 16606 u32 leg_data_weights, ht_data_weights, nss1_data_weights, 16607 stbc_data_weights; 16608 u8 chan_freq_range = 0; 16609 static const u16 dac_control = 0x0002; 16610 u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16611 u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16612 u16 *aux_adc_vmid; 16613 u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; 16614 u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; 16615 u16 *aux_adc_gain; 16616 static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; 16617 static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; 16618 s32 min_nvar_val = 0x18d; 16619 u8 pdetrange; 16620 u8 triso; 16621 16622 write_phy_reg(pi, 0x23f, 0x1f8); 16623 write_phy_reg(pi, 0x240, 0x1f8); 16624 16625 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16626 1, 0, 32, &leg_data_weights); 16627 leg_data_weights = leg_data_weights & 0xffffff; 16628 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16629 1, 0, 32, &leg_data_weights); 16630 16631 alpha0 = 293; 16632 alpha1 = 435; 16633 alpha2 = 261; 16634 beta0 = 366; 16635 beta1 = 205; 16636 beta2 = 32; 16637 write_phy_reg(pi, 0x145, alpha0); 16638 write_phy_reg(pi, 0x146, alpha1); 16639 write_phy_reg(pi, 0x147, alpha2); 16640 write_phy_reg(pi, 0x148, beta0); 16641 write_phy_reg(pi, 0x149, beta1); 16642 write_phy_reg(pi, 0x14a, beta2); 16643 16644 write_phy_reg(pi, 0x38, 0xC); 16645 write_phy_reg(pi, 0x2ae, 0xC); 16646 16647 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, 16648 rfseq_tx2rx_events_rev3, 16649 rfseq_tx2rx_dlys_rev3, 16650 ARRAY_SIZE(rfseq_tx2rx_events_rev3)); 16651 16652 if (PHY_IPA(pi)) 16653 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16654 rfseq_rx2tx_events_rev3_ipa, 16655 rfseq_rx2tx_dlys_rev3_ipa, 16656 ARRAY_SIZE (rfseq_rx2tx_events_rev3_ipa)); 16657 16658 if ((pi->sh->hw_phyrxchain != 0x3) && 16659 (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { 16660 16661 if (PHY_IPA(pi)) { 16662 rfseq_rx2tx_dlys_rev3[5] = 59; 16663 rfseq_rx2tx_dlys_rev3[6] = 1; 16664 rfseq_rx2tx_events_rev3[7] = NPHY_REV3_RFSEQ_CMD_END; 16665 } 16666 16667 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16668 rfseq_rx2tx_events_rev3, 16669 rfseq_rx2tx_dlys_rev3, 16670 ARRAY_SIZE (rfseq_rx2tx_events_rev3)); 16671 } 16672 16673 if (CHSPEC_IS2G(pi->radio_chanspec)) 16674 write_phy_reg(pi, 0x6a, 0x2); 16675 else 16676 write_phy_reg(pi, 0x6a, 0x9c40); 16677 16678 mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); 16679 16680 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16681 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16682 32, &min_nvar_val); 16683 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16684 127, 32, &min_nvar_val); 16685 } else { 16686 min_nvar_val = noise_var_tbl_rev3[3]; 16687 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16688 32, &min_nvar_val); 16689 16690 min_nvar_val = noise_var_tbl_rev3[127]; 16691 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16692 127, 32, &min_nvar_val); 16693 } 16694 16695 wlc_phy_workarounds_nphy_gainctrl(pi); 16696 16697 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16698 &dac_control); 16699 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16700 &dac_control); 16701 16702 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16703 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16704 16705 if (pdetrange == 0) { 16706 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 16707 aux_adc_vmid = aux_adc_vmid_rev4; 16708 aux_adc_gain = aux_adc_gain_rev4; 16709 } else { 16710 aux_adc_vmid = aux_adc_vmid_rev3; 16711 aux_adc_gain = aux_adc_gain_rev3; 16712 } 16713 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16714 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16715 switch (chan_freq_range) { 16716 case WL_CHAN_FREQ_RANGE_5GL: 16717 aux_adc_vmid[3] = 0x89; 16718 aux_adc_gain[3] = 0; 16719 break; 16720 case WL_CHAN_FREQ_RANGE_5GM: 16721 aux_adc_vmid[3] = 0x89; 16722 aux_adc_gain[3] = 0; 16723 break; 16724 case WL_CHAN_FREQ_RANGE_5GH: 16725 aux_adc_vmid[3] = 0x89; 16726 aux_adc_gain[3] = 0; 16727 break; 16728 default: 16729 break; 16730 } 16731 } 16732 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16733 0x08, 16, aux_adc_vmid); 16734 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16735 0x18, 16, aux_adc_vmid); 16736 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16737 0x0c, 16, aux_adc_gain); 16738 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16739 0x1c, 16, aux_adc_gain); 16740 } else if (pdetrange == 1) { 16741 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16742 0x08, 16, sk_adc_vmid); 16743 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16744 0x18, 16, sk_adc_vmid); 16745 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16746 0x0c, 16, sk_adc_gain); 16747 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16748 0x1c, 16, sk_adc_gain); 16749 } else if (pdetrange == 2) { 16750 16751 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; 16752 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; 16753 16754 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16755 chan_freq_range = 16756 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16757 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16758 bcm_adc_vmid[3] = 0x8e; 16759 bcm_adc_gain[3] = 0x03; 16760 } else { 16761 bcm_adc_vmid[3] = 0x94; 16762 bcm_adc_gain[3] = 0x03; 16763 } 16764 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 16765 bcm_adc_vmid[3] = 0x84; 16766 bcm_adc_gain[3] = 0x02; 16767 } 16768 16769 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16770 0x08, 16, bcm_adc_vmid); 16771 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16772 0x18, 16, bcm_adc_vmid); 16773 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16774 0x0c, 16, bcm_adc_gain); 16775 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16776 0x1c, 16, bcm_adc_gain); 16777 } else if (pdetrange == 3) { 16778 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16779 if ((NREV_GE(pi->pubpi.phy_rev, 4)) && 16780 (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { 16781 u16 auxadc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x270 }; 16782 u16 auxadc_gain[] = { 0x02, 0x02, 0x02, 0x00 }; 16783 16784 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16785 0x08, 16, auxadc_vmid); 16786 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16787 0x18, 16, auxadc_vmid); 16788 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16789 0x0c, 16, auxadc_gain); 16790 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16791 0x1c, 16, auxadc_gain); 16792 } 16793 } else if ((pdetrange == 4) || (pdetrange == 5)) { 16794 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; 16795 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; 16796 u16 Vmid[2], Av[2]; 16797 16798 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16799 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16800 Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; 16801 Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; 16802 Av[0] = (pdetrange == 4) ? 2 : 0; 16803 Av[1] = (pdetrange == 4) ? 2 : 0; 16804 } else { 16805 Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; 16806 Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; 16807 Av[0] = (pdetrange == 4) ? 2 : 0; 16808 Av[1] = (pdetrange == 4) ? 2 : 0; 16809 } 16810 16811 bcm_adc_vmid[3] = Vmid[0]; 16812 bcm_adc_gain[3] = Av[0]; 16813 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16814 0x08, 16, bcm_adc_vmid); 16815 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16816 0x0c, 16, bcm_adc_gain); 16817 16818 bcm_adc_vmid[3] = Vmid[1]; 16819 bcm_adc_gain[3] = Av[1]; 16820 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16821 0x18, 16, bcm_adc_vmid); 16822 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16823 0x1c, 16, bcm_adc_gain); 16824 } 16825 16826 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), 0x0); 16827 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), 0x0); 16828 16829 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), 0x6); 16830 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), 0x6); 16831 16832 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), 0x7); 16833 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), 0x7); 16834 16835 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), 0x88); 16836 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), 0x88); 16837 16838 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16839 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16840 16841 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16842 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16843 16844 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16845 pi->srom_fem5g.triso : pi->srom_fem2g.triso; 16846 if (triso == 7) { 16847 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 16848 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 16849 } 16850 16851 wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); 16852 16853 if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && 16854 (CHSPEC_IS5G(pi->radio_chanspec))) || 16855 (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || 16856 (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && 16857 (CHSPEC_IS2G(pi->radio_chanspec)))) { 16858 nss1_data_weights = 0x00088888; 16859 ht_data_weights = 0x00088888; 16860 stbc_data_weights = 0x00088888; 16861 } else { 16862 nss1_data_weights = 0x88888888; 16863 ht_data_weights = 0x88888888; 16864 stbc_data_weights = 0x88888888; 16865 } 16866 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16867 1, 1, 32, &nss1_data_weights); 16868 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16869 1, 2, 32, &ht_data_weights); 16870 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16871 1, 3, 32, &stbc_data_weights); 16872 16873 if (NREV_IS(pi->pubpi.phy_rev, 4)) { 16874 if (CHSPEC_IS5G(pi->radio_chanspec)) { 16875 write_radio_reg(pi, 16876 RADIO_2056_TX_GMBB_IDAC | 16877 RADIO_2056_TX0, 0x70); 16878 write_radio_reg(pi, 16879 RADIO_2056_TX_GMBB_IDAC | 16880 RADIO_2056_TX1, 0x70); 16881 } 16882 } 16883 16884 if (!pi->edcrs_threshold_lock) { 16885 write_phy_reg(pi, 0x224, 0x3eb); 16886 write_phy_reg(pi, 0x225, 0x3eb); 16887 write_phy_reg(pi, 0x226, 0x341); 16888 write_phy_reg(pi, 0x227, 0x341); 16889 write_phy_reg(pi, 0x228, 0x42b); 16890 write_phy_reg(pi, 0x229, 0x42b); 16891 write_phy_reg(pi, 0x22a, 0x381); 16892 write_phy_reg(pi, 0x22b, 0x381); 16893 write_phy_reg(pi, 0x22c, 0x42b); 16894 write_phy_reg(pi, 0x22d, 0x42b); 16895 write_phy_reg(pi, 0x22e, 0x381); 16896 write_phy_reg(pi, 0x22f, 0x381); 16897 } 16898 16899 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16900 16901 if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) 16902 wlapi_bmac_mhf(pi->sh->physhim, MHF4, 16903 MHF4_BPHY_TXCORE0, 16904 MHF4_BPHY_TXCORE0, BRCM_BAND_ALL); 16905 } 16906 } 16907 16908 void wlc_phy_workarounds_nphy_rev1(struct brcms_phy *pi) 16909 { 16910 static const u8 rfseq_rx2tx_events[] = { 16911 NPHY_RFSEQ_CMD_NOP, 16912 NPHY_RFSEQ_CMD_RXG_FBW, 16913 NPHY_RFSEQ_CMD_TR_SWITCH, 16914 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 16915 NPHY_RFSEQ_CMD_RXPD_TXPD, 16916 NPHY_RFSEQ_CMD_TX_GAIN, 16917 NPHY_RFSEQ_CMD_EXT_PA 16918 }; 16919 u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; 16920 static const u8 rfseq_tx2rx_events[] = { 16921 NPHY_RFSEQ_CMD_NOP, 16922 NPHY_RFSEQ_CMD_EXT_PA, 16923 NPHY_RFSEQ_CMD_TX_GAIN, 16924 NPHY_RFSEQ_CMD_RXPD_TXPD, 16925 NPHY_RFSEQ_CMD_TR_SWITCH, 16926 NPHY_RFSEQ_CMD_RXG_FBW, 16927 NPHY_RFSEQ_CMD_CLR_HIQ_DIS 16928 }; 16929 static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; 16930 s16 alpha0, alpha1, alpha2; 16931 s16 beta0, beta1, beta2; 16932 u16 regval; 16933 16934 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || 16935 (pi->sh->boardtype == 0x8b)) { 16936 uint i; 16937 u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; 16938 for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) 16939 rfseq_rx2tx_dlys[i] = war_dlys[i]; 16940 } 16941 16942 if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { 16943 and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); 16944 and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); 16945 } else { 16946 or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); 16947 or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); 16948 } 16949 16950 regval = 0x000a; 16951 wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); 16952 wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); 16953 16954 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 16955 regval = 0xcdaa; 16956 wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); 16957 wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); 16958 } 16959 16960 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16961 regval = 0x0000; 16962 wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); 16963 wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); 16964 16965 regval = 0x7aab; 16966 wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); 16967 wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); 16968 16969 regval = 0x0800; 16970 wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); 16971 wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); 16972 } 16973 16974 write_phy_reg(pi, 0xf8, 0x02d8); 16975 write_phy_reg(pi, 0xf9, 0x0301); 16976 write_phy_reg(pi, 0xfa, 0x02d8); 16977 write_phy_reg(pi, 0xfb, 0x0301); 16978 16979 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, 16980 rfseq_rx2tx_dlys, 16981 ARRAY_SIZE(rfseq_rx2tx_events)); 16982 16983 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, 16984 rfseq_tx2rx_dlys, 16985 ARRAY_SIZE(rfseq_tx2rx_events)); 16986 16987 wlc_phy_workarounds_nphy_gainctrl(pi); 16988 16989 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16990 16991 if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) 16992 wlapi_bmac_mhf(pi->sh->physhim, MHF3, 16993 MHF3_NPHY_MLADV_WAR, 16994 MHF3_NPHY_MLADV_WAR, BRCM_BAND_ALL); 16995 16996 } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16997 write_phy_reg(pi, 0x1e3, 0x0); 16998 write_phy_reg(pi, 0x1e4, 0x0); 16999 } 17000 17001 if (NREV_LT(pi->pubpi.phy_rev, 2)) 17002 mod_phy_reg(pi, 0x90, (0x1 << 7), 0); 17003 17004 alpha0 = 293; 17005 alpha1 = 435; 17006 alpha2 = 261; 17007 beta0 = 366; 17008 beta1 = 205; 17009 beta2 = 32; 17010 write_phy_reg(pi, 0x145, alpha0); 17011 write_phy_reg(pi, 0x146, alpha1); 17012 write_phy_reg(pi, 0x147, alpha2); 17013 write_phy_reg(pi, 0x148, beta0); 17014 write_phy_reg(pi, 0x149, beta1); 17015 write_phy_reg(pi, 0x14a, beta2); 17016 17017 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17018 mod_phy_reg(pi, 0x142, (0xf << 12), 0); 17019 17020 write_phy_reg(pi, 0x192, 0xb5); 17021 write_phy_reg(pi, 0x193, 0xa4); 17022 write_phy_reg(pi, 0x194, 0x0); 17023 } 17024 17025 if (NREV_IS(pi->pubpi.phy_rev, 2)) 17026 mod_phy_reg(pi, 0x221, 17027 NPHY_FORCESIG_DECODEGATEDCLKS, 17028 NPHY_FORCESIG_DECODEGATEDCLKS); 17029 } 17030 17031 static void wlc_phy_workarounds_nphy(struct brcms_phy *pi) 17032 { 17033 if (CHSPEC_IS5G(pi->radio_chanspec)) 17034 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); 17035 else 17036 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); 17037 17038 if (pi->phyhang_avoid) 17039 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17040 17041 or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); 17042 17043 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17044 wlc_phy_workarounds_nphy_rev7(pi); 17045 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17046 wlc_phy_workarounds_nphy_rev3(pi); 17047 else 17048 wlc_phy_workarounds_nphy_rev1(pi); 17049 17050 if (pi->phyhang_avoid) 17051 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17052 } 17053 17054 static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 17055 { 17056 int j, type = 2; 17057 u16 addr_offset = 0x2c5; 17058 17059 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 17060 write_phy_reg(pi, addr_offset + j, 17061 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 17062 } 17063 17064 static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals) 17065 { 17066 17067 if (write == 0) { 17068 vals[0] = read_phy_reg(pi, 0x2c); 17069 vals[1] = read_phy_reg(pi, 0x42); 17070 } else { 17071 write_phy_reg(pi, 0x2c, vals[0]); 17072 write_phy_reg(pi, 0x42, vals[1]); 17073 } 17074 } 17075 17076 static void wlc_phy_ipa_internal_tssi_setup_nphy(struct brcms_phy *pi) 17077 { 17078 u8 core; 17079 17080 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17081 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17082 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17083 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17084 TX_SSI_MASTER, 0x5); 17085 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17086 TX_SSI_MUX, 0xe); 17087 17088 if (pi->pubpi.radiorev != 5) 17089 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17090 core, TSSIA, 0); 17091 17092 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17093 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17094 core, TSSIG, 0x1); 17095 else 17096 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17097 core, TSSIG, 0x31); 17098 } else { 17099 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17100 TX_SSI_MASTER, 0x9); 17101 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17102 TX_SSI_MUX, 0xc); 17103 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17104 TSSIG, 0); 17105 17106 if (pi->pubpi.radiorev != 5) { 17107 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17108 WRITE_RADIO_REG3(pi, RADIO_2057, 17109 TX, core, 17110 TSSIA, 0x1); 17111 else 17112 WRITE_RADIO_REG3(pi, RADIO_2057, 17113 TX, core, 17114 TSSIA, 0x31); 17115 } 17116 } 17117 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 17118 0); 17119 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 17120 0); 17121 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 17122 0x3); 17123 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 17124 0x0); 17125 } 17126 } else { 17127 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, 17128 (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : 17129 0x80); 17130 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); 17131 WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); 17132 17133 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17134 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, 17135 0x0); 17136 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, 17137 0x0); 17138 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, 17139 0x3); 17140 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, 17141 0x0); 17142 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, 17143 0x8); 17144 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, 17145 0x0); 17146 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, 17147 0x0); 17148 17149 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17150 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17151 TX_SSI_MASTER, 0x5); 17152 17153 if (pi->pubpi.radiorev != 5) 17154 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17155 core, TSSIA, 0x0); 17156 if (NREV_GE(pi->pubpi.phy_rev, 5)) 17157 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17158 core, TSSIG, 0x31); 17159 else 17160 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17161 core, TSSIG, 0x11); 17162 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17163 TX_SSI_MUX, 0xe); 17164 } else { 17165 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17166 TX_SSI_MASTER, 0x9); 17167 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17168 TSSIA, 0x31); 17169 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17170 TSSIG, 0x0); 17171 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17172 TX_SSI_MUX, 0xc); 17173 } 17174 } 17175 } 17176 } 17177 17178 static void 17179 wlc_phy_rfctrl_override_nphy(struct brcms_phy *pi, u16 field, u16 value, 17180 u8 core_mask, u8 off) 17181 { 17182 u8 core_num; 17183 u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = 17184 0, val_mask = 0; 17185 u8 shift = 0, val_shift = 0; 17186 17187 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 17188 17189 en_mask = field; 17190 for (core_num = 0; core_num < 2; core_num++) { 17191 17192 switch (field) { 17193 case (0x1 << 1): 17194 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17195 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17196 val_mask = (0x1 << 0); 17197 val_shift = 0; 17198 break; 17199 case (0x1 << 2): 17200 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17201 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17202 val_mask = (0x1 << 1); 17203 val_shift = 1; 17204 break; 17205 case (0x1 << 3): 17206 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17207 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17208 val_mask = (0x1 << 2); 17209 val_shift = 2; 17210 break; 17211 case (0x1 << 4): 17212 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17213 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17214 val_mask = (0x1 << 4); 17215 val_shift = 4; 17216 break; 17217 case (0x1 << 5): 17218 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17219 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17220 val_mask = (0x1 << 5); 17221 val_shift = 5; 17222 break; 17223 case (0x1 << 6): 17224 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17225 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17226 val_mask = (0x1 << 6); 17227 val_shift = 6; 17228 break; 17229 case (0x1 << 7): 17230 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17231 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17232 val_mask = (0x1 << 7); 17233 val_shift = 7; 17234 break; 17235 case (0x1 << 8): 17236 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17237 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17238 val_mask = (0x7 << 8); 17239 val_shift = 8; 17240 break; 17241 case (0x1 << 11): 17242 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17243 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17244 val_mask = (0x7 << 13); 17245 val_shift = 13; 17246 break; 17247 17248 case (0x1 << 9): 17249 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17250 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17251 val_mask = (0x7 << 0); 17252 val_shift = 0; 17253 break; 17254 17255 case (0x1 << 10): 17256 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17257 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17258 val_mask = (0x7 << 4); 17259 val_shift = 4; 17260 break; 17261 17262 case (0x1 << 12): 17263 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17264 val_addr = (core_num == 0) ? 0x7b : 0x7e; 17265 val_mask = (0xffff << 0); 17266 val_shift = 0; 17267 break; 17268 case (0x1 << 13): 17269 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17270 val_addr = (core_num == 0) ? 0x7c : 0x7f; 17271 val_mask = (0xffff << 0); 17272 val_shift = 0; 17273 break; 17274 case (0x1 << 14): 17275 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17276 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17277 val_mask = (0x3 << 6); 17278 val_shift = 6; 17279 break; 17280 case (0x1 << 0): 17281 en_addr = (core_num == 0) ? 0xe5 : 0xe6; 17282 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17283 val_mask = (0x1 << 15); 17284 val_shift = 15; 17285 break; 17286 default: 17287 addr = 0xffff; 17288 break; 17289 } 17290 17291 if (off) { 17292 and_phy_reg(pi, en_addr, ~en_mask); 17293 and_phy_reg(pi, val_addr, ~val_mask); 17294 } else { 17295 17296 if ((core_mask == 0) 17297 || (core_mask & (1 << core_num))) { 17298 or_phy_reg(pi, en_addr, en_mask); 17299 17300 if (addr != 0xffff) 17301 mod_phy_reg(pi, val_addr, 17302 val_mask, 17303 (value << 17304 val_shift)); 17305 } 17306 } 17307 } 17308 } else { 17309 17310 if (off) { 17311 and_phy_reg(pi, 0xec, ~field); 17312 value = 0x0; 17313 } else { 17314 or_phy_reg(pi, 0xec, field); 17315 } 17316 17317 for (core_num = 0; core_num < 2; core_num++) { 17318 17319 switch (field) { 17320 case (0x1 << 1): 17321 case (0x1 << 9): 17322 case (0x1 << 12): 17323 case (0x1 << 13): 17324 case (0x1 << 14): 17325 addr = 0x78; 17326 17327 core_mask = 0x1; 17328 break; 17329 case (0x1 << 2): 17330 case (0x1 << 3): 17331 case (0x1 << 4): 17332 case (0x1 << 5): 17333 case (0x1 << 6): 17334 case (0x1 << 7): 17335 case (0x1 << 8): 17336 addr = (core_num == 0) ? 0x7a : 0x7d; 17337 break; 17338 case (0x1 << 10): 17339 addr = (core_num == 0) ? 0x7b : 0x7e; 17340 break; 17341 case (0x1 << 11): 17342 addr = (core_num == 0) ? 0x7c : 0x7f; 17343 break; 17344 default: 17345 addr = 0xffff; 17346 } 17347 17348 switch (field) { 17349 case (0x1 << 1): 17350 mask = (0x7 << 3); 17351 shift = 3; 17352 break; 17353 case (0x1 << 9): 17354 mask = (0x1 << 2); 17355 shift = 2; 17356 break; 17357 case (0x1 << 12): 17358 mask = (0x1 << 8); 17359 shift = 8; 17360 break; 17361 case (0x1 << 13): 17362 mask = (0x1 << 9); 17363 shift = 9; 17364 break; 17365 case (0x1 << 14): 17366 mask = (0xf << 12); 17367 shift = 12; 17368 break; 17369 case (0x1 << 2): 17370 mask = (0x1 << 0); 17371 shift = 0; 17372 break; 17373 case (0x1 << 3): 17374 mask = (0x1 << 1); 17375 shift = 1; 17376 break; 17377 case (0x1 << 4): 17378 mask = (0x1 << 2); 17379 shift = 2; 17380 break; 17381 case (0x1 << 5): 17382 mask = (0x3 << 4); 17383 shift = 4; 17384 break; 17385 case (0x1 << 6): 17386 mask = (0x3 << 6); 17387 shift = 6; 17388 break; 17389 case (0x1 << 7): 17390 mask = (0x1 << 8); 17391 shift = 8; 17392 break; 17393 case (0x1 << 8): 17394 mask = (0x1 << 9); 17395 shift = 9; 17396 break; 17397 case (0x1 << 10): 17398 mask = 0x1fff; 17399 shift = 0x0; 17400 break; 17401 case (0x1 << 11): 17402 mask = 0x1fff; 17403 shift = 0x0; 17404 break; 17405 default: 17406 mask = 0x0; 17407 shift = 0x0; 17408 break; 17409 } 17410 17411 if ((addr != 0xffff) && (core_mask & (1 << core_num))) 17412 mod_phy_reg(pi, addr, mask, (value << shift)); 17413 } 17414 17415 or_phy_reg(pi, 0xec, (0x1 << 0)); 17416 or_phy_reg(pi, 0x78, (0x1 << 0)); 17417 udelay(1); 17418 and_phy_reg(pi, 0xec, ~(0x1 << 0)); 17419 } 17420 } 17421 17422 static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi) 17423 { 17424 s32 rssi_buf[4]; 17425 s32 int_val; 17426 17427 if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) 17428 17429 return; 17430 17431 if (PHY_IPA(pi)) 17432 wlc_phy_ipa_internal_tssi_setup_nphy(pi); 17433 17434 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17435 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17436 0, 0x3, 0, 17437 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17438 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17439 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); 17440 17441 wlc_phy_stopplayback_nphy(pi); 17442 17443 wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); 17444 17445 udelay(20); 17446 int_val = 17447 wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, 17448 1); 17449 wlc_phy_stopplayback_nphy(pi); 17450 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); 17451 17452 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17453 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17454 0, 0x3, 1, 17455 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17456 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17457 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); 17458 17459 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17460 17461 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17462 (u8) ((int_val >> 24) & 0xff); 17463 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17464 (u8) ((int_val >> 24) & 0xff); 17465 17466 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17467 (u8) ((int_val >> 8) & 0xff); 17468 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17469 (u8) ((int_val >> 8) & 0xff); 17470 } else { 17471 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17472 (u8) ((int_val >> 24) & 0xff); 17473 17474 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17475 (u8) ((int_val >> 8) & 0xff); 17476 17477 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17478 (u8) ((int_val >> 16) & 0xff); 17479 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17480 (u8) ((int_val) & 0xff); 17481 } 17482 17483 } 17484 17485 static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi) 17486 { 17487 u8 idx, idx2, i, delta_ind; 17488 17489 for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) 17490 pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; 17491 17492 for (i = 0; i < 4; i++) { 17493 idx2 = 0; 17494 17495 delta_ind = 0; 17496 17497 switch (i) { 17498 case 0: 17499 17500 if (CHSPEC_IS40(pi->radio_chanspec) 17501 && NPHY_IS_SROM_REINTERPRET) { 17502 idx = TXP_FIRST_MCS_40_SISO; 17503 } else { 17504 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17505 TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; 17506 delta_ind = 1; 17507 } 17508 break; 17509 17510 case 1: 17511 17512 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17513 TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; 17514 break; 17515 17516 case 2: 17517 17518 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17519 TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; 17520 break; 17521 17522 case 3: 17523 17524 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17525 TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; 17526 break; 17527 } 17528 17529 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17530 pi->tx_power_offset[idx]; 17531 idx = idx + delta_ind; 17532 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17533 pi->tx_power_offset[idx]; 17534 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17535 pi->tx_power_offset[idx]; 17536 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17537 pi->tx_power_offset[idx++]; 17538 17539 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17540 pi->tx_power_offset[idx++]; 17541 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17542 pi->tx_power_offset[idx]; 17543 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17544 pi->tx_power_offset[idx]; 17545 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17546 pi->tx_power_offset[idx++]; 17547 17548 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17549 pi->tx_power_offset[idx++]; 17550 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17551 pi->tx_power_offset[idx]; 17552 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17553 pi->tx_power_offset[idx]; 17554 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17555 pi->tx_power_offset[idx++]; 17556 17557 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17558 pi->tx_power_offset[idx]; 17559 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17560 pi->tx_power_offset[idx++]; 17561 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17562 pi->tx_power_offset[idx]; 17563 idx = idx + 1 - delta_ind; 17564 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17565 pi->tx_power_offset[idx]; 17566 17567 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17568 pi->tx_power_offset[idx]; 17569 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17570 pi->tx_power_offset[idx]; 17571 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17572 pi->tx_power_offset[idx]; 17573 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17574 pi->tx_power_offset[idx]; 17575 } 17576 } 17577 17578 static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi) 17579 { 17580 u32 idx; 17581 s16 a1[2], b0[2], b1[2]; 17582 s8 target_pwr_qtrdbm[2]; 17583 s32 num, den, pwr_est; 17584 u8 chan_freq_range; 17585 u8 idle_tssi[2]; 17586 u32 tbl_id, tbl_len, tbl_offset; 17587 u32 regval[64]; 17588 u8 core; 17589 17590 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17591 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17592 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17593 udelay(1); 17594 } 17595 17596 if (pi->phyhang_avoid) 17597 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17598 17599 or_phy_reg(pi, 0x122, (0x1 << 0)); 17600 17601 if (NREV_GE(pi->pubpi.phy_rev, 3)) 17602 and_phy_reg(pi, 0x1e7, (u16) (~(0x1 << 15))); 17603 else 17604 or_phy_reg(pi, 0x1e7, (0x1 << 15)); 17605 17606 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17607 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17608 17609 if (pi->sh->sromrev < 4) { 17610 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17611 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17612 a1[0] = -424; 17613 a1[1] = -424; 17614 b0[0] = 5612; 17615 b0[1] = 5612; 17616 b1[1] = -1393; 17617 b1[0] = -1393; 17618 } else { 17619 17620 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 17621 switch (chan_freq_range) { 17622 case WL_CHAN_FREQ_RANGE_2G: 17623 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17624 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17625 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; 17626 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; 17627 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; 17628 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; 17629 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; 17630 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; 17631 break; 17632 case WL_CHAN_FREQ_RANGE_5GL: 17633 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17634 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17635 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; 17636 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; 17637 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; 17638 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; 17639 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; 17640 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; 17641 break; 17642 case WL_CHAN_FREQ_RANGE_5GM: 17643 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17644 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17645 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; 17646 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; 17647 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; 17648 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; 17649 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; 17650 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; 17651 break; 17652 case WL_CHAN_FREQ_RANGE_5GH: 17653 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17654 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17655 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; 17656 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; 17657 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; 17658 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; 17659 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; 17660 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; 17661 break; 17662 default: 17663 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17664 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17665 a1[0] = -424; 17666 a1[1] = -424; 17667 b0[0] = 5612; 17668 b0[1] = 5612; 17669 b1[1] = -1393; 17670 b1[0] = -1393; 17671 break; 17672 } 17673 } 17674 17675 /* use the provided transmit power */ 17676 target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; 17677 target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; 17678 17679 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17680 if (pi->srom_fem2g.tssipos) 17681 or_phy_reg(pi, 0x1e9, (0x1 << 14)); 17682 17683 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17684 for (core = 0; core <= 1; core++) { 17685 if (PHY_IPA(pi)) { 17686 if (CHSPEC_IS2G(pi->radio_chanspec)) 17687 WRITE_RADIO_REG3(pi, RADIO_2057, 17688 TX, core, 17689 TX_SSI_MUX, 17690 0xe); 17691 else 17692 WRITE_RADIO_REG3(pi, RADIO_2057, 17693 TX, core, 17694 TX_SSI_MUX, 17695 0xc); 17696 } 17697 } 17698 } else { 17699 if (PHY_IPA(pi)) { 17700 17701 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17702 RADIO_2056_TX0, 17703 (CHSPEC_IS5G 17704 (pi->radio_chanspec)) ? 17705 0xc : 0xe); 17706 write_radio_reg(pi, 17707 RADIO_2056_TX_TX_SSI_MUX | 17708 RADIO_2056_TX1, 17709 (CHSPEC_IS5G 17710 (pi->radio_chanspec)) ? 17711 0xc : 0xe); 17712 } else { 17713 17714 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17715 RADIO_2056_TX0, 0x11); 17716 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17717 RADIO_2056_TX1, 0x11); 17718 } 17719 } 17720 } 17721 17722 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17723 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17724 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17725 udelay(1); 17726 } 17727 17728 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17729 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17730 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17731 else 17732 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17733 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17734 17735 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17736 mod_phy_reg(pi, 0x222, (0xff << 0), 17737 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17738 else if (NREV_GT(pi->pubpi.phy_rev, 1)) 17739 mod_phy_reg(pi, 0x222, (0xff << 0), 17740 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17741 17742 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17743 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17744 17745 write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); 17746 17747 write_phy_reg(pi, 0x1e9, 17748 (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); 17749 17750 write_phy_reg(pi, 0x1ea, 17751 (target_pwr_qtrdbm[0] << 0) | 17752 (target_pwr_qtrdbm[1] << 8)); 17753 17754 tbl_len = 64; 17755 tbl_offset = 0; 17756 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 17757 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 17758 17759 for (idx = 0; idx < tbl_len; idx++) { 17760 num = 8 * 17761 (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); 17762 den = 32768 + a1[tbl_id - 26] * idx; 17763 pwr_est = max(((4 * num + den / 2) / den), -8); 17764 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17765 if (idx <= 17766 (uint) (31 - idle_tssi[tbl_id - 26] + 1)) 17767 pwr_est = 17768 max(pwr_est, 17769 target_pwr_qtrdbm 17770 [tbl_id - 26] + 1); 17771 } 17772 regval[idx] = (u32) pwr_est; 17773 } 17774 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 17775 regval); 17776 } 17777 17778 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 17779 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, 17780 pi->adj_pwr_tbl_nphy); 17781 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, 17782 pi->adj_pwr_tbl_nphy); 17783 17784 if (pi->phyhang_avoid) 17785 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17786 } 17787 17788 static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi) 17789 { 17790 u32 *tx_pwrctrl_tbl = NULL; 17791 17792 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17793 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17794 if ((pi->pubpi.radiorev == 4) 17795 || (pi->pubpi.radiorev == 6)) 17796 tx_pwrctrl_tbl = 17797 nphy_tpc_txgain_ipa_2g_2057rev4n6; 17798 else if (pi->pubpi.radiorev == 3) 17799 tx_pwrctrl_tbl = 17800 nphy_tpc_txgain_ipa_2g_2057rev3; 17801 else if (pi->pubpi.radiorev == 5) 17802 tx_pwrctrl_tbl = 17803 nphy_tpc_txgain_ipa_2g_2057rev5; 17804 else if ((pi->pubpi.radiorev == 7) 17805 || (pi->pubpi.radiorev == 8)) 17806 tx_pwrctrl_tbl = 17807 nphy_tpc_txgain_ipa_2g_2057rev7; 17808 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 17809 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; 17810 if (pi->sh->chip == BCMA_CHIP_ID_BCM47162) 17811 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17812 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 17813 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17814 } else { 17815 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; 17816 } 17817 } else { 17818 17819 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17820 if ((pi->pubpi.radiorev == 3) || 17821 (pi->pubpi.radiorev == 4) || 17822 (pi->pubpi.radiorev == 6)) 17823 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; 17824 else if ((pi->pubpi.radiorev == 7) 17825 || (pi->pubpi.radiorev == 8)) 17826 tx_pwrctrl_tbl = 17827 nphy_tpc_txgain_ipa_5g_2057rev7; 17828 } else { 17829 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; 17830 } 17831 } 17832 17833 return tx_pwrctrl_tbl; 17834 } 17835 17836 static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi) 17837 { 17838 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17839 if (pi->nphy_rssical_chanspec_2G == 0) 17840 return; 17841 17842 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17843 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17844 RADIO_2057_VCM_MASK, 17845 pi->rssical_cache. 17846 rssical_radio_regs_2G[0]); 17847 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17848 RADIO_2057_VCM_MASK, 17849 pi->rssical_cache. 17850 rssical_radio_regs_2G[1]); 17851 } else { 17852 mod_radio_reg(pi, 17853 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17854 RADIO_2056_VCM_MASK, 17855 pi->rssical_cache. 17856 rssical_radio_regs_2G[0]); 17857 mod_radio_reg(pi, 17858 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17859 RADIO_2056_VCM_MASK, 17860 pi->rssical_cache. 17861 rssical_radio_regs_2G[1]); 17862 } 17863 17864 write_phy_reg(pi, 0x1a6, 17865 pi->rssical_cache.rssical_phyregs_2G[0]); 17866 write_phy_reg(pi, 0x1ac, 17867 pi->rssical_cache.rssical_phyregs_2G[1]); 17868 write_phy_reg(pi, 0x1b2, 17869 pi->rssical_cache.rssical_phyregs_2G[2]); 17870 write_phy_reg(pi, 0x1b8, 17871 pi->rssical_cache.rssical_phyregs_2G[3]); 17872 write_phy_reg(pi, 0x1a4, 17873 pi->rssical_cache.rssical_phyregs_2G[4]); 17874 write_phy_reg(pi, 0x1aa, 17875 pi->rssical_cache.rssical_phyregs_2G[5]); 17876 write_phy_reg(pi, 0x1b0, 17877 pi->rssical_cache.rssical_phyregs_2G[6]); 17878 write_phy_reg(pi, 0x1b6, 17879 pi->rssical_cache.rssical_phyregs_2G[7]); 17880 write_phy_reg(pi, 0x1a5, 17881 pi->rssical_cache.rssical_phyregs_2G[8]); 17882 write_phy_reg(pi, 0x1ab, 17883 pi->rssical_cache.rssical_phyregs_2G[9]); 17884 write_phy_reg(pi, 0x1b1, 17885 pi->rssical_cache.rssical_phyregs_2G[10]); 17886 write_phy_reg(pi, 0x1b7, 17887 pi->rssical_cache.rssical_phyregs_2G[11]); 17888 17889 } else { 17890 if (pi->nphy_rssical_chanspec_5G == 0) 17891 return; 17892 17893 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17894 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17895 RADIO_2057_VCM_MASK, 17896 pi->rssical_cache. 17897 rssical_radio_regs_5G[0]); 17898 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17899 RADIO_2057_VCM_MASK, 17900 pi->rssical_cache. 17901 rssical_radio_regs_5G[1]); 17902 } else { 17903 mod_radio_reg(pi, 17904 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17905 RADIO_2056_VCM_MASK, 17906 pi->rssical_cache. 17907 rssical_radio_regs_5G[0]); 17908 mod_radio_reg(pi, 17909 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17910 RADIO_2056_VCM_MASK, 17911 pi->rssical_cache. 17912 rssical_radio_regs_5G[1]); 17913 } 17914 17915 write_phy_reg(pi, 0x1a6, 17916 pi->rssical_cache.rssical_phyregs_5G[0]); 17917 write_phy_reg(pi, 0x1ac, 17918 pi->rssical_cache.rssical_phyregs_5G[1]); 17919 write_phy_reg(pi, 0x1b2, 17920 pi->rssical_cache.rssical_phyregs_5G[2]); 17921 write_phy_reg(pi, 0x1b8, 17922 pi->rssical_cache.rssical_phyregs_5G[3]); 17923 write_phy_reg(pi, 0x1a4, 17924 pi->rssical_cache.rssical_phyregs_5G[4]); 17925 write_phy_reg(pi, 0x1aa, 17926 pi->rssical_cache.rssical_phyregs_5G[5]); 17927 write_phy_reg(pi, 0x1b0, 17928 pi->rssical_cache.rssical_phyregs_5G[6]); 17929 write_phy_reg(pi, 0x1b6, 17930 pi->rssical_cache.rssical_phyregs_5G[7]); 17931 write_phy_reg(pi, 0x1a5, 17932 pi->rssical_cache.rssical_phyregs_5G[8]); 17933 write_phy_reg(pi, 0x1ab, 17934 pi->rssical_cache.rssical_phyregs_5G[9]); 17935 write_phy_reg(pi, 0x1b1, 17936 pi->rssical_cache.rssical_phyregs_5G[10]); 17937 write_phy_reg(pi, 0x1b7, 17938 pi->rssical_cache.rssical_phyregs_5G[11]); 17939 } 17940 } 17941 17942 static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi) 17943 { 17944 u16 txcal_gain[2]; 17945 17946 pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; 17947 pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; 17948 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 17949 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 17950 17951 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17952 txcal_gain); 17953 17954 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17955 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; 17956 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; 17957 } else { 17958 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; 17959 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; 17960 } 17961 17962 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17963 txcal_gain); 17964 } 17965 17966 static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi) 17967 { 17968 bool save_bbmult = false; 17969 u8 txcal_index_2057_rev5n7 = 0; 17970 u8 txcal_index_2057_rev3n4n6 = 10; 17971 17972 if (pi->use_int_tx_iqlo_cal_nphy) { 17973 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17974 if ((pi->pubpi.radiorev == 3) || 17975 (pi->pubpi.radiorev == 4) || 17976 (pi->pubpi.radiorev == 6)) { 17977 17978 pi->nphy_txcal_pwr_idx[0] = 17979 txcal_index_2057_rev3n4n6; 17980 pi->nphy_txcal_pwr_idx[1] = 17981 txcal_index_2057_rev3n4n6; 17982 wlc_phy_txpwr_index_nphy( 17983 pi, 3, 17984 txcal_index_2057_rev3n4n6, 17985 false); 17986 } else { 17987 17988 pi->nphy_txcal_pwr_idx[0] = 17989 txcal_index_2057_rev5n7; 17990 pi->nphy_txcal_pwr_idx[1] = 17991 txcal_index_2057_rev5n7; 17992 wlc_phy_txpwr_index_nphy( 17993 pi, 3, 17994 txcal_index_2057_rev5n7, 17995 false); 17996 } 17997 save_bbmult = true; 17998 17999 } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { 18000 wlc_phy_cal_txgainctrl_nphy(pi, 11, false); 18001 if (pi->sh->hw_phytxchain != 3) { 18002 pi->nphy_txcal_pwr_idx[1] = 18003 pi->nphy_txcal_pwr_idx[0]; 18004 wlc_phy_txpwr_index_nphy(pi, 3, 18005 pi-> 18006 nphy_txcal_pwr_idx[0], 18007 true); 18008 save_bbmult = true; 18009 } 18010 18011 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 18012 if (PHY_IPA(pi)) { 18013 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18014 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18015 false); 18016 } else { 18017 pi->nphy_txcal_pwr_idx[0] = 80; 18018 pi->nphy_txcal_pwr_idx[1] = 80; 18019 wlc_phy_txpwr_index_nphy(pi, 3, 80, 18020 false); 18021 save_bbmult = true; 18022 } 18023 } else { 18024 wlc_phy_internal_cal_txgain_nphy(pi); 18025 save_bbmult = true; 18026 } 18027 18028 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 18029 if (PHY_IPA(pi)) { 18030 if (CHSPEC_IS2G(pi->radio_chanspec)) 18031 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18032 false); 18033 else 18034 wlc_phy_cal_txgainctrl_nphy(pi, 14, 18035 false); 18036 } else { 18037 wlc_phy_internal_cal_txgain_nphy(pi); 18038 save_bbmult = true; 18039 } 18040 } 18041 18042 } else { 18043 wlc_phy_cal_txgainctrl_nphy(pi, 10, false); 18044 } 18045 18046 if (save_bbmult) 18047 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 18048 &pi->nphy_txcal_bbmult); 18049 } 18050 18051 static void 18052 wlc_phy_rfctrlintc_override_nphy(struct brcms_phy *pi, u8 field, u16 value, 18053 u8 core_code) 18054 { 18055 u16 mask; 18056 u16 val; 18057 u8 core; 18058 18059 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18060 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18061 if (core_code == RADIO_MIMO_CORESEL_CORE1 18062 && core == PHY_CORE_1) 18063 continue; 18064 else if (core_code == RADIO_MIMO_CORESEL_CORE2 18065 && core == PHY_CORE_0) 18066 continue; 18067 18068 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 18069 18070 mask = (0x1 << 10); 18071 val = 1 << 10; 18072 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18073 0x92, mask, val); 18074 } 18075 18076 if (field == NPHY_RfctrlIntc_override_OFF) { 18077 18078 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18079 0x92, 0); 18080 18081 wlc_phy_force_rfseq_nphy(pi, 18082 NPHY_RFSEQ_RESET2RX); 18083 } else if (field == NPHY_RfctrlIntc_override_TRSW) { 18084 18085 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18086 18087 mask = (0x1 << 6) | (0x1 << 7); 18088 18089 val = value << 6; 18090 mod_phy_reg(pi, 18091 (core == 18092 PHY_CORE_0) ? 0x91 : 0x92, 18093 mask, val); 18094 18095 or_phy_reg(pi, 18096 (core == 18097 PHY_CORE_0) ? 0x91 : 0x92, 18098 (0x1 << 10)); 18099 18100 and_phy_reg(pi, 0x2ff, (u16) 18101 ~(0x3 << 14)); 18102 or_phy_reg(pi, 0x2ff, (0x1 << 13)); 18103 or_phy_reg(pi, 0x2ff, (0x1 << 0)); 18104 } else { 18105 18106 mask = (0x1 << 6) | 18107 (0x1 << 7) | 18108 (0x1 << 8) | (0x1 << 9); 18109 val = value << 6; 18110 mod_phy_reg(pi, 18111 (core == 18112 PHY_CORE_0) ? 0x91 : 0x92, 18113 mask, val); 18114 18115 mask = (0x1 << 0); 18116 val = 1 << 0; 18117 mod_phy_reg(pi, 18118 (core == 18119 PHY_CORE_0) ? 0xe7 : 0xec, 18120 mask, val); 18121 18122 mask = (core == PHY_CORE_0) ? 18123 (0x1 << 0) : (0x1 << 1); 18124 val = 1 << ((core == PHY_CORE_0) ? 18125 0 : 1); 18126 mod_phy_reg(pi, 0x78, mask, val); 18127 18128 SPINWAIT(((read_phy_reg(pi, 0x78) & val) 18129 != 0), 10000); 18130 if (WARN(read_phy_reg(pi, 0x78) & val, 18131 "HW error: override failed")) 18132 return; 18133 18134 mask = (0x1 << 0); 18135 val = 0 << 0; 18136 mod_phy_reg(pi, 18137 (core == 18138 PHY_CORE_0) ? 0xe7 : 0xec, 18139 mask, val); 18140 } 18141 } else if (field == NPHY_RfctrlIntc_override_PA) { 18142 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18143 18144 mask = (0x1 << 4) | (0x1 << 5); 18145 18146 if (CHSPEC_IS5G(pi->radio_chanspec)) 18147 val = value << 5; 18148 else 18149 val = value << 4; 18150 18151 mod_phy_reg(pi, 18152 (core == 18153 PHY_CORE_0) ? 0x91 : 0x92, 18154 mask, val); 18155 18156 or_phy_reg(pi, 18157 (core == 18158 PHY_CORE_0) ? 0x91 : 0x92, 18159 (0x1 << 12)); 18160 } else { 18161 18162 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18163 mask = (0x1 << 5); 18164 val = value << 5; 18165 } else { 18166 mask = (0x1 << 4); 18167 val = value << 4; 18168 } 18169 mod_phy_reg(pi, 18170 (core == 18171 PHY_CORE_0) ? 0x91 : 0x92, 18172 mask, val); 18173 } 18174 } else if (field == 18175 NPHY_RfctrlIntc_override_EXT_LNA_PU) { 18176 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18177 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18178 18179 mask = (0x1 << 0); 18180 val = value << 0; 18181 mod_phy_reg(pi, 18182 (core == 18183 PHY_CORE_0) ? 0x91 18184 : 0x92, mask, val); 18185 18186 mask = (0x1 << 2); 18187 mod_phy_reg(pi, 18188 (core == 18189 PHY_CORE_0) ? 0x91 18190 : 0x92, mask, 0); 18191 } else { 18192 18193 mask = (0x1 << 2); 18194 val = value << 2; 18195 mod_phy_reg(pi, 18196 (core == 18197 PHY_CORE_0) ? 0x91 18198 : 0x92, mask, val); 18199 18200 mask = (0x1 << 0); 18201 mod_phy_reg(pi, 18202 (core == 18203 PHY_CORE_0) ? 0x91 18204 : 0x92, mask, 0); 18205 } 18206 18207 mask = (0x1 << 11); 18208 val = 1 << 11; 18209 mod_phy_reg(pi, 18210 (core == 18211 PHY_CORE_0) ? 0x91 : 0x92, 18212 mask, val); 18213 } else { 18214 18215 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18216 mask = (0x1 << 0); 18217 val = value << 0; 18218 } else { 18219 mask = (0x1 << 2); 18220 val = value << 2; 18221 } 18222 mod_phy_reg(pi, 18223 (core == 18224 PHY_CORE_0) ? 0x91 : 0x92, 18225 mask, val); 18226 } 18227 } else if (field == 18228 NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { 18229 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18230 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18231 18232 mask = (0x1 << 1); 18233 val = value << 1; 18234 mod_phy_reg(pi, 18235 (core == 18236 PHY_CORE_0) ? 0x91 18237 : 0x92, mask, val); 18238 18239 mask = (0x1 << 3); 18240 mod_phy_reg(pi, 18241 (core == 18242 PHY_CORE_0) ? 0x91 18243 : 0x92, mask, 0); 18244 } else { 18245 18246 mask = (0x1 << 3); 18247 val = value << 3; 18248 mod_phy_reg(pi, 18249 (core == 18250 PHY_CORE_0) ? 0x91 18251 : 0x92, mask, val); 18252 18253 mask = (0x1 << 1); 18254 mod_phy_reg(pi, 18255 (core == 18256 PHY_CORE_0) ? 0x91 18257 : 0x92, mask, 0); 18258 } 18259 18260 mask = (0x1 << 11); 18261 val = 1 << 11; 18262 mod_phy_reg(pi, 18263 (core == 18264 PHY_CORE_0) ? 0x91 : 0x92, 18265 mask, val); 18266 } else { 18267 18268 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18269 mask = (0x1 << 1); 18270 val = value << 1; 18271 } else { 18272 mask = (0x1 << 3); 18273 val = value << 3; 18274 } 18275 mod_phy_reg(pi, 18276 (core == 18277 PHY_CORE_0) ? 0x91 : 0x92, 18278 mask, val); 18279 } 18280 } 18281 } 18282 } 18283 } 18284 18285 void 18286 wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, s32 dBm_targetpower, 18287 bool debug) 18288 { 18289 int gainctrl_loopidx; 18290 uint core; 18291 u16 m0m1, curr_m0m1; 18292 s32 delta_power; 18293 s32 txpwrindex; 18294 s32 qdBm_power[2]; 18295 u16 orig_BBConfig; 18296 u16 phy_saveregs[4]; 18297 u32 freq_test; 18298 u16 ampl_test = 250; 18299 uint stepsize; 18300 bool phyhang_avoid_state = false; 18301 18302 if (NREV_GE(pi->pubpi.phy_rev, 7)) 18303 stepsize = 2; 18304 else 18305 stepsize = 1; 18306 18307 if (CHSPEC_IS40(pi->radio_chanspec)) 18308 freq_test = 5000; 18309 else 18310 freq_test = 2500; 18311 18312 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 18313 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 18314 18315 if (pi->phyhang_avoid) 18316 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18317 18318 phyhang_avoid_state = pi->phyhang_avoid; 18319 pi->phyhang_avoid = false; 18320 18321 phy_saveregs[0] = read_phy_reg(pi, 0x91); 18322 phy_saveregs[1] = read_phy_reg(pi, 0x92); 18323 phy_saveregs[2] = read_phy_reg(pi, 0xe7); 18324 phy_saveregs[3] = read_phy_reg(pi, 0xec); 18325 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, 18326 RADIO_MIMO_CORESEL_CORE1 | 18327 RADIO_MIMO_CORESEL_CORE2); 18328 18329 if (!debug) { 18330 wlc_phy_rfctrlintc_override_nphy(pi, 18331 NPHY_RfctrlIntc_override_TRSW, 18332 0x2, RADIO_MIMO_CORESEL_CORE1); 18333 wlc_phy_rfctrlintc_override_nphy(pi, 18334 NPHY_RfctrlIntc_override_TRSW, 18335 0x8, RADIO_MIMO_CORESEL_CORE2); 18336 } else { 18337 wlc_phy_rfctrlintc_override_nphy(pi, 18338 NPHY_RfctrlIntc_override_TRSW, 18339 0x1, RADIO_MIMO_CORESEL_CORE1); 18340 wlc_phy_rfctrlintc_override_nphy(pi, 18341 NPHY_RfctrlIntc_override_TRSW, 18342 0x7, RADIO_MIMO_CORESEL_CORE2); 18343 } 18344 18345 orig_BBConfig = read_phy_reg(pi, 0x01); 18346 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 18347 18348 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 18349 18350 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18351 txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; 18352 18353 for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; 18354 gainctrl_loopidx++) { 18355 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18356 false); 18357 18358 if (core == PHY_CORE_0) 18359 curr_m0m1 = m0m1 & 0xff00; 18360 else 18361 curr_m0m1 = m0m1 & 0x00ff; 18362 18363 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); 18364 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); 18365 18366 udelay(50); 18367 18368 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18369 NPHY_CAL_TSSISAMPS); 18370 18371 pi->nphy_bb_mult_save = 0; 18372 wlc_phy_stopplayback_nphy(pi); 18373 18374 delta_power = (dBm_targetpower * 4) - qdBm_power[core]; 18375 18376 txpwrindex -= stepsize * delta_power; 18377 if (txpwrindex < 0) 18378 txpwrindex = 0; 18379 else if (txpwrindex > 127) 18380 txpwrindex = 127; 18381 18382 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18383 if (NREV_IS(pi->pubpi.phy_rev, 4) && 18384 (pi->srom_fem5g.extpagain == 3)) { 18385 if (txpwrindex < 30) 18386 txpwrindex = 30; 18387 } 18388 } else { 18389 if (NREV_GE(pi->pubpi.phy_rev, 5) && 18390 (pi->srom_fem2g.extpagain == 3)) { 18391 if (txpwrindex < 50) 18392 txpwrindex = 50; 18393 } 18394 } 18395 18396 wlc_phy_txpwr_index_nphy(pi, (1 << core), 18397 (u8) txpwrindex, true); 18398 } 18399 18400 pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; 18401 18402 if (debug) { 18403 u16 radio_gain; 18404 u16 dbg_m0m1; 18405 18406 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18407 18408 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18409 false); 18410 18411 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18412 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); 18413 18414 udelay(100); 18415 18416 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18417 NPHY_CAL_TSSISAMPS); 18418 18419 wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, 18420 &radio_gain); 18421 18422 mdelay(4000); 18423 pi->nphy_bb_mult_save = 0; 18424 wlc_phy_stopplayback_nphy(pi); 18425 } 18426 } 18427 18428 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); 18429 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); 18430 18431 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); 18432 18433 write_phy_reg(pi, 0x01, orig_BBConfig); 18434 18435 write_phy_reg(pi, 0x91, phy_saveregs[0]); 18436 write_phy_reg(pi, 0x92, phy_saveregs[1]); 18437 write_phy_reg(pi, 0xe7, phy_saveregs[2]); 18438 write_phy_reg(pi, 0xec, phy_saveregs[3]); 18439 18440 pi->phyhang_avoid = phyhang_avoid_state; 18441 18442 if (pi->phyhang_avoid) 18443 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18444 } 18445 18446 static void wlc_phy_savecal_nphy(struct brcms_phy *pi) 18447 { 18448 void *tbl_ptr; 18449 int coreNum; 18450 u16 *txcal_radio_regs = NULL; 18451 18452 if (pi->phyhang_avoid) 18453 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18454 18455 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18456 18457 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18458 &pi->calibration_cache. 18459 rxcal_coeffs_2G); 18460 18461 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18462 txcal_radio_regs = 18463 pi->calibration_cache.txcal_radio_regs_2G; 18464 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18465 18466 pi->calibration_cache.txcal_radio_regs_2G[0] = 18467 read_radio_reg(pi, 18468 RADIO_2056_TX_LOFT_FINE_I | 18469 RADIO_2056_TX0); 18470 pi->calibration_cache.txcal_radio_regs_2G[1] = 18471 read_radio_reg(pi, 18472 RADIO_2056_TX_LOFT_FINE_Q | 18473 RADIO_2056_TX0); 18474 pi->calibration_cache.txcal_radio_regs_2G[2] = 18475 read_radio_reg(pi, 18476 RADIO_2056_TX_LOFT_FINE_I | 18477 RADIO_2056_TX1); 18478 pi->calibration_cache.txcal_radio_regs_2G[3] = 18479 read_radio_reg(pi, 18480 RADIO_2056_TX_LOFT_FINE_Q | 18481 RADIO_2056_TX1); 18482 18483 pi->calibration_cache.txcal_radio_regs_2G[4] = 18484 read_radio_reg(pi, 18485 RADIO_2056_TX_LOFT_COARSE_I | 18486 RADIO_2056_TX0); 18487 pi->calibration_cache.txcal_radio_regs_2G[5] = 18488 read_radio_reg(pi, 18489 RADIO_2056_TX_LOFT_COARSE_Q | 18490 RADIO_2056_TX0); 18491 pi->calibration_cache.txcal_radio_regs_2G[6] = 18492 read_radio_reg(pi, 18493 RADIO_2056_TX_LOFT_COARSE_I | 18494 RADIO_2056_TX1); 18495 pi->calibration_cache.txcal_radio_regs_2G[7] = 18496 read_radio_reg(pi, 18497 RADIO_2056_TX_LOFT_COARSE_Q | 18498 RADIO_2056_TX1); 18499 } else { 18500 pi->calibration_cache.txcal_radio_regs_2G[0] = 18501 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18502 pi->calibration_cache.txcal_radio_regs_2G[1] = 18503 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18504 pi->calibration_cache.txcal_radio_regs_2G[2] = 18505 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18506 pi->calibration_cache.txcal_radio_regs_2G[3] = 18507 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18508 } 18509 18510 pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; 18511 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18512 } else { 18513 18514 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18515 &pi->calibration_cache. 18516 rxcal_coeffs_5G); 18517 18518 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18519 txcal_radio_regs = 18520 pi->calibration_cache.txcal_radio_regs_5G; 18521 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18522 18523 pi->calibration_cache.txcal_radio_regs_5G[0] = 18524 read_radio_reg(pi, 18525 RADIO_2056_TX_LOFT_FINE_I | 18526 RADIO_2056_TX0); 18527 pi->calibration_cache.txcal_radio_regs_5G[1] = 18528 read_radio_reg(pi, 18529 RADIO_2056_TX_LOFT_FINE_Q | 18530 RADIO_2056_TX0); 18531 pi->calibration_cache.txcal_radio_regs_5G[2] = 18532 read_radio_reg(pi, 18533 RADIO_2056_TX_LOFT_FINE_I | 18534 RADIO_2056_TX1); 18535 pi->calibration_cache.txcal_radio_regs_5G[3] = 18536 read_radio_reg(pi, 18537 RADIO_2056_TX_LOFT_FINE_Q | 18538 RADIO_2056_TX1); 18539 18540 pi->calibration_cache.txcal_radio_regs_5G[4] = 18541 read_radio_reg(pi, 18542 RADIO_2056_TX_LOFT_COARSE_I | 18543 RADIO_2056_TX0); 18544 pi->calibration_cache.txcal_radio_regs_5G[5] = 18545 read_radio_reg(pi, 18546 RADIO_2056_TX_LOFT_COARSE_Q | 18547 RADIO_2056_TX0); 18548 pi->calibration_cache.txcal_radio_regs_5G[6] = 18549 read_radio_reg(pi, 18550 RADIO_2056_TX_LOFT_COARSE_I | 18551 RADIO_2056_TX1); 18552 pi->calibration_cache.txcal_radio_regs_5G[7] = 18553 read_radio_reg(pi, 18554 RADIO_2056_TX_LOFT_COARSE_Q | 18555 RADIO_2056_TX1); 18556 } else { 18557 pi->calibration_cache.txcal_radio_regs_5G[0] = 18558 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18559 pi->calibration_cache.txcal_radio_regs_5G[1] = 18560 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18561 pi->calibration_cache.txcal_radio_regs_5G[2] = 18562 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18563 pi->calibration_cache.txcal_radio_regs_5G[3] = 18564 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18565 } 18566 18567 pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; 18568 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18569 } 18570 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18571 for (coreNum = 0; coreNum <= 1; coreNum++) { 18572 18573 txcal_radio_regs[2 * coreNum] = 18574 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18575 LOFT_FINE_I); 18576 txcal_radio_regs[2 * coreNum + 1] = 18577 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18578 LOFT_FINE_Q); 18579 18580 txcal_radio_regs[2 * coreNum + 4] = 18581 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18582 LOFT_COARSE_I); 18583 txcal_radio_regs[2 * coreNum + 5] = 18584 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18585 LOFT_COARSE_Q); 18586 } 18587 } 18588 18589 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); 18590 18591 if (pi->phyhang_avoid) 18592 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18593 } 18594 18595 static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi) 18596 { 18597 struct nphy_iq_comp tx_comp; 18598 18599 wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, &tx_comp); 18600 18601 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); 18602 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); 18603 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); 18604 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); 18605 } 18606 18607 static void wlc_phy_restorecal_nphy(struct brcms_phy *pi) 18608 { 18609 u16 *loft_comp; 18610 u16 txcal_coeffs_bphy[4]; 18611 u16 *tbl_ptr; 18612 int coreNum; 18613 u16 *txcal_radio_regs = NULL; 18614 18615 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18616 if (pi->nphy_iqcal_chanspec_2G == 0) 18617 return; 18618 18619 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18620 loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; 18621 } else { 18622 if (pi->nphy_iqcal_chanspec_5G == 0) 18623 return; 18624 18625 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18626 loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; 18627 } 18628 18629 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, tbl_ptr); 18630 18631 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18632 txcal_coeffs_bphy[0] = tbl_ptr[0]; 18633 txcal_coeffs_bphy[1] = tbl_ptr[1]; 18634 txcal_coeffs_bphy[2] = tbl_ptr[2]; 18635 txcal_coeffs_bphy[3] = tbl_ptr[3]; 18636 } else { 18637 txcal_coeffs_bphy[0] = 0; 18638 txcal_coeffs_bphy[1] = 0; 18639 txcal_coeffs_bphy[2] = 0; 18640 txcal_coeffs_bphy[3] = 0; 18641 } 18642 18643 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, 18644 txcal_coeffs_bphy); 18645 18646 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); 18647 18648 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); 18649 18650 if (NREV_LT(pi->pubpi.phy_rev, 2)) 18651 wlc_phy_tx_iq_war_nphy(pi); 18652 18653 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18654 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18655 txcal_radio_regs = 18656 pi->calibration_cache.txcal_radio_regs_2G; 18657 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18658 18659 write_radio_reg(pi, 18660 RADIO_2056_TX_LOFT_FINE_I | 18661 RADIO_2056_TX0, 18662 pi->calibration_cache. 18663 txcal_radio_regs_2G[0]); 18664 write_radio_reg(pi, 18665 RADIO_2056_TX_LOFT_FINE_Q | 18666 RADIO_2056_TX0, 18667 pi->calibration_cache. 18668 txcal_radio_regs_2G[1]); 18669 write_radio_reg(pi, 18670 RADIO_2056_TX_LOFT_FINE_I | 18671 RADIO_2056_TX1, 18672 pi->calibration_cache. 18673 txcal_radio_regs_2G[2]); 18674 write_radio_reg(pi, 18675 RADIO_2056_TX_LOFT_FINE_Q | 18676 RADIO_2056_TX1, 18677 pi->calibration_cache. 18678 txcal_radio_regs_2G[3]); 18679 18680 write_radio_reg(pi, 18681 RADIO_2056_TX_LOFT_COARSE_I | 18682 RADIO_2056_TX0, 18683 pi->calibration_cache. 18684 txcal_radio_regs_2G[4]); 18685 write_radio_reg(pi, 18686 RADIO_2056_TX_LOFT_COARSE_Q | 18687 RADIO_2056_TX0, 18688 pi->calibration_cache. 18689 txcal_radio_regs_2G[5]); 18690 write_radio_reg(pi, 18691 RADIO_2056_TX_LOFT_COARSE_I | 18692 RADIO_2056_TX1, 18693 pi->calibration_cache. 18694 txcal_radio_regs_2G[6]); 18695 write_radio_reg(pi, 18696 RADIO_2056_TX_LOFT_COARSE_Q | 18697 RADIO_2056_TX1, 18698 pi->calibration_cache. 18699 txcal_radio_regs_2G[7]); 18700 } else { 18701 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18702 pi->calibration_cache. 18703 txcal_radio_regs_2G[0]); 18704 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18705 pi->calibration_cache. 18706 txcal_radio_regs_2G[1]); 18707 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18708 pi->calibration_cache. 18709 txcal_radio_regs_2G[2]); 18710 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18711 pi->calibration_cache. 18712 txcal_radio_regs_2G[3]); 18713 } 18714 18715 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18716 &pi->calibration_cache. 18717 rxcal_coeffs_2G); 18718 } else { 18719 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18720 txcal_radio_regs = 18721 pi->calibration_cache.txcal_radio_regs_5G; 18722 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18723 18724 write_radio_reg(pi, 18725 RADIO_2056_TX_LOFT_FINE_I | 18726 RADIO_2056_TX0, 18727 pi->calibration_cache. 18728 txcal_radio_regs_5G[0]); 18729 write_radio_reg(pi, 18730 RADIO_2056_TX_LOFT_FINE_Q | 18731 RADIO_2056_TX0, 18732 pi->calibration_cache. 18733 txcal_radio_regs_5G[1]); 18734 write_radio_reg(pi, 18735 RADIO_2056_TX_LOFT_FINE_I | 18736 RADIO_2056_TX1, 18737 pi->calibration_cache. 18738 txcal_radio_regs_5G[2]); 18739 write_radio_reg(pi, 18740 RADIO_2056_TX_LOFT_FINE_Q | 18741 RADIO_2056_TX1, 18742 pi->calibration_cache. 18743 txcal_radio_regs_5G[3]); 18744 18745 write_radio_reg(pi, 18746 RADIO_2056_TX_LOFT_COARSE_I | 18747 RADIO_2056_TX0, 18748 pi->calibration_cache. 18749 txcal_radio_regs_5G[4]); 18750 write_radio_reg(pi, 18751 RADIO_2056_TX_LOFT_COARSE_Q | 18752 RADIO_2056_TX0, 18753 pi->calibration_cache. 18754 txcal_radio_regs_5G[5]); 18755 write_radio_reg(pi, 18756 RADIO_2056_TX_LOFT_COARSE_I | 18757 RADIO_2056_TX1, 18758 pi->calibration_cache. 18759 txcal_radio_regs_5G[6]); 18760 write_radio_reg(pi, 18761 RADIO_2056_TX_LOFT_COARSE_Q | 18762 RADIO_2056_TX1, 18763 pi->calibration_cache. 18764 txcal_radio_regs_5G[7]); 18765 } else { 18766 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18767 pi->calibration_cache. 18768 txcal_radio_regs_5G[0]); 18769 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18770 pi->calibration_cache. 18771 txcal_radio_regs_5G[1]); 18772 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18773 pi->calibration_cache. 18774 txcal_radio_regs_5G[2]); 18775 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18776 pi->calibration_cache. 18777 txcal_radio_regs_5G[3]); 18778 } 18779 18780 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18781 &pi->calibration_cache. 18782 rxcal_coeffs_5G); 18783 } 18784 18785 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18786 for (coreNum = 0; coreNum <= 1; coreNum++) { 18787 18788 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18789 LOFT_FINE_I, 18790 txcal_radio_regs[2 * coreNum]); 18791 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18792 LOFT_FINE_Q, 18793 txcal_radio_regs[2 * coreNum + 1]); 18794 18795 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18796 LOFT_COARSE_I, 18797 txcal_radio_regs[2 * coreNum + 4]); 18798 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18799 LOFT_COARSE_Q, 18800 txcal_radio_regs[2 * coreNum + 5]); 18801 } 18802 } 18803 } 18804 18805 static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi) 18806 { 18807 u32 idx; 18808 u16 iqloCalbuf[7]; 18809 u32 iqcomp, locomp, curr_locomp; 18810 s8 locomp_i, locomp_q; 18811 s8 curr_locomp_i, curr_locomp_q; 18812 u32 tbl_id, tbl_len, tbl_offset; 18813 u32 regval[128]; 18814 18815 if (pi->phyhang_avoid) 18816 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18817 18818 wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); 18819 18820 tbl_len = 128; 18821 tbl_offset = 320; 18822 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18823 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18824 iqcomp = 18825 (tbl_id == 18826 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | 18827 (iqloCalbuf[1] & 0x3ff) 18828 : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | 18829 (iqloCalbuf[3] & 0x3ff); 18830 18831 for (idx = 0; idx < tbl_len; idx++) 18832 regval[idx] = iqcomp; 18833 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18834 regval); 18835 } 18836 18837 tbl_offset = 448; 18838 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18839 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18840 18841 locomp = 18842 (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); 18843 locomp_i = (s8) ((locomp >> 8) & 0xff); 18844 locomp_q = (s8) ((locomp) & 0xff); 18845 for (idx = 0; idx < tbl_len; idx++) { 18846 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18847 curr_locomp_i = locomp_i; 18848 curr_locomp_q = locomp_q; 18849 } else { 18850 curr_locomp_i = (s8) ((locomp_i * 18851 nphy_tpc_loscale[idx] + 18852 128) >> 8); 18853 curr_locomp_q = 18854 (s8) ((locomp_q * 18855 nphy_tpc_loscale[idx] + 18856 128) >> 8); 18857 } 18858 curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); 18859 curr_locomp |= (u32) (curr_locomp_q & 0xff); 18860 regval[idx] = curr_locomp; 18861 } 18862 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18863 regval); 18864 } 18865 18866 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 18867 18868 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); 18869 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); 18870 } 18871 18872 if (pi->phyhang_avoid) 18873 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18874 } 18875 18876 static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi) 18877 { 18878 u8 tx_lpf_bw = 0; 18879 18880 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18881 if (CHSPEC_IS40(pi->radio_chanspec)) 18882 tx_lpf_bw = 3; 18883 else 18884 tx_lpf_bw = 1; 18885 18886 if (PHY_IPA(pi)) { 18887 if (CHSPEC_IS40(pi->radio_chanspec)) 18888 tx_lpf_bw = 5; 18889 else 18890 tx_lpf_bw = 4; 18891 } 18892 18893 write_phy_reg(pi, 0xe8, 18894 (tx_lpf_bw << 0) | 18895 (tx_lpf_bw << 3) | 18896 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18897 18898 if (PHY_IPA(pi)) { 18899 18900 if (CHSPEC_IS40(pi->radio_chanspec)) 18901 tx_lpf_bw = 4; 18902 else 18903 tx_lpf_bw = 1; 18904 18905 write_phy_reg(pi, 0xe9, 18906 (tx_lpf_bw << 0) | 18907 (tx_lpf_bw << 3) | 18908 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18909 } 18910 } 18911 } 18912 18913 static void 18914 wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr) 18915 { 18916 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18917 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18918 CHSPEC_IS40(pi->radio_chanspec)) { 18919 if (!pi->nphy_anarxlpf_adjusted) { 18920 write_radio_reg(pi, 18921 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18922 RADIO_2056_RX0), 18923 ((pi->nphy_rccal_value + 18924 reduction_factr) | 0x80)); 18925 18926 pi->nphy_anarxlpf_adjusted = true; 18927 } 18928 } else { 18929 if (pi->nphy_anarxlpf_adjusted) { 18930 write_radio_reg(pi, 18931 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18932 RADIO_2056_RX0), 18933 (pi->nphy_rccal_value | 0x80)); 18934 18935 pi->nphy_anarxlpf_adjusted = false; 18936 } 18937 } 18938 } 18939 } 18940 18941 static void 18942 wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, int ntones, 18943 int *tone_id_buf, u32 *noise_var_buf) 18944 { 18945 int i; 18946 u32 offset; 18947 int tone_id; 18948 int tbllen = 18949 CHSPEC_IS40(pi->radio_chanspec) ? 18950 NPHY_NOISEVAR_TBLLEN40 : NPHY_NOISEVAR_TBLLEN20; 18951 18952 if (pi->nphy_noisevars_adjusted) { 18953 for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { 18954 tone_id = pi->nphy_saved_noisevars.tone_id[i]; 18955 offset = (tone_id >= 0) ? 18956 ((tone_id * 18957 2) + 1) : (tbllen + (tone_id * 2) + 1); 18958 wlc_phy_table_write_nphy( 18959 pi, NPHY_TBL_ID_NOISEVAR, 1, 18960 offset, 32, 18961 &pi->nphy_saved_noisevars.min_noise_vars[i]); 18962 } 18963 18964 pi->nphy_saved_noisevars.bufcount = 0; 18965 pi->nphy_noisevars_adjusted = false; 18966 } 18967 18968 if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { 18969 pi->nphy_saved_noisevars.bufcount = 0; 18970 18971 for (i = 0; i < ntones; i++) { 18972 tone_id = tone_id_buf[i]; 18973 offset = (tone_id >= 0) ? 18974 ((tone_id * 2) + 1) : 18975 (tbllen + (tone_id * 2) + 1); 18976 pi->nphy_saved_noisevars.tone_id[i] = tone_id; 18977 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18978 offset, 32, 18979 &pi->nphy_saved_noisevars. 18980 min_noise_vars[i]); 18981 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18982 offset, 32, &noise_var_buf[i]); 18983 pi->nphy_saved_noisevars.bufcount++; 18984 } 18985 18986 pi->nphy_noisevars_adjusted = true; 18987 } 18988 } 18989 18990 static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr) 18991 { 18992 u16 regval; 18993 18994 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18995 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18996 CHSPEC_IS40(pi->radio_chanspec)) { 18997 if (!pi->nphy_crsminpwr_adjusted) { 18998 regval = read_phy_reg(pi, 0x27d); 18999 pi->nphy_crsminpwr[0] = regval & 0xff; 19000 regval &= 0xff00; 19001 regval |= (u16) minpwr; 19002 write_phy_reg(pi, 0x27d, regval); 19003 19004 regval = read_phy_reg(pi, 0x280); 19005 pi->nphy_crsminpwr[1] = regval & 0xff; 19006 regval &= 0xff00; 19007 regval |= (u16) minpwr; 19008 write_phy_reg(pi, 0x280, regval); 19009 19010 regval = read_phy_reg(pi, 0x283); 19011 pi->nphy_crsminpwr[2] = regval & 0xff; 19012 regval &= 0xff00; 19013 regval |= (u16) minpwr; 19014 write_phy_reg(pi, 0x283, regval); 19015 19016 pi->nphy_crsminpwr_adjusted = true; 19017 } 19018 } else { 19019 if (pi->nphy_crsminpwr_adjusted) { 19020 regval = read_phy_reg(pi, 0x27d); 19021 regval &= 0xff00; 19022 regval |= pi->nphy_crsminpwr[0]; 19023 write_phy_reg(pi, 0x27d, regval); 19024 19025 regval = read_phy_reg(pi, 0x280); 19026 regval &= 0xff00; 19027 regval |= pi->nphy_crsminpwr[1]; 19028 write_phy_reg(pi, 0x280, regval); 19029 19030 regval = read_phy_reg(pi, 0x283); 19031 regval &= 0xff00; 19032 regval |= pi->nphy_crsminpwr[2]; 19033 write_phy_reg(pi, 0x283, regval); 19034 19035 pi->nphy_crsminpwr_adjusted = false; 19036 } 19037 } 19038 } 19039 } 19040 19041 static void wlc_phy_spurwar_nphy(struct brcms_phy *pi) 19042 { 19043 u16 cur_channel = 0; 19044 int nphy_adj_tone_id_buf[] = { 57, 58 }; 19045 u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; 19046 bool isAdjustNoiseVar = false; 19047 uint numTonesAdjust = 0; 19048 u32 tempval = 0; 19049 19050 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19051 if (pi->phyhang_avoid) 19052 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19053 19054 cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 19055 19056 if (pi->nphy_gband_spurwar_en) { 19057 19058 wlc_phy_adjust_rx_analpfbw_nphy( 19059 pi, 19060 NPHY_ANARXLPFBW_REDUCTIONFACT); 19061 19062 if (CHSPEC_IS2G(pi->radio_chanspec)) { 19063 if ((cur_channel == 11) 19064 && CHSPEC_IS40(pi->radio_chanspec)) 19065 wlc_phy_adjust_min_noisevar_nphy( 19066 pi, 2, 19067 nphy_adj_tone_id_buf, 19068 nphy_adj_noise_var_buf); 19069 else 19070 wlc_phy_adjust_min_noisevar_nphy(pi, 0, 19071 NULL, 19072 NULL); 19073 } 19074 19075 wlc_phy_adjust_crsminpwr_nphy(pi, 19076 NPHY_ADJUSTED_MINCRSPOWER); 19077 } 19078 19079 if ((pi->nphy_gband_spurwar2_en) 19080 && CHSPEC_IS2G(pi->radio_chanspec)) { 19081 19082 if (CHSPEC_IS40(pi->radio_chanspec)) { 19083 switch (cur_channel) { 19084 case 3: 19085 nphy_adj_tone_id_buf[0] = 57; 19086 nphy_adj_tone_id_buf[1] = 58; 19087 nphy_adj_noise_var_buf[0] = 0x22f; 19088 nphy_adj_noise_var_buf[1] = 0x25f; 19089 isAdjustNoiseVar = true; 19090 break; 19091 case 4: 19092 nphy_adj_tone_id_buf[0] = 41; 19093 nphy_adj_tone_id_buf[1] = 42; 19094 nphy_adj_noise_var_buf[0] = 0x22f; 19095 nphy_adj_noise_var_buf[1] = 0x25f; 19096 isAdjustNoiseVar = true; 19097 break; 19098 case 5: 19099 nphy_adj_tone_id_buf[0] = 25; 19100 nphy_adj_tone_id_buf[1] = 26; 19101 nphy_adj_noise_var_buf[0] = 0x24f; 19102 nphy_adj_noise_var_buf[1] = 0x25f; 19103 isAdjustNoiseVar = true; 19104 break; 19105 case 6: 19106 nphy_adj_tone_id_buf[0] = 9; 19107 nphy_adj_tone_id_buf[1] = 10; 19108 nphy_adj_noise_var_buf[0] = 0x22f; 19109 nphy_adj_noise_var_buf[1] = 0x24f; 19110 isAdjustNoiseVar = true; 19111 break; 19112 case 7: 19113 nphy_adj_tone_id_buf[0] = 121; 19114 nphy_adj_tone_id_buf[1] = 122; 19115 nphy_adj_noise_var_buf[0] = 0x18f; 19116 nphy_adj_noise_var_buf[1] = 0x24f; 19117 isAdjustNoiseVar = true; 19118 break; 19119 case 8: 19120 nphy_adj_tone_id_buf[0] = 105; 19121 nphy_adj_tone_id_buf[1] = 106; 19122 nphy_adj_noise_var_buf[0] = 0x22f; 19123 nphy_adj_noise_var_buf[1] = 0x25f; 19124 isAdjustNoiseVar = true; 19125 break; 19126 case 9: 19127 nphy_adj_tone_id_buf[0] = 89; 19128 nphy_adj_tone_id_buf[1] = 90; 19129 nphy_adj_noise_var_buf[0] = 0x22f; 19130 nphy_adj_noise_var_buf[1] = 0x24f; 19131 isAdjustNoiseVar = true; 19132 break; 19133 case 10: 19134 nphy_adj_tone_id_buf[0] = 73; 19135 nphy_adj_tone_id_buf[1] = 74; 19136 nphy_adj_noise_var_buf[0] = 0x22f; 19137 nphy_adj_noise_var_buf[1] = 0x24f; 19138 isAdjustNoiseVar = true; 19139 break; 19140 default: 19141 isAdjustNoiseVar = false; 19142 break; 19143 } 19144 } 19145 19146 if (isAdjustNoiseVar) { 19147 numTonesAdjust = ARRAY_SIZE(nphy_adj_tone_id_buf); 19148 19149 wlc_phy_adjust_min_noisevar_nphy( 19150 pi, 19151 numTonesAdjust, 19152 nphy_adj_tone_id_buf, 19153 nphy_adj_noise_var_buf); 19154 19155 tempval = 0; 19156 19157 } else { 19158 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19159 NULL); 19160 } 19161 } 19162 19163 if ((pi->nphy_aband_spurwar_en) && 19164 (CHSPEC_IS5G(pi->radio_chanspec))) { 19165 switch (cur_channel) { 19166 case 54: 19167 nphy_adj_tone_id_buf[0] = 32; 19168 nphy_adj_noise_var_buf[0] = 0x25f; 19169 break; 19170 case 38: 19171 case 102: 19172 case 118: 19173 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) && 19174 (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 19175 nphy_adj_tone_id_buf[0] = 32; 19176 nphy_adj_noise_var_buf[0] = 0x21f; 19177 } else { 19178 nphy_adj_tone_id_buf[0] = 0; 19179 nphy_adj_noise_var_buf[0] = 0x0; 19180 } 19181 break; 19182 case 134: 19183 nphy_adj_tone_id_buf[0] = 32; 19184 nphy_adj_noise_var_buf[0] = 0x21f; 19185 break; 19186 case 151: 19187 nphy_adj_tone_id_buf[0] = 16; 19188 nphy_adj_noise_var_buf[0] = 0x23f; 19189 break; 19190 case 153: 19191 case 161: 19192 nphy_adj_tone_id_buf[0] = 48; 19193 nphy_adj_noise_var_buf[0] = 0x23f; 19194 break; 19195 default: 19196 nphy_adj_tone_id_buf[0] = 0; 19197 nphy_adj_noise_var_buf[0] = 0x0; 19198 break; 19199 } 19200 19201 if (nphy_adj_tone_id_buf[0] 19202 && nphy_adj_noise_var_buf[0]) 19203 wlc_phy_adjust_min_noisevar_nphy( 19204 pi, 1, 19205 nphy_adj_tone_id_buf, 19206 nphy_adj_noise_var_buf); 19207 else 19208 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19209 NULL); 19210 } 19211 19212 if (pi->phyhang_avoid) 19213 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19214 } 19215 } 19216 19217 void wlc_phy_init_nphy(struct brcms_phy *pi) 19218 { 19219 u16 val; 19220 u16 clip1_ths[2]; 19221 struct nphy_txgains target_gain; 19222 u8 tx_pwr_ctrl_state; 19223 bool do_nphy_cal = false; 19224 uint core; 19225 u32 d11_clk_ctl_st; 19226 bool do_rssi_cal = false; 19227 19228 core = 0; 19229 19230 if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) 19231 pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; 19232 19233 if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && 19234 ((pi->sh->chippkg == BCMA_PKG_ID_BCM4717) || 19235 (pi->sh->chippkg == BCMA_PKG_ID_BCM4718))) { 19236 if ((pi->sh->boardflags & BFL_EXTLNA) && 19237 (CHSPEC_IS2G(pi->radio_chanspec))) 19238 bcma_cc_set32(&pi->d11core->bus->drv_cc, 19239 BCMA_CC_CHIPCTL, 0x40); 19240 } 19241 19242 if ((!PHY_IPA(pi)) && (pi->sh->chip == BCMA_CHIP_ID_BCM5357)) 19243 bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 1, 19244 ~CCTRL5357_EXTPA, CCTRL5357_EXTPA); 19245 19246 if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && 19247 CHSPEC_IS40(pi->radio_chanspec)) { 19248 19249 d11_clk_ctl_st = bcma_read32(pi->d11core, 19250 D11REGOFFS(clk_ctl_st)); 19251 bcma_mask32(pi->d11core, D11REGOFFS(clk_ctl_st), 19252 ~(CCS_FORCEHT | CCS_HTAREQ)); 19253 19254 bcma_write32(pi->d11core, D11REGOFFS(clk_ctl_st), 19255 d11_clk_ctl_st); 19256 } 19257 19258 pi->use_int_tx_iqlo_cal_nphy = 19259 (PHY_IPA(pi) || 19260 (NREV_GE(pi->pubpi.phy_rev, 7) || 19261 (NREV_GE(pi->pubpi.phy_rev, 5) 19262 && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); 19263 19264 pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; 19265 19266 pi->nphy_deaf_count = 0; 19267 19268 wlc_phy_tbl_init_nphy(pi); 19269 19270 pi->nphy_crsminpwr_adjusted = false; 19271 pi->nphy_noisevars_adjusted = false; 19272 19273 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19274 write_phy_reg(pi, 0xe7, 0); 19275 write_phy_reg(pi, 0xec, 0); 19276 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19277 write_phy_reg(pi, 0x342, 0); 19278 write_phy_reg(pi, 0x343, 0); 19279 write_phy_reg(pi, 0x346, 0); 19280 write_phy_reg(pi, 0x347, 0); 19281 } 19282 write_phy_reg(pi, 0xe5, 0); 19283 write_phy_reg(pi, 0xe6, 0); 19284 } else { 19285 write_phy_reg(pi, 0xec, 0); 19286 } 19287 19288 write_phy_reg(pi, 0x91, 0); 19289 write_phy_reg(pi, 0x92, 0); 19290 if (NREV_LT(pi->pubpi.phy_rev, 6)) { 19291 write_phy_reg(pi, 0x93, 0); 19292 write_phy_reg(pi, 0x94, 0); 19293 } 19294 19295 and_phy_reg(pi, 0xa1, ~3); 19296 19297 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19298 write_phy_reg(pi, 0x8f, 0); 19299 write_phy_reg(pi, 0xa5, 0); 19300 } else { 19301 write_phy_reg(pi, 0xa5, 0); 19302 } 19303 19304 if (NREV_IS(pi->pubpi.phy_rev, 2)) 19305 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 19306 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 19307 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 19308 19309 write_phy_reg(pi, 0x203, 32); 19310 write_phy_reg(pi, 0x201, 32); 19311 19312 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) 19313 write_phy_reg(pi, 0x20d, 160); 19314 else 19315 write_phy_reg(pi, 0x20d, 184); 19316 19317 write_phy_reg(pi, 0x13a, 200); 19318 19319 write_phy_reg(pi, 0x70, 80); 19320 19321 write_phy_reg(pi, 0x1ff, 48); 19322 19323 if (NREV_LT(pi->pubpi.phy_rev, 8)) 19324 wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); 19325 19326 wlc_phy_stf_chain_upd_nphy(pi); 19327 19328 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 19329 write_phy_reg(pi, 0x180, 0xaa8); 19330 write_phy_reg(pi, 0x181, 0x9a4); 19331 } 19332 19333 if (PHY_IPA(pi)) { 19334 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 19335 19336 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 19337 0x29b, (0x1 << 0), (1) << 0); 19338 19339 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : 19340 0x29c, (0x1ff << 7), 19341 (pi->nphy_papd_epsilon_offset[core]) << 7); 19342 19343 } 19344 19345 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 19346 } else if (NREV_GE(pi->pubpi.phy_rev, 5)) { 19347 wlc_phy_extpa_set_tx_digi_filts_nphy(pi); 19348 } 19349 19350 wlc_phy_workarounds_nphy(pi); 19351 19352 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19353 19354 val = read_phy_reg(pi, 0x01); 19355 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19356 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19357 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19358 19359 wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); 19360 19361 wlc_phy_pa_override_nphy(pi, OFF); 19362 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 19363 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19364 wlc_phy_pa_override_nphy(pi, ON); 19365 19366 wlc_phy_classifier_nphy(pi, 0, 0); 19367 wlc_phy_clip_det_nphy(pi, 0, clip1_ths); 19368 19369 if (CHSPEC_IS2G(pi->radio_chanspec)) 19370 wlc_phy_bphy_init_nphy(pi); 19371 19372 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 19373 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 19374 19375 wlc_phy_txpwr_fixpower_nphy(pi); 19376 19377 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 19378 19379 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 19380 19381 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19382 u32 *tx_pwrctrl_tbl = NULL; 19383 u16 idx; 19384 s16 pga_gn = 0; 19385 s16 pad_gn = 0; 19386 s32 rfpwr_offset; 19387 19388 if (PHY_IPA(pi)) { 19389 tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); 19390 } else { 19391 if (CHSPEC_IS5G(pi->radio_chanspec)) { 19392 if (NREV_IS(pi->pubpi.phy_rev, 3)) 19393 tx_pwrctrl_tbl = 19394 nphy_tpc_5GHz_txgain_rev3; 19395 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 19396 tx_pwrctrl_tbl = 19397 (pi->srom_fem5g.extpagain == 19398 3) ? 19399 nphy_tpc_5GHz_txgain_HiPwrEPA : 19400 nphy_tpc_5GHz_txgain_rev4; 19401 else 19402 tx_pwrctrl_tbl = 19403 nphy_tpc_5GHz_txgain_rev5; 19404 } else { 19405 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19406 if (pi->pubpi.radiorev == 5) 19407 tx_pwrctrl_tbl = 19408 nphy_tpc_txgain_epa_2057rev5; 19409 else if (pi->pubpi.radiorev == 3) 19410 tx_pwrctrl_tbl = 19411 nphy_tpc_txgain_epa_2057rev3; 19412 } else { 19413 if (NREV_GE(pi->pubpi.phy_rev, 5) && 19414 (pi->srom_fem2g.extpagain == 3)) 19415 tx_pwrctrl_tbl = 19416 nphy_tpc_txgain_HiPwrEPA; 19417 else 19418 tx_pwrctrl_tbl = 19419 nphy_tpc_txgain_rev3; 19420 } 19421 } 19422 } 19423 19424 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19425 192, 32, tx_pwrctrl_tbl); 19426 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19427 192, 32, tx_pwrctrl_tbl); 19428 19429 pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); 19430 19431 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19432 19433 for (idx = 0; idx < 128; idx++) { 19434 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19435 pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; 19436 rfpwr_offset = get_rf_pwr_offset(pi, pga_gn, 19437 pad_gn); 19438 wlc_phy_table_write_nphy( 19439 pi, 19440 NPHY_TBL_ID_CORE1TXPWRCTL, 19441 1, 576 + idx, 32, 19442 &rfpwr_offset); 19443 wlc_phy_table_write_nphy( 19444 pi, 19445 NPHY_TBL_ID_CORE2TXPWRCTL, 19446 1, 576 + idx, 32, 19447 &rfpwr_offset); 19448 } 19449 } else { 19450 19451 for (idx = 0; idx < 128; idx++) { 19452 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19453 if (CHSPEC_IS2G(pi->radio_chanspec)) 19454 rfpwr_offset = (s16) 19455 nphy_papd_pga_gain_delta_ipa_2g 19456 [pga_gn]; 19457 else 19458 rfpwr_offset = (s16) 19459 nphy_papd_pga_gain_delta_ipa_5g 19460 [pga_gn]; 19461 19462 wlc_phy_table_write_nphy( 19463 pi, 19464 NPHY_TBL_ID_CORE1TXPWRCTL, 19465 1, 576 + idx, 32, 19466 &rfpwr_offset); 19467 wlc_phy_table_write_nphy( 19468 pi, 19469 NPHY_TBL_ID_CORE2TXPWRCTL, 19470 1, 576 + idx, 32, 19471 &rfpwr_offset); 19472 } 19473 19474 } 19475 } else { 19476 19477 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19478 192, 32, nphy_tpc_txgain); 19479 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19480 192, 32, nphy_tpc_txgain); 19481 } 19482 19483 if (pi->sh->phyrxchain != 0x3) 19484 wlc_phy_rxcore_setstate_nphy((struct brcms_phy_pub *) pi, 19485 pi->sh->phyrxchain); 19486 19487 if (PHY_PERICAL_MPHASE_PENDING(pi)) 19488 wlc_phy_cal_perical_mphase_restart(pi); 19489 19490 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19491 do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19492 (pi->nphy_rssical_chanspec_2G == 0) : 19493 (pi->nphy_rssical_chanspec_5G == 0); 19494 19495 if (do_rssi_cal) 19496 wlc_phy_rssi_cal_nphy(pi); 19497 else 19498 wlc_phy_restore_rssical_nphy(pi); 19499 } else { 19500 wlc_phy_rssi_cal_nphy(pi); 19501 } 19502 19503 if (!SCAN_RM_IN_PROGRESS(pi)) 19504 do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19505 (pi->nphy_iqcal_chanspec_2G == 0) : 19506 (pi->nphy_iqcal_chanspec_5G == 0); 19507 19508 if (!pi->do_initcal) 19509 do_nphy_cal = false; 19510 19511 if (do_nphy_cal) { 19512 19513 target_gain = wlc_phy_get_tx_gain_nphy(pi); 19514 19515 if (pi->antsel_type == ANTSEL_2x3) 19516 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, 19517 true); 19518 19519 if (pi->nphy_perical != PHY_PERICAL_MPHASE) { 19520 wlc_phy_rssi_cal_nphy(pi); 19521 19522 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19523 pi->nphy_cal_orig_pwr_idx[0] = 19524 pi->nphy_txpwrindex[PHY_CORE_0] 19525 . 19526 index_internal; 19527 pi->nphy_cal_orig_pwr_idx[1] = 19528 pi->nphy_txpwrindex[PHY_CORE_1] 19529 . 19530 index_internal; 19531 19532 wlc_phy_precal_txgain_nphy(pi); 19533 target_gain = 19534 wlc_phy_get_tx_gain_nphy(pi); 19535 } 19536 19537 if (wlc_phy_cal_txiqlo_nphy 19538 (pi, target_gain, true, 19539 false) == 0) { 19540 if (wlc_phy_cal_rxiq_nphy 19541 (pi, target_gain, 2, 19542 false) == 0) 19543 wlc_phy_savecal_nphy(pi); 19544 19545 } 19546 } else if (pi->mphase_cal_phase_id == 19547 MPHASE_CAL_STATE_IDLE) { 19548 wlc_phy_cal_perical((struct brcms_phy_pub *) pi, 19549 PHY_PERICAL_PHYINIT); 19550 } 19551 } else { 19552 wlc_phy_restorecal_nphy(pi); 19553 } 19554 19555 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 19556 19557 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 19558 19559 wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); 19560 19561 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) 19562 19563 write_phy_reg(pi, 0x70, 50); 19564 19565 wlc_phy_txlpfbw_nphy(pi); 19566 19567 wlc_phy_spurwar_nphy(pi); 19568 19569 } 19570 19571 static void wlc_phy_resetcca_nphy(struct brcms_phy *pi) 19572 { 19573 u16 val; 19574 19575 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19576 19577 val = read_phy_reg(pi, 0x01); 19578 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19579 udelay(1); 19580 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19581 19582 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19583 19584 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19585 } 19586 19587 void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) 19588 { 19589 u16 rfctrlintc_override_val; 19590 19591 if (!en) { 19592 19593 pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); 19594 pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); 19595 19596 if (NREV_GE(pi->pubpi.phy_rev, 7)) 19597 rfctrlintc_override_val = 0x1480; 19598 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 19599 rfctrlintc_override_val = 19600 CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; 19601 else 19602 rfctrlintc_override_val = 19603 CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 19604 19605 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 19606 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 19607 } else { 19608 write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); 19609 write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); 19610 } 19611 19612 } 19613 19614 void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi) 19615 { 19616 19617 u16 txrx_chain = 19618 (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); 19619 bool CoreActv_override = false; 19620 19621 if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN0) { 19622 txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; 19623 CoreActv_override = true; 19624 19625 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19626 and_phy_reg(pi, 0xa0, ~0x20); 19627 } else if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN1) { 19628 txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; 19629 CoreActv_override = true; 19630 19631 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19632 or_phy_reg(pi, 0xa0, 0x20); 19633 } 19634 19635 mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); 19636 19637 if (CoreActv_override) { 19638 pi->nphy_perical = PHY_PERICAL_DISABLE; 19639 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 19640 } else { 19641 pi->nphy_perical = PHY_PERICAL_MPHASE; 19642 and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); 19643 } 19644 } 19645 19646 void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, u8 rxcore_bitmask) 19647 { 19648 u16 regval; 19649 u16 tbl_buf[16]; 19650 uint i; 19651 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19652 u16 tbl_opcode; 19653 bool suspend; 19654 19655 pi->sh->phyrxchain = rxcore_bitmask; 19656 19657 if (!pi->sh->clk) 19658 return; 19659 19660 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 19661 MCTL_EN_MAC)); 19662 if (!suspend) 19663 wlapi_suspend_mac_and_wait(pi->sh->physhim); 19664 19665 if (pi->phyhang_avoid) 19666 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19667 19668 regval = read_phy_reg(pi, 0xa2); 19669 regval &= ~(0xf << 4); 19670 regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; 19671 write_phy_reg(pi, 0xa2, regval); 19672 19673 if ((rxcore_bitmask & 0x3) != 0x3) { 19674 19675 write_phy_reg(pi, 0x20e, 1); 19676 19677 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19678 if (pi->rx2tx_biasentry == -1) { 19679 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 19680 ARRAY_SIZE(tbl_buf), 80, 19681 16, tbl_buf); 19682 19683 for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { 19684 if (tbl_buf[i] == 19685 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { 19686 pi->rx2tx_biasentry = (u8) i; 19687 tbl_opcode = 19688 NPHY_REV3_RFSEQ_CMD_NOP; 19689 wlc_phy_table_write_nphy( 19690 pi, 19691 NPHY_TBL_ID_RFSEQ, 19692 1, i, 19693 16, 19694 &tbl_opcode); 19695 break; 19696 } else if (tbl_buf[i] == 19697 NPHY_REV3_RFSEQ_CMD_END) 19698 break; 19699 } 19700 } 19701 } 19702 } else { 19703 19704 write_phy_reg(pi, 0x20e, 30); 19705 19706 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19707 if (pi->rx2tx_biasentry != -1) { 19708 tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; 19709 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 19710 1, pi->rx2tx_biasentry, 19711 16, &tbl_opcode); 19712 pi->rx2tx_biasentry = -1; 19713 } 19714 } 19715 } 19716 19717 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19718 19719 if (pi->phyhang_avoid) 19720 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19721 19722 if (!suspend) 19723 wlapi_enable_mac(pi->sh->physhim); 19724 } 19725 19726 u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih) 19727 { 19728 u16 regval, rxen_bits; 19729 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19730 19731 regval = read_phy_reg(pi, 0xa2); 19732 rxen_bits = (regval >> 4) & 0xf; 19733 19734 return (u8) rxen_bits; 19735 } 19736 19737 bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pi) 19738 { 19739 return PHY_IPA(pi); 19740 } 19741 19742 void wlc_phy_cal_init_nphy(struct brcms_phy *pi) 19743 { 19744 } 19745 19746 static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi) 19747 { 19748 19749 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 19750 and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); 19751 19752 or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); 19753 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); 19754 19755 } 19756 19757 static void wlc_phy_radio_init_2057(struct brcms_phy *pi) 19758 { 19759 struct radio_20xx_regs *regs_2057_ptr = NULL; 19760 19761 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 19762 regs_2057_ptr = regs_2057_rev4; 19763 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 19764 || NREV_IS(pi->pubpi.phy_rev, 9)) { 19765 switch (pi->pubpi.radiorev) { 19766 case 5: 19767 19768 if (NREV_IS(pi->pubpi.phy_rev, 8)) 19769 regs_2057_ptr = regs_2057_rev5; 19770 else if (NREV_IS(pi->pubpi.phy_rev, 9)) 19771 regs_2057_ptr = regs_2057_rev5v1; 19772 break; 19773 19774 case 7: 19775 19776 regs_2057_ptr = regs_2057_rev7; 19777 break; 19778 19779 case 8: 19780 19781 regs_2057_ptr = regs_2057_rev8; 19782 break; 19783 19784 default: 19785 break; 19786 } 19787 } 19788 19789 wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); 19790 } 19791 19792 static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi) 19793 { 19794 u16 rcal_reg = 0; 19795 int i; 19796 19797 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19798 19799 if (pi->pubpi.radiorev == 5) { 19800 19801 and_phy_reg(pi, 0x342, ~(0x1 << 1)); 19802 19803 udelay(10); 19804 19805 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); 19806 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19807 0x1); 19808 } 19809 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); 19810 19811 udelay(10); 19812 19813 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); 19814 19815 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19816 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); 19817 if (rcal_reg & 0x1) 19818 break; 19819 19820 udelay(100); 19821 } 19822 19823 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19824 "HW error: radio calib2")) 19825 return 0; 19826 19827 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); 19828 19829 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; 19830 19831 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); 19832 if (pi->pubpi.radiorev == 5) { 19833 19834 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); 19835 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19836 0x0); 19837 } 19838 19839 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 19840 19841 mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, 19842 rcal_reg); 19843 mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, 19844 rcal_reg << 2); 19845 } 19846 19847 } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19848 u16 savereg; 19849 19850 savereg = 19851 read_radio_reg( 19852 pi, 19853 RADIO_2056_SYN_PLL_MAST2 | 19854 RADIO_2056_SYN); 19855 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19856 savereg | 0x7); 19857 udelay(10); 19858 19859 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19860 0x1); 19861 udelay(10); 19862 19863 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19864 0x9); 19865 19866 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19867 rcal_reg = read_radio_reg( 19868 pi, 19869 RADIO_2056_SYN_RCAL_CODE_OUT | 19870 RADIO_2056_SYN); 19871 if (rcal_reg & 0x80) 19872 break; 19873 19874 udelay(100); 19875 } 19876 19877 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19878 "HW error: radio calib3")) 19879 return 0; 19880 19881 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19882 0x1); 19883 19884 rcal_reg = 19885 read_radio_reg(pi, 19886 RADIO_2056_SYN_RCAL_CODE_OUT | 19887 RADIO_2056_SYN); 19888 19889 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19890 0x0); 19891 19892 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19893 savereg); 19894 19895 return rcal_reg & 0x1f; 19896 } 19897 return rcal_reg & 0x3e; 19898 } 19899 19900 static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi) 19901 { 19902 u16 rccal_valid; 19903 int i; 19904 bool chip43226_6362A0; 19905 19906 chip43226_6362A0 = ((pi->pubpi.radiorev == 3) 19907 || (pi->pubpi.radiorev == 4) 19908 || (pi->pubpi.radiorev == 6)); 19909 19910 rccal_valid = 0; 19911 if (chip43226_6362A0) { 19912 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); 19913 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); 19914 } else { 19915 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); 19916 19917 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); 19918 } 19919 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19920 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19921 19922 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19923 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19924 if (rccal_valid & 0x2) 19925 break; 19926 19927 udelay(500); 19928 } 19929 19930 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19931 19932 rccal_valid = 0; 19933 if (chip43226_6362A0) { 19934 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); 19935 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19936 } else { 19937 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); 19938 19939 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); 19940 } 19941 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19942 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19943 19944 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19945 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19946 if (rccal_valid & 0x2) 19947 break; 19948 19949 udelay(500); 19950 } 19951 19952 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19953 19954 rccal_valid = 0; 19955 if (chip43226_6362A0) { 19956 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); 19957 19958 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); 19959 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19960 } else { 19961 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); 19962 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19963 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); 19964 } 19965 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19966 19967 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19968 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19969 if (rccal_valid & 0x2) 19970 break; 19971 19972 udelay(500); 19973 } 19974 19975 if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) 19976 return 0; 19977 19978 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19979 19980 return rccal_valid; 19981 } 19982 19983 static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi) 19984 { 19985 19986 mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); 19987 19988 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); 19989 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); 19990 mdelay(2); 19991 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); 19992 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); 19993 19994 if (pi->phy_init_por) { 19995 wlc_phy_radio205x_rcal(pi); 19996 wlc_phy_radio2057_rccal(pi); 19997 } 19998 19999 mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); 20000 } 20001 20002 static void wlc_phy_radio_init_2056(struct brcms_phy *pi) 20003 { 20004 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20005 const struct radio_regs *regs_TX_2056_ptr = NULL; 20006 const struct radio_regs *regs_RX_2056_ptr = NULL; 20007 20008 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20009 regs_SYN_2056_ptr = regs_SYN_2056; 20010 regs_TX_2056_ptr = regs_TX_2056; 20011 regs_RX_2056_ptr = regs_RX_2056; 20012 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20013 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20014 regs_TX_2056_ptr = regs_TX_2056_A1; 20015 regs_RX_2056_ptr = regs_RX_2056_A1; 20016 } else { 20017 switch (pi->pubpi.radiorev) { 20018 case 5: 20019 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20020 regs_TX_2056_ptr = regs_TX_2056_rev5; 20021 regs_RX_2056_ptr = regs_RX_2056_rev5; 20022 break; 20023 20024 case 6: 20025 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20026 regs_TX_2056_ptr = regs_TX_2056_rev6; 20027 regs_RX_2056_ptr = regs_RX_2056_rev6; 20028 break; 20029 20030 case 7: 20031 case 9: 20032 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20033 regs_TX_2056_ptr = regs_TX_2056_rev7; 20034 regs_RX_2056_ptr = regs_RX_2056_rev7; 20035 break; 20036 20037 case 8: 20038 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20039 regs_TX_2056_ptr = regs_TX_2056_rev8; 20040 regs_RX_2056_ptr = regs_RX_2056_rev8; 20041 break; 20042 20043 case 11: 20044 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20045 regs_TX_2056_ptr = regs_TX_2056_rev11; 20046 regs_RX_2056_ptr = regs_RX_2056_rev11; 20047 break; 20048 20049 default: 20050 break; 20051 } 20052 } 20053 20054 wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); 20055 20056 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); 20057 20058 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); 20059 20060 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); 20061 20062 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); 20063 } 20064 20065 static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi) 20066 { 20067 mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); 20068 20069 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); 20070 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); 20071 udelay(1000); 20072 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); 20073 20074 if ((pi->sh->boardflags2 & BFL2_LEGACY) 20075 || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) 20076 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); 20077 else 20078 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); 20079 20080 mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); 20081 20082 if (pi->phy_init_por) 20083 wlc_phy_radio205x_rcal(pi); 20084 } 20085 20086 static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi) 20087 { 20088 20089 and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); 20090 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); 20091 20092 or_phy_reg(pi, 0x78, RFCC_POR_FORCE); 20093 } 20094 20095 static void wlc_phy_radio_init_2055(struct brcms_phy *pi) 20096 { 20097 wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); 20098 } 20099 20100 static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi) 20101 { 20102 20103 and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 20104 ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); 20105 20106 if (((pi->sh->sromrev >= 4) 20107 && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) 20108 || ((pi->sh->sromrev < 4))) { 20109 and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); 20110 and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); 20111 } 20112 20113 mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); 20114 write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); 20115 20116 and_radio_reg(pi, RADIO_2055_CAL_MISC, 20117 ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); 20118 20119 or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); 20120 20121 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); 20122 20123 udelay(1000); 20124 20125 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); 20126 20127 SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20128 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); 20129 20130 if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20131 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, 20132 "HW error: radio calibration1\n")) 20133 return; 20134 20135 and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, 20136 ~(RADIO_2055_CAL_LPO_ENABLE)); 20137 20138 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); 20139 20140 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); 20141 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); 20142 20143 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); 20144 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); 20145 20146 mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, 20147 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20148 mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, 20149 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20150 if (pi->nphy_gain_boost) { 20151 and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20152 ~(RADIO_2055_GAINBST_DISABLE)); 20153 and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20154 ~(RADIO_2055_GAINBST_DISABLE)); 20155 } else { 20156 or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20157 RADIO_2055_GAINBST_DISABLE); 20158 or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20159 RADIO_2055_GAINBST_DISABLE); 20160 } 20161 20162 udelay(2); 20163 } 20164 20165 void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on) 20166 { 20167 if (on) { 20168 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20169 if (!pi->radio_is_on) { 20170 wlc_phy_radio_preinit_205x(pi); 20171 wlc_phy_radio_init_2057(pi); 20172 wlc_phy_radio_postinit_2057(pi); 20173 } 20174 20175 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20176 pi->radio_chanspec); 20177 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20178 wlc_phy_radio_preinit_205x(pi); 20179 wlc_phy_radio_init_2056(pi); 20180 wlc_phy_radio_postinit_2056(pi); 20181 20182 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20183 pi->radio_chanspec); 20184 } else { 20185 wlc_phy_radio_preinit_2055(pi); 20186 wlc_phy_radio_init_2055(pi); 20187 wlc_phy_radio_postinit_2055(pi); 20188 } 20189 20190 pi->radio_is_on = true; 20191 20192 } else { 20193 20194 if (NREV_GE(pi->pubpi.phy_rev, 3) 20195 && NREV_LT(pi->pubpi.phy_rev, 7)) { 20196 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20197 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); 20198 20199 write_radio_reg(pi, 20200 RADIO_2056_TX_PADA_BOOST_TUNE | 20201 RADIO_2056_TX0, 0); 20202 write_radio_reg(pi, 20203 RADIO_2056_TX_PADG_BOOST_TUNE | 20204 RADIO_2056_TX0, 0); 20205 write_radio_reg(pi, 20206 RADIO_2056_TX_PGAA_BOOST_TUNE | 20207 RADIO_2056_TX0, 0); 20208 write_radio_reg(pi, 20209 RADIO_2056_TX_PGAG_BOOST_TUNE | 20210 RADIO_2056_TX0, 0); 20211 mod_radio_reg(pi, 20212 RADIO_2056_TX_MIXA_BOOST_TUNE | 20213 RADIO_2056_TX0, 0xf0, 0); 20214 write_radio_reg(pi, 20215 RADIO_2056_TX_MIXG_BOOST_TUNE | 20216 RADIO_2056_TX0, 0); 20217 20218 write_radio_reg(pi, 20219 RADIO_2056_TX_PADA_BOOST_TUNE | 20220 RADIO_2056_TX1, 0); 20221 write_radio_reg(pi, 20222 RADIO_2056_TX_PADG_BOOST_TUNE | 20223 RADIO_2056_TX1, 0); 20224 write_radio_reg(pi, 20225 RADIO_2056_TX_PGAA_BOOST_TUNE | 20226 RADIO_2056_TX1, 0); 20227 write_radio_reg(pi, 20228 RADIO_2056_TX_PGAG_BOOST_TUNE | 20229 RADIO_2056_TX1, 0); 20230 mod_radio_reg(pi, 20231 RADIO_2056_TX_MIXA_BOOST_TUNE | 20232 RADIO_2056_TX1, 0xf0, 0); 20233 write_radio_reg(pi, 20234 RADIO_2056_TX_MIXG_BOOST_TUNE | 20235 RADIO_2056_TX1, 0); 20236 20237 pi->radio_is_on = false; 20238 } 20239 20240 if (NREV_GE(pi->pubpi.phy_rev, 8)) { 20241 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20242 pi->radio_is_on = false; 20243 } 20244 20245 } 20246 } 20247 20248 static bool 20249 wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, 20250 const struct chan_info_nphy_radio2057 **t0, 20251 const struct chan_info_nphy_radio205x **t1, 20252 const struct chan_info_nphy_radio2057_rev5 **t2, 20253 const struct chan_info_nphy_2055 **t3) 20254 { 20255 uint i; 20256 const struct chan_info_nphy_radio2057 *chan_info_tbl_p_0 = NULL; 20257 const struct chan_info_nphy_radio205x *chan_info_tbl_p_1 = NULL; 20258 const struct chan_info_nphy_radio2057_rev5 *chan_info_tbl_p_2 = NULL; 20259 u32 tbl_len = 0; 20260 20261 int freq = 0; 20262 20263 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20264 20265 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 20266 20267 chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; 20268 tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); 20269 20270 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 20271 || NREV_IS(pi->pubpi.phy_rev, 9)) { 20272 switch (pi->pubpi.radiorev) { 20273 20274 case 5: 20275 20276 if (pi->pubpi.radiover == 0x0) { 20277 20278 chan_info_tbl_p_2 = 20279 chan_info_nphyrev8_2057_rev5; 20280 tbl_len = ARRAY_SIZE( 20281 chan_info_nphyrev8_2057_rev5); 20282 20283 } else if (pi->pubpi.radiover == 0x1) { 20284 20285 chan_info_tbl_p_2 = 20286 chan_info_nphyrev9_2057_rev5v1; 20287 tbl_len = ARRAY_SIZE( 20288 chan_info_nphyrev9_2057_rev5v1); 20289 20290 } 20291 break; 20292 20293 case 7: 20294 chan_info_tbl_p_0 = 20295 chan_info_nphyrev8_2057_rev7; 20296 tbl_len = ARRAY_SIZE( 20297 chan_info_nphyrev8_2057_rev7); 20298 break; 20299 20300 case 8: 20301 chan_info_tbl_p_0 = 20302 chan_info_nphyrev8_2057_rev8; 20303 tbl_len = ARRAY_SIZE( 20304 chan_info_nphyrev8_2057_rev8); 20305 break; 20306 20307 default: 20308 break; 20309 } 20310 } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { 20311 20312 chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; 20313 tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); 20314 } else { 20315 goto fail; 20316 } 20317 20318 for (i = 0; i < tbl_len; i++) { 20319 if (pi->pubpi.radiorev == 5) { 20320 20321 if (chan_info_tbl_p_2[i].chan == channel) 20322 break; 20323 } else { 20324 20325 if (chan_info_tbl_p_0[i].chan == channel) 20326 break; 20327 } 20328 } 20329 20330 if (i >= tbl_len) 20331 goto fail; 20332 20333 if (pi->pubpi.radiorev == 5) { 20334 *t2 = &chan_info_tbl_p_2[i]; 20335 freq = chan_info_tbl_p_2[i].freq; 20336 } else { 20337 *t0 = &chan_info_tbl_p_0[i]; 20338 freq = chan_info_tbl_p_0[i].freq; 20339 } 20340 20341 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20342 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20343 chan_info_tbl_p_1 = chan_info_nphyrev3_2056; 20344 tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); 20345 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20346 chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; 20347 tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); 20348 } else if (NREV_IS(pi->pubpi.phy_rev, 5) 20349 || NREV_IS(pi->pubpi.phy_rev, 6)) { 20350 switch (pi->pubpi.radiorev) { 20351 case 5: 20352 chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; 20353 tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); 20354 break; 20355 case 6: 20356 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; 20357 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); 20358 break; 20359 case 7: 20360 case 9: 20361 chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; 20362 tbl_len = 20363 ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); 20364 break; 20365 case 8: 20366 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; 20367 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); 20368 break; 20369 case 11: 20370 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; 20371 tbl_len = ARRAY_SIZE( 20372 chan_info_nphyrev6_2056v11); 20373 break; 20374 default: 20375 break; 20376 } 20377 } 20378 20379 for (i = 0; i < tbl_len; i++) { 20380 if (chan_info_tbl_p_1[i].chan == channel) 20381 break; 20382 } 20383 20384 if (i >= tbl_len) 20385 goto fail; 20386 20387 *t1 = &chan_info_tbl_p_1[i]; 20388 freq = chan_info_tbl_p_1[i].freq; 20389 20390 } else { 20391 for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) 20392 if (chan_info_nphy_2055[i].chan == channel) 20393 break; 20394 20395 if (i >= ARRAY_SIZE(chan_info_nphy_2055)) 20396 goto fail; 20397 20398 *t3 = &chan_info_nphy_2055[i]; 20399 freq = chan_info_nphy_2055[i].freq; 20400 } 20401 20402 *f = freq; 20403 return true; 20404 20405 fail: 20406 *f = WL_CHAN_FREQ_RANGE_2G; 20407 return false; 20408 } 20409 20410 u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint channel) 20411 { 20412 int freq; 20413 const struct chan_info_nphy_radio2057 *t0 = NULL; 20414 const struct chan_info_nphy_radio205x *t1 = NULL; 20415 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 20416 const struct chan_info_nphy_2055 *t3 = NULL; 20417 20418 if (channel == 0) 20419 channel = CHSPEC_CHANNEL(pi->radio_chanspec); 20420 20421 wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); 20422 20423 if (CHSPEC_IS2G(pi->radio_chanspec)) 20424 return WL_CHAN_FREQ_RANGE_2G; 20425 20426 if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) 20427 return WL_CHAN_FREQ_RANGE_5GL; 20428 else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) 20429 return WL_CHAN_FREQ_RANGE_5GM; 20430 else 20431 return WL_CHAN_FREQ_RANGE_5GH; 20432 } 20433 20434 static void 20435 wlc_phy_chanspec_radio2055_setup(struct brcms_phy *pi, 20436 const struct chan_info_nphy_2055 *ci) 20437 { 20438 20439 write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); 20440 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); 20441 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); 20442 write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); 20443 20444 BRCMS_PHY_WAR_PR51571(pi); 20445 20446 write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); 20447 write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); 20448 write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); 20449 write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); 20450 20451 BRCMS_PHY_WAR_PR51571(pi); 20452 20453 write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); 20454 write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); 20455 write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); 20456 write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); 20457 20458 BRCMS_PHY_WAR_PR51571(pi); 20459 20460 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, 20461 ci->RF_core1_lgbuf_a_tune); 20462 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, 20463 ci->RF_core1_lgbuf_g_tune); 20464 write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); 20465 write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, 20466 ci->RF_core1_tx_pga_pad_tn); 20467 20468 BRCMS_PHY_WAR_PR51571(pi); 20469 20470 write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, 20471 ci->RF_core1_tx_mx_bgtrim); 20472 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, 20473 ci->RF_core2_lgbuf_a_tune); 20474 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, 20475 ci->RF_core2_lgbuf_g_tune); 20476 write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); 20477 20478 BRCMS_PHY_WAR_PR51571(pi); 20479 20480 write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, 20481 ci->RF_core2_tx_pga_pad_tn); 20482 write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, 20483 ci->RF_core2_tx_mx_bgtrim); 20484 20485 udelay(50); 20486 20487 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); 20488 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); 20489 20490 BRCMS_PHY_WAR_PR51571(pi); 20491 20492 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); 20493 20494 udelay(300); 20495 } 20496 20497 static void 20498 wlc_phy_chanspec_radio2056_setup(struct brcms_phy *pi, 20499 const struct chan_info_nphy_radio205x *ci) 20500 { 20501 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20502 20503 write_radio_reg(pi, 20504 RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, 20505 ci->RF_SYN_pll_vcocal1); 20506 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, 20507 ci->RF_SYN_pll_vcocal2); 20508 write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, 20509 ci->RF_SYN_pll_refdiv); 20510 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, 20511 ci->RF_SYN_pll_mmd2); 20512 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, 20513 ci->RF_SYN_pll_mmd1); 20514 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20515 ci->RF_SYN_pll_loopfilter1); 20516 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20517 ci->RF_SYN_pll_loopfilter2); 20518 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, 20519 ci->RF_SYN_pll_loopfilter3); 20520 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20521 ci->RF_SYN_pll_loopfilter4); 20522 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, 20523 ci->RF_SYN_pll_loopfilter5); 20524 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, 20525 ci->RF_SYN_reserved_addr27); 20526 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, 20527 ci->RF_SYN_reserved_addr28); 20528 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, 20529 ci->RF_SYN_reserved_addr29); 20530 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, 20531 ci->RF_SYN_logen_VCOBUF1); 20532 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, 20533 ci->RF_SYN_logen_MIXER2); 20534 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, 20535 ci->RF_SYN_logen_BUF3); 20536 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, 20537 ci->RF_SYN_logen_BUF4); 20538 20539 write_radio_reg(pi, 20540 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, 20541 ci->RF_RX0_lnaa_tune); 20542 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, 20543 ci->RF_RX0_lnag_tune); 20544 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, 20545 ci->RF_TX0_intpaa_boost_tune); 20546 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, 20547 ci->RF_TX0_intpag_boost_tune); 20548 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, 20549 ci->RF_TX0_pada_boost_tune); 20550 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, 20551 ci->RF_TX0_padg_boost_tune); 20552 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, 20553 ci->RF_TX0_pgaa_boost_tune); 20554 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, 20555 ci->RF_TX0_pgag_boost_tune); 20556 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, 20557 ci->RF_TX0_mixa_boost_tune); 20558 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, 20559 ci->RF_TX0_mixg_boost_tune); 20560 20561 write_radio_reg(pi, 20562 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, 20563 ci->RF_RX1_lnaa_tune); 20564 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, 20565 ci->RF_RX1_lnag_tune); 20566 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, 20567 ci->RF_TX1_intpaa_boost_tune); 20568 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, 20569 ci->RF_TX1_intpag_boost_tune); 20570 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, 20571 ci->RF_TX1_pada_boost_tune); 20572 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, 20573 ci->RF_TX1_padg_boost_tune); 20574 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, 20575 ci->RF_TX1_pgaa_boost_tune); 20576 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, 20577 ci->RF_TX1_pgag_boost_tune); 20578 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, 20579 ci->RF_TX1_mixa_boost_tune); 20580 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, 20581 ci->RF_TX1_mixg_boost_tune); 20582 20583 if (NREV_IS(pi->pubpi.phy_rev, 3)) 20584 regs_SYN_2056_ptr = regs_SYN_2056; 20585 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 20586 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20587 else { 20588 switch (pi->pubpi.radiorev) { 20589 case 5: 20590 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20591 break; 20592 case 6: 20593 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20594 break; 20595 case 7: 20596 case 9: 20597 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20598 break; 20599 case 8: 20600 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20601 break; 20602 case 11: 20603 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20604 break; 20605 } 20606 } 20607 if (CHSPEC_IS2G(pi->radio_chanspec)) 20608 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20609 RADIO_2056_SYN, 20610 (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); 20611 else 20612 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20613 RADIO_2056_SYN, 20614 (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); 20615 20616 if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { 20617 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20618 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20619 RADIO_2056_SYN, 0x1f); 20620 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20621 RADIO_2056_SYN, 0x1f); 20622 20623 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20624 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20625 write_radio_reg(pi, 20626 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20627 RADIO_2056_SYN, 0x14); 20628 write_radio_reg(pi, 20629 RADIO_2056_SYN_PLL_CP2 | 20630 RADIO_2056_SYN, 0x00); 20631 } else { 20632 write_radio_reg(pi, 20633 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20634 RADIO_2056_SYN, 0xb); 20635 write_radio_reg(pi, 20636 RADIO_2056_SYN_PLL_CP2 | 20637 RADIO_2056_SYN, 0x14); 20638 } 20639 } 20640 } 20641 20642 if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && 20643 (CHSPEC_IS2G(pi->radio_chanspec))) { 20644 write_radio_reg(pi, 20645 RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20646 0x1f); 20647 write_radio_reg(pi, 20648 RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20649 0x1f); 20650 write_radio_reg(pi, 20651 RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20652 0xb); 20653 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, 20654 0x20); 20655 } 20656 20657 if (pi->sh->boardflags2 & BFL2_APLL_WAR) { 20658 if (CHSPEC_IS5G(pi->radio_chanspec)) { 20659 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20660 RADIO_2056_SYN, 0x1f); 20661 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20662 RADIO_2056_SYN, 0x1f); 20663 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | 20664 RADIO_2056_SYN, 0x5); 20665 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20666 RADIO_2056_SYN, 0xc); 20667 } 20668 } 20669 20670 if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { 20671 u16 pag_boost_tune; 20672 u16 padg_boost_tune; 20673 u16 pgag_boost_tune; 20674 u16 mixg_boost_tune; 20675 u16 bias, cascbias; 20676 uint core; 20677 20678 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20679 20680 if (NREV_GE(pi->pubpi.phy_rev, 5)) { 20681 20682 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20683 PADG_IDAC, 0xcc); 20684 20685 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20686 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20687 bias = 0x40; 20688 cascbias = 0x45; 20689 pag_boost_tune = 0x5; 20690 pgag_boost_tune = 0x33; 20691 padg_boost_tune = 0x77; 20692 mixg_boost_tune = 0x55; 20693 } else { 20694 bias = 0x25; 20695 cascbias = 0x20; 20696 20697 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20698 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20699 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) { 20700 bias = 0x2a; 20701 cascbias = 0x38; 20702 } 20703 20704 pag_boost_tune = 0x4; 20705 pgag_boost_tune = 0x03; 20706 padg_boost_tune = 0x77; 20707 mixg_boost_tune = 0x65; 20708 } 20709 20710 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20711 INTPAG_IMAIN_STAT, bias); 20712 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20713 INTPAG_IAUX_STAT, bias); 20714 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20715 INTPAG_CASCBIAS, cascbias); 20716 20717 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20718 INTPAG_BOOST_TUNE, 20719 pag_boost_tune); 20720 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20721 PGAG_BOOST_TUNE, 20722 pgag_boost_tune); 20723 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20724 PADG_BOOST_TUNE, 20725 padg_boost_tune); 20726 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20727 MIXG_BOOST_TUNE, 20728 mixg_boost_tune); 20729 } else { 20730 20731 bias = (pi->bw == WL_CHANSPEC_BW_40) ? 20732 0x40 : 0x20; 20733 20734 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20735 INTPAG_IMAIN_STAT, bias); 20736 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20737 INTPAG_IAUX_STAT, bias); 20738 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20739 INTPAG_CASCBIAS, 0x30); 20740 } 20741 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, 20742 0xee); 20743 } 20744 } 20745 20746 if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) 20747 && CHSPEC_IS5G(pi->radio_chanspec)) { 20748 u16 paa_boost_tune; 20749 u16 pada_boost_tune; 20750 u16 pgaa_boost_tune; 20751 u16 mixa_boost_tune; 20752 u16 freq, pabias, cascbias; 20753 uint core; 20754 20755 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 20756 20757 if (freq < 5150) { 20758 20759 paa_boost_tune = 0xa; 20760 pada_boost_tune = 0x77; 20761 pgaa_boost_tune = 0xf; 20762 mixa_boost_tune = 0xf; 20763 } else if (freq < 5340) { 20764 20765 paa_boost_tune = 0x8; 20766 pada_boost_tune = 0x77; 20767 pgaa_boost_tune = 0xfb; 20768 mixa_boost_tune = 0xf; 20769 } else if (freq < 5650) { 20770 20771 paa_boost_tune = 0x0; 20772 pada_boost_tune = 0x77; 20773 pgaa_boost_tune = 0xb; 20774 mixa_boost_tune = 0xf; 20775 } else { 20776 20777 paa_boost_tune = 0x0; 20778 pada_boost_tune = 0x77; 20779 if (freq != 5825) 20780 pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; 20781 else 20782 pgaa_boost_tune = 6; 20783 20784 mixa_boost_tune = 0xf; 20785 } 20786 20787 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20788 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20789 INTPAA_BOOST_TUNE, paa_boost_tune); 20790 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20791 PADA_BOOST_TUNE, pada_boost_tune); 20792 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20793 PGAA_BOOST_TUNE, pgaa_boost_tune); 20794 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20795 MIXA_BOOST_TUNE, mixa_boost_tune); 20796 20797 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20798 TXSPARE1, 0x30); 20799 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20800 PA_SPARE2, 0xee); 20801 20802 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20803 PADA_CASCBIAS, 0x3); 20804 20805 cascbias = 0x30; 20806 20807 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20808 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20809 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) 20810 cascbias = 0x35; 20811 20812 pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; 20813 20814 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20815 INTPAA_IAUX_STAT, pabias); 20816 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20817 INTPAA_IMAIN_STAT, pabias); 20818 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20819 INTPAA_CASCBIAS, cascbias); 20820 } 20821 } 20822 20823 udelay(50); 20824 20825 wlc_phy_radio205x_vcocal_nphy(pi); 20826 } 20827 20828 void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi) 20829 { 20830 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20831 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); 20832 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); 20833 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 20834 (1 << 2)); 20835 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); 20836 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20837 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); 20838 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20839 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); 20840 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20841 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); 20842 } 20843 20844 udelay(300); 20845 } 20846 20847 static void 20848 wlc_phy_chanspec_radio2057_setup( 20849 struct brcms_phy *pi, 20850 const struct chan_info_nphy_radio2057 *ci, 20851 const struct chan_info_nphy_radio2057_rev5 * 20852 ci2) 20853 { 20854 int coreNum; 20855 u16 txmix2g_tune_boost_pu = 0; 20856 u16 pad2g_tune_pus = 0; 20857 20858 if (pi->pubpi.radiorev == 5) { 20859 20860 write_radio_reg(pi, 20861 RADIO_2057_VCOCAL_COUNTVAL0, 20862 ci2->RF_vcocal_countval0); 20863 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20864 ci2->RF_vcocal_countval1); 20865 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20866 ci2->RF_rfpll_refmaster_sparextalsize); 20867 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20868 ci2->RF_rfpll_loopfilter_r1); 20869 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20870 ci2->RF_rfpll_loopfilter_c2); 20871 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20872 ci2->RF_rfpll_loopfilter_c1); 20873 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 20874 ci2->RF_cp_kpd_idac); 20875 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); 20876 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); 20877 write_radio_reg(pi, 20878 RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); 20879 write_radio_reg(pi, 20880 RADIO_2057_LOGEN_MX2G_TUNE, 20881 ci2->RF_logen_mx2g_tune); 20882 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20883 ci2->RF_logen_indbuf2g_tune); 20884 20885 write_radio_reg(pi, 20886 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20887 ci2->RF_txmix2g_tune_boost_pu_core0); 20888 write_radio_reg(pi, 20889 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20890 ci2->RF_pad2g_tune_pus_core0); 20891 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20892 ci2->RF_lna2g_tune_core0); 20893 20894 write_radio_reg(pi, 20895 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20896 ci2->RF_txmix2g_tune_boost_pu_core1); 20897 write_radio_reg(pi, 20898 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20899 ci2->RF_pad2g_tune_pus_core1); 20900 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20901 ci2->RF_lna2g_tune_core1); 20902 20903 } else { 20904 20905 write_radio_reg(pi, 20906 RADIO_2057_VCOCAL_COUNTVAL0, 20907 ci->RF_vcocal_countval0); 20908 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20909 ci->RF_vcocal_countval1); 20910 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20911 ci->RF_rfpll_refmaster_sparextalsize); 20912 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20913 ci->RF_rfpll_loopfilter_r1); 20914 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20915 ci->RF_rfpll_loopfilter_c2); 20916 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20917 ci->RF_rfpll_loopfilter_c1); 20918 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); 20919 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); 20920 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); 20921 write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); 20922 write_radio_reg(pi, 20923 RADIO_2057_LOGEN_MX2G_TUNE, 20924 ci->RF_logen_mx2g_tune); 20925 write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, 20926 ci->RF_logen_mx5g_tune); 20927 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20928 ci->RF_logen_indbuf2g_tune); 20929 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, 20930 ci->RF_logen_indbuf5g_tune); 20931 20932 write_radio_reg(pi, 20933 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20934 ci->RF_txmix2g_tune_boost_pu_core0); 20935 write_radio_reg(pi, 20936 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20937 ci->RF_pad2g_tune_pus_core0); 20938 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, 20939 ci->RF_pga_boost_tune_core0); 20940 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, 20941 ci->RF_txmix5g_boost_tune_core0); 20942 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, 20943 ci->RF_pad5g_tune_misc_pus_core0); 20944 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20945 ci->RF_lna2g_tune_core0); 20946 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, 20947 ci->RF_lna5g_tune_core0); 20948 20949 write_radio_reg(pi, 20950 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20951 ci->RF_txmix2g_tune_boost_pu_core1); 20952 write_radio_reg(pi, 20953 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20954 ci->RF_pad2g_tune_pus_core1); 20955 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, 20956 ci->RF_pga_boost_tune_core1); 20957 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, 20958 ci->RF_txmix5g_boost_tune_core1); 20959 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, 20960 ci->RF_pad5g_tune_misc_pus_core1); 20961 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20962 ci->RF_lna2g_tune_core1); 20963 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, 20964 ci->RF_lna5g_tune_core1); 20965 } 20966 20967 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 20968 20969 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20970 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20971 0x3f); 20972 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20973 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20974 0x8); 20975 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20976 0x8); 20977 } else { 20978 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20979 0x1f); 20980 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20981 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20982 0x8); 20983 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20984 0x8); 20985 } 20986 } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || 20987 (pi->pubpi.radiorev == 8)) { 20988 20989 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20990 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20991 0x1b); 20992 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); 20993 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20994 0xa); 20995 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20996 0xa); 20997 } else { 20998 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20999 0x1f); 21000 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 21001 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 21002 0x8); 21003 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 21004 0x8); 21005 } 21006 21007 } 21008 21009 if (CHSPEC_IS2G(pi->radio_chanspec)) { 21010 if (PHY_IPA(pi)) { 21011 if (pi->pubpi.radiorev == 3) 21012 txmix2g_tune_boost_pu = 0x6b; 21013 21014 if (pi->pubpi.radiorev == 5) 21015 pad2g_tune_pus = 0x73; 21016 21017 } else { 21018 if (pi->pubpi.radiorev != 5) { 21019 pad2g_tune_pus = 0x3; 21020 21021 txmix2g_tune_boost_pu = 0x61; 21022 } 21023 } 21024 21025 for (coreNum = 0; coreNum <= 1; coreNum++) { 21026 21027 if (txmix2g_tune_boost_pu != 0) 21028 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21029 TXMIX2G_TUNE_BOOST_PU, 21030 txmix2g_tune_boost_pu); 21031 21032 if (pad2g_tune_pus != 0) 21033 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21034 PAD2G_TUNE_PUS, 21035 pad2g_tune_pus); 21036 } 21037 } 21038 21039 udelay(50); 21040 21041 wlc_phy_radio205x_vcocal_nphy(pi); 21042 } 21043 21044 static void 21045 wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, u16 chanspec, 21046 const struct nphy_sfo_cfg *ci) 21047 { 21048 u16 val; 21049 21050 val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 21051 if (CHSPEC_IS5G(chanspec) && !val) { 21052 21053 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21054 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21055 (val | MAC_PHY_FORCE_CLK)); 21056 21057 or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21058 (BBCFG_RESETCCA | BBCFG_RESETRX)); 21059 21060 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21061 21062 or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); 21063 } else if (!CHSPEC_IS5G(chanspec) && val) { 21064 21065 and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); 21066 21067 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21068 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21069 (val | MAC_PHY_FORCE_CLK)); 21070 21071 and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21072 (u16) (~(BBCFG_RESETCCA | BBCFG_RESETRX))); 21073 21074 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21075 } 21076 21077 write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); 21078 write_phy_reg(pi, 0x1cf, ci->PHY_BW2); 21079 write_phy_reg(pi, 0x1d0, ci->PHY_BW3); 21080 21081 write_phy_reg(pi, 0x1d1, ci->PHY_BW4); 21082 write_phy_reg(pi, 0x1d2, ci->PHY_BW5); 21083 write_phy_reg(pi, 0x1d3, ci->PHY_BW6); 21084 21085 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 21086 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); 21087 21088 or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); 21089 } else { 21090 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 21091 NPHY_ClassifierCtrl_ofdm_en); 21092 21093 if (CHSPEC_IS2G(chanspec)) 21094 and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); 21095 } 21096 21097 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) 21098 wlc_phy_txpwr_fixpower_nphy(pi); 21099 21100 if (NREV_LT(pi->pubpi.phy_rev, 3)) 21101 wlc_phy_adjust_lnagaintbl_nphy(pi); 21102 21103 wlc_phy_txlpfbw_nphy(pi); 21104 21105 if (NREV_GE(pi->pubpi.phy_rev, 3) 21106 && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { 21107 u8 spuravoid = 0; 21108 21109 val = CHSPEC_CHANNEL(chanspec); 21110 if (!CHSPEC_IS40(pi->radio_chanspec)) { 21111 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21112 if ((val == 13) || (val == 14) || (val == 153)) 21113 spuravoid = 1; 21114 } else if (((val >= 5) && (val <= 8)) || (val == 13) 21115 || (val == 14)) { 21116 spuravoid = 1; 21117 } 21118 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21119 if (val == 54) 21120 spuravoid = 1; 21121 } else if (pi->nphy_aband_spurwar_en && 21122 ((val == 38) || (val == 102) || (val == 118))) { 21123 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) 21124 && (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 21125 spuravoid = 0; 21126 } else { 21127 spuravoid = 1; 21128 } 21129 } 21130 21131 if (pi->phy_spuravoid == SPURAVOID_FORCEON) 21132 spuravoid = 1; 21133 21134 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21135 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21136 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21137 spuravoid); 21138 } else { 21139 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); 21140 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21141 spuravoid); 21142 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); 21143 } 21144 21145 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) || 21146 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21147 if (spuravoid == 1) { 21148 bcma_write16(pi->d11core, 21149 D11REGOFFS(tsf_clk_frac_l), 21150 0x5341); 21151 bcma_write16(pi->d11core, 21152 D11REGOFFS(tsf_clk_frac_h), 0x8); 21153 } else { 21154 bcma_write16(pi->d11core, 21155 D11REGOFFS(tsf_clk_frac_l), 21156 0x8889); 21157 bcma_write16(pi->d11core, 21158 D11REGOFFS(tsf_clk_frac_h), 0x8); 21159 } 21160 } 21161 21162 if (!((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21163 (pi->sh->chip == BCMA_CHIP_ID_BCM47162))) 21164 wlapi_bmac_core_phypll_reset(pi->sh->physhim); 21165 21166 mod_phy_reg(pi, 0x01, (0x1 << 15), 21167 ((spuravoid > 0) ? (0x1 << 15) : 0)); 21168 21169 wlc_phy_resetcca_nphy(pi); 21170 21171 pi->phy_isspuravoid = (spuravoid > 0); 21172 } 21173 21174 if (NREV_LT(pi->pubpi.phy_rev, 7)) 21175 write_phy_reg(pi, 0x17e, 0x3830); 21176 21177 wlc_phy_spurwar_nphy(pi); 21178 } 21179 21180 void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec) 21181 { 21182 int freq; 21183 const struct chan_info_nphy_radio2057 *t0 = NULL; 21184 const struct chan_info_nphy_radio205x *t1 = NULL; 21185 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 21186 const struct chan_info_nphy_2055 *t3 = NULL; 21187 21188 if (!wlc_phy_chan2freq_nphy 21189 (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) 21190 return; 21191 21192 wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); 21193 21194 if (CHSPEC_BW(chanspec) != pi->bw) 21195 wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); 21196 21197 if (CHSPEC_IS40(chanspec)) { 21198 if (CHSPEC_SB_UPPER(chanspec)) { 21199 or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); 21200 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21201 or_phy_reg(pi, 0x310, PRIM_SEL_UP20); 21202 } else { 21203 and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); 21204 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21205 and_phy_reg(pi, 0x310, 21206 (~PRIM_SEL_UP20 & 0xffff)); 21207 } 21208 } 21209 21210 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21211 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21212 21213 if ((pi->pubpi.radiorev <= 4) 21214 || (pi->pubpi.radiorev == 6)) { 21215 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, 21216 0x2, 21217 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21218 : 0)); 21219 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, 21220 0x2, 21221 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21222 : 0)); 21223 } 21224 21225 wlc_phy_chanspec_radio2057_setup(pi, t0, t2); 21226 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21227 (pi->pubpi.radiorev == 5) ? 21228 (const struct nphy_sfo_cfg *)&(t2->PHY_BW1a) : 21229 (const struct nphy_sfo_cfg *)&(t0->PHY_BW1a)); 21230 21231 } else { 21232 21233 mod_radio_reg(pi, 21234 RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, 21235 0x4, 21236 (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); 21237 wlc_phy_chanspec_radio2056_setup(pi, t1); 21238 21239 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21240 (const struct nphy_sfo_cfg *) &(t1->PHY_BW1a)); 21241 } 21242 21243 } else { 21244 21245 mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, 21246 (CHSPEC_IS5G(chanspec) ? (0x02 << 4) 21247 : (0x05 << 4))); 21248 21249 wlc_phy_chanspec_radio2055_setup(pi, t3); 21250 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21251 (const struct nphy_sfo_cfg *) 21252 &(t3->PHY_BW1a)); 21253 } 21254 21255 } 21256 21257 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init) 21258 { 21259 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); 21260 u16 mask = 0xfc00; 21261 u32 mc = 0; 21262 21263 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21264 return; 21265 21266 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21267 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; 21268 21269 if (!lut_init) 21270 return; 21271 21272 if (pi->srom_fem2g.antswctrllut == 0) { 21273 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21274 1, 0x02, 16, &v0); 21275 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21276 1, 0x03, 16, &v1); 21277 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21278 1, 0x08, 16, &v2); 21279 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21280 1, 0x0C, 16, &v3); 21281 } 21282 21283 if (pi->srom_fem5g.antswctrllut == 0) { 21284 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21285 1, 0x12, 16, &v0); 21286 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21287 1, 0x13, 16, &v1); 21288 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21289 1, 0x18, 16, &v2); 21290 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21291 1, 0x1C, 16, &v3); 21292 } 21293 } else { 21294 21295 write_phy_reg(pi, 0xc8, 0x0); 21296 write_phy_reg(pi, 0xc9, 0x0); 21297 21298 bcma_chipco_gpio_control(&pi->d11core->bus->drv_cc, mask, mask); 21299 21300 mc = bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 21301 mc &= ~MCTL_GPOUT_SEL_MASK; 21302 bcma_write32(pi->d11core, D11REGOFFS(maccontrol), mc); 21303 21304 bcma_set16(pi->d11core, D11REGOFFS(psm_gpio_oe), mask); 21305 21306 bcma_mask16(pi->d11core, D11REGOFFS(psm_gpio_out), ~mask); 21307 21308 if (lut_init) { 21309 write_phy_reg(pi, 0xf8, 0x02d8); 21310 write_phy_reg(pi, 0xf9, 0x0301); 21311 write_phy_reg(pi, 0xfa, 0x02d8); 21312 write_phy_reg(pi, 0xfb, 0x0301); 21313 } 21314 } 21315 } 21316 21317 u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val) 21318 { 21319 u16 curr_ctl, new_ctl; 21320 bool suspended = false; 21321 21322 if (D11REV_IS(pi->sh->corerev, 16)) { 21323 suspended = (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 21324 MCTL_EN_MAC) ? false : true; 21325 if (!suspended) 21326 wlapi_suspend_mac_and_wait(pi->sh->physhim); 21327 } 21328 21329 curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); 21330 21331 new_ctl = (curr_ctl & (~mask)) | (val & mask); 21332 21333 mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); 21334 21335 if (D11REV_IS(pi->sh->corerev, 16) && !suspended) 21336 wlapi_enable_mac(pi->sh->physhim); 21337 21338 return new_ctl; 21339 } 21340 21341 void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd) 21342 { 21343 u16 trigger_mask, status_mask; 21344 u16 orig_RfseqCoreActv; 21345 21346 switch (cmd) { 21347 case NPHY_RFSEQ_RX2TX: 21348 trigger_mask = NPHY_RfseqTrigger_rx2tx; 21349 status_mask = NPHY_RfseqStatus_rx2tx; 21350 break; 21351 case NPHY_RFSEQ_TX2RX: 21352 trigger_mask = NPHY_RfseqTrigger_tx2rx; 21353 status_mask = NPHY_RfseqStatus_tx2rx; 21354 break; 21355 case NPHY_RFSEQ_RESET2RX: 21356 trigger_mask = NPHY_RfseqTrigger_reset2rx; 21357 status_mask = NPHY_RfseqStatus_reset2rx; 21358 break; 21359 case NPHY_RFSEQ_UPDATEGAINH: 21360 trigger_mask = NPHY_RfseqTrigger_updategainh; 21361 status_mask = NPHY_RfseqStatus_updategainh; 21362 break; 21363 case NPHY_RFSEQ_UPDATEGAINL: 21364 trigger_mask = NPHY_RfseqTrigger_updategainl; 21365 status_mask = NPHY_RfseqStatus_updategainl; 21366 break; 21367 case NPHY_RFSEQ_UPDATEGAINU: 21368 trigger_mask = NPHY_RfseqTrigger_updategainu; 21369 status_mask = NPHY_RfseqStatus_updategainu; 21370 break; 21371 default: 21372 return; 21373 } 21374 21375 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 21376 or_phy_reg(pi, 0xa1, 21377 (NPHY_RfseqMode_CoreActv_override | 21378 NPHY_RfseqMode_Trigger_override)); 21379 or_phy_reg(pi, 0xa3, trigger_mask); 21380 SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); 21381 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 21382 WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); 21383 } 21384 21385 static void 21386 wlc_phy_rfctrl_override_1tomany_nphy(struct brcms_phy *pi, u16 cmd, u16 value, 21387 u8 core_mask, u8 off) 21388 { 21389 u16 rfmxgain = 0, lpfgain = 0; 21390 u16 tgain = 0; 21391 21392 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21393 21394 switch (cmd) { 21395 case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: 21396 wlc_phy_rfctrl_override_nphy_rev7( 21397 pi, (0x1 << 5), 21398 value, core_mask, off, 21399 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21400 wlc_phy_rfctrl_override_nphy_rev7( 21401 pi, (0x1 << 4), value, 21402 core_mask, off, 21403 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21404 wlc_phy_rfctrl_override_nphy_rev7( 21405 pi, (0x1 << 3), value, 21406 core_mask, off, 21407 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21408 break; 21409 case NPHY_REV7_RfctrlOverride_cmd_rx_pu: 21410 wlc_phy_rfctrl_override_nphy_rev7( 21411 pi, (0x1 << 2), 21412 value, core_mask, off, 21413 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21414 wlc_phy_rfctrl_override_nphy_rev7( 21415 pi, (0x1 << 1), value, 21416 core_mask, off, 21417 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21418 wlc_phy_rfctrl_override_nphy_rev7( 21419 pi, (0x1 << 0), value, 21420 core_mask, off, 21421 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21422 wlc_phy_rfctrl_override_nphy_rev7( 21423 pi, (0x1 << 1), value, 21424 core_mask, off, 21425 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21426 wlc_phy_rfctrl_override_nphy_rev7( 21427 pi, (0x1 << 11), 0, 21428 core_mask, off, 21429 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21430 break; 21431 case NPHY_REV7_RfctrlOverride_cmd_tx_pu: 21432 wlc_phy_rfctrl_override_nphy_rev7( 21433 pi, (0x1 << 2), 21434 value, core_mask, off, 21435 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21436 wlc_phy_rfctrl_override_nphy_rev7( 21437 pi, (0x1 << 1), value, 21438 core_mask, off, 21439 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21440 wlc_phy_rfctrl_override_nphy_rev7( 21441 pi, (0x1 << 0), value, 21442 core_mask, off, 21443 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21444 wlc_phy_rfctrl_override_nphy_rev7( 21445 pi, (0x1 << 2), value, 21446 core_mask, off, 21447 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21448 wlc_phy_rfctrl_override_nphy_rev7( 21449 pi, (0x1 << 11), 1, 21450 core_mask, off, 21451 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21452 break; 21453 case NPHY_REV7_RfctrlOverride_cmd_rxgain: 21454 rfmxgain = value & 0x000ff; 21455 lpfgain = value & 0x0ff00; 21456 lpfgain = lpfgain >> 8; 21457 21458 wlc_phy_rfctrl_override_nphy_rev7( 21459 pi, (0x1 << 11), 21460 rfmxgain, core_mask, 21461 off, 21462 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21463 wlc_phy_rfctrl_override_nphy_rev7( 21464 pi, (0x3 << 13), 21465 lpfgain, core_mask, 21466 off, 21467 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21468 break; 21469 case NPHY_REV7_RfctrlOverride_cmd_txgain: 21470 tgain = value & 0x7fff; 21471 lpfgain = value & 0x8000; 21472 lpfgain = lpfgain >> 14; 21473 21474 wlc_phy_rfctrl_override_nphy_rev7( 21475 pi, (0x1 << 12), 21476 tgain, core_mask, off, 21477 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21478 wlc_phy_rfctrl_override_nphy_rev7( 21479 pi, (0x1 << 13), 21480 lpfgain, core_mask, 21481 off, 21482 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21483 break; 21484 } 21485 } 21486 } 21487 21488 static void 21489 wlc_phy_scale_offset_rssi_nphy(struct brcms_phy *pi, u16 scale, s8 offset, 21490 u8 coresel, u8 rail, u8 rssi_type) 21491 { 21492 u16 valuetostuff; 21493 21494 offset = (offset > NPHY_RSSICAL_MAXREAD) ? 21495 NPHY_RSSICAL_MAXREAD : offset; 21496 offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? 21497 -NPHY_RSSICAL_MAXREAD - 1 : offset; 21498 21499 valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); 21500 21501 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21502 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21503 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21504 write_phy_reg(pi, 0x1a6, valuetostuff); 21505 21506 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21507 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21508 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21509 write_phy_reg(pi, 0x1ac, valuetostuff); 21510 21511 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21512 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21513 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21514 write_phy_reg(pi, 0x1b2, valuetostuff); 21515 21516 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21517 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21518 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21519 write_phy_reg(pi, 0x1b8, valuetostuff); 21520 21521 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21522 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21523 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21524 write_phy_reg(pi, 0x1a4, valuetostuff); 21525 21526 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21527 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21528 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21529 write_phy_reg(pi, 0x1aa, valuetostuff); 21530 21531 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21532 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21533 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21534 write_phy_reg(pi, 0x1b0, valuetostuff); 21535 21536 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21537 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21538 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21539 write_phy_reg(pi, 0x1b6, valuetostuff); 21540 21541 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21542 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21543 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21544 write_phy_reg(pi, 0x1a5, valuetostuff); 21545 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21546 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21547 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21548 write_phy_reg(pi, 0x1ab, valuetostuff); 21549 21550 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21551 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21552 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21553 write_phy_reg(pi, 0x1b1, valuetostuff); 21554 21555 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21556 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21557 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21558 write_phy_reg(pi, 0x1b7, valuetostuff); 21559 21560 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21561 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21562 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21563 write_phy_reg(pi, 0x1a7, valuetostuff); 21564 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21565 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21566 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21567 write_phy_reg(pi, 0x1ad, valuetostuff); 21568 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21569 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21570 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21571 write_phy_reg(pi, 0x1b3, valuetostuff); 21572 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21573 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21574 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21575 write_phy_reg(pi, 0x1b9, valuetostuff); 21576 21577 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21578 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21579 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21580 write_phy_reg(pi, 0x1a8, valuetostuff); 21581 21582 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21583 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21584 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21585 write_phy_reg(pi, 0x1ae, valuetostuff); 21586 21587 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21588 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21589 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21590 write_phy_reg(pi, 0x1b4, valuetostuff); 21591 21592 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21593 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21594 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21595 write_phy_reg(pi, 0x1ba, valuetostuff); 21596 21597 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21598 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21599 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21600 write_phy_reg(pi, 0x1a9, valuetostuff); 21601 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21602 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21603 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21604 write_phy_reg(pi, 0x1b5, valuetostuff); 21605 21606 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21607 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21608 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21609 write_phy_reg(pi, 0x1af, valuetostuff); 21610 21611 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21612 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21613 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21614 write_phy_reg(pi, 0x1bb, valuetostuff); 21615 } 21616 21617 static void brcms_phy_wr_tx_mux(struct brcms_phy *pi, u8 core) 21618 { 21619 if (PHY_IPA(pi)) { 21620 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21621 write_radio_reg(pi, 21622 ((core == PHY_CORE_0) ? 21623 RADIO_2057_TX0_TX_SSI_MUX : 21624 RADIO_2057_TX1_TX_SSI_MUX), 21625 (CHSPEC_IS5G(pi->radio_chanspec) ? 21626 0xc : 0xe)); 21627 else 21628 write_radio_reg(pi, 21629 RADIO_2056_TX_TX_SSI_MUX | 21630 ((core == PHY_CORE_0) ? 21631 RADIO_2056_TX0 : RADIO_2056_TX1), 21632 (CHSPEC_IS5G(pi->radio_chanspec) ? 21633 0xc : 0xe)); 21634 } else { 21635 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21636 write_radio_reg(pi, 21637 ((core == PHY_CORE_0) ? 21638 RADIO_2057_TX0_TX_SSI_MUX : 21639 RADIO_2057_TX1_TX_SSI_MUX), 21640 0x11); 21641 21642 if (pi->pubpi.radioid == BCM2057_ID) 21643 write_radio_reg(pi, 21644 RADIO_2057_IQTEST_SEL_PU, 0x1); 21645 21646 } else { 21647 write_radio_reg(pi, 21648 RADIO_2056_TX_TX_SSI_MUX | 21649 ((core == PHY_CORE_0) ? 21650 RADIO_2056_TX0 : RADIO_2056_TX1), 21651 0x11); 21652 } 21653 } 21654 } 21655 21656 void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core_code, u8 rssi_type) 21657 { 21658 u16 mask, val; 21659 u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, 21660 startseq; 21661 u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, 21662 rfctrlovr_trigger_val; 21663 u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; 21664 u16 rfctrlcmd_val, rfctrlovr_val; 21665 u8 core; 21666 21667 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21668 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21669 mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); 21670 mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); 21671 21672 mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); 21673 mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); 21674 21675 mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); 21676 mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); 21677 21678 mask = (0x1 << 2) | 21679 (0x1 << 3) | (0x1 << 4) | (0x1 << 5); 21680 mod_phy_reg(pi, 0xf9, mask, 0); 21681 mod_phy_reg(pi, 0xfb, mask, 0); 21682 21683 } else { 21684 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 21685 if (core_code == RADIO_MIMO_CORESEL_CORE1 21686 && core == PHY_CORE_1) 21687 continue; 21688 else if (core_code == RADIO_MIMO_CORESEL_CORE2 21689 && core == PHY_CORE_0) 21690 continue; 21691 21692 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21693 0x8f : 0xa5, (0x1 << 9), 1 << 9); 21694 21695 if (rssi_type == NPHY_RSSI_SEL_W1 || 21696 rssi_type == NPHY_RSSI_SEL_W2 || 21697 rssi_type == NPHY_RSSI_SEL_NB) { 21698 mod_phy_reg(pi, 21699 (core == 21700 PHY_CORE_0) ? 0xa6 : 0xa7, 21701 (0x3 << 8), 0); 21702 21703 mask = (0x1 << 2) | 21704 (0x1 << 3) | 21705 (0x1 << 4) | (0x1 << 5); 21706 mod_phy_reg(pi, 21707 (core == 21708 PHY_CORE_0) ? 0xf9 : 0xfb, 21709 mask, 0); 21710 21711 if (rssi_type == NPHY_RSSI_SEL_W1) { 21712 if (CHSPEC_IS5G( 21713 pi->radio_chanspec)) { 21714 mask = (0x1 << 2); 21715 val = 1 << 2; 21716 } else { 21717 mask = (0x1 << 3); 21718 val = 1 << 3; 21719 } 21720 } else if (rssi_type == 21721 NPHY_RSSI_SEL_W2) { 21722 mask = (0x1 << 4); 21723 val = 1 << 4; 21724 } else { 21725 mask = (0x1 << 5); 21726 val = 1 << 5; 21727 } 21728 mod_phy_reg(pi, 21729 (core == 21730 PHY_CORE_0) ? 0xf9 : 0xfb, 21731 mask, val); 21732 21733 mask = (0x1 << 5); 21734 val = 1 << 5; 21735 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21736 0xe5 : 0xe6, mask, val); 21737 } else { 21738 if (rssi_type == NPHY_RSSI_SEL_TBD) { 21739 mask = (0x3 << 8); 21740 val = 1 << 8; 21741 mod_phy_reg(pi, 21742 (core == 21743 PHY_CORE_0) ? 0xa6 21744 : 0xa7, mask, val); 21745 mask = (0x3 << 10); 21746 val = 1 << 10; 21747 mod_phy_reg(pi, 21748 (core == 21749 PHY_CORE_0) ? 0xa6 21750 : 0xa7, mask, val); 21751 } else if (rssi_type == 21752 NPHY_RSSI_SEL_IQ) { 21753 mask = (0x3 << 8); 21754 val = 2 << 8; 21755 mod_phy_reg(pi, 21756 (core == 21757 PHY_CORE_0) ? 0xa6 21758 : 0xa7, mask, val); 21759 mask = (0x3 << 10); 21760 val = 2 << 10; 21761 mod_phy_reg(pi, 21762 (core == 21763 PHY_CORE_0) ? 0xa6 21764 : 0xa7, mask, val); 21765 } else { 21766 mask = (0x3 << 8); 21767 val = 3 << 8; 21768 mod_phy_reg(pi, 21769 (core == 21770 PHY_CORE_0) ? 0xa6 21771 : 0xa7, mask, val); 21772 mask = (0x3 << 10); 21773 val = 3 << 10; 21774 mod_phy_reg(pi, 21775 (core == 21776 PHY_CORE_0) ? 0xa6 21777 : 0xa7, mask, val); 21778 brcms_phy_wr_tx_mux(pi, core); 21779 afectrlovr_rssi_val = 1 << 9; 21780 mod_phy_reg(pi, 21781 (core == 21782 PHY_CORE_0) ? 0x8f 21783 : 0xa5, (0x1 << 9), 21784 afectrlovr_rssi_val); 21785 } 21786 } 21787 } 21788 } 21789 } else { 21790 21791 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21792 (rssi_type == NPHY_RSSI_SEL_W2) || 21793 (rssi_type == NPHY_RSSI_SEL_NB)) 21794 val = 0x0; 21795 else if (rssi_type == NPHY_RSSI_SEL_TBD) 21796 val = 0x1; 21797 else if (rssi_type == NPHY_RSSI_SEL_IQ) 21798 val = 0x2; 21799 else 21800 val = 0x3; 21801 21802 mask = ((0x3 << 12) | (0x3 << 14)); 21803 val = (val << 12) | (val << 14); 21804 mod_phy_reg(pi, 0xa6, mask, val); 21805 mod_phy_reg(pi, 0xa7, mask, val); 21806 21807 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21808 (rssi_type == NPHY_RSSI_SEL_W2) || 21809 (rssi_type == NPHY_RSSI_SEL_NB)) { 21810 if (rssi_type == NPHY_RSSI_SEL_W1) 21811 val = 0x1; 21812 if (rssi_type == NPHY_RSSI_SEL_W2) 21813 val = 0x2; 21814 if (rssi_type == NPHY_RSSI_SEL_NB) 21815 val = 0x3; 21816 21817 mask = (0x3 << 4); 21818 val = (val << 4); 21819 mod_phy_reg(pi, 0x7a, mask, val); 21820 mod_phy_reg(pi, 0x7d, mask, val); 21821 } 21822 21823 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21824 afectrlovr_rssi_val = 0; 21825 rfctrlcmd_rxen_val = 0; 21826 rfctrlcmd_coresel_val = 0; 21827 rfctrlovr_rssi_val = 0; 21828 rfctrlovr_rxen_val = 0; 21829 rfctrlovr_coresel_val = 0; 21830 rfctrlovr_trigger_val = 0; 21831 startseq = 0; 21832 } else { 21833 afectrlovr_rssi_val = 1; 21834 rfctrlcmd_rxen_val = 1; 21835 rfctrlcmd_coresel_val = core_code; 21836 rfctrlovr_rssi_val = 1; 21837 rfctrlovr_rxen_val = 1; 21838 rfctrlovr_coresel_val = 1; 21839 rfctrlovr_trigger_val = 1; 21840 startseq = 1; 21841 } 21842 21843 afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); 21844 afectrlovr_rssi_val = (afectrlovr_rssi_val << 21845 12) | (afectrlovr_rssi_val << 13); 21846 mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, 21847 afectrlovr_rssi_val); 21848 21849 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21850 (rssi_type == NPHY_RSSI_SEL_W2) || 21851 (rssi_type == NPHY_RSSI_SEL_NB)) { 21852 rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); 21853 rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | 21854 (rfctrlcmd_coresel_val << 3); 21855 21856 rfctrlovr_mask = ((0x1 << 5) | 21857 (0x1 << 12) | 21858 (0x1 << 1) | (0x1 << 0)); 21859 rfctrlovr_val = (rfctrlovr_rssi_val << 21860 5) | 21861 (rfctrlovr_rxen_val << 12) | 21862 (rfctrlovr_coresel_val << 1) | 21863 (rfctrlovr_trigger_val << 0); 21864 21865 mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); 21866 mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); 21867 21868 mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); 21869 udelay(20); 21870 21871 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 21872 } 21873 } 21874 } 21875 21876 int 21877 wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, 21878 u8 nsamps) 21879 { 21880 s16 rssi0, rssi1; 21881 u16 afectrlCore1_save = 0; 21882 u16 afectrlCore2_save = 0; 21883 u16 afectrlOverride1_save = 0; 21884 u16 afectrlOverride2_save = 0; 21885 u16 rfctrlOverrideAux0_save = 0; 21886 u16 rfctrlOverrideAux1_save = 0; 21887 u16 rfctrlMiscReg1_save = 0; 21888 u16 rfctrlMiscReg2_save = 0; 21889 u16 rfctrlcmd_save = 0; 21890 u16 rfctrloverride_save = 0; 21891 u16 rfctrlrssiothers1_save = 0; 21892 u16 rfctrlrssiothers2_save = 0; 21893 s8 tmp_buf[4]; 21894 u8 ctr = 0, samp = 0; 21895 s32 rssi_out_val; 21896 u16 gpiosel_orig; 21897 21898 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21899 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21900 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21901 rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 21902 rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 21903 afectrlOverride1_save = read_phy_reg(pi, 0x8f); 21904 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21905 rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 21906 rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 21907 } else { 21908 afectrlOverride1_save = read_phy_reg(pi, 0xa5); 21909 rfctrlcmd_save = read_phy_reg(pi, 0x78); 21910 rfctrloverride_save = read_phy_reg(pi, 0xec); 21911 rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); 21912 rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); 21913 } 21914 21915 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 21916 21917 gpiosel_orig = read_phy_reg(pi, 0xca); 21918 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21919 write_phy_reg(pi, 0xca, 5); 21920 21921 for (ctr = 0; ctr < 4; ctr++) 21922 rssi_buf[ctr] = 0; 21923 21924 for (samp = 0; samp < nsamps; samp++) { 21925 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 21926 rssi0 = read_phy_reg(pi, 0x1c9); 21927 rssi1 = read_phy_reg(pi, 0x1ca); 21928 } else { 21929 rssi0 = read_phy_reg(pi, 0x219); 21930 rssi1 = read_phy_reg(pi, 0x21a); 21931 } 21932 21933 ctr = 0; 21934 tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; 21935 tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; 21936 tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; 21937 tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; 21938 21939 for (ctr = 0; ctr < 4; ctr++) 21940 rssi_buf[ctr] += tmp_buf[ctr]; 21941 21942 } 21943 21944 rssi_out_val = rssi_buf[3] & 0xff; 21945 rssi_out_val |= (rssi_buf[2] & 0xff) << 8; 21946 rssi_out_val |= (rssi_buf[1] & 0xff) << 16; 21947 rssi_out_val |= (rssi_buf[0] & 0xff) << 24; 21948 21949 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21950 write_phy_reg(pi, 0xca, gpiosel_orig); 21951 21952 write_phy_reg(pi, 0xa6, afectrlCore1_save); 21953 write_phy_reg(pi, 0xa7, afectrlCore2_save); 21954 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21955 write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); 21956 write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); 21957 write_phy_reg(pi, 0x8f, afectrlOverride1_save); 21958 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 21959 write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); 21960 write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); 21961 } else { 21962 write_phy_reg(pi, 0xa5, afectrlOverride1_save); 21963 write_phy_reg(pi, 0x78, rfctrlcmd_save); 21964 write_phy_reg(pi, 0xec, rfctrloverride_save); 21965 write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); 21966 write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); 21967 } 21968 21969 return rssi_out_val; 21970 } 21971 21972 s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi) 21973 { 21974 u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; 21975 u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; 21976 u16 pwrdet_rxtx_core1_save; 21977 u16 pwrdet_rxtx_core2_save; 21978 u16 afectrlCore1_save; 21979 u16 afectrlCore2_save; 21980 u16 afectrlOverride_save; 21981 u16 afectrlOverride2_save; 21982 u16 pd_pll_ts_save; 21983 u16 gpioSel_save; 21984 s32 radio_temp[4]; 21985 s32 radio_temp2[4]; 21986 u16 syn_tempprocsense_save; 21987 s16 offset = 0; 21988 21989 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21990 u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; 21991 u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; 21992 u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; 21993 s32 auxADC_Vl; 21994 u16 RfctrlOverride5_save, RfctrlOverride6_save; 21995 u16 RfctrlMiscReg5_save, RfctrlMiscReg6_save; 21996 u16 RSSIMultCoef0QPowerDet_save; 21997 u16 tempsense_Rcal; 21998 21999 syn_tempprocsense_save = 22000 read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); 22001 22002 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22003 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22004 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22005 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22006 RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); 22007 RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22008 RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22009 RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22010 RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22011 22012 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22013 &auxADC_Vmid_save); 22014 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22015 &auxADC_Av_save); 22016 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22017 &auxADC_rssi_ctrlL_save); 22018 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22019 &auxADC_rssi_ctrlH_save); 22020 22021 write_phy_reg(pi, 0x1ae, 0x0); 22022 22023 auxADC_rssi_ctrlL = 0x0; 22024 auxADC_rssi_ctrlH = 0x20; 22025 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22026 &auxADC_rssi_ctrlL); 22027 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22028 &auxADC_rssi_ctrlH); 22029 22030 tempsense_Rcal = syn_tempprocsense_save & 0x1c; 22031 22032 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22033 tempsense_Rcal | 0x01); 22034 22035 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 22036 1, 0, 0, 22037 NPHY_REV7_RFCTRLOVERRIDE_ID2); 22038 mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); 22039 mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); 22040 mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); 22041 mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); 22042 22043 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 22044 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 22045 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 22046 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 22047 udelay(5); 22048 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 22049 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 22050 mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); 22051 mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); 22052 mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); 22053 mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); 22054 mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); 22055 mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); 22056 mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); 22057 mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); 22058 22059 auxADC_Vmid = 0xA3; 22060 auxADC_Av = 0x0; 22061 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22062 &auxADC_Vmid); 22063 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22064 &auxADC_Av); 22065 22066 udelay(3); 22067 22068 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22069 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22070 tempsense_Rcal | 0x03); 22071 22072 udelay(5); 22073 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22074 22075 auxADC_Av = 0x7; 22076 if (radio_temp[1] + radio_temp2[1] < -30) { 22077 auxADC_Vmid = 0x45; 22078 auxADC_Vl = 263; 22079 } else if (radio_temp[1] + radio_temp2[1] < -9) { 22080 auxADC_Vmid = 0x200; 22081 auxADC_Vl = 467; 22082 } else if (radio_temp[1] + radio_temp2[1] < 11) { 22083 auxADC_Vmid = 0x266; 22084 auxADC_Vl = 634; 22085 } else { 22086 auxADC_Vmid = 0x2D5; 22087 auxADC_Vl = 816; 22088 } 22089 22090 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22091 &auxADC_Vmid); 22092 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22093 &auxADC_Av); 22094 22095 udelay(3); 22096 22097 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22098 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22099 tempsense_Rcal | 0x01); 22100 22101 udelay(5); 22102 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22103 22104 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22105 syn_tempprocsense_save); 22106 22107 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22108 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22109 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22110 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22111 write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); 22112 write_phy_reg(pi, 0x346, RfctrlOverride5_save); 22113 write_phy_reg(pi, 0x347, RfctrlOverride6_save); 22114 write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); 22115 write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); 22116 22117 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22118 &auxADC_Vmid_save); 22119 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22120 &auxADC_Av_save); 22121 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22122 &auxADC_rssi_ctrlL_save); 22123 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22124 &auxADC_rssi_ctrlH_save); 22125 22126 if (pi->sh->chip == BCMA_CHIP_ID_BCM5357) { 22127 radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) 22128 + 88 * (auxADC_Vl) - 27111 + 22129 128) / 256; 22130 } else { 22131 radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) 22132 + 82 * (auxADC_Vl) - 28861 + 22133 128) / 256; 22134 } 22135 22136 offset = (s16) pi->phy_tempsense_offset; 22137 22138 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22139 syn_tempprocsense_save = 22140 read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); 22141 22142 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22143 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22144 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22145 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22146 gpioSel_save = read_phy_reg(pi, 0xca); 22147 22148 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22149 22150 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22151 if (NREV_LT(pi->pubpi.phy_rev, 7)) 22152 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); 22153 22154 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22155 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22156 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); 22157 else 22158 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22159 22160 radio_temp[0] = 22161 (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; 22162 22163 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 22164 syn_tempprocsense_save); 22165 22166 write_phy_reg(pi, 0xca, gpioSel_save); 22167 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22168 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22169 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22170 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22171 22172 offset = (s16) pi->phy_tempsense_offset; 22173 } else { 22174 22175 pwrdet_rxtx_core1_save = 22176 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 22177 pwrdet_rxtx_core2_save = 22178 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 22179 core1_txrf_iqcal1_save = 22180 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 22181 core1_txrf_iqcal2_save = 22182 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 22183 core2_txrf_iqcal1_save = 22184 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 22185 core2_txrf_iqcal2_save = 22186 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 22187 pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); 22188 22189 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22190 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22191 afectrlOverride_save = read_phy_reg(pi, 0xa5); 22192 gpioSel_save = read_phy_reg(pi, 0xca); 22193 22194 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); 22195 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); 22196 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); 22197 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); 22198 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 22199 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 22200 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); 22201 22202 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22203 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22204 22205 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22206 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22207 22208 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22209 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22210 22211 radio_temp[0] = (radio_temp[0] + radio_temp2[0]); 22212 radio_temp[1] = (radio_temp[1] + radio_temp2[1]); 22213 radio_temp[2] = (radio_temp[2] + radio_temp2[2]); 22214 radio_temp[3] = (radio_temp[3] + radio_temp2[3]); 22215 22216 radio_temp[0] = 22217 (radio_temp[0] + radio_temp[1] + radio_temp[2] + 22218 radio_temp[3]); 22219 22220 radio_temp[0] = 22221 (radio_temp[0] + 22222 (8 * 32)) * (950 - 350) / 63 + (350 * 8); 22223 22224 radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; 22225 22226 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 22227 pwrdet_rxtx_core1_save); 22228 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 22229 pwrdet_rxtx_core2_save); 22230 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 22231 core1_txrf_iqcal1_save); 22232 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 22233 core2_txrf_iqcal1_save); 22234 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 22235 core1_txrf_iqcal2_save); 22236 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 22237 core2_txrf_iqcal2_save); 22238 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); 22239 22240 write_phy_reg(pi, 0xca, gpioSel_save); 22241 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22242 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22243 write_phy_reg(pi, 0xa5, afectrlOverride_save); 22244 } 22245 22246 return (s16) radio_temp[0] + offset; 22247 } 22248 22249 static void 22250 wlc_phy_set_rssi_2055_vcm(struct brcms_phy *pi, u8 rssi_type, u8 *vcm_buf) 22251 { 22252 u8 core; 22253 22254 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22255 if (rssi_type == NPHY_RSSI_SEL_NB) { 22256 if (core == PHY_CORE_0) { 22257 mod_radio_reg(pi, 22258 RADIO_2055_CORE1_B0_NBRSSI_VCM, 22259 RADIO_2055_NBRSSI_VCM_I_MASK, 22260 vcm_buf[2 * 22261 core] << 22262 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22263 mod_radio_reg(pi, 22264 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22265 RADIO_2055_NBRSSI_VCM_Q_MASK, 22266 vcm_buf[2 * core + 22267 1] << 22268 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22269 } else { 22270 mod_radio_reg(pi, 22271 RADIO_2055_CORE2_B0_NBRSSI_VCM, 22272 RADIO_2055_NBRSSI_VCM_I_MASK, 22273 vcm_buf[2 * 22274 core] << 22275 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22276 mod_radio_reg(pi, 22277 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22278 RADIO_2055_NBRSSI_VCM_Q_MASK, 22279 vcm_buf[2 * core + 22280 1] << 22281 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22282 } 22283 } else { 22284 if (core == PHY_CORE_0) 22285 mod_radio_reg(pi, 22286 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22287 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22288 vcm_buf[2 * 22289 core] << 22290 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22291 else 22292 mod_radio_reg(pi, 22293 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22294 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22295 vcm_buf[2 * 22296 core] << 22297 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22298 } 22299 } 22300 } 22301 22302 static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi) 22303 { 22304 u16 classif_state; 22305 u16 clip_state[2]; 22306 u16 clip_off[] = { 0xffff, 0xffff }; 22307 s32 target_code; 22308 u8 vcm, min_vcm; 22309 u8 vcm_final = 0; 22310 u8 result_idx; 22311 s32 poll_results[8][4] = { 22312 {0, 0, 0, 0}, 22313 {0, 0, 0, 0}, 22314 {0, 0, 0, 0}, 22315 {0, 0, 0, 0}, 22316 {0, 0, 0, 0}, 22317 {0, 0, 0, 0}, 22318 {0, 0, 0, 0}, 22319 {0, 0, 0, 0} 22320 }; 22321 s32 poll_result_core[4] = { 0, 0, 0, 0 }; 22322 s32 min_d = NPHY_RSSICAL_MAXD, curr_d; 22323 s32 fine_digital_offset[4]; 22324 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22325 s32 min_poll; 22326 u8 vcm_level_max; 22327 u8 core; 22328 u8 wb_cnt; 22329 u8 rssi_type; 22330 u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; 22331 u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; 22332 u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; 22333 u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; 22334 u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; 22335 u16 NPHY_RfctrlCmd_save; 22336 u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; 22337 u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; 22338 u8 rxcore_state; 22339 u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; 22340 u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; 22341 u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; 22342 u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; 22343 22344 NPHY_REV7_RfctrlOverride3_save = 22345 NPHY_REV7_RfctrlOverride4_save = 22346 NPHY_REV7_RfctrlOverride5_save = 22347 NPHY_REV7_RfctrlOverride6_save = 22348 NPHY_REV7_RfctrlMiscReg3_save = 22349 NPHY_REV7_RfctrlMiscReg4_save = 22350 NPHY_REV7_RfctrlMiscReg5_save = 22351 NPHY_REV7_RfctrlMiscReg6_save = 0; 22352 22353 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22354 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22355 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22356 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22357 22358 NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); 22359 NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); 22360 NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); 22361 NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); 22362 NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); 22363 NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); 22364 NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); 22365 NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); 22366 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22367 NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); 22368 NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); 22369 NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22370 NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22371 } 22372 NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 22373 NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 22374 NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); 22375 NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 22376 NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 22377 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22378 NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); 22379 NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); 22380 NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22381 NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22382 } 22383 NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); 22384 NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); 22385 22386 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, 22387 RADIO_MIMO_CORESEL_ALLRXTX); 22388 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, 22389 RADIO_MIMO_CORESEL_ALLRXTX); 22390 22391 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22392 wlc_phy_rfctrl_override_1tomany_nphy( 22393 pi, 22394 NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, 22395 0, 0, 0); 22396 else 22397 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); 22398 22399 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22400 wlc_phy_rfctrl_override_1tomany_nphy( 22401 pi, 22402 NPHY_REV7_RfctrlOverride_cmd_rx_pu, 22403 1, 0, 0); 22404 else 22405 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); 22406 22407 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22408 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 22409 1, 0, 0, 22410 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22411 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, 22412 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22413 } else { 22414 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); 22415 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); 22416 } 22417 22418 if (CHSPEC_IS5G(pi->radio_chanspec)) { 22419 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22420 wlc_phy_rfctrl_override_nphy_rev7( 22421 pi, (0x1 << 5), 22422 0, 0, 0, 22423 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22424 wlc_phy_rfctrl_override_nphy_rev7( 22425 pi, (0x1 << 4), 1, 0, 22426 0, 22427 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22428 } else { 22429 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); 22430 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); 22431 } 22432 22433 } else { 22434 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22435 wlc_phy_rfctrl_override_nphy_rev7( 22436 pi, (0x1 << 4), 22437 0, 0, 0, 22438 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22439 wlc_phy_rfctrl_override_nphy_rev7( 22440 pi, (0x1 << 5), 1, 0, 22441 0, 22442 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22443 } else { 22444 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); 22445 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); 22446 } 22447 } 22448 22449 rxcore_state = wlc_phy_rxcore_getstate_nphy( 22450 (struct brcms_phy_pub *) pi); 22451 22452 vcm_level_max = 8; 22453 22454 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22455 22456 if ((rxcore_state & (1 << core)) == 0) 22457 continue; 22458 22459 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22460 core == 22461 PHY_CORE_0 ? 22462 RADIO_MIMO_CORESEL_CORE1 : 22463 RADIO_MIMO_CORESEL_CORE2, 22464 NPHY_RAIL_I, NPHY_RSSI_SEL_NB); 22465 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22466 core == 22467 PHY_CORE_0 ? 22468 RADIO_MIMO_CORESEL_CORE1 : 22469 RADIO_MIMO_CORESEL_CORE2, 22470 NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); 22471 22472 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22473 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22474 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22475 RADIO_2057_NB_MASTER_CORE0 : 22476 RADIO_2057_NB_MASTER_CORE1, 22477 RADIO_2057_VCM_MASK, vcm); 22478 else 22479 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22480 ((core == 22481 PHY_CORE_0) ? RADIO_2056_RX0 : 22482 RADIO_2056_RX1), 22483 RADIO_2056_VCM_MASK, 22484 vcm << RADIO_2056_RSSI_VCM_SHIFT); 22485 22486 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, 22487 &poll_results[vcm][0], 22488 NPHY_RSSICAL_NPOLL); 22489 } 22490 22491 for (result_idx = 0; result_idx < 4; result_idx++) { 22492 if ((core == result_idx / 2) && 22493 (result_idx % 2 == 0)) { 22494 22495 min_d = NPHY_RSSICAL_MAXD; 22496 min_vcm = 0; 22497 min_poll = 22498 NPHY_RSSICAL_MAXREAD * 22499 NPHY_RSSICAL_NPOLL + 1; 22500 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22501 curr_d = 22502 poll_results[vcm][result_idx] * 22503 poll_results[vcm][result_idx] + 22504 poll_results[vcm][result_idx + 22505 1] * 22506 poll_results[vcm][result_idx + 22507 1]; 22508 if (curr_d < min_d) { 22509 min_d = curr_d; 22510 min_vcm = vcm; 22511 } 22512 if (poll_results[vcm][result_idx] < 22513 min_poll) 22514 min_poll = 22515 poll_results[vcm] 22516 [result_idx]; 22517 } 22518 vcm_final = min_vcm; 22519 poll_results_min[result_idx] = min_poll; 22520 } 22521 } 22522 22523 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22524 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22525 RADIO_2057_NB_MASTER_CORE0 : 22526 RADIO_2057_NB_MASTER_CORE1, 22527 RADIO_2057_VCM_MASK, vcm_final); 22528 else 22529 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22530 ((core == 22531 PHY_CORE_0) ? RADIO_2056_RX0 : 22532 RADIO_2056_RX1), RADIO_2056_VCM_MASK, 22533 vcm_final << RADIO_2056_RSSI_VCM_SHIFT); 22534 22535 for (result_idx = 0; result_idx < 4; result_idx++) { 22536 if (core == result_idx / 2) { 22537 fine_digital_offset[result_idx] = 22538 (NPHY_RSSICAL_NB_TARGET * 22539 NPHY_RSSICAL_NPOLL) - 22540 poll_results[vcm_final][result_idx]; 22541 if (fine_digital_offset[result_idx] < 0) { 22542 fine_digital_offset[result_idx] = 22543 abs(fine_digital_offset 22544 [result_idx]); 22545 fine_digital_offset[result_idx] += 22546 (NPHY_RSSICAL_NPOLL / 2); 22547 fine_digital_offset[result_idx] /= 22548 NPHY_RSSICAL_NPOLL; 22549 fine_digital_offset[result_idx] = 22550 -fine_digital_offset[ 22551 result_idx]; 22552 } else { 22553 fine_digital_offset[result_idx] += 22554 (NPHY_RSSICAL_NPOLL / 2); 22555 fine_digital_offset[result_idx] /= 22556 NPHY_RSSICAL_NPOLL; 22557 } 22558 22559 if (poll_results_min[result_idx] == 22560 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22561 fine_digital_offset[result_idx] = 22562 (NPHY_RSSICAL_NB_TARGET - 22563 NPHY_RSSICAL_MAXREAD - 1); 22564 22565 wlc_phy_scale_offset_rssi_nphy( 22566 pi, 0x0, 22567 (s8) 22568 fine_digital_offset 22569 [result_idx], 22570 (result_idx / 2 == 0) ? 22571 RADIO_MIMO_CORESEL_CORE1 : 22572 RADIO_MIMO_CORESEL_CORE2, 22573 (result_idx % 2 == 0) ? 22574 NPHY_RAIL_I : NPHY_RAIL_Q, 22575 NPHY_RSSI_SEL_NB); 22576 } 22577 } 22578 22579 } 22580 22581 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22582 22583 if ((rxcore_state & (1 << core)) == 0) 22584 continue; 22585 22586 for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { 22587 if (wb_cnt == 0) { 22588 rssi_type = NPHY_RSSI_SEL_W1; 22589 target_code = NPHY_RSSICAL_W1_TARGET_REV3; 22590 } else { 22591 rssi_type = NPHY_RSSI_SEL_W2; 22592 target_code = NPHY_RSSICAL_W2_TARGET_REV3; 22593 } 22594 22595 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22596 core == 22597 PHY_CORE_0 ? 22598 RADIO_MIMO_CORESEL_CORE1 22599 : 22600 RADIO_MIMO_CORESEL_CORE2, 22601 NPHY_RAIL_I, rssi_type); 22602 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22603 core == 22604 PHY_CORE_0 ? 22605 RADIO_MIMO_CORESEL_CORE1 22606 : 22607 RADIO_MIMO_CORESEL_CORE2, 22608 NPHY_RAIL_Q, rssi_type); 22609 22610 wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, 22611 NPHY_RSSICAL_NPOLL); 22612 22613 for (result_idx = 0; result_idx < 4; result_idx++) { 22614 if (core == result_idx / 2) { 22615 fine_digital_offset[result_idx] = 22616 (target_code * 22617 NPHY_RSSICAL_NPOLL) - 22618 poll_result_core[result_idx]; 22619 if (fine_digital_offset[result_idx] < 22620 0) { 22621 fine_digital_offset[result_idx] 22622 = abs( 22623 fine_digital_offset 22624 [result_idx]); 22625 fine_digital_offset[result_idx] 22626 += (NPHY_RSSICAL_NPOLL 22627 / 2); 22628 fine_digital_offset[result_idx] 22629 /= NPHY_RSSICAL_NPOLL; 22630 fine_digital_offset[result_idx] 22631 = -fine_digital_offset 22632 [result_idx]; 22633 } else { 22634 fine_digital_offset[result_idx] 22635 += (NPHY_RSSICAL_NPOLL 22636 / 2); 22637 fine_digital_offset[result_idx] 22638 /= NPHY_RSSICAL_NPOLL; 22639 } 22640 22641 wlc_phy_scale_offset_rssi_nphy( 22642 pi, 0x0, 22643 (s8) 22644 fine_digital_offset 22645 [core * 22646 2], 22647 (core == PHY_CORE_0) ? 22648 RADIO_MIMO_CORESEL_CORE1 : 22649 RADIO_MIMO_CORESEL_CORE2, 22650 (result_idx % 2 == 0) ? 22651 NPHY_RAIL_I : 22652 NPHY_RAIL_Q, 22653 rssi_type); 22654 } 22655 } 22656 22657 } 22658 } 22659 22660 write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); 22661 write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); 22662 22663 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 22664 22665 mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); 22666 mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); 22667 mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); 22668 22669 mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); 22670 mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); 22671 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 22672 22673 write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); 22674 write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); 22675 write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); 22676 write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); 22677 write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); 22678 write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); 22679 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22680 write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); 22681 write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); 22682 write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); 22683 write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); 22684 } 22685 write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); 22686 write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); 22687 write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); 22688 write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); 22689 write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); 22690 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22691 write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); 22692 write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); 22693 write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); 22694 write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); 22695 } 22696 write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); 22697 write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); 22698 22699 if (CHSPEC_IS2G(pi->radio_chanspec)) { 22700 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22701 pi->rssical_cache.rssical_radio_regs_2G[0] = 22702 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22703 pi->rssical_cache.rssical_radio_regs_2G[1] = 22704 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22705 } else { 22706 pi->rssical_cache.rssical_radio_regs_2G[0] = 22707 read_radio_reg(pi, 22708 RADIO_2056_RX_RSSI_MISC | 22709 RADIO_2056_RX0); 22710 pi->rssical_cache.rssical_radio_regs_2G[1] = 22711 read_radio_reg(pi, 22712 RADIO_2056_RX_RSSI_MISC | 22713 RADIO_2056_RX1); 22714 } 22715 22716 pi->rssical_cache.rssical_phyregs_2G[0] = 22717 read_phy_reg(pi, 0x1a6); 22718 pi->rssical_cache.rssical_phyregs_2G[1] = 22719 read_phy_reg(pi, 0x1ac); 22720 pi->rssical_cache.rssical_phyregs_2G[2] = 22721 read_phy_reg(pi, 0x1b2); 22722 pi->rssical_cache.rssical_phyregs_2G[3] = 22723 read_phy_reg(pi, 0x1b8); 22724 pi->rssical_cache.rssical_phyregs_2G[4] = 22725 read_phy_reg(pi, 0x1a4); 22726 pi->rssical_cache.rssical_phyregs_2G[5] = 22727 read_phy_reg(pi, 0x1aa); 22728 pi->rssical_cache.rssical_phyregs_2G[6] = 22729 read_phy_reg(pi, 0x1b0); 22730 pi->rssical_cache.rssical_phyregs_2G[7] = 22731 read_phy_reg(pi, 0x1b6); 22732 pi->rssical_cache.rssical_phyregs_2G[8] = 22733 read_phy_reg(pi, 0x1a5); 22734 pi->rssical_cache.rssical_phyregs_2G[9] = 22735 read_phy_reg(pi, 0x1ab); 22736 pi->rssical_cache.rssical_phyregs_2G[10] = 22737 read_phy_reg(pi, 0x1b1); 22738 pi->rssical_cache.rssical_phyregs_2G[11] = 22739 read_phy_reg(pi, 0x1b7); 22740 22741 pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; 22742 } else { 22743 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22744 pi->rssical_cache.rssical_radio_regs_5G[0] = 22745 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22746 pi->rssical_cache.rssical_radio_regs_5G[1] = 22747 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22748 } else { 22749 pi->rssical_cache.rssical_radio_regs_5G[0] = 22750 read_radio_reg(pi, 22751 RADIO_2056_RX_RSSI_MISC | 22752 RADIO_2056_RX0); 22753 pi->rssical_cache.rssical_radio_regs_5G[1] = 22754 read_radio_reg(pi, 22755 RADIO_2056_RX_RSSI_MISC | 22756 RADIO_2056_RX1); 22757 } 22758 22759 pi->rssical_cache.rssical_phyregs_5G[0] = 22760 read_phy_reg(pi, 0x1a6); 22761 pi->rssical_cache.rssical_phyregs_5G[1] = 22762 read_phy_reg(pi, 0x1ac); 22763 pi->rssical_cache.rssical_phyregs_5G[2] = 22764 read_phy_reg(pi, 0x1b2); 22765 pi->rssical_cache.rssical_phyregs_5G[3] = 22766 read_phy_reg(pi, 0x1b8); 22767 pi->rssical_cache.rssical_phyregs_5G[4] = 22768 read_phy_reg(pi, 0x1a4); 22769 pi->rssical_cache.rssical_phyregs_5G[5] = 22770 read_phy_reg(pi, 0x1aa); 22771 pi->rssical_cache.rssical_phyregs_5G[6] = 22772 read_phy_reg(pi, 0x1b0); 22773 pi->rssical_cache.rssical_phyregs_5G[7] = 22774 read_phy_reg(pi, 0x1b6); 22775 pi->rssical_cache.rssical_phyregs_5G[8] = 22776 read_phy_reg(pi, 0x1a5); 22777 pi->rssical_cache.rssical_phyregs_5G[9] = 22778 read_phy_reg(pi, 0x1ab); 22779 pi->rssical_cache.rssical_phyregs_5G[10] = 22780 read_phy_reg(pi, 0x1b1); 22781 pi->rssical_cache.rssical_phyregs_5G[11] = 22782 read_phy_reg(pi, 0x1b7); 22783 22784 pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; 22785 } 22786 22787 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22788 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22789 } 22790 22791 static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type) 22792 { 22793 s32 target_code; 22794 u16 classif_state; 22795 u16 clip_state[2]; 22796 u16 rssi_ctrl_state[2], pd_state[2]; 22797 u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; 22798 u16 rfctrlintc_override_val; 22799 u16 clip_off[] = { 0xffff, 0xffff }; 22800 u16 rf_pd_val, pd_mask, rssi_ctrl_mask; 22801 u8 vcm, min_vcm, vcm_tmp[4]; 22802 u8 vcm_final[4] = { 0, 0, 0, 0 }; 22803 u8 result_idx, ctr; 22804 s32 poll_results[4][4] = { 22805 {0, 0, 0, 0}, 22806 {0, 0, 0, 0}, 22807 {0, 0, 0, 0}, 22808 {0, 0, 0, 0} 22809 }; 22810 s32 poll_miniq[4][2] = { 22811 {0, 0}, 22812 {0, 0}, 22813 {0, 0}, 22814 {0, 0} 22815 }; 22816 s32 min_d, curr_d; 22817 s32 fine_digital_offset[4]; 22818 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22819 s32 min_poll; 22820 22821 switch (rssi_type) { 22822 case NPHY_RSSI_SEL_NB: 22823 target_code = NPHY_RSSICAL_NB_TARGET; 22824 break; 22825 case NPHY_RSSI_SEL_W1: 22826 target_code = NPHY_RSSICAL_W1_TARGET; 22827 break; 22828 case NPHY_RSSI_SEL_W2: 22829 target_code = NPHY_RSSICAL_W2_TARGET; 22830 break; 22831 default: 22832 return; 22833 } 22834 22835 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22836 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22837 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22838 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22839 22840 rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; 22841 rfctrlintc_override_val = 22842 CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; 22843 22844 rfctrlintc_state[0] = read_phy_reg(pi, 0x91); 22845 rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); 22846 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 22847 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); 22848 22849 rfctrlintc_state[1] = read_phy_reg(pi, 0x92); 22850 rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); 22851 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 22852 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); 22853 22854 pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | 22855 RADIO_2055_WBRSSI_G2_PD; 22856 pd_state[0] = 22857 read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; 22858 pd_state[1] = 22859 read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; 22860 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); 22861 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); 22862 rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | 22863 RADIO_2055_WBRSSI_G2_SEL; 22864 rssi_ctrl_state[0] = 22865 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; 22866 rssi_ctrl_state[1] = 22867 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; 22868 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 22869 22870 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22871 NPHY_RAIL_I, rssi_type); 22872 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22873 NPHY_RAIL_Q, rssi_type); 22874 22875 for (vcm = 0; vcm < 4; vcm++) { 22876 22877 vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; 22878 if (rssi_type != NPHY_RSSI_SEL_W2) 22879 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); 22880 22881 wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], 22882 NPHY_RSSICAL_NPOLL); 22883 22884 if ((rssi_type == NPHY_RSSI_SEL_W1) 22885 || (rssi_type == NPHY_RSSI_SEL_W2)) { 22886 for (ctr = 0; ctr < 2; ctr++) 22887 poll_miniq[vcm][ctr] = 22888 min(poll_results[vcm][ctr * 2 + 0], 22889 poll_results[vcm][ctr * 2 + 1]); 22890 } 22891 } 22892 22893 for (result_idx = 0; result_idx < 4; result_idx++) { 22894 min_d = NPHY_RSSICAL_MAXD; 22895 min_vcm = 0; 22896 min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; 22897 for (vcm = 0; vcm < 4; vcm++) { 22898 curr_d = abs(((rssi_type == NPHY_RSSI_SEL_NB) ? 22899 poll_results[vcm][result_idx] : 22900 poll_miniq[vcm][result_idx / 2]) - 22901 (target_code * NPHY_RSSICAL_NPOLL)); 22902 if (curr_d < min_d) { 22903 min_d = curr_d; 22904 min_vcm = vcm; 22905 } 22906 if (poll_results[vcm][result_idx] < min_poll) 22907 min_poll = poll_results[vcm][result_idx]; 22908 } 22909 vcm_final[result_idx] = min_vcm; 22910 poll_results_min[result_idx] = min_poll; 22911 } 22912 22913 if (rssi_type != NPHY_RSSI_SEL_W2) 22914 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); 22915 22916 for (result_idx = 0; result_idx < 4; result_idx++) { 22917 fine_digital_offset[result_idx] = 22918 (target_code * NPHY_RSSICAL_NPOLL) - 22919 poll_results[vcm_final[result_idx]][result_idx]; 22920 if (fine_digital_offset[result_idx] < 0) { 22921 fine_digital_offset[result_idx] = 22922 abs(fine_digital_offset[result_idx]); 22923 fine_digital_offset[result_idx] += 22924 (NPHY_RSSICAL_NPOLL / 2); 22925 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22926 fine_digital_offset[result_idx] = 22927 -fine_digital_offset[result_idx]; 22928 } else { 22929 fine_digital_offset[result_idx] += 22930 (NPHY_RSSICAL_NPOLL / 2); 22931 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22932 } 22933 22934 if (poll_results_min[result_idx] == 22935 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22936 fine_digital_offset[result_idx] = 22937 (target_code - NPHY_RSSICAL_MAXREAD - 1); 22938 22939 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 22940 (s8) 22941 fine_digital_offset[result_idx], 22942 (result_idx / 2 == 22943 0) ? RADIO_MIMO_CORESEL_CORE1 : 22944 RADIO_MIMO_CORESEL_CORE2, 22945 (result_idx % 2 == 22946 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, 22947 rssi_type); 22948 } 22949 22950 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); 22951 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); 22952 if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) 22953 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22954 NPHY_RSSI_SEL_NB); 22955 else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) 22956 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22957 NPHY_RSSI_SEL_W1); 22958 else /* RADIO_2055_WBRSSI_G2_SEL */ 22959 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22960 NPHY_RSSI_SEL_W2); 22961 if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) 22962 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22963 NPHY_RSSI_SEL_NB); 22964 else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) 22965 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22966 NPHY_RSSI_SEL_W1); 22967 else /* RADIO_2055_WBRSSI_G1_SEL */ 22968 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22969 NPHY_RSSI_SEL_W2); 22970 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); 22971 22972 write_phy_reg(pi, 0x91, rfctrlintc_state[0]); 22973 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); 22974 write_phy_reg(pi, 0x92, rfctrlintc_state[1]); 22975 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); 22976 22977 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22978 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22979 22980 wlc_phy_resetcca_nphy(pi); 22981 } 22982 22983 void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi) 22984 { 22985 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22986 wlc_phy_rssi_cal_nphy_rev3(pi); 22987 } else { 22988 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); 22989 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); 22990 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); 22991 } 22992 } 22993 22994 int 22995 wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct d11rxhdr *rxh) 22996 { 22997 s16 rxpwr, rxpwr0, rxpwr1; 22998 s16 phyRx0_l, phyRx2_l; 22999 23000 rxpwr = 0; 23001 rxpwr0 = rxh->PhyRxStatus_1 & PRXS1_nphy_PWR0_MASK; 23002 rxpwr1 = (rxh->PhyRxStatus_1 & PRXS1_nphy_PWR1_MASK) >> 8; 23003 23004 if (rxpwr0 > 127) 23005 rxpwr0 -= 256; 23006 if (rxpwr1 > 127) 23007 rxpwr1 -= 256; 23008 23009 phyRx0_l = rxh->PhyRxStatus_0 & 0x00ff; 23010 phyRx2_l = rxh->PhyRxStatus_2 & 0x00ff; 23011 if (phyRx2_l > 127) 23012 phyRx2_l -= 256; 23013 23014 if (((rxpwr0 == 16) || (rxpwr0 == 32))) { 23015 rxpwr0 = rxpwr1; 23016 rxpwr1 = phyRx2_l; 23017 } 23018 23019 if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) 23020 rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; 23021 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) 23022 rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; 23023 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) 23024 rxpwr = (rxpwr0 + rxpwr1) >> 1; 23025 23026 return rxpwr; 23027 } 23028 23029 static void 23030 wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, struct cordic_iq *tone_buf, 23031 u16 num_samps) 23032 { 23033 u16 t; 23034 u32 *data_buf = NULL; 23035 23036 data_buf = kmalloc(sizeof(u32) * num_samps, GFP_ATOMIC); 23037 if (data_buf == NULL) 23038 return; 23039 23040 if (pi->phyhang_avoid) 23041 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23042 23043 for (t = 0; t < num_samps; t++) 23044 data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | 23045 (((unsigned int)tone_buf[t].q) & 0x3ff); 23046 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, 23047 data_buf); 23048 23049 kfree(data_buf); 23050 23051 if (pi->phyhang_avoid) 23052 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23053 } 23054 23055 static u16 23056 wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23057 u8 dac_test_mode) 23058 { 23059 u8 phy_bw, is_phybw40; 23060 u16 num_samps, t, spur; 23061 s32 theta = 0, rot = 0; 23062 u32 tbl_len; 23063 struct cordic_iq *tone_buf = NULL; 23064 23065 is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); 23066 phy_bw = (is_phybw40 == 1) ? 40 : 20; 23067 tbl_len = (phy_bw << 3); 23068 23069 if (dac_test_mode == 1) { 23070 spur = read_phy_reg(pi, 0x01); 23071 spur = (spur >> 15) & 1; 23072 phy_bw = (spur == 1) ? 82 : 80; 23073 phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; 23074 23075 tbl_len = (phy_bw << 1); 23076 } 23077 23078 tone_buf = kmalloc(sizeof(struct cordic_iq) * tbl_len, GFP_ATOMIC); 23079 if (tone_buf == NULL) 23080 return 0; 23081 23082 num_samps = (u16) tbl_len; 23083 rot = ((f_kHz * 36) / phy_bw) / 100; 23084 theta = 0; 23085 23086 for (t = 0; t < num_samps; t++) { 23087 23088 tone_buf[t] = cordic_calc_iq(theta); 23089 23090 theta += rot; 23091 23092 tone_buf[t].q = (s32) FLOAT(tone_buf[t].q * max_val); 23093 tone_buf[t].i = (s32) FLOAT(tone_buf[t].i * max_val); 23094 } 23095 23096 wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); 23097 23098 kfree(tone_buf); 23099 23100 return num_samps; 23101 } 23102 23103 static void 23104 wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 num_samps, u16 loops, 23105 u16 wait, u8 iqmode, u8 dac_test_mode, 23106 bool modify_bbmult) 23107 { 23108 u16 bb_mult; 23109 u8 phy_bw, sample_cmd; 23110 u16 orig_RfseqCoreActv; 23111 u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4, lpf_bw_ctl_miscreg3, 23112 lpf_bw_ctl_miscreg4; 23113 23114 if (pi->phyhang_avoid) 23115 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23116 23117 phy_bw = 20; 23118 if (CHSPEC_IS40(pi->radio_chanspec)) 23119 phy_bw = 40; 23120 23121 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23122 23123 lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); 23124 lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); 23125 if (lpf_bw_ctl_override3 | lpf_bw_ctl_override4) { 23126 lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & 23127 (0x7 << 8); 23128 lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & 23129 (0x7 << 8); 23130 } else { 23131 wlc_phy_rfctrl_override_nphy_rev7( 23132 pi, 23133 (0x1 << 7), 23134 wlc_phy_read_lpf_bw_ctl_nphy 23135 (pi, 23136 0), 0, 0, 23137 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23138 23139 pi->nphy_sample_play_lpf_bw_ctl_ovr = true; 23140 23141 lpf_bw_ctl_miscreg3 = read_phy_reg(pi, 0x340) & 23142 (0x7 << 8); 23143 lpf_bw_ctl_miscreg4 = read_phy_reg(pi, 0x341) & 23144 (0x7 << 8); 23145 } 23146 } 23147 23148 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { 23149 23150 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23151 &bb_mult); 23152 pi->nphy_bb_mult_save = 23153 BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); 23154 } 23155 23156 if (modify_bbmult) { 23157 bb_mult = (phy_bw == 20) ? 100 : 71; 23158 bb_mult = (bb_mult << 8) + bb_mult; 23159 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23160 &bb_mult); 23161 } 23162 23163 if (pi->phyhang_avoid) 23164 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23165 23166 write_phy_reg(pi, 0xc6, num_samps - 1); 23167 23168 if (loops != 0xffff) 23169 write_phy_reg(pi, 0xc4, loops - 1); 23170 else 23171 write_phy_reg(pi, 0xc4, loops); 23172 23173 write_phy_reg(pi, 0xc5, wait); 23174 23175 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 23176 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 23177 if (iqmode) { 23178 23179 and_phy_reg(pi, 0xc2, 0x7FFF); 23180 23181 or_phy_reg(pi, 0xc2, 0x8000); 23182 } else { 23183 23184 sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; 23185 write_phy_reg(pi, 0xc3, sample_cmd); 23186 } 23187 23188 SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); 23189 23190 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 23191 } 23192 23193 int 23194 wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23195 u8 iqmode, u8 dac_test_mode, bool modify_bbmult) 23196 { 23197 u16 num_samps; 23198 u16 loops = 0xffff; 23199 u16 wait = 0; 23200 23201 num_samps = wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, 23202 dac_test_mode); 23203 if (num_samps == 0) 23204 return -EBADE; 23205 23206 wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, 23207 dac_test_mode, modify_bbmult); 23208 23209 return 0; 23210 } 23211 23212 void wlc_phy_stopplayback_nphy(struct brcms_phy *pi) 23213 { 23214 u16 playback_status; 23215 u16 bb_mult; 23216 23217 if (pi->phyhang_avoid) 23218 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23219 23220 playback_status = read_phy_reg(pi, 0xc7); 23221 if (playback_status & 0x1) 23222 or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); 23223 else if (playback_status & 0x2) 23224 and_phy_reg(pi, 0xc2, 23225 (u16) ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); 23226 23227 and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); 23228 23229 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { 23230 23231 bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; 23232 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23233 &bb_mult); 23234 23235 pi->nphy_bb_mult_save = 0; 23236 } 23237 23238 if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { 23239 if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { 23240 wlc_phy_rfctrl_override_nphy_rev7( 23241 pi, 23242 (0x1 << 7), 23243 0, 0, 1, 23244 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23245 pi->nphy_sample_play_lpf_bw_ctl_ovr = false; 23246 } 23247 } 23248 23249 if (pi->phyhang_avoid) 23250 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23251 } 23252 23253 static u32 *brcms_phy_get_tx_pwrctrl_tbl(struct brcms_phy *pi) 23254 { 23255 u32 *tx_pwrctrl_tbl = NULL; 23256 uint phyrev = pi->pubpi.phy_rev; 23257 23258 if (PHY_IPA(pi)) { 23259 tx_pwrctrl_tbl = 23260 wlc_phy_get_ipa_gaintbl_nphy(pi); 23261 } else { 23262 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23263 if (NREV_IS(phyrev, 3)) 23264 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; 23265 else if (NREV_IS(phyrev, 4)) 23266 tx_pwrctrl_tbl = 23267 (pi->srom_fem5g.extpagain == 3) ? 23268 nphy_tpc_5GHz_txgain_HiPwrEPA : 23269 nphy_tpc_5GHz_txgain_rev4; 23270 else 23271 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev5; 23272 } else { 23273 if (NREV_GE(phyrev, 7)) { 23274 if (pi->pubpi.radiorev == 3) 23275 tx_pwrctrl_tbl = 23276 nphy_tpc_txgain_epa_2057rev3; 23277 else if (pi->pubpi.radiorev == 5) 23278 tx_pwrctrl_tbl = 23279 nphy_tpc_txgain_epa_2057rev5; 23280 } else { 23281 if (NREV_GE(phyrev, 5) && 23282 (pi->srom_fem2g.extpagain == 3)) 23283 tx_pwrctrl_tbl = 23284 nphy_tpc_txgain_HiPwrEPA; 23285 else 23286 tx_pwrctrl_tbl = 23287 nphy_tpc_txgain_rev3; 23288 } 23289 } 23290 } 23291 return tx_pwrctrl_tbl; 23292 } 23293 23294 struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi) 23295 { 23296 u16 base_idx[2], curr_gain[2]; 23297 u8 core_no; 23298 struct nphy_txgains target_gain; 23299 u32 *tx_pwrctrl_tbl = NULL; 23300 23301 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { 23302 if (pi->phyhang_avoid) 23303 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23304 23305 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 23306 curr_gain); 23307 23308 if (pi->phyhang_avoid) 23309 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23310 23311 for (core_no = 0; core_no < 2; core_no++) { 23312 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23313 target_gain.ipa[core_no] = 23314 curr_gain[core_no] & 0x0007; 23315 target_gain.pad[core_no] = 23316 ((curr_gain[core_no] & 0x00F8) >> 3); 23317 target_gain.pga[core_no] = 23318 ((curr_gain[core_no] & 0x0F00) >> 8); 23319 target_gain.txgm[core_no] = 23320 ((curr_gain[core_no] & 0x7000) >> 12); 23321 target_gain.txlpf[core_no] = 23322 ((curr_gain[core_no] & 0x8000) >> 15); 23323 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23324 target_gain.ipa[core_no] = 23325 curr_gain[core_no] & 0x000F; 23326 target_gain.pad[core_no] = 23327 ((curr_gain[core_no] & 0x00F0) >> 4); 23328 target_gain.pga[core_no] = 23329 ((curr_gain[core_no] & 0x0F00) >> 8); 23330 target_gain.txgm[core_no] = 23331 ((curr_gain[core_no] & 0x7000) >> 12); 23332 } else { 23333 target_gain.ipa[core_no] = 23334 curr_gain[core_no] & 0x0003; 23335 target_gain.pad[core_no] = 23336 ((curr_gain[core_no] & 0x000C) >> 2); 23337 target_gain.pga[core_no] = 23338 ((curr_gain[core_no] & 0x0070) >> 4); 23339 target_gain.txgm[core_no] = 23340 ((curr_gain[core_no] & 0x0380) >> 7); 23341 } 23342 } 23343 } else { 23344 uint phyrev = pi->pubpi.phy_rev; 23345 23346 base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; 23347 base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; 23348 for (core_no = 0; core_no < 2; core_no++) { 23349 if (NREV_GE(phyrev, 3)) { 23350 tx_pwrctrl_tbl = 23351 brcms_phy_get_tx_pwrctrl_tbl(pi); 23352 if (NREV_GE(phyrev, 7)) { 23353 target_gain.ipa[core_no] = 23354 (tx_pwrctrl_tbl 23355 [base_idx[core_no]] 23356 >> 16) & 0x7; 23357 target_gain.pad[core_no] = 23358 (tx_pwrctrl_tbl 23359 [base_idx[core_no]] 23360 >> 19) & 0x1f; 23361 target_gain.pga[core_no] = 23362 (tx_pwrctrl_tbl 23363 [base_idx[core_no]] 23364 >> 24) & 0xf; 23365 target_gain.txgm[core_no] = 23366 (tx_pwrctrl_tbl 23367 [base_idx[core_no]] 23368 >> 28) & 0x7; 23369 target_gain.txlpf[core_no] = 23370 (tx_pwrctrl_tbl 23371 [base_idx[core_no]] 23372 >> 31) & 0x1; 23373 } else { 23374 target_gain.ipa[core_no] = 23375 (tx_pwrctrl_tbl 23376 [base_idx[core_no]] 23377 >> 16) & 0xf; 23378 target_gain.pad[core_no] = 23379 (tx_pwrctrl_tbl 23380 [base_idx[core_no]] 23381 >> 20) & 0xf; 23382 target_gain.pga[core_no] = 23383 (tx_pwrctrl_tbl 23384 [base_idx[core_no]] 23385 >> 24) & 0xf; 23386 target_gain.txgm[core_no] = 23387 (tx_pwrctrl_tbl 23388 [base_idx[core_no]] 23389 >> 28) & 0x7; 23390 } 23391 } else { 23392 target_gain.ipa[core_no] = 23393 (nphy_tpc_txgain[base_idx[core_no]] >> 23394 16) & 0x3; 23395 target_gain.pad[core_no] = 23396 (nphy_tpc_txgain[base_idx[core_no]] >> 23397 18) & 0x3; 23398 target_gain.pga[core_no] = 23399 (nphy_tpc_txgain[base_idx[core_no]] >> 23400 20) & 0x7; 23401 target_gain.txgm[core_no] = 23402 (nphy_tpc_txgain[base_idx[core_no]] >> 23403 23) & 0x7; 23404 } 23405 } 23406 } 23407 23408 return target_gain; 23409 } 23410 23411 static void 23412 wlc_phy_iqcal_gainparams_nphy(struct brcms_phy *pi, u16 core_no, 23413 struct nphy_txgains target_gain, 23414 struct nphy_iqcal_params *params) 23415 { 23416 u8 k; 23417 int idx; 23418 u16 gain_index; 23419 u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); 23420 23421 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23422 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23423 params->txlpf = target_gain.txlpf[core_no]; 23424 23425 params->txgm = target_gain.txgm[core_no]; 23426 params->pga = target_gain.pga[core_no]; 23427 params->pad = target_gain.pad[core_no]; 23428 params->ipa = target_gain.ipa[core_no]; 23429 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23430 params->cal_gain = 23431 ((params->txlpf << 15) | (params->txgm << 12) | 23432 (params->pga << 8) | 23433 (params->pad << 3) | (params->ipa)); 23434 else 23435 params->cal_gain = 23436 ((params->txgm << 12) | (params->pga << 8) | 23437 (params->pad << 4) | (params->ipa)); 23438 23439 params->ncorr[0] = 0x79; 23440 params->ncorr[1] = 0x79; 23441 params->ncorr[2] = 0x79; 23442 params->ncorr[3] = 0x79; 23443 params->ncorr[4] = 0x79; 23444 } else { 23445 23446 gain_index = ((target_gain.pad[core_no] << 0) | 23447 (target_gain.pga[core_no] << 4) | 23448 (target_gain.txgm[core_no] << 8)); 23449 23450 idx = -1; 23451 for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { 23452 if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == 23453 gain_index) { 23454 idx = k; 23455 break; 23456 } 23457 } 23458 23459 params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; 23460 params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; 23461 params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; 23462 params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | 23463 (params->pad << 2)); 23464 params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; 23465 params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; 23466 params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; 23467 params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; 23468 } 23469 } 23470 23471 static void wlc_phy_txcal_radio_setup_nphy(struct brcms_phy *pi) 23472 { 23473 u16 jtag_core, core; 23474 23475 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23476 23477 for (core = 0; core <= 1; core++) { 23478 23479 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23480 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23481 TX_SSI_MASTER); 23482 23483 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23484 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23485 IQCAL_VCM_HG); 23486 23487 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23488 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23489 IQCAL_IDAC); 23490 23491 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23492 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23493 TSSI_VCM); 23494 23495 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; 23496 23497 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23498 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23499 TX_SSI_MUX); 23500 23501 if (pi->pubpi.radiorev != 5) 23502 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23503 READ_RADIO_REG3(pi, RADIO_2057, TX, 23504 core, 23505 TSSIA); 23506 23507 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23508 READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); 23509 23510 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23511 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23512 TSSI_MISC1); 23513 23514 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23515 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23516 TX_SSI_MASTER, 0x0a); 23517 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23518 IQCAL_VCM_HG, 0x43); 23519 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23520 IQCAL_IDAC, 0x55); 23521 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23522 TSSI_VCM, 0x00); 23523 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23524 TSSIG, 0x00); 23525 if (pi->use_int_tx_iqlo_cal_nphy) { 23526 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23527 core, TX_SSI_MUX, 0x4); 23528 if (!(pi-> 23529 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23530 WRITE_RADIO_REG3(pi, RADIO_2057, 23531 TX, core, 23532 TSSIA, 0x31); 23533 else 23534 WRITE_RADIO_REG3(pi, RADIO_2057, 23535 TX, core, 23536 TSSIA, 0x21); 23537 } 23538 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23539 TSSI_MISC1, 0x00); 23540 } else { 23541 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23542 TX_SSI_MASTER, 0x06); 23543 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23544 IQCAL_VCM_HG, 0x43); 23545 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23546 IQCAL_IDAC, 0x55); 23547 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23548 TSSI_VCM, 0x00); 23549 23550 if (pi->pubpi.radiorev != 5) 23551 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23552 core, TSSIA, 0x00); 23553 if (pi->use_int_tx_iqlo_cal_nphy) { 23554 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23555 core, TX_SSI_MUX, 23556 0x06); 23557 if (!(pi-> 23558 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23559 WRITE_RADIO_REG3(pi, RADIO_2057, 23560 TX, core, 23561 TSSIG, 0x31); 23562 else 23563 WRITE_RADIO_REG3(pi, RADIO_2057, 23564 TX, core, 23565 TSSIG, 0x21); 23566 } 23567 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23568 TSSI_MISC1, 0x00); 23569 } 23570 } 23571 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23572 23573 for (core = 0; core <= 1; core++) { 23574 jtag_core = 23575 (core == 23576 PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 23577 23578 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23579 read_radio_reg(pi, 23580 RADIO_2056_TX_TX_SSI_MASTER | 23581 jtag_core); 23582 23583 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23584 read_radio_reg(pi, 23585 RADIO_2056_TX_IQCAL_VCM_HG | 23586 jtag_core); 23587 23588 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23589 read_radio_reg(pi, 23590 RADIO_2056_TX_IQCAL_IDAC | 23591 jtag_core); 23592 23593 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23594 read_radio_reg( 23595 pi, 23596 RADIO_2056_TX_TSSI_VCM | 23597 jtag_core); 23598 23599 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 23600 read_radio_reg(pi, 23601 RADIO_2056_TX_TX_AMP_DET | 23602 jtag_core); 23603 23604 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23605 read_radio_reg(pi, 23606 RADIO_2056_TX_TX_SSI_MUX | 23607 jtag_core); 23608 23609 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23610 read_radio_reg(pi, 23611 RADIO_2056_TX_TSSIA | jtag_core); 23612 23613 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23614 read_radio_reg(pi, 23615 RADIO_2056_TX_TSSIG | jtag_core); 23616 23617 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23618 read_radio_reg(pi, 23619 RADIO_2056_TX_TSSI_MISC1 | 23620 jtag_core); 23621 23622 pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = 23623 read_radio_reg(pi, 23624 RADIO_2056_TX_TSSI_MISC2 | 23625 jtag_core); 23626 23627 pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = 23628 read_radio_reg(pi, 23629 RADIO_2056_TX_TSSI_MISC3 | 23630 jtag_core); 23631 23632 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23633 write_radio_reg(pi, 23634 RADIO_2056_TX_TX_SSI_MASTER | 23635 jtag_core, 0x0a); 23636 write_radio_reg(pi, 23637 RADIO_2056_TX_IQCAL_VCM_HG | 23638 jtag_core, 0x40); 23639 write_radio_reg(pi, 23640 RADIO_2056_TX_IQCAL_IDAC | 23641 jtag_core, 0x55); 23642 write_radio_reg(pi, 23643 RADIO_2056_TX_TSSI_VCM | 23644 jtag_core, 0x00); 23645 write_radio_reg(pi, 23646 RADIO_2056_TX_TX_AMP_DET | 23647 jtag_core, 0x00); 23648 23649 if (PHY_IPA(pi)) { 23650 write_radio_reg( 23651 pi, 23652 RADIO_2056_TX_TX_SSI_MUX 23653 | jtag_core, 0x4); 23654 write_radio_reg(pi, 23655 RADIO_2056_TX_TSSIA | 23656 jtag_core, 0x1); 23657 } else { 23658 write_radio_reg( 23659 pi, 23660 RADIO_2056_TX_TX_SSI_MUX 23661 | jtag_core, 0x00); 23662 write_radio_reg(pi, 23663 RADIO_2056_TX_TSSIA | 23664 jtag_core, 0x2f); 23665 } 23666 write_radio_reg(pi, 23667 RADIO_2056_TX_TSSIG | jtag_core, 23668 0x00); 23669 write_radio_reg(pi, 23670 RADIO_2056_TX_TSSI_MISC1 | 23671 jtag_core, 0x00); 23672 23673 write_radio_reg(pi, 23674 RADIO_2056_TX_TSSI_MISC2 | 23675 jtag_core, 0x00); 23676 write_radio_reg(pi, 23677 RADIO_2056_TX_TSSI_MISC3 | 23678 jtag_core, 0x00); 23679 } else { 23680 write_radio_reg(pi, 23681 RADIO_2056_TX_TX_SSI_MASTER | 23682 jtag_core, 0x06); 23683 write_radio_reg(pi, 23684 RADIO_2056_TX_IQCAL_VCM_HG | 23685 jtag_core, 0x40); 23686 write_radio_reg(pi, 23687 RADIO_2056_TX_IQCAL_IDAC | 23688 jtag_core, 0x55); 23689 write_radio_reg(pi, 23690 RADIO_2056_TX_TSSI_VCM | 23691 jtag_core, 0x00); 23692 write_radio_reg(pi, 23693 RADIO_2056_TX_TX_AMP_DET | 23694 jtag_core, 0x00); 23695 write_radio_reg(pi, 23696 RADIO_2056_TX_TSSIA | jtag_core, 23697 0x00); 23698 23699 if (PHY_IPA(pi)) { 23700 23701 write_radio_reg( 23702 pi, 23703 RADIO_2056_TX_TX_SSI_MUX 23704 | jtag_core, 0x06); 23705 if (NREV_LT(pi->pubpi.phy_rev, 5)) 23706 write_radio_reg( 23707 pi, 23708 RADIO_2056_TX_TSSIG 23709 | jtag_core, 23710 0x11); 23711 else 23712 write_radio_reg( 23713 pi, 23714 RADIO_2056_TX_TSSIG 23715 | jtag_core, 23716 0x1); 23717 } else { 23718 write_radio_reg( 23719 pi, 23720 RADIO_2056_TX_TX_SSI_MUX 23721 | jtag_core, 0x00); 23722 write_radio_reg(pi, 23723 RADIO_2056_TX_TSSIG | 23724 jtag_core, 0x20); 23725 } 23726 23727 write_radio_reg(pi, 23728 RADIO_2056_TX_TSSI_MISC1 | 23729 jtag_core, 0x00); 23730 write_radio_reg(pi, 23731 RADIO_2056_TX_TSSI_MISC2 | 23732 jtag_core, 0x00); 23733 write_radio_reg(pi, 23734 RADIO_2056_TX_TSSI_MISC3 | 23735 jtag_core, 0x00); 23736 } 23737 } 23738 } else { 23739 23740 pi->tx_rx_cal_radio_saveregs[0] = 23741 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 23742 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); 23743 pi->tx_rx_cal_radio_saveregs[1] = 23744 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 23745 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); 23746 23747 pi->tx_rx_cal_radio_saveregs[2] = 23748 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 23749 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); 23750 pi->tx_rx_cal_radio_saveregs[3] = 23751 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 23752 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); 23753 23754 pi->tx_rx_cal_radio_saveregs[4] = 23755 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 23756 pi->tx_rx_cal_radio_saveregs[5] = 23757 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 23758 23759 if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == 23760 0) { 23761 23762 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 23763 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 23764 } else { 23765 23766 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); 23767 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); 23768 } 23769 23770 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 23771 23772 or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); 23773 or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); 23774 } else { 23775 23776 and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); 23777 and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); 23778 } 23779 } 23780 } 23781 23782 static void wlc_phy_txcal_radio_cleanup_nphy(struct brcms_phy *pi) 23783 { 23784 u16 jtag_core, core; 23785 23786 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23787 for (core = 0; core <= 1; core++) { 23788 23789 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23790 TX_SSI_MASTER, 23791 pi-> 23792 tx_rx_cal_radio_saveregs[(core * 11) + 23793 0]); 23794 23795 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 23796 pi-> 23797 tx_rx_cal_radio_saveregs[(core * 11) + 23798 1]); 23799 23800 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 23801 pi-> 23802 tx_rx_cal_radio_saveregs[(core * 11) + 23803 2]); 23804 23805 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 23806 pi-> 23807 tx_rx_cal_radio_saveregs[(core * 11) + 23808 3]); 23809 23810 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, 23811 pi-> 23812 tx_rx_cal_radio_saveregs[(core * 11) + 23813 5]); 23814 23815 if (pi->pubpi.radiorev != 5) 23816 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23817 TSSIA, 23818 pi->tx_rx_cal_radio_saveregs 23819 [(core * 11) + 6]); 23820 23821 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, 23822 pi-> 23823 tx_rx_cal_radio_saveregs[(core * 11) + 23824 7]); 23825 23826 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 23827 pi-> 23828 tx_rx_cal_radio_saveregs[(core * 11) + 23829 8]); 23830 } 23831 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23832 for (core = 0; core <= 1; core++) { 23833 jtag_core = (core == PHY_CORE_0) ? 23834 RADIO_2056_TX0 : RADIO_2056_TX1; 23835 23836 write_radio_reg(pi, 23837 RADIO_2056_TX_TX_SSI_MASTER | jtag_core, 23838 pi-> 23839 tx_rx_cal_radio_saveregs[(core * 11) + 23840 0]); 23841 23842 write_radio_reg(pi, 23843 RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, 23844 pi-> 23845 tx_rx_cal_radio_saveregs[(core * 11) + 23846 1]); 23847 23848 write_radio_reg(pi, 23849 RADIO_2056_TX_IQCAL_IDAC | jtag_core, 23850 pi-> 23851 tx_rx_cal_radio_saveregs[(core * 11) + 23852 2]); 23853 23854 write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, 23855 pi-> 23856 tx_rx_cal_radio_saveregs[(core * 11) + 23857 3]); 23858 23859 write_radio_reg(pi, 23860 RADIO_2056_TX_TX_AMP_DET | jtag_core, 23861 pi-> 23862 tx_rx_cal_radio_saveregs[(core * 11) + 23863 4]); 23864 23865 write_radio_reg(pi, 23866 RADIO_2056_TX_TX_SSI_MUX | jtag_core, 23867 pi-> 23868 tx_rx_cal_radio_saveregs[(core * 11) + 23869 5]); 23870 23871 write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, 23872 pi-> 23873 tx_rx_cal_radio_saveregs[(core * 11) + 23874 6]); 23875 23876 write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, 23877 pi-> 23878 tx_rx_cal_radio_saveregs[(core * 11) + 23879 7]); 23880 23881 write_radio_reg(pi, 23882 RADIO_2056_TX_TSSI_MISC1 | jtag_core, 23883 pi-> 23884 tx_rx_cal_radio_saveregs[(core * 11) + 23885 8]); 23886 23887 write_radio_reg(pi, 23888 RADIO_2056_TX_TSSI_MISC2 | jtag_core, 23889 pi-> 23890 tx_rx_cal_radio_saveregs[(core * 11) + 23891 9]); 23892 23893 write_radio_reg(pi, 23894 RADIO_2056_TX_TSSI_MISC3 | jtag_core, 23895 pi-> 23896 tx_rx_cal_radio_saveregs[(core * 11) + 23897 10]); 23898 } 23899 } else { 23900 23901 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 23902 pi->tx_rx_cal_radio_saveregs[0]); 23903 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 23904 pi->tx_rx_cal_radio_saveregs[1]); 23905 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 23906 pi->tx_rx_cal_radio_saveregs[2]); 23907 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 23908 pi->tx_rx_cal_radio_saveregs[3]); 23909 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 23910 pi->tx_rx_cal_radio_saveregs[4]); 23911 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 23912 pi->tx_rx_cal_radio_saveregs[5]); 23913 } 23914 } 23915 23916 static void wlc_phy_txcal_physetup_nphy(struct brcms_phy *pi) 23917 { 23918 u16 val, mask; 23919 23920 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23921 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 23922 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 23923 23924 mask = ((0x3 << 8) | (0x3 << 10)); 23925 val = (0x2 << 8); 23926 val |= (0x2 << 10); 23927 mod_phy_reg(pi, 0xa6, mask, val); 23928 mod_phy_reg(pi, 0xa7, mask, val); 23929 23930 val = read_phy_reg(pi, 0x8f); 23931 pi->tx_rx_cal_phy_saveregs[2] = val; 23932 val |= ((0x1 << 9) | (0x1 << 10)); 23933 write_phy_reg(pi, 0x8f, val); 23934 23935 val = read_phy_reg(pi, 0xa5); 23936 pi->tx_rx_cal_phy_saveregs[3] = val; 23937 val |= ((0x1 << 9) | (0x1 << 10)); 23938 write_phy_reg(pi, 0xa5, val); 23939 23940 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); 23941 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 23942 23943 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23944 &val); 23945 pi->tx_rx_cal_phy_saveregs[5] = val; 23946 val = 0; 23947 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23948 &val); 23949 23950 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23951 &val); 23952 pi->tx_rx_cal_phy_saveregs[6] = val; 23953 val = 0; 23954 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23955 &val); 23956 23957 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); 23958 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); 23959 23960 if (!(pi->use_int_tx_iqlo_cal_nphy)) 23961 wlc_phy_rfctrlintc_override_nphy( 23962 pi, 23963 NPHY_RfctrlIntc_override_PA, 23964 1, 23965 RADIO_MIMO_CORESEL_CORE1 23966 | 23967 RADIO_MIMO_CORESEL_CORE2); 23968 else 23969 wlc_phy_rfctrlintc_override_nphy( 23970 pi, 23971 NPHY_RfctrlIntc_override_PA, 23972 0, 23973 RADIO_MIMO_CORESEL_CORE1 23974 | 23975 RADIO_MIMO_CORESEL_CORE2); 23976 23977 wlc_phy_rfctrlintc_override_nphy(pi, 23978 NPHY_RfctrlIntc_override_TRSW, 23979 0x2, RADIO_MIMO_CORESEL_CORE1); 23980 wlc_phy_rfctrlintc_override_nphy(pi, 23981 NPHY_RfctrlIntc_override_TRSW, 23982 0x8, RADIO_MIMO_CORESEL_CORE2); 23983 23984 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 23985 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 23986 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 23987 0x29b, (0x1 << 0), (0) << 0); 23988 23989 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 23990 0x29b, (0x1 << 0), (0) << 0); 23991 23992 if (NREV_IS(pi->pubpi.phy_rev, 7) 23993 || NREV_GE(pi->pubpi.phy_rev, 8)) 23994 wlc_phy_rfctrl_override_nphy_rev7( 23995 pi, (0x1 << 7), 23996 wlc_phy_read_lpf_bw_ctl_nphy 23997 (pi, 23998 0), 0, 0, 23999 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24000 24001 if (pi->use_int_tx_iqlo_cal_nphy 24002 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24003 24004 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24005 24006 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24007 1 << 4); 24008 24009 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24010 mod_radio_reg( 24011 pi, 24012 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24013 1, 0); 24014 mod_radio_reg( 24015 pi, 24016 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24017 1, 0); 24018 } else { 24019 mod_radio_reg( 24020 pi, 24021 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24022 1, 0); 24023 mod_radio_reg( 24024 pi, 24025 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24026 1, 0); 24027 } 24028 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24029 wlc_phy_rfctrl_override_nphy_rev7( 24030 pi, 24031 (0x1 << 3), 0, 24032 0x3, 0, 24033 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24034 } 24035 } 24036 } else { 24037 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 24038 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 24039 24040 mask = ((0x3 << 12) | (0x3 << 14)); 24041 val = (0x2 << 12); 24042 val |= (0x2 << 14); 24043 mod_phy_reg(pi, 0xa6, mask, val); 24044 mod_phy_reg(pi, 0xa7, mask, val); 24045 24046 val = read_phy_reg(pi, 0xa5); 24047 pi->tx_rx_cal_phy_saveregs[2] = val; 24048 val |= ((0x1 << 12) | (0x1 << 13)); 24049 write_phy_reg(pi, 0xa5, val); 24050 24051 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24052 &val); 24053 pi->tx_rx_cal_phy_saveregs[3] = val; 24054 val |= 0x2000; 24055 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24056 &val); 24057 24058 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24059 &val); 24060 pi->tx_rx_cal_phy_saveregs[4] = val; 24061 val |= 0x2000; 24062 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24063 &val); 24064 24065 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); 24066 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); 24067 val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 24068 write_phy_reg(pi, 0x91, val); 24069 write_phy_reg(pi, 0x92, val); 24070 } 24071 } 24072 24073 static void wlc_phy_txcal_phycleanup_nphy(struct brcms_phy *pi) 24074 { 24075 u16 mask; 24076 24077 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 24078 write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); 24079 write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); 24080 write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); 24081 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); 24082 write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); 24083 24084 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24085 &pi->tx_rx_cal_phy_saveregs[5]); 24086 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24087 &pi->tx_rx_cal_phy_saveregs[6]); 24088 24089 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); 24090 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); 24091 24092 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 24093 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 24094 24095 if (NREV_IS(pi->pubpi.phy_rev, 7) 24096 || NREV_GE(pi->pubpi.phy_rev, 8)) 24097 wlc_phy_rfctrl_override_nphy_rev7( 24098 pi, (0x1 << 7), 0, 0, 24099 1, 24100 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24101 24102 wlc_phy_resetcca_nphy(pi); 24103 24104 if (pi->use_int_tx_iqlo_cal_nphy 24105 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24106 24107 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24108 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24109 mod_radio_reg( 24110 pi, 24111 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24112 1, 1); 24113 mod_radio_reg( 24114 pi, 24115 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24116 1, 1); 24117 } else { 24118 mod_radio_reg( 24119 pi, 24120 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24121 1, 1); 24122 mod_radio_reg( 24123 pi, 24124 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24125 1, 1); 24126 } 24127 24128 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24129 0); 24130 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24131 wlc_phy_rfctrl_override_nphy_rev7( 24132 pi, 24133 (0x1 << 3), 0, 24134 0x3, 1, 24135 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24136 } 24137 } 24138 } else { 24139 mask = ((0x3 << 12) | (0x3 << 14)); 24140 mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); 24141 mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); 24142 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); 24143 24144 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24145 &pi->tx_rx_cal_phy_saveregs[3]); 24146 24147 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24148 &pi->tx_rx_cal_phy_saveregs[4]); 24149 24150 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); 24151 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); 24152 } 24153 } 24154 24155 void 24156 wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) 24157 { 24158 u16 tssi_reg; 24159 s32 temp, pwrindex[2]; 24160 s32 idle_tssi[2]; 24161 s32 rssi_buf[4]; 24162 s32 tssival[2]; 24163 u8 tssi_type; 24164 24165 tssi_reg = read_phy_reg(pi, 0x1e9); 24166 24167 temp = (s32) (tssi_reg & 0x3f); 24168 idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); 24169 24170 temp = (s32) ((tssi_reg >> 8) & 0x3f); 24171 idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); 24172 24173 tssi_type = 24174 CHSPEC_IS5G(pi->radio_chanspec) ? 24175 (u8)NPHY_RSSI_SEL_TSSI_5G : (u8)NPHY_RSSI_SEL_TSSI_2G; 24176 24177 wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); 24178 24179 tssival[0] = rssi_buf[0] / ((s32) num_samps); 24180 tssival[1] = rssi_buf[2] / ((s32) num_samps); 24181 24182 pwrindex[0] = idle_tssi[0] - tssival[0] + 64; 24183 pwrindex[1] = idle_tssi[1] - tssival[1] + 64; 24184 24185 if (pwrindex[0] < 0) 24186 pwrindex[0] = 0; 24187 else if (pwrindex[0] > 63) 24188 pwrindex[0] = 63; 24189 24190 if (pwrindex[1] < 0) 24191 pwrindex[1] = 0; 24192 else if (pwrindex[1] > 63) 24193 pwrindex[1] = 63; 24194 24195 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, 24196 (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); 24197 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, 24198 (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); 24199 } 24200 24201 static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core) 24202 { 24203 int index; 24204 u32 bbmult_scale; 24205 u16 bbmult; 24206 u16 tblentry; 24207 24208 static const struct nphy_txiqcal_ladder ladder_lo[] = { 24209 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24210 {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, 24211 {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} 24212 }; 24213 24214 static const struct nphy_txiqcal_ladder ladder_iq[] = { 24215 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24216 {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, 24217 {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} 24218 }; 24219 24220 bbmult = (core == PHY_CORE_0) ? 24221 ((pi->nphy_txcal_bbmult >> 8) & 0xff) : 24222 (pi->nphy_txcal_bbmult & 0xff); 24223 24224 for (index = 0; index < 18; index++) { 24225 bbmult_scale = ladder_lo[index].percent * bbmult; 24226 bbmult_scale /= 100; 24227 24228 tblentry = 24229 ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; 24230 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, 24231 &tblentry); 24232 24233 bbmult_scale = ladder_iq[index].percent * bbmult; 24234 bbmult_scale /= 100; 24235 24236 tblentry = 24237 ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; 24238 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, 24239 16, &tblentry); 24240 } 24241 } 24242 24243 static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core) 24244 { 24245 u16 tmp; 24246 tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); 24247 24248 tmp = (tmp & (0x7f << 8)) >> 8; 24249 return (u8) tmp; 24250 } 24251 24252 static void 24253 wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1) 24254 { 24255 mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); 24256 24257 if (NREV_GT(pi->pubpi.phy_rev, 1)) 24258 mod_phy_reg(pi, 0x222, (0xff << 0), idx1); 24259 } 24260 24261 static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi) 24262 { 24263 u16 m0m1; 24264 24265 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 24266 24267 return m0m1; 24268 } 24269 24270 static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1) 24271 { 24272 u16 m0m1 = (u16) ((m0 << 8) | m1); 24273 24274 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); 24275 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); 24276 } 24277 24278 static void 24279 wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, 24280 struct nphy_papd_restore_state *state, u8 core) 24281 { 24282 s32 tone_freq; 24283 u8 off_core; 24284 u16 mixgain = 0; 24285 24286 off_core = core ^ 0x1; 24287 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24288 24289 if (NREV_IS(pi->pubpi.phy_rev, 7) 24290 || NREV_GE(pi->pubpi.phy_rev, 8)) 24291 wlc_phy_rfctrl_override_nphy_rev7( 24292 pi, (0x1 << 7), 24293 wlc_phy_read_lpf_bw_ctl_nphy 24294 (pi, 24295 0), 0, 0, 24296 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24297 24298 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24299 if (pi->pubpi.radiorev == 5) 24300 mixgain = (core == 0) ? 0x20 : 0x00; 24301 else if ((pi->pubpi.radiorev == 7) 24302 || (pi->pubpi.radiorev == 8)) 24303 mixgain = 0x00; 24304 else if ((pi->pubpi.radiorev <= 4) 24305 || (pi->pubpi.radiorev == 6)) 24306 mixgain = 0x00; 24307 } else { 24308 if ((pi->pubpi.radiorev == 4) || 24309 (pi->pubpi.radiorev == 6)) 24310 mixgain = 0x50; 24311 else if ((pi->pubpi.radiorev == 3) 24312 || (pi->pubpi.radiorev == 7) 24313 || (pi->pubpi.radiorev == 8)) 24314 mixgain = 0x0; 24315 } 24316 24317 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 24318 mixgain, (1 << core), 0, 24319 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24320 24321 wlc_phy_rfctrl_override_1tomany_nphy( 24322 pi, 24323 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24324 1, (1 << core), 0); 24325 wlc_phy_rfctrl_override_1tomany_nphy( 24326 pi, 24327 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24328 0, (1 << off_core), 0); 24329 24330 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24331 0, 0x3, 0, 24332 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24333 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 24334 (1 << core), 0, 24335 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24336 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 24337 (1 << core), 0, 24338 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24339 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 24340 (1 << core), 0, 24341 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24342 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 24343 (1 << core), 0, 24344 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24345 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 24346 (1 << core), 0, 24347 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24348 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 24349 (1 << core), 0, 24350 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24351 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 24352 (1 << core), 0, 24353 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24354 24355 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 24356 0, (1 << core), 0, 24357 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24358 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 24359 (1 << core), 0, 24360 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24361 24362 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24363 0xa6 : 0xa7); 24364 state->afeoverride[core] = 24365 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24366 state->afectrl[off_core] = 24367 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); 24368 state->afeoverride[off_core] = 24369 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); 24370 24371 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24372 (0x1 << 2), 0); 24373 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24374 0xa5), (0x1 << 2), (0x1 << 2)); 24375 24376 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), 24377 (0x1 << 2), (0x1 << 2)); 24378 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : 24379 0x8f), (0x1 << 2), (0x1 << 2)); 24380 24381 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24382 state->pwrup[core] = 24383 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24384 TXRXCOUPLE_2G_PWRUP); 24385 state->atten[core] = 24386 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24387 TXRXCOUPLE_2G_ATTEN); 24388 state->pwrup[off_core] = 24389 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24390 TXRXCOUPLE_2G_PWRUP); 24391 state->atten[off_core] = 24392 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24393 TXRXCOUPLE_2G_ATTEN); 24394 24395 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24396 TXRXCOUPLE_2G_PWRUP, 0xc); 24397 24398 if ((pi->pubpi.radiorev == 3) || 24399 (pi->pubpi.radiorev == 4) || 24400 (pi->pubpi.radiorev == 6)) 24401 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24402 TXRXCOUPLE_2G_ATTEN, 0xf0); 24403 else if (pi->pubpi.radiorev == 5) 24404 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24405 TXRXCOUPLE_2G_ATTEN, 24406 (core == 0) ? 0xf7 : 0xf2); 24407 else if ((pi->pubpi.radiorev == 7) 24408 || (pi->pubpi.radiorev == 8)) 24409 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24410 TXRXCOUPLE_2G_ATTEN, 0xf0); 24411 24412 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24413 TXRXCOUPLE_2G_PWRUP, 0x0); 24414 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24415 TXRXCOUPLE_2G_ATTEN, 0xff); 24416 } else { 24417 state->pwrup[core] = 24418 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24419 TXRXCOUPLE_5G_PWRUP); 24420 state->atten[core] = 24421 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24422 TXRXCOUPLE_5G_ATTEN); 24423 state->pwrup[off_core] = 24424 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24425 TXRXCOUPLE_5G_PWRUP); 24426 state->atten[off_core] = 24427 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24428 TXRXCOUPLE_5G_ATTEN); 24429 24430 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24431 TXRXCOUPLE_5G_PWRUP, 0xc); 24432 24433 if ((pi->pubpi.radiorev == 7) 24434 || (pi->pubpi.radiorev == 8)) 24435 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24436 TXRXCOUPLE_5G_ATTEN, 0xf4); 24437 24438 else 24439 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24440 TXRXCOUPLE_5G_ATTEN, 0xf0); 24441 24442 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24443 TXRXCOUPLE_5G_PWRUP, 0x0); 24444 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24445 TXRXCOUPLE_5G_ATTEN, 0xff); 24446 } 24447 24448 tone_freq = 4000; 24449 24450 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24451 24452 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24453 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 24454 24455 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24456 0x2a4, (0x1 << 13), (1) << 13); 24457 24458 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24459 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); 24460 24461 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : 24462 0x2a4, (0x1 << 13), (0) << 13); 24463 24464 } else { 24465 24466 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); 24467 24468 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); 24469 24470 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); 24471 24472 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); 24473 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); 24474 24475 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24476 0xa6 : 0xa7); 24477 state->afeoverride[core] = 24478 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24479 24480 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24481 (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); 24482 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24483 0xa5), 24484 (0x1 << 0) | 24485 (0x1 << 1) | 24486 (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); 24487 24488 state->vga_master[core] = 24489 READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); 24490 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); 24491 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24492 state->fbmix[core] = 24493 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24494 TXFBMIX_G); 24495 state->intpa_master[core] = 24496 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24497 INTPAG_MASTER); 24498 24499 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, 24500 0x03); 24501 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24502 INTPAG_MASTER, 0x04); 24503 } else { 24504 state->fbmix[core] = 24505 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24506 TXFBMIX_A); 24507 state->intpa_master[core] = 24508 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24509 INTPAA_MASTER); 24510 24511 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, 24512 0x03); 24513 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24514 INTPAA_MASTER, 0x04); 24515 24516 } 24517 24518 tone_freq = 4000; 24519 24520 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24521 24522 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24523 0x29b, (0x1 << 0), (1) << 0); 24524 24525 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24526 0x29b, (0x1 << 0), (0) << 0); 24527 24528 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24529 } 24530 } 24531 24532 static void 24533 wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, 24534 struct nphy_papd_restore_state *state) 24535 { 24536 u8 core; 24537 24538 wlc_phy_stopplayback_nphy(pi); 24539 24540 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24541 24542 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24543 24544 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24545 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24546 TXRXCOUPLE_2G_PWRUP, 0); 24547 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24548 TXRXCOUPLE_2G_ATTEN, 24549 state->atten[core]); 24550 } else { 24551 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24552 TXRXCOUPLE_5G_PWRUP, 0); 24553 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24554 TXRXCOUPLE_5G_ATTEN, 24555 state->atten[core]); 24556 } 24557 } 24558 24559 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 24560 wlc_phy_rfctrl_override_nphy_rev7( 24561 pi, (0x1 << 2), 24562 1, 0x3, 0, 24563 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24564 else 24565 wlc_phy_rfctrl_override_nphy_rev7( 24566 pi, (0x1 << 2), 24567 0, 0x3, 1, 24568 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24569 24570 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 24571 0, 0x3, 1, 24572 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24573 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24574 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24575 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, 24576 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24577 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, 24578 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24579 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, 24580 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24581 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, 24582 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24583 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, 24584 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24585 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, 24586 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24587 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24588 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24589 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, 24590 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24591 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, 24592 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24593 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, 24594 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24595 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, 24596 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24597 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, 24598 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24599 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, 24600 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24601 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, 24602 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24603 24604 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24605 24606 write_phy_reg(pi, (core == PHY_CORE_0) ? 24607 0xa6 : 0xa7, state->afectrl[core]); 24608 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24609 0xa5, state->afeoverride[core]); 24610 } 24611 24612 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24613 (state->mm & 0xff)); 24614 24615 if (NREV_IS(pi->pubpi.phy_rev, 7) 24616 || NREV_GE(pi->pubpi.phy_rev, 8)) 24617 wlc_phy_rfctrl_override_nphy_rev7( 24618 pi, (0x1 << 7), 0, 0, 24619 1, 24620 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24621 } else { 24622 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 24623 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); 24624 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); 24625 24626 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); 24627 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); 24628 24629 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24630 24631 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 24632 state->vga_master[core]); 24633 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24634 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24635 TXFBMIX_G, state->fbmix[core]); 24636 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24637 INTPAG_MASTER, 24638 state->intpa_master[core]); 24639 } else { 24640 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24641 TXFBMIX_A, state->fbmix[core]); 24642 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24643 INTPAA_MASTER, 24644 state->intpa_master[core]); 24645 } 24646 24647 write_phy_reg(pi, (core == PHY_CORE_0) ? 24648 0xa6 : 0xa7, state->afectrl[core]); 24649 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24650 0xa5, state->afeoverride[core]); 24651 } 24652 24653 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24654 (state->mm & 0xff)); 24655 24656 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); 24657 } 24658 } 24659 24660 static void 24661 wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32 start, 24662 u32 end) 24663 { 24664 u32 *buf, *src, *dst, sz; 24665 24666 sz = end - start + 1; 24667 24668 buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); 24669 if (NULL == buf) 24670 return; 24671 24672 src = buf; 24673 dst = buf + NPHY_PAPD_EPS_TBL_SIZE; 24674 24675 wlc_phy_table_read_nphy(pi, 24676 (core == 24677 PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : 24678 NPHY_TBL_ID_EPSILONTBL1), 24679 NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); 24680 24681 do { 24682 u32 phy_a1, phy_a2; 24683 s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; 24684 24685 phy_a1 = end - min(end, (winsz >> 1)); 24686 phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, 24687 end + (winsz >> 1)); 24688 phy_a3 = phy_a2 - phy_a1 + 1; 24689 phy_a6 = 0; 24690 phy_a7 = 0; 24691 24692 do { 24693 wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, 24694 &phy_a5); 24695 phy_a6 += phy_a4; 24696 phy_a7 += phy_a5; 24697 } while (phy_a2-- != phy_a1); 24698 24699 phy_a6 /= phy_a3; 24700 phy_a7 /= phy_a3; 24701 dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); 24702 } while (end-- != start); 24703 24704 wlc_phy_table_write_nphy(pi, 24705 (core == 24706 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : 24707 NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); 24708 24709 kfree(buf); 24710 } 24711 24712 static void 24713 wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *txgains, 24714 enum phy_cal_mode cal_mode, u8 core) 24715 { 24716 u16 phy_a1, phy_a2, phy_a3; 24717 u16 phy_a4, phy_a5; 24718 bool phy_a6; 24719 u8 phy_a7, m[2]; 24720 u32 phy_a8 = 0; 24721 struct nphy_txgains phy_a9; 24722 24723 if (NREV_LT(pi->pubpi.phy_rev, 3)) 24724 return; 24725 24726 phy_a7 = (core == PHY_CORE_0) ? 1 : 0; 24727 24728 phy_a6 = ((cal_mode == CAL_GCTRL) 24729 || (cal_mode == CAL_SOFT)) ? true : false; 24730 24731 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24732 24733 phy_a9 = wlc_phy_get_tx_gain_nphy(pi); 24734 24735 if (CHSPEC_IS2G(pi->radio_chanspec)) 24736 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24737 (phy_a9.txgm[core] << 12) | 24738 (phy_a9.pga[core] << 8) | 24739 (txgains->gains.pad[core] << 3) | 24740 (phy_a9.ipa[core])); 24741 else 24742 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24743 (phy_a9.txgm[core] << 12) | 24744 (txgains->gains.pga[core] << 8) | 24745 (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); 24746 24747 wlc_phy_rfctrl_override_1tomany_nphy( 24748 pi, 24749 NPHY_REV7_RfctrlOverride_cmd_txgain, 24750 phy_a5, (1 << core), 0); 24751 24752 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24753 if ((pi->pubpi.radiorev <= 4) 24754 || (pi->pubpi.radiorev == 6)) 24755 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24756 60 : 79; 24757 else 24758 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24759 45 : 64; 24760 } else { 24761 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24762 } 24763 24764 m[phy_a7] = 0; 24765 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24766 24767 phy_a2 = 63; 24768 24769 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24770 if ((pi->pubpi.radiorev == 4) 24771 || (pi->pubpi.radiorev == 6)) { 24772 phy_a1 = 30; 24773 phy_a3 = 30; 24774 } else { 24775 phy_a1 = 25; 24776 phy_a3 = 25; 24777 } 24778 } else { 24779 if ((pi->pubpi.radiorev == 5) 24780 || (pi->pubpi.radiorev == 7) 24781 || (pi->pubpi.radiorev == 8)) { 24782 phy_a1 = 25; 24783 phy_a3 = 25; 24784 } else { 24785 phy_a1 = 35; 24786 phy_a3 = 35; 24787 } 24788 } 24789 24790 if (cal_mode == CAL_GCTRL) { 24791 if ((pi->pubpi.radiorev == 5) 24792 && (CHSPEC_IS2G(pi->radio_chanspec))) 24793 phy_a1 = 55; 24794 else if (((pi->pubpi.radiorev == 7) && 24795 (CHSPEC_IS2G(pi->radio_chanspec))) || 24796 ((pi->pubpi.radiorev == 8) && 24797 (CHSPEC_IS2G(pi->radio_chanspec)))) 24798 phy_a1 = 60; 24799 else 24800 phy_a1 = 63; 24801 24802 } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { 24803 24804 phy_a1 = 35; 24805 phy_a3 = 35; 24806 } 24807 24808 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24809 0x29b, (0x1 << 0), (1) << 0); 24810 24811 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24812 0x29b, (0x1 << 0), (0) << 0); 24813 24814 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24815 0x2a4, (0x1 << 13), (1) << 13); 24816 24817 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24818 0x2a4, (0x1 << 13), (0) << 13); 24819 24820 write_phy_reg(pi, 0x2a1, 0x80); 24821 write_phy_reg(pi, 0x2a2, 0x100); 24822 24823 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24824 0x2a4, (0x7 << 4), (11) << 4); 24825 24826 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24827 0x2a4, (0x7 << 8), (11) << 8); 24828 24829 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24830 0x2a4, (0x7 << 0), (0x3) << 0); 24831 24832 write_phy_reg(pi, 0x2e5, 0x20); 24833 24834 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24835 24836 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24837 24838 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24839 24840 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24841 1, ((core == 0) ? 1 : 2), 0, 24842 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24843 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24844 0, ((core == 0) ? 2 : 1), 0, 24845 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24846 24847 write_phy_reg(pi, 0x2be, 1); 24848 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24849 24850 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24851 0, 0x3, 0, 24852 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24853 24854 wlc_phy_table_write_nphy(pi, 24855 (core == 24856 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24857 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24858 32, &phy_a8); 24859 24860 if (cal_mode != CAL_GCTRL) { 24861 if (CHSPEC_IS5G(pi->radio_chanspec)) 24862 wlc_phy_a1_nphy(pi, core, 5, 0, 35); 24863 } 24864 24865 wlc_phy_rfctrl_override_1tomany_nphy( 24866 pi, 24867 NPHY_REV7_RfctrlOverride_cmd_txgain, 24868 phy_a5, (1 << core), 1); 24869 24870 } else { 24871 24872 if (txgains) { 24873 if (txgains->useindex) { 24874 phy_a4 = 15 - ((txgains->index) >> 3); 24875 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24876 if (NREV_GE(pi->pubpi.phy_rev, 6) && 24877 pi->sh->chip == BCMA_CHIP_ID_BCM47162) { 24878 phy_a5 = 0x10f7 | (phy_a4 << 8); 24879 } else if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24880 phy_a5 = 0x00f7 | (phy_a4 << 8); 24881 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 24882 phy_a5 = 0x10f7 | (phy_a4 << 8); 24883 } else { 24884 phy_a5 = 0x50f7 | (phy_a4 << 8); 24885 } 24886 } else { 24887 phy_a5 = 0x70f7 | (phy_a4 << 8); 24888 } 24889 wlc_phy_rfctrl_override_nphy(pi, 24890 (0x1 << 13), 24891 phy_a5, 24892 (1 << core), 0); 24893 } else { 24894 wlc_phy_rfctrl_override_nphy(pi, 24895 (0x1 << 13), 24896 0x5bf7, 24897 (1 << core), 0); 24898 } 24899 } 24900 24901 if (CHSPEC_IS2G(pi->radio_chanspec)) 24902 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 45 : 64; 24903 else 24904 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24905 24906 m[phy_a7] = 0; 24907 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24908 24909 phy_a2 = 63; 24910 24911 if (cal_mode == CAL_FULL) { 24912 phy_a1 = 25; 24913 phy_a3 = 25; 24914 } else if (cal_mode == CAL_SOFT) { 24915 phy_a1 = 25; 24916 phy_a3 = 25; 24917 } else if (cal_mode == CAL_GCTRL) { 24918 phy_a1 = 63; 24919 phy_a3 = 25; 24920 } else { 24921 24922 phy_a1 = 25; 24923 phy_a3 = 25; 24924 } 24925 24926 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24927 0x29b, (0x1 << 0), (1) << 0); 24928 24929 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24930 0x29b, (0x1 << 0), (0) << 0); 24931 24932 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24933 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24934 0x2a4, (0x1 << 13), (1) << 13); 24935 24936 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24937 0x2a4, (0x1 << 13), (0) << 13); 24938 24939 write_phy_reg(pi, 0x2a1, 0x20); 24940 write_phy_reg(pi, 0x2a2, 0x60); 24941 24942 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24943 0x2a4, (0xf << 4), (9) << 4); 24944 24945 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24946 0x2a4, (0xf << 8), (9) << 8); 24947 24948 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24949 0x2a4, (0xf << 0), (0x2) << 0); 24950 24951 write_phy_reg(pi, 0x2e5, 0x20); 24952 } else { 24953 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24954 0x2a4, (0x1 << 11), (1) << 11); 24955 24956 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24957 0x2a4, (0x1 << 11), (0) << 11); 24958 24959 write_phy_reg(pi, 0x2a1, 0x80); 24960 write_phy_reg(pi, 0x2a2, 0x600); 24961 24962 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24963 0x2a4, (0x7 << 4), (0) << 4); 24964 24965 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24966 0x2a4, (0x7 << 8), (0) << 8); 24967 24968 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24969 0x2a4, (0x7 << 0), (0x3) << 0); 24970 24971 mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); 24972 24973 } 24974 24975 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24976 24977 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24978 24979 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24980 24981 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); 24982 24983 write_phy_reg(pi, 0x2be, 1); 24984 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24985 24986 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24987 24988 wlc_phy_table_write_nphy(pi, 24989 (core == 24990 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24991 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24992 32, &phy_a8); 24993 24994 if (cal_mode != CAL_GCTRL) 24995 wlc_phy_a1_nphy(pi, core, 5, 0, 40); 24996 } 24997 } 24998 24999 static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core) 25000 { 25001 int phy_a1; 25002 int phy_a2; 25003 bool phy_a3; 25004 struct nphy_ipa_txcalgains phy_a4; 25005 bool phy_a5 = false; 25006 bool phy_a6 = true; 25007 s32 phy_a7, phy_a8; 25008 u32 phy_a9; 25009 int phy_a10; 25010 bool phy_a11 = false; 25011 int phy_a12; 25012 u8 phy_a13 = 0; 25013 u8 phy_a14; 25014 u8 *phy_a15 = NULL; 25015 25016 phy_a4.useindex = true; 25017 phy_a12 = start_gain; 25018 25019 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25020 25021 phy_a2 = 20; 25022 phy_a1 = 1; 25023 25024 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25025 if (pi->pubpi.radiorev == 5) { 25026 25027 phy_a15 = pad_gain_codes_used_2057rev5; 25028 phy_a13 = 25029 ARRAY_SIZE(pad_gain_codes_used_2057rev5) - 1; 25030 25031 } else if ((pi->pubpi.radiorev == 7) 25032 || (pi->pubpi.radiorev == 8)) { 25033 25034 phy_a15 = pad_gain_codes_used_2057rev7; 25035 phy_a13 = 25036 ARRAY_SIZE(pad_gain_codes_used_2057rev7) - 1; 25037 25038 } else { 25039 25040 phy_a15 = pad_all_gain_codes_2057; 25041 phy_a13 = ARRAY_SIZE(pad_all_gain_codes_2057) - 25042 1; 25043 } 25044 25045 } else { 25046 25047 phy_a15 = pga_all_gain_codes_2057; 25048 phy_a13 = ARRAY_SIZE(pga_all_gain_codes_2057) - 1; 25049 } 25050 25051 phy_a14 = 0; 25052 25053 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25054 if (CHSPEC_IS2G(pi->radio_chanspec)) 25055 phy_a4.gains.pad[core] = 25056 (u16) phy_a15[phy_a12]; 25057 else 25058 phy_a4.gains.pga[core] = 25059 (u16) phy_a15[phy_a12]; 25060 25061 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25062 25063 wlc_phy_table_read_nphy(pi, 25064 (core == 25065 PHY_CORE_0 ? 25066 NPHY_TBL_ID_EPSILONTBL0 : 25067 NPHY_TBL_ID_EPSILONTBL1), 1, 25068 63, 32, &phy_a9); 25069 25070 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25071 25072 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25073 (phy_a8 == 4095) || (phy_a8 == -4096)); 25074 25075 if (!phy_a6 && (phy_a3 != phy_a5)) { 25076 if (!phy_a3) 25077 phy_a12 -= (u8) phy_a1; 25078 25079 phy_a11 = true; 25080 break; 25081 } 25082 25083 if (phy_a3) 25084 phy_a12 += (u8) phy_a1; 25085 else 25086 phy_a12 -= (u8) phy_a1; 25087 25088 if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { 25089 if (phy_a12 < phy_a14) 25090 phy_a12 = phy_a14; 25091 else 25092 phy_a12 = phy_a13; 25093 25094 phy_a11 = true; 25095 break; 25096 } 25097 25098 phy_a6 = false; 25099 phy_a5 = phy_a3; 25100 } 25101 25102 } else { 25103 phy_a2 = 10; 25104 phy_a1 = 8; 25105 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25106 phy_a4.index = (u8) phy_a12; 25107 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25108 25109 wlc_phy_table_read_nphy(pi, 25110 (core == 25111 PHY_CORE_0 ? 25112 NPHY_TBL_ID_EPSILONTBL0 : 25113 NPHY_TBL_ID_EPSILONTBL1), 1, 25114 63, 32, &phy_a9); 25115 25116 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25117 25118 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25119 (phy_a8 == 4095) || (phy_a8 == -4096)); 25120 25121 if (!phy_a6 && (phy_a3 != phy_a5)) { 25122 if (!phy_a3) 25123 phy_a12 -= (u8) phy_a1; 25124 25125 phy_a11 = true; 25126 break; 25127 } 25128 25129 if (phy_a3) 25130 phy_a12 += (u8) phy_a1; 25131 else 25132 phy_a12 -= (u8) phy_a1; 25133 25134 if ((phy_a12 < 0) || (phy_a12 > 127)) { 25135 if (phy_a12 < 0) 25136 phy_a12 = 0; 25137 else 25138 phy_a12 = 127; 25139 25140 phy_a11 = true; 25141 break; 25142 } 25143 25144 phy_a6 = false; 25145 phy_a5 = phy_a3; 25146 } 25147 25148 } 25149 25150 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25151 return (u8) phy_a15[phy_a12]; 25152 else 25153 return (u8) phy_a12; 25154 25155 } 25156 25157 static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal) 25158 { 25159 struct nphy_ipa_txcalgains phy_b1[2]; 25160 struct nphy_papd_restore_state phy_b2; 25161 bool phy_b3; 25162 u8 phy_b4; 25163 u8 phy_b5; 25164 s16 phy_b6, phy_b7, phy_b8; 25165 u16 phy_b9; 25166 s16 phy_b10, phy_b11, phy_b12; 25167 25168 phy_b11 = 0; 25169 phy_b12 = 0; 25170 phy_b7 = 0; 25171 phy_b8 = 0; 25172 phy_b6 = 0; 25173 25174 if (pi->nphy_papd_skip == 1) 25175 return; 25176 25177 phy_b3 = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 25178 MCTL_EN_MAC)); 25179 if (!phy_b3) 25180 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25181 25182 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25183 25184 pi->nphy_force_papd_cal = false; 25185 25186 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) 25187 pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = 25188 wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); 25189 25190 pi->nphy_papd_last_cal = pi->sh->now; 25191 pi->nphy_papd_recal_counter++; 25192 25193 phy_b4 = pi->nphy_txpwrctrl; 25194 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25195 25196 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, 25197 nphy_papd_scaltbl); 25198 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, 25199 nphy_papd_scaltbl); 25200 25201 phy_b9 = read_phy_reg(pi, 0x01); 25202 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 25203 25204 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25205 s32 i, val = 0; 25206 for (i = 0; i < 64; i++) 25207 wlc_phy_table_write_nphy(pi, 25208 ((phy_b5 == 25209 PHY_CORE_0) ? 25210 NPHY_TBL_ID_EPSILONTBL0 : 25211 NPHY_TBL_ID_EPSILONTBL1), 1, 25212 i, 32, &val); 25213 } 25214 25215 wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); 25216 25217 phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); 25218 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25219 wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); 25220 25221 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25222 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25223 if ((pi->pubpi.radiorev == 3) 25224 || (pi->pubpi.radiorev == 4) 25225 || (pi->pubpi.radiorev == 6)) { 25226 pi->nphy_papd_cal_gain_index[phy_b5] = 25227 23; 25228 } else if (pi->pubpi.radiorev == 5) { 25229 pi->nphy_papd_cal_gain_index[phy_b5] = 25230 0; 25231 pi->nphy_papd_cal_gain_index[phy_b5] = 25232 wlc_phy_a3_nphy( 25233 pi, 25234 pi-> 25235 nphy_papd_cal_gain_index 25236 [phy_b5], 25237 phy_b5); 25238 25239 } else if ((pi->pubpi.radiorev == 7) 25240 || (pi->pubpi.radiorev == 8)) { 25241 25242 pi->nphy_papd_cal_gain_index[phy_b5] = 25243 0; 25244 pi->nphy_papd_cal_gain_index[phy_b5] = 25245 wlc_phy_a3_nphy( 25246 pi, 25247 pi-> 25248 nphy_papd_cal_gain_index 25249 [phy_b5], 25250 phy_b5); 25251 25252 } 25253 25254 phy_b1[phy_b5].gains.pad[phy_b5] = 25255 pi->nphy_papd_cal_gain_index[phy_b5]; 25256 25257 } else { 25258 pi->nphy_papd_cal_gain_index[phy_b5] = 0; 25259 pi->nphy_papd_cal_gain_index[phy_b5] = 25260 wlc_phy_a3_nphy( 25261 pi, 25262 pi-> 25263 nphy_papd_cal_gain_index 25264 [phy_b5], phy_b5); 25265 phy_b1[phy_b5].gains.pga[phy_b5] = 25266 pi->nphy_papd_cal_gain_index[phy_b5]; 25267 } 25268 } else { 25269 phy_b1[phy_b5].useindex = true; 25270 phy_b1[phy_b5].index = 16; 25271 phy_b1[phy_b5].index = 25272 wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, 25273 phy_b5); 25274 25275 pi->nphy_papd_cal_gain_index[phy_b5] = 25276 15 - ((phy_b1[phy_b5].index) >> 3); 25277 } 25278 25279 switch (pi->nphy_papd_cal_type) { 25280 case 0: 25281 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); 25282 break; 25283 case 1: 25284 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); 25285 break; 25286 } 25287 25288 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25289 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25290 } 25291 25292 if (NREV_LT(pi->pubpi.phy_rev, 7)) 25293 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25294 25295 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25296 int eps_offset = 0; 25297 25298 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25299 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25300 if (pi->pubpi.radiorev == 3) 25301 eps_offset = -2; 25302 else if (pi->pubpi.radiorev == 5) 25303 eps_offset = 3; 25304 else 25305 eps_offset = -1; 25306 } else { 25307 eps_offset = 2; 25308 } 25309 25310 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25311 phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; 25312 phy_b10 = 0; 25313 if ((pi->pubpi.radiorev == 3) || 25314 (pi->pubpi.radiorev == 4) || 25315 (pi->pubpi.radiorev == 6)) { 25316 phy_b12 = -( 25317 nphy_papd_padgain_dlt_2g_2057rev3n4 25318 [phy_b8] + 1) / 2; 25319 phy_b10 = -1; 25320 } else if (pi->pubpi.radiorev == 5) { 25321 phy_b12 = -( 25322 nphy_papd_padgain_dlt_2g_2057rev5 25323 [phy_b8] + 1) / 2; 25324 } else if ((pi->pubpi.radiorev == 7) || 25325 (pi->pubpi.radiorev == 8)) { 25326 phy_b12 = -( 25327 nphy_papd_padgain_dlt_2g_2057rev7 25328 [phy_b8] + 1) / 2; 25329 } 25330 } else { 25331 phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; 25332 if ((pi->pubpi.radiorev == 3) || 25333 (pi->pubpi.radiorev == 4) || 25334 (pi->pubpi.radiorev == 6)) 25335 phy_b11 = 25336 -(nphy_papd_pgagain_dlt_5g_2057 25337 [phy_b7] 25338 + 1) / 2; 25339 else if ((pi->pubpi.radiorev == 7) 25340 || (pi->pubpi.radiorev == 8)) 25341 phy_b11 = -( 25342 nphy_papd_pgagain_dlt_5g_2057rev7 25343 [phy_b7] + 1) / 2; 25344 25345 phy_b10 = -9; 25346 } 25347 25348 if (CHSPEC_IS2G(pi->radio_chanspec)) 25349 phy_b6 = 25350 -60 + 27 + eps_offset + phy_b12 + 25351 phy_b10; 25352 else 25353 phy_b6 = 25354 -60 + 27 + eps_offset + phy_b11 + 25355 phy_b10; 25356 25357 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25358 0x29c, (0x1ff << 7), (phy_b6) << 7); 25359 25360 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25361 } else { 25362 if (NREV_LT(pi->pubpi.phy_rev, 5)) 25363 eps_offset = 4; 25364 else 25365 eps_offset = 2; 25366 25367 phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); 25368 25369 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25370 phy_b11 = 25371 -(nphy_papd_pga_gain_delta_ipa_2g[ 25372 phy_b7] + 25373 1) / 2; 25374 phy_b10 = 0; 25375 } else { 25376 phy_b11 = 25377 -(nphy_papd_pga_gain_delta_ipa_5g[ 25378 phy_b7] + 25379 1) / 2; 25380 phy_b10 = -9; 25381 } 25382 25383 phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; 25384 25385 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25386 0x29c, (0x1ff << 7), (phy_b6) << 7); 25387 25388 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25389 } 25390 } 25391 25392 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 25393 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25394 25395 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 25396 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25397 25398 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 25399 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25400 0x2a4, (0x1 << 13), (0) << 13); 25401 25402 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25403 0x2a4, (0x1 << 13), (0) << 13); 25404 25405 } else { 25406 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25407 0x2a4, (0x1 << 11), (0) << 11); 25408 25409 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25410 0x2a4, (0x1 << 11), (0) << 11); 25411 25412 } 25413 pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; 25414 25415 write_phy_reg(pi, 0x01, phy_b9); 25416 25417 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 25418 25419 wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); 25420 if (phy_b4 == PHY_TPC_HW_OFF) { 25421 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25422 (s8) (pi->nphy_txpwrindex[0]. 25423 index_internal), false); 25424 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25425 (s8) (pi->nphy_txpwrindex[1]. 25426 index_internal), false); 25427 } 25428 25429 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25430 25431 if (!phy_b3) 25432 wlapi_enable_mac(pi->sh->physhim); 25433 } 25434 25435 void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype) 25436 { 25437 struct nphy_txgains target_gain; 25438 u8 tx_pwr_ctrl_state; 25439 bool fullcal = true; 25440 bool restore_tx_gain = false; 25441 bool mphase; 25442 25443 if (PHY_MUTED(pi)) 25444 return; 25445 25446 if (caltype == PHY_PERICAL_AUTO) 25447 fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); 25448 else if (caltype == PHY_PERICAL_PARTIAL) 25449 fullcal = false; 25450 25451 if (pi->cal_type_override != PHY_PERICAL_AUTO) 25452 fullcal = 25453 (pi->cal_type_override == 25454 PHY_PERICAL_FULL) ? true : false; 25455 25456 if ((pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT)) { 25457 if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) 25458 wlc_phy_cal_perical_mphase_restart(pi); 25459 } 25460 25461 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL)) 25462 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); 25463 25464 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25465 25466 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25467 25468 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || 25469 (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { 25470 pi->nphy_cal_orig_pwr_idx[0] = 25471 (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); 25472 pi->nphy_cal_orig_pwr_idx[1] = 25473 (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); 25474 25475 if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { 25476 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 25477 0x110, 16, 25478 pi->nphy_cal_orig_tx_gain); 25479 } else { 25480 pi->nphy_cal_orig_tx_gain[0] = 0; 25481 pi->nphy_cal_orig_tx_gain[1] = 0; 25482 } 25483 } 25484 target_gain = wlc_phy_get_tx_gain_nphy(pi); 25485 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 25486 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25487 25488 if (pi->antsel_type == ANTSEL_2x3) 25489 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, true); 25490 25491 mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); 25492 if (!mphase) { 25493 25494 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25495 wlc_phy_precal_txgain_nphy(pi); 25496 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25497 restore_tx_gain = true; 25498 25499 target_gain = pi->nphy_cal_target_gain; 25500 } 25501 if (0 == 25502 wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, 25503 mphase)) { 25504 if (PHY_IPA(pi)) 25505 wlc_phy_a4(pi, true); 25506 25507 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25508 wlapi_enable_mac(pi->sh->physhim); 25509 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 25510 10000); 25511 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25512 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25513 25514 if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, 25515 (pi->first_cal_after_assoc || 25516 (pi->cal_type_override == 25517 PHY_PERICAL_FULL)) ? 2 : 0, false)) { 25518 wlc_phy_savecal_nphy(pi); 25519 25520 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25521 25522 pi->nphy_perical_last = pi->sh->now; 25523 } 25524 } 25525 if (caltype != PHY_PERICAL_AUTO) 25526 wlc_phy_rssi_cal_nphy(pi); 25527 25528 if (pi->first_cal_after_assoc 25529 || (pi->cal_type_override == PHY_PERICAL_FULL)) { 25530 pi->first_cal_after_assoc = false; 25531 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25532 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25533 } 25534 25535 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25536 wlc_phy_radio205x_vcocal_nphy(pi); 25537 } else { 25538 switch (pi->mphase_cal_phase_id) { 25539 case MPHASE_CAL_STATE_INIT: 25540 pi->nphy_perical_last = pi->sh->now; 25541 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25542 25543 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25544 wlc_phy_precal_txgain_nphy(pi); 25545 25546 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25547 pi->mphase_cal_phase_id++; 25548 break; 25549 25550 case MPHASE_CAL_STATE_TXPHASE0: 25551 case MPHASE_CAL_STATE_TXPHASE1: 25552 case MPHASE_CAL_STATE_TXPHASE2: 25553 case MPHASE_CAL_STATE_TXPHASE3: 25554 case MPHASE_CAL_STATE_TXPHASE4: 25555 case MPHASE_CAL_STATE_TXPHASE5: 25556 if ((pi->radar_percal_mask & 0x10) != 0) 25557 pi->nphy_rxcal_active = true; 25558 25559 if (wlc_phy_cal_txiqlo_nphy 25560 (pi, pi->nphy_cal_target_gain, fullcal, 25561 true) != 0) { 25562 25563 wlc_phy_cal_perical_mphase_reset(pi); 25564 break; 25565 } 25566 25567 if (NREV_LE(pi->pubpi.phy_rev, 2) && 25568 (pi->mphase_cal_phase_id == 25569 MPHASE_CAL_STATE_TXPHASE4)) 25570 pi->mphase_cal_phase_id += 2; 25571 else 25572 pi->mphase_cal_phase_id++; 25573 break; 25574 25575 case MPHASE_CAL_STATE_PAPDCAL: 25576 if ((pi->radar_percal_mask & 0x2) != 0) 25577 pi->nphy_rxcal_active = true; 25578 25579 if (PHY_IPA(pi)) 25580 wlc_phy_a4(pi, true); 25581 25582 pi->mphase_cal_phase_id++; 25583 break; 25584 25585 case MPHASE_CAL_STATE_RXCAL: 25586 if ((pi->radar_percal_mask & 0x1) != 0) 25587 pi->nphy_rxcal_active = true; 25588 if (wlc_phy_cal_rxiq_nphy(pi, target_gain, 25589 (pi->first_cal_after_assoc || 25590 (pi->cal_type_override == 25591 PHY_PERICAL_FULL)) ? 2 : 0, 25592 false) == 0) 25593 wlc_phy_savecal_nphy(pi); 25594 25595 pi->mphase_cal_phase_id++; 25596 break; 25597 25598 case MPHASE_CAL_STATE_RSSICAL: 25599 if ((pi->radar_percal_mask & 0x4) != 0) 25600 pi->nphy_rxcal_active = true; 25601 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25602 wlc_phy_rssi_cal_nphy(pi); 25603 25604 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25605 wlc_phy_radio205x_vcocal_nphy(pi); 25606 25607 restore_tx_gain = true; 25608 25609 if (pi->first_cal_after_assoc) 25610 pi->mphase_cal_phase_id++; 25611 else 25612 wlc_phy_cal_perical_mphase_reset(pi); 25613 25614 break; 25615 25616 case MPHASE_CAL_STATE_IDLETSSI: 25617 if ((pi->radar_percal_mask & 0x8) != 0) 25618 pi->nphy_rxcal_active = true; 25619 25620 if (pi->first_cal_after_assoc) { 25621 pi->first_cal_after_assoc = false; 25622 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25623 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25624 } 25625 25626 wlc_phy_cal_perical_mphase_reset(pi); 25627 break; 25628 25629 default: 25630 wlc_phy_cal_perical_mphase_reset(pi); 25631 break; 25632 } 25633 } 25634 25635 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25636 if (restore_tx_gain) { 25637 if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { 25638 25639 wlc_phy_txpwr_index_nphy(pi, 1, 25640 pi-> 25641 nphy_cal_orig_pwr_idx 25642 [0], false); 25643 wlc_phy_txpwr_index_nphy(pi, 2, 25644 pi-> 25645 nphy_cal_orig_pwr_idx 25646 [1], false); 25647 25648 pi->nphy_txpwrindex[0].index = -1; 25649 pi->nphy_txpwrindex[1].index = -1; 25650 } else { 25651 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25652 (s8) (pi-> 25653 nphy_txpwrindex 25654 [0]. 25655 index_internal), 25656 false); 25657 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25658 (s8) (pi-> 25659 nphy_txpwrindex 25660 [1]. 25661 index_internal), 25662 false); 25663 } 25664 } 25665 } 25666 25667 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 25668 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25669 wlapi_enable_mac(pi->sh->physhim); 25670 } 25671 25672 int 25673 wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 25674 bool fullcal, bool mphase) 25675 { 25676 u16 val; 25677 u16 tbl_buf[11]; 25678 u8 cal_cnt; 25679 u16 cal_cmd; 25680 u8 num_cals, max_cal_cmds; 25681 u16 core_no, cal_type; 25682 u16 diq_start = 0; 25683 u8 phy_bw; 25684 u16 max_val; 25685 u16 tone_freq; 25686 u16 gain_save[2]; 25687 u16 cal_gain[2]; 25688 struct nphy_iqcal_params cal_params[2]; 25689 u32 tbl_len; 25690 const void *tbl_ptr; 25691 bool ladder_updated[2]; 25692 u8 mphase_cal_lastphase = 0; 25693 int bcmerror = 0; 25694 bool phyhang_avoid_state = false; 25695 25696 static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { 25697 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, 25698 0x1902, 25699 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, 25700 0x6407 25701 }; 25702 25703 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { 25704 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, 25705 0x3200, 25706 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, 25707 0x6407 25708 }; 25709 25710 static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { 25711 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, 25712 0x1202, 25713 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, 25714 0x4707 25715 }; 25716 25717 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { 25718 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, 25719 0x2300, 25720 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, 25721 0x4707 25722 }; 25723 25724 static const u16 tbl_tx_iqlo_cal_startcoefs[] = { 25725 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25726 0x0000 25727 }; 25728 25729 static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { 25730 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, 25731 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 25732 }; 25733 25734 static const u16 tbl_tx_iqlo_cal_cmds_recal[] = { 25735 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, 25736 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 25737 }; 25738 25739 static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { 25740 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25741 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25742 0x0000 25743 }; 25744 25745 static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { 25746 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, 25747 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 25748 }; 25749 25750 static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { 25751 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, 25752 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 25753 }; 25754 25755 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25756 25757 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 25758 phyhang_avoid_state = pi->phyhang_avoid; 25759 pi->phyhang_avoid = false; 25760 } 25761 25762 if (CHSPEC_IS40(pi->radio_chanspec)) 25763 phy_bw = 40; 25764 else 25765 phy_bw = 20; 25766 25767 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 25768 25769 for (core_no = 0; core_no <= 1; core_no++) { 25770 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 25771 &cal_params[core_no]); 25772 cal_gain[core_no] = cal_params[core_no].cal_gain; 25773 } 25774 25775 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 25776 25777 wlc_phy_txcal_radio_setup_nphy(pi); 25778 25779 wlc_phy_txcal_physetup_nphy(pi); 25780 25781 ladder_updated[0] = ladder_updated[1] = false; 25782 if (!(NREV_GE(pi->pubpi.phy_rev, 6) || 25783 (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) 25784 && (CHSPEC_IS2G(pi->radio_chanspec))))) { 25785 25786 if (phy_bw == 40) { 25787 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; 25788 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); 25789 } else { 25790 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; 25791 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); 25792 } 25793 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, 25794 16, tbl_ptr); 25795 25796 if (phy_bw == 40) { 25797 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; 25798 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); 25799 } else { 25800 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; 25801 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); 25802 } 25803 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, 25804 16, tbl_ptr); 25805 } 25806 25807 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25808 write_phy_reg(pi, 0xc2, 0x8ad9); 25809 else 25810 write_phy_reg(pi, 0xc2, 0x8aa9); 25811 25812 max_val = 250; 25813 tone_freq = (phy_bw == 20) ? 2500 : 5000; 25814 25815 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25816 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); 25817 bcmerror = 0; 25818 } else { 25819 bcmerror = 25820 wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, 25821 false); 25822 } 25823 25824 if (bcmerror == 0) { 25825 25826 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25827 tbl_ptr = pi->mphase_txcal_bestcoeffs; 25828 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25829 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25830 tbl_len -= 2; 25831 } else { 25832 if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { 25833 25834 tbl_ptr = pi->nphy_txiqlocal_bestc; 25835 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25836 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25837 tbl_len -= 2; 25838 } else { 25839 25840 fullcal = true; 25841 25842 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25843 tbl_ptr = 25844 tbl_tx_iqlo_cal_startcoefs_nphyrev3; 25845 tbl_len = ARRAY_SIZE( 25846 tbl_tx_iqlo_cal_startcoefs_nphyrev3); 25847 } else { 25848 tbl_ptr = tbl_tx_iqlo_cal_startcoefs; 25849 tbl_len = ARRAY_SIZE( 25850 tbl_tx_iqlo_cal_startcoefs); 25851 } 25852 } 25853 } 25854 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, 25855 16, tbl_ptr); 25856 25857 if (fullcal) { 25858 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25859 ARRAY_SIZE( 25860 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : 25861 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); 25862 } else { 25863 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25864 ARRAY_SIZE( 25865 tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : 25866 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); 25867 } 25868 25869 if (mphase) { 25870 cal_cnt = pi->mphase_txcal_cmdidx; 25871 if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) 25872 num_cals = cal_cnt + pi->mphase_txcal_numcmds; 25873 else 25874 num_cals = max_cal_cmds; 25875 } else { 25876 cal_cnt = 0; 25877 num_cals = max_cal_cmds; 25878 } 25879 25880 for (; cal_cnt < num_cals; cal_cnt++) { 25881 25882 if (fullcal) { 25883 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25884 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 25885 [cal_cnt] : 25886 tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; 25887 } else { 25888 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25889 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[ 25890 cal_cnt] 25891 : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; 25892 } 25893 25894 core_no = ((cal_cmd & 0x3000) >> 12); 25895 cal_type = ((cal_cmd & 0x0F00) >> 8); 25896 25897 if (NREV_GE(pi->pubpi.phy_rev, 6) || 25898 (NREV_IS(pi->pubpi.phy_rev, 5) && 25899 PHY_IPA(pi) 25900 && (CHSPEC_IS2G(pi->radio_chanspec)))) { 25901 if (!ladder_updated[core_no]) { 25902 wlc_phy_update_txcal_ladder_nphy( 25903 pi, 25904 core_no); 25905 ladder_updated[core_no] = true; 25906 } 25907 } 25908 25909 val = 25910 (cal_params[core_no]. 25911 ncorr[cal_type] << 8) | NPHY_N_GCTL; 25912 write_phy_reg(pi, 0xc1, val); 25913 25914 if ((cal_type == 1) || (cal_type == 3) 25915 || (cal_type == 4)) { 25916 25917 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25918 1, 69 + core_no, 16, 25919 tbl_buf); 25920 25921 diq_start = tbl_buf[0]; 25922 25923 tbl_buf[0] = 0; 25924 wlc_phy_table_write_nphy(pi, 25925 NPHY_TBL_ID_IQLOCAL, 1, 25926 69 + core_no, 16, 25927 tbl_buf); 25928 } 25929 25930 write_phy_reg(pi, 0xc0, cal_cmd); 25931 25932 SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), 25933 20000); 25934 if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, 25935 "HW error: txiq calib")) 25936 return -EIO; 25937 25938 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25939 tbl_len, 96, 16, tbl_buf); 25940 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25941 tbl_len, 64, 16, tbl_buf); 25942 25943 if ((cal_type == 1) || (cal_type == 3) 25944 || (cal_type == 4)) { 25945 25946 tbl_buf[0] = diq_start; 25947 25948 } 25949 25950 } 25951 25952 if (mphase) { 25953 pi->mphase_txcal_cmdidx = num_cals; 25954 if (pi->mphase_txcal_cmdidx >= max_cal_cmds) 25955 pi->mphase_txcal_cmdidx = 0; 25956 } 25957 25958 mphase_cal_lastphase = 25959 (NREV_LE(pi->pubpi.phy_rev, 2)) ? 25960 MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; 25961 25962 if (!mphase 25963 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { 25964 25965 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, 25966 16, tbl_buf); 25967 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 25968 16, tbl_buf); 25969 25970 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 25971 25972 tbl_buf[0] = 0; 25973 tbl_buf[1] = 0; 25974 tbl_buf[2] = 0; 25975 tbl_buf[3] = 0; 25976 25977 } 25978 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 25979 16, tbl_buf); 25980 25981 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, 25982 16, tbl_buf); 25983 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 25984 16, tbl_buf); 25985 25986 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 25987 16, tbl_buf); 25988 25989 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25990 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25991 tbl_len -= 2; 25992 25993 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25994 tbl_len, 96, 16, 25995 pi->nphy_txiqlocal_bestc); 25996 25997 pi->nphy_txiqlocal_coeffsvalid = true; 25998 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25999 } else { 26000 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 26001 if (NREV_LT(pi->pubpi.phy_rev, 3)) 26002 tbl_len -= 2; 26003 26004 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26005 tbl_len, 96, 16, 26006 pi->mphase_txcal_bestcoeffs); 26007 } 26008 26009 wlc_phy_stopplayback_nphy(pi); 26010 26011 write_phy_reg(pi, 0xc2, 0x0000); 26012 26013 } 26014 26015 wlc_phy_txcal_phycleanup_nphy(pi); 26016 26017 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 26018 gain_save); 26019 26020 wlc_phy_txcal_radio_cleanup_nphy(pi); 26021 26022 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 26023 if (!mphase 26024 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) 26025 wlc_phy_tx_iq_war_nphy(pi); 26026 } 26027 26028 if (NREV_GE(pi->pubpi.phy_rev, 4)) 26029 pi->phyhang_avoid = phyhang_avoid_state; 26030 26031 wlc_phy_stay_in_carriersearch_nphy(pi, false); 26032 26033 return bcmerror; 26034 } 26035 26036 static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi) 26037 { 26038 u16 tbl_buf[7]; 26039 26040 if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && 26041 (pi->nphy_txiqlocal_coeffsvalid)) { 26042 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26043 ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); 26044 26045 if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || 26046 (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || 26047 (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || 26048 (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { 26049 26050 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 26051 16, pi->nphy_txiqlocal_bestc); 26052 26053 tbl_buf[0] = 0; 26054 tbl_buf[1] = 0; 26055 tbl_buf[2] = 0; 26056 tbl_buf[3] = 0; 26057 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 26058 16, tbl_buf); 26059 26060 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 26061 16, 26062 &pi->nphy_txiqlocal_bestc[5]); 26063 26064 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 26065 16, 26066 &pi->nphy_txiqlocal_bestc[5]); 26067 } 26068 } 26069 } 26070 26071 void 26072 wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, 26073 struct nphy_iq_comp *pcomp) 26074 { 26075 if (write) { 26076 write_phy_reg(pi, 0x9a, pcomp->a0); 26077 write_phy_reg(pi, 0x9b, pcomp->b0); 26078 write_phy_reg(pi, 0x9c, pcomp->a1); 26079 write_phy_reg(pi, 0x9d, pcomp->b1); 26080 } else { 26081 pcomp->a0 = read_phy_reg(pi, 0x9a); 26082 pcomp->b0 = read_phy_reg(pi, 0x9b); 26083 pcomp->a1 = read_phy_reg(pi, 0x9c); 26084 pcomp->b1 = read_phy_reg(pi, 0x9d); 26085 } 26086 } 26087 26088 void 26089 wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, 26090 u16 num_samps, u8 wait_time, u8 wait_for_crs) 26091 { 26092 u8 core; 26093 26094 write_phy_reg(pi, 0x12b, num_samps); 26095 mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); 26096 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, 26097 (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); 26098 26099 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); 26100 26101 SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), 26102 10000); 26103 if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, 26104 "HW error: rxiq est")) 26105 return; 26106 26107 if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { 26108 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 26109 est[core].i_pwr = 26110 (read_phy_reg(pi, 26111 NPHY_IqestipwrAccHi(core)) << 16) 26112 | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); 26113 est[core].q_pwr = 26114 (read_phy_reg(pi, 26115 NPHY_IqestqpwrAccHi(core)) << 16) 26116 | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); 26117 est[core].iq_prod = 26118 (read_phy_reg(pi, 26119 NPHY_IqestIqAccHi(core)) << 16) | 26120 read_phy_reg(pi, NPHY_IqestIqAccLo(core)); 26121 } 26122 } 26123 } 26124 26125 #define CAL_RETRY_CNT 2 26126 static void wlc_phy_calc_rx_iq_comp_nphy(struct brcms_phy *pi, u8 core_mask) 26127 { 26128 u8 curr_core; 26129 struct phy_iq_est est[PHY_CORE_MAX]; 26130 struct nphy_iq_comp old_comp, new_comp; 26131 s32 iq = 0; 26132 u32 ii = 0, qq = 0; 26133 s16 iq_nbits, qq_nbits, brsh, arsh; 26134 s32 a, b, temp; 26135 int bcmerror = 0; 26136 uint cal_retry = 0; 26137 26138 if (core_mask == 0x0) 26139 return; 26140 26141 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); 26142 new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; 26143 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26144 26145 cal_try: 26146 wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); 26147 26148 new_comp = old_comp; 26149 26150 for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { 26151 26152 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26153 iq = est[curr_core].iq_prod; 26154 ii = est[curr_core].i_pwr; 26155 qq = est[curr_core].q_pwr; 26156 } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26157 iq = est[curr_core].iq_prod; 26158 ii = est[curr_core].i_pwr; 26159 qq = est[curr_core].q_pwr; 26160 } else { 26161 continue; 26162 } 26163 26164 if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { 26165 bcmerror = -EBADE; 26166 break; 26167 } 26168 26169 iq_nbits = wlc_phy_nbits(iq); 26170 qq_nbits = wlc_phy_nbits(qq); 26171 26172 arsh = 10 - (30 - iq_nbits); 26173 if (arsh >= 0) { 26174 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); 26175 temp = (s32) (ii >> arsh); 26176 if (temp == 0) { 26177 bcmerror = -EBADE; 26178 break; 26179 } 26180 } else { 26181 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); 26182 temp = (s32) (ii << -arsh); 26183 if (temp == 0) { 26184 bcmerror = -EBADE; 26185 break; 26186 } 26187 } 26188 26189 a /= temp; 26190 26191 brsh = qq_nbits - 31 + 20; 26192 if (brsh >= 0) { 26193 b = (qq << (31 - qq_nbits)); 26194 temp = (s32) (ii >> brsh); 26195 if (temp == 0) { 26196 bcmerror = -EBADE; 26197 break; 26198 } 26199 } else { 26200 b = (qq << (31 - qq_nbits)); 26201 temp = (s32) (ii << -brsh); 26202 if (temp == 0) { 26203 bcmerror = -EBADE; 26204 break; 26205 } 26206 } 26207 b /= temp; 26208 b -= a * a; 26209 b = (s32) int_sqrt((unsigned long) b); 26210 b -= (1 << 10); 26211 26212 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26213 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26214 new_comp.a0 = (s16) a & 0x3ff; 26215 new_comp.b0 = (s16) b & 0x3ff; 26216 } else { 26217 26218 new_comp.a0 = (s16) b & 0x3ff; 26219 new_comp.b0 = (s16) a & 0x3ff; 26220 } 26221 } 26222 if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26223 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26224 new_comp.a1 = (s16) a & 0x3ff; 26225 new_comp.b1 = (s16) b & 0x3ff; 26226 } else { 26227 26228 new_comp.a1 = (s16) b & 0x3ff; 26229 new_comp.b1 = (s16) a & 0x3ff; 26230 } 26231 } 26232 } 26233 26234 if (bcmerror != 0) { 26235 pr_debug("%s: Failed, cnt = %d\n", __func__, cal_retry); 26236 26237 if (cal_retry < CAL_RETRY_CNT) { 26238 cal_retry++; 26239 goto cal_try; 26240 } 26241 26242 new_comp = old_comp; 26243 } 26244 26245 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26246 } 26247 26248 static void wlc_phy_rxcal_radio_setup_nphy(struct brcms_phy *pi, u8 rx_core) 26249 { 26250 u16 offtune_val; 26251 u16 bias_g = 0; 26252 u16 bias_a = 0; 26253 26254 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26255 if (rx_core == PHY_CORE_0) { 26256 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26257 pi->tx_rx_cal_radio_saveregs[0] = 26258 read_radio_reg(pi, 26259 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); 26260 pi->tx_rx_cal_radio_saveregs[1] = 26261 read_radio_reg(pi, 26262 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); 26263 26264 write_radio_reg(pi, 26265 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26266 0x3); 26267 write_radio_reg(pi, 26268 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26269 0xaf); 26270 26271 } else { 26272 pi->tx_rx_cal_radio_saveregs[0] = 26273 read_radio_reg(pi, 26274 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); 26275 pi->tx_rx_cal_radio_saveregs[1] = 26276 read_radio_reg(pi, 26277 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); 26278 26279 write_radio_reg( 26280 pi, 26281 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26282 0x3); 26283 write_radio_reg( 26284 pi, 26285 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26286 0x7f); 26287 } 26288 26289 } else { 26290 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26291 pi->tx_rx_cal_radio_saveregs[0] = 26292 read_radio_reg(pi, 26293 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); 26294 pi->tx_rx_cal_radio_saveregs[1] = 26295 read_radio_reg(pi, 26296 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); 26297 26298 write_radio_reg( 26299 pi, 26300 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26301 0x3); 26302 write_radio_reg( 26303 pi, 26304 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26305 0xaf); 26306 26307 } else { 26308 pi->tx_rx_cal_radio_saveregs[0] = 26309 read_radio_reg(pi, 26310 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); 26311 pi->tx_rx_cal_radio_saveregs[1] = 26312 read_radio_reg(pi, 26313 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); 26314 26315 write_radio_reg(pi, 26316 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26317 0x3); 26318 write_radio_reg(pi, 26319 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26320 0x7f); 26321 } 26322 } 26323 26324 } else { 26325 if (rx_core == PHY_CORE_0) { 26326 pi->tx_rx_cal_radio_saveregs[0] = 26327 read_radio_reg(pi, 26328 RADIO_2056_TX_RXIQCAL_TXMUX | 26329 RADIO_2056_TX1); 26330 pi->tx_rx_cal_radio_saveregs[1] = 26331 read_radio_reg(pi, 26332 RADIO_2056_RX_RXIQCAL_RXMUX | 26333 RADIO_2056_RX0); 26334 26335 if (pi->pubpi.radiorev >= 5) { 26336 pi->tx_rx_cal_radio_saveregs[2] = 26337 read_radio_reg(pi, 26338 RADIO_2056_RX_RXSPARE2 | 26339 RADIO_2056_RX0); 26340 pi->tx_rx_cal_radio_saveregs[3] = 26341 read_radio_reg(pi, 26342 RADIO_2056_TX_TXSPARE2 | 26343 RADIO_2056_TX1); 26344 } 26345 26346 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26347 26348 if (pi->pubpi.radiorev >= 5) { 26349 pi->tx_rx_cal_radio_saveregs[4] = 26350 read_radio_reg(pi, 26351 RADIO_2056_RX_LNAA_MASTER 26352 | RADIO_2056_RX0); 26353 26354 write_radio_reg( 26355 pi, 26356 RADIO_2056_RX_LNAA_MASTER 26357 | RADIO_2056_RX0, 0x40); 26358 26359 write_radio_reg(pi, 26360 RADIO_2056_TX_TXSPARE2 | 26361 RADIO_2056_TX1, bias_a); 26362 26363 write_radio_reg(pi, 26364 RADIO_2056_RX_RXSPARE2 | 26365 RADIO_2056_RX0, bias_a); 26366 } else { 26367 pi->tx_rx_cal_radio_saveregs[4] = 26368 read_radio_reg(pi, 26369 RADIO_2056_RX_LNAA_TUNE 26370 | RADIO_2056_RX0); 26371 26372 offtune_val = 26373 (pi->tx_rx_cal_radio_saveregs 26374 [2] & 0xF0) >> 8; 26375 offtune_val = 26376 (offtune_val <= 0x7) ? 0xF : 0; 26377 26378 mod_radio_reg(pi, 26379 RADIO_2056_RX_LNAA_TUNE | 26380 RADIO_2056_RX0, 0xF0, 26381 (offtune_val << 8)); 26382 } 26383 26384 write_radio_reg(pi, 26385 RADIO_2056_TX_RXIQCAL_TXMUX | 26386 RADIO_2056_TX1, 0x9); 26387 write_radio_reg(pi, 26388 RADIO_2056_RX_RXIQCAL_RXMUX | 26389 RADIO_2056_RX0, 0x9); 26390 } else { 26391 if (pi->pubpi.radiorev >= 5) { 26392 pi->tx_rx_cal_radio_saveregs[4] = 26393 read_radio_reg( 26394 pi, 26395 RADIO_2056_RX_LNAG_MASTER 26396 | RADIO_2056_RX0); 26397 26398 write_radio_reg( 26399 pi, 26400 RADIO_2056_RX_LNAG_MASTER 26401 | RADIO_2056_RX0, 0x40); 26402 26403 write_radio_reg( 26404 pi, 26405 RADIO_2056_TX_TXSPARE2 26406 | 26407 RADIO_2056_TX1, bias_g); 26408 26409 write_radio_reg( 26410 pi, 26411 RADIO_2056_RX_RXSPARE2 26412 | 26413 RADIO_2056_RX0, bias_g); 26414 26415 } else { 26416 pi->tx_rx_cal_radio_saveregs[4] = 26417 read_radio_reg( 26418 pi, 26419 RADIO_2056_RX_LNAG_TUNE 26420 | RADIO_2056_RX0); 26421 26422 offtune_val = 26423 (pi-> 26424 tx_rx_cal_radio_saveregs[2] & 26425 0xF0) >> 8; 26426 offtune_val = 26427 (offtune_val <= 0x7) ? 0xF : 0; 26428 26429 mod_radio_reg(pi, 26430 RADIO_2056_RX_LNAG_TUNE | 26431 RADIO_2056_RX0, 0xF0, 26432 (offtune_val << 8)); 26433 } 26434 26435 write_radio_reg(pi, 26436 RADIO_2056_TX_RXIQCAL_TXMUX | 26437 RADIO_2056_TX1, 0x6); 26438 write_radio_reg(pi, 26439 RADIO_2056_RX_RXIQCAL_RXMUX | 26440 RADIO_2056_RX0, 0x6); 26441 } 26442 26443 } else { 26444 pi->tx_rx_cal_radio_saveregs[0] = 26445 read_radio_reg(pi, 26446 RADIO_2056_TX_RXIQCAL_TXMUX | 26447 RADIO_2056_TX0); 26448 pi->tx_rx_cal_radio_saveregs[1] = 26449 read_radio_reg(pi, 26450 RADIO_2056_RX_RXIQCAL_RXMUX | 26451 RADIO_2056_RX1); 26452 26453 if (pi->pubpi.radiorev >= 5) { 26454 pi->tx_rx_cal_radio_saveregs[2] = 26455 read_radio_reg(pi, 26456 RADIO_2056_RX_RXSPARE2 | 26457 RADIO_2056_RX1); 26458 pi->tx_rx_cal_radio_saveregs[3] = 26459 read_radio_reg(pi, 26460 RADIO_2056_TX_TXSPARE2 | 26461 RADIO_2056_TX0); 26462 } 26463 26464 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26465 26466 if (pi->pubpi.radiorev >= 5) { 26467 pi->tx_rx_cal_radio_saveregs[4] = 26468 read_radio_reg( 26469 pi, 26470 RADIO_2056_RX_LNAA_MASTER 26471 | RADIO_2056_RX1); 26472 26473 write_radio_reg( 26474 pi, 26475 RADIO_2056_RX_LNAA_MASTER | 26476 RADIO_2056_RX1, 0x40); 26477 26478 write_radio_reg( 26479 pi, 26480 RADIO_2056_TX_TXSPARE2 26481 | 26482 RADIO_2056_TX0, bias_a); 26483 26484 write_radio_reg( 26485 pi, 26486 RADIO_2056_RX_RXSPARE2 26487 | 26488 RADIO_2056_RX1, bias_a); 26489 } else { 26490 pi->tx_rx_cal_radio_saveregs[4] = 26491 read_radio_reg( 26492 pi, 26493 RADIO_2056_RX_LNAA_TUNE 26494 | RADIO_2056_RX1); 26495 26496 offtune_val = 26497 (pi-> 26498 tx_rx_cal_radio_saveregs[2] & 26499 0xF0) >> 8; 26500 offtune_val = 26501 (offtune_val <= 0x7) ? 0xF : 0; 26502 26503 mod_radio_reg(pi, 26504 RADIO_2056_RX_LNAA_TUNE | 26505 RADIO_2056_RX1, 0xF0, 26506 (offtune_val << 8)); 26507 } 26508 26509 write_radio_reg(pi, 26510 RADIO_2056_TX_RXIQCAL_TXMUX | 26511 RADIO_2056_TX0, 0x9); 26512 write_radio_reg(pi, 26513 RADIO_2056_RX_RXIQCAL_RXMUX | 26514 RADIO_2056_RX1, 0x9); 26515 } else { 26516 if (pi->pubpi.radiorev >= 5) { 26517 pi->tx_rx_cal_radio_saveregs[4] = 26518 read_radio_reg( 26519 pi, 26520 RADIO_2056_RX_LNAG_MASTER 26521 | RADIO_2056_RX1); 26522 26523 write_radio_reg( 26524 pi, 26525 RADIO_2056_RX_LNAG_MASTER 26526 | RADIO_2056_RX1, 0x40); 26527 26528 write_radio_reg( 26529 pi, 26530 RADIO_2056_TX_TXSPARE2 26531 | 26532 RADIO_2056_TX0, bias_g); 26533 26534 write_radio_reg( 26535 pi, 26536 RADIO_2056_RX_RXSPARE2 26537 | 26538 RADIO_2056_RX1, bias_g); 26539 } else { 26540 pi->tx_rx_cal_radio_saveregs[4] = 26541 read_radio_reg( 26542 pi, 26543 RADIO_2056_RX_LNAG_TUNE 26544 | RADIO_2056_RX1); 26545 26546 offtune_val = 26547 (pi-> 26548 tx_rx_cal_radio_saveregs[2] & 26549 0xF0) >> 8; 26550 offtune_val = 26551 (offtune_val <= 0x7) ? 0xF : 0; 26552 26553 mod_radio_reg(pi, 26554 RADIO_2056_RX_LNAG_TUNE | 26555 RADIO_2056_RX1, 0xF0, 26556 (offtune_val << 8)); 26557 } 26558 26559 write_radio_reg(pi, 26560 RADIO_2056_TX_RXIQCAL_TXMUX | 26561 RADIO_2056_TX0, 0x6); 26562 write_radio_reg(pi, 26563 RADIO_2056_RX_RXIQCAL_RXMUX | 26564 RADIO_2056_RX1, 0x6); 26565 } 26566 } 26567 } 26568 } 26569 26570 static void wlc_phy_rxcal_radio_cleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26571 { 26572 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26573 if (rx_core == PHY_CORE_0) { 26574 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26575 write_radio_reg( 26576 pi, 26577 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26578 pi-> 26579 tx_rx_cal_radio_saveregs[0]); 26580 write_radio_reg( 26581 pi, 26582 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26583 pi-> 26584 tx_rx_cal_radio_saveregs[1]); 26585 26586 } else { 26587 write_radio_reg( 26588 pi, 26589 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26590 pi-> 26591 tx_rx_cal_radio_saveregs[0]); 26592 write_radio_reg( 26593 pi, 26594 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26595 pi-> 26596 tx_rx_cal_radio_saveregs[1]); 26597 } 26598 26599 } else { 26600 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26601 write_radio_reg( 26602 pi, 26603 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26604 pi-> 26605 tx_rx_cal_radio_saveregs[0]); 26606 write_radio_reg( 26607 pi, 26608 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26609 pi-> 26610 tx_rx_cal_radio_saveregs[1]); 26611 26612 } else { 26613 write_radio_reg( 26614 pi, 26615 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26616 pi-> 26617 tx_rx_cal_radio_saveregs[0]); 26618 write_radio_reg( 26619 pi, 26620 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26621 pi-> 26622 tx_rx_cal_radio_saveregs[1]); 26623 } 26624 } 26625 26626 } else { 26627 if (rx_core == PHY_CORE_0) { 26628 write_radio_reg(pi, 26629 RADIO_2056_TX_RXIQCAL_TXMUX | 26630 RADIO_2056_TX1, 26631 pi->tx_rx_cal_radio_saveregs[0]); 26632 26633 write_radio_reg(pi, 26634 RADIO_2056_RX_RXIQCAL_RXMUX | 26635 RADIO_2056_RX0, 26636 pi->tx_rx_cal_radio_saveregs[1]); 26637 26638 if (pi->pubpi.radiorev >= 5) { 26639 write_radio_reg(pi, 26640 RADIO_2056_RX_RXSPARE2 | 26641 RADIO_2056_RX0, 26642 pi-> 26643 tx_rx_cal_radio_saveregs[2]); 26644 26645 write_radio_reg(pi, 26646 RADIO_2056_TX_TXSPARE2 | 26647 RADIO_2056_TX1, 26648 pi-> 26649 tx_rx_cal_radio_saveregs[3]); 26650 } 26651 26652 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26653 if (pi->pubpi.radiorev >= 5) 26654 write_radio_reg( 26655 pi, 26656 RADIO_2056_RX_LNAA_MASTER 26657 | RADIO_2056_RX0, 26658 pi-> 26659 tx_rx_cal_radio_saveregs 26660 [4]); 26661 else 26662 write_radio_reg( 26663 pi, 26664 RADIO_2056_RX_LNAA_TUNE 26665 | RADIO_2056_RX0, 26666 pi-> 26667 tx_rx_cal_radio_saveregs 26668 [4]); 26669 } else { 26670 if (pi->pubpi.radiorev >= 5) 26671 write_radio_reg( 26672 pi, 26673 RADIO_2056_RX_LNAG_MASTER 26674 | RADIO_2056_RX0, 26675 pi-> 26676 tx_rx_cal_radio_saveregs 26677 [4]); 26678 else 26679 write_radio_reg( 26680 pi, 26681 RADIO_2056_RX_LNAG_TUNE 26682 | RADIO_2056_RX0, 26683 pi-> 26684 tx_rx_cal_radio_saveregs 26685 [4]); 26686 } 26687 26688 } else { 26689 write_radio_reg(pi, 26690 RADIO_2056_TX_RXIQCAL_TXMUX | 26691 RADIO_2056_TX0, 26692 pi->tx_rx_cal_radio_saveregs[0]); 26693 26694 write_radio_reg(pi, 26695 RADIO_2056_RX_RXIQCAL_RXMUX | 26696 RADIO_2056_RX1, 26697 pi->tx_rx_cal_radio_saveregs[1]); 26698 26699 if (pi->pubpi.radiorev >= 5) { 26700 write_radio_reg(pi, 26701 RADIO_2056_RX_RXSPARE2 | 26702 RADIO_2056_RX1, 26703 pi-> 26704 tx_rx_cal_radio_saveregs[2]); 26705 26706 write_radio_reg(pi, 26707 RADIO_2056_TX_TXSPARE2 | 26708 RADIO_2056_TX0, 26709 pi-> 26710 tx_rx_cal_radio_saveregs[3]); 26711 } 26712 26713 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26714 if (pi->pubpi.radiorev >= 5) 26715 write_radio_reg( 26716 pi, 26717 RADIO_2056_RX_LNAA_MASTER 26718 | RADIO_2056_RX1, 26719 pi-> 26720 tx_rx_cal_radio_saveregs 26721 [4]); 26722 else 26723 write_radio_reg( 26724 pi, 26725 RADIO_2056_RX_LNAA_TUNE 26726 | RADIO_2056_RX1, 26727 pi-> 26728 tx_rx_cal_radio_saveregs 26729 [4]); 26730 } else { 26731 if (pi->pubpi.radiorev >= 5) 26732 write_radio_reg( 26733 pi, 26734 RADIO_2056_RX_LNAG_MASTER 26735 | RADIO_2056_RX1, 26736 pi-> 26737 tx_rx_cal_radio_saveregs 26738 [4]); 26739 else 26740 write_radio_reg( 26741 pi, 26742 RADIO_2056_RX_LNAG_TUNE 26743 | RADIO_2056_RX1, 26744 pi-> 26745 tx_rx_cal_radio_saveregs 26746 [4]); 26747 } 26748 } 26749 } 26750 } 26751 26752 static void wlc_phy_rxcal_physetup_nphy(struct brcms_phy *pi, u8 rx_core) 26753 { 26754 u8 tx_core; 26755 u16 rx_antval, tx_antval; 26756 26757 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26758 tx_core = rx_core; 26759 else 26760 tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; 26761 26762 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); 26763 pi->tx_rx_cal_phy_saveregs[1] = 26764 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); 26765 pi->tx_rx_cal_phy_saveregs[2] = 26766 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); 26767 pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); 26768 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); 26769 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); 26770 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); 26771 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); 26772 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); 26773 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26774 pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); 26775 pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); 26776 pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); 26777 pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); 26778 } 26779 26780 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 26781 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 26782 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 26783 0x29b, (0x1 << 0), (0) << 0); 26784 26785 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 26786 0x29b, (0x1 << 0), (0) << 0); 26787 26788 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26789 26790 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26791 26792 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); 26793 26794 } else { 26795 26796 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 26797 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26798 mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); 26799 mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); 26800 } 26801 26802 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); 26803 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26804 (0x1 << 2), (0x1 << 2)); 26805 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 26806 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 26807 (0x1 << 0) | (0x1 << 1), 0); 26808 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 26809 0x8f : 0xa5, 26810 (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); 26811 } 26812 26813 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, 26814 RADIO_MIMO_CORESEL_CORE1 | 26815 RADIO_MIMO_CORESEL_CORE2); 26816 26817 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26818 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 26819 0, 0, 0, 26820 NPHY_REV7_RFCTRLOVERRIDE_ID0); 26821 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, 26822 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26823 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, 26824 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26825 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, 26826 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26827 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, 26828 NPHY_REV7_RFCTRLOVERRIDE_ID2); 26829 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, 26830 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26831 if (CHSPEC_IS40(pi->radio_chanspec)) 26832 wlc_phy_rfctrl_override_nphy_rev7( 26833 pi, 26834 (0x1 << 7), 26835 2, 0, 0, 26836 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26837 else 26838 wlc_phy_rfctrl_override_nphy_rev7( 26839 pi, 26840 (0x1 << 7), 26841 0, 0, 0, 26842 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26843 26844 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 26845 0, 0, 0, 26846 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26847 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, 26848 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26849 } else { 26850 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); 26851 } 26852 26853 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 26854 26855 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26856 26857 wlc_phy_rfctrlintc_override_nphy(pi, 26858 NPHY_RfctrlIntc_override_TRSW, 26859 0x1, rx_core + 1); 26860 } else { 26861 26862 if (rx_core == PHY_CORE_0) { 26863 rx_antval = 0x1; 26864 tx_antval = 0x8; 26865 } else { 26866 rx_antval = 0x4; 26867 tx_antval = 0x2; 26868 } 26869 26870 wlc_phy_rfctrlintc_override_nphy(pi, 26871 NPHY_RfctrlIntc_override_TRSW, 26872 rx_antval, rx_core + 1); 26873 wlc_phy_rfctrlintc_override_nphy(pi, 26874 NPHY_RfctrlIntc_override_TRSW, 26875 tx_antval, tx_core + 1); 26876 } 26877 } 26878 26879 static void wlc_phy_rxcal_phycleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26880 { 26881 26882 write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); 26883 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, 26884 pi->tx_rx_cal_phy_saveregs[1]); 26885 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26886 pi->tx_rx_cal_phy_saveregs[2]); 26887 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); 26888 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); 26889 26890 write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); 26891 write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); 26892 write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); 26893 write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); 26894 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26895 write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); 26896 write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); 26897 write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); 26898 write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); 26899 } 26900 26901 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 26902 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 26903 } 26904 26905 static void 26906 wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rx_core, 26907 u16 *rxgain, u8 cal_type) 26908 { 26909 26910 u16 num_samps; 26911 struct phy_iq_est est[PHY_CORE_MAX]; 26912 u8 tx_core; 26913 struct nphy_iq_comp save_comp, zero_comp; 26914 u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, 26915 thresh_pwr = 10000; 26916 s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; 26917 bool gainctrl_done = false; 26918 u8 mix_tia_gain = 3; 26919 s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; 26920 s8 curr_gaintbl_index = 3; 26921 u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; 26922 const struct nphy_ipa_txrxgain *nphy_rxcal_gaintbl; 26923 u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; 26924 int fine_gain_idx; 26925 s8 txpwrindex; 26926 u16 nphy_rxcal_txgain[2]; 26927 26928 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26929 tx_core = rx_core; 26930 else 26931 tx_core = 1 - rx_core; 26932 26933 num_samps = 1024; 26934 desired_log2_pwr = 13; 26935 26936 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); 26937 zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; 26938 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); 26939 26940 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26941 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26942 mix_tia_gain = 3; 26943 else if (NREV_GE(pi->pubpi.phy_rev, 4)) 26944 mix_tia_gain = 4; 26945 else 26946 mix_tia_gain = 6; 26947 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26948 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; 26949 else 26950 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; 26951 } else { 26952 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26953 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; 26954 else 26955 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; 26956 } 26957 26958 do { 26959 26960 hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? 26961 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; 26962 lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; 26963 lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; 26964 lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; 26965 lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; 26966 txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; 26967 26968 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26969 wlc_phy_rfctrl_override_1tomany_nphy( 26970 pi, 26971 NPHY_REV7_RfctrlOverride_cmd_rxgain, 26972 ((lpf_biq1 << 12) | 26973 (lpf_biq0 << 8) | 26974 (mix_tia_gain << 4) | (lna2 << 2) 26975 | lna1), 0x3, 0); 26976 else 26977 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 26978 ((hpvga << 12) | 26979 (lpf_biq1 << 10) | 26980 (lpf_biq0 << 8) | 26981 (mix_tia_gain << 4) | 26982 (lna2 << 2) | lna1), 0x3, 26983 0); 26984 26985 pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; 26986 26987 if (txpwrindex == -1) { 26988 nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; 26989 nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; 26990 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 26991 2, 0x110, 16, 26992 nphy_rxcal_txgain); 26993 } else { 26994 wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, 26995 false); 26996 } 26997 26998 wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? 26999 NPHY_RXCAL_TONEFREQ_40MHz : 27000 NPHY_RXCAL_TONEFREQ_20MHz, 27001 NPHY_RXCAL_TONEAMP, 0, cal_type, false); 27002 27003 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27004 i_pwr = (est[rx_core].i_pwr + num_samps / 2) / num_samps; 27005 q_pwr = (est[rx_core].q_pwr + num_samps / 2) / num_samps; 27006 curr_pwr = i_pwr + q_pwr; 27007 27008 switch (gainctrl_dirn) { 27009 case NPHY_RXCAL_GAIN_INIT: 27010 if (curr_pwr > thresh_pwr) { 27011 gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; 27012 prev_gaintbl_index = curr_gaintbl_index; 27013 curr_gaintbl_index--; 27014 } else { 27015 gainctrl_dirn = NPHY_RXCAL_GAIN_UP; 27016 prev_gaintbl_index = curr_gaintbl_index; 27017 curr_gaintbl_index++; 27018 } 27019 break; 27020 27021 case NPHY_RXCAL_GAIN_UP: 27022 if (curr_pwr > thresh_pwr) { 27023 gainctrl_done = true; 27024 optim_pwr = prev_pwr; 27025 optim_gaintbl_index = prev_gaintbl_index; 27026 } else { 27027 prev_gaintbl_index = curr_gaintbl_index; 27028 curr_gaintbl_index++; 27029 } 27030 break; 27031 27032 case NPHY_RXCAL_GAIN_DOWN: 27033 if (curr_pwr > thresh_pwr) { 27034 prev_gaintbl_index = curr_gaintbl_index; 27035 curr_gaintbl_index--; 27036 } else { 27037 gainctrl_done = true; 27038 optim_pwr = curr_pwr; 27039 optim_gaintbl_index = curr_gaintbl_index; 27040 } 27041 break; 27042 27043 default: 27044 break; 27045 } 27046 27047 if ((curr_gaintbl_index < 0) || 27048 (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { 27049 gainctrl_done = true; 27050 optim_pwr = curr_pwr; 27051 optim_gaintbl_index = prev_gaintbl_index; 27052 } else { 27053 prev_pwr = curr_pwr; 27054 } 27055 27056 wlc_phy_stopplayback_nphy(pi); 27057 } while (!gainctrl_done); 27058 27059 hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; 27060 lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; 27061 lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; 27062 lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; 27063 lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; 27064 txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; 27065 27066 actual_log2_pwr = wlc_phy_nbits(optim_pwr); 27067 delta_pwr = desired_log2_pwr - actual_log2_pwr; 27068 27069 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 27070 fine_gain_idx = (int)lpf_biq1 + delta_pwr; 27071 27072 if (fine_gain_idx + (int)lpf_biq0 > 10) 27073 lpf_biq1 = 10 - lpf_biq0; 27074 else 27075 lpf_biq1 = (u16) max(fine_gain_idx, 0); 27076 27077 wlc_phy_rfctrl_override_1tomany_nphy( 27078 pi, 27079 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27080 ((lpf_biq1 << 12) | 27081 (lpf_biq0 << 8) | 27082 (mix_tia_gain << 4) | 27083 (lna2 << 2) | lna1), 0x3, 27084 0); 27085 } else { 27086 hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); 27087 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 27088 ((hpvga << 12) | 27089 (lpf_biq1 << 10) | 27090 (lpf_biq0 << 8) | 27091 (mix_tia_gain << 4) | 27092 (lna2 << 2) | 27093 lna1), 0x3, 0); 27094 } 27095 27096 if (rxgain != NULL) { 27097 *rxgain++ = lna1; 27098 *rxgain++ = lna2; 27099 *rxgain++ = mix_tia_gain; 27100 *rxgain++ = lpf_biq0; 27101 *rxgain++ = lpf_biq1; 27102 *rxgain = hpvga; 27103 } 27104 27105 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); 27106 } 27107 27108 static void 27109 wlc_phy_rxcal_gainctrl_nphy(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, 27110 u8 cal_type) 27111 { 27112 wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); 27113 } 27114 27115 static u8 27116 wlc_phy_rc_sweep_nphy(struct brcms_phy *pi, u8 core_idx, u8 loopback_type) 27117 { 27118 u32 target_bws[2] = { 9500, 21000 }; 27119 u32 ref_tones[2] = { 3000, 6000 }; 27120 u32 target_bw, ref_tone; 27121 27122 u32 target_pwr_ratios[2] = { 28606, 18468 }; 27123 u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; 27124 27125 u16 start_rccal_ovr_val = 128; 27126 u16 txlpf_rccal_lpc_ovr_val = 128; 27127 u16 rxlpf_rccal_hpc_ovr_val = 159; 27128 27129 u16 orig_txlpf_rccal_lpc_ovr_val; 27130 u16 orig_rxlpf_rccal_hpc_ovr_val; 27131 u16 radio_addr_offset_rx; 27132 u16 radio_addr_offset_tx; 27133 u16 orig_dcBypass; 27134 u16 orig_RxStrnFilt40Num[6]; 27135 u16 orig_RxStrnFilt40Den[4]; 27136 u16 orig_rfctrloverride[2]; 27137 u16 orig_rfctrlauxreg[2]; 27138 u16 orig_rfctrlrssiothers; 27139 u16 tx_lpf_bw = 4; 27140 27141 u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; 27142 u16 lpf_hpc = 7, hpvga_hpc = 7; 27143 27144 s8 rccal_stepsize; 27145 u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; 27146 u32 ref_iq_vals = 0, target_iq_vals = 0; 27147 u16 num_samps, log_num_samps = 10; 27148 struct phy_iq_est est[PHY_CORE_MAX]; 27149 27150 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27151 return 0; 27152 27153 num_samps = (1 << log_num_samps); 27154 27155 if (CHSPEC_IS40(pi->radio_chanspec)) { 27156 target_bw = target_bws[1]; 27157 target_pwr_ratio = target_pwr_ratios[1]; 27158 ref_tone = ref_tones[1]; 27159 rx_lpf_bw = rx_lpf_bws[1]; 27160 } else { 27161 target_bw = target_bws[0]; 27162 target_pwr_ratio = target_pwr_ratios[0]; 27163 ref_tone = ref_tones[0]; 27164 rx_lpf_bw = rx_lpf_bws[0]; 27165 } 27166 27167 if (core_idx == 0) { 27168 radio_addr_offset_rx = RADIO_2056_RX0; 27169 radio_addr_offset_tx = 27170 (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 27171 } else { 27172 radio_addr_offset_rx = RADIO_2056_RX1; 27173 radio_addr_offset_tx = 27174 (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; 27175 } 27176 27177 orig_txlpf_rccal_lpc_ovr_val = 27178 read_radio_reg(pi, 27179 (RADIO_2056_TX_TXLPF_RCCAL | 27180 radio_addr_offset_tx)); 27181 orig_rxlpf_rccal_hpc_ovr_val = 27182 read_radio_reg(pi, 27183 (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27184 radio_addr_offset_rx)); 27185 27186 orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); 27187 27188 orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); 27189 orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); 27190 orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); 27191 orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); 27192 orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); 27193 orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); 27194 orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); 27195 orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); 27196 orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); 27197 orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); 27198 27199 orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); 27200 orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); 27201 orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); 27202 orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); 27203 orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); 27204 27205 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27206 txlpf_rccal_lpc_ovr_val); 27207 27208 write_radio_reg(pi, 27209 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27210 rxlpf_rccal_hpc_ovr_val); 27211 27212 mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); 27213 27214 write_phy_reg(pi, 0x267, 0x02d4); 27215 write_phy_reg(pi, 0x268, 0x0000); 27216 write_phy_reg(pi, 0x269, 0x0000); 27217 write_phy_reg(pi, 0x26a, 0x0000); 27218 write_phy_reg(pi, 0x26b, 0x0000); 27219 write_phy_reg(pi, 0x26c, 0x02d4); 27220 write_phy_reg(pi, 0x26d, 0x0000); 27221 write_phy_reg(pi, 0x26e, 0x0000); 27222 write_phy_reg(pi, 0x26f, 0x0000); 27223 write_phy_reg(pi, 0x270, 0x0000); 27224 27225 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); 27226 or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); 27227 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); 27228 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); 27229 27230 mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, 27231 (0x7 << 10), (tx_lpf_bw << 10)); 27232 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27233 (0x7 << 0), (hpvga_hpc << 0)); 27234 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27235 (0x7 << 4), (lpf_hpc << 4)); 27236 mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, 27237 (0x7 << 8), (rx_lpf_bw << 8)); 27238 27239 rccal_stepsize = 16; 27240 rccal_val = start_rccal_ovr_val + rccal_stepsize; 27241 27242 while (rccal_stepsize >= 0) { 27243 write_radio_reg(pi, 27244 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27245 radio_addr_offset_rx), rccal_val); 27246 27247 if (rccal_stepsize == 16) { 27248 27249 wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, 27250 0, 1, false); 27251 udelay(2); 27252 27253 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27254 27255 if (core_idx == 0) 27256 ref_iq_vals = 27257 max_t(u32, (est[0].i_pwr + 27258 est[0].q_pwr) >> 27259 (log_num_samps + 1), 27260 1); 27261 else 27262 ref_iq_vals = 27263 max_t(u32, (est[1].i_pwr + 27264 est[1].q_pwr) >> 27265 (log_num_samps + 1), 27266 1); 27267 27268 wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, 27269 0, 1, false); 27270 udelay(2); 27271 } 27272 27273 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27274 27275 if (core_idx == 0) 27276 target_iq_vals = (est[0].i_pwr + est[0].q_pwr) >> 27277 (log_num_samps + 1); 27278 else 27279 target_iq_vals = 27280 (est[1].i_pwr + 27281 est[1].q_pwr) >> (log_num_samps + 1); 27282 27283 pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); 27284 27285 if (rccal_stepsize == 0) 27286 rccal_stepsize--; 27287 else if (rccal_stepsize == 1) { 27288 last_rccal_val = rccal_val; 27289 rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; 27290 last_pwr_ratio = pwr_ratio; 27291 rccal_stepsize--; 27292 } else { 27293 rccal_stepsize = (rccal_stepsize >> 1); 27294 rccal_val += ((pwr_ratio > target_pwr_ratio) ? 27295 rccal_stepsize : (-rccal_stepsize)); 27296 } 27297 27298 if (rccal_stepsize == -1) { 27299 best_rccal_val = 27300 (abs((int)last_pwr_ratio - 27301 (int)target_pwr_ratio) < 27302 abs((int)pwr_ratio - 27303 (int)target_pwr_ratio)) ? last_rccal_val : 27304 rccal_val; 27305 27306 if (CHSPEC_IS40(pi->radio_chanspec)) { 27307 if ((best_rccal_val > 140) 27308 || (best_rccal_val < 135)) 27309 best_rccal_val = 138; 27310 } else { 27311 if ((best_rccal_val > 142) 27312 || (best_rccal_val < 137)) 27313 best_rccal_val = 140; 27314 } 27315 27316 write_radio_reg(pi, 27317 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27318 radio_addr_offset_rx), best_rccal_val); 27319 } 27320 } 27321 27322 wlc_phy_stopplayback_nphy(pi); 27323 27324 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27325 orig_txlpf_rccal_lpc_ovr_val); 27326 write_radio_reg(pi, 27327 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27328 orig_rxlpf_rccal_hpc_ovr_val); 27329 27330 mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); 27331 27332 write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); 27333 write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); 27334 write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); 27335 write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); 27336 write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); 27337 write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); 27338 write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); 27339 write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); 27340 write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); 27341 write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); 27342 27343 write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); 27344 write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); 27345 write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); 27346 write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); 27347 write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); 27348 27349 pi->nphy_anarxlpf_adjusted = false; 27350 27351 return best_rccal_val - 0x80; 27352 } 27353 27354 #define WAIT_FOR_SCOPE 4000 27355 static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, 27356 struct nphy_txgains target_gain, 27357 u8 cal_type, bool debug) 27358 { 27359 u16 orig_BBConfig; 27360 u8 core_no, rx_core; 27361 u8 best_rccal[2]; 27362 u16 gain_save[2]; 27363 u16 cal_gain[2]; 27364 struct nphy_iqcal_params cal_params[2]; 27365 u8 rxcore_state; 27366 s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; 27367 s8 txlpf_idac; 27368 bool phyhang_avoid_state = false; 27369 bool skip_rxiqcal = false; 27370 27371 orig_BBConfig = read_phy_reg(pi, 0x01); 27372 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 27373 27374 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27375 27376 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 27377 phyhang_avoid_state = pi->phyhang_avoid; 27378 pi->phyhang_avoid = false; 27379 } 27380 27381 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27382 27383 for (core_no = 0; core_no <= 1; core_no++) { 27384 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27385 &cal_params[core_no]); 27386 cal_gain[core_no] = cal_params[core_no].cal_gain; 27387 } 27388 27389 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27390 27391 rxcore_state = wlc_phy_rxcore_getstate_nphy( 27392 (struct brcms_phy_pub *) pi); 27393 27394 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27395 27396 skip_rxiqcal = 27397 ((rxcore_state & (1 << rx_core)) == 0) ? true : false; 27398 27399 wlc_phy_rxcal_physetup_nphy(pi, rx_core); 27400 27401 wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); 27402 27403 if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { 27404 27405 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); 27406 27407 wlc_phy_tx_tone_nphy(pi, 27408 (CHSPEC_IS40( 27409 pi->radio_chanspec)) ? 27410 NPHY_RXCAL_TONEFREQ_40MHz : 27411 NPHY_RXCAL_TONEFREQ_20MHz, 27412 NPHY_RXCAL_TONEAMP, 0, cal_type, 27413 false); 27414 27415 if (debug) 27416 mdelay(WAIT_FOR_SCOPE); 27417 27418 wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); 27419 wlc_phy_stopplayback_nphy(pi); 27420 } 27421 27422 if (((cal_type == 1) || (cal_type == 2)) 27423 && NREV_LT(pi->pubpi.phy_rev, 7)) { 27424 27425 if (rx_core == PHY_CORE_1) { 27426 27427 if (rxcore_state == 1) 27428 wlc_phy_rxcore_setstate_nphy( 27429 (struct brcms_phy_pub *) pi, 3); 27430 27431 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 27432 1); 27433 27434 best_rccal[rx_core] = 27435 wlc_phy_rc_sweep_nphy(pi, rx_core, 1); 27436 pi->nphy_rccal_value = best_rccal[rx_core]; 27437 27438 if (rxcore_state == 1) 27439 wlc_phy_rxcore_setstate_nphy( 27440 (struct brcms_phy_pub *) pi, 27441 rxcore_state); 27442 } 27443 } 27444 27445 wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); 27446 27447 wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); 27448 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27449 } 27450 27451 if ((cal_type == 1) || (cal_type == 2)) { 27452 27453 best_rccal[0] = best_rccal[1]; 27454 write_radio_reg(pi, 27455 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27456 RADIO_2056_RX0), (best_rccal[0] | 0x80)); 27457 27458 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27459 rxlpf_rccal_hpc = 27460 (((int)best_rccal[rx_core] - 12) >> 1) + 10; 27461 txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; 27462 27463 if (PHY_IPA(pi)) { 27464 txlpf_rccal_lpc += 27465 (pi->bw == WL_CHANSPEC_BW_40) ? 24 : 12; 27466 txlpf_idac = (pi->bw == WL_CHANSPEC_BW_40) ? 27467 0x0e : 0x13; 27468 WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, 27469 TXLPF_IDAC_4, txlpf_idac); 27470 } 27471 27472 rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 27473 0); 27474 txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 27475 0); 27476 27477 write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27478 ((rx_core == 27479 PHY_CORE_0) ? RADIO_2056_RX0 : 27480 RADIO_2056_RX1)), 27481 (rxlpf_rccal_hpc | 0x80)); 27482 27483 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | 27484 ((rx_core == 27485 PHY_CORE_0) ? RADIO_2056_TX0 : 27486 RADIO_2056_TX1)), 27487 (txlpf_rccal_lpc | 0x80)); 27488 } 27489 } 27490 27491 write_phy_reg(pi, 0x01, orig_BBConfig); 27492 27493 wlc_phy_resetcca_nphy(pi); 27494 27495 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27496 wlc_phy_rfctrl_override_1tomany_nphy( 27497 pi, 27498 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27499 0, 0x3, 1); 27500 else 27501 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 27502 27503 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27504 27505 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27506 gain_save); 27507 27508 if (NREV_GE(pi->pubpi.phy_rev, 4)) 27509 pi->phyhang_avoid = phyhang_avoid_state; 27510 27511 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27512 27513 return 0; 27514 } 27515 27516 static int 27517 wlc_phy_cal_rxiq_nphy_rev2(struct brcms_phy *pi, 27518 struct nphy_txgains target_gain, bool debug) 27519 { 27520 struct phy_iq_est est[PHY_CORE_MAX]; 27521 u8 core_num, rx_core, tx_core; 27522 u16 lna_vals[] = { 0x3, 0x3, 0x1 }; 27523 u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; 27524 u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; 27525 s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; 27526 s16 desired_log2_pwr, actual_log2_pwr, hpf_change; 27527 u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; 27528 u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; 27529 u16 num_samps; 27530 u32 i_pwr, q_pwr, tot_pwr[3]; 27531 u8 gain_pass, use_hpf_num; 27532 u16 mask, val1, val2; 27533 u16 core_no; 27534 u16 gain_save[2]; 27535 u16 cal_gain[2]; 27536 struct nphy_iqcal_params cal_params[2]; 27537 u8 phy_bw; 27538 int bcmerror = 0; 27539 bool first_playtone = true; 27540 27541 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27542 27543 if (NREV_LT(pi->pubpi.phy_rev, 2)) 27544 wlc_phy_reapply_txcal_coeffs_nphy(pi); 27545 27546 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27547 27548 for (core_no = 0; core_no <= 1; core_no++) { 27549 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27550 &cal_params[core_no]); 27551 cal_gain[core_no] = cal_params[core_no].cal_gain; 27552 } 27553 27554 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27555 27556 num_samps = 1024; 27557 desired_log2_pwr = 13; 27558 27559 for (core_num = 0; core_num < 2; core_num++) { 27560 27561 rx_core = core_num; 27562 tx_core = 1 - core_num; 27563 27564 orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); 27565 orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27566 0xa6 : 0xa7); 27567 orig_AfectrlOverride = read_phy_reg(pi, 0xa5); 27568 orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27569 0x91 : 0x92); 27570 orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? 27571 0x91 : 0x92); 27572 27573 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 27574 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 27575 27576 or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 27577 ((0x1 << 1) | (0x1 << 2))); 27578 or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); 27579 27580 if (((pi->nphy_rxcalparams) & 0xff000000)) 27581 write_phy_reg(pi, 27582 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27583 (CHSPEC_IS5G(pi->radio_chanspec) ? 27584 0x140 : 0x110)); 27585 else 27586 write_phy_reg(pi, 27587 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27588 (CHSPEC_IS5G(pi->radio_chanspec) ? 27589 0x180 : 0x120)); 27590 27591 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, 27592 (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : 27593 0x114)); 27594 27595 mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; 27596 if (rx_core == PHY_CORE_0) { 27597 val1 = RADIO_2055_COUPLE_RX_MASK; 27598 val2 = RADIO_2055_COUPLE_TX_MASK; 27599 } else { 27600 val1 = RADIO_2055_COUPLE_TX_MASK; 27601 val2 = RADIO_2055_COUPLE_RX_MASK; 27602 } 27603 27604 if ((pi->nphy_rxcalparams & 0x10000)) { 27605 mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, 27606 val1); 27607 mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, 27608 val2); 27609 } 27610 27611 for (gain_pass = 0; gain_pass < 4; gain_pass++) { 27612 27613 if (debug) 27614 mdelay(WAIT_FOR_SCOPE); 27615 27616 if (gain_pass < 3) { 27617 curr_lna = lna_vals[gain_pass]; 27618 curr_hpf1 = hpf1_vals[gain_pass]; 27619 curr_hpf2 = hpf2_vals[gain_pass]; 27620 } else { 27621 27622 if (tot_pwr[1] > 10000) { 27623 curr_lna = lna_vals[2]; 27624 curr_hpf1 = hpf1_vals[2]; 27625 curr_hpf2 = hpf2_vals[2]; 27626 use_hpf_num = 1; 27627 curr_hpf = curr_hpf1; 27628 actual_log2_pwr = 27629 wlc_phy_nbits(tot_pwr[2]); 27630 } else { 27631 if (tot_pwr[0] > 10000) { 27632 curr_lna = lna_vals[1]; 27633 curr_hpf1 = hpf1_vals[1]; 27634 curr_hpf2 = hpf2_vals[1]; 27635 use_hpf_num = 1; 27636 curr_hpf = curr_hpf1; 27637 actual_log2_pwr = 27638 wlc_phy_nbits( 27639 tot_pwr[1]); 27640 } else { 27641 curr_lna = lna_vals[0]; 27642 curr_hpf1 = hpf1_vals[0]; 27643 curr_hpf2 = hpf2_vals[0]; 27644 use_hpf_num = 2; 27645 curr_hpf = curr_hpf2; 27646 actual_log2_pwr = 27647 wlc_phy_nbits( 27648 tot_pwr[0]); 27649 } 27650 } 27651 27652 hpf_change = desired_log2_pwr - actual_log2_pwr; 27653 curr_hpf += hpf_change; 27654 curr_hpf = max(min_t(u16, curr_hpf, 10), 0); 27655 if (use_hpf_num == 1) 27656 curr_hpf1 = curr_hpf; 27657 else 27658 curr_hpf2 = curr_hpf; 27659 } 27660 27661 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 27662 ((curr_hpf2 << 8) | 27663 (curr_hpf1 << 4) | 27664 (curr_lna << 2)), 0x3, 0); 27665 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27666 27667 wlc_phy_stopplayback_nphy(pi); 27668 27669 if (first_playtone) { 27670 bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, 27671 (u16) (pi->nphy_rxcalparams & 27672 0xffff), 0, 0, true); 27673 first_playtone = false; 27674 } else { 27675 phy_bw = (CHSPEC_IS40(pi->radio_chanspec)) ? 27676 40 : 20; 27677 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 27678 0, 0, 0, true); 27679 } 27680 27681 if (bcmerror == 0) { 27682 if (gain_pass < 3) { 27683 27684 wlc_phy_rx_iq_est_nphy(pi, est, 27685 num_samps, 32, 27686 0); 27687 i_pwr = (est[rx_core].i_pwr + 27688 num_samps / 2) / num_samps; 27689 q_pwr = (est[rx_core].q_pwr + 27690 num_samps / 2) / num_samps; 27691 tot_pwr[gain_pass] = i_pwr + q_pwr; 27692 } else { 27693 27694 wlc_phy_calc_rx_iq_comp_nphy(pi, 27695 (1 << 27696 rx_core)); 27697 } 27698 27699 wlc_phy_stopplayback_nphy(pi); 27700 } 27701 27702 if (bcmerror != 0) 27703 break; 27704 } 27705 27706 and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); 27707 and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); 27708 27709 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 27710 0x92, orig_RfctrlIntcTx); 27711 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : 27712 0x92, orig_RfctrlIntcRx); 27713 write_phy_reg(pi, 0xa5, orig_AfectrlOverride); 27714 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 27715 0xa7, orig_AfectrlCore); 27716 write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); 27717 27718 if (bcmerror != 0) 27719 break; 27720 } 27721 27722 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); 27723 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27724 27725 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27726 gain_save); 27727 27728 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27729 27730 return bcmerror; 27731 } 27732 27733 int 27734 wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 27735 u8 cal_type, bool debug) 27736 { 27737 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27738 cal_type = 0; 27739 27740 if (NREV_GE(pi->pubpi.phy_rev, 3)) 27741 return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, 27742 debug); 27743 else 27744 return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); 27745 } 27746 27747 void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi) 27748 { 27749 uint core; 27750 u32 txgain; 27751 u16 rad_gain, dac_gain, bbmult, m1m2; 27752 u8 txpi[2], chan_freq_range; 27753 s32 rfpwr_offset; 27754 27755 if (pi->phyhang_avoid) 27756 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27757 27758 if (pi->sh->sromrev < 4) { 27759 txpi[0] = txpi[1] = 72; 27760 } else { 27761 27762 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 27763 switch (chan_freq_range) { 27764 case WL_CHAN_FREQ_RANGE_2G: 27765 case WL_CHAN_FREQ_RANGE_5GL: 27766 case WL_CHAN_FREQ_RANGE_5GM: 27767 case WL_CHAN_FREQ_RANGE_5GH: 27768 txpi[0] = 0; 27769 txpi[1] = 0; 27770 break; 27771 default: 27772 txpi[0] = txpi[1] = 91; 27773 break; 27774 } 27775 } 27776 27777 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27778 txpi[0] = txpi[1] = 30; 27779 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 27780 txpi[0] = txpi[1] = 40; 27781 27782 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 27783 27784 if ((txpi[0] < 40) || (txpi[0] > 100) || 27785 (txpi[1] < 40) || (txpi[1] > 100)) 27786 txpi[0] = txpi[1] = 91; 27787 } 27788 27789 pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; 27790 pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; 27791 pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; 27792 pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; 27793 27794 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 27795 uint phyrev = pi->pubpi.phy_rev; 27796 27797 if (NREV_GE(phyrev, 3)) { 27798 if (PHY_IPA(pi)) { 27799 u32 *tx_gaintbl = 27800 wlc_phy_get_ipa_gaintbl_nphy(pi); 27801 txgain = tx_gaintbl[txpi[core]]; 27802 } else { 27803 if (CHSPEC_IS5G(pi->radio_chanspec)) { 27804 if (NREV_IS(phyrev, 3)) { 27805 txgain = 27806 nphy_tpc_5GHz_txgain_rev3 27807 [txpi[core]]; 27808 } else if (NREV_IS(phyrev, 4)) { 27809 txgain = ( 27810 pi->srom_fem5g.extpagain == 27811 3) ? 27812 nphy_tpc_5GHz_txgain_HiPwrEPA 27813 [txpi[core]] : 27814 nphy_tpc_5GHz_txgain_rev4 27815 [txpi[core]]; 27816 } else { 27817 txgain = 27818 nphy_tpc_5GHz_txgain_rev5 27819 [txpi[core]]; 27820 } 27821 } else { 27822 if (NREV_GE(phyrev, 5) && 27823 (pi->srom_fem2g.extpagain == 3)) { 27824 txgain = 27825 nphy_tpc_txgain_HiPwrEPA 27826 [txpi[core]]; 27827 } else { 27828 txgain = nphy_tpc_txgain_rev3 27829 [txpi[core]]; 27830 } 27831 } 27832 } 27833 } else { 27834 txgain = nphy_tpc_txgain[txpi[core]]; 27835 } 27836 27837 if (NREV_GE(phyrev, 3)) 27838 rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); 27839 else 27840 rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); 27841 27842 if (NREV_GE(phyrev, 7)) 27843 dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); 27844 else 27845 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 27846 27847 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 27848 27849 if (NREV_GE(phyrev, 3)) 27850 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 27851 0xa5), (0x1 << 8), (0x1 << 8)); 27852 else 27853 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 27854 27855 write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); 27856 27857 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 27858 &rad_gain); 27859 27860 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 27861 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 27862 m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); 27863 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 27864 27865 if (PHY_IPA(pi)) { 27866 wlc_phy_table_read_nphy(pi, 27867 (core == 27868 PHY_CORE_0 ? 27869 NPHY_TBL_ID_CORE1TXPWRCTL : 27870 NPHY_TBL_ID_CORE2TXPWRCTL), 1, 27871 576 + txpi[core], 32, 27872 &rfpwr_offset); 27873 27874 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27875 0x29b, (0x1ff << 4), 27876 ((s16) rfpwr_offset) << 4); 27877 27878 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27879 0x29b, (0x1 << 2), (1) << 2); 27880 27881 } 27882 } 27883 27884 and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); 27885 27886 if (pi->phyhang_avoid) 27887 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27888 } 27889 27890 static void 27891 wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, 27892 u8 tmp_max_pwr, u8 rate_start, 27893 u8 rate_end) 27894 { 27895 u8 rate; 27896 u8 word_num, nibble_num; 27897 u8 tmp_nibble; 27898 27899 for (rate = rate_start; rate <= rate_end; rate++) { 27900 word_num = (rate - rate_start) >> 2; 27901 nibble_num = (rate - rate_start) & 0x3; 27902 tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; 27903 27904 srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; 27905 } 27906 } 27907 27908 static void 27909 wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, 27910 u8 rate_start, u8 rate_end) 27911 { 27912 u8 rate; 27913 27914 for (rate = rate_start; rate <= rate_end; rate++) 27915 srom_max[rate] -= 2 * pwr_offset; 27916 } 27917 27918 void 27919 wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, 27920 u8 rate_mcs_end, u8 rate_ofdm_start) 27921 { 27922 u8 rate1, rate2; 27923 27924 rate2 = rate_ofdm_start; 27925 for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { 27926 power[rate1] = power[rate2]; 27927 rate2 += (rate1 == rate_mcs_start) ? 2 : 1; 27928 } 27929 power[rate_mcs_end] = power[rate_mcs_end - 1]; 27930 } 27931 27932 void 27933 wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, 27934 u8 rate_ofdm_end, u8 rate_mcs_start) 27935 { 27936 u8 rate1, rate2; 27937 27938 for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; 27939 rate1 <= rate_ofdm_end; rate1++, rate2++) { 27940 power[rate1] = power[rate2]; 27941 if (rate1 == rate_ofdm_start) 27942 power[++rate1] = power[rate2]; 27943 } 27944 } 27945 27946 void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi) 27947 { 27948 uint rate1, rate2, band_num; 27949 u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; 27950 u8 tmp_max_pwr = 0; 27951 u16 pwr_offsets1[2], *pwr_offsets2 = NULL; 27952 u8 *tx_srom_max_rate = NULL; 27953 27954 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 27955 band_num++) { 27956 switch (band_num) { 27957 case 0: 27958 27959 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, 27960 pi->nphy_pwrctrl_info[1].max_pwr_2g); 27961 27962 pwr_offsets1[0] = pi->cck2gpo; 27963 wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, 27964 pwr_offsets1, 27965 tmp_max_pwr, 27966 TXP_FIRST_CCK, 27967 TXP_LAST_CCK); 27968 27969 pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); 27970 pwr_offsets1[1] = 27971 (u16) (pi->ofdm2gpo >> 16) & 0xffff; 27972 27973 pwr_offsets2 = pi->mcs2gpo; 27974 27975 tmp_cddpo = pi->cdd2gpo; 27976 tmp_stbcpo = pi->stbc2gpo; 27977 tmp_bw40po = pi->bw402gpo; 27978 27979 tx_srom_max_rate = pi->tx_srom_max_rate_2g; 27980 break; 27981 case 1: 27982 27983 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, 27984 pi->nphy_pwrctrl_info[1].max_pwr_5gm); 27985 27986 pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); 27987 pwr_offsets1[1] = 27988 (u16) (pi->ofdm5gpo >> 16) & 0xffff; 27989 27990 pwr_offsets2 = pi->mcs5gpo; 27991 27992 tmp_cddpo = pi->cdd5gpo; 27993 tmp_stbcpo = pi->stbc5gpo; 27994 tmp_bw40po = pi->bw405gpo; 27995 27996 tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; 27997 break; 27998 case 2: 27999 28000 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, 28001 pi->nphy_pwrctrl_info[1].max_pwr_5gl); 28002 28003 pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); 28004 pwr_offsets1[1] = 28005 (u16) (pi->ofdm5glpo >> 16) & 0xffff; 28006 28007 pwr_offsets2 = pi->mcs5glpo; 28008 28009 tmp_cddpo = pi->cdd5glpo; 28010 tmp_stbcpo = pi->stbc5glpo; 28011 tmp_bw40po = pi->bw405glpo; 28012 28013 tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; 28014 break; 28015 case 3: 28016 28017 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, 28018 pi->nphy_pwrctrl_info[1].max_pwr_5gh); 28019 28020 pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); 28021 pwr_offsets1[1] = 28022 (u16) (pi->ofdm5ghpo >> 16) & 0xffff; 28023 28024 pwr_offsets2 = pi->mcs5ghpo; 28025 28026 tmp_cddpo = pi->cdd5ghpo; 28027 tmp_stbcpo = pi->stbc5ghpo; 28028 tmp_bw40po = pi->bw405ghpo; 28029 28030 tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; 28031 break; 28032 } 28033 28034 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, 28035 tmp_max_pwr, TXP_FIRST_OFDM, 28036 TXP_LAST_OFDM); 28037 28038 wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, 28039 TXP_FIRST_MCS_20_SISO, 28040 TXP_LAST_MCS_20_SISO, 28041 TXP_FIRST_OFDM); 28042 28043 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28044 tmp_max_pwr, 28045 TXP_FIRST_MCS_20_CDD, 28046 TXP_LAST_MCS_20_CDD); 28047 28048 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28049 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28050 TXP_FIRST_MCS_20_CDD, 28051 TXP_LAST_MCS_20_CDD); 28052 28053 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28054 TXP_FIRST_OFDM_20_CDD, 28055 TXP_LAST_OFDM_20_CDD, 28056 TXP_FIRST_MCS_20_CDD); 28057 28058 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28059 tmp_max_pwr, 28060 TXP_FIRST_MCS_20_STBC, 28061 TXP_LAST_MCS_20_STBC); 28062 28063 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28064 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28065 tmp_stbcpo, 28066 TXP_FIRST_MCS_20_STBC, 28067 TXP_LAST_MCS_20_STBC); 28068 28069 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28070 &pwr_offsets2[2], tmp_max_pwr, 28071 TXP_FIRST_MCS_20_SDM, 28072 TXP_LAST_MCS_20_SDM); 28073 28074 if (NPHY_IS_SROM_REINTERPRET) { 28075 28076 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28077 &pwr_offsets2[4], 28078 tmp_max_pwr, 28079 TXP_FIRST_MCS_40_SISO, 28080 TXP_LAST_MCS_40_SISO); 28081 28082 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28083 TXP_FIRST_OFDM_40_SISO, 28084 TXP_LAST_OFDM_40_SISO, 28085 TXP_FIRST_MCS_40_SISO); 28086 28087 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28088 &pwr_offsets2[4], 28089 tmp_max_pwr, 28090 TXP_FIRST_MCS_40_CDD, 28091 TXP_LAST_MCS_40_CDD); 28092 28093 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28094 TXP_FIRST_MCS_40_CDD, 28095 TXP_LAST_MCS_40_CDD); 28096 28097 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28098 TXP_FIRST_OFDM_40_CDD, 28099 TXP_LAST_OFDM_40_CDD, 28100 TXP_FIRST_MCS_40_CDD); 28101 28102 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28103 &pwr_offsets2[4], 28104 tmp_max_pwr, 28105 TXP_FIRST_MCS_40_STBC, 28106 TXP_LAST_MCS_40_STBC); 28107 28108 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28109 tmp_stbcpo, 28110 TXP_FIRST_MCS_40_STBC, 28111 TXP_LAST_MCS_40_STBC); 28112 28113 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28114 &pwr_offsets2[6], 28115 tmp_max_pwr, 28116 TXP_FIRST_MCS_40_SDM, 28117 TXP_LAST_MCS_40_SDM); 28118 } else { 28119 28120 for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = 28121 TXP_FIRST_OFDM; 28122 rate1 <= TXP_LAST_MCS_40_SDM; 28123 rate1++, rate2++) 28124 tx_srom_max_rate[rate1] = 28125 tx_srom_max_rate[rate2]; 28126 } 28127 28128 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28129 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28130 tmp_bw40po, 28131 TXP_FIRST_OFDM_40_SISO, 28132 TXP_LAST_MCS_40_SDM); 28133 28134 tx_srom_max_rate[TXP_MCS_32] = 28135 tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; 28136 } 28137 28138 return; 28139 } 28140 28141 void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi) 28142 { 28143 u8 tx_pwr_ctrl_state; 28144 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 28145 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 28146 28147 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28148 28149 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 28150 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 28151 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 28152 udelay(1); 28153 } 28154 28155 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28156 28157 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 28158 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 28159 } 28160 28161 static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi) 28162 { 28163 return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | 28164 (0x1 << 14) | (0x1 << 13)); 28165 } 28166 28167 u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi) 28168 { 28169 u16 tmp; 28170 u16 pwr_idx[2]; 28171 28172 if (wlc_phy_txpwr_ison_nphy(pi)) { 28173 pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); 28174 pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); 28175 28176 tmp = (pwr_idx[0] << 8) | pwr_idx[1]; 28177 } else { 28178 tmp = ((pi->nphy_txpwrindex[PHY_CORE_0].index_internal & 0xff) 28179 << 8) | 28180 (pi->nphy_txpwrindex[PHY_CORE_1].index_internal & 0xff); 28181 } 28182 28183 return tmp; 28184 } 28185 28186 void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi) 28187 { 28188 if (PHY_IPA(pi) 28189 && (pi->nphy_force_papd_cal 28190 || (wlc_phy_txpwr_ison_nphy(pi) 28191 && 28192 (((u32) 28193 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - 28194 pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) 28195 || ((u32) 28196 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - 28197 pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) 28198 wlc_phy_a4(pi, true); 28199 } 28200 28201 void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type) 28202 { 28203 u16 mask = 0, val = 0, ishw = 0; 28204 u8 ctr; 28205 uint core; 28206 u32 tbl_offset; 28207 u32 tbl_len; 28208 u16 regval[84]; 28209 28210 if (pi->phyhang_avoid) 28211 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28212 28213 switch (ctrl_type) { 28214 case PHY_TPC_HW_OFF: 28215 case PHY_TPC_HW_ON: 28216 pi->nphy_txpwrctrl = ctrl_type; 28217 break; 28218 default: 28219 break; 28220 } 28221 28222 if (ctrl_type == PHY_TPC_HW_OFF) { 28223 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28224 28225 if (wlc_phy_txpwr_ison_nphy(pi)) { 28226 for (core = 0; core < pi->pubpi.phy_corenum; 28227 core++) 28228 pi->nphy_txpwr_idx[core] = 28229 wlc_phy_txpwr_idx_cur_get_nphy( 28230 pi, 28231 (u8) core); 28232 } 28233 28234 } 28235 28236 tbl_len = 84; 28237 tbl_offset = 64; 28238 for (ctr = 0; ctr < tbl_len; ctr++) 28239 regval[ctr] = 0; 28240 wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, 28241 regval); 28242 wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, 28243 regval); 28244 28245 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28246 and_phy_reg(pi, 0x1e7, 28247 (u16) (~((0x1 << 15) | 28248 (0x1 << 14) | (0x1 << 13)))); 28249 else 28250 and_phy_reg(pi, 0x1e7, 28251 (u16) (~((0x1 << 14) | (0x1 << 13)))); 28252 28253 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28254 or_phy_reg(pi, 0x8f, (0x1 << 8)); 28255 or_phy_reg(pi, 0xa5, (0x1 << 8)); 28256 } else { 28257 or_phy_reg(pi, 0xa5, (0x1 << 14)); 28258 } 28259 28260 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28261 mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); 28262 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28263 mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); 28264 28265 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28266 pi->bw == WL_CHANSPEC_BW_40) 28267 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28268 MHF1_IQSWAP_WAR, BRCM_BAND_ALL); 28269 28270 } else { 28271 28272 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 28273 8, pi->adj_pwr_tbl_nphy); 28274 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 28275 8, pi->adj_pwr_tbl_nphy); 28276 28277 ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; 28278 mask = (0x1 << 14) | (0x1 << 13); 28279 val = (ishw << 14) | (ishw << 13); 28280 28281 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28282 mask |= (0x1 << 15); 28283 val |= (ishw << 15); 28284 } 28285 28286 mod_phy_reg(pi, 0x1e7, mask, val); 28287 28288 if (CHSPEC_IS5G(pi->radio_chanspec)) { 28289 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 28290 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); 28291 mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); 28292 } else { 28293 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); 28294 if (NREV_GT(pi->pubpi.phy_rev, 1)) 28295 mod_phy_reg(pi, 0x222, 28296 (0xff << 0), 0x64); 28297 } 28298 } 28299 28300 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28301 if ((pi->nphy_txpwr_idx[0] != 128) 28302 && (pi->nphy_txpwr_idx[1] != 128)) 28303 wlc_phy_txpwr_idx_cur_set_nphy(pi, 28304 pi-> 28305 nphy_txpwr_idx 28306 [0], 28307 pi-> 28308 nphy_txpwr_idx 28309 [1]); 28310 } 28311 28312 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28313 and_phy_reg(pi, 0x8f, ~(0x1 << 8)); 28314 and_phy_reg(pi, 0xa5, ~(0x1 << 8)); 28315 } else { 28316 and_phy_reg(pi, 0xa5, ~(0x1 << 14)); 28317 } 28318 28319 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28320 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 28321 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28322 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 28323 28324 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28325 pi->bw == WL_CHANSPEC_BW_40) 28326 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28327 0x0, BRCM_BAND_ALL); 28328 28329 if (PHY_IPA(pi)) { 28330 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 28331 0x29b, (0x1 << 2), (0) << 2); 28332 28333 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 28334 0x29b, (0x1 << 2), (0) << 2); 28335 28336 } 28337 28338 } 28339 28340 if (pi->phyhang_avoid) 28341 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28342 } 28343 28344 void 28345 wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, 28346 bool restore_cals) 28347 { 28348 u8 core, txpwrctl_tbl; 28349 u16 tx_ind0, iq_ind0, lo_ind0; 28350 u16 m1m2; 28351 u32 txgain; 28352 u16 rad_gain, dac_gain; 28353 u8 bbmult; 28354 u32 iqcomp; 28355 u16 iqcomp_a, iqcomp_b; 28356 u32 locomp; 28357 u16 tmpval; 28358 u8 tx_pwr_ctrl_state; 28359 s32 rfpwr_offset; 28360 u16 regval[2]; 28361 28362 if (pi->phyhang_avoid) 28363 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28364 28365 tx_ind0 = 192; 28366 iq_ind0 = 320; 28367 lo_ind0 = 448; 28368 28369 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 28370 28371 if ((core_mask & (1 << core)) == 0) 28372 continue; 28373 28374 txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; 28375 28376 if (txpwrindex < 0) { 28377 if (pi->nphy_txpwrindex[core].index < 0) 28378 continue; 28379 28380 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28381 mod_phy_reg(pi, 0x8f, 28382 (0x1 << 8), 28383 pi->nphy_txpwrindex[core]. 28384 AfectrlOverride); 28385 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28386 pi->nphy_txpwrindex[core]. 28387 AfectrlOverride); 28388 } else { 28389 mod_phy_reg(pi, 0xa5, 28390 (0x1 << 14), 28391 pi->nphy_txpwrindex[core]. 28392 AfectrlOverride); 28393 } 28394 28395 write_phy_reg(pi, (core == PHY_CORE_0) ? 28396 0xaa : 0xab, 28397 pi->nphy_txpwrindex[core].AfeCtrlDacGain); 28398 28399 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28400 &pi->nphy_txpwrindex[core]. 28401 rad_gain); 28402 28403 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28404 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28405 m1m2 |= ((core == PHY_CORE_0) ? 28406 (pi->nphy_txpwrindex[core].bbmult << 8) : 28407 (pi->nphy_txpwrindex[core].bbmult << 0)); 28408 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28409 28410 if (restore_cals) { 28411 wlc_phy_table_write_nphy( 28412 pi, 15, 2, (80 + 2 * core), 16, 28413 &pi->nphy_txpwrindex[core].iqcomp_a); 28414 wlc_phy_table_write_nphy( 28415 pi, 15, 1, (85 + core), 16, 28416 &pi->nphy_txpwrindex[core].locomp); 28417 wlc_phy_table_write_nphy( 28418 pi, 15, 1, (93 + core), 16, 28419 &pi->nphy_txpwrindex[core].locomp); 28420 } 28421 28422 wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); 28423 28424 pi->nphy_txpwrindex[core].index_internal = 28425 pi->nphy_txpwrindex[core].index_internal_save; 28426 } else { 28427 28428 if (pi->nphy_txpwrindex[core].index < 0) { 28429 28430 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28431 mod_phy_reg(pi, 0x8f, 28432 (0x1 << 8), 28433 pi->nphy_txpwrindex[core]. 28434 AfectrlOverride); 28435 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28436 pi->nphy_txpwrindex[core]. 28437 AfectrlOverride); 28438 } else { 28439 pi->nphy_txpwrindex[core]. 28440 AfectrlOverride = 28441 read_phy_reg(pi, 0xa5); 28442 } 28443 28444 pi->nphy_txpwrindex[core].AfeCtrlDacGain = 28445 read_phy_reg(pi, (core == PHY_CORE_0) ? 28446 0xaa : 0xab); 28447 28448 wlc_phy_table_read_nphy(pi, 7, 1, 28449 (0x110 + core), 16, 28450 &pi-> 28451 nphy_txpwrindex[core]. 28452 rad_gain); 28453 28454 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 28455 &tmpval); 28456 tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); 28457 tmpval &= 0xff; 28458 pi->nphy_txpwrindex[core].bbmult = (u8) tmpval; 28459 28460 wlc_phy_table_read_nphy(pi, 15, 2, 28461 (80 + 2 * core), 16, 28462 &pi-> 28463 nphy_txpwrindex[core]. 28464 iqcomp_a); 28465 28466 wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), 28467 16, 28468 &pi-> 28469 nphy_txpwrindex[core]. 28470 locomp); 28471 28472 pi->nphy_txpwrindex[core].index_internal_save = 28473 pi->nphy_txpwrindex[core]. 28474 index_internal; 28475 } 28476 28477 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28478 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 28479 28480 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28481 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 28482 28483 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28484 (tx_ind0 + txpwrindex), 32, 28485 &txgain); 28486 28487 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28488 rad_gain = (txgain >> 16) & 28489 ((1 << (32 - 16 + 1)) - 1); 28490 else 28491 rad_gain = (txgain >> 16) & 28492 ((1 << (28 - 16 + 1)) - 1); 28493 28494 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 28495 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 28496 28497 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28498 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 28499 0xa5), (0x1 << 8), (0x1 << 8)); 28500 else 28501 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 28502 28503 write_phy_reg(pi, (core == PHY_CORE_0) ? 28504 0xaa : 0xab, dac_gain); 28505 28506 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28507 &rad_gain); 28508 28509 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28510 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28511 m1m2 |= ((core == PHY_CORE_0) ? 28512 (bbmult << 8) : (bbmult << 0)); 28513 28514 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28515 28516 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28517 (iq_ind0 + txpwrindex), 32, 28518 &iqcomp); 28519 iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); 28520 iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); 28521 28522 if (restore_cals) { 28523 regval[0] = (u16) iqcomp_a; 28524 regval[1] = (u16) iqcomp_b; 28525 wlc_phy_table_write_nphy(pi, 15, 2, 28526 (80 + 2 * core), 16, 28527 regval); 28528 } 28529 28530 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28531 (lo_ind0 + txpwrindex), 32, 28532 &locomp); 28533 if (restore_cals) 28534 wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), 28535 16, &locomp); 28536 28537 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28538 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 28539 28540 if (PHY_IPA(pi)) { 28541 wlc_phy_table_read_nphy(pi, 28542 (core == PHY_CORE_0 ? 28543 NPHY_TBL_ID_CORE1TXPWRCTL : 28544 NPHY_TBL_ID_CORE2TXPWRCTL), 28545 1, 576 + txpwrindex, 32, 28546 &rfpwr_offset); 28547 28548 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28549 0x29b, (0x1ff << 4), 28550 ((s16) rfpwr_offset) << 4); 28551 28552 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28553 0x29b, (0x1 << 2), (1) << 2); 28554 28555 } 28556 28557 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28558 } 28559 28560 pi->nphy_txpwrindex[core].index = txpwrindex; 28561 } 28562 28563 if (pi->phyhang_avoid) 28564 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28565 } 28566 28567 void 28568 wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, 28569 u8 txp_rate_idx) 28570 { 28571 u8 chan_freq_range; 28572 28573 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); 28574 switch (chan_freq_range) { 28575 case WL_CHAN_FREQ_RANGE_2G: 28576 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28577 break; 28578 case WL_CHAN_FREQ_RANGE_5GM: 28579 *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; 28580 break; 28581 case WL_CHAN_FREQ_RANGE_5GL: 28582 *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; 28583 break; 28584 case WL_CHAN_FREQ_RANGE_5GH: 28585 *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; 28586 break; 28587 default: 28588 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28589 break; 28590 } 28591 28592 return; 28593 } 28594 28595 void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, bool enable) 28596 { 28597 u16 clip_off[] = { 0xffff, 0xffff }; 28598 28599 if (enable) { 28600 if (pi->nphy_deaf_count == 0) { 28601 pi->classifier_state = 28602 wlc_phy_classifier_nphy(pi, 0, 0); 28603 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 28604 wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); 28605 wlc_phy_clip_det_nphy(pi, 1, clip_off); 28606 } 28607 28608 pi->nphy_deaf_count++; 28609 28610 wlc_phy_resetcca_nphy(pi); 28611 28612 } else { 28613 pi->nphy_deaf_count--; 28614 28615 if (pi->nphy_deaf_count == 0) { 28616 wlc_phy_classifier_nphy(pi, (0x7 << 0), 28617 pi->classifier_state); 28618 wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); 28619 } 28620 } 28621 } 28622 28623 void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode) 28624 { 28625 wlapi_suspend_mac_and_wait(pi->sh->physhim); 28626 28627 if (mode) { 28628 if (pi->nphy_deaf_count == 0) 28629 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28630 } else if (pi->nphy_deaf_count > 0) { 28631 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28632 } 28633 28634 wlapi_enable_mac(pi->sh->physhim); 28635 } 28636