158619b14SKalle Valo #ifndef LINUX_B43_PHY_COMMON_H_
258619b14SKalle Valo #define LINUX_B43_PHY_COMMON_H_
358619b14SKalle Valo 
458619b14SKalle Valo #include <linux/types.h>
558619b14SKalle Valo #include <linux/nl80211.h>
658619b14SKalle Valo 
758619b14SKalle Valo struct b43_wldev;
858619b14SKalle Valo 
958619b14SKalle Valo /* Complex number using 2 32-bit signed integers */
1058619b14SKalle Valo struct b43_c32 { s32 i, q; };
1158619b14SKalle Valo 
1258619b14SKalle Valo #define CORDIC_CONVERT(value)	(((value) >= 0) ? \
1358619b14SKalle Valo 				 ((((value) >> 15) + 1) >> 1) : \
1458619b14SKalle Valo 				 -((((-(value)) >> 15) + 1) >> 1))
1558619b14SKalle Valo 
1658619b14SKalle Valo /* PHY register routing bits */
1758619b14SKalle Valo #define B43_PHYROUTE			0x0C00 /* PHY register routing bits mask */
1858619b14SKalle Valo #define  B43_PHYROUTE_BASE		0x0000 /* Base registers */
1958619b14SKalle Valo #define  B43_PHYROUTE_OFDM_GPHY		0x0400 /* OFDM register routing for G-PHYs */
2058619b14SKalle Valo #define  B43_PHYROUTE_EXT_GPHY		0x0800 /* Extended G-PHY registers */
2158619b14SKalle Valo #define  B43_PHYROUTE_N_BMODE		0x0C00 /* N-PHY BMODE registers */
2258619b14SKalle Valo 
2358619b14SKalle Valo /* CCK (B-PHY) registers. */
2458619b14SKalle Valo #define B43_PHY_CCK(reg)		((reg) | B43_PHYROUTE_BASE)
2558619b14SKalle Valo /* N-PHY registers. */
2658619b14SKalle Valo #define B43_PHY_N(reg)			((reg) | B43_PHYROUTE_BASE)
2758619b14SKalle Valo /* N-PHY BMODE registers. */
2858619b14SKalle Valo #define B43_PHY_N_BMODE(reg)		((reg) | B43_PHYROUTE_N_BMODE)
2958619b14SKalle Valo /* OFDM (A-PHY) registers. */
3058619b14SKalle Valo #define B43_PHY_OFDM(reg)		((reg) | B43_PHYROUTE_OFDM_GPHY)
3158619b14SKalle Valo /* Extended G-PHY registers. */
3258619b14SKalle Valo #define B43_PHY_EXTG(reg)		((reg) | B43_PHYROUTE_EXT_GPHY)
3358619b14SKalle Valo 
3458619b14SKalle Valo 
3558619b14SKalle Valo /* Masks for the PHY versioning registers. */
3658619b14SKalle Valo #define B43_PHYVER_ANALOG		0xF000
3758619b14SKalle Valo #define B43_PHYVER_ANALOG_SHIFT		12
3858619b14SKalle Valo #define B43_PHYVER_TYPE			0x0F00
3958619b14SKalle Valo #define B43_PHYVER_TYPE_SHIFT		8
4058619b14SKalle Valo #define B43_PHYVER_VERSION		0x00FF
4158619b14SKalle Valo 
4258619b14SKalle Valo /* PHY writes need to be flushed if we reach limit */
4358619b14SKalle Valo #define B43_MAX_WRITES_IN_ROW		24
4458619b14SKalle Valo 
4558619b14SKalle Valo /**
4658619b14SKalle Valo  * enum b43_interference_mitigation - Interference Mitigation mode
4758619b14SKalle Valo  *
4858619b14SKalle Valo  * @B43_INTERFMODE_NONE:	Disabled
4958619b14SKalle Valo  * @B43_INTERFMODE_NONWLAN:	Non-WLAN Interference Mitigation
5058619b14SKalle Valo  * @B43_INTERFMODE_MANUALWLAN:	WLAN Interference Mitigation
5158619b14SKalle Valo  * @B43_INTERFMODE_AUTOWLAN:	Automatic WLAN Interference Mitigation
5258619b14SKalle Valo  */
5358619b14SKalle Valo enum b43_interference_mitigation {
5458619b14SKalle Valo 	B43_INTERFMODE_NONE,
5558619b14SKalle Valo 	B43_INTERFMODE_NONWLAN,
5658619b14SKalle Valo 	B43_INTERFMODE_MANUALWLAN,
5758619b14SKalle Valo 	B43_INTERFMODE_AUTOWLAN,
5858619b14SKalle Valo };
5958619b14SKalle Valo 
6058619b14SKalle Valo /* Antenna identifiers */
6158619b14SKalle Valo enum {
6258619b14SKalle Valo 	B43_ANTENNA0 = 0,	/* Antenna 0 */
6358619b14SKalle Valo 	B43_ANTENNA1 = 1,	/* Antenna 1 */
6458619b14SKalle Valo 	B43_ANTENNA_AUTO0 = 2,	/* Automatic, starting with antenna 0 */
6558619b14SKalle Valo 	B43_ANTENNA_AUTO1 = 3,	/* Automatic, starting with antenna 1 */
6658619b14SKalle Valo 	B43_ANTENNA2 = 4,
6758619b14SKalle Valo 	B43_ANTENNA3 = 8,
6858619b14SKalle Valo 
6958619b14SKalle Valo 	B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
7058619b14SKalle Valo 	B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
7158619b14SKalle Valo };
7258619b14SKalle Valo 
7358619b14SKalle Valo /**
7458619b14SKalle Valo  * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
7558619b14SKalle Valo  *
7658619b14SKalle Valo  * @B43_TXPWR_RES_NEED_ADJUST:	Values changed. Hardware adjustment is needed.
7758619b14SKalle Valo  * @B43_TXPWR_RES_DONE:		No more work to do. Everything is done.
7858619b14SKalle Valo  */
7958619b14SKalle Valo enum b43_txpwr_result {
8058619b14SKalle Valo 	B43_TXPWR_RES_NEED_ADJUST,
8158619b14SKalle Valo 	B43_TXPWR_RES_DONE,
8258619b14SKalle Valo };
8358619b14SKalle Valo 
8458619b14SKalle Valo /**
8558619b14SKalle Valo  * struct b43_phy_operations - Function pointers for PHY ops.
8658619b14SKalle Valo  *
8758619b14SKalle Valo  * @allocate:		Allocate and initialise the PHY data structures.
8858619b14SKalle Valo  * 			Must not be NULL.
8958619b14SKalle Valo  * @free:		Destroy and free the PHY data structures.
9058619b14SKalle Valo  * 			Must not be NULL.
9158619b14SKalle Valo  *
9258619b14SKalle Valo  * @prepare_structs:	Prepare the PHY data structures.
9358619b14SKalle Valo  * 			The data structures allocated in @allocate are
9458619b14SKalle Valo  * 			initialized here.
9558619b14SKalle Valo  * 			Must not be NULL.
9658619b14SKalle Valo  * @prepare_hardware:	Prepare the PHY. This is called before b43_chip_init to
9758619b14SKalle Valo  * 			do some early early PHY hardware init.
9858619b14SKalle Valo  * 			Can be NULL, if not required.
9958619b14SKalle Valo  * @init:		Initialize the PHY.
10058619b14SKalle Valo  * 			Must not be NULL.
10158619b14SKalle Valo  * @exit:		Shutdown the PHY.
10258619b14SKalle Valo  * 			Can be NULL, if not required.
10358619b14SKalle Valo  *
10458619b14SKalle Valo  * @phy_read:		Read from a PHY register.
10558619b14SKalle Valo  * 			Must not be NULL.
10658619b14SKalle Valo  * @phy_write:		Write to a PHY register.
10758619b14SKalle Valo  * 			Must not be NULL.
10858619b14SKalle Valo  * @phy_maskset:	Maskset a PHY register, taking shortcuts.
10958619b14SKalle Valo  *			If it is NULL, a generic algorithm is used.
11058619b14SKalle Valo  * @radio_read:		Read from a Radio register.
11158619b14SKalle Valo  * 			Must not be NULL.
11258619b14SKalle Valo  * @radio_write:	Write to a Radio register.
11358619b14SKalle Valo  * 			Must not be NULL.
11458619b14SKalle Valo  *
11558619b14SKalle Valo  * @supports_hwpctl:	Returns a boolean whether Hardware Power Control
11658619b14SKalle Valo  * 			is supported or not.
11758619b14SKalle Valo  * 			If NULL, hwpctl is assumed to be never supported.
11858619b14SKalle Valo  * @software_rfkill:	Turn the radio ON or OFF.
11958619b14SKalle Valo  * 			Possible state values are
12058619b14SKalle Valo  * 			RFKILL_STATE_SOFT_BLOCKED or
12158619b14SKalle Valo  * 			RFKILL_STATE_UNBLOCKED
12258619b14SKalle Valo  * 			Must not be NULL.
12358619b14SKalle Valo  * @switch_analog:	Turn the Analog on/off.
12458619b14SKalle Valo  * 			Must not be NULL.
12558619b14SKalle Valo  * @switch_channel:	Switch the radio to another channel.
12658619b14SKalle Valo  * 			Must not be NULL.
12758619b14SKalle Valo  * @get_default_chan:	Just returns the default channel number.
12858619b14SKalle Valo  * 			Must not be NULL.
12958619b14SKalle Valo  * @set_rx_antenna:	Set the antenna used for RX.
13058619b14SKalle Valo  * 			Can be NULL, if not supported.
13158619b14SKalle Valo  * @interf_mitigation:	Switch the Interference Mitigation mode.
13258619b14SKalle Valo  * 			Can be NULL, if not supported.
13358619b14SKalle Valo  *
13458619b14SKalle Valo  * @recalc_txpower:	Recalculate the transmission power parameters.
13558619b14SKalle Valo  * 			This callback has to recalculate the TX power settings,
13658619b14SKalle Valo  * 			but does not need to write them to the hardware, yet.
13758619b14SKalle Valo  * 			Returns enum b43_txpwr_result to indicate whether the hardware
13858619b14SKalle Valo  * 			needs to be adjusted.
13958619b14SKalle Valo  * 			If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
14058619b14SKalle Valo  * 			will be called later.
14158619b14SKalle Valo  * 			If the parameter "ignore_tssi" is true, the TSSI values should
14258619b14SKalle Valo  * 			be ignored and a recalculation of the power settings should be
14358619b14SKalle Valo  * 			done even if the TSSI values did not change.
14458619b14SKalle Valo  * 			This function may sleep, but should not.
14558619b14SKalle Valo  * 			Must not be NULL.
14658619b14SKalle Valo  * @adjust_txpower:	Write the previously calculated TX power settings
14758619b14SKalle Valo  * 			(from @recalc_txpower) to the hardware.
14858619b14SKalle Valo  * 			This function may sleep.
14958619b14SKalle Valo  * 			Can be NULL, if (and ONLY if) @recalc_txpower _always_
15058619b14SKalle Valo  * 			returns B43_TXPWR_RES_DONE.
15158619b14SKalle Valo  *
15258619b14SKalle Valo  * @pwork_15sec:	Periodic work. Called every 15 seconds.
15358619b14SKalle Valo  * 			Can be NULL, if not required.
15458619b14SKalle Valo  * @pwork_60sec:	Periodic work. Called every 60 seconds.
15558619b14SKalle Valo  * 			Can be NULL, if not required.
15658619b14SKalle Valo  */
15758619b14SKalle Valo struct b43_phy_operations {
15858619b14SKalle Valo 	/* Initialisation */
15958619b14SKalle Valo 	int (*allocate)(struct b43_wldev *dev);
16058619b14SKalle Valo 	void (*free)(struct b43_wldev *dev);
16158619b14SKalle Valo 	void (*prepare_structs)(struct b43_wldev *dev);
16258619b14SKalle Valo 	int (*prepare_hardware)(struct b43_wldev *dev);
16358619b14SKalle Valo 	int (*init)(struct b43_wldev *dev);
16458619b14SKalle Valo 	void (*exit)(struct b43_wldev *dev);
16558619b14SKalle Valo 
16658619b14SKalle Valo 	/* Register access */
16758619b14SKalle Valo 	u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
16858619b14SKalle Valo 	void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
16958619b14SKalle Valo 	void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
17058619b14SKalle Valo 	u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
17158619b14SKalle Valo 	void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
17258619b14SKalle Valo 
17358619b14SKalle Valo 	/* Radio */
17458619b14SKalle Valo 	bool (*supports_hwpctl)(struct b43_wldev *dev);
17558619b14SKalle Valo 	void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
17658619b14SKalle Valo 	void (*switch_analog)(struct b43_wldev *dev, bool on);
17758619b14SKalle Valo 	int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
17858619b14SKalle Valo 	unsigned int (*get_default_chan)(struct b43_wldev *dev);
17958619b14SKalle Valo 	void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
18058619b14SKalle Valo 	int (*interf_mitigation)(struct b43_wldev *dev,
18158619b14SKalle Valo 				 enum b43_interference_mitigation new_mode);
18258619b14SKalle Valo 
18358619b14SKalle Valo 	/* Transmission power adjustment */
18458619b14SKalle Valo 	enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
18558619b14SKalle Valo 						bool ignore_tssi);
18658619b14SKalle Valo 	void (*adjust_txpower)(struct b43_wldev *dev);
18758619b14SKalle Valo 
18858619b14SKalle Valo 	/* Misc */
18958619b14SKalle Valo 	void (*pwork_15sec)(struct b43_wldev *dev);
19058619b14SKalle Valo 	void (*pwork_60sec)(struct b43_wldev *dev);
19158619b14SKalle Valo };
19258619b14SKalle Valo 
19358619b14SKalle Valo struct b43_phy_a;
19458619b14SKalle Valo struct b43_phy_g;
19558619b14SKalle Valo struct b43_phy_n;
19658619b14SKalle Valo struct b43_phy_lp;
19758619b14SKalle Valo struct b43_phy_ht;
19858619b14SKalle Valo struct b43_phy_lcn;
19958619b14SKalle Valo 
20058619b14SKalle Valo struct b43_phy {
20158619b14SKalle Valo 	/* Hardware operation callbacks. */
20258619b14SKalle Valo 	const struct b43_phy_operations *ops;
20358619b14SKalle Valo 
20458619b14SKalle Valo 	/* Most hardware context information is stored in the standard-
20558619b14SKalle Valo 	 * specific data structures pointed to by the pointers below.
20658619b14SKalle Valo 	 * Only one of them is valid (the currently enabled PHY). */
20758619b14SKalle Valo #ifdef CONFIG_B43_DEBUG
20858619b14SKalle Valo 	/* No union for debug build to force NULL derefs in buggy code. */
20958619b14SKalle Valo 	struct {
21058619b14SKalle Valo #else
21158619b14SKalle Valo 	union {
21258619b14SKalle Valo #endif
21358619b14SKalle Valo 		/* A-PHY specific information */
21458619b14SKalle Valo 		struct b43_phy_a *a;
21558619b14SKalle Valo 		/* G-PHY specific information */
21658619b14SKalle Valo 		struct b43_phy_g *g;
21758619b14SKalle Valo 		/* N-PHY specific information */
21858619b14SKalle Valo 		struct b43_phy_n *n;
21958619b14SKalle Valo 		/* LP-PHY specific information */
22058619b14SKalle Valo 		struct b43_phy_lp *lp;
22158619b14SKalle Valo 		/* HT-PHY specific information */
22258619b14SKalle Valo 		struct b43_phy_ht *ht;
22358619b14SKalle Valo 		/* LCN-PHY specific information */
22458619b14SKalle Valo 		struct b43_phy_lcn *lcn;
22558619b14SKalle Valo 		/* AC-PHY specific information */
22658619b14SKalle Valo 		struct b43_phy_ac *ac;
22758619b14SKalle Valo 	};
22858619b14SKalle Valo 
22958619b14SKalle Valo 	/* Band support flags. */
23058619b14SKalle Valo 	bool supports_2ghz;
23158619b14SKalle Valo 	bool supports_5ghz;
23258619b14SKalle Valo 
23358619b14SKalle Valo 	/* Is GMODE (2 GHz mode) bit enabled? */
23458619b14SKalle Valo 	bool gmode;
23558619b14SKalle Valo 
23658619b14SKalle Valo 	/* After power reset full init has to be performed */
23758619b14SKalle Valo 	bool do_full_init;
23858619b14SKalle Valo 
23958619b14SKalle Valo 	/* Analog Type */
24058619b14SKalle Valo 	u8 analog;
24158619b14SKalle Valo 	/* B43_PHYTYPE_ */
24258619b14SKalle Valo 	u8 type;
24358619b14SKalle Valo 	/* PHY revision number. */
24458619b14SKalle Valo 	u8 rev;
24558619b14SKalle Valo 
24658619b14SKalle Valo 	/* Count writes since last read */
24758619b14SKalle Valo 	u8 writes_counter;
24858619b14SKalle Valo 
24958619b14SKalle Valo 	/* Radio versioning */
25058619b14SKalle Valo 	u16 radio_manuf;	/* Radio manufacturer */
25158619b14SKalle Valo 	u16 radio_ver;		/* Radio version */
25258619b14SKalle Valo 	u8 radio_rev;		/* Radio revision */
25358619b14SKalle Valo 
25458619b14SKalle Valo 	/* Software state of the radio */
25558619b14SKalle Valo 	bool radio_on;
25658619b14SKalle Valo 
25758619b14SKalle Valo 	/* Desired TX power level (in dBm).
25858619b14SKalle Valo 	 * This is set by the user and adjusted in b43_phy_xmitpower(). */
25958619b14SKalle Valo 	int desired_txpower;
26058619b14SKalle Valo 
26158619b14SKalle Valo 	/* Hardware Power Control enabled? */
26258619b14SKalle Valo 	bool hardware_power_control;
26358619b14SKalle Valo 
26458619b14SKalle Valo 	/* The time (in absolute jiffies) when the next TX power output
26558619b14SKalle Valo 	 * check is needed. */
26658619b14SKalle Valo 	unsigned long next_txpwr_check_time;
26758619b14SKalle Valo 
26858619b14SKalle Valo 	/* Current channel */
26958619b14SKalle Valo 	struct cfg80211_chan_def *chandef;
27058619b14SKalle Valo 	unsigned int channel;
27158619b14SKalle Valo 
27258619b14SKalle Valo 	/* PHY TX errors counter. */
27358619b14SKalle Valo 	atomic_t txerr_cnt;
27458619b14SKalle Valo 
27558619b14SKalle Valo #ifdef CONFIG_B43_DEBUG
27658619b14SKalle Valo 	/* PHY registers locked (w.r.t. firmware) */
27758619b14SKalle Valo 	bool phy_locked;
27858619b14SKalle Valo 	/* Radio registers locked (w.r.t. firmware) */
27958619b14SKalle Valo 	bool radio_locked;
28058619b14SKalle Valo #endif /* B43_DEBUG */
28158619b14SKalle Valo };
28258619b14SKalle Valo 
28358619b14SKalle Valo 
28458619b14SKalle Valo /**
28558619b14SKalle Valo  * b43_phy_allocate - Allocate PHY structs
28658619b14SKalle Valo  * Allocate the PHY data structures, based on the current dev->phy.type
28758619b14SKalle Valo  */
28858619b14SKalle Valo int b43_phy_allocate(struct b43_wldev *dev);
28958619b14SKalle Valo 
29058619b14SKalle Valo /**
29158619b14SKalle Valo  * b43_phy_free - Free PHY structs
29258619b14SKalle Valo  */
29358619b14SKalle Valo void b43_phy_free(struct b43_wldev *dev);
29458619b14SKalle Valo 
29558619b14SKalle Valo /**
29658619b14SKalle Valo  * b43_phy_init - Initialise the PHY
29758619b14SKalle Valo  */
29858619b14SKalle Valo int b43_phy_init(struct b43_wldev *dev);
29958619b14SKalle Valo 
30058619b14SKalle Valo /**
30158619b14SKalle Valo  * b43_phy_exit - Cleanup PHY
30258619b14SKalle Valo  */
30358619b14SKalle Valo void b43_phy_exit(struct b43_wldev *dev);
30458619b14SKalle Valo 
30558619b14SKalle Valo /**
30658619b14SKalle Valo  * b43_has_hardware_pctl - Hardware Power Control supported?
30758619b14SKalle Valo  * Returns a boolean, whether hardware power control is supported.
30858619b14SKalle Valo  */
30958619b14SKalle Valo bool b43_has_hardware_pctl(struct b43_wldev *dev);
31058619b14SKalle Valo 
31158619b14SKalle Valo /**
31258619b14SKalle Valo  * b43_phy_read - 16bit PHY register read access
31358619b14SKalle Valo  */
31458619b14SKalle Valo u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
31558619b14SKalle Valo 
31658619b14SKalle Valo /**
31758619b14SKalle Valo  * b43_phy_write - 16bit PHY register write access
31858619b14SKalle Valo  */
31958619b14SKalle Valo void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
32058619b14SKalle Valo 
32158619b14SKalle Valo /**
32258619b14SKalle Valo  * b43_phy_copy - copy contents of 16bit PHY register to another
32358619b14SKalle Valo  */
32458619b14SKalle Valo void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
32558619b14SKalle Valo 
32658619b14SKalle Valo /**
32758619b14SKalle Valo  * b43_phy_mask - Mask a PHY register with a mask
32858619b14SKalle Valo  */
32958619b14SKalle Valo void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
33058619b14SKalle Valo 
33158619b14SKalle Valo /**
33258619b14SKalle Valo  * b43_phy_set - OR a PHY register with a bitmap
33358619b14SKalle Valo  */
33458619b14SKalle Valo void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
33558619b14SKalle Valo 
33658619b14SKalle Valo /**
33758619b14SKalle Valo  * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
33858619b14SKalle Valo  */
33958619b14SKalle Valo void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
34058619b14SKalle Valo 
34158619b14SKalle Valo /**
34258619b14SKalle Valo  * b43_radio_read - 16bit Radio register read access
34358619b14SKalle Valo  */
34458619b14SKalle Valo u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
34558619b14SKalle Valo #define b43_radio_read16	b43_radio_read /* DEPRECATED */
34658619b14SKalle Valo 
34758619b14SKalle Valo /**
34858619b14SKalle Valo  * b43_radio_write - 16bit Radio register write access
34958619b14SKalle Valo  */
35058619b14SKalle Valo void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
35158619b14SKalle Valo #define b43_radio_write16	b43_radio_write /* DEPRECATED */
35258619b14SKalle Valo 
35358619b14SKalle Valo /**
35458619b14SKalle Valo  * b43_radio_mask - Mask a 16bit radio register with a mask
35558619b14SKalle Valo  */
35658619b14SKalle Valo void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
35758619b14SKalle Valo 
35858619b14SKalle Valo /**
35958619b14SKalle Valo  * b43_radio_set - OR a 16bit radio register with a bitmap
36058619b14SKalle Valo  */
36158619b14SKalle Valo void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
36258619b14SKalle Valo 
36358619b14SKalle Valo /**
36458619b14SKalle Valo  * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
36558619b14SKalle Valo  */
36658619b14SKalle Valo void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
36758619b14SKalle Valo 
36858619b14SKalle Valo /**
36958619b14SKalle Valo  * b43_radio_wait_value - Waits for a given value in masked register read
37058619b14SKalle Valo  */
37158619b14SKalle Valo bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask,
37258619b14SKalle Valo 			  u16 value, int delay, int timeout);
37358619b14SKalle Valo 
37458619b14SKalle Valo /**
37558619b14SKalle Valo  * b43_radio_lock - Lock firmware radio register access
37658619b14SKalle Valo  */
37758619b14SKalle Valo void b43_radio_lock(struct b43_wldev *dev);
37858619b14SKalle Valo 
37958619b14SKalle Valo /**
38058619b14SKalle Valo  * b43_radio_unlock - Unlock firmware radio register access
38158619b14SKalle Valo  */
38258619b14SKalle Valo void b43_radio_unlock(struct b43_wldev *dev);
38358619b14SKalle Valo 
38458619b14SKalle Valo /**
38558619b14SKalle Valo  * b43_phy_lock - Lock firmware PHY register access
38658619b14SKalle Valo  */
38758619b14SKalle Valo void b43_phy_lock(struct b43_wldev *dev);
38858619b14SKalle Valo 
38958619b14SKalle Valo /**
39058619b14SKalle Valo  * b43_phy_unlock - Unlock firmware PHY register access
39158619b14SKalle Valo  */
39258619b14SKalle Valo void b43_phy_unlock(struct b43_wldev *dev);
39358619b14SKalle Valo 
39458619b14SKalle Valo void b43_phy_put_into_reset(struct b43_wldev *dev);
39558619b14SKalle Valo void b43_phy_take_out_of_reset(struct b43_wldev *dev);
39658619b14SKalle Valo 
39758619b14SKalle Valo /**
39858619b14SKalle Valo  * b43_switch_channel - Switch to another channel
39958619b14SKalle Valo  */
40058619b14SKalle Valo int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
40158619b14SKalle Valo 
40258619b14SKalle Valo /**
40358619b14SKalle Valo  * b43_software_rfkill - Turn the radio ON or OFF in software.
40458619b14SKalle Valo  */
40558619b14SKalle Valo void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
40658619b14SKalle Valo 
40758619b14SKalle Valo /**
40858619b14SKalle Valo  * b43_phy_txpower_check - Check TX power output.
40958619b14SKalle Valo  *
41058619b14SKalle Valo  * Compare the current TX power output to the desired power emission
41158619b14SKalle Valo  * and schedule an adjustment in case it mismatches.
41258619b14SKalle Valo  *
41358619b14SKalle Valo  * @flags:	OR'ed enum b43_phy_txpower_check_flags flags.
41458619b14SKalle Valo  * 		See the docs below.
41558619b14SKalle Valo  */
41658619b14SKalle Valo void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
41758619b14SKalle Valo /**
41858619b14SKalle Valo  * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
41958619b14SKalle Valo  *
42058619b14SKalle Valo  * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
42158619b14SKalle Valo  *                         the check now.
42258619b14SKalle Valo  * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
42358619b14SKalle Valo  *                         TSSI did not change.
42458619b14SKalle Valo  */
42558619b14SKalle Valo enum b43_phy_txpower_check_flags {
42658619b14SKalle Valo 	B43_TXPWR_IGNORE_TIME		= (1 << 0),
42758619b14SKalle Valo 	B43_TXPWR_IGNORE_TSSI		= (1 << 1),
42858619b14SKalle Valo };
42958619b14SKalle Valo 
43058619b14SKalle Valo struct work_struct;
43158619b14SKalle Valo void b43_phy_txpower_adjust_work(struct work_struct *work);
43258619b14SKalle Valo 
43358619b14SKalle Valo /**
43458619b14SKalle Valo  * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
43558619b14SKalle Valo  *
43658619b14SKalle Valo  * @shm_offset:		The SHM address to read the values from.
43758619b14SKalle Valo  *
43858619b14SKalle Valo  * Returns the average of the 4 TSSI values, or a negative error code.
43958619b14SKalle Valo  */
44058619b14SKalle Valo int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
44158619b14SKalle Valo 
44258619b14SKalle Valo /**
44358619b14SKalle Valo  * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
44458619b14SKalle Valo  *
44558619b14SKalle Valo  * It does the switching based on the PHY0 core register.
44658619b14SKalle Valo  * Do _not_ call this directly. Only use it as a switch_analog callback
44758619b14SKalle Valo  * for struct b43_phy_operations.
44858619b14SKalle Valo  */
44958619b14SKalle Valo void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
45058619b14SKalle Valo 
45158619b14SKalle Valo bool b43_is_40mhz(struct b43_wldev *dev);
45258619b14SKalle Valo 
45358619b14SKalle Valo void b43_phy_force_clock(struct b43_wldev *dev, bool force);
45458619b14SKalle Valo 
45558619b14SKalle Valo struct b43_c32 b43_cordic(int theta);
45658619b14SKalle Valo 
45758619b14SKalle Valo #endif /* LINUX_B43_PHY_COMMON_H_ */
458