1 /*
2  * Copyright (c) 2012 Qualcomm Atheros, Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef __WIL6210_H__
18 #define __WIL6210_H__
19 
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 
24 #define WIL_NAME "wil6210"
25 
26 /**
27  * extract bits [@b0:@b1] (inclusive) from the value @x
28  * it should be @b0 <= @b1, or result is incorrect
29  */
30 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
31 {
32 	return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
33 }
34 
35 #define WIL6210_MEM_SIZE (2*1024*1024UL)
36 
37 #define WIL6210_RX_RING_SIZE (128)
38 #define WIL6210_TX_RING_SIZE (128)
39 #define WIL6210_MAX_TX_RINGS (24)
40 
41 /* Hardware definitions begin */
42 
43 /*
44  * Mapping
45  * RGF File      | Host addr    |  FW addr
46  *               |              |
47  * user_rgf      | 0x000000     | 0x880000
48  *  dma_rgf      | 0x001000     | 0x881000
49  * pcie_rgf      | 0x002000     | 0x882000
50  *               |              |
51  */
52 
53 /* Where various structures placed in host address space */
54 #define WIL6210_FW_HOST_OFF      (0x880000UL)
55 
56 #define HOSTADDR(fwaddr)        (fwaddr - WIL6210_FW_HOST_OFF)
57 
58 /*
59  * Interrupt control registers block
60  *
61  * each interrupt controlled by the same bit in all registers
62  */
63 struct RGF_ICR {
64 	u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
65 	u32 ICR; /* Cause, W1C/COR depending on ICC */
66 	u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
67 	u32 ICS; /* Cause Set, WO */
68 	u32 IMV; /* Mask, RW+S/C */
69 	u32 IMS; /* Mask Set, write 1 to set */
70 	u32 IMC; /* Mask Clear, write 1 to clear */
71 } __packed;
72 
73 /* registers - FW addresses */
74 #define RGF_USER_USER_SCRATCH_PAD	(0x8802bc)
75 #define RGF_USER_USER_ICR		(0x880b4c) /* struct RGF_ICR */
76 	#define BIT_USER_USER_ICR_SW_INT_2	BIT(18)
77 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0	(0x880b14)
78 #define RGF_USER_MAC_CPU_0		(0x8801fc)
79 #define RGF_USER_USER_CPU_0		(0x8801e0)
80 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0	(0x880b04)
81 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1	(0x880b08)
82 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2	(0x880b0c)
83 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3	(0x880b10)
84 
85 #define RGF_DMA_PSEUDO_CAUSE		(0x881c68)
86 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW	(0x881c6c)
87 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW	(0x881c70)
88 	#define BIT_DMA_PSEUDO_CAUSE_RX		BIT(0)
89 	#define BIT_DMA_PSEUDO_CAUSE_TX		BIT(1)
90 	#define BIT_DMA_PSEUDO_CAUSE_MISC	BIT(2)
91 
92 #define RGF_DMA_EP_TX_ICR		(0x881bb4) /* struct RGF_ICR */
93 	#define BIT_DMA_EP_TX_ICR_TX_DONE	BIT(0)
94 	#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)	BIT(n+1) /* n = [0..23] */
95 #define RGF_DMA_EP_RX_ICR		(0x881bd0) /* struct RGF_ICR */
96 	#define BIT_DMA_EP_RX_ICR_RX_DONE	BIT(0)
97 #define RGF_DMA_EP_MISC_ICR		(0x881bec) /* struct RGF_ICR */
98 	#define BIT_DMA_EP_MISC_ICR_RX_HTRSH	BIT(0)
99 	#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT	BIT(1)
100 	#define BIT_DMA_EP_MISC_ICR_FW_INT(n)	BIT(28+n) /* n = [0..3] */
101 
102 /* Interrupt moderation control */
103 #define RGF_DMA_ITR_CNT_TRSH		(0x881c5c)
104 #define RGF_DMA_ITR_CNT_DATA		(0x881c60)
105 #define RGF_DMA_ITR_CNT_CRL		(0x881C64)
106 	#define BIT_DMA_ITR_CNT_CRL_EN		BIT(0)
107 	#define BIT_DMA_ITR_CNT_CRL_EXT_TICK	BIT(1)
108 	#define BIT_DMA_ITR_CNT_CRL_FOREVER	BIT(2)
109 	#define BIT_DMA_ITR_CNT_CRL_CLR		BIT(3)
110 	#define BIT_DMA_ITR_CNT_CRL_REACH_TRSH	BIT(4)
111 
112 /* popular locations */
113 #define HOST_MBOX   HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
114 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
115 	offsetof(struct RGF_ICR, ICS))
116 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
117 
118 /* ISR register bits */
119 #define ISR_MISC_FW_READY	BIT_DMA_EP_MISC_ICR_FW_INT(0)
120 #define ISR_MISC_MBOX_EVT	BIT_DMA_EP_MISC_ICR_FW_INT(1)
121 #define ISR_MISC_FW_ERROR	BIT_DMA_EP_MISC_ICR_FW_INT(3)
122 
123 /* Hardware definitions end */
124 
125 struct wil6210_mbox_ring {
126 	u32 base;
127 	u16 entry_size; /* max. size of mbox entry, incl. all headers */
128 	u16 size;
129 	u32 tail;
130 	u32 head;
131 } __packed;
132 
133 struct wil6210_mbox_ring_desc {
134 	__le32 sync;
135 	__le32 addr;
136 } __packed;
137 
138 /* at HOST_OFF_WIL6210_MBOX_CTL */
139 struct wil6210_mbox_ctl {
140 	struct wil6210_mbox_ring tx;
141 	struct wil6210_mbox_ring rx;
142 } __packed;
143 
144 struct wil6210_mbox_hdr {
145 	__le16 seq;
146 	__le16 len; /* payload, bytes after this header */
147 	__le16 type;
148 	u8 flags;
149 	u8 reserved;
150 } __packed;
151 
152 #define WIL_MBOX_HDR_TYPE_WMI (0)
153 
154 /* max. value for wil6210_mbox_hdr.len */
155 #define MAX_MBOXITEM_SIZE   (240)
156 
157 struct wil6210_mbox_hdr_wmi {
158 	u8 reserved0[2];
159 	__le16 id;
160 	__le16 info1; /* bits [0..3] - device_id, rest - unused */
161 	u8 reserved1[2];
162 } __packed;
163 
164 struct pending_wmi_event {
165 	struct list_head list;
166 	struct {
167 		struct wil6210_mbox_hdr hdr;
168 		struct wil6210_mbox_hdr_wmi wmi;
169 		u8 data[0];
170 	} __packed event;
171 };
172 
173 union vring_desc;
174 
175 struct vring {
176 	dma_addr_t pa;
177 	volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
178 	u16 size; /* number of vring_desc elements */
179 	u32 swtail;
180 	u32 swhead;
181 	u32 hwtail; /* write here to inform hw */
182 	void **ctx; /* void *ctx[size] - software context */
183 };
184 
185 enum { /* for wil6210_priv.status */
186 	wil_status_fwready = 0,
187 	wil_status_fwconnected,
188 	wil_status_dontscan,
189 	wil_status_reset_done,
190 	wil_status_irqen, /* FIXME: interrupts enabled - for debug */
191 };
192 
193 struct pci_dev;
194 
195 struct wil6210_stats {
196 	u64 tsf;
197 	u32 snr;
198 	u16 last_mcs_rx;
199 	u16 bf_mcs; /* last BF, used for Tx */
200 	u16 my_rx_sector;
201 	u16 my_tx_sector;
202 	u16 peer_rx_sector;
203 	u16 peer_tx_sector;
204 };
205 
206 struct wil6210_priv {
207 	struct pci_dev *pdev;
208 	int n_msi;
209 	struct wireless_dev *wdev;
210 	void __iomem *csr;
211 	ulong status;
212 	u32 fw_version;
213 	u8 n_mids; /* number of additional MIDs as reported by FW */
214 	/* profile */
215 	u32 monitor_flags;
216 	u32 secure_pcp; /* create secure PCP? */
217 	int sinfo_gen;
218 	/* cached ISR registers */
219 	u32 isr_misc;
220 	/* mailbox related */
221 	struct mutex wmi_mutex;
222 	struct wil6210_mbox_ctl mbox_ctl;
223 	struct completion wmi_ready;
224 	u16 wmi_seq;
225 	u16 reply_id; /**< wait for this WMI event */
226 	void *reply_buf;
227 	u16 reply_size;
228 	struct workqueue_struct *wmi_wq; /* for deferred calls */
229 	struct work_struct wmi_event_worker;
230 	struct workqueue_struct *wmi_wq_conn; /* for connect worker */
231 	struct work_struct connect_worker;
232 	struct work_struct disconnect_worker;
233 	struct timer_list connect_timer;
234 	int pending_connect_cid;
235 	struct list_head pending_wmi_ev;
236 	/*
237 	 * protect pending_wmi_ev
238 	 * - fill in IRQ from wil6210_irq_misc,
239 	 * - consumed in thread by wmi_event_worker
240 	 */
241 	spinlock_t wmi_ev_lock;
242 	/* DMA related */
243 	struct vring vring_rx;
244 	struct vring vring_tx[WIL6210_MAX_TX_RINGS];
245 	u8 dst_addr[WIL6210_MAX_TX_RINGS][ETH_ALEN];
246 	/* scan */
247 	struct cfg80211_scan_request *scan_request;
248 
249 	struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
250 	/* statistics */
251 	struct wil6210_stats stats;
252 	/* debugfs */
253 	struct dentry *debug;
254 	struct debugfs_blob_wrapper fw_code_blob;
255 	struct debugfs_blob_wrapper fw_data_blob;
256 	struct debugfs_blob_wrapper fw_peri_blob;
257 	struct debugfs_blob_wrapper uc_code_blob;
258 	struct debugfs_blob_wrapper uc_data_blob;
259 	struct debugfs_blob_wrapper rgf_blob;
260 };
261 
262 #define wil_to_wiphy(i) (i->wdev->wiphy)
263 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
264 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
265 #define wil_to_wdev(i) (i->wdev)
266 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
267 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
268 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
269 
270 #define wil_dbg(wil, fmt, arg...) netdev_dbg(wil_to_ndev(wil), fmt, ##arg)
271 #define wil_info(wil, fmt, arg...) netdev_info(wil_to_ndev(wil), fmt, ##arg)
272 #define wil_err(wil, fmt, arg...) netdev_err(wil_to_ndev(wil), fmt, ##arg)
273 
274 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
275 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
276 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
277 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
278 
279 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize,	\
280 			  groupsize, buf, len, ascii)		\
281 			  print_hex_dump_debug("DBG[TXRX]" prefix_str,\
282 					 prefix_type, rowsize,	\
283 					 groupsize, buf, len, ascii)
284 
285 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize,	\
286 			 groupsize, buf, len, ascii)		\
287 			 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
288 					prefix_type, rowsize,	\
289 					groupsize, buf, len, ascii)
290 
291 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
292 			  size_t count);
293 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
294 			size_t count);
295 
296 void *wil_if_alloc(struct device *dev, void __iomem *csr);
297 void wil_if_free(struct wil6210_priv *wil);
298 int wil_if_add(struct wil6210_priv *wil);
299 void wil_if_remove(struct wil6210_priv *wil);
300 int wil_priv_init(struct wil6210_priv *wil);
301 void wil_priv_deinit(struct wil6210_priv *wil);
302 int wil_reset(struct wil6210_priv *wil);
303 void wil_link_on(struct wil6210_priv *wil);
304 void wil_link_off(struct wil6210_priv *wil);
305 int wil_up(struct wil6210_priv *wil);
306 int wil_down(struct wil6210_priv *wil);
307 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
308 
309 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
310 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
311 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
312 		 struct wil6210_mbox_hdr *hdr);
313 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
314 void wmi_recv_cmd(struct wil6210_priv *wil);
315 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
316 	     u16 reply_id, void *reply, u8 reply_size, int to_msec);
317 void wmi_event_worker(struct work_struct *work);
318 void wmi_event_flush(struct wil6210_priv *wil);
319 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
320 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
321 int wmi_set_channel(struct wil6210_priv *wil, int channel);
322 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
323 int wmi_tx_eapol(struct wil6210_priv *wil, struct sk_buff *skb);
324 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
325 		       const void *mac_addr);
326 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
327 		       const void *mac_addr, int key_len, const void *key);
328 int wmi_echo(struct wil6210_priv *wil);
329 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
330 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
331 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
332 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
333 
334 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
335 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
336 void wil6210_disable_irq(struct wil6210_priv *wil);
337 void wil6210_enable_irq(struct wil6210_priv *wil);
338 
339 int wil6210_debugfs_init(struct wil6210_priv *wil);
340 void wil6210_debugfs_remove(struct wil6210_priv *wil);
341 
342 struct wireless_dev *wil_cfg80211_init(struct device *dev);
343 void wil_wdev_free(struct wil6210_priv *wil);
344 
345 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
346 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
347 int wmi_pcp_stop(struct wil6210_priv *wil);
348 void wil6210_disconnect(struct wil6210_priv *wil, void *bssid);
349 
350 int wil_rx_init(struct wil6210_priv *wil);
351 void wil_rx_fini(struct wil6210_priv *wil);
352 
353 /* TX API */
354 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
355 		      int cid, int tid);
356 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
357 
358 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
359 void wil_tx_complete(struct wil6210_priv *wil, int ringid);
360 
361 /* RX API */
362 void wil_rx_handle(struct wil6210_priv *wil);
363 
364 int wil_iftype_nl2wmi(enum nl80211_iftype type);
365 
366 #endif /* __WIL6210_H__ */
367