1 /* 2 * Copyright (c) 2012 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WIL6210_H__ 18 #define __WIL6210_H__ 19 20 #include <linux/netdevice.h> 21 #include <linux/wireless.h> 22 #include <net/cfg80211.h> 23 24 #define WIL_NAME "wil6210" 25 26 /** 27 * extract bits [@b0:@b1] (inclusive) from the value @x 28 * it should be @b0 <= @b1, or result is incorrect 29 */ 30 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 31 { 32 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 33 } 34 35 #define WIL6210_MEM_SIZE (2*1024*1024UL) 36 37 #define WIL6210_RX_RING_SIZE (128) 38 #define WIL6210_TX_RING_SIZE (512) 39 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 40 #define WIL6210_MAX_CID (8) /* HW limit */ 41 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 42 #define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */ 43 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 44 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 45 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 46 47 /* Hardware definitions begin */ 48 49 /* 50 * Mapping 51 * RGF File | Host addr | FW addr 52 * | | 53 * user_rgf | 0x000000 | 0x880000 54 * dma_rgf | 0x001000 | 0x881000 55 * pcie_rgf | 0x002000 | 0x882000 56 * | | 57 */ 58 59 /* Where various structures placed in host address space */ 60 #define WIL6210_FW_HOST_OFF (0x880000UL) 61 62 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 63 64 /* 65 * Interrupt control registers block 66 * 67 * each interrupt controlled by the same bit in all registers 68 */ 69 struct RGF_ICR { 70 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 71 u32 ICR; /* Cause, W1C/COR depending on ICC */ 72 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 73 u32 ICS; /* Cause Set, WO */ 74 u32 IMV; /* Mask, RW+S/C */ 75 u32 IMS; /* Mask Set, write 1 to set */ 76 u32 IMC; /* Mask Clear, write 1 to clear */ 77 } __packed; 78 79 /* registers - FW addresses */ 80 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 81 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 82 #define RGF_USER_USER_CPU_0 (0x8801e0) 83 #define RGF_USER_MAC_CPU_0 (0x8801fc) 84 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 85 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 86 #define RGF_USER_CLKS_CTL_0 (0x880abc) 87 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 88 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 89 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 90 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 91 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 92 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 93 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 94 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 95 96 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 97 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 98 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 99 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 100 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 101 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 102 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 103 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 104 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 105 106 /* Interrupt moderation control */ 107 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 108 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 109 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 110 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 111 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 112 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 113 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 114 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 115 116 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 117 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 118 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 119 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 120 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 121 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 122 123 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 124 125 /* popular locations */ 126 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD) 127 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \ 128 offsetof(struct RGF_ICR, ICS)) 129 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 130 131 /* ISR register bits */ 132 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 133 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 134 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 135 136 /* Hardware definitions end */ 137 138 /** 139 * mk_cidxtid - construct @cidxtid field 140 * @cid: CID value 141 * @tid: TID value 142 * 143 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 144 */ 145 static inline u8 mk_cidxtid(u8 cid, u8 tid) 146 { 147 return ((tid & 0xf) << 4) | (cid & 0xf); 148 } 149 150 /** 151 * parse_cidxtid - parse @cidxtid field 152 * @cid: store CID value here 153 * @tid: store TID value here 154 * 155 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 156 */ 157 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 158 { 159 *cid = cidxtid & 0xf; 160 *tid = (cidxtid >> 4) & 0xf; 161 } 162 163 struct wil6210_mbox_ring { 164 u32 base; 165 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 166 u16 size; 167 u32 tail; 168 u32 head; 169 } __packed; 170 171 struct wil6210_mbox_ring_desc { 172 __le32 sync; 173 __le32 addr; 174 } __packed; 175 176 /* at HOST_OFF_WIL6210_MBOX_CTL */ 177 struct wil6210_mbox_ctl { 178 struct wil6210_mbox_ring tx; 179 struct wil6210_mbox_ring rx; 180 } __packed; 181 182 struct wil6210_mbox_hdr { 183 __le16 seq; 184 __le16 len; /* payload, bytes after this header */ 185 __le16 type; 186 u8 flags; 187 u8 reserved; 188 } __packed; 189 190 #define WIL_MBOX_HDR_TYPE_WMI (0) 191 192 /* max. value for wil6210_mbox_hdr.len */ 193 #define MAX_MBOXITEM_SIZE (240) 194 195 /** 196 * struct wil6210_mbox_hdr_wmi - WMI header 197 * 198 * @mid: MAC ID 199 * 00 - default, created by FW 200 * 01..0f - WiFi ports, driver to create 201 * 10..fe - debug 202 * ff - broadcast 203 * @id: command/event ID 204 * @timestamp: FW fills for events, free-running msec timer 205 */ 206 struct wil6210_mbox_hdr_wmi { 207 u8 mid; 208 u8 reserved; 209 __le16 id; 210 __le32 timestamp; 211 } __packed; 212 213 struct pending_wmi_event { 214 struct list_head list; 215 struct { 216 struct wil6210_mbox_hdr hdr; 217 struct wil6210_mbox_hdr_wmi wmi; 218 u8 data[0]; 219 } __packed event; 220 }; 221 222 enum { /* for wil_ctx.mapped_as */ 223 wil_mapped_as_none = 0, 224 wil_mapped_as_single = 1, 225 wil_mapped_as_page = 2, 226 }; 227 228 /** 229 * struct wil_ctx - software context for Vring descriptor 230 */ 231 struct wil_ctx { 232 struct sk_buff *skb; 233 u8 nr_frags; 234 u8 mapped_as; 235 }; 236 237 union vring_desc; 238 239 struct vring { 240 dma_addr_t pa; 241 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 242 u16 size; /* number of vring_desc elements */ 243 u32 swtail; 244 u32 swhead; 245 u32 hwtail; /* write here to inform hw */ 246 struct wil_ctx *ctx; /* ctx[size] - software context */ 247 }; 248 249 /** 250 * Additional data for Tx Vring 251 */ 252 struct vring_tx_data { 253 int enabled; 254 255 }; 256 257 enum { /* for wil6210_priv.status */ 258 wil_status_fwready = 0, 259 wil_status_fwconnecting, 260 wil_status_fwconnected, 261 wil_status_dontscan, 262 wil_status_reset_done, 263 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 264 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 265 }; 266 267 struct pci_dev; 268 269 /** 270 * struct tid_ampdu_rx - TID aggregation information (Rx). 271 * 272 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 273 * @reorder_time: jiffies when skb was added 274 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 275 * @reorder_timer: releases expired frames from the reorder buffer. 276 * @last_rx: jiffies of last rx activity 277 * @head_seq_num: head sequence number in reordering buffer. 278 * @stored_mpdu_num: number of MPDUs in reordering buffer 279 * @ssn: Starting Sequence Number expected to be aggregated. 280 * @buf_size: buffer size for incoming A-MPDUs 281 * @timeout: reset timer value (in TUs). 282 * @dialog_token: dialog token for aggregation session 283 * @rcu_head: RCU head used for freeing this struct 284 * @reorder_lock: serializes access to reorder buffer, see below. 285 * 286 * This structure's lifetime is managed by RCU, assignments to 287 * the array holding it must hold the aggregation mutex. 288 * 289 * The @reorder_lock is used to protect the members of this 290 * struct, except for @timeout, @buf_size and @dialog_token, 291 * which are constant across the lifetime of the struct (the 292 * dialog token being used only for debugging). 293 */ 294 struct wil_tid_ampdu_rx { 295 spinlock_t reorder_lock; /* see above */ 296 struct sk_buff **reorder_buf; 297 unsigned long *reorder_time; 298 struct timer_list session_timer; 299 struct timer_list reorder_timer; 300 unsigned long last_rx; 301 u16 head_seq_num; 302 u16 stored_mpdu_num; 303 u16 ssn; 304 u16 buf_size; 305 u16 timeout; 306 u8 dialog_token; 307 bool first_time; /* is it 1-st time this buffer used? */ 308 }; 309 310 struct wil6210_stats { 311 u64 tsf; 312 u32 snr; 313 u16 last_mcs_rx; 314 u16 bf_mcs; /* last BF, used for Tx */ 315 u16 my_rx_sector; 316 u16 my_tx_sector; 317 u16 peer_rx_sector; 318 u16 peer_tx_sector; 319 }; 320 321 enum wil_sta_status { 322 wil_sta_unused = 0, 323 wil_sta_conn_pending = 1, 324 wil_sta_connected = 2, 325 }; 326 327 #define WIL_STA_TID_NUM (16) 328 329 struct wil_net_stats { 330 unsigned long rx_packets; 331 unsigned long tx_packets; 332 unsigned long rx_bytes; 333 unsigned long tx_bytes; 334 unsigned long tx_errors; 335 unsigned long rx_dropped; 336 u16 last_mcs_rx; 337 }; 338 339 /** 340 * struct wil_sta_info - data for peer 341 * 342 * Peer identified by its CID (connection ID) 343 * NIC performs beam forming for each peer; 344 * if no beam forming done, frame exchange is not 345 * possible. 346 */ 347 struct wil_sta_info { 348 u8 addr[ETH_ALEN]; 349 enum wil_sta_status status; 350 struct wil_net_stats stats; 351 bool data_port_open; /* can send any data, not only EAPOL */ 352 /* Rx BACK */ 353 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 354 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 355 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 356 }; 357 358 struct wil6210_priv { 359 struct pci_dev *pdev; 360 int n_msi; 361 struct wireless_dev *wdev; 362 void __iomem *csr; 363 ulong status; 364 u32 fw_version; 365 u32 hw_version; 366 u8 n_mids; /* number of additional MIDs as reported by FW */ 367 int recovery_count; /* num of FW recovery attempts in a short time */ 368 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 369 /* profile */ 370 u32 monitor_flags; 371 u32 secure_pcp; /* create secure PCP? */ 372 int sinfo_gen; 373 /* cached ISR registers */ 374 u32 isr_misc; 375 /* mailbox related */ 376 struct mutex wmi_mutex; 377 struct wil6210_mbox_ctl mbox_ctl; 378 struct completion wmi_ready; 379 u16 wmi_seq; 380 u16 reply_id; /**< wait for this WMI event */ 381 void *reply_buf; 382 u16 reply_size; 383 struct workqueue_struct *wmi_wq; /* for deferred calls */ 384 struct work_struct wmi_event_worker; 385 struct workqueue_struct *wmi_wq_conn; /* for connect worker */ 386 struct work_struct connect_worker; 387 struct work_struct disconnect_worker; 388 struct work_struct fw_error_worker; /* for FW error recovery */ 389 struct timer_list connect_timer; 390 struct timer_list scan_timer; /* detect scan timeout */ 391 int pending_connect_cid; 392 struct list_head pending_wmi_ev; 393 /* 394 * protect pending_wmi_ev 395 * - fill in IRQ from wil6210_irq_misc, 396 * - consumed in thread by wmi_event_worker 397 */ 398 spinlock_t wmi_ev_lock; 399 struct napi_struct napi_rx; 400 struct napi_struct napi_tx; 401 /* DMA related */ 402 struct vring vring_rx; 403 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 404 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 405 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 406 struct wil_sta_info sta[WIL6210_MAX_CID]; 407 /* scan */ 408 struct cfg80211_scan_request *scan_request; 409 410 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 411 /* statistics */ 412 struct wil6210_stats stats; 413 /* debugfs */ 414 struct dentry *debug; 415 struct debugfs_blob_wrapper fw_code_blob; 416 struct debugfs_blob_wrapper fw_data_blob; 417 struct debugfs_blob_wrapper fw_peri_blob; 418 struct debugfs_blob_wrapper uc_code_blob; 419 struct debugfs_blob_wrapper uc_data_blob; 420 struct debugfs_blob_wrapper rgf_blob; 421 }; 422 423 #define wil_to_wiphy(i) (i->wdev->wiphy) 424 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 425 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 426 #define wil_to_wdev(i) (i->wdev) 427 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 428 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 429 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 430 431 int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 432 int wil_err(struct wil6210_priv *wil, const char *fmt, ...); 433 int wil_info(struct wil6210_priv *wil, const char *fmt, ...); 434 #define wil_dbg(wil, fmt, arg...) do { \ 435 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 436 wil_dbg_trace(wil, fmt, ##arg); \ 437 } while (0) 438 439 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 440 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 441 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 442 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 443 444 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 445 groupsize, buf, len, ascii) \ 446 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 447 prefix_type, rowsize, \ 448 groupsize, buf, len, ascii) 449 450 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 451 groupsize, buf, len, ascii) \ 452 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 453 prefix_type, rowsize, \ 454 groupsize, buf, len, ascii) 455 456 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 457 size_t count); 458 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 459 size_t count); 460 461 void *wil_if_alloc(struct device *dev, void __iomem *csr); 462 void wil_if_free(struct wil6210_priv *wil); 463 int wil_if_add(struct wil6210_priv *wil); 464 void wil_if_remove(struct wil6210_priv *wil); 465 int wil_priv_init(struct wil6210_priv *wil); 466 void wil_priv_deinit(struct wil6210_priv *wil); 467 int wil_reset(struct wil6210_priv *wil); 468 void wil_fw_error_recovery(struct wil6210_priv *wil); 469 void wil_link_on(struct wil6210_priv *wil); 470 void wil_link_off(struct wil6210_priv *wil); 471 int wil_up(struct wil6210_priv *wil); 472 int wil_down(struct wil6210_priv *wil); 473 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 474 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 475 476 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 477 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 478 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 479 struct wil6210_mbox_hdr *hdr); 480 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 481 void wmi_recv_cmd(struct wil6210_priv *wil); 482 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 483 u16 reply_id, void *reply, u8 reply_size, int to_msec); 484 void wmi_event_worker(struct work_struct *work); 485 void wmi_event_flush(struct wil6210_priv *wil); 486 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 487 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 488 int wmi_set_channel(struct wil6210_priv *wil, int channel); 489 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 490 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 491 const void *mac_addr); 492 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 493 const void *mac_addr, int key_len, const void *key); 494 int wmi_echo(struct wil6210_priv *wil); 495 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 496 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 497 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel); 498 int wmi_rxon(struct wil6210_priv *wil, bool on); 499 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 500 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason); 501 502 void wil6210_clear_irq(struct wil6210_priv *wil); 503 int wil6210_init_irq(struct wil6210_priv *wil, int irq); 504 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 505 void wil6210_disable_irq(struct wil6210_priv *wil); 506 void wil6210_enable_irq(struct wil6210_priv *wil); 507 508 int wil6210_debugfs_init(struct wil6210_priv *wil); 509 void wil6210_debugfs_remove(struct wil6210_priv *wil); 510 511 struct wireless_dev *wil_cfg80211_init(struct device *dev); 512 void wil_wdev_free(struct wil6210_priv *wil); 513 514 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 515 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan); 516 int wmi_pcp_stop(struct wil6210_priv *wil); 517 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid); 518 519 int wil_rx_init(struct wil6210_priv *wil); 520 void wil_rx_fini(struct wil6210_priv *wil); 521 522 /* TX API */ 523 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 524 int cid, int tid); 525 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 526 527 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 528 int wil_tx_complete(struct wil6210_priv *wil, int ringid); 529 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 530 531 /* RX API */ 532 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 533 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 534 535 int wil_iftype_nl2wmi(enum nl80211_iftype type); 536 537 #endif /* __WIL6210_H__ */ 538