1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WIL6210_H__ 18 #define __WIL6210_H__ 19 20 #include <linux/etherdevice.h> 21 #include <linux/netdevice.h> 22 #include <linux/wireless.h> 23 #include <net/cfg80211.h> 24 #include <linux/timex.h> 25 #include <linux/types.h> 26 #include "wmi.h" 27 #include "wil_platform.h" 28 29 extern bool no_fw_recovery; 30 extern unsigned int mtu_max; 31 extern unsigned short rx_ring_overflow_thrsh; 32 extern int agg_wsize; 33 extern u32 vring_idle_trsh; 34 extern bool rx_align_2; 35 extern bool rx_large_buf; 36 extern bool debug_fw; 37 extern bool disable_ap_sme; 38 39 #define WIL_NAME "wil6210" 40 41 #define WIL_FW_NAME_DEFAULT "wil6210.fw" 42 #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw" 43 44 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" 45 #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw" 46 47 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */ 48 49 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */ 50 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 51 52 /** 53 * extract bits [@b0:@b1] (inclusive) from the value @x 54 * it should be @b0 <= @b1, or result is incorrect 55 */ 56 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 57 { 58 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 59 } 60 61 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL) 62 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL) 63 64 #define WIL_TX_Q_LEN_DEFAULT (4000) 65 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) 66 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12) 67 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7) 68 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */ 69 /* limit ring size in range [32..32k] */ 70 #define WIL_RING_SIZE_ORDER_MIN (5) 71 #define WIL_RING_SIZE_ORDER_MAX (15) 72 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 73 #define WIL6210_MAX_CID (8) /* HW limit */ 74 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 75 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */ 76 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */ 77 /* Hardware offload block adds the following: 78 * 26 bytes - 3-address QoS data header 79 * 8 bytes - IV + EIV (for GCMP) 80 * 8 bytes - SNAP 81 * 16 bytes - MIC (for GCMP) 82 * 4 bytes - CRC 83 */ 84 #define WIL_MAX_MPDU_OVERHEAD (62) 85 86 struct wil_suspend_stats { 87 unsigned long successful_suspends; 88 unsigned long failed_suspends; 89 unsigned long successful_resumes; 90 unsigned long failed_resumes; 91 unsigned long rejected_by_device; 92 unsigned long rejected_by_host; 93 }; 94 95 /* Calculate MAC buffer size for the firmware. It includes all overhead, 96 * as it will go over the air, and need to be 8 byte aligned 97 */ 98 static inline u32 wil_mtu2macbuf(u32 mtu) 99 { 100 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8); 101 } 102 103 /* MTU for Ethernet need to take into account 8-byte SNAP header 104 * to be added when encapsulating Ethernet frame into 802.11 105 */ 106 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8) 107 /* Max supported by wil6210 value for interrupt threshold is 5sec. */ 108 #define WIL6210_ITR_TRSH_MAX (5000000) 109 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 110 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 111 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 112 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 113 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 114 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 115 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 116 #define WIL6210_DISCONNECT_TO_MS (2000) 117 #define WIL6210_RX_HIGH_TRSH_INIT (0) 118 #define WIL6210_RX_HIGH_TRSH_DEFAULT \ 119 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3)) 120 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see 121 * 802.11REVmc/D5.0, section 9.4.1.8) 122 */ 123 /* Hardware definitions begin */ 124 125 /* 126 * Mapping 127 * RGF File | Host addr | FW addr 128 * | | 129 * user_rgf | 0x000000 | 0x880000 130 * dma_rgf | 0x001000 | 0x881000 131 * pcie_rgf | 0x002000 | 0x882000 132 * | | 133 */ 134 135 /* Where various structures placed in host address space */ 136 #define WIL6210_FW_HOST_OFF (0x880000UL) 137 138 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 139 140 /* 141 * Interrupt control registers block 142 * 143 * each interrupt controlled by the same bit in all registers 144 */ 145 struct RGF_ICR { 146 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 147 u32 ICR; /* Cause, W1C/COR depending on ICC */ 148 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 149 u32 ICS; /* Cause Set, WO */ 150 u32 IMV; /* Mask, RW+S/C */ 151 u32 IMS; /* Mask Set, write 1 to set */ 152 u32 IMC; /* Mask Clear, write 1 to clear */ 153 } __packed; 154 155 /* registers - FW addresses */ 156 #define RGF_USER_USAGE_1 (0x880004) 157 #define RGF_USER_USAGE_6 (0x880018) 158 #define BIT_USER_OOB_MODE BIT(31) 159 #define BIT_USER_OOB_R2_MODE BIT(30) 160 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 161 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 162 #define RGF_USER_USER_CPU_0 (0x8801e0) 163 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 164 #define RGF_USER_MAC_CPU_0 (0x8801fc) 165 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 166 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 167 #define RGF_USER_BL (0x880A3C) /* Boot Loader */ 168 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 169 #define RGF_USER_CLKS_CTL_0 (0x880abc) 170 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 171 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 172 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 173 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 174 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 175 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 176 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 177 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 178 #define BIT_CAR_PERST_RST BIT(7) 179 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 180 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 181 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 182 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 183 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 184 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 185 186 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 187 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 188 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 189 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 190 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 191 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1) 192 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 193 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 194 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 195 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27) 196 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 197 198 /* Legacy interrupt moderation control (before Sparrow v2)*/ 199 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 200 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 201 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 202 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 203 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 204 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 205 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 206 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 207 208 /* Offload control (Sparrow B0+) */ 209 #define RGF_DMA_OFUL_NID_0 (0x881cd4) 210 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0) 211 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1) 212 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2) 213 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3) 214 215 /* New (sparrow v2+) interrupt moderation control */ 216 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40) 217 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34) 218 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38) 219 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c) 220 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0) 221 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1) 222 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2) 223 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3) 224 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4) 225 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5) 226 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6) 227 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60) 228 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64) 229 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68) 230 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0) 231 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 232 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2) 233 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3) 234 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 235 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50) 236 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44) 237 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48) 238 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c) 239 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0) 240 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1) 241 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2) 242 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3) 243 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4) 244 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5) 245 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6) 246 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54) 247 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58) 248 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c) 249 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0) 250 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 251 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2) 252 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3) 253 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 254 255 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 256 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 257 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 258 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 259 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 260 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 261 262 #define RGF_HP_CTRL (0x88265c) 263 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 264 265 /* MAC timer, usec, for packet lifetime */ 266 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 267 268 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 269 #define RGF_CAF_OSC_CONTROL (0x88afa4) 270 #define BIT_CAF_OSC_XTAL_EN BIT(0) 271 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 272 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 273 274 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 275 #define JTAG_DEV_ID_SPARROW (0x2632072f) 276 277 #define RGF_USER_REVISION_ID (0x88afe4) 278 #define RGF_USER_REVISION_ID_MASK (3) 279 #define REVISION_ID_SPARROW_B0 (0x0) 280 #define REVISION_ID_SPARROW_D0 (0x3) 281 282 /* crash codes for FW/Ucode stored here */ 283 #define RGF_FW_ASSERT_CODE (0x91f020) 284 #define RGF_UCODE_ASSERT_CODE (0x91f028) 285 286 enum { 287 HW_VER_UNKNOWN, 288 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */ 289 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */ 290 }; 291 292 /* popular locations */ 293 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD 294 #define HOST_MBOX HOSTADDR(RGF_MBOX) 295 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 296 297 /* ISR register bits */ 298 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 299 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 300 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 301 302 #define WIL_DATA_COMPLETION_TO_MS 200 303 304 /* Hardware definitions end */ 305 struct fw_map { 306 u32 from; /* linker address - from, inclusive */ 307 u32 to; /* linker address - to, exclusive */ 308 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 309 const char *name; /* for debugfs */ 310 bool fw; /* true if FW mapping, false if UCODE mapping */ 311 }; 312 313 /* array size should be in sync with actual definition in the wmi.c */ 314 extern const struct fw_map fw_mapping[10]; 315 316 /** 317 * mk_cidxtid - construct @cidxtid field 318 * @cid: CID value 319 * @tid: TID value 320 * 321 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 322 */ 323 static inline u8 mk_cidxtid(u8 cid, u8 tid) 324 { 325 return ((tid & 0xf) << 4) | (cid & 0xf); 326 } 327 328 /** 329 * parse_cidxtid - parse @cidxtid field 330 * @cid: store CID value here 331 * @tid: store TID value here 332 * 333 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 334 */ 335 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 336 { 337 *cid = cidxtid & 0xf; 338 *tid = (cidxtid >> 4) & 0xf; 339 } 340 341 struct wil6210_mbox_ring { 342 u32 base; 343 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 344 u16 size; 345 u32 tail; 346 u32 head; 347 } __packed; 348 349 struct wil6210_mbox_ring_desc { 350 __le32 sync; 351 __le32 addr; 352 } __packed; 353 354 /* at HOST_OFF_WIL6210_MBOX_CTL */ 355 struct wil6210_mbox_ctl { 356 struct wil6210_mbox_ring tx; 357 struct wil6210_mbox_ring rx; 358 } __packed; 359 360 struct wil6210_mbox_hdr { 361 __le16 seq; 362 __le16 len; /* payload, bytes after this header */ 363 __le16 type; 364 u8 flags; 365 u8 reserved; 366 } __packed; 367 368 #define WIL_MBOX_HDR_TYPE_WMI (0) 369 370 /* max. value for wil6210_mbox_hdr.len */ 371 #define MAX_MBOXITEM_SIZE (240) 372 373 struct pending_wmi_event { 374 struct list_head list; 375 struct { 376 struct wil6210_mbox_hdr hdr; 377 struct wmi_cmd_hdr wmi; 378 u8 data[0]; 379 } __packed event; 380 }; 381 382 enum { /* for wil_ctx.mapped_as */ 383 wil_mapped_as_none = 0, 384 wil_mapped_as_single = 1, 385 wil_mapped_as_page = 2, 386 }; 387 388 /** 389 * struct wil_ctx - software context for Vring descriptor 390 */ 391 struct wil_ctx { 392 struct sk_buff *skb; 393 u8 nr_frags; 394 u8 mapped_as; 395 }; 396 397 union vring_desc; 398 399 struct vring { 400 dma_addr_t pa; 401 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 402 u16 size; /* number of vring_desc elements */ 403 u32 swtail; 404 u32 swhead; 405 u32 hwtail; /* write here to inform hw */ 406 struct wil_ctx *ctx; /* ctx[size] - software context */ 407 }; 408 409 /** 410 * Additional data for Tx Vring 411 */ 412 struct vring_tx_data { 413 bool dot1x_open; 414 int enabled; 415 cycles_t idle, last_idle, begin; 416 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */ 417 u16 agg_timeout; 418 u8 agg_amsdu; 419 bool addba_in_progress; /* if set, agg_xxx is for request in progress */ 420 spinlock_t lock; 421 }; 422 423 enum { /* for wil6210_priv.status */ 424 wil_status_fwready = 0, /* FW operational */ 425 wil_status_fwconnecting, 426 wil_status_fwconnected, 427 wil_status_dontscan, 428 wil_status_mbox_ready, /* MBOX structures ready */ 429 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 430 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 431 wil_status_resetting, /* reset in progress */ 432 wil_status_suspending, /* suspend in progress */ 433 wil_status_suspended, /* suspend completed, device is suspended */ 434 wil_status_resuming, /* resume in progress */ 435 wil_status_last /* keep last */ 436 }; 437 438 struct pci_dev; 439 440 /** 441 * struct tid_ampdu_rx - TID aggregation information (Rx). 442 * 443 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 444 * @reorder_time: jiffies when skb was added 445 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 446 * @reorder_timer: releases expired frames from the reorder buffer. 447 * @last_rx: jiffies of last rx activity 448 * @head_seq_num: head sequence number in reordering buffer. 449 * @stored_mpdu_num: number of MPDUs in reordering buffer 450 * @ssn: Starting Sequence Number expected to be aggregated. 451 * @buf_size: buffer size for incoming A-MPDUs 452 * @timeout: reset timer value (in TUs). 453 * @ssn_last_drop: SSN of the last dropped frame 454 * @total: total number of processed incoming frames 455 * @drop_dup: duplicate frames dropped for this reorder buffer 456 * @drop_old: old frames dropped for this reorder buffer 457 * @dialog_token: dialog token for aggregation session 458 * @first_time: true when this buffer used 1-st time 459 */ 460 struct wil_tid_ampdu_rx { 461 struct sk_buff **reorder_buf; 462 unsigned long *reorder_time; 463 struct timer_list session_timer; 464 struct timer_list reorder_timer; 465 unsigned long last_rx; 466 u16 head_seq_num; 467 u16 stored_mpdu_num; 468 u16 ssn; 469 u16 buf_size; 470 u16 timeout; 471 u16 ssn_last_drop; 472 unsigned long long total; /* frames processed */ 473 unsigned long long drop_dup; 474 unsigned long long drop_old; 475 u8 dialog_token; 476 bool first_time; /* is it 1-st time this buffer used? */ 477 }; 478 479 /** 480 * struct wil_tid_crypto_rx_single - TID crypto information (Rx). 481 * 482 * @pn: GCMP PN for the session 483 * @key_set: valid key present 484 */ 485 struct wil_tid_crypto_rx_single { 486 u8 pn[IEEE80211_GCMP_PN_LEN]; 487 bool key_set; 488 }; 489 490 struct wil_tid_crypto_rx { 491 struct wil_tid_crypto_rx_single key_id[4]; 492 }; 493 494 struct wil_p2p_info { 495 struct ieee80211_channel listen_chan; 496 u8 discovery_started; 497 u8 p2p_dev_started; 498 u64 cookie; 499 struct wireless_dev *pending_listen_wdev; 500 unsigned int listen_duration; 501 struct timer_list discovery_timer; /* listen/search duration */ 502 struct work_struct discovery_expired_work; /* listen/search expire */ 503 struct work_struct delayed_listen_work; /* listen after scan done */ 504 }; 505 506 enum wil_sta_status { 507 wil_sta_unused = 0, 508 wil_sta_conn_pending = 1, 509 wil_sta_connected = 2, 510 }; 511 512 #define WIL_STA_TID_NUM (16) 513 #define WIL_MCS_MAX (12) /* Maximum MCS supported */ 514 515 struct wil_net_stats { 516 unsigned long rx_packets; 517 unsigned long tx_packets; 518 unsigned long rx_bytes; 519 unsigned long tx_bytes; 520 unsigned long tx_errors; 521 unsigned long rx_dropped; 522 unsigned long rx_non_data_frame; 523 unsigned long rx_short_frame; 524 unsigned long rx_large_frame; 525 unsigned long rx_replay; 526 u16 last_mcs_rx; 527 u64 rx_per_mcs[WIL_MCS_MAX + 1]; 528 }; 529 530 /** 531 * struct wil_sta_info - data for peer 532 * 533 * Peer identified by its CID (connection ID) 534 * NIC performs beam forming for each peer; 535 * if no beam forming done, frame exchange is not 536 * possible. 537 */ 538 struct wil_sta_info { 539 u8 addr[ETH_ALEN]; 540 enum wil_sta_status status; 541 struct wil_net_stats stats; 542 /* Rx BACK */ 543 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 544 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 545 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 546 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 547 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM]; 548 struct wil_tid_crypto_rx group_crypto_rx; 549 u8 aid; /* 1-254; 0 if unknown/not reported */ 550 }; 551 552 enum { 553 fw_recovery_idle = 0, 554 fw_recovery_pending = 1, 555 fw_recovery_running = 2, 556 }; 557 558 enum { 559 hw_capability_last 560 }; 561 562 struct wil_probe_client_req { 563 struct list_head list; 564 u64 cookie; 565 u8 cid; 566 }; 567 568 struct pmc_ctx { 569 /* alloc, free, and read operations must own the lock */ 570 struct mutex lock; 571 struct vring_tx_desc *pring_va; 572 dma_addr_t pring_pa; 573 struct desc_alloc_info *descriptors; 574 int last_cmd_status; 575 int num_descriptors; 576 int descriptor_size; 577 }; 578 579 struct wil_halp { 580 struct mutex lock; /* protect halp ref_cnt */ 581 unsigned int ref_cnt; 582 struct completion comp; 583 }; 584 585 struct wil_blob_wrapper { 586 struct wil6210_priv *wil; 587 struct debugfs_blob_wrapper blob; 588 }; 589 590 #define WIL_LED_MAX_ID (2) 591 #define WIL_LED_INVALID_ID (0xF) 592 #define WIL_LED_BLINK_ON_SLOW_MS (300) 593 #define WIL_LED_BLINK_OFF_SLOW_MS (300) 594 #define WIL_LED_BLINK_ON_MED_MS (200) 595 #define WIL_LED_BLINK_OFF_MED_MS (200) 596 #define WIL_LED_BLINK_ON_FAST_MS (100) 597 #define WIL_LED_BLINK_OFF_FAST_MS (100) 598 enum { 599 WIL_LED_TIME_SLOW = 0, 600 WIL_LED_TIME_MED, 601 WIL_LED_TIME_FAST, 602 WIL_LED_TIME_LAST, 603 }; 604 605 struct blink_on_off_time { 606 u32 on_ms; 607 u32 off_ms; 608 }; 609 610 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST]; 611 extern u8 led_id; 612 extern u8 led_polarity; 613 614 struct wil6210_priv { 615 struct pci_dev *pdev; 616 u32 bar_size; 617 struct wireless_dev *wdev; 618 void __iomem *csr; 619 DECLARE_BITMAP(status, wil_status_last); 620 u8 fw_version[ETHTOOL_FWVERS_LEN]; 621 u32 hw_version; 622 u8 chip_revision; 623 const char *hw_name; 624 const char *wil_fw_name; 625 DECLARE_BITMAP(hw_capabilities, hw_capability_last); 626 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 627 u8 n_mids; /* number of additional MIDs as reported by FW */ 628 u32 recovery_count; /* num of FW recovery attempts in a short time */ 629 u32 recovery_state; /* FW recovery state machine */ 630 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 631 wait_queue_head_t wq; /* for all wait_event() use */ 632 /* profile */ 633 u32 monitor_flags; 634 u32 privacy; /* secure connection? */ 635 u8 hidden_ssid; /* relevant in AP mode */ 636 u16 channel; /* relevant in AP mode */ 637 int sinfo_gen; 638 u32 ap_isolate; /* no intra-BSS communication */ 639 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */ 640 int locally_generated_disc; /* relevant in STA mode */ 641 /* interrupt moderation */ 642 u32 tx_max_burst_duration; 643 u32 tx_interframe_timeout; 644 u32 rx_max_burst_duration; 645 u32 rx_interframe_timeout; 646 /* cached ISR registers */ 647 u32 isr_misc; 648 /* mailbox related */ 649 struct mutex wmi_mutex; 650 struct wil6210_mbox_ctl mbox_ctl; 651 struct completion wmi_ready; 652 struct completion wmi_call; 653 u16 wmi_seq; 654 u16 reply_id; /**< wait for this WMI event */ 655 void *reply_buf; 656 u16 reply_size; 657 struct workqueue_struct *wmi_wq; /* for deferred calls */ 658 struct work_struct wmi_event_worker; 659 struct workqueue_struct *wq_service; 660 struct work_struct disconnect_worker; 661 struct work_struct fw_error_worker; /* for FW error recovery */ 662 struct timer_list connect_timer; 663 struct timer_list scan_timer; /* detect scan timeout */ 664 struct list_head pending_wmi_ev; 665 /* 666 * protect pending_wmi_ev 667 * - fill in IRQ from wil6210_irq_misc, 668 * - consumed in thread by wmi_event_worker 669 */ 670 spinlock_t wmi_ev_lock; 671 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */ 672 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */ 673 struct napi_struct napi_rx; 674 struct napi_struct napi_tx; 675 /* keep alive */ 676 struct list_head probe_client_pending; 677 struct mutex probe_client_mutex; /* protect @probe_client_pending */ 678 struct work_struct probe_client_worker; 679 /* DMA related */ 680 struct vring vring_rx; 681 unsigned int rx_buf_len; 682 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 683 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 684 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 685 struct wil_sta_info sta[WIL6210_MAX_CID]; 686 int bcast_vring; 687 bool use_extended_dma_addr; /* indicates whether we are using 48 bits */ 688 /* scan */ 689 struct cfg80211_scan_request *scan_request; 690 691 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 692 /* statistics */ 693 atomic_t isr_count_rx, isr_count_tx; 694 /* debugfs */ 695 struct dentry *debug; 696 struct wil_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)]; 697 u8 discovery_mode; 698 u8 abft_len; 699 u8 wakeup_trigger; 700 struct wil_suspend_stats suspend_stats; 701 702 void *platform_handle; 703 struct wil_platform_ops platform_ops; 704 bool keep_radio_on_during_sleep; 705 706 struct pmc_ctx pmc; 707 708 bool pbss; 709 710 struct wil_p2p_info p2p; 711 712 /* P2P_DEVICE vif */ 713 struct wireless_dev *p2p_wdev; 714 struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */ 715 struct wireless_dev *radio_wdev; 716 717 /* High Access Latency Policy voting */ 718 struct wil_halp halp; 719 720 enum wmi_ps_profile_type ps_profile; 721 722 #ifdef CONFIG_PM 723 #ifdef CONFIG_PM_SLEEP 724 struct notifier_block pm_notify; 725 #endif /* CONFIG_PM_SLEEP */ 726 #endif /* CONFIG_PM */ 727 728 bool suspend_resp_rcvd; 729 bool suspend_resp_comp; 730 u32 bus_request_kbps; 731 u32 bus_request_kbps_pre_suspend; 732 }; 733 734 #define wil_to_wiphy(i) (i->wdev->wiphy) 735 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 736 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 737 #define wil_to_wdev(i) (i->wdev) 738 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 739 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 740 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 741 742 __printf(2, 3) 743 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 744 __printf(2, 3) 745 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...); 746 __printf(2, 3) 747 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...); 748 __printf(2, 3) 749 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...); 750 __printf(2, 3) 751 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...); 752 #define wil_dbg(wil, fmt, arg...) do { \ 753 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 754 wil_dbg_trace(wil, fmt, ##arg); \ 755 } while (0) 756 757 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 758 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 759 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 760 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 761 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg) 762 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg) 763 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg) 764 #define wil_err_ratelimited(wil, fmt, arg...) \ 765 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg) 766 767 /* target operations */ 768 /* register read */ 769 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg) 770 { 771 return readl(wil->csr + HOSTADDR(reg)); 772 } 773 774 /* register write. wmb() to make sure it is completed */ 775 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val) 776 { 777 writel(val, wil->csr + HOSTADDR(reg)); 778 wmb(); /* wait for write to propagate to the HW */ 779 } 780 781 /* register set = read, OR, write */ 782 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val) 783 { 784 wil_w(wil, reg, wil_r(wil, reg) | val); 785 } 786 787 /* register clear = read, AND with inverted, write */ 788 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val) 789 { 790 wil_w(wil, reg, wil_r(wil, reg) & ~val); 791 } 792 793 #if defined(CONFIG_DYNAMIC_DEBUG) 794 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 795 groupsize, buf, len, ascii) \ 796 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 797 prefix_type, rowsize, \ 798 groupsize, buf, len, ascii) 799 800 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 801 groupsize, buf, len, ascii) \ 802 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 803 prefix_type, rowsize, \ 804 groupsize, buf, len, ascii) 805 806 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \ 807 groupsize, buf, len, ascii) \ 808 print_hex_dump_debug("DBG[MISC]" prefix_str,\ 809 prefix_type, rowsize, \ 810 groupsize, buf, len, ascii) 811 #else /* defined(CONFIG_DYNAMIC_DEBUG) */ 812 static inline 813 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 814 int groupsize, const void *buf, size_t len, bool ascii) 815 { 816 } 817 818 static inline 819 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 820 int groupsize, const void *buf, size_t len, bool ascii) 821 { 822 } 823 824 static inline 825 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize, 826 int groupsize, const void *buf, size_t len, bool ascii) 827 { 828 } 829 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 830 831 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 832 size_t count); 833 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 834 size_t count); 835 836 void *wil_if_alloc(struct device *dev); 837 void wil_if_free(struct wil6210_priv *wil); 838 int wil_if_add(struct wil6210_priv *wil); 839 void wil_if_remove(struct wil6210_priv *wil); 840 int wil_priv_init(struct wil6210_priv *wil); 841 void wil_priv_deinit(struct wil6210_priv *wil); 842 int wil_ps_update(struct wil6210_priv *wil, 843 enum wmi_ps_profile_type ps_profile); 844 int wil_reset(struct wil6210_priv *wil, bool no_fw); 845 void wil_fw_error_recovery(struct wil6210_priv *wil); 846 void wil_set_recovery_state(struct wil6210_priv *wil, int state); 847 bool wil_is_recovery_blocked(struct wil6210_priv *wil); 848 int wil_up(struct wil6210_priv *wil); 849 int __wil_up(struct wil6210_priv *wil); 850 int wil_down(struct wil6210_priv *wil); 851 int __wil_down(struct wil6210_priv *wil); 852 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 853 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 854 void wil_set_ethtoolops(struct net_device *ndev); 855 856 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 857 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 858 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 859 struct wil6210_mbox_hdr *hdr); 860 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 861 void wmi_recv_cmd(struct wil6210_priv *wil); 862 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 863 u16 reply_id, void *reply, u8 reply_size, int to_msec); 864 void wmi_event_worker(struct work_struct *work); 865 void wmi_event_flush(struct wil6210_priv *wil); 866 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 867 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 868 int wmi_set_channel(struct wil6210_priv *wil, int channel); 869 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 870 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 871 const void *mac_addr, int key_usage); 872 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 873 const void *mac_addr, int key_len, const void *key, 874 int key_usage); 875 int wmi_echo(struct wil6210_priv *wil); 876 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 877 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 878 int wmi_rxon(struct wil6210_priv *wil, bool on); 879 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 880 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, 881 u16 reason, bool full_disconnect, bool del_sta); 882 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout); 883 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason); 884 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason); 885 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token, 886 u16 status, bool amsdu, u16 agg_wsize, u16 timeout); 887 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil, 888 enum wmi_ps_profile_type ps_profile); 889 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short); 890 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short); 891 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid); 892 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid, 893 u8 dialog_token, __le16 ba_param_set, 894 __le16 ba_timeout, __le16 ba_seq_ctrl); 895 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize); 896 897 void wil6210_clear_irq(struct wil6210_priv *wil); 898 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi); 899 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 900 void wil_mask_irq(struct wil6210_priv *wil); 901 void wil_unmask_irq(struct wil6210_priv *wil); 902 void wil_configure_interrupt_moderation(struct wil6210_priv *wil); 903 void wil_disable_irq(struct wil6210_priv *wil); 904 void wil_enable_irq(struct wil6210_priv *wil); 905 void wil6210_mask_halp(struct wil6210_priv *wil); 906 907 /* P2P */ 908 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request); 909 void wil_p2p_discovery_timer_fn(ulong x); 910 int wil_p2p_search(struct wil6210_priv *wil, 911 struct cfg80211_scan_request *request); 912 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev, 913 unsigned int duration, struct ieee80211_channel *chan, 914 u64 *cookie); 915 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil); 916 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie); 917 void wil_p2p_listen_expired(struct work_struct *work); 918 void wil_p2p_search_expired(struct work_struct *work); 919 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil); 920 void wil_p2p_delayed_listen_work(struct work_struct *work); 921 922 /* WMI for P2P */ 923 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi); 924 int wmi_start_listen(struct wil6210_priv *wil); 925 int wmi_start_search(struct wil6210_priv *wil); 926 int wmi_stop_discovery(struct wil6210_priv *wil); 927 928 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 929 struct cfg80211_mgmt_tx_params *params, 930 u64 *cookie); 931 932 int wil6210_debugfs_init(struct wil6210_priv *wil); 933 void wil6210_debugfs_remove(struct wil6210_priv *wil); 934 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid, 935 struct station_info *sinfo); 936 937 struct wireless_dev *wil_cfg80211_init(struct device *dev); 938 void wil_wdev_free(struct wil6210_priv *wil); 939 void wil_p2p_wdev_free(struct wil6210_priv *wil); 940 941 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 942 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, 943 u8 chan, u8 hidden_ssid, u8 is_go); 944 int wmi_pcp_stop(struct wil6210_priv *wil); 945 int wmi_led_cfg(struct wil6210_priv *wil, bool enable); 946 int wmi_abort_scan(struct wil6210_priv *wil); 947 void wil_abort_scan(struct wil6210_priv *wil, bool sync); 948 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps); 949 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid, 950 u16 reason_code, bool from_event); 951 void wil_probe_client_flush(struct wil6210_priv *wil); 952 void wil_probe_client_worker(struct work_struct *work); 953 954 int wil_rx_init(struct wil6210_priv *wil, u16 size); 955 void wil_rx_fini(struct wil6210_priv *wil); 956 957 /* TX API */ 958 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 959 int cid, int tid); 960 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 961 int wil_tx_init(struct wil6210_priv *wil, int cid); 962 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size); 963 int wil_bcast_init(struct wil6210_priv *wil); 964 void wil_bcast_fini(struct wil6210_priv *wil); 965 966 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 967 bool should_stop); 968 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 969 bool check_stop); 970 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 971 int wil_tx_complete(struct wil6210_priv *wil, int ringid); 972 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 973 974 /* RX API */ 975 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 976 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 977 978 int wil_iftype_nl2wmi(enum nl80211_iftype type); 979 980 int wil_request_firmware(struct wil6210_priv *wil, const char *name, 981 bool load); 982 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name); 983 984 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime); 985 int wil_suspend(struct wil6210_priv *wil, bool is_runtime); 986 int wil_resume(struct wil6210_priv *wil, bool is_runtime); 987 bool wil_is_wmi_idle(struct wil6210_priv *wil); 988 int wmi_resume(struct wil6210_priv *wil); 989 int wmi_suspend(struct wil6210_priv *wil); 990 bool wil_is_tx_idle(struct wil6210_priv *wil); 991 bool wil_is_rx_idle(struct wil6210_priv *wil); 992 993 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size); 994 void wil_fw_core_dump(struct wil6210_priv *wil); 995 996 void wil_halp_vote(struct wil6210_priv *wil); 997 void wil_halp_unvote(struct wil6210_priv *wil); 998 void wil6210_set_halp(struct wil6210_priv *wil); 999 void wil6210_clear_halp(struct wil6210_priv *wil); 1000 1001 #endif /* __WIL6210_H__ */ 1002