1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WIL6210_H__ 18 #define __WIL6210_H__ 19 20 #include <linux/etherdevice.h> 21 #include <linux/netdevice.h> 22 #include <linux/wireless.h> 23 #include <net/cfg80211.h> 24 #include <linux/timex.h> 25 #include <linux/types.h> 26 #include "wmi.h" 27 #include "wil_platform.h" 28 29 extern bool no_fw_recovery; 30 extern unsigned int mtu_max; 31 extern unsigned short rx_ring_overflow_thrsh; 32 extern int agg_wsize; 33 extern u32 vring_idle_trsh; 34 extern bool rx_align_2; 35 extern bool rx_large_buf; 36 extern bool debug_fw; 37 extern bool disable_ap_sme; 38 39 #define WIL_NAME "wil6210" 40 #define WIL_FW_NAME_DEFAULT "wil6210.fw" /* code Sparrow B0 */ 41 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" /* code Sparrow D0 */ 42 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */ 43 44 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */ 45 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 46 47 /** 48 * extract bits [@b0:@b1] (inclusive) from the value @x 49 * it should be @b0 <= @b1, or result is incorrect 50 */ 51 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 52 { 53 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 54 } 55 56 #define WIL6210_MEM_SIZE (2*1024*1024UL) 57 58 #define WIL_TX_Q_LEN_DEFAULT (4000) 59 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) 60 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12) 61 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7) 62 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */ 63 /* limit ring size in range [32..32k] */ 64 #define WIL_RING_SIZE_ORDER_MIN (5) 65 #define WIL_RING_SIZE_ORDER_MAX (15) 66 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 67 #define WIL6210_MAX_CID (8) /* HW limit */ 68 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 69 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */ 70 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */ 71 /* Hardware offload block adds the following: 72 * 26 bytes - 3-address QoS data header 73 * 8 bytes - IV + EIV (for GCMP) 74 * 8 bytes - SNAP 75 * 16 bytes - MIC (for GCMP) 76 * 4 bytes - CRC 77 */ 78 #define WIL_MAX_MPDU_OVERHEAD (62) 79 80 /* Calculate MAC buffer size for the firmware. It includes all overhead, 81 * as it will go over the air, and need to be 8 byte aligned 82 */ 83 static inline u32 wil_mtu2macbuf(u32 mtu) 84 { 85 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8); 86 } 87 88 /* MTU for Ethernet need to take into account 8-byte SNAP header 89 * to be added when encapsulating Ethernet frame into 802.11 90 */ 91 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8) 92 /* Max supported by wil6210 value for interrupt threshold is 5sec. */ 93 #define WIL6210_ITR_TRSH_MAX (5000000) 94 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 95 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 96 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 97 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 98 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 99 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 100 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 101 #define WIL6210_DISCONNECT_TO_MS (2000) 102 #define WIL6210_RX_HIGH_TRSH_INIT (0) 103 #define WIL6210_RX_HIGH_TRSH_DEFAULT \ 104 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3)) 105 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see 106 * 802.11REVmc/D5.0, section 9.4.1.8) 107 */ 108 /* Hardware definitions begin */ 109 110 /* 111 * Mapping 112 * RGF File | Host addr | FW addr 113 * | | 114 * user_rgf | 0x000000 | 0x880000 115 * dma_rgf | 0x001000 | 0x881000 116 * pcie_rgf | 0x002000 | 0x882000 117 * | | 118 */ 119 120 /* Where various structures placed in host address space */ 121 #define WIL6210_FW_HOST_OFF (0x880000UL) 122 123 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 124 125 /* 126 * Interrupt control registers block 127 * 128 * each interrupt controlled by the same bit in all registers 129 */ 130 struct RGF_ICR { 131 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 132 u32 ICR; /* Cause, W1C/COR depending on ICC */ 133 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 134 u32 ICS; /* Cause Set, WO */ 135 u32 IMV; /* Mask, RW+S/C */ 136 u32 IMS; /* Mask Set, write 1 to set */ 137 u32 IMC; /* Mask Clear, write 1 to clear */ 138 } __packed; 139 140 /* registers - FW addresses */ 141 #define RGF_USER_USAGE_1 (0x880004) 142 #define RGF_USER_USAGE_6 (0x880018) 143 #define BIT_USER_OOB_MODE BIT(31) 144 #define BIT_USER_OOB_R2_MODE BIT(30) 145 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 146 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 147 #define RGF_USER_USER_CPU_0 (0x8801e0) 148 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 149 #define RGF_USER_MAC_CPU_0 (0x8801fc) 150 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 151 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 152 #define RGF_USER_BL (0x880A3C) /* Boot Loader */ 153 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 154 #define RGF_USER_CLKS_CTL_0 (0x880abc) 155 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 156 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 157 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 158 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 159 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 160 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 161 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 162 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 163 #define BIT_CAR_PERST_RST BIT(7) 164 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 165 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 166 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 167 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 168 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 169 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 170 171 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 172 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 173 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 174 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 175 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 176 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1) 177 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 178 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 179 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 180 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27) 181 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 182 183 /* Legacy interrupt moderation control (before Sparrow v2)*/ 184 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 185 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 186 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 187 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 188 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 189 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 190 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 191 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 192 193 /* Offload control (Sparrow B0+) */ 194 #define RGF_DMA_OFUL_NID_0 (0x881cd4) 195 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0) 196 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1) 197 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2) 198 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3) 199 200 /* New (sparrow v2+) interrupt moderation control */ 201 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40) 202 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34) 203 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38) 204 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c) 205 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0) 206 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1) 207 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2) 208 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3) 209 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4) 210 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5) 211 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6) 212 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60) 213 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64) 214 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68) 215 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0) 216 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 217 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2) 218 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3) 219 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 220 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50) 221 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44) 222 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48) 223 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c) 224 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0) 225 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1) 226 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2) 227 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3) 228 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4) 229 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5) 230 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6) 231 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54) 232 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58) 233 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c) 234 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0) 235 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 236 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2) 237 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3) 238 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 239 240 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 241 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 242 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 243 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 244 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 245 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 246 247 #define RGF_HP_CTRL (0x88265c) 248 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 249 250 /* MAC timer, usec, for packet lifetime */ 251 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 252 253 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 254 #define RGF_CAF_OSC_CONTROL (0x88afa4) 255 #define BIT_CAF_OSC_XTAL_EN BIT(0) 256 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 257 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 258 259 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 260 #define JTAG_DEV_ID_SPARROW (0x2632072f) 261 262 #define RGF_USER_REVISION_ID (0x88afe4) 263 #define RGF_USER_REVISION_ID_MASK (3) 264 #define REVISION_ID_SPARROW_B0 (0x0) 265 #define REVISION_ID_SPARROW_D0 (0x3) 266 267 /* crash codes for FW/Ucode stored here */ 268 #define RGF_FW_ASSERT_CODE (0x91f020) 269 #define RGF_UCODE_ASSERT_CODE (0x91f028) 270 271 enum { 272 HW_VER_UNKNOWN, 273 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */ 274 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */ 275 }; 276 277 /* popular locations */ 278 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD 279 #define HOST_MBOX HOSTADDR(RGF_MBOX) 280 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 281 282 /* ISR register bits */ 283 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 284 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 285 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 286 287 /* Hardware definitions end */ 288 struct fw_map { 289 u32 from; /* linker address - from, inclusive */ 290 u32 to; /* linker address - to, exclusive */ 291 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 292 const char *name; /* for debugfs */ 293 bool fw; /* true if FW mapping, false if UCODE mapping */ 294 }; 295 296 /* array size should be in sync with actual definition in the wmi.c */ 297 extern const struct fw_map fw_mapping[10]; 298 299 /** 300 * mk_cidxtid - construct @cidxtid field 301 * @cid: CID value 302 * @tid: TID value 303 * 304 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 305 */ 306 static inline u8 mk_cidxtid(u8 cid, u8 tid) 307 { 308 return ((tid & 0xf) << 4) | (cid & 0xf); 309 } 310 311 /** 312 * parse_cidxtid - parse @cidxtid field 313 * @cid: store CID value here 314 * @tid: store TID value here 315 * 316 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 317 */ 318 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 319 { 320 *cid = cidxtid & 0xf; 321 *tid = (cidxtid >> 4) & 0xf; 322 } 323 324 struct wil6210_mbox_ring { 325 u32 base; 326 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 327 u16 size; 328 u32 tail; 329 u32 head; 330 } __packed; 331 332 struct wil6210_mbox_ring_desc { 333 __le32 sync; 334 __le32 addr; 335 } __packed; 336 337 /* at HOST_OFF_WIL6210_MBOX_CTL */ 338 struct wil6210_mbox_ctl { 339 struct wil6210_mbox_ring tx; 340 struct wil6210_mbox_ring rx; 341 } __packed; 342 343 struct wil6210_mbox_hdr { 344 __le16 seq; 345 __le16 len; /* payload, bytes after this header */ 346 __le16 type; 347 u8 flags; 348 u8 reserved; 349 } __packed; 350 351 #define WIL_MBOX_HDR_TYPE_WMI (0) 352 353 /* max. value for wil6210_mbox_hdr.len */ 354 #define MAX_MBOXITEM_SIZE (240) 355 356 struct pending_wmi_event { 357 struct list_head list; 358 struct { 359 struct wil6210_mbox_hdr hdr; 360 struct wmi_cmd_hdr wmi; 361 u8 data[0]; 362 } __packed event; 363 }; 364 365 enum { /* for wil_ctx.mapped_as */ 366 wil_mapped_as_none = 0, 367 wil_mapped_as_single = 1, 368 wil_mapped_as_page = 2, 369 }; 370 371 /** 372 * struct wil_ctx - software context for Vring descriptor 373 */ 374 struct wil_ctx { 375 struct sk_buff *skb; 376 u8 nr_frags; 377 u8 mapped_as; 378 }; 379 380 union vring_desc; 381 382 struct vring { 383 dma_addr_t pa; 384 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 385 u16 size; /* number of vring_desc elements */ 386 u32 swtail; 387 u32 swhead; 388 u32 hwtail; /* write here to inform hw */ 389 struct wil_ctx *ctx; /* ctx[size] - software context */ 390 }; 391 392 /** 393 * Additional data for Tx Vring 394 */ 395 struct vring_tx_data { 396 bool dot1x_open; 397 int enabled; 398 cycles_t idle, last_idle, begin; 399 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */ 400 u16 agg_timeout; 401 u8 agg_amsdu; 402 bool addba_in_progress; /* if set, agg_xxx is for request in progress */ 403 spinlock_t lock; 404 }; 405 406 enum { /* for wil6210_priv.status */ 407 wil_status_fwready = 0, /* FW operational */ 408 wil_status_fwconnecting, 409 wil_status_fwconnected, 410 wil_status_dontscan, 411 wil_status_mbox_ready, /* MBOX structures ready */ 412 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 413 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 414 wil_status_resetting, /* reset in progress */ 415 wil_status_suspended, /* suspend completed, device is suspended */ 416 wil_status_last /* keep last */ 417 }; 418 419 struct pci_dev; 420 421 /** 422 * struct tid_ampdu_rx - TID aggregation information (Rx). 423 * 424 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 425 * @reorder_time: jiffies when skb was added 426 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 427 * @reorder_timer: releases expired frames from the reorder buffer. 428 * @last_rx: jiffies of last rx activity 429 * @head_seq_num: head sequence number in reordering buffer. 430 * @stored_mpdu_num: number of MPDUs in reordering buffer 431 * @ssn: Starting Sequence Number expected to be aggregated. 432 * @buf_size: buffer size for incoming A-MPDUs 433 * @timeout: reset timer value (in TUs). 434 * @ssn_last_drop: SSN of the last dropped frame 435 * @total: total number of processed incoming frames 436 * @drop_dup: duplicate frames dropped for this reorder buffer 437 * @drop_old: old frames dropped for this reorder buffer 438 * @dialog_token: dialog token for aggregation session 439 * @first_time: true when this buffer used 1-st time 440 */ 441 struct wil_tid_ampdu_rx { 442 struct sk_buff **reorder_buf; 443 unsigned long *reorder_time; 444 struct timer_list session_timer; 445 struct timer_list reorder_timer; 446 unsigned long last_rx; 447 u16 head_seq_num; 448 u16 stored_mpdu_num; 449 u16 ssn; 450 u16 buf_size; 451 u16 timeout; 452 u16 ssn_last_drop; 453 unsigned long long total; /* frames processed */ 454 unsigned long long drop_dup; 455 unsigned long long drop_old; 456 u8 dialog_token; 457 bool first_time; /* is it 1-st time this buffer used? */ 458 }; 459 460 /** 461 * struct wil_tid_crypto_rx_single - TID crypto information (Rx). 462 * 463 * @pn: GCMP PN for the session 464 * @key_set: valid key present 465 */ 466 struct wil_tid_crypto_rx_single { 467 u8 pn[IEEE80211_GCMP_PN_LEN]; 468 bool key_set; 469 }; 470 471 struct wil_tid_crypto_rx { 472 struct wil_tid_crypto_rx_single key_id[4]; 473 }; 474 475 struct wil_p2p_info { 476 struct ieee80211_channel listen_chan; 477 u8 discovery_started; 478 u8 p2p_dev_started; 479 u64 cookie; 480 struct wireless_dev *pending_listen_wdev; 481 unsigned int listen_duration; 482 struct timer_list discovery_timer; /* listen/search duration */ 483 struct work_struct discovery_expired_work; /* listen/search expire */ 484 struct work_struct delayed_listen_work; /* listen after scan done */ 485 }; 486 487 enum wil_sta_status { 488 wil_sta_unused = 0, 489 wil_sta_conn_pending = 1, 490 wil_sta_connected = 2, 491 }; 492 493 #define WIL_STA_TID_NUM (16) 494 #define WIL_MCS_MAX (12) /* Maximum MCS supported */ 495 496 struct wil_net_stats { 497 unsigned long rx_packets; 498 unsigned long tx_packets; 499 unsigned long rx_bytes; 500 unsigned long tx_bytes; 501 unsigned long tx_errors; 502 unsigned long rx_dropped; 503 unsigned long rx_non_data_frame; 504 unsigned long rx_short_frame; 505 unsigned long rx_large_frame; 506 unsigned long rx_replay; 507 u16 last_mcs_rx; 508 u64 rx_per_mcs[WIL_MCS_MAX + 1]; 509 }; 510 511 /** 512 * struct wil_sta_info - data for peer 513 * 514 * Peer identified by its CID (connection ID) 515 * NIC performs beam forming for each peer; 516 * if no beam forming done, frame exchange is not 517 * possible. 518 */ 519 struct wil_sta_info { 520 u8 addr[ETH_ALEN]; 521 enum wil_sta_status status; 522 struct wil_net_stats stats; 523 /* Rx BACK */ 524 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 525 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 526 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 527 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 528 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM]; 529 struct wil_tid_crypto_rx group_crypto_rx; 530 u8 aid; /* 1-254; 0 if unknown/not reported */ 531 }; 532 533 enum { 534 fw_recovery_idle = 0, 535 fw_recovery_pending = 1, 536 fw_recovery_running = 2, 537 }; 538 539 enum { 540 hw_capability_last 541 }; 542 543 struct wil_probe_client_req { 544 struct list_head list; 545 u64 cookie; 546 u8 cid; 547 }; 548 549 struct pmc_ctx { 550 /* alloc, free, and read operations must own the lock */ 551 struct mutex lock; 552 struct vring_tx_desc *pring_va; 553 dma_addr_t pring_pa; 554 struct desc_alloc_info *descriptors; 555 int last_cmd_status; 556 int num_descriptors; 557 int descriptor_size; 558 }; 559 560 struct wil_halp { 561 struct mutex lock; /* protect halp ref_cnt */ 562 unsigned int ref_cnt; 563 struct completion comp; 564 }; 565 566 struct wil_blob_wrapper { 567 struct wil6210_priv *wil; 568 struct debugfs_blob_wrapper blob; 569 }; 570 571 #define WIL_LED_MAX_ID (2) 572 #define WIL_LED_INVALID_ID (0xF) 573 #define WIL_LED_BLINK_ON_SLOW_MS (300) 574 #define WIL_LED_BLINK_OFF_SLOW_MS (300) 575 #define WIL_LED_BLINK_ON_MED_MS (200) 576 #define WIL_LED_BLINK_OFF_MED_MS (200) 577 #define WIL_LED_BLINK_ON_FAST_MS (100) 578 #define WIL_LED_BLINK_OFF_FAST_MS (100) 579 enum { 580 WIL_LED_TIME_SLOW = 0, 581 WIL_LED_TIME_MED, 582 WIL_LED_TIME_FAST, 583 WIL_LED_TIME_LAST, 584 }; 585 586 struct blink_on_off_time { 587 u32 on_ms; 588 u32 off_ms; 589 }; 590 591 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST]; 592 extern u8 led_id; 593 extern u8 led_polarity; 594 595 struct wil6210_priv { 596 struct pci_dev *pdev; 597 struct wireless_dev *wdev; 598 void __iomem *csr; 599 DECLARE_BITMAP(status, wil_status_last); 600 u8 fw_version[ETHTOOL_FWVERS_LEN]; 601 u32 hw_version; 602 u8 chip_revision; 603 const char *hw_name; 604 const char *wil_fw_name; 605 DECLARE_BITMAP(hw_capabilities, hw_capability_last); 606 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 607 u8 n_mids; /* number of additional MIDs as reported by FW */ 608 u32 recovery_count; /* num of FW recovery attempts in a short time */ 609 u32 recovery_state; /* FW recovery state machine */ 610 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 611 wait_queue_head_t wq; /* for all wait_event() use */ 612 /* profile */ 613 u32 monitor_flags; 614 u32 privacy; /* secure connection? */ 615 u8 hidden_ssid; /* relevant in AP mode */ 616 u16 channel; /* relevant in AP mode */ 617 int sinfo_gen; 618 u32 ap_isolate; /* no intra-BSS communication */ 619 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */ 620 int locally_generated_disc; /* relevant in STA mode */ 621 /* interrupt moderation */ 622 u32 tx_max_burst_duration; 623 u32 tx_interframe_timeout; 624 u32 rx_max_burst_duration; 625 u32 rx_interframe_timeout; 626 /* cached ISR registers */ 627 u32 isr_misc; 628 /* mailbox related */ 629 struct mutex wmi_mutex; 630 struct wil6210_mbox_ctl mbox_ctl; 631 struct completion wmi_ready; 632 struct completion wmi_call; 633 u16 wmi_seq; 634 u16 reply_id; /**< wait for this WMI event */ 635 void *reply_buf; 636 u16 reply_size; 637 struct workqueue_struct *wmi_wq; /* for deferred calls */ 638 struct work_struct wmi_event_worker; 639 struct workqueue_struct *wq_service; 640 struct work_struct disconnect_worker; 641 struct work_struct fw_error_worker; /* for FW error recovery */ 642 struct timer_list connect_timer; 643 struct timer_list scan_timer; /* detect scan timeout */ 644 struct list_head pending_wmi_ev; 645 /* 646 * protect pending_wmi_ev 647 * - fill in IRQ from wil6210_irq_misc, 648 * - consumed in thread by wmi_event_worker 649 */ 650 spinlock_t wmi_ev_lock; 651 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */ 652 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */ 653 struct napi_struct napi_rx; 654 struct napi_struct napi_tx; 655 /* keep alive */ 656 struct list_head probe_client_pending; 657 struct mutex probe_client_mutex; /* protect @probe_client_pending */ 658 struct work_struct probe_client_worker; 659 /* DMA related */ 660 struct vring vring_rx; 661 unsigned int rx_buf_len; 662 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 663 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 664 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 665 struct wil_sta_info sta[WIL6210_MAX_CID]; 666 int bcast_vring; 667 bool use_extended_dma_addr; /* indicates whether we are using 48 bits */ 668 /* scan */ 669 struct cfg80211_scan_request *scan_request; 670 671 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 672 /* statistics */ 673 atomic_t isr_count_rx, isr_count_tx; 674 /* debugfs */ 675 struct dentry *debug; 676 struct wil_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)]; 677 u8 discovery_mode; 678 u8 abft_len; 679 680 void *platform_handle; 681 struct wil_platform_ops platform_ops; 682 683 struct pmc_ctx pmc; 684 685 bool pbss; 686 687 struct wil_p2p_info p2p; 688 689 /* P2P_DEVICE vif */ 690 struct wireless_dev *p2p_wdev; 691 struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */ 692 struct wireless_dev *radio_wdev; 693 694 /* High Access Latency Policy voting */ 695 struct wil_halp halp; 696 697 enum wmi_ps_profile_type ps_profile; 698 699 #ifdef CONFIG_PM 700 #ifdef CONFIG_PM_SLEEP 701 struct notifier_block pm_notify; 702 #endif /* CONFIG_PM_SLEEP */ 703 #endif /* CONFIG_PM */ 704 }; 705 706 #define wil_to_wiphy(i) (i->wdev->wiphy) 707 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 708 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 709 #define wil_to_wdev(i) (i->wdev) 710 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 711 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 712 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 713 714 __printf(2, 3) 715 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 716 __printf(2, 3) 717 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...); 718 __printf(2, 3) 719 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...); 720 __printf(2, 3) 721 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...); 722 __printf(2, 3) 723 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...); 724 #define wil_dbg(wil, fmt, arg...) do { \ 725 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 726 wil_dbg_trace(wil, fmt, ##arg); \ 727 } while (0) 728 729 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 730 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 731 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 732 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 733 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg) 734 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg) 735 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg) 736 #define wil_err_ratelimited(wil, fmt, arg...) \ 737 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg) 738 739 /* target operations */ 740 /* register read */ 741 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg) 742 { 743 return readl(wil->csr + HOSTADDR(reg)); 744 } 745 746 /* register write. wmb() to make sure it is completed */ 747 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val) 748 { 749 writel(val, wil->csr + HOSTADDR(reg)); 750 wmb(); /* wait for write to propagate to the HW */ 751 } 752 753 /* register set = read, OR, write */ 754 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val) 755 { 756 wil_w(wil, reg, wil_r(wil, reg) | val); 757 } 758 759 /* register clear = read, AND with inverted, write */ 760 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val) 761 { 762 wil_w(wil, reg, wil_r(wil, reg) & ~val); 763 } 764 765 #if defined(CONFIG_DYNAMIC_DEBUG) 766 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 767 groupsize, buf, len, ascii) \ 768 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 769 prefix_type, rowsize, \ 770 groupsize, buf, len, ascii) 771 772 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 773 groupsize, buf, len, ascii) \ 774 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 775 prefix_type, rowsize, \ 776 groupsize, buf, len, ascii) 777 778 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \ 779 groupsize, buf, len, ascii) \ 780 print_hex_dump_debug("DBG[MISC]" prefix_str,\ 781 prefix_type, rowsize, \ 782 groupsize, buf, len, ascii) 783 #else /* defined(CONFIG_DYNAMIC_DEBUG) */ 784 static inline 785 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 786 int groupsize, const void *buf, size_t len, bool ascii) 787 { 788 } 789 790 static inline 791 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 792 int groupsize, const void *buf, size_t len, bool ascii) 793 { 794 } 795 796 static inline 797 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize, 798 int groupsize, const void *buf, size_t len, bool ascii) 799 { 800 } 801 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 802 803 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 804 size_t count); 805 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 806 size_t count); 807 808 void *wil_if_alloc(struct device *dev); 809 void wil_if_free(struct wil6210_priv *wil); 810 int wil_if_add(struct wil6210_priv *wil); 811 void wil_if_remove(struct wil6210_priv *wil); 812 int wil_priv_init(struct wil6210_priv *wil); 813 void wil_priv_deinit(struct wil6210_priv *wil); 814 int wil_ps_update(struct wil6210_priv *wil, 815 enum wmi_ps_profile_type ps_profile); 816 int wil_reset(struct wil6210_priv *wil, bool no_fw); 817 void wil_fw_error_recovery(struct wil6210_priv *wil); 818 void wil_set_recovery_state(struct wil6210_priv *wil, int state); 819 bool wil_is_recovery_blocked(struct wil6210_priv *wil); 820 int wil_up(struct wil6210_priv *wil); 821 int __wil_up(struct wil6210_priv *wil); 822 int wil_down(struct wil6210_priv *wil); 823 int __wil_down(struct wil6210_priv *wil); 824 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 825 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 826 void wil_set_ethtoolops(struct net_device *ndev); 827 828 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 829 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 830 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 831 struct wil6210_mbox_hdr *hdr); 832 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 833 void wmi_recv_cmd(struct wil6210_priv *wil); 834 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 835 u16 reply_id, void *reply, u8 reply_size, int to_msec); 836 void wmi_event_worker(struct work_struct *work); 837 void wmi_event_flush(struct wil6210_priv *wil); 838 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 839 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 840 int wmi_set_channel(struct wil6210_priv *wil, int channel); 841 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 842 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 843 const void *mac_addr, int key_usage); 844 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 845 const void *mac_addr, int key_len, const void *key, 846 int key_usage); 847 int wmi_echo(struct wil6210_priv *wil); 848 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 849 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 850 int wmi_rxon(struct wil6210_priv *wil, bool on); 851 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 852 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, 853 u16 reason, bool full_disconnect, bool del_sta); 854 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout); 855 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason); 856 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason); 857 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token, 858 u16 status, bool amsdu, u16 agg_wsize, u16 timeout); 859 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil, 860 enum wmi_ps_profile_type ps_profile); 861 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short); 862 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short); 863 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid); 864 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid, 865 u8 dialog_token, __le16 ba_param_set, 866 __le16 ba_timeout, __le16 ba_seq_ctrl); 867 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize); 868 869 void wil6210_clear_irq(struct wil6210_priv *wil); 870 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi); 871 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 872 void wil_mask_irq(struct wil6210_priv *wil); 873 void wil_unmask_irq(struct wil6210_priv *wil); 874 void wil_configure_interrupt_moderation(struct wil6210_priv *wil); 875 void wil_disable_irq(struct wil6210_priv *wil); 876 void wil_enable_irq(struct wil6210_priv *wil); 877 void wil6210_mask_halp(struct wil6210_priv *wil); 878 879 /* P2P */ 880 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request); 881 void wil_p2p_discovery_timer_fn(ulong x); 882 int wil_p2p_search(struct wil6210_priv *wil, 883 struct cfg80211_scan_request *request); 884 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev, 885 unsigned int duration, struct ieee80211_channel *chan, 886 u64 *cookie); 887 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil); 888 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie); 889 void wil_p2p_listen_expired(struct work_struct *work); 890 void wil_p2p_search_expired(struct work_struct *work); 891 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil); 892 void wil_p2p_delayed_listen_work(struct work_struct *work); 893 894 /* WMI for P2P */ 895 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi); 896 int wmi_start_listen(struct wil6210_priv *wil); 897 int wmi_start_search(struct wil6210_priv *wil); 898 int wmi_stop_discovery(struct wil6210_priv *wil); 899 900 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 901 struct cfg80211_mgmt_tx_params *params, 902 u64 *cookie); 903 904 int wil6210_debugfs_init(struct wil6210_priv *wil); 905 void wil6210_debugfs_remove(struct wil6210_priv *wil); 906 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid, 907 struct station_info *sinfo); 908 909 struct wireless_dev *wil_cfg80211_init(struct device *dev); 910 void wil_wdev_free(struct wil6210_priv *wil); 911 void wil_p2p_wdev_free(struct wil6210_priv *wil); 912 913 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 914 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, 915 u8 chan, u8 hidden_ssid, u8 is_go); 916 int wmi_pcp_stop(struct wil6210_priv *wil); 917 int wmi_led_cfg(struct wil6210_priv *wil, bool enable); 918 int wmi_abort_scan(struct wil6210_priv *wil); 919 void wil_abort_scan(struct wil6210_priv *wil, bool sync); 920 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps); 921 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid, 922 u16 reason_code, bool from_event); 923 void wil_probe_client_flush(struct wil6210_priv *wil); 924 void wil_probe_client_worker(struct work_struct *work); 925 926 int wil_rx_init(struct wil6210_priv *wil, u16 size); 927 void wil_rx_fini(struct wil6210_priv *wil); 928 929 /* TX API */ 930 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 931 int cid, int tid); 932 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 933 int wil_tx_init(struct wil6210_priv *wil, int cid); 934 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size); 935 int wil_bcast_init(struct wil6210_priv *wil); 936 void wil_bcast_fini(struct wil6210_priv *wil); 937 938 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 939 bool should_stop); 940 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 941 bool check_stop); 942 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 943 int wil_tx_complete(struct wil6210_priv *wil, int ringid); 944 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 945 946 /* RX API */ 947 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 948 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 949 950 int wil_iftype_nl2wmi(enum nl80211_iftype type); 951 952 int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd); 953 int wil_request_firmware(struct wil6210_priv *wil, const char *name, 954 bool load); 955 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name); 956 957 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime); 958 int wil_suspend(struct wil6210_priv *wil, bool is_runtime); 959 int wil_resume(struct wil6210_priv *wil, bool is_runtime); 960 961 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size); 962 void wil_fw_core_dump(struct wil6210_priv *wil); 963 964 void wil_halp_vote(struct wil6210_priv *wil); 965 void wil_halp_unvote(struct wil6210_priv *wil); 966 void wil6210_set_halp(struct wil6210_priv *wil); 967 void wil6210_clear_halp(struct wil6210_priv *wil); 968 969 #endif /* __WIL6210_H__ */ 970