1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef __WIL6210_H__ 19 #define __WIL6210_H__ 20 21 #include <linux/etherdevice.h> 22 #include <linux/netdevice.h> 23 #include <linux/wireless.h> 24 #include <net/cfg80211.h> 25 #include <linux/timex.h> 26 #include <linux/types.h> 27 #include "wmi.h" 28 #include "wil_platform.h" 29 #include "fw.h" 30 31 extern bool no_fw_recovery; 32 extern unsigned int mtu_max; 33 extern unsigned short rx_ring_overflow_thrsh; 34 extern int agg_wsize; 35 extern bool rx_align_2; 36 extern bool rx_large_buf; 37 extern bool debug_fw; 38 extern bool disable_ap_sme; 39 40 #define WIL_NAME "wil6210" 41 42 #define WIL_FW_NAME_DEFAULT "wil6210.fw" 43 #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw" 44 45 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" 46 #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw" 47 48 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */ 49 50 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */ 51 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 52 53 /* maximum number of virtual interfaces the driver supports 54 * (including the main interface) 55 */ 56 #define WIL_MAX_VIFS 4 57 58 /** 59 * extract bits [@b0:@b1] (inclusive) from the value @x 60 * it should be @b0 <= @b1, or result is incorrect 61 */ 62 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 63 { 64 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 65 } 66 67 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL) 68 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL) 69 70 #define WIL_TX_Q_LEN_DEFAULT (4000) 71 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) 72 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12) 73 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7) 74 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */ 75 /* limit ring size in range [32..32k] */ 76 #define WIL_RING_SIZE_ORDER_MIN (5) 77 #define WIL_RING_SIZE_ORDER_MAX (15) 78 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 79 #define WIL6210_MAX_CID (8) /* HW limit */ 80 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 81 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */ 82 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */ 83 /* Hardware offload block adds the following: 84 * 26 bytes - 3-address QoS data header 85 * 8 bytes - IV + EIV (for GCMP) 86 * 8 bytes - SNAP 87 * 16 bytes - MIC (for GCMP) 88 * 4 bytes - CRC 89 */ 90 #define WIL_MAX_MPDU_OVERHEAD (62) 91 92 struct wil_suspend_count_stats { 93 unsigned long successful_suspends; 94 unsigned long successful_resumes; 95 unsigned long failed_suspends; 96 unsigned long failed_resumes; 97 }; 98 99 struct wil_suspend_stats { 100 struct wil_suspend_count_stats r_off; 101 struct wil_suspend_count_stats r_on; 102 unsigned long rejected_by_device; /* only radio on */ 103 unsigned long rejected_by_host; 104 }; 105 106 /* Calculate MAC buffer size for the firmware. It includes all overhead, 107 * as it will go over the air, and need to be 8 byte aligned 108 */ 109 static inline u32 wil_mtu2macbuf(u32 mtu) 110 { 111 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8); 112 } 113 114 /* MTU for Ethernet need to take into account 8-byte SNAP header 115 * to be added when encapsulating Ethernet frame into 802.11 116 */ 117 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8) 118 /* Max supported by wil6210 value for interrupt threshold is 5sec. */ 119 #define WIL6210_ITR_TRSH_MAX (5000000) 120 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 121 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 122 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 123 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 124 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 125 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 126 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 127 #define WIL6210_DISCONNECT_TO_MS (2000) 128 #define WIL6210_RX_HIGH_TRSH_INIT (0) 129 #define WIL6210_RX_HIGH_TRSH_DEFAULT \ 130 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3)) 131 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see 132 * 802.11REVmc/D5.0, section 9.4.1.8) 133 */ 134 /* Hardware definitions begin */ 135 136 /* 137 * Mapping 138 * RGF File | Host addr | FW addr 139 * | | 140 * user_rgf | 0x000000 | 0x880000 141 * dma_rgf | 0x001000 | 0x881000 142 * pcie_rgf | 0x002000 | 0x882000 143 * | | 144 */ 145 146 /* Where various structures placed in host address space */ 147 #define WIL6210_FW_HOST_OFF (0x880000UL) 148 149 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 150 151 /* 152 * Interrupt control registers block 153 * 154 * each interrupt controlled by the same bit in all registers 155 */ 156 struct RGF_ICR { 157 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 158 u32 ICR; /* Cause, W1C/COR depending on ICC */ 159 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 160 u32 ICS; /* Cause Set, WO */ 161 u32 IMV; /* Mask, RW+S/C */ 162 u32 IMS; /* Mask Set, write 1 to set */ 163 u32 IMC; /* Mask Clear, write 1 to clear */ 164 } __packed; 165 166 /* registers - FW addresses */ 167 #define RGF_USER_USAGE_1 (0x880004) 168 #define RGF_USER_USAGE_6 (0x880018) 169 #define BIT_USER_OOB_MODE BIT(31) 170 #define BIT_USER_OOB_R2_MODE BIT(30) 171 #define RGF_USER_USAGE_8 (0x880020) 172 #define BIT_USER_PREVENT_DEEP_SLEEP BIT(0) 173 #define BIT_USER_SUPPORT_T_POWER_ON_0 BIT(1) 174 #define BIT_USER_EXT_CLK BIT(2) 175 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 176 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 177 #define RGF_USER_USER_CPU_0 (0x8801e0) 178 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 179 #define RGF_USER_CPU_PC (0x8801e8) 180 #define RGF_USER_MAC_CPU_0 (0x8801fc) 181 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 182 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 183 #define RGF_USER_BL (0x880A3C) /* Boot Loader */ 184 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 185 #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result 186 * b8-15:signature 187 */ 188 #define CALIB_RESULT_SIGNATURE (0x11) 189 #define RGF_USER_CLKS_CTL_0 (0x880abc) 190 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 191 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 192 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 193 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 194 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 195 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 196 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 197 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 198 #define BIT_CAR_PERST_RST BIT(7) 199 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 200 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 201 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 202 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 203 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 204 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 205 #define RGF_USER_OTP_HW_RD_MACHINE_1 (0x880ce0) 206 #define BIT_NO_FLASH_INDICATION BIT(8) 207 #define RGF_USER_XPM_IFC_RD_TIME1 (0x880cec) 208 #define RGF_USER_XPM_IFC_RD_TIME2 (0x880cf0) 209 #define RGF_USER_XPM_IFC_RD_TIME3 (0x880cf4) 210 #define RGF_USER_XPM_IFC_RD_TIME4 (0x880cf8) 211 #define RGF_USER_XPM_IFC_RD_TIME5 (0x880cfc) 212 #define RGF_USER_XPM_IFC_RD_TIME6 (0x880d00) 213 #define RGF_USER_XPM_IFC_RD_TIME7 (0x880d04) 214 #define RGF_USER_XPM_IFC_RD_TIME8 (0x880d08) 215 #define RGF_USER_XPM_IFC_RD_TIME9 (0x880d0c) 216 #define RGF_USER_XPM_IFC_RD_TIME10 (0x880d10) 217 #define RGF_USER_XPM_RD_DOUT_SAMPLE_TIME (0x880d64) 218 219 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 220 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 221 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 222 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 223 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 224 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1) 225 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 226 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 227 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 228 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27) 229 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 230 231 /* Legacy interrupt moderation control (before Sparrow v2)*/ 232 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 233 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 234 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 235 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 236 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 237 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 238 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 239 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 240 241 /* Offload control (Sparrow B0+) */ 242 #define RGF_DMA_OFUL_NID_0 (0x881cd4) 243 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0) 244 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1) 245 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2) 246 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3) 247 248 /* New (sparrow v2+) interrupt moderation control */ 249 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40) 250 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34) 251 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38) 252 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c) 253 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0) 254 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1) 255 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2) 256 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3) 257 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4) 258 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5) 259 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6) 260 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60) 261 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64) 262 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68) 263 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0) 264 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 265 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2) 266 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3) 267 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 268 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50) 269 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44) 270 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48) 271 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c) 272 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0) 273 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1) 274 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2) 275 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3) 276 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4) 277 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5) 278 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6) 279 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54) 280 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58) 281 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c) 282 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0) 283 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 284 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2) 285 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3) 286 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 287 288 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 289 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 290 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 291 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 292 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 293 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 294 295 #define RGF_HP_CTRL (0x88265c) 296 #define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */ 297 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 298 299 /* MAC timer, usec, for packet lifetime */ 300 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 301 302 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 303 #define RGF_CAF_OSC_CONTROL (0x88afa4) 304 #define BIT_CAF_OSC_XTAL_EN BIT(0) 305 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 306 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 307 308 #define USER_EXT_USER_PMU_3 (0x88d00c) 309 #define BIT_PMU_DEVICE_RDY BIT(0) 310 311 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 312 #define JTAG_DEV_ID_SPARROW (0x2632072f) 313 #define JTAG_DEV_ID_TALYN (0x7e0e1) 314 315 #define RGF_USER_REVISION_ID (0x88afe4) 316 #define RGF_USER_REVISION_ID_MASK (3) 317 #define REVISION_ID_SPARROW_B0 (0x0) 318 #define REVISION_ID_SPARROW_D0 (0x3) 319 320 #define RGF_OTP_MAC (0x8a0620) 321 322 /* crash codes for FW/Ucode stored here */ 323 324 /* ASSERT RGFs */ 325 #define SPARROW_RGF_FW_ASSERT_CODE (0x91f020) 326 #define SPARROW_RGF_UCODE_ASSERT_CODE (0x91f028) 327 #define TALYN_RGF_FW_ASSERT_CODE (0xa37020) 328 #define TALYN_RGF_UCODE_ASSERT_CODE (0xa37028) 329 330 enum { 331 HW_VER_UNKNOWN, 332 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */ 333 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */ 334 HW_VER_TALYN, /* JTAG_DEV_ID_TALYN */ 335 }; 336 337 /* popular locations */ 338 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD 339 #define HOST_MBOX HOSTADDR(RGF_MBOX) 340 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 341 342 /* ISR register bits */ 343 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 344 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 345 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 346 347 #define WIL_DATA_COMPLETION_TO_MS 200 348 349 /* Hardware definitions end */ 350 #define SPARROW_FW_MAPPING_TABLE_SIZE 10 351 #define TALYN_FW_MAPPING_TABLE_SIZE 13 352 #define MAX_FW_MAPPING_TABLE_SIZE 13 353 354 struct fw_map { 355 u32 from; /* linker address - from, inclusive */ 356 u32 to; /* linker address - to, exclusive */ 357 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 358 const char *name; /* for debugfs */ 359 bool fw; /* true if FW mapping, false if UCODE mapping */ 360 }; 361 362 /* array size should be in sync with actual definition in the wmi.c */ 363 extern const struct fw_map sparrow_fw_mapping[SPARROW_FW_MAPPING_TABLE_SIZE]; 364 extern const struct fw_map sparrow_d0_mac_rgf_ext; 365 extern const struct fw_map talyn_fw_mapping[TALYN_FW_MAPPING_TABLE_SIZE]; 366 extern struct fw_map fw_mapping[MAX_FW_MAPPING_TABLE_SIZE]; 367 368 /** 369 * mk_cidxtid - construct @cidxtid field 370 * @cid: CID value 371 * @tid: TID value 372 * 373 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 374 */ 375 static inline u8 mk_cidxtid(u8 cid, u8 tid) 376 { 377 return ((tid & 0xf) << 4) | (cid & 0xf); 378 } 379 380 /** 381 * parse_cidxtid - parse @cidxtid field 382 * @cid: store CID value here 383 * @tid: store TID value here 384 * 385 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 386 */ 387 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 388 { 389 *cid = cidxtid & 0xf; 390 *tid = (cidxtid >> 4) & 0xf; 391 } 392 393 struct wil6210_mbox_ring { 394 u32 base; 395 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 396 u16 size; 397 u32 tail; 398 u32 head; 399 } __packed; 400 401 struct wil6210_mbox_ring_desc { 402 __le32 sync; 403 __le32 addr; 404 } __packed; 405 406 /* at HOST_OFF_WIL6210_MBOX_CTL */ 407 struct wil6210_mbox_ctl { 408 struct wil6210_mbox_ring tx; 409 struct wil6210_mbox_ring rx; 410 } __packed; 411 412 struct wil6210_mbox_hdr { 413 __le16 seq; 414 __le16 len; /* payload, bytes after this header */ 415 __le16 type; 416 u8 flags; 417 u8 reserved; 418 } __packed; 419 420 #define WIL_MBOX_HDR_TYPE_WMI (0) 421 422 /* max. value for wil6210_mbox_hdr.len */ 423 #define MAX_MBOXITEM_SIZE (240) 424 425 struct pending_wmi_event { 426 struct list_head list; 427 struct { 428 struct wil6210_mbox_hdr hdr; 429 struct wmi_cmd_hdr wmi; 430 u8 data[0]; 431 } __packed event; 432 }; 433 434 enum { /* for wil_ctx.mapped_as */ 435 wil_mapped_as_none = 0, 436 wil_mapped_as_single = 1, 437 wil_mapped_as_page = 2, 438 }; 439 440 /** 441 * struct wil_ctx - software context for Vring descriptor 442 */ 443 struct wil_ctx { 444 struct sk_buff *skb; 445 u8 nr_frags; 446 u8 mapped_as; 447 }; 448 449 union vring_desc; 450 451 struct vring { 452 dma_addr_t pa; 453 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 454 u16 size; /* number of vring_desc elements */ 455 u32 swtail; 456 u32 swhead; 457 u32 hwtail; /* write here to inform hw */ 458 struct wil_ctx *ctx; /* ctx[size] - software context */ 459 }; 460 461 /** 462 * Additional data for Tx Vring 463 */ 464 struct vring_tx_data { 465 bool dot1x_open; 466 int enabled; 467 cycles_t idle, last_idle, begin; 468 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */ 469 u16 agg_timeout; 470 u8 agg_amsdu; 471 bool addba_in_progress; /* if set, agg_xxx is for request in progress */ 472 u8 mid; 473 spinlock_t lock; 474 }; 475 476 enum { /* for wil6210_priv.status */ 477 wil_status_fwready = 0, /* FW operational */ 478 wil_status_dontscan, 479 wil_status_mbox_ready, /* MBOX structures ready */ 480 wil_status_irqen, /* interrupts enabled - for debug */ 481 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 482 wil_status_resetting, /* reset in progress */ 483 wil_status_suspending, /* suspend in progress */ 484 wil_status_suspended, /* suspend completed, device is suspended */ 485 wil_status_resuming, /* resume in progress */ 486 wil_status_collecting_dumps, /* crashdump collection in progress */ 487 wil_status_last /* keep last */ 488 }; 489 490 struct pci_dev; 491 492 /** 493 * struct tid_ampdu_rx - TID aggregation information (Rx). 494 * 495 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 496 * @last_rx: jiffies of last rx activity 497 * @head_seq_num: head sequence number in reordering buffer. 498 * @stored_mpdu_num: number of MPDUs in reordering buffer 499 * @ssn: Starting Sequence Number expected to be aggregated. 500 * @buf_size: buffer size for incoming A-MPDUs 501 * @ssn_last_drop: SSN of the last dropped frame 502 * @total: total number of processed incoming frames 503 * @drop_dup: duplicate frames dropped for this reorder buffer 504 * @drop_old: old frames dropped for this reorder buffer 505 * @first_time: true when this buffer used 1-st time 506 */ 507 struct wil_tid_ampdu_rx { 508 struct sk_buff **reorder_buf; 509 unsigned long last_rx; 510 u16 head_seq_num; 511 u16 stored_mpdu_num; 512 u16 ssn; 513 u16 buf_size; 514 u16 ssn_last_drop; 515 unsigned long long total; /* frames processed */ 516 unsigned long long drop_dup; 517 unsigned long long drop_old; 518 bool first_time; /* is it 1-st time this buffer used? */ 519 }; 520 521 /** 522 * struct wil_tid_crypto_rx_single - TID crypto information (Rx). 523 * 524 * @pn: GCMP PN for the session 525 * @key_set: valid key present 526 */ 527 struct wil_tid_crypto_rx_single { 528 u8 pn[IEEE80211_GCMP_PN_LEN]; 529 bool key_set; 530 }; 531 532 struct wil_tid_crypto_rx { 533 struct wil_tid_crypto_rx_single key_id[4]; 534 }; 535 536 struct wil_p2p_info { 537 struct ieee80211_channel listen_chan; 538 u8 discovery_started; 539 u64 cookie; 540 struct wireless_dev *pending_listen_wdev; 541 unsigned int listen_duration; 542 struct timer_list discovery_timer; /* listen/search duration */ 543 struct work_struct discovery_expired_work; /* listen/search expire */ 544 struct work_struct delayed_listen_work; /* listen after scan done */ 545 }; 546 547 enum wil_sta_status { 548 wil_sta_unused = 0, 549 wil_sta_conn_pending = 1, 550 wil_sta_connected = 2, 551 }; 552 553 #define WIL_STA_TID_NUM (16) 554 #define WIL_MCS_MAX (12) /* Maximum MCS supported */ 555 556 struct wil_net_stats { 557 unsigned long rx_packets; 558 unsigned long tx_packets; 559 unsigned long rx_bytes; 560 unsigned long tx_bytes; 561 unsigned long tx_errors; 562 unsigned long rx_dropped; 563 unsigned long rx_non_data_frame; 564 unsigned long rx_short_frame; 565 unsigned long rx_large_frame; 566 unsigned long rx_replay; 567 u16 last_mcs_rx; 568 u64 rx_per_mcs[WIL_MCS_MAX + 1]; 569 }; 570 571 /** 572 * struct wil_sta_info - data for peer 573 * 574 * Peer identified by its CID (connection ID) 575 * NIC performs beam forming for each peer; 576 * if no beam forming done, frame exchange is not 577 * possible. 578 */ 579 struct wil_sta_info { 580 u8 addr[ETH_ALEN]; 581 u8 mid; 582 enum wil_sta_status status; 583 struct wil_net_stats stats; 584 /* Rx BACK */ 585 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 586 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 587 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 588 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 589 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM]; 590 struct wil_tid_crypto_rx group_crypto_rx; 591 u8 aid; /* 1-254; 0 if unknown/not reported */ 592 }; 593 594 enum { 595 fw_recovery_idle = 0, 596 fw_recovery_pending = 1, 597 fw_recovery_running = 2, 598 }; 599 600 enum { 601 hw_capa_no_flash, 602 hw_capa_last 603 }; 604 605 struct wil_probe_client_req { 606 struct list_head list; 607 u64 cookie; 608 u8 cid; 609 }; 610 611 struct pmc_ctx { 612 /* alloc, free, and read operations must own the lock */ 613 struct mutex lock; 614 struct vring_tx_desc *pring_va; 615 dma_addr_t pring_pa; 616 struct desc_alloc_info *descriptors; 617 int last_cmd_status; 618 int num_descriptors; 619 int descriptor_size; 620 }; 621 622 struct wil_halp { 623 struct mutex lock; /* protect halp ref_cnt */ 624 unsigned int ref_cnt; 625 struct completion comp; 626 }; 627 628 struct wil_blob_wrapper { 629 struct wil6210_priv *wil; 630 struct debugfs_blob_wrapper blob; 631 }; 632 633 #define WIL_LED_MAX_ID (2) 634 #define WIL_LED_INVALID_ID (0xF) 635 #define WIL_LED_BLINK_ON_SLOW_MS (300) 636 #define WIL_LED_BLINK_OFF_SLOW_MS (300) 637 #define WIL_LED_BLINK_ON_MED_MS (200) 638 #define WIL_LED_BLINK_OFF_MED_MS (200) 639 #define WIL_LED_BLINK_ON_FAST_MS (100) 640 #define WIL_LED_BLINK_OFF_FAST_MS (100) 641 enum { 642 WIL_LED_TIME_SLOW = 0, 643 WIL_LED_TIME_MED, 644 WIL_LED_TIME_FAST, 645 WIL_LED_TIME_LAST, 646 }; 647 648 struct blink_on_off_time { 649 u32 on_ms; 650 u32 off_ms; 651 }; 652 653 struct wil_debugfs_iomem_data { 654 void *offset; 655 struct wil6210_priv *wil; 656 }; 657 658 struct wil_debugfs_data { 659 struct wil_debugfs_iomem_data *data_arr; 660 int iomem_data_count; 661 }; 662 663 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST]; 664 extern u8 led_id; 665 extern u8 led_polarity; 666 667 enum wil6210_vif_status { 668 wil_vif_fwconnecting, 669 wil_vif_fwconnected, 670 wil_vif_status_last /* keep last */ 671 }; 672 673 struct wil6210_vif { 674 struct wireless_dev wdev; 675 struct net_device *ndev; 676 struct wil6210_priv *wil; 677 u8 mid; 678 DECLARE_BITMAP(status, wil_vif_status_last); 679 u32 privacy; /* secure connection? */ 680 u16 channel; /* relevant in AP mode */ 681 u8 hidden_ssid; /* relevant in AP mode */ 682 u32 ap_isolate; /* no intra-BSS communication */ 683 bool pbss; 684 int bcast_vring; 685 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */ 686 int locally_generated_disc; /* relevant in STA mode */ 687 struct timer_list connect_timer; 688 struct work_struct disconnect_worker; 689 /* scan */ 690 struct cfg80211_scan_request *scan_request; 691 struct timer_list scan_timer; /* detect scan timeout */ 692 struct wil_p2p_info p2p; 693 /* keep alive */ 694 struct list_head probe_client_pending; 695 struct mutex probe_client_mutex; /* protect @probe_client_pending */ 696 struct work_struct probe_client_worker; 697 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */ 698 }; 699 700 struct wil6210_priv { 701 struct pci_dev *pdev; 702 u32 bar_size; 703 struct wiphy *wiphy; 704 struct net_device *main_ndev; 705 void __iomem *csr; 706 DECLARE_BITMAP(status, wil_status_last); 707 u8 fw_version[ETHTOOL_FWVERS_LEN]; 708 u32 hw_version; 709 u8 chip_revision; 710 const char *hw_name; 711 const char *wil_fw_name; 712 char *board_file; 713 u32 brd_file_addr; 714 u32 brd_file_max_size; 715 DECLARE_BITMAP(hw_capa, hw_capa_last); 716 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 717 DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX); 718 u32 recovery_count; /* num of FW recovery attempts in a short time */ 719 u32 recovery_state; /* FW recovery state machine */ 720 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 721 wait_queue_head_t wq; /* for all wait_event() use */ 722 u8 max_vifs; /* maximum number of interfaces, including main */ 723 struct wil6210_vif *vifs[WIL_MAX_VIFS]; 724 struct mutex vif_mutex; /* protects access to VIF entries */ 725 atomic_t connected_vifs; 726 /* profile */ 727 struct cfg80211_chan_def monitor_chandef; 728 u32 monitor_flags; 729 int sinfo_gen; 730 /* interrupt moderation */ 731 u32 tx_max_burst_duration; 732 u32 tx_interframe_timeout; 733 u32 rx_max_burst_duration; 734 u32 rx_interframe_timeout; 735 /* cached ISR registers */ 736 u32 isr_misc; 737 /* mailbox related */ 738 struct mutex wmi_mutex; 739 struct wil6210_mbox_ctl mbox_ctl; 740 struct completion wmi_ready; 741 struct completion wmi_call; 742 u16 wmi_seq; 743 u16 reply_id; /**< wait for this WMI event */ 744 u8 reply_mid; 745 void *reply_buf; 746 u16 reply_size; 747 struct workqueue_struct *wmi_wq; /* for deferred calls */ 748 struct work_struct wmi_event_worker; 749 struct workqueue_struct *wq_service; 750 struct work_struct fw_error_worker; /* for FW error recovery */ 751 struct list_head pending_wmi_ev; 752 /* 753 * protect pending_wmi_ev 754 * - fill in IRQ from wil6210_irq_misc, 755 * - consumed in thread by wmi_event_worker 756 */ 757 spinlock_t wmi_ev_lock; 758 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */ 759 struct napi_struct napi_rx; 760 struct napi_struct napi_tx; 761 struct net_device napi_ndev; /* dummy net_device serving all VIFs */ 762 763 /* DMA related */ 764 struct vring vring_rx; 765 unsigned int rx_buf_len; 766 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 767 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 768 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 769 struct wil_sta_info sta[WIL6210_MAX_CID]; 770 u32 vring_idle_trsh; /* HW fetches up to 16 descriptors at once */ 771 u32 dma_addr_size; /* indicates dma addr size */ 772 773 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 774 /* statistics */ 775 atomic_t isr_count_rx, isr_count_tx; 776 /* debugfs */ 777 struct dentry *debug; 778 struct wil_blob_wrapper blobs[MAX_FW_MAPPING_TABLE_SIZE]; 779 u8 discovery_mode; 780 u8 abft_len; 781 u8 wakeup_trigger; 782 struct wil_suspend_stats suspend_stats; 783 struct wil_debugfs_data dbg_data; 784 785 void *platform_handle; 786 struct wil_platform_ops platform_ops; 787 bool keep_radio_on_during_sleep; 788 789 struct pmc_ctx pmc; 790 791 u8 p2p_dev_started; 792 793 /* P2P_DEVICE vif */ 794 struct wireless_dev *p2p_wdev; 795 struct wireless_dev *radio_wdev; 796 797 /* High Access Latency Policy voting */ 798 struct wil_halp halp; 799 800 enum wmi_ps_profile_type ps_profile; 801 802 int fw_calib_result; 803 804 struct notifier_block pm_notify; 805 806 bool suspend_resp_rcvd; 807 bool suspend_resp_comp; 808 u32 bus_request_kbps; 809 u32 bus_request_kbps_pre_suspend; 810 811 u32 rgf_fw_assert_code_addr; 812 u32 rgf_ucode_assert_code_addr; 813 u32 iccm_base; 814 }; 815 816 #define wil_to_wiphy(i) (i->wiphy) 817 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 818 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 819 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 820 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 821 #define ndev_to_vif(n) (struct wil6210_vif *)(netdev_priv(n)) 822 #define vif_to_wil(v) (v->wil) 823 #define vif_to_ndev(v) (v->ndev) 824 #define vif_to_wdev(v) (&v->wdev) 825 826 static inline struct wil6210_vif *wdev_to_vif(struct wil6210_priv *wil, 827 struct wireless_dev *wdev) 828 { 829 /* main interface is shared with P2P device */ 830 if (wdev == wil->p2p_wdev) 831 return ndev_to_vif(wil->main_ndev); 832 else 833 return container_of(wdev, struct wil6210_vif, wdev); 834 } 835 836 static inline struct wireless_dev * 837 vif_to_radio_wdev(struct wil6210_priv *wil, struct wil6210_vif *vif) 838 { 839 /* main interface is shared with P2P device */ 840 if (vif->mid) 841 return vif_to_wdev(vif); 842 else 843 return wil->radio_wdev; 844 } 845 846 __printf(2, 3) 847 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 848 __printf(2, 3) 849 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...); 850 __printf(2, 3) 851 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...); 852 __printf(2, 3) 853 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...); 854 __printf(2, 3) 855 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...); 856 #define wil_dbg(wil, fmt, arg...) do { \ 857 netdev_dbg(wil->main_ndev, fmt, ##arg); \ 858 wil_dbg_trace(wil, fmt, ##arg); \ 859 } while (0) 860 861 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 862 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 863 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 864 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 865 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg) 866 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg) 867 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg) 868 #define wil_err_ratelimited(wil, fmt, arg...) \ 869 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg) 870 871 /* target operations */ 872 /* register read */ 873 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg) 874 { 875 return readl(wil->csr + HOSTADDR(reg)); 876 } 877 878 /* register write. wmb() to make sure it is completed */ 879 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val) 880 { 881 writel(val, wil->csr + HOSTADDR(reg)); 882 wmb(); /* wait for write to propagate to the HW */ 883 } 884 885 /* register set = read, OR, write */ 886 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val) 887 { 888 wil_w(wil, reg, wil_r(wil, reg) | val); 889 } 890 891 /* register clear = read, AND with inverted, write */ 892 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val) 893 { 894 wil_w(wil, reg, wil_r(wil, reg) & ~val); 895 } 896 897 #if defined(CONFIG_DYNAMIC_DEBUG) 898 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 899 groupsize, buf, len, ascii) \ 900 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 901 prefix_type, rowsize, \ 902 groupsize, buf, len, ascii) 903 904 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 905 groupsize, buf, len, ascii) \ 906 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 907 prefix_type, rowsize, \ 908 groupsize, buf, len, ascii) 909 910 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \ 911 groupsize, buf, len, ascii) \ 912 print_hex_dump_debug("DBG[MISC]" prefix_str,\ 913 prefix_type, rowsize, \ 914 groupsize, buf, len, ascii) 915 #else /* defined(CONFIG_DYNAMIC_DEBUG) */ 916 static inline 917 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 918 int groupsize, const void *buf, size_t len, bool ascii) 919 { 920 } 921 922 static inline 923 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 924 int groupsize, const void *buf, size_t len, bool ascii) 925 { 926 } 927 928 static inline 929 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize, 930 int groupsize, const void *buf, size_t len, bool ascii) 931 { 932 } 933 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 934 935 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 936 size_t count); 937 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 938 size_t count); 939 940 struct wil6210_vif * 941 wil_vif_alloc(struct wil6210_priv *wil, const char *name, 942 unsigned char name_assign_type, enum nl80211_iftype iftype); 943 void wil_vif_free(struct wil6210_vif *vif); 944 void *wil_if_alloc(struct device *dev); 945 bool wil_has_other_active_ifaces(struct wil6210_priv *wil, 946 struct net_device *ndev, bool up, bool ok); 947 bool wil_has_active_ifaces(struct wil6210_priv *wil, bool up, bool ok); 948 void wil_if_free(struct wil6210_priv *wil); 949 int wil_vif_add(struct wil6210_priv *wil, struct wil6210_vif *vif); 950 int wil_if_add(struct wil6210_priv *wil); 951 void wil_vif_remove(struct wil6210_priv *wil, u8 mid); 952 void wil_if_remove(struct wil6210_priv *wil); 953 int wil_priv_init(struct wil6210_priv *wil); 954 void wil_priv_deinit(struct wil6210_priv *wil); 955 int wil_ps_update(struct wil6210_priv *wil, 956 enum wmi_ps_profile_type ps_profile); 957 int wil_reset(struct wil6210_priv *wil, bool no_fw); 958 void wil_fw_error_recovery(struct wil6210_priv *wil); 959 void wil_set_recovery_state(struct wil6210_priv *wil, int state); 960 bool wil_is_recovery_blocked(struct wil6210_priv *wil); 961 int wil_up(struct wil6210_priv *wil); 962 int __wil_up(struct wil6210_priv *wil); 963 int wil_down(struct wil6210_priv *wil); 964 int __wil_down(struct wil6210_priv *wil); 965 void wil_refresh_fw_capabilities(struct wil6210_priv *wil); 966 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 967 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac); 968 void wil_set_ethtoolops(struct net_device *ndev); 969 970 struct fw_map *wil_find_fw_mapping(const char *section); 971 void __iomem *wmi_buffer_block(struct wil6210_priv *wil, __le32 ptr, u32 size); 972 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 973 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 974 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 975 struct wil6210_mbox_hdr *hdr); 976 int wmi_send(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len); 977 void wmi_recv_cmd(struct wil6210_priv *wil); 978 int wmi_call(struct wil6210_priv *wil, u16 cmdid, u8 mid, void *buf, u16 len, 979 u16 reply_id, void *reply, u16 reply_size, int to_msec); 980 void wmi_event_worker(struct work_struct *work); 981 void wmi_event_flush(struct wil6210_priv *wil); 982 int wmi_set_ssid(struct wil6210_vif *vif, u8 ssid_len, const void *ssid); 983 int wmi_get_ssid(struct wil6210_vif *vif, u8 *ssid_len, void *ssid); 984 int wmi_set_channel(struct wil6210_priv *wil, int channel); 985 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 986 int wmi_del_cipher_key(struct wil6210_vif *vif, u8 key_index, 987 const void *mac_addr, int key_usage); 988 int wmi_add_cipher_key(struct wil6210_vif *vif, u8 key_index, 989 const void *mac_addr, int key_len, const void *key, 990 int key_usage); 991 int wmi_echo(struct wil6210_priv *wil); 992 int wmi_set_ie(struct wil6210_vif *vif, u8 type, u16 ie_len, const void *ie); 993 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 994 int wmi_rxon(struct wil6210_priv *wil, bool on); 995 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 996 int wmi_disconnect_sta(struct wil6210_vif *vif, const u8 *mac, 997 u16 reason, bool full_disconnect, bool del_sta); 998 int wmi_addba(struct wil6210_priv *wil, u8 mid, 999 u8 ringid, u8 size, u16 timeout); 1000 int wmi_delba_tx(struct wil6210_priv *wil, u8 mid, u8 ringid, u16 reason); 1001 int wmi_delba_rx(struct wil6210_priv *wil, u8 mid, u8 cidxtid, u16 reason); 1002 int wmi_addba_rx_resp(struct wil6210_priv *wil, 1003 u8 mid, u8 cid, u8 tid, u8 token, 1004 u16 status, bool amsdu, u16 agg_wsize, u16 timeout); 1005 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil, 1006 enum wmi_ps_profile_type ps_profile); 1007 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short); 1008 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short); 1009 int wmi_new_sta(struct wil6210_vif *vif, const u8 *mac, u8 aid); 1010 int wmi_port_allocate(struct wil6210_priv *wil, u8 mid, 1011 const u8 *mac, enum nl80211_iftype iftype); 1012 int wmi_port_delete(struct wil6210_priv *wil, u8 mid); 1013 int wil_addba_rx_request(struct wil6210_priv *wil, u8 mid, 1014 u8 cidxtid, u8 dialog_token, __le16 ba_param_set, 1015 __le16 ba_timeout, __le16 ba_seq_ctrl); 1016 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize); 1017 1018 void wil6210_clear_irq(struct wil6210_priv *wil); 1019 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi); 1020 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 1021 void wil_mask_irq(struct wil6210_priv *wil); 1022 void wil_unmask_irq(struct wil6210_priv *wil); 1023 void wil_configure_interrupt_moderation(struct wil6210_priv *wil); 1024 void wil_disable_irq(struct wil6210_priv *wil); 1025 void wil_enable_irq(struct wil6210_priv *wil); 1026 void wil6210_mask_halp(struct wil6210_priv *wil); 1027 1028 /* P2P */ 1029 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request); 1030 int wil_p2p_search(struct wil6210_vif *vif, 1031 struct cfg80211_scan_request *request); 1032 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev, 1033 unsigned int duration, struct ieee80211_channel *chan, 1034 u64 *cookie); 1035 u8 wil_p2p_stop_discovery(struct wil6210_vif *vif); 1036 int wil_p2p_cancel_listen(struct wil6210_vif *vif, u64 cookie); 1037 void wil_p2p_listen_expired(struct work_struct *work); 1038 void wil_p2p_search_expired(struct work_struct *work); 1039 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil); 1040 void wil_p2p_delayed_listen_work(struct work_struct *work); 1041 1042 /* WMI for P2P */ 1043 int wmi_p2p_cfg(struct wil6210_vif *vif, int channel, int bi); 1044 int wmi_start_listen(struct wil6210_vif *vif); 1045 int wmi_start_search(struct wil6210_vif *vif); 1046 int wmi_stop_discovery(struct wil6210_vif *vif); 1047 1048 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 1049 struct cfg80211_mgmt_tx_params *params, 1050 u64 *cookie); 1051 int wil_cfg80211_iface_combinations_from_fw( 1052 struct wil6210_priv *wil, 1053 const struct wil_fw_record_concurrency *conc); 1054 int wil_vif_prepare_stop(struct wil6210_vif *vif); 1055 1056 #if defined(CONFIG_WIL6210_DEBUGFS) 1057 int wil6210_debugfs_init(struct wil6210_priv *wil); 1058 void wil6210_debugfs_remove(struct wil6210_priv *wil); 1059 #else 1060 static inline int wil6210_debugfs_init(struct wil6210_priv *wil) { return 0; } 1061 static inline void wil6210_debugfs_remove(struct wil6210_priv *wil) {} 1062 #endif 1063 1064 int wil_cid_fill_sinfo(struct wil6210_vif *vif, int cid, 1065 struct station_info *sinfo); 1066 1067 struct wil6210_priv *wil_cfg80211_init(struct device *dev); 1068 void wil_cfg80211_deinit(struct wil6210_priv *wil); 1069 void wil_p2p_wdev_free(struct wil6210_priv *wil); 1070 1071 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 1072 int wmi_pcp_start(struct wil6210_vif *vif, int bi, u8 wmi_nettype, u8 chan, 1073 u8 hidden_ssid, u8 is_go); 1074 int wmi_pcp_stop(struct wil6210_vif *vif); 1075 int wmi_led_cfg(struct wil6210_priv *wil, bool enable); 1076 int wmi_abort_scan(struct wil6210_vif *vif); 1077 void wil_abort_scan(struct wil6210_vif *vif, bool sync); 1078 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync); 1079 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps); 1080 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid, 1081 u16 reason_code, bool from_event); 1082 void wil_probe_client_flush(struct wil6210_vif *vif); 1083 void wil_probe_client_worker(struct work_struct *work); 1084 void wil_disconnect_worker(struct work_struct *work); 1085 1086 int wil_rx_init(struct wil6210_priv *wil, u16 size); 1087 void wil_rx_fini(struct wil6210_priv *wil); 1088 1089 /* TX API */ 1090 int wil_vring_init_tx(struct wil6210_vif *vif, int id, int size, 1091 int cid, int tid); 1092 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 1093 int wil_tx_init(struct wil6210_vif *vif, int cid); 1094 int wil_vring_init_bcast(struct wil6210_vif *vif, int id, int size); 1095 int wil_bcast_init(struct wil6210_vif *vif); 1096 void wil_bcast_fini(struct wil6210_vif *vif); 1097 void wil_bcast_fini_all(struct wil6210_priv *wil); 1098 1099 void wil_update_net_queues(struct wil6210_priv *wil, struct wil6210_vif *vif, 1100 struct vring *vring, bool should_stop); 1101 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct wil6210_vif *vif, 1102 struct vring *vring, bool check_stop); 1103 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 1104 int wil_tx_complete(struct wil6210_vif *vif, int ringid); 1105 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 1106 1107 /* RX API */ 1108 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 1109 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 1110 1111 int wil_iftype_nl2wmi(enum nl80211_iftype type); 1112 1113 int wil_request_firmware(struct wil6210_priv *wil, const char *name, 1114 bool load); 1115 int wil_request_board(struct wil6210_priv *wil, const char *name); 1116 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name); 1117 1118 void wil_pm_runtime_allow(struct wil6210_priv *wil); 1119 void wil_pm_runtime_forbid(struct wil6210_priv *wil); 1120 int wil_pm_runtime_get(struct wil6210_priv *wil); 1121 void wil_pm_runtime_put(struct wil6210_priv *wil); 1122 1123 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime); 1124 int wil_suspend(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on); 1125 int wil_resume(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on); 1126 bool wil_is_wmi_idle(struct wil6210_priv *wil); 1127 int wmi_resume(struct wil6210_priv *wil); 1128 int wmi_suspend(struct wil6210_priv *wil); 1129 bool wil_is_tx_idle(struct wil6210_priv *wil); 1130 bool wil_is_rx_idle(struct wil6210_priv *wil); 1131 1132 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size); 1133 void wil_fw_core_dump(struct wil6210_priv *wil); 1134 1135 void wil_halp_vote(struct wil6210_priv *wil); 1136 void wil_halp_unvote(struct wil6210_priv *wil); 1137 void wil6210_set_halp(struct wil6210_priv *wil); 1138 void wil6210_clear_halp(struct wil6210_priv *wil); 1139 1140 int wmi_start_sched_scan(struct wil6210_priv *wil, 1141 struct cfg80211_sched_scan_request *request); 1142 int wmi_stop_sched_scan(struct wil6210_priv *wil); 1143 int wmi_mgmt_tx(struct wil6210_vif *vif, const u8 *buf, size_t len); 1144 1145 #endif /* __WIL6210_H__ */ 1146