1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __WIL6210_H__ 18 #define __WIL6210_H__ 19 20 #include <linux/etherdevice.h> 21 #include <linux/netdevice.h> 22 #include <linux/wireless.h> 23 #include <net/cfg80211.h> 24 #include <linux/timex.h> 25 #include <linux/types.h> 26 #include "wmi.h" 27 #include "wil_platform.h" 28 29 extern bool no_fw_recovery; 30 extern unsigned int mtu_max; 31 extern unsigned short rx_ring_overflow_thrsh; 32 extern int agg_wsize; 33 extern bool rx_align_2; 34 extern bool rx_large_buf; 35 extern bool debug_fw; 36 extern bool disable_ap_sme; 37 38 #define WIL_NAME "wil6210" 39 40 #define WIL_FW_NAME_DEFAULT "wil6210.fw" 41 #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw" 42 43 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" 44 #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw" 45 46 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */ 47 48 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */ 49 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 50 51 /** 52 * extract bits [@b0:@b1] (inclusive) from the value @x 53 * it should be @b0 <= @b1, or result is incorrect 54 */ 55 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 56 { 57 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 58 } 59 60 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL) 61 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL) 62 63 #define WIL_TX_Q_LEN_DEFAULT (4000) 64 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10) 65 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12) 66 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7) 67 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */ 68 /* limit ring size in range [32..32k] */ 69 #define WIL_RING_SIZE_ORDER_MIN (5) 70 #define WIL_RING_SIZE_ORDER_MAX (15) 71 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 72 #define WIL6210_MAX_CID (8) /* HW limit */ 73 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 74 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */ 75 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */ 76 /* Hardware offload block adds the following: 77 * 26 bytes - 3-address QoS data header 78 * 8 bytes - IV + EIV (for GCMP) 79 * 8 bytes - SNAP 80 * 16 bytes - MIC (for GCMP) 81 * 4 bytes - CRC 82 */ 83 #define WIL_MAX_MPDU_OVERHEAD (62) 84 85 struct wil_suspend_count_stats { 86 unsigned long successful_suspends; 87 unsigned long successful_resumes; 88 unsigned long failed_suspends; 89 unsigned long failed_resumes; 90 }; 91 92 struct wil_suspend_stats { 93 struct wil_suspend_count_stats r_off; 94 struct wil_suspend_count_stats r_on; 95 unsigned long rejected_by_device; /* only radio on */ 96 unsigned long rejected_by_host; 97 }; 98 99 /* Calculate MAC buffer size for the firmware. It includes all overhead, 100 * as it will go over the air, and need to be 8 byte aligned 101 */ 102 static inline u32 wil_mtu2macbuf(u32 mtu) 103 { 104 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8); 105 } 106 107 /* MTU for Ethernet need to take into account 8-byte SNAP header 108 * to be added when encapsulating Ethernet frame into 802.11 109 */ 110 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8) 111 /* Max supported by wil6210 value for interrupt threshold is 5sec. */ 112 #define WIL6210_ITR_TRSH_MAX (5000000) 113 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 114 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */ 115 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 116 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */ 117 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 118 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 119 #define WIL6210_SCAN_TO msecs_to_jiffies(10000) 120 #define WIL6210_DISCONNECT_TO_MS (2000) 121 #define WIL6210_RX_HIGH_TRSH_INIT (0) 122 #define WIL6210_RX_HIGH_TRSH_DEFAULT \ 123 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3)) 124 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see 125 * 802.11REVmc/D5.0, section 9.4.1.8) 126 */ 127 /* Hardware definitions begin */ 128 129 /* 130 * Mapping 131 * RGF File | Host addr | FW addr 132 * | | 133 * user_rgf | 0x000000 | 0x880000 134 * dma_rgf | 0x001000 | 0x881000 135 * pcie_rgf | 0x002000 | 0x882000 136 * | | 137 */ 138 139 /* Where various structures placed in host address space */ 140 #define WIL6210_FW_HOST_OFF (0x880000UL) 141 142 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 143 144 /* 145 * Interrupt control registers block 146 * 147 * each interrupt controlled by the same bit in all registers 148 */ 149 struct RGF_ICR { 150 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 151 u32 ICR; /* Cause, W1C/COR depending on ICC */ 152 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 153 u32 ICS; /* Cause Set, WO */ 154 u32 IMV; /* Mask, RW+S/C */ 155 u32 IMS; /* Mask Set, write 1 to set */ 156 u32 IMC; /* Mask Clear, write 1 to clear */ 157 } __packed; 158 159 /* registers - FW addresses */ 160 #define RGF_USER_USAGE_1 (0x880004) 161 #define RGF_USER_USAGE_6 (0x880018) 162 #define BIT_USER_OOB_MODE BIT(31) 163 #define BIT_USER_OOB_R2_MODE BIT(30) 164 #define RGF_USER_HW_MACHINE_STATE (0x8801dc) 165 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 166 #define RGF_USER_USER_CPU_0 (0x8801e0) 167 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 168 #define RGF_USER_MAC_CPU_0 (0x8801fc) 169 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 170 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 171 #define RGF_USER_BL (0x880A3C) /* Boot Loader */ 172 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 173 #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result 174 * b8-15:signature 175 */ 176 #define CALIB_RESULT_SIGNATURE (0x11) 177 #define RGF_USER_CLKS_CTL_0 (0x880abc) 178 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 179 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 180 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 181 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 182 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 183 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 184 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 185 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 186 #define BIT_CAR_PERST_RST BIT(7) 187 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 188 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 189 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 190 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 191 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 192 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 193 194 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 195 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 196 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 197 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 198 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 199 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1) 200 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 201 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 202 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 203 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27) 204 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 205 206 /* Legacy interrupt moderation control (before Sparrow v2)*/ 207 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 208 #define RGF_DMA_ITR_CNT_DATA (0x881c60) 209 #define RGF_DMA_ITR_CNT_CRL (0x881c64) 210 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 211 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 212 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 213 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 214 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 215 216 /* Offload control (Sparrow B0+) */ 217 #define RGF_DMA_OFUL_NID_0 (0x881cd4) 218 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0) 219 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1) 220 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2) 221 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3) 222 223 /* New (sparrow v2+) interrupt moderation control */ 224 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40) 225 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34) 226 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38) 227 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c) 228 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0) 229 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1) 230 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2) 231 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3) 232 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4) 233 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5) 234 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6) 235 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60) 236 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64) 237 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68) 238 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0) 239 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 240 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2) 241 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3) 242 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 243 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50) 244 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44) 245 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48) 246 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c) 247 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0) 248 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1) 249 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2) 250 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3) 251 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4) 252 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5) 253 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6) 254 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54) 255 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58) 256 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c) 257 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0) 258 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1) 259 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2) 260 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3) 261 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4) 262 263 #define RGF_DMA_PSEUDO_CAUSE (0x881c68) 264 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 265 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 266 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 267 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 268 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 269 270 #define RGF_HP_CTRL (0x88265c) 271 #define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */ 272 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 273 274 /* MAC timer, usec, for packet lifetime */ 275 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 276 277 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 278 #define RGF_CAF_OSC_CONTROL (0x88afa4) 279 #define BIT_CAF_OSC_XTAL_EN BIT(0) 280 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 281 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 282 283 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 284 #define JTAG_DEV_ID_SPARROW (0x2632072f) 285 286 #define RGF_USER_REVISION_ID (0x88afe4) 287 #define RGF_USER_REVISION_ID_MASK (3) 288 #define REVISION_ID_SPARROW_B0 (0x0) 289 #define REVISION_ID_SPARROW_D0 (0x3) 290 291 /* crash codes for FW/Ucode stored here */ 292 #define RGF_FW_ASSERT_CODE (0x91f020) 293 #define RGF_UCODE_ASSERT_CODE (0x91f028) 294 295 enum { 296 HW_VER_UNKNOWN, 297 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */ 298 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */ 299 }; 300 301 /* popular locations */ 302 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD 303 #define HOST_MBOX HOSTADDR(RGF_MBOX) 304 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 305 306 /* ISR register bits */ 307 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 308 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 309 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 310 311 #define WIL_DATA_COMPLETION_TO_MS 200 312 313 /* Hardware definitions end */ 314 struct fw_map { 315 u32 from; /* linker address - from, inclusive */ 316 u32 to; /* linker address - to, exclusive */ 317 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 318 const char *name; /* for debugfs */ 319 bool fw; /* true if FW mapping, false if UCODE mapping */ 320 }; 321 322 /* array size should be in sync with actual definition in the wmi.c */ 323 extern const struct fw_map fw_mapping[10]; 324 325 /** 326 * mk_cidxtid - construct @cidxtid field 327 * @cid: CID value 328 * @tid: TID value 329 * 330 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 331 */ 332 static inline u8 mk_cidxtid(u8 cid, u8 tid) 333 { 334 return ((tid & 0xf) << 4) | (cid & 0xf); 335 } 336 337 /** 338 * parse_cidxtid - parse @cidxtid field 339 * @cid: store CID value here 340 * @tid: store TID value here 341 * 342 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 343 */ 344 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 345 { 346 *cid = cidxtid & 0xf; 347 *tid = (cidxtid >> 4) & 0xf; 348 } 349 350 struct wil6210_mbox_ring { 351 u32 base; 352 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 353 u16 size; 354 u32 tail; 355 u32 head; 356 } __packed; 357 358 struct wil6210_mbox_ring_desc { 359 __le32 sync; 360 __le32 addr; 361 } __packed; 362 363 /* at HOST_OFF_WIL6210_MBOX_CTL */ 364 struct wil6210_mbox_ctl { 365 struct wil6210_mbox_ring tx; 366 struct wil6210_mbox_ring rx; 367 } __packed; 368 369 struct wil6210_mbox_hdr { 370 __le16 seq; 371 __le16 len; /* payload, bytes after this header */ 372 __le16 type; 373 u8 flags; 374 u8 reserved; 375 } __packed; 376 377 #define WIL_MBOX_HDR_TYPE_WMI (0) 378 379 /* max. value for wil6210_mbox_hdr.len */ 380 #define MAX_MBOXITEM_SIZE (240) 381 382 struct pending_wmi_event { 383 struct list_head list; 384 struct { 385 struct wil6210_mbox_hdr hdr; 386 struct wmi_cmd_hdr wmi; 387 u8 data[0]; 388 } __packed event; 389 }; 390 391 enum { /* for wil_ctx.mapped_as */ 392 wil_mapped_as_none = 0, 393 wil_mapped_as_single = 1, 394 wil_mapped_as_page = 2, 395 }; 396 397 /** 398 * struct wil_ctx - software context for Vring descriptor 399 */ 400 struct wil_ctx { 401 struct sk_buff *skb; 402 u8 nr_frags; 403 u8 mapped_as; 404 }; 405 406 union vring_desc; 407 408 struct vring { 409 dma_addr_t pa; 410 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 411 u16 size; /* number of vring_desc elements */ 412 u32 swtail; 413 u32 swhead; 414 u32 hwtail; /* write here to inform hw */ 415 struct wil_ctx *ctx; /* ctx[size] - software context */ 416 }; 417 418 /** 419 * Additional data for Tx Vring 420 */ 421 struct vring_tx_data { 422 bool dot1x_open; 423 int enabled; 424 cycles_t idle, last_idle, begin; 425 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */ 426 u16 agg_timeout; 427 u8 agg_amsdu; 428 bool addba_in_progress; /* if set, agg_xxx is for request in progress */ 429 spinlock_t lock; 430 }; 431 432 enum { /* for wil6210_priv.status */ 433 wil_status_fwready = 0, /* FW operational */ 434 wil_status_fwconnecting, 435 wil_status_fwconnected, 436 wil_status_dontscan, 437 wil_status_mbox_ready, /* MBOX structures ready */ 438 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 439 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 440 wil_status_resetting, /* reset in progress */ 441 wil_status_suspending, /* suspend in progress */ 442 wil_status_suspended, /* suspend completed, device is suspended */ 443 wil_status_resuming, /* resume in progress */ 444 wil_status_last /* keep last */ 445 }; 446 447 struct pci_dev; 448 449 /** 450 * struct tid_ampdu_rx - TID aggregation information (Rx). 451 * 452 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 453 * @reorder_time: jiffies when skb was added 454 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 455 * @reorder_timer: releases expired frames from the reorder buffer. 456 * @last_rx: jiffies of last rx activity 457 * @head_seq_num: head sequence number in reordering buffer. 458 * @stored_mpdu_num: number of MPDUs in reordering buffer 459 * @ssn: Starting Sequence Number expected to be aggregated. 460 * @buf_size: buffer size for incoming A-MPDUs 461 * @timeout: reset timer value (in TUs). 462 * @ssn_last_drop: SSN of the last dropped frame 463 * @total: total number of processed incoming frames 464 * @drop_dup: duplicate frames dropped for this reorder buffer 465 * @drop_old: old frames dropped for this reorder buffer 466 * @dialog_token: dialog token for aggregation session 467 * @first_time: true when this buffer used 1-st time 468 */ 469 struct wil_tid_ampdu_rx { 470 struct sk_buff **reorder_buf; 471 unsigned long *reorder_time; 472 struct timer_list session_timer; 473 struct timer_list reorder_timer; 474 unsigned long last_rx; 475 u16 head_seq_num; 476 u16 stored_mpdu_num; 477 u16 ssn; 478 u16 buf_size; 479 u16 timeout; 480 u16 ssn_last_drop; 481 unsigned long long total; /* frames processed */ 482 unsigned long long drop_dup; 483 unsigned long long drop_old; 484 u8 dialog_token; 485 bool first_time; /* is it 1-st time this buffer used? */ 486 }; 487 488 /** 489 * struct wil_tid_crypto_rx_single - TID crypto information (Rx). 490 * 491 * @pn: GCMP PN for the session 492 * @key_set: valid key present 493 */ 494 struct wil_tid_crypto_rx_single { 495 u8 pn[IEEE80211_GCMP_PN_LEN]; 496 bool key_set; 497 }; 498 499 struct wil_tid_crypto_rx { 500 struct wil_tid_crypto_rx_single key_id[4]; 501 }; 502 503 struct wil_p2p_info { 504 struct ieee80211_channel listen_chan; 505 u8 discovery_started; 506 u8 p2p_dev_started; 507 u64 cookie; 508 struct wireless_dev *pending_listen_wdev; 509 unsigned int listen_duration; 510 struct timer_list discovery_timer; /* listen/search duration */ 511 struct work_struct discovery_expired_work; /* listen/search expire */ 512 struct work_struct delayed_listen_work; /* listen after scan done */ 513 }; 514 515 enum wil_sta_status { 516 wil_sta_unused = 0, 517 wil_sta_conn_pending = 1, 518 wil_sta_connected = 2, 519 }; 520 521 #define WIL_STA_TID_NUM (16) 522 #define WIL_MCS_MAX (12) /* Maximum MCS supported */ 523 524 struct wil_net_stats { 525 unsigned long rx_packets; 526 unsigned long tx_packets; 527 unsigned long rx_bytes; 528 unsigned long tx_bytes; 529 unsigned long tx_errors; 530 unsigned long rx_dropped; 531 unsigned long rx_non_data_frame; 532 unsigned long rx_short_frame; 533 unsigned long rx_large_frame; 534 unsigned long rx_replay; 535 u16 last_mcs_rx; 536 u64 rx_per_mcs[WIL_MCS_MAX + 1]; 537 }; 538 539 /** 540 * struct wil_sta_info - data for peer 541 * 542 * Peer identified by its CID (connection ID) 543 * NIC performs beam forming for each peer; 544 * if no beam forming done, frame exchange is not 545 * possible. 546 */ 547 struct wil_sta_info { 548 u8 addr[ETH_ALEN]; 549 enum wil_sta_status status; 550 struct wil_net_stats stats; 551 /* Rx BACK */ 552 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 553 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 554 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 555 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 556 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM]; 557 struct wil_tid_crypto_rx group_crypto_rx; 558 u8 aid; /* 1-254; 0 if unknown/not reported */ 559 }; 560 561 enum { 562 fw_recovery_idle = 0, 563 fw_recovery_pending = 1, 564 fw_recovery_running = 2, 565 }; 566 567 enum { 568 hw_capability_last 569 }; 570 571 struct wil_probe_client_req { 572 struct list_head list; 573 u64 cookie; 574 u8 cid; 575 }; 576 577 struct pmc_ctx { 578 /* alloc, free, and read operations must own the lock */ 579 struct mutex lock; 580 struct vring_tx_desc *pring_va; 581 dma_addr_t pring_pa; 582 struct desc_alloc_info *descriptors; 583 int last_cmd_status; 584 int num_descriptors; 585 int descriptor_size; 586 }; 587 588 struct wil_halp { 589 struct mutex lock; /* protect halp ref_cnt */ 590 unsigned int ref_cnt; 591 struct completion comp; 592 }; 593 594 struct wil_blob_wrapper { 595 struct wil6210_priv *wil; 596 struct debugfs_blob_wrapper blob; 597 }; 598 599 #define WIL_LED_MAX_ID (2) 600 #define WIL_LED_INVALID_ID (0xF) 601 #define WIL_LED_BLINK_ON_SLOW_MS (300) 602 #define WIL_LED_BLINK_OFF_SLOW_MS (300) 603 #define WIL_LED_BLINK_ON_MED_MS (200) 604 #define WIL_LED_BLINK_OFF_MED_MS (200) 605 #define WIL_LED_BLINK_ON_FAST_MS (100) 606 #define WIL_LED_BLINK_OFF_FAST_MS (100) 607 enum { 608 WIL_LED_TIME_SLOW = 0, 609 WIL_LED_TIME_MED, 610 WIL_LED_TIME_FAST, 611 WIL_LED_TIME_LAST, 612 }; 613 614 struct blink_on_off_time { 615 u32 on_ms; 616 u32 off_ms; 617 }; 618 619 struct wil_debugfs_iomem_data { 620 void *offset; 621 struct wil6210_priv *wil; 622 }; 623 624 struct wil_debugfs_data { 625 struct wil_debugfs_iomem_data *data_arr; 626 int iomem_data_count; 627 }; 628 629 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST]; 630 extern u8 led_id; 631 extern u8 led_polarity; 632 633 struct wil6210_priv { 634 struct pci_dev *pdev; 635 u32 bar_size; 636 struct wireless_dev *wdev; 637 void __iomem *csr; 638 DECLARE_BITMAP(status, wil_status_last); 639 u8 fw_version[ETHTOOL_FWVERS_LEN]; 640 u32 hw_version; 641 u8 chip_revision; 642 const char *hw_name; 643 const char *wil_fw_name; 644 DECLARE_BITMAP(hw_capabilities, hw_capability_last); 645 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 646 u8 n_mids; /* number of additional MIDs as reported by FW */ 647 u32 recovery_count; /* num of FW recovery attempts in a short time */ 648 u32 recovery_state; /* FW recovery state machine */ 649 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 650 wait_queue_head_t wq; /* for all wait_event() use */ 651 /* profile */ 652 u32 monitor_flags; 653 u32 privacy; /* secure connection? */ 654 u8 hidden_ssid; /* relevant in AP mode */ 655 u16 channel; /* relevant in AP mode */ 656 int sinfo_gen; 657 u32 ap_isolate; /* no intra-BSS communication */ 658 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */ 659 int locally_generated_disc; /* relevant in STA mode */ 660 /* interrupt moderation */ 661 u32 tx_max_burst_duration; 662 u32 tx_interframe_timeout; 663 u32 rx_max_burst_duration; 664 u32 rx_interframe_timeout; 665 /* cached ISR registers */ 666 u32 isr_misc; 667 /* mailbox related */ 668 struct mutex wmi_mutex; 669 struct wil6210_mbox_ctl mbox_ctl; 670 struct completion wmi_ready; 671 struct completion wmi_call; 672 u16 wmi_seq; 673 u16 reply_id; /**< wait for this WMI event */ 674 void *reply_buf; 675 u16 reply_size; 676 struct workqueue_struct *wmi_wq; /* for deferred calls */ 677 struct work_struct wmi_event_worker; 678 struct workqueue_struct *wq_service; 679 struct work_struct disconnect_worker; 680 struct work_struct fw_error_worker; /* for FW error recovery */ 681 struct timer_list connect_timer; 682 struct timer_list scan_timer; /* detect scan timeout */ 683 struct list_head pending_wmi_ev; 684 /* 685 * protect pending_wmi_ev 686 * - fill in IRQ from wil6210_irq_misc, 687 * - consumed in thread by wmi_event_worker 688 */ 689 spinlock_t wmi_ev_lock; 690 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */ 691 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */ 692 struct napi_struct napi_rx; 693 struct napi_struct napi_tx; 694 /* keep alive */ 695 struct list_head probe_client_pending; 696 struct mutex probe_client_mutex; /* protect @probe_client_pending */ 697 struct work_struct probe_client_worker; 698 /* DMA related */ 699 struct vring vring_rx; 700 unsigned int rx_buf_len; 701 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 702 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 703 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 704 struct wil_sta_info sta[WIL6210_MAX_CID]; 705 int bcast_vring; 706 u32 vring_idle_trsh; /* HW fetches up to 16 descriptors at once */ 707 bool use_extended_dma_addr; /* indicates whether we are using 48 bits */ 708 /* scan */ 709 struct cfg80211_scan_request *scan_request; 710 711 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 712 /* statistics */ 713 atomic_t isr_count_rx, isr_count_tx; 714 /* debugfs */ 715 struct dentry *debug; 716 struct wil_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)]; 717 u8 discovery_mode; 718 u8 abft_len; 719 u8 wakeup_trigger; 720 struct wil_suspend_stats suspend_stats; 721 struct wil_debugfs_data dbg_data; 722 723 void *platform_handle; 724 struct wil_platform_ops platform_ops; 725 bool keep_radio_on_during_sleep; 726 727 struct pmc_ctx pmc; 728 729 bool pbss; 730 731 struct wil_p2p_info p2p; 732 733 /* P2P_DEVICE vif */ 734 struct wireless_dev *p2p_wdev; 735 struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */ 736 struct wireless_dev *radio_wdev; 737 738 /* High Access Latency Policy voting */ 739 struct wil_halp halp; 740 741 enum wmi_ps_profile_type ps_profile; 742 743 int fw_calib_result; 744 745 #ifdef CONFIG_PM 746 struct notifier_block pm_notify; 747 #endif /* CONFIG_PM */ 748 749 bool suspend_resp_rcvd; 750 bool suspend_resp_comp; 751 u32 bus_request_kbps; 752 u32 bus_request_kbps_pre_suspend; 753 }; 754 755 #define wil_to_wiphy(i) (i->wdev->wiphy) 756 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 757 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 758 #define wil_to_wdev(i) (i->wdev) 759 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 760 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 761 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 762 763 __printf(2, 3) 764 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 765 __printf(2, 3) 766 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...); 767 __printf(2, 3) 768 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...); 769 __printf(2, 3) 770 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...); 771 __printf(2, 3) 772 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...); 773 #define wil_dbg(wil, fmt, arg...) do { \ 774 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 775 wil_dbg_trace(wil, fmt, ##arg); \ 776 } while (0) 777 778 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 779 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 780 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 781 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 782 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg) 783 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg) 784 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg) 785 #define wil_err_ratelimited(wil, fmt, arg...) \ 786 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg) 787 788 /* target operations */ 789 /* register read */ 790 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg) 791 { 792 return readl(wil->csr + HOSTADDR(reg)); 793 } 794 795 /* register write. wmb() to make sure it is completed */ 796 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val) 797 { 798 writel(val, wil->csr + HOSTADDR(reg)); 799 wmb(); /* wait for write to propagate to the HW */ 800 } 801 802 /* register set = read, OR, write */ 803 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val) 804 { 805 wil_w(wil, reg, wil_r(wil, reg) | val); 806 } 807 808 /* register clear = read, AND with inverted, write */ 809 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val) 810 { 811 wil_w(wil, reg, wil_r(wil, reg) & ~val); 812 } 813 814 #if defined(CONFIG_DYNAMIC_DEBUG) 815 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 816 groupsize, buf, len, ascii) \ 817 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 818 prefix_type, rowsize, \ 819 groupsize, buf, len, ascii) 820 821 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 822 groupsize, buf, len, ascii) \ 823 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 824 prefix_type, rowsize, \ 825 groupsize, buf, len, ascii) 826 827 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \ 828 groupsize, buf, len, ascii) \ 829 print_hex_dump_debug("DBG[MISC]" prefix_str,\ 830 prefix_type, rowsize, \ 831 groupsize, buf, len, ascii) 832 #else /* defined(CONFIG_DYNAMIC_DEBUG) */ 833 static inline 834 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 835 int groupsize, const void *buf, size_t len, bool ascii) 836 { 837 } 838 839 static inline 840 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 841 int groupsize, const void *buf, size_t len, bool ascii) 842 { 843 } 844 845 static inline 846 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize, 847 int groupsize, const void *buf, size_t len, bool ascii) 848 { 849 } 850 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 851 852 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 853 size_t count); 854 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 855 size_t count); 856 857 void *wil_if_alloc(struct device *dev); 858 void wil_if_free(struct wil6210_priv *wil); 859 int wil_if_add(struct wil6210_priv *wil); 860 void wil_if_remove(struct wil6210_priv *wil); 861 int wil_priv_init(struct wil6210_priv *wil); 862 void wil_priv_deinit(struct wil6210_priv *wil); 863 int wil_ps_update(struct wil6210_priv *wil, 864 enum wmi_ps_profile_type ps_profile); 865 int wil_reset(struct wil6210_priv *wil, bool no_fw); 866 void wil_fw_error_recovery(struct wil6210_priv *wil); 867 void wil_set_recovery_state(struct wil6210_priv *wil, int state); 868 bool wil_is_recovery_blocked(struct wil6210_priv *wil); 869 int wil_up(struct wil6210_priv *wil); 870 int __wil_up(struct wil6210_priv *wil); 871 int wil_down(struct wil6210_priv *wil); 872 int __wil_down(struct wil6210_priv *wil); 873 void wil_refresh_fw_capabilities(struct wil6210_priv *wil); 874 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 875 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 876 void wil_set_ethtoolops(struct net_device *ndev); 877 878 void __iomem *wmi_buffer_block(struct wil6210_priv *wil, __le32 ptr, u32 size); 879 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 880 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 881 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 882 struct wil6210_mbox_hdr *hdr); 883 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 884 void wmi_recv_cmd(struct wil6210_priv *wil); 885 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 886 u16 reply_id, void *reply, u8 reply_size, int to_msec); 887 void wmi_event_worker(struct work_struct *work); 888 void wmi_event_flush(struct wil6210_priv *wil); 889 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 890 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 891 int wmi_set_channel(struct wil6210_priv *wil, int channel); 892 int wmi_get_channel(struct wil6210_priv *wil, int *channel); 893 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 894 const void *mac_addr, int key_usage); 895 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 896 const void *mac_addr, int key_len, const void *key, 897 int key_usage); 898 int wmi_echo(struct wil6210_priv *wil); 899 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 900 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 901 int wmi_rxon(struct wil6210_priv *wil, bool on); 902 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 903 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, 904 u16 reason, bool full_disconnect, bool del_sta); 905 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout); 906 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason); 907 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason); 908 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token, 909 u16 status, bool amsdu, u16 agg_wsize, u16 timeout); 910 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil, 911 enum wmi_ps_profile_type ps_profile); 912 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short); 913 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short); 914 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid); 915 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid, 916 u8 dialog_token, __le16 ba_param_set, 917 __le16 ba_timeout, __le16 ba_seq_ctrl); 918 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize); 919 920 void wil6210_clear_irq(struct wil6210_priv *wil); 921 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi); 922 void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 923 void wil_mask_irq(struct wil6210_priv *wil); 924 void wil_unmask_irq(struct wil6210_priv *wil); 925 void wil_configure_interrupt_moderation(struct wil6210_priv *wil); 926 void wil_disable_irq(struct wil6210_priv *wil); 927 void wil_enable_irq(struct wil6210_priv *wil); 928 void wil6210_mask_halp(struct wil6210_priv *wil); 929 930 /* P2P */ 931 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request); 932 void wil_p2p_discovery_timer_fn(struct timer_list *t); 933 int wil_p2p_search(struct wil6210_priv *wil, 934 struct cfg80211_scan_request *request); 935 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev, 936 unsigned int duration, struct ieee80211_channel *chan, 937 u64 *cookie); 938 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil); 939 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie); 940 void wil_p2p_listen_expired(struct work_struct *work); 941 void wil_p2p_search_expired(struct work_struct *work); 942 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil); 943 void wil_p2p_delayed_listen_work(struct work_struct *work); 944 945 /* WMI for P2P */ 946 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi); 947 int wmi_start_listen(struct wil6210_priv *wil); 948 int wmi_start_search(struct wil6210_priv *wil); 949 int wmi_stop_discovery(struct wil6210_priv *wil); 950 951 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 952 struct cfg80211_mgmt_tx_params *params, 953 u64 *cookie); 954 955 #if defined(CONFIG_WIL6210_DEBUGFS) 956 int wil6210_debugfs_init(struct wil6210_priv *wil); 957 void wil6210_debugfs_remove(struct wil6210_priv *wil); 958 #else 959 static inline int wil6210_debugfs_init(struct wil6210_priv *wil) { return 0; } 960 static inline void wil6210_debugfs_remove(struct wil6210_priv *wil) {} 961 #endif 962 963 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid, 964 struct station_info *sinfo); 965 966 struct wireless_dev *wil_cfg80211_init(struct device *dev); 967 void wil_wdev_free(struct wil6210_priv *wil); 968 void wil_p2p_wdev_free(struct wil6210_priv *wil); 969 970 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 971 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, 972 u8 chan, u8 hidden_ssid, u8 is_go); 973 int wmi_pcp_stop(struct wil6210_priv *wil); 974 int wmi_led_cfg(struct wil6210_priv *wil, bool enable); 975 int wmi_abort_scan(struct wil6210_priv *wil); 976 void wil_abort_scan(struct wil6210_priv *wil, bool sync); 977 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps); 978 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid, 979 u16 reason_code, bool from_event); 980 void wil_probe_client_flush(struct wil6210_priv *wil); 981 void wil_probe_client_worker(struct work_struct *work); 982 983 int wil_rx_init(struct wil6210_priv *wil, u16 size); 984 void wil_rx_fini(struct wil6210_priv *wil); 985 986 /* TX API */ 987 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 988 int cid, int tid); 989 void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 990 int wil_tx_init(struct wil6210_priv *wil, int cid); 991 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size); 992 int wil_bcast_init(struct wil6210_priv *wil); 993 void wil_bcast_fini(struct wil6210_priv *wil); 994 995 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 996 bool should_stop); 997 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 998 bool check_stop); 999 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 1000 int wil_tx_complete(struct wil6210_priv *wil, int ringid); 1001 void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 1002 1003 /* RX API */ 1004 void wil_rx_handle(struct wil6210_priv *wil, int *quota); 1005 void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 1006 1007 int wil_iftype_nl2wmi(enum nl80211_iftype type); 1008 1009 int wil_request_firmware(struct wil6210_priv *wil, const char *name, 1010 bool load); 1011 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name); 1012 1013 void wil_pm_runtime_allow(struct wil6210_priv *wil); 1014 void wil_pm_runtime_forbid(struct wil6210_priv *wil); 1015 int wil_pm_runtime_get(struct wil6210_priv *wil); 1016 void wil_pm_runtime_put(struct wil6210_priv *wil); 1017 1018 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime); 1019 int wil_suspend(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on); 1020 int wil_resume(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on); 1021 bool wil_is_wmi_idle(struct wil6210_priv *wil); 1022 int wmi_resume(struct wil6210_priv *wil); 1023 int wmi_suspend(struct wil6210_priv *wil); 1024 bool wil_is_tx_idle(struct wil6210_priv *wil); 1025 bool wil_is_rx_idle(struct wil6210_priv *wil); 1026 1027 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size); 1028 void wil_fw_core_dump(struct wil6210_priv *wil); 1029 1030 void wil_halp_vote(struct wil6210_priv *wil); 1031 void wil_halp_unvote(struct wil6210_priv *wil); 1032 void wil6210_set_halp(struct wil6210_priv *wil); 1033 void wil6210_clear_halp(struct wil6210_priv *wil); 1034 1035 #endif /* __WIL6210_H__ */ 1036