1 /* 2 * Copyright (c) 2012-2015 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/etherdevice.h> 18 #include <net/ieee80211_radiotap.h> 19 #include <linux/if_arp.h> 20 #include <linux/moduleparam.h> 21 #include <linux/ip.h> 22 #include <linux/ipv6.h> 23 #include <net/ipv6.h> 24 #include <linux/prefetch.h> 25 26 #include "wil6210.h" 27 #include "wmi.h" 28 #include "txrx.h" 29 #include "trace.h" 30 31 static bool rtap_include_phy_info; 32 module_param(rtap_include_phy_info, bool, S_IRUGO); 33 MODULE_PARM_DESC(rtap_include_phy_info, 34 " Include PHY info in the radiotap header, default - no"); 35 36 bool rx_align_2; 37 module_param(rx_align_2, bool, S_IRUGO); 38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); 39 40 static inline uint wil_rx_snaplen(void) 41 { 42 return rx_align_2 ? 6 : 0; 43 } 44 45 static inline int wil_vring_is_empty(struct vring *vring) 46 { 47 return vring->swhead == vring->swtail; 48 } 49 50 static inline u32 wil_vring_next_tail(struct vring *vring) 51 { 52 return (vring->swtail + 1) % vring->size; 53 } 54 55 static inline void wil_vring_advance_head(struct vring *vring, int n) 56 { 57 vring->swhead = (vring->swhead + n) % vring->size; 58 } 59 60 static inline int wil_vring_is_full(struct vring *vring) 61 { 62 return wil_vring_next_tail(vring) == vring->swhead; 63 } 64 65 /* Used space in Tx Vring */ 66 static inline int wil_vring_used_tx(struct vring *vring) 67 { 68 u32 swhead = vring->swhead; 69 u32 swtail = vring->swtail; 70 return (vring->size + swhead - swtail) % vring->size; 71 } 72 73 /* Available space in Tx Vring */ 74 static inline int wil_vring_avail_tx(struct vring *vring) 75 { 76 return vring->size - wil_vring_used_tx(vring) - 1; 77 } 78 79 /* wil_vring_wmark_low - low watermark for available descriptor space */ 80 static inline int wil_vring_wmark_low(struct vring *vring) 81 { 82 return vring->size/8; 83 } 84 85 /* wil_vring_wmark_high - high watermark for available descriptor space */ 86 static inline int wil_vring_wmark_high(struct vring *vring) 87 { 88 return vring->size/4; 89 } 90 91 /* wil_val_in_range - check if value in [min,max) */ 92 static inline bool wil_val_in_range(int val, int min, int max) 93 { 94 return val >= min && val < max; 95 } 96 97 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) 98 { 99 struct device *dev = wil_to_dev(wil); 100 size_t sz = vring->size * sizeof(vring->va[0]); 101 uint i; 102 103 wil_dbg_misc(wil, "%s()\n", __func__); 104 105 BUILD_BUG_ON(sizeof(vring->va[0]) != 32); 106 107 vring->swhead = 0; 108 vring->swtail = 0; 109 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); 110 if (!vring->ctx) { 111 vring->va = NULL; 112 return -ENOMEM; 113 } 114 /* vring->va should be aligned on its size rounded up to power of 2 115 * This is granted by the dma_alloc_coherent 116 */ 117 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); 118 if (!vring->va) { 119 kfree(vring->ctx); 120 vring->ctx = NULL; 121 return -ENOMEM; 122 } 123 /* initially, all descriptors are SW owned 124 * For Tx and Rx, ownership bit is at the same location, thus 125 * we can use any 126 */ 127 for (i = 0; i < vring->size; i++) { 128 volatile struct vring_tx_desc *_d = &vring->va[i].tx; 129 130 _d->dma.status = TX_DMA_STATUS_DU; 131 } 132 133 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, 134 vring->va, &vring->pa, vring->ctx); 135 136 return 0; 137 } 138 139 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, 140 struct wil_ctx *ctx) 141 { 142 dma_addr_t pa = wil_desc_addr(&d->dma.addr); 143 u16 dmalen = le16_to_cpu(d->dma.length); 144 145 switch (ctx->mapped_as) { 146 case wil_mapped_as_single: 147 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); 148 break; 149 case wil_mapped_as_page: 150 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); 151 break; 152 default: 153 break; 154 } 155 } 156 157 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, 158 int tx) 159 { 160 struct device *dev = wil_to_dev(wil); 161 size_t sz = vring->size * sizeof(vring->va[0]); 162 163 if (tx) { 164 int vring_index = vring - wil->vring_tx; 165 166 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", 167 vring_index, vring->size, vring->va, 168 &vring->pa, vring->ctx); 169 } else { 170 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", 171 vring->size, vring->va, 172 &vring->pa, vring->ctx); 173 } 174 175 while (!wil_vring_is_empty(vring)) { 176 dma_addr_t pa; 177 u16 dmalen; 178 struct wil_ctx *ctx; 179 180 if (tx) { 181 struct vring_tx_desc dd, *d = ⅆ 182 volatile struct vring_tx_desc *_d = 183 &vring->va[vring->swtail].tx; 184 185 ctx = &vring->ctx[vring->swtail]; 186 *d = *_d; 187 wil_txdesc_unmap(dev, d, ctx); 188 if (ctx->skb) 189 dev_kfree_skb_any(ctx->skb); 190 vring->swtail = wil_vring_next_tail(vring); 191 } else { /* rx */ 192 struct vring_rx_desc dd, *d = ⅆ 193 volatile struct vring_rx_desc *_d = 194 &vring->va[vring->swhead].rx; 195 196 ctx = &vring->ctx[vring->swhead]; 197 *d = *_d; 198 pa = wil_desc_addr(&d->dma.addr); 199 dmalen = le16_to_cpu(d->dma.length); 200 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); 201 kfree_skb(ctx->skb); 202 wil_vring_advance_head(vring, 1); 203 } 204 } 205 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); 206 kfree(vring->ctx); 207 vring->pa = 0; 208 vring->va = NULL; 209 vring->ctx = NULL; 210 } 211 212 /** 213 * Allocate one skb for Rx VRING 214 * 215 * Safe to call from IRQ 216 */ 217 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, 218 u32 i, int headroom) 219 { 220 struct device *dev = wil_to_dev(wil); 221 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); 222 struct vring_rx_desc dd, *d = ⅆ 223 volatile struct vring_rx_desc *_d = &vring->va[i].rx; 224 dma_addr_t pa; 225 struct sk_buff *skb = dev_alloc_skb(sz + headroom); 226 227 if (unlikely(!skb)) 228 return -ENOMEM; 229 230 skb_reserve(skb, headroom); 231 skb_put(skb, sz); 232 233 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); 234 if (unlikely(dma_mapping_error(dev, pa))) { 235 kfree_skb(skb); 236 return -ENOMEM; 237 } 238 239 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; 240 wil_desc_addr_set(&d->dma.addr, pa); 241 /* ip_length don't care */ 242 /* b11 don't care */ 243 /* error don't care */ 244 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 245 d->dma.length = cpu_to_le16(sz); 246 *_d = *d; 247 vring->ctx[i].skb = skb; 248 249 return 0; 250 } 251 252 /** 253 * Adds radiotap header 254 * 255 * Any error indicated as "Bad FCS" 256 * 257 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: 258 * - Rx descriptor: 32 bytes 259 * - Phy info 260 */ 261 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, 262 struct sk_buff *skb) 263 { 264 struct wireless_dev *wdev = wil->wdev; 265 struct wil6210_rtap { 266 struct ieee80211_radiotap_header rthdr; 267 /* fields should be in the order of bits in rthdr.it_present */ 268 /* flags */ 269 u8 flags; 270 /* channel */ 271 __le16 chnl_freq __aligned(2); 272 __le16 chnl_flags; 273 /* MCS */ 274 u8 mcs_present; 275 u8 mcs_flags; 276 u8 mcs_index; 277 } __packed; 278 struct wil6210_rtap_vendor { 279 struct wil6210_rtap rtap; 280 /* vendor */ 281 u8 vendor_oui[3] __aligned(2); 282 u8 vendor_ns; 283 __le16 vendor_skip; 284 u8 vendor_data[0]; 285 } __packed; 286 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 287 struct wil6210_rtap_vendor *rtap_vendor; 288 int rtap_len = sizeof(struct wil6210_rtap); 289 int phy_length = 0; /* phy info header size, bytes */ 290 static char phy_data[128]; 291 struct ieee80211_channel *ch = wdev->preset_chandef.chan; 292 293 if (rtap_include_phy_info) { 294 rtap_len = sizeof(*rtap_vendor) + sizeof(*d); 295 /* calculate additional length */ 296 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { 297 /** 298 * PHY info starts from 8-byte boundary 299 * there are 8-byte lines, last line may be partially 300 * written (HW bug), thus FW configures for last line 301 * to be excessive. Driver skips this last line. 302 */ 303 int len = min_t(int, 8 + sizeof(phy_data), 304 wil_rxdesc_phy_length(d)); 305 306 if (len > 8) { 307 void *p = skb_tail_pointer(skb); 308 void *pa = PTR_ALIGN(p, 8); 309 310 if (skb_tailroom(skb) >= len + (pa - p)) { 311 phy_length = len - 8; 312 memcpy(phy_data, pa, phy_length); 313 } 314 } 315 } 316 rtap_len += phy_length; 317 } 318 319 if (skb_headroom(skb) < rtap_len && 320 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { 321 wil_err(wil, "Unable to expand headrom to %d\n", rtap_len); 322 return; 323 } 324 325 rtap_vendor = (void *)skb_push(skb, rtap_len); 326 memset(rtap_vendor, 0, rtap_len); 327 328 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; 329 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); 330 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( 331 (1 << IEEE80211_RADIOTAP_FLAGS) | 332 (1 << IEEE80211_RADIOTAP_CHANNEL) | 333 (1 << IEEE80211_RADIOTAP_MCS)); 334 if (d->dma.status & RX_DMA_STATUS_ERROR) 335 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; 336 337 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); 338 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); 339 340 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; 341 rtap_vendor->rtap.mcs_flags = 0; 342 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); 343 344 if (rtap_include_phy_info) { 345 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << 346 IEEE80211_RADIOTAP_VENDOR_NAMESPACE); 347 /* OUI for Wilocity 04:ce:14 */ 348 rtap_vendor->vendor_oui[0] = 0x04; 349 rtap_vendor->vendor_oui[1] = 0xce; 350 rtap_vendor->vendor_oui[2] = 0x14; 351 rtap_vendor->vendor_ns = 1; 352 /* Rx descriptor + PHY data */ 353 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + 354 phy_length); 355 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); 356 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, 357 phy_length); 358 } 359 } 360 361 /** 362 * reap 1 frame from @swhead 363 * 364 * Rx descriptor copied to skb->cb 365 * 366 * Safe to call from IRQ 367 */ 368 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, 369 struct vring *vring) 370 { 371 struct device *dev = wil_to_dev(wil); 372 struct net_device *ndev = wil_to_ndev(wil); 373 volatile struct vring_rx_desc *_d; 374 struct vring_rx_desc *d; 375 struct sk_buff *skb; 376 dma_addr_t pa; 377 unsigned int snaplen = wil_rx_snaplen(); 378 unsigned int sz = mtu_max + ETH_HLEN + snaplen; 379 u16 dmalen; 380 u8 ftype; 381 int cid; 382 int i = (int)vring->swhead; 383 struct wil_net_stats *stats; 384 385 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); 386 387 if (unlikely(wil_vring_is_empty(vring))) 388 return NULL; 389 390 _d = &vring->va[i].rx; 391 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { 392 /* it is not error, we just reached end of Rx done area */ 393 return NULL; 394 } 395 396 skb = vring->ctx[i].skb; 397 vring->ctx[i].skb = NULL; 398 wil_vring_advance_head(vring, 1); 399 if (!skb) { 400 wil_err(wil, "No Rx skb at [%d]\n", i); 401 return NULL; 402 } 403 d = wil_skb_rxdesc(skb); 404 *d = *_d; 405 pa = wil_desc_addr(&d->dma.addr); 406 407 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); 408 dmalen = le16_to_cpu(d->dma.length); 409 410 trace_wil6210_rx(i, d); 411 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); 412 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_NONE, 32, 4, 413 (const void *)d, sizeof(*d), false); 414 415 if (unlikely(dmalen > sz)) { 416 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); 417 kfree_skb(skb); 418 return NULL; 419 } 420 skb_trim(skb, dmalen); 421 422 prefetch(skb->data); 423 424 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 425 skb->data, skb_headlen(skb), false); 426 427 cid = wil_rxdesc_cid(d); 428 stats = &wil->sta[cid].stats; 429 stats->last_mcs_rx = wil_rxdesc_mcs(d); 430 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) 431 stats->rx_per_mcs[stats->last_mcs_rx]++; 432 433 /* use radiotap header only if required */ 434 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) 435 wil_rx_add_radiotap_header(wil, skb); 436 437 /* no extra checks if in sniffer mode */ 438 if (ndev->type != ARPHRD_ETHER) 439 return skb; 440 /* 441 * Non-data frames may be delivered through Rx DMA channel (ex: BAR) 442 * Driver should recognize it by frame type, that is found 443 * in Rx descriptor. If type is not data, it is 802.11 frame as is 444 */ 445 ftype = wil_rxdesc_ftype(d) << 2; 446 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { 447 wil_dbg_txrx(wil, "Non-data frame ftype 0x%08x\n", ftype); 448 /* TODO: process it */ 449 kfree_skb(skb); 450 return NULL; 451 } 452 453 if (unlikely(skb->len < ETH_HLEN + snaplen)) { 454 wil_err(wil, "Short frame, len = %d\n", skb->len); 455 /* TODO: process it (i.e. BAR) */ 456 kfree_skb(skb); 457 return NULL; 458 } 459 460 /* L4 IDENT is on when HW calculated checksum, check status 461 * and in case of error drop the packet 462 * higher stack layers will handle retransmission (if required) 463 */ 464 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { 465 /* L4 protocol identified, csum calculated */ 466 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) 467 skb->ip_summed = CHECKSUM_UNNECESSARY; 468 /* If HW reports bad checksum, let IP stack re-check it 469 * For example, HW don't understand Microsoft IP stack that 470 * mis-calculates TCP checksum - if it should be 0x0, 471 * it writes 0xffff in violation of RFC 1624 472 */ 473 } 474 475 if (snaplen) { 476 /* Packet layout 477 * +-------+-------+---------+------------+------+ 478 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | 479 * +-------+-------+---------+------------+------+ 480 * Need to remove SNAP, shifting SA and DA forward 481 */ 482 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); 483 skb_pull(skb, snaplen); 484 } 485 486 return skb; 487 } 488 489 /** 490 * allocate and fill up to @count buffers in rx ring 491 * buffers posted at @swtail 492 */ 493 static int wil_rx_refill(struct wil6210_priv *wil, int count) 494 { 495 struct net_device *ndev = wil_to_ndev(wil); 496 struct vring *v = &wil->vring_rx; 497 u32 next_tail; 498 int rc = 0; 499 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? 500 WIL6210_RTAP_SIZE : 0; 501 502 for (; next_tail = wil_vring_next_tail(v), 503 (next_tail != v->swhead) && (count-- > 0); 504 v->swtail = next_tail) { 505 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); 506 if (unlikely(rc)) { 507 wil_err(wil, "Error %d in wil_rx_refill[%d]\n", 508 rc, v->swtail); 509 break; 510 } 511 } 512 wil_w(wil, v->hwtail, v->swtail); 513 514 return rc; 515 } 516 517 /* 518 * Pass Rx packet to the netif. Update statistics. 519 * Called in softirq context (NAPI poll). 520 */ 521 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) 522 { 523 gro_result_t rc = GRO_NORMAL; 524 struct wil6210_priv *wil = ndev_to_wil(ndev); 525 struct wireless_dev *wdev = wil_to_wdev(wil); 526 unsigned int len = skb->len; 527 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 528 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ 529 struct ethhdr *eth = (void *)skb->data; 530 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication 531 * is not suitable, need to look at data 532 */ 533 int mcast = is_multicast_ether_addr(eth->h_dest); 534 struct wil_net_stats *stats = &wil->sta[cid].stats; 535 struct sk_buff *xmit_skb = NULL; 536 static const char * const gro_res_str[] = { 537 [GRO_MERGED] = "GRO_MERGED", 538 [GRO_MERGED_FREE] = "GRO_MERGED_FREE", 539 [GRO_HELD] = "GRO_HELD", 540 [GRO_NORMAL] = "GRO_NORMAL", 541 [GRO_DROP] = "GRO_DROP", 542 }; 543 544 if (ndev->features & NETIF_F_RXHASH) 545 /* fake L4 to ensure it won't be re-calculated later 546 * set hash to any non-zero value to activate rps 547 * mechanism, core will be chosen according 548 * to user-level rps configuration. 549 */ 550 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); 551 552 skb_orphan(skb); 553 554 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { 555 if (mcast) { 556 /* send multicast frames both to higher layers in 557 * local net stack and back to the wireless medium 558 */ 559 xmit_skb = skb_copy(skb, GFP_ATOMIC); 560 } else { 561 int xmit_cid = wil_find_cid(wil, eth->h_dest); 562 563 if (xmit_cid >= 0) { 564 /* The destination station is associated to 565 * this AP (in this VLAN), so send the frame 566 * directly to it and do not pass it to local 567 * net stack. 568 */ 569 xmit_skb = skb; 570 skb = NULL; 571 } 572 } 573 } 574 if (xmit_skb) { 575 /* Send to wireless media and increase priority by 256 to 576 * keep the received priority instead of reclassifying 577 * the frame (see cfg80211_classify8021d). 578 */ 579 xmit_skb->dev = ndev; 580 xmit_skb->priority += 256; 581 xmit_skb->protocol = htons(ETH_P_802_3); 582 skb_reset_network_header(xmit_skb); 583 skb_reset_mac_header(xmit_skb); 584 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); 585 dev_queue_xmit(xmit_skb); 586 } 587 588 if (skb) { /* deliver to local stack */ 589 590 skb->protocol = eth_type_trans(skb, ndev); 591 rc = napi_gro_receive(&wil->napi_rx, skb); 592 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", 593 len, gro_res_str[rc]); 594 } 595 /* statistics. rc set to GRO_NORMAL for AP bridging */ 596 if (unlikely(rc == GRO_DROP)) { 597 ndev->stats.rx_dropped++; 598 stats->rx_dropped++; 599 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); 600 } else { 601 ndev->stats.rx_packets++; 602 stats->rx_packets++; 603 ndev->stats.rx_bytes += len; 604 stats->rx_bytes += len; 605 if (mcast) 606 ndev->stats.multicast++; 607 } 608 } 609 610 /** 611 * Proceed all completed skb's from Rx VRING 612 * 613 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled 614 */ 615 void wil_rx_handle(struct wil6210_priv *wil, int *quota) 616 { 617 struct net_device *ndev = wil_to_ndev(wil); 618 struct vring *v = &wil->vring_rx; 619 struct sk_buff *skb; 620 621 if (unlikely(!v->va)) { 622 wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); 623 return; 624 } 625 wil_dbg_txrx(wil, "%s()\n", __func__); 626 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { 627 (*quota)--; 628 629 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { 630 skb->dev = ndev; 631 skb_reset_mac_header(skb); 632 skb->ip_summed = CHECKSUM_UNNECESSARY; 633 skb->pkt_type = PACKET_OTHERHOST; 634 skb->protocol = htons(ETH_P_802_2); 635 wil_netif_rx_any(skb, ndev); 636 } else { 637 wil_rx_reorder(wil, skb); 638 } 639 } 640 wil_rx_refill(wil, v->size); 641 } 642 643 int wil_rx_init(struct wil6210_priv *wil, u16 size) 644 { 645 struct vring *vring = &wil->vring_rx; 646 int rc; 647 648 wil_dbg_misc(wil, "%s()\n", __func__); 649 650 if (vring->va) { 651 wil_err(wil, "Rx ring already allocated\n"); 652 return -EINVAL; 653 } 654 655 vring->size = size; 656 rc = wil_vring_alloc(wil, vring); 657 if (rc) 658 return rc; 659 660 rc = wmi_rx_chain_add(wil, vring); 661 if (rc) 662 goto err_free; 663 664 rc = wil_rx_refill(wil, vring->size); 665 if (rc) 666 goto err_free; 667 668 return 0; 669 err_free: 670 wil_vring_free(wil, vring, 0); 671 672 return rc; 673 } 674 675 void wil_rx_fini(struct wil6210_priv *wil) 676 { 677 struct vring *vring = &wil->vring_rx; 678 679 wil_dbg_misc(wil, "%s()\n", __func__); 680 681 if (vring->va) 682 wil_vring_free(wil, vring, 0); 683 } 684 685 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 686 int cid, int tid) 687 { 688 int rc; 689 struct wmi_vring_cfg_cmd cmd = { 690 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 691 .vring_cfg = { 692 .tx_sw_ring = { 693 .max_mpdu_size = 694 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 695 .ring_size = cpu_to_le16(size), 696 }, 697 .ringid = id, 698 .cidxtid = mk_cidxtid(cid, tid), 699 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 700 .mac_ctrl = 0, 701 .to_resolution = 0, 702 .agg_max_wsize = 0, 703 .schd_params = { 704 .priority = cpu_to_le16(0), 705 .timeslot_us = cpu_to_le16(0xfff), 706 }, 707 }, 708 }; 709 struct { 710 struct wil6210_mbox_hdr_wmi wmi; 711 struct wmi_vring_cfg_done_event cmd; 712 } __packed reply; 713 struct vring *vring = &wil->vring_tx[id]; 714 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 715 716 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 717 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 718 719 if (vring->va) { 720 wil_err(wil, "Tx ring [%d] already allocated\n", id); 721 rc = -EINVAL; 722 goto out; 723 } 724 725 memset(txdata, 0, sizeof(*txdata)); 726 spin_lock_init(&txdata->lock); 727 vring->size = size; 728 rc = wil_vring_alloc(wil, vring); 729 if (rc) 730 goto out; 731 732 wil->vring2cid_tid[id][0] = cid; 733 wil->vring2cid_tid[id][1] = tid; 734 735 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 736 737 if (!wil->privacy) 738 txdata->dot1x_open = true; 739 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), 740 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 741 if (rc) 742 goto out_free; 743 744 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 745 wil_err(wil, "Tx config failed, status 0x%02x\n", 746 reply.cmd.status); 747 rc = -EINVAL; 748 goto out_free; 749 } 750 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 751 752 txdata->enabled = 1; 753 if (txdata->dot1x_open && (agg_wsize >= 0)) 754 wil_addba_tx_request(wil, id, agg_wsize); 755 756 return 0; 757 out_free: 758 txdata->dot1x_open = false; 759 txdata->enabled = 0; 760 wil_vring_free(wil, vring, 1); 761 out: 762 763 return rc; 764 } 765 766 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) 767 { 768 int rc; 769 struct wmi_bcast_vring_cfg_cmd cmd = { 770 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 771 .vring_cfg = { 772 .tx_sw_ring = { 773 .max_mpdu_size = 774 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 775 .ring_size = cpu_to_le16(size), 776 }, 777 .ringid = id, 778 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 779 }, 780 }; 781 struct { 782 struct wil6210_mbox_hdr_wmi wmi; 783 struct wmi_vring_cfg_done_event cmd; 784 } __packed reply; 785 struct vring *vring = &wil->vring_tx[id]; 786 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 787 788 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 789 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 790 791 if (vring->va) { 792 wil_err(wil, "Tx ring [%d] already allocated\n", id); 793 rc = -EINVAL; 794 goto out; 795 } 796 797 memset(txdata, 0, sizeof(*txdata)); 798 spin_lock_init(&txdata->lock); 799 vring->size = size; 800 rc = wil_vring_alloc(wil, vring); 801 if (rc) 802 goto out; 803 804 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ 805 wil->vring2cid_tid[id][1] = 0; /* TID */ 806 807 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 808 809 if (!wil->privacy) 810 txdata->dot1x_open = true; 811 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), 812 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 813 if (rc) 814 goto out_free; 815 816 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 817 wil_err(wil, "Tx config failed, status 0x%02x\n", 818 reply.cmd.status); 819 rc = -EINVAL; 820 goto out_free; 821 } 822 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 823 824 txdata->enabled = 1; 825 826 return 0; 827 out_free: 828 txdata->enabled = 0; 829 txdata->dot1x_open = false; 830 wil_vring_free(wil, vring, 1); 831 out: 832 833 return rc; 834 } 835 836 void wil_vring_fini_tx(struct wil6210_priv *wil, int id) 837 { 838 struct vring *vring = &wil->vring_tx[id]; 839 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 840 841 WARN_ON(!mutex_is_locked(&wil->mutex)); 842 843 if (!vring->va) 844 return; 845 846 wil_dbg_misc(wil, "%s() id=%d\n", __func__, id); 847 848 spin_lock_bh(&txdata->lock); 849 txdata->dot1x_open = false; 850 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 851 spin_unlock_bh(&txdata->lock); 852 /* make sure NAPI won't touch this vring */ 853 if (test_bit(wil_status_napi_en, wil->status)) 854 napi_synchronize(&wil->napi_tx); 855 856 wil_vring_free(wil, vring, 1); 857 memset(txdata, 0, sizeof(*txdata)); 858 } 859 860 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, 861 struct sk_buff *skb) 862 { 863 int i; 864 struct ethhdr *eth = (void *)skb->data; 865 int cid = wil_find_cid(wil, eth->h_dest); 866 867 if (cid < 0) 868 return NULL; 869 870 /* TODO: fix for multiple TID */ 871 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { 872 if (!wil->vring_tx_data[i].dot1x_open && 873 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 874 continue; 875 if (wil->vring2cid_tid[i][0] == cid) { 876 struct vring *v = &wil->vring_tx[i]; 877 878 wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n", 879 __func__, eth->h_dest, i); 880 if (v->va) { 881 return v; 882 } else { 883 wil_dbg_txrx(wil, "vring[%d] not valid\n", i); 884 return NULL; 885 } 886 } 887 } 888 889 return NULL; 890 } 891 892 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 893 struct sk_buff *skb); 894 895 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, 896 struct sk_buff *skb) 897 { 898 struct vring *v; 899 int i; 900 u8 cid; 901 902 /* In the STA mode, it is expected to have only 1 VRING 903 * for the AP we connected to. 904 * find 1-st vring eligible for this skb and use it. 905 */ 906 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 907 v = &wil->vring_tx[i]; 908 if (!v->va) 909 continue; 910 911 cid = wil->vring2cid_tid[i][0]; 912 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 913 continue; 914 915 if (!wil->vring_tx_data[i].dot1x_open && 916 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 917 continue; 918 919 wil_dbg_txrx(wil, "Tx -> ring %d\n", i); 920 921 return v; 922 } 923 924 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 925 926 return NULL; 927 } 928 929 /* Use one of 2 strategies: 930 * 931 * 1. New (real broadcast): 932 * use dedicated broadcast vring 933 * 2. Old (pseudo-DMS): 934 * Find 1-st vring and return it; 935 * duplicate skb and send it to other active vrings; 936 * in all cases override dest address to unicast peer's address 937 * Use old strategy when new is not supported yet: 938 * - for PBSS 939 */ 940 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, 941 struct sk_buff *skb) 942 { 943 struct vring *v; 944 int i = wil->bcast_vring; 945 946 if (i < 0) 947 return NULL; 948 v = &wil->vring_tx[i]; 949 if (!v->va) 950 return NULL; 951 if (!wil->vring_tx_data[i].dot1x_open && 952 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 953 return NULL; 954 955 return v; 956 } 957 958 static void wil_set_da_for_vring(struct wil6210_priv *wil, 959 struct sk_buff *skb, int vring_index) 960 { 961 struct ethhdr *eth = (void *)skb->data; 962 int cid = wil->vring2cid_tid[vring_index][0]; 963 964 ether_addr_copy(eth->h_dest, wil->sta[cid].addr); 965 } 966 967 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, 968 struct sk_buff *skb) 969 { 970 struct vring *v, *v2; 971 struct sk_buff *skb2; 972 int i; 973 u8 cid; 974 struct ethhdr *eth = (void *)skb->data; 975 char *src = eth->h_source; 976 977 /* find 1-st vring eligible for data */ 978 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 979 v = &wil->vring_tx[i]; 980 if (!v->va) 981 continue; 982 983 cid = wil->vring2cid_tid[i][0]; 984 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 985 continue; 986 if (!wil->vring_tx_data[i].dot1x_open && 987 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 988 continue; 989 990 /* don't Tx back to source when re-routing Rx->Tx at the AP */ 991 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 992 continue; 993 994 goto found; 995 } 996 997 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 998 999 return NULL; 1000 1001 found: 1002 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); 1003 wil_set_da_for_vring(wil, skb, i); 1004 1005 /* find other active vrings and duplicate skb for each */ 1006 for (i++; i < WIL6210_MAX_TX_RINGS; i++) { 1007 v2 = &wil->vring_tx[i]; 1008 if (!v2->va) 1009 continue; 1010 cid = wil->vring2cid_tid[i][0]; 1011 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1012 continue; 1013 if (!wil->vring_tx_data[i].dot1x_open && 1014 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1015 continue; 1016 1017 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1018 continue; 1019 1020 skb2 = skb_copy(skb, GFP_ATOMIC); 1021 if (skb2) { 1022 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); 1023 wil_set_da_for_vring(wil, skb2, i); 1024 wil_tx_vring(wil, v2, skb2); 1025 } else { 1026 wil_err(wil, "skb_copy failed\n"); 1027 } 1028 } 1029 1030 return v; 1031 } 1032 1033 static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil, 1034 struct sk_buff *skb) 1035 { 1036 struct wireless_dev *wdev = wil->wdev; 1037 1038 if (wdev->iftype != NL80211_IFTYPE_AP) 1039 return wil_find_tx_bcast_2(wil, skb); 1040 1041 return wil_find_tx_bcast_1(wil, skb); 1042 } 1043 1044 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, 1045 int vring_index) 1046 { 1047 wil_desc_addr_set(&d->dma.addr, pa); 1048 d->dma.ip_length = 0; 1049 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ 1050 d->dma.b11 = 0/*14 | BIT(7)*/; 1051 d->dma.error = 0; 1052 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 1053 d->dma.length = cpu_to_le16((u16)len); 1054 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); 1055 d->mac.d[0] = 0; 1056 d->mac.d[1] = 0; 1057 d->mac.d[2] = 0; 1058 d->mac.ucode_cmd = 0; 1059 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ 1060 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | 1061 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); 1062 1063 return 0; 1064 } 1065 1066 static inline 1067 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) 1068 { 1069 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); 1070 } 1071 1072 /** 1073 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding 1074 * @skb is used to obtain the protocol and headers length. 1075 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, 1076 * 2 - middle, 3 - last descriptor. 1077 */ 1078 1079 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, 1080 struct sk_buff *skb, 1081 int tso_desc_type, bool is_ipv4, 1082 int tcp_hdr_len, int skb_net_hdr_len) 1083 { 1084 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1085 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; 1086 1087 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1088 /* L4 header len: TCP header length */ 1089 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1090 1091 /* Setup TSO: bit and desc type */ 1092 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | 1093 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); 1094 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); 1095 1096 d->dma.ip_length = skb_net_hdr_len; 1097 /* Enable TCP/UDP checksum */ 1098 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1099 /* Calculate pseudo-header */ 1100 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1101 } 1102 1103 /** 1104 * Sets the descriptor @d up for csum. The corresponding 1105 * @skb is used to obtain the protocol and headers length. 1106 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. 1107 * Note, if d==NULL, the function only returns the protocol result. 1108 * 1109 * It is very similar to previous wil_tx_desc_offload_setup_tso. This 1110 * is "if unrolling" to optimize the critical path. 1111 */ 1112 1113 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, 1114 struct sk_buff *skb){ 1115 int protocol; 1116 1117 if (skb->ip_summed != CHECKSUM_PARTIAL) 1118 return 0; 1119 1120 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1121 1122 switch (skb->protocol) { 1123 case cpu_to_be16(ETH_P_IP): 1124 protocol = ip_hdr(skb)->protocol; 1125 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); 1126 break; 1127 case cpu_to_be16(ETH_P_IPV6): 1128 protocol = ipv6_hdr(skb)->nexthdr; 1129 break; 1130 default: 1131 return -EINVAL; 1132 } 1133 1134 switch (protocol) { 1135 case IPPROTO_TCP: 1136 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1137 /* L4 header len: TCP header length */ 1138 d->dma.d0 |= 1139 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1140 break; 1141 case IPPROTO_UDP: 1142 /* L4 header len: UDP header length */ 1143 d->dma.d0 |= 1144 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1145 break; 1146 default: 1147 return -EINVAL; 1148 } 1149 1150 d->dma.ip_length = skb_network_header_len(skb); 1151 /* Enable TCP/UDP checksum */ 1152 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1153 /* Calculate pseudo-header */ 1154 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1155 1156 return 0; 1157 } 1158 1159 static inline void wil_tx_last_desc(struct vring_tx_desc *d) 1160 { 1161 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | 1162 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | 1163 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1164 } 1165 1166 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) 1167 { 1168 d->dma.d0 |= wil_tso_type_lst << 1169 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; 1170 } 1171 1172 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, 1173 struct sk_buff *skb) 1174 { 1175 struct device *dev = wil_to_dev(wil); 1176 1177 /* point to descriptors in shared memory */ 1178 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, 1179 *_first_desc = NULL; 1180 1181 /* pointers to shadow descriptors */ 1182 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, 1183 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, 1184 *first_desc = &first_desc_mem; 1185 1186 /* pointer to shadow descriptors' context */ 1187 struct wil_ctx *hdr_ctx, *first_ctx = NULL; 1188 1189 int descs_used = 0; /* total number of used descriptors */ 1190 int sg_desc_cnt = 0; /* number of descriptors for current mss*/ 1191 1192 u32 swhead = vring->swhead; 1193 int used, avail = wil_vring_avail_tx(vring); 1194 int nr_frags = skb_shinfo(skb)->nr_frags; 1195 int min_desc_required = nr_frags + 1; 1196 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ 1197 int f, len, hdrlen, headlen; 1198 int vring_index = vring - wil->vring_tx; 1199 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1200 uint i = swhead; 1201 dma_addr_t pa; 1202 const skb_frag_t *frag = NULL; 1203 int rem_data = mss; 1204 int lenmss; 1205 int hdr_compensation_need = true; 1206 int desc_tso_type = wil_tso_type_first; 1207 bool is_ipv4; 1208 int tcp_hdr_len; 1209 int skb_net_hdr_len; 1210 int gso_type; 1211 1212 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1213 __func__, skb->len, vring_index); 1214 1215 if (unlikely(!txdata->enabled)) 1216 return -EINVAL; 1217 1218 /* A typical page 4K is 3-4 payloads, we assume each fragment 1219 * is a full payload, that's how min_desc_required has been 1220 * calculated. In real we might need more or less descriptors, 1221 * this is the initial check only. 1222 */ 1223 if (unlikely(avail < min_desc_required)) { 1224 wil_err_ratelimited(wil, 1225 "TSO: Tx ring[%2d] full. No space for %d fragments\n", 1226 vring_index, min_desc_required); 1227 return -ENOMEM; 1228 } 1229 1230 /* Header Length = MAC header len + IP header len + TCP header len*/ 1231 hdrlen = ETH_HLEN + 1232 (int)skb_network_header_len(skb) + 1233 tcp_hdrlen(skb); 1234 1235 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); 1236 switch (gso_type) { 1237 case SKB_GSO_TCPV4: 1238 /* TCP v4, zero out the IP length and IPv4 checksum fields 1239 * as required by the offloading doc 1240 */ 1241 ip_hdr(skb)->tot_len = 0; 1242 ip_hdr(skb)->check = 0; 1243 is_ipv4 = true; 1244 break; 1245 case SKB_GSO_TCPV6: 1246 /* TCP v6, zero out the payload length */ 1247 ipv6_hdr(skb)->payload_len = 0; 1248 is_ipv4 = false; 1249 break; 1250 default: 1251 /* other than TCPv4 or TCPv6 types are not supported for TSO. 1252 * It is also illegal for both to be set simultaneously 1253 */ 1254 return -EINVAL; 1255 } 1256 1257 if (skb->ip_summed != CHECKSUM_PARTIAL) 1258 return -EINVAL; 1259 1260 /* tcp header length and skb network header length are fixed for all 1261 * packet's descriptors - read then once here 1262 */ 1263 tcp_hdr_len = tcp_hdrlen(skb); 1264 skb_net_hdr_len = skb_network_header_len(skb); 1265 1266 _hdr_desc = &vring->va[i].tx; 1267 1268 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); 1269 if (unlikely(dma_mapping_error(dev, pa))) { 1270 wil_err(wil, "TSO: Skb head DMA map error\n"); 1271 goto err_exit; 1272 } 1273 1274 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); 1275 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, 1276 tcp_hdr_len, skb_net_hdr_len); 1277 wil_tx_last_desc(hdr_desc); 1278 1279 vring->ctx[i].mapped_as = wil_mapped_as_single; 1280 hdr_ctx = &vring->ctx[i]; 1281 1282 descs_used++; 1283 headlen = skb_headlen(skb) - hdrlen; 1284 1285 for (f = headlen ? -1 : 0; f < nr_frags; f++) { 1286 if (headlen) { 1287 len = headlen; 1288 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", 1289 len); 1290 } else { 1291 frag = &skb_shinfo(skb)->frags[f]; 1292 len = frag->size; 1293 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); 1294 } 1295 1296 while (len) { 1297 wil_dbg_txrx(wil, 1298 "TSO: len %d, rem_data %d, descs_used %d\n", 1299 len, rem_data, descs_used); 1300 1301 if (descs_used == avail) { 1302 wil_err(wil, "TSO: ring overflow\n"); 1303 goto dma_error; 1304 } 1305 1306 lenmss = min_t(int, rem_data, len); 1307 i = (swhead + descs_used) % vring->size; 1308 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); 1309 1310 if (!headlen) { 1311 pa = skb_frag_dma_map(dev, frag, 1312 frag->size - len, lenmss, 1313 DMA_TO_DEVICE); 1314 vring->ctx[i].mapped_as = wil_mapped_as_page; 1315 } else { 1316 pa = dma_map_single(dev, 1317 skb->data + 1318 skb_headlen(skb) - headlen, 1319 lenmss, 1320 DMA_TO_DEVICE); 1321 vring->ctx[i].mapped_as = wil_mapped_as_single; 1322 headlen -= lenmss; 1323 } 1324 1325 if (unlikely(dma_mapping_error(dev, pa))) 1326 goto dma_error; 1327 1328 _desc = &vring->va[i].tx; 1329 1330 if (!_first_desc) { 1331 _first_desc = _desc; 1332 first_ctx = &vring->ctx[i]; 1333 d = first_desc; 1334 } else { 1335 d = &desc_mem; 1336 } 1337 1338 wil_tx_desc_map(d, pa, lenmss, vring_index); 1339 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, 1340 is_ipv4, tcp_hdr_len, 1341 skb_net_hdr_len); 1342 1343 /* use tso_type_first only once */ 1344 desc_tso_type = wil_tso_type_mid; 1345 1346 descs_used++; /* desc used so far */ 1347 sg_desc_cnt++; /* desc used for this segment */ 1348 len -= lenmss; 1349 rem_data -= lenmss; 1350 1351 wil_dbg_txrx(wil, 1352 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", 1353 len, rem_data, descs_used, sg_desc_cnt); 1354 1355 /* Close the segment if reached mss size or last frag*/ 1356 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { 1357 if (hdr_compensation_need) { 1358 /* first segment include hdr desc for 1359 * release 1360 */ 1361 hdr_ctx->nr_frags = sg_desc_cnt; 1362 wil_tx_desc_set_nr_frags(first_desc, 1363 sg_desc_cnt + 1364 1); 1365 hdr_compensation_need = false; 1366 } else { 1367 wil_tx_desc_set_nr_frags(first_desc, 1368 sg_desc_cnt); 1369 } 1370 first_ctx->nr_frags = sg_desc_cnt - 1; 1371 1372 wil_tx_last_desc(d); 1373 1374 /* first descriptor may also be the last 1375 * for this mss - make sure not to copy 1376 * it twice 1377 */ 1378 if (first_desc != d) 1379 *_first_desc = *first_desc; 1380 1381 /*last descriptor will be copied at the end 1382 * of this TS processing 1383 */ 1384 if (f < nr_frags - 1 || len > 0) 1385 *_desc = *d; 1386 1387 rem_data = mss; 1388 _first_desc = NULL; 1389 sg_desc_cnt = 0; 1390 } else if (first_desc != d) /* update mid descriptor */ 1391 *_desc = *d; 1392 } 1393 } 1394 1395 /* first descriptor may also be the last. 1396 * in this case d pointer is invalid 1397 */ 1398 if (_first_desc == _desc) 1399 d = first_desc; 1400 1401 /* Last data descriptor */ 1402 wil_set_tx_desc_last_tso(d); 1403 *_desc = *d; 1404 1405 /* Fill the total number of descriptors in first desc (hdr)*/ 1406 wil_tx_desc_set_nr_frags(hdr_desc, descs_used); 1407 *_hdr_desc = *hdr_desc; 1408 1409 /* hold reference to skb 1410 * to prevent skb release before accounting 1411 * in case of immediate "tx done" 1412 */ 1413 vring->ctx[i].skb = skb_get(skb); 1414 1415 /* performance monitoring */ 1416 used = wil_vring_used_tx(vring); 1417 if (wil_val_in_range(vring_idle_trsh, 1418 used, used + descs_used)) { 1419 txdata->idle += get_cycles() - txdata->last_idle; 1420 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1421 vring_index, used, used + descs_used); 1422 } 1423 1424 /* advance swhead */ 1425 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1426 wil_vring_advance_head(vring, descs_used); 1427 1428 /* make sure all writes to descriptors (shared memory) are done before 1429 * committing them to HW 1430 */ 1431 wmb(); 1432 1433 wil_w(wil, vring->hwtail, vring->swhead); 1434 return 0; 1435 1436 dma_error: 1437 wil_err(wil, "TSO: DMA map page error\n"); 1438 while (descs_used > 0) { 1439 struct wil_ctx *ctx; 1440 1441 i = (swhead + descs_used) % vring->size; 1442 d = (struct vring_tx_desc *)&vring->va[i].tx; 1443 _desc = &vring->va[i].tx; 1444 *d = *_desc; 1445 _desc->dma.status = TX_DMA_STATUS_DU; 1446 ctx = &vring->ctx[i]; 1447 wil_txdesc_unmap(dev, d, ctx); 1448 if (ctx->skb) 1449 dev_kfree_skb_any(ctx->skb); 1450 memset(ctx, 0, sizeof(*ctx)); 1451 descs_used--; 1452 } 1453 1454 err_exit: 1455 return -EINVAL; 1456 } 1457 1458 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1459 struct sk_buff *skb) 1460 { 1461 struct device *dev = wil_to_dev(wil); 1462 struct vring_tx_desc dd, *d = ⅆ 1463 volatile struct vring_tx_desc *_d; 1464 u32 swhead = vring->swhead; 1465 int avail = wil_vring_avail_tx(vring); 1466 int nr_frags = skb_shinfo(skb)->nr_frags; 1467 uint f = 0; 1468 int vring_index = vring - wil->vring_tx; 1469 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1470 uint i = swhead; 1471 dma_addr_t pa; 1472 int used; 1473 bool mcast = (vring_index == wil->bcast_vring); 1474 uint len = skb_headlen(skb); 1475 1476 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1477 __func__, skb->len, vring_index); 1478 1479 if (unlikely(!txdata->enabled)) 1480 return -EINVAL; 1481 1482 if (unlikely(avail < 1 + nr_frags)) { 1483 wil_err_ratelimited(wil, 1484 "Tx ring[%2d] full. No space for %d fragments\n", 1485 vring_index, 1 + nr_frags); 1486 return -ENOMEM; 1487 } 1488 _d = &vring->va[i].tx; 1489 1490 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1491 1492 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, 1493 skb_headlen(skb), skb->data, &pa); 1494 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, 1495 skb->data, skb_headlen(skb), false); 1496 1497 if (unlikely(dma_mapping_error(dev, pa))) 1498 return -EINVAL; 1499 vring->ctx[i].mapped_as = wil_mapped_as_single; 1500 /* 1-st segment */ 1501 wil_tx_desc_map(d, pa, len, vring_index); 1502 if (unlikely(mcast)) { 1503 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ 1504 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ 1505 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); 1506 } 1507 /* Process TCP/UDP checksum offloading */ 1508 if (unlikely(wil_tx_desc_offload_setup(d, skb))) { 1509 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", 1510 vring_index); 1511 goto dma_error; 1512 } 1513 1514 vring->ctx[i].nr_frags = nr_frags; 1515 wil_tx_desc_set_nr_frags(d, nr_frags + 1); 1516 1517 /* middle segments */ 1518 for (; f < nr_frags; f++) { 1519 const struct skb_frag_struct *frag = 1520 &skb_shinfo(skb)->frags[f]; 1521 int len = skb_frag_size(frag); 1522 1523 *_d = *d; 1524 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1525 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1526 (const void *)d, sizeof(*d), false); 1527 i = (swhead + f + 1) % vring->size; 1528 _d = &vring->va[i].tx; 1529 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1530 DMA_TO_DEVICE); 1531 if (unlikely(dma_mapping_error(dev, pa))) 1532 goto dma_error; 1533 vring->ctx[i].mapped_as = wil_mapped_as_page; 1534 wil_tx_desc_map(d, pa, len, vring_index); 1535 /* no need to check return code - 1536 * if it succeeded for 1-st descriptor, 1537 * it will succeed here too 1538 */ 1539 wil_tx_desc_offload_setup(d, skb); 1540 } 1541 /* for the last seg only */ 1542 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); 1543 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); 1544 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1545 *_d = *d; 1546 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1547 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1548 (const void *)d, sizeof(*d), false); 1549 1550 /* hold reference to skb 1551 * to prevent skb release before accounting 1552 * in case of immediate "tx done" 1553 */ 1554 vring->ctx[i].skb = skb_get(skb); 1555 1556 /* performance monitoring */ 1557 used = wil_vring_used_tx(vring); 1558 if (wil_val_in_range(vring_idle_trsh, 1559 used, used + nr_frags + 1)) { 1560 txdata->idle += get_cycles() - txdata->last_idle; 1561 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1562 vring_index, used, used + nr_frags + 1); 1563 } 1564 1565 /* advance swhead */ 1566 wil_vring_advance_head(vring, nr_frags + 1); 1567 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, 1568 vring->swhead); 1569 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); 1570 1571 /* make sure all writes to descriptors (shared memory) are done before 1572 * committing them to HW 1573 */ 1574 wmb(); 1575 1576 wil_w(wil, vring->hwtail, vring->swhead); 1577 1578 return 0; 1579 dma_error: 1580 /* unmap what we have mapped */ 1581 nr_frags = f + 1; /* frags mapped + one for skb head */ 1582 for (f = 0; f < nr_frags; f++) { 1583 struct wil_ctx *ctx; 1584 1585 i = (swhead + f) % vring->size; 1586 ctx = &vring->ctx[i]; 1587 _d = &vring->va[i].tx; 1588 *d = *_d; 1589 _d->dma.status = TX_DMA_STATUS_DU; 1590 wil_txdesc_unmap(dev, d, ctx); 1591 1592 if (ctx->skb) 1593 dev_kfree_skb_any(ctx->skb); 1594 1595 memset(ctx, 0, sizeof(*ctx)); 1596 } 1597 1598 return -EINVAL; 1599 } 1600 1601 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1602 struct sk_buff *skb) 1603 { 1604 int vring_index = vring - wil->vring_tx; 1605 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1606 int rc; 1607 1608 spin_lock(&txdata->lock); 1609 1610 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) 1611 (wil, vring, skb); 1612 1613 spin_unlock(&txdata->lock); 1614 1615 return rc; 1616 } 1617 1618 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) 1619 { 1620 struct wil6210_priv *wil = ndev_to_wil(ndev); 1621 struct ethhdr *eth = (void *)skb->data; 1622 bool bcast = is_multicast_ether_addr(eth->h_dest); 1623 struct vring *vring; 1624 static bool pr_once_fw; 1625 int rc; 1626 1627 wil_dbg_txrx(wil, "%s()\n", __func__); 1628 if (unlikely(!test_bit(wil_status_fwready, wil->status))) { 1629 if (!pr_once_fw) { 1630 wil_err(wil, "FW not ready\n"); 1631 pr_once_fw = true; 1632 } 1633 goto drop; 1634 } 1635 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { 1636 wil_err(wil, "FW not connected\n"); 1637 goto drop; 1638 } 1639 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { 1640 wil_err(wil, "Xmit in monitor mode not supported\n"); 1641 goto drop; 1642 } 1643 pr_once_fw = false; 1644 1645 /* find vring */ 1646 if (wil->wdev->iftype == NL80211_IFTYPE_STATION) { 1647 /* in STA mode (ESS), all to same VRING */ 1648 vring = wil_find_tx_vring_sta(wil, skb); 1649 } else { /* direct communication, find matching VRING */ 1650 vring = bcast ? wil_find_tx_bcast(wil, skb) : 1651 wil_find_tx_ucast(wil, skb); 1652 } 1653 if (unlikely(!vring)) { 1654 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); 1655 goto drop; 1656 } 1657 /* set up vring entry */ 1658 rc = wil_tx_vring(wil, vring, skb); 1659 1660 /* do we still have enough room in the vring? */ 1661 if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) { 1662 netif_tx_stop_all_queues(wil_to_ndev(wil)); 1663 wil_dbg_txrx(wil, "netif_tx_stop : ring full\n"); 1664 } 1665 1666 switch (rc) { 1667 case 0: 1668 /* statistics will be updated on the tx_complete */ 1669 dev_kfree_skb_any(skb); 1670 return NETDEV_TX_OK; 1671 case -ENOMEM: 1672 return NETDEV_TX_BUSY; 1673 default: 1674 break; /* goto drop; */ 1675 } 1676 drop: 1677 ndev->stats.tx_dropped++; 1678 dev_kfree_skb_any(skb); 1679 1680 return NET_XMIT_DROP; 1681 } 1682 1683 static inline bool wil_need_txstat(struct sk_buff *skb) 1684 { 1685 struct ethhdr *eth = (void *)skb->data; 1686 1687 return is_unicast_ether_addr(eth->h_dest) && skb->sk && 1688 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 1689 } 1690 1691 static inline void wil_consume_skb(struct sk_buff *skb, bool acked) 1692 { 1693 if (unlikely(wil_need_txstat(skb))) 1694 skb_complete_wifi_ack(skb, acked); 1695 else 1696 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); 1697 } 1698 1699 /** 1700 * Clean up transmitted skb's from the Tx VRING 1701 * 1702 * Return number of descriptors cleared 1703 * 1704 * Safe to call from IRQ 1705 */ 1706 int wil_tx_complete(struct wil6210_priv *wil, int ringid) 1707 { 1708 struct net_device *ndev = wil_to_ndev(wil); 1709 struct device *dev = wil_to_dev(wil); 1710 struct vring *vring = &wil->vring_tx[ringid]; 1711 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; 1712 int done = 0; 1713 int cid = wil->vring2cid_tid[ringid][0]; 1714 struct wil_net_stats *stats = NULL; 1715 volatile struct vring_tx_desc *_d; 1716 int used_before_complete; 1717 int used_new; 1718 1719 if (unlikely(!vring->va)) { 1720 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); 1721 return 0; 1722 } 1723 1724 if (unlikely(!txdata->enabled)) { 1725 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); 1726 return 0; 1727 } 1728 1729 wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid); 1730 1731 used_before_complete = wil_vring_used_tx(vring); 1732 1733 if (cid < WIL6210_MAX_CID) 1734 stats = &wil->sta[cid].stats; 1735 1736 while (!wil_vring_is_empty(vring)) { 1737 int new_swtail; 1738 struct wil_ctx *ctx = &vring->ctx[vring->swtail]; 1739 /** 1740 * For the fragmented skb, HW will set DU bit only for the 1741 * last fragment. look for it. 1742 * In TSO the first DU will include hdr desc 1743 */ 1744 int lf = (vring->swtail + ctx->nr_frags) % vring->size; 1745 /* TODO: check we are not past head */ 1746 1747 _d = &vring->va[lf].tx; 1748 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) 1749 break; 1750 1751 new_swtail = (lf + 1) % vring->size; 1752 while (vring->swtail != new_swtail) { 1753 struct vring_tx_desc dd, *d = ⅆ 1754 u16 dmalen; 1755 struct sk_buff *skb; 1756 1757 ctx = &vring->ctx[vring->swtail]; 1758 skb = ctx->skb; 1759 _d = &vring->va[vring->swtail].tx; 1760 1761 *d = *_d; 1762 1763 dmalen = le16_to_cpu(d->dma.length); 1764 trace_wil6210_tx_done(ringid, vring->swtail, dmalen, 1765 d->dma.error); 1766 wil_dbg_txrx(wil, 1767 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", 1768 ringid, vring->swtail, dmalen, 1769 d->dma.status, d->dma.error); 1770 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, 1771 (const void *)d, sizeof(*d), false); 1772 1773 wil_txdesc_unmap(dev, d, ctx); 1774 1775 if (skb) { 1776 if (likely(d->dma.error == 0)) { 1777 ndev->stats.tx_packets++; 1778 ndev->stats.tx_bytes += skb->len; 1779 if (stats) { 1780 stats->tx_packets++; 1781 stats->tx_bytes += skb->len; 1782 } 1783 } else { 1784 ndev->stats.tx_errors++; 1785 if (stats) 1786 stats->tx_errors++; 1787 } 1788 wil_consume_skb(skb, d->dma.error == 0); 1789 } 1790 memset(ctx, 0, sizeof(*ctx)); 1791 /* There is no need to touch HW descriptor: 1792 * - ststus bit TX_DMA_STATUS_DU is set by design, 1793 * so hardware will not try to process this desc., 1794 * - rest of descriptor will be initialized on Tx. 1795 */ 1796 vring->swtail = wil_vring_next_tail(vring); 1797 done++; 1798 } 1799 } 1800 1801 /* performance monitoring */ 1802 used_new = wil_vring_used_tx(vring); 1803 if (wil_val_in_range(vring_idle_trsh, 1804 used_new, used_before_complete)) { 1805 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", 1806 ringid, used_before_complete, used_new); 1807 txdata->last_idle = get_cycles(); 1808 } 1809 1810 if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) { 1811 wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n"); 1812 netif_tx_wake_all_queues(wil_to_ndev(wil)); 1813 } 1814 1815 return done; 1816 } 1817