1 /* 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/etherdevice.h> 18 #include <net/ieee80211_radiotap.h> 19 #include <linux/if_arp.h> 20 #include <linux/moduleparam.h> 21 #include <linux/ip.h> 22 #include <linux/ipv6.h> 23 #include <net/ipv6.h> 24 #include <linux/prefetch.h> 25 26 #include "wil6210.h" 27 #include "wmi.h" 28 #include "txrx.h" 29 #include "trace.h" 30 31 static bool rtap_include_phy_info; 32 module_param(rtap_include_phy_info, bool, S_IRUGO); 33 MODULE_PARM_DESC(rtap_include_phy_info, 34 " Include PHY info in the radiotap header, default - no"); 35 36 bool rx_align_2; 37 module_param(rx_align_2, bool, S_IRUGO); 38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); 39 40 static inline uint wil_rx_snaplen(void) 41 { 42 return rx_align_2 ? 6 : 0; 43 } 44 45 static inline int wil_vring_is_empty(struct vring *vring) 46 { 47 return vring->swhead == vring->swtail; 48 } 49 50 static inline u32 wil_vring_next_tail(struct vring *vring) 51 { 52 return (vring->swtail + 1) % vring->size; 53 } 54 55 static inline void wil_vring_advance_head(struct vring *vring, int n) 56 { 57 vring->swhead = (vring->swhead + n) % vring->size; 58 } 59 60 static inline int wil_vring_is_full(struct vring *vring) 61 { 62 return wil_vring_next_tail(vring) == vring->swhead; 63 } 64 65 /* Used space in Tx Vring */ 66 static inline int wil_vring_used_tx(struct vring *vring) 67 { 68 u32 swhead = vring->swhead; 69 u32 swtail = vring->swtail; 70 return (vring->size + swhead - swtail) % vring->size; 71 } 72 73 /* Available space in Tx Vring */ 74 static inline int wil_vring_avail_tx(struct vring *vring) 75 { 76 return vring->size - wil_vring_used_tx(vring) - 1; 77 } 78 79 /* wil_vring_wmark_low - low watermark for available descriptor space */ 80 static inline int wil_vring_wmark_low(struct vring *vring) 81 { 82 return vring->size/8; 83 } 84 85 /* wil_vring_wmark_high - high watermark for available descriptor space */ 86 static inline int wil_vring_wmark_high(struct vring *vring) 87 { 88 return vring->size/4; 89 } 90 91 /* returns true if num avail descriptors is lower than wmark_low */ 92 static inline int wil_vring_avail_low(struct vring *vring) 93 { 94 return wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring); 95 } 96 97 /* returns true if num avail descriptors is higher than wmark_high */ 98 static inline int wil_vring_avail_high(struct vring *vring) 99 { 100 return wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring); 101 } 102 103 /* wil_val_in_range - check if value in [min,max) */ 104 static inline bool wil_val_in_range(int val, int min, int max) 105 { 106 return val >= min && val < max; 107 } 108 109 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) 110 { 111 struct device *dev = wil_to_dev(wil); 112 size_t sz = vring->size * sizeof(vring->va[0]); 113 uint i; 114 115 wil_dbg_misc(wil, "%s()\n", __func__); 116 117 BUILD_BUG_ON(sizeof(vring->va[0]) != 32); 118 119 vring->swhead = 0; 120 vring->swtail = 0; 121 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); 122 if (!vring->ctx) { 123 vring->va = NULL; 124 return -ENOMEM; 125 } 126 /* vring->va should be aligned on its size rounded up to power of 2 127 * This is granted by the dma_alloc_coherent 128 */ 129 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); 130 if (!vring->va) { 131 kfree(vring->ctx); 132 vring->ctx = NULL; 133 return -ENOMEM; 134 } 135 /* initially, all descriptors are SW owned 136 * For Tx and Rx, ownership bit is at the same location, thus 137 * we can use any 138 */ 139 for (i = 0; i < vring->size; i++) { 140 volatile struct vring_tx_desc *_d = &vring->va[i].tx; 141 142 _d->dma.status = TX_DMA_STATUS_DU; 143 } 144 145 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, 146 vring->va, &vring->pa, vring->ctx); 147 148 return 0; 149 } 150 151 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, 152 struct wil_ctx *ctx) 153 { 154 dma_addr_t pa = wil_desc_addr(&d->dma.addr); 155 u16 dmalen = le16_to_cpu(d->dma.length); 156 157 switch (ctx->mapped_as) { 158 case wil_mapped_as_single: 159 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); 160 break; 161 case wil_mapped_as_page: 162 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); 163 break; 164 default: 165 break; 166 } 167 } 168 169 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, 170 int tx) 171 { 172 struct device *dev = wil_to_dev(wil); 173 size_t sz = vring->size * sizeof(vring->va[0]); 174 175 lockdep_assert_held(&wil->mutex); 176 if (tx) { 177 int vring_index = vring - wil->vring_tx; 178 179 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", 180 vring_index, vring->size, vring->va, 181 &vring->pa, vring->ctx); 182 } else { 183 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", 184 vring->size, vring->va, 185 &vring->pa, vring->ctx); 186 } 187 188 while (!wil_vring_is_empty(vring)) { 189 dma_addr_t pa; 190 u16 dmalen; 191 struct wil_ctx *ctx; 192 193 if (tx) { 194 struct vring_tx_desc dd, *d = ⅆ 195 volatile struct vring_tx_desc *_d = 196 &vring->va[vring->swtail].tx; 197 198 ctx = &vring->ctx[vring->swtail]; 199 if (!ctx) { 200 wil_dbg_txrx(wil, 201 "ctx(%d) was already completed\n", 202 vring->swtail); 203 vring->swtail = wil_vring_next_tail(vring); 204 continue; 205 } 206 *d = *_d; 207 wil_txdesc_unmap(dev, d, ctx); 208 if (ctx->skb) 209 dev_kfree_skb_any(ctx->skb); 210 vring->swtail = wil_vring_next_tail(vring); 211 } else { /* rx */ 212 struct vring_rx_desc dd, *d = ⅆ 213 volatile struct vring_rx_desc *_d = 214 &vring->va[vring->swhead].rx; 215 216 ctx = &vring->ctx[vring->swhead]; 217 *d = *_d; 218 pa = wil_desc_addr(&d->dma.addr); 219 dmalen = le16_to_cpu(d->dma.length); 220 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); 221 kfree_skb(ctx->skb); 222 wil_vring_advance_head(vring, 1); 223 } 224 } 225 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); 226 kfree(vring->ctx); 227 vring->pa = 0; 228 vring->va = NULL; 229 vring->ctx = NULL; 230 } 231 232 /** 233 * Allocate one skb for Rx VRING 234 * 235 * Safe to call from IRQ 236 */ 237 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, 238 u32 i, int headroom) 239 { 240 struct device *dev = wil_to_dev(wil); 241 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); 242 struct vring_rx_desc dd, *d = ⅆ 243 volatile struct vring_rx_desc *_d = &vring->va[i].rx; 244 dma_addr_t pa; 245 struct sk_buff *skb = dev_alloc_skb(sz + headroom); 246 247 if (unlikely(!skb)) 248 return -ENOMEM; 249 250 skb_reserve(skb, headroom); 251 skb_put(skb, sz); 252 253 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); 254 if (unlikely(dma_mapping_error(dev, pa))) { 255 kfree_skb(skb); 256 return -ENOMEM; 257 } 258 259 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; 260 wil_desc_addr_set(&d->dma.addr, pa); 261 /* ip_length don't care */ 262 /* b11 don't care */ 263 /* error don't care */ 264 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 265 d->dma.length = cpu_to_le16(sz); 266 *_d = *d; 267 vring->ctx[i].skb = skb; 268 269 return 0; 270 } 271 272 /** 273 * Adds radiotap header 274 * 275 * Any error indicated as "Bad FCS" 276 * 277 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: 278 * - Rx descriptor: 32 bytes 279 * - Phy info 280 */ 281 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, 282 struct sk_buff *skb) 283 { 284 struct wireless_dev *wdev = wil->wdev; 285 struct wil6210_rtap { 286 struct ieee80211_radiotap_header rthdr; 287 /* fields should be in the order of bits in rthdr.it_present */ 288 /* flags */ 289 u8 flags; 290 /* channel */ 291 __le16 chnl_freq __aligned(2); 292 __le16 chnl_flags; 293 /* MCS */ 294 u8 mcs_present; 295 u8 mcs_flags; 296 u8 mcs_index; 297 } __packed; 298 struct wil6210_rtap_vendor { 299 struct wil6210_rtap rtap; 300 /* vendor */ 301 u8 vendor_oui[3] __aligned(2); 302 u8 vendor_ns; 303 __le16 vendor_skip; 304 u8 vendor_data[0]; 305 } __packed; 306 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 307 struct wil6210_rtap_vendor *rtap_vendor; 308 int rtap_len = sizeof(struct wil6210_rtap); 309 int phy_length = 0; /* phy info header size, bytes */ 310 static char phy_data[128]; 311 struct ieee80211_channel *ch = wdev->preset_chandef.chan; 312 313 if (rtap_include_phy_info) { 314 rtap_len = sizeof(*rtap_vendor) + sizeof(*d); 315 /* calculate additional length */ 316 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { 317 /** 318 * PHY info starts from 8-byte boundary 319 * there are 8-byte lines, last line may be partially 320 * written (HW bug), thus FW configures for last line 321 * to be excessive. Driver skips this last line. 322 */ 323 int len = min_t(int, 8 + sizeof(phy_data), 324 wil_rxdesc_phy_length(d)); 325 326 if (len > 8) { 327 void *p = skb_tail_pointer(skb); 328 void *pa = PTR_ALIGN(p, 8); 329 330 if (skb_tailroom(skb) >= len + (pa - p)) { 331 phy_length = len - 8; 332 memcpy(phy_data, pa, phy_length); 333 } 334 } 335 } 336 rtap_len += phy_length; 337 } 338 339 if (skb_headroom(skb) < rtap_len && 340 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { 341 wil_err(wil, "Unable to expand headrom to %d\n", rtap_len); 342 return; 343 } 344 345 rtap_vendor = (void *)skb_push(skb, rtap_len); 346 memset(rtap_vendor, 0, rtap_len); 347 348 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; 349 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); 350 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( 351 (1 << IEEE80211_RADIOTAP_FLAGS) | 352 (1 << IEEE80211_RADIOTAP_CHANNEL) | 353 (1 << IEEE80211_RADIOTAP_MCS)); 354 if (d->dma.status & RX_DMA_STATUS_ERROR) 355 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; 356 357 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); 358 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); 359 360 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; 361 rtap_vendor->rtap.mcs_flags = 0; 362 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); 363 364 if (rtap_include_phy_info) { 365 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << 366 IEEE80211_RADIOTAP_VENDOR_NAMESPACE); 367 /* OUI for Wilocity 04:ce:14 */ 368 rtap_vendor->vendor_oui[0] = 0x04; 369 rtap_vendor->vendor_oui[1] = 0xce; 370 rtap_vendor->vendor_oui[2] = 0x14; 371 rtap_vendor->vendor_ns = 1; 372 /* Rx descriptor + PHY data */ 373 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + 374 phy_length); 375 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); 376 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, 377 phy_length); 378 } 379 } 380 381 /* similar to ieee80211_ version, but FC contain only 1-st byte */ 382 static inline int wil_is_back_req(u8 fc) 383 { 384 return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == 385 (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ); 386 } 387 388 /** 389 * reap 1 frame from @swhead 390 * 391 * Rx descriptor copied to skb->cb 392 * 393 * Safe to call from IRQ 394 */ 395 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, 396 struct vring *vring) 397 { 398 struct device *dev = wil_to_dev(wil); 399 struct net_device *ndev = wil_to_ndev(wil); 400 volatile struct vring_rx_desc *_d; 401 struct vring_rx_desc *d; 402 struct sk_buff *skb; 403 dma_addr_t pa; 404 unsigned int snaplen = wil_rx_snaplen(); 405 unsigned int sz = mtu_max + ETH_HLEN + snaplen; 406 u16 dmalen; 407 u8 ftype; 408 int cid; 409 int i; 410 struct wil_net_stats *stats; 411 412 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); 413 414 again: 415 if (unlikely(wil_vring_is_empty(vring))) 416 return NULL; 417 418 i = (int)vring->swhead; 419 _d = &vring->va[i].rx; 420 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { 421 /* it is not error, we just reached end of Rx done area */ 422 return NULL; 423 } 424 425 skb = vring->ctx[i].skb; 426 vring->ctx[i].skb = NULL; 427 wil_vring_advance_head(vring, 1); 428 if (!skb) { 429 wil_err(wil, "No Rx skb at [%d]\n", i); 430 goto again; 431 } 432 d = wil_skb_rxdesc(skb); 433 *d = *_d; 434 pa = wil_desc_addr(&d->dma.addr); 435 436 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); 437 dmalen = le16_to_cpu(d->dma.length); 438 439 trace_wil6210_rx(i, d); 440 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); 441 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 442 (const void *)d, sizeof(*d), false); 443 444 cid = wil_rxdesc_cid(d); 445 stats = &wil->sta[cid].stats; 446 447 if (unlikely(dmalen > sz)) { 448 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); 449 stats->rx_large_frame++; 450 kfree_skb(skb); 451 goto again; 452 } 453 skb_trim(skb, dmalen); 454 455 prefetch(skb->data); 456 457 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 458 skb->data, skb_headlen(skb), false); 459 460 stats->last_mcs_rx = wil_rxdesc_mcs(d); 461 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) 462 stats->rx_per_mcs[stats->last_mcs_rx]++; 463 464 /* use radiotap header only if required */ 465 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) 466 wil_rx_add_radiotap_header(wil, skb); 467 468 /* no extra checks if in sniffer mode */ 469 if (ndev->type != ARPHRD_ETHER) 470 return skb; 471 /* Non-data frames may be delivered through Rx DMA channel (ex: BAR) 472 * Driver should recognize it by frame type, that is found 473 * in Rx descriptor. If type is not data, it is 802.11 frame as is 474 */ 475 ftype = wil_rxdesc_ftype(d) << 2; 476 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { 477 u8 fc1 = wil_rxdesc_fc1(d); 478 int mid = wil_rxdesc_mid(d); 479 int tid = wil_rxdesc_tid(d); 480 u16 seq = wil_rxdesc_seq(d); 481 482 wil_dbg_txrx(wil, 483 "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 484 fc1, mid, cid, tid, seq); 485 stats->rx_non_data_frame++; 486 if (wil_is_back_req(fc1)) { 487 wil_dbg_txrx(wil, 488 "BAR: MID %d CID %d TID %d Seq 0x%03x\n", 489 mid, cid, tid, seq); 490 wil_rx_bar(wil, cid, tid, seq); 491 } else { 492 /* print again all info. One can enable only this 493 * without overhead for printing every Rx frame 494 */ 495 wil_dbg_txrx(wil, 496 "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 497 fc1, mid, cid, tid, seq); 498 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 499 (const void *)d, sizeof(*d), false); 500 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 501 skb->data, skb_headlen(skb), false); 502 } 503 kfree_skb(skb); 504 goto again; 505 } 506 507 if (unlikely(skb->len < ETH_HLEN + snaplen)) { 508 wil_err(wil, "Short frame, len = %d\n", skb->len); 509 stats->rx_short_frame++; 510 kfree_skb(skb); 511 goto again; 512 } 513 514 /* L4 IDENT is on when HW calculated checksum, check status 515 * and in case of error drop the packet 516 * higher stack layers will handle retransmission (if required) 517 */ 518 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { 519 /* L4 protocol identified, csum calculated */ 520 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) 521 skb->ip_summed = CHECKSUM_UNNECESSARY; 522 /* If HW reports bad checksum, let IP stack re-check it 523 * For example, HW don't understand Microsoft IP stack that 524 * mis-calculates TCP checksum - if it should be 0x0, 525 * it writes 0xffff in violation of RFC 1624 526 */ 527 } 528 529 if (snaplen) { 530 /* Packet layout 531 * +-------+-------+---------+------------+------+ 532 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | 533 * +-------+-------+---------+------------+------+ 534 * Need to remove SNAP, shifting SA and DA forward 535 */ 536 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); 537 skb_pull(skb, snaplen); 538 } 539 540 return skb; 541 } 542 543 /** 544 * allocate and fill up to @count buffers in rx ring 545 * buffers posted at @swtail 546 */ 547 static int wil_rx_refill(struct wil6210_priv *wil, int count) 548 { 549 struct net_device *ndev = wil_to_ndev(wil); 550 struct vring *v = &wil->vring_rx; 551 u32 next_tail; 552 int rc = 0; 553 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? 554 WIL6210_RTAP_SIZE : 0; 555 556 for (; next_tail = wil_vring_next_tail(v), 557 (next_tail != v->swhead) && (count-- > 0); 558 v->swtail = next_tail) { 559 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); 560 if (unlikely(rc)) { 561 wil_err(wil, "Error %d in wil_rx_refill[%d]\n", 562 rc, v->swtail); 563 break; 564 } 565 } 566 567 /* make sure all writes to descriptors (shared memory) are done before 568 * committing them to HW 569 */ 570 wmb(); 571 572 wil_w(wil, v->hwtail, v->swtail); 573 574 return rc; 575 } 576 577 /** 578 * reverse_memcmp - Compare two areas of memory, in reverse order 579 * @cs: One area of memory 580 * @ct: Another area of memory 581 * @count: The size of the area. 582 * 583 * Cut'n'paste from original memcmp (see lib/string.c) 584 * with minimal modifications 585 */ 586 static int reverse_memcmp(const void *cs, const void *ct, size_t count) 587 { 588 const unsigned char *su1, *su2; 589 int res = 0; 590 591 for (su1 = cs + count - 1, su2 = ct + count - 1; count > 0; 592 --su1, --su2, count--) { 593 res = *su1 - *su2; 594 if (res) 595 break; 596 } 597 return res; 598 } 599 600 static int wil_rx_crypto_check(struct wil6210_priv *wil, struct sk_buff *skb) 601 { 602 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 603 int cid = wil_rxdesc_cid(d); 604 int tid = wil_rxdesc_tid(d); 605 int key_id = wil_rxdesc_key_id(d); 606 int mc = wil_rxdesc_mcast(d); 607 struct wil_sta_info *s = &wil->sta[cid]; 608 struct wil_tid_crypto_rx *c = mc ? &s->group_crypto_rx : 609 &s->tid_crypto_rx[tid]; 610 struct wil_tid_crypto_rx_single *cc = &c->key_id[key_id]; 611 const u8 *pn = (u8 *)&d->mac.pn_15_0; 612 613 if (!cc->key_set) { 614 wil_err_ratelimited(wil, 615 "Key missing. CID %d TID %d MCast %d KEY_ID %d\n", 616 cid, tid, mc, key_id); 617 return -EINVAL; 618 } 619 620 if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) { 621 wil_err_ratelimited(wil, 622 "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n", 623 cid, tid, mc, key_id, pn, cc->pn); 624 return -EINVAL; 625 } 626 memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN); 627 628 return 0; 629 } 630 631 /* 632 * Pass Rx packet to the netif. Update statistics. 633 * Called in softirq context (NAPI poll). 634 */ 635 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) 636 { 637 gro_result_t rc = GRO_NORMAL; 638 struct wil6210_priv *wil = ndev_to_wil(ndev); 639 struct wireless_dev *wdev = wil_to_wdev(wil); 640 unsigned int len = skb->len; 641 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 642 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ 643 int security = wil_rxdesc_security(d); 644 struct ethhdr *eth = (void *)skb->data; 645 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication 646 * is not suitable, need to look at data 647 */ 648 int mcast = is_multicast_ether_addr(eth->h_dest); 649 struct wil_net_stats *stats = &wil->sta[cid].stats; 650 struct sk_buff *xmit_skb = NULL; 651 static const char * const gro_res_str[] = { 652 [GRO_MERGED] = "GRO_MERGED", 653 [GRO_MERGED_FREE] = "GRO_MERGED_FREE", 654 [GRO_HELD] = "GRO_HELD", 655 [GRO_NORMAL] = "GRO_NORMAL", 656 [GRO_DROP] = "GRO_DROP", 657 }; 658 659 if (ndev->features & NETIF_F_RXHASH) 660 /* fake L4 to ensure it won't be re-calculated later 661 * set hash to any non-zero value to activate rps 662 * mechanism, core will be chosen according 663 * to user-level rps configuration. 664 */ 665 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); 666 667 skb_orphan(skb); 668 669 if (security && (wil_rx_crypto_check(wil, skb) != 0)) { 670 rc = GRO_DROP; 671 dev_kfree_skb(skb); 672 stats->rx_replay++; 673 goto stats; 674 } 675 676 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { 677 if (mcast) { 678 /* send multicast frames both to higher layers in 679 * local net stack and back to the wireless medium 680 */ 681 xmit_skb = skb_copy(skb, GFP_ATOMIC); 682 } else { 683 int xmit_cid = wil_find_cid(wil, eth->h_dest); 684 685 if (xmit_cid >= 0) { 686 /* The destination station is associated to 687 * this AP (in this VLAN), so send the frame 688 * directly to it and do not pass it to local 689 * net stack. 690 */ 691 xmit_skb = skb; 692 skb = NULL; 693 } 694 } 695 } 696 if (xmit_skb) { 697 /* Send to wireless media and increase priority by 256 to 698 * keep the received priority instead of reclassifying 699 * the frame (see cfg80211_classify8021d). 700 */ 701 xmit_skb->dev = ndev; 702 xmit_skb->priority += 256; 703 xmit_skb->protocol = htons(ETH_P_802_3); 704 skb_reset_network_header(xmit_skb); 705 skb_reset_mac_header(xmit_skb); 706 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); 707 dev_queue_xmit(xmit_skb); 708 } 709 710 if (skb) { /* deliver to local stack */ 711 712 skb->protocol = eth_type_trans(skb, ndev); 713 rc = napi_gro_receive(&wil->napi_rx, skb); 714 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", 715 len, gro_res_str[rc]); 716 } 717 stats: 718 /* statistics. rc set to GRO_NORMAL for AP bridging */ 719 if (unlikely(rc == GRO_DROP)) { 720 ndev->stats.rx_dropped++; 721 stats->rx_dropped++; 722 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); 723 } else { 724 ndev->stats.rx_packets++; 725 stats->rx_packets++; 726 ndev->stats.rx_bytes += len; 727 stats->rx_bytes += len; 728 if (mcast) 729 ndev->stats.multicast++; 730 } 731 } 732 733 /** 734 * Proceed all completed skb's from Rx VRING 735 * 736 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled 737 */ 738 void wil_rx_handle(struct wil6210_priv *wil, int *quota) 739 { 740 struct net_device *ndev = wil_to_ndev(wil); 741 struct vring *v = &wil->vring_rx; 742 struct sk_buff *skb; 743 744 if (unlikely(!v->va)) { 745 wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); 746 return; 747 } 748 wil_dbg_txrx(wil, "%s()\n", __func__); 749 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { 750 (*quota)--; 751 752 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { 753 skb->dev = ndev; 754 skb_reset_mac_header(skb); 755 skb->ip_summed = CHECKSUM_UNNECESSARY; 756 skb->pkt_type = PACKET_OTHERHOST; 757 skb->protocol = htons(ETH_P_802_2); 758 wil_netif_rx_any(skb, ndev); 759 } else { 760 wil_rx_reorder(wil, skb); 761 } 762 } 763 wil_rx_refill(wil, v->size); 764 } 765 766 int wil_rx_init(struct wil6210_priv *wil, u16 size) 767 { 768 struct vring *vring = &wil->vring_rx; 769 int rc; 770 771 wil_dbg_misc(wil, "%s()\n", __func__); 772 773 if (vring->va) { 774 wil_err(wil, "Rx ring already allocated\n"); 775 return -EINVAL; 776 } 777 778 vring->size = size; 779 rc = wil_vring_alloc(wil, vring); 780 if (rc) 781 return rc; 782 783 rc = wmi_rx_chain_add(wil, vring); 784 if (rc) 785 goto err_free; 786 787 rc = wil_rx_refill(wil, vring->size); 788 if (rc) 789 goto err_free; 790 791 return 0; 792 err_free: 793 wil_vring_free(wil, vring, 0); 794 795 return rc; 796 } 797 798 void wil_rx_fini(struct wil6210_priv *wil) 799 { 800 struct vring *vring = &wil->vring_rx; 801 802 wil_dbg_misc(wil, "%s()\n", __func__); 803 804 if (vring->va) 805 wil_vring_free(wil, vring, 0); 806 } 807 808 static inline void wil_tx_data_init(struct vring_tx_data *txdata) 809 { 810 spin_lock_bh(&txdata->lock); 811 txdata->dot1x_open = 0; 812 txdata->enabled = 0; 813 txdata->idle = 0; 814 txdata->last_idle = 0; 815 txdata->begin = 0; 816 txdata->agg_wsize = 0; 817 txdata->agg_timeout = 0; 818 txdata->agg_amsdu = 0; 819 txdata->addba_in_progress = false; 820 spin_unlock_bh(&txdata->lock); 821 } 822 823 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 824 int cid, int tid) 825 { 826 int rc; 827 struct wmi_vring_cfg_cmd cmd = { 828 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 829 .vring_cfg = { 830 .tx_sw_ring = { 831 .max_mpdu_size = 832 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 833 .ring_size = cpu_to_le16(size), 834 }, 835 .ringid = id, 836 .cidxtid = mk_cidxtid(cid, tid), 837 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 838 .mac_ctrl = 0, 839 .to_resolution = 0, 840 .agg_max_wsize = 0, 841 .schd_params = { 842 .priority = cpu_to_le16(0), 843 .timeslot_us = cpu_to_le16(0xfff), 844 }, 845 }, 846 }; 847 struct { 848 struct wmi_cmd_hdr wmi; 849 struct wmi_vring_cfg_done_event cmd; 850 } __packed reply; 851 struct vring *vring = &wil->vring_tx[id]; 852 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 853 854 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 855 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 856 lockdep_assert_held(&wil->mutex); 857 858 if (vring->va) { 859 wil_err(wil, "Tx ring [%d] already allocated\n", id); 860 rc = -EINVAL; 861 goto out; 862 } 863 864 wil_tx_data_init(txdata); 865 vring->size = size; 866 rc = wil_vring_alloc(wil, vring); 867 if (rc) 868 goto out; 869 870 wil->vring2cid_tid[id][0] = cid; 871 wil->vring2cid_tid[id][1] = tid; 872 873 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 874 875 if (!wil->privacy) 876 txdata->dot1x_open = true; 877 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), 878 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 879 if (rc) 880 goto out_free; 881 882 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 883 wil_err(wil, "Tx config failed, status 0x%02x\n", 884 reply.cmd.status); 885 rc = -EINVAL; 886 goto out_free; 887 } 888 889 spin_lock_bh(&txdata->lock); 890 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 891 txdata->enabled = 1; 892 spin_unlock_bh(&txdata->lock); 893 894 if (txdata->dot1x_open && (agg_wsize >= 0)) 895 wil_addba_tx_request(wil, id, agg_wsize); 896 897 return 0; 898 out_free: 899 spin_lock_bh(&txdata->lock); 900 txdata->dot1x_open = false; 901 txdata->enabled = 0; 902 spin_unlock_bh(&txdata->lock); 903 wil_vring_free(wil, vring, 1); 904 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; 905 wil->vring2cid_tid[id][1] = 0; 906 907 out: 908 909 return rc; 910 } 911 912 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) 913 { 914 int rc; 915 struct wmi_bcast_vring_cfg_cmd cmd = { 916 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 917 .vring_cfg = { 918 .tx_sw_ring = { 919 .max_mpdu_size = 920 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 921 .ring_size = cpu_to_le16(size), 922 }, 923 .ringid = id, 924 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 925 }, 926 }; 927 struct { 928 struct wmi_cmd_hdr wmi; 929 struct wmi_vring_cfg_done_event cmd; 930 } __packed reply; 931 struct vring *vring = &wil->vring_tx[id]; 932 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 933 934 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 935 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 936 lockdep_assert_held(&wil->mutex); 937 938 if (vring->va) { 939 wil_err(wil, "Tx ring [%d] already allocated\n", id); 940 rc = -EINVAL; 941 goto out; 942 } 943 944 wil_tx_data_init(txdata); 945 vring->size = size; 946 rc = wil_vring_alloc(wil, vring); 947 if (rc) 948 goto out; 949 950 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ 951 wil->vring2cid_tid[id][1] = 0; /* TID */ 952 953 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 954 955 if (!wil->privacy) 956 txdata->dot1x_open = true; 957 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), 958 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 959 if (rc) 960 goto out_free; 961 962 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 963 wil_err(wil, "Tx config failed, status 0x%02x\n", 964 reply.cmd.status); 965 rc = -EINVAL; 966 goto out_free; 967 } 968 969 spin_lock_bh(&txdata->lock); 970 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 971 txdata->enabled = 1; 972 spin_unlock_bh(&txdata->lock); 973 974 return 0; 975 out_free: 976 spin_lock_bh(&txdata->lock); 977 txdata->enabled = 0; 978 txdata->dot1x_open = false; 979 spin_unlock_bh(&txdata->lock); 980 wil_vring_free(wil, vring, 1); 981 out: 982 983 return rc; 984 } 985 986 void wil_vring_fini_tx(struct wil6210_priv *wil, int id) 987 { 988 struct vring *vring = &wil->vring_tx[id]; 989 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 990 991 lockdep_assert_held(&wil->mutex); 992 993 if (!vring->va) 994 return; 995 996 wil_dbg_misc(wil, "%s() id=%d\n", __func__, id); 997 998 spin_lock_bh(&txdata->lock); 999 txdata->dot1x_open = false; 1000 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 1001 spin_unlock_bh(&txdata->lock); 1002 /* napi_synchronize waits for completion of the current NAPI but will 1003 * not prevent the next NAPI run. 1004 * Add a memory barrier to guarantee that txdata->enabled is zeroed 1005 * before napi_synchronize so that the next scheduled NAPI will not 1006 * handle this vring 1007 */ 1008 wmb(); 1009 /* make sure NAPI won't touch this vring */ 1010 if (test_bit(wil_status_napi_en, wil->status)) 1011 napi_synchronize(&wil->napi_tx); 1012 1013 wil_vring_free(wil, vring, 1); 1014 } 1015 1016 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, 1017 struct sk_buff *skb) 1018 { 1019 int i; 1020 struct ethhdr *eth = (void *)skb->data; 1021 int cid = wil_find_cid(wil, eth->h_dest); 1022 1023 if (cid < 0) 1024 return NULL; 1025 1026 /* TODO: fix for multiple TID */ 1027 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { 1028 if (!wil->vring_tx_data[i].dot1x_open && 1029 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1030 continue; 1031 if (wil->vring2cid_tid[i][0] == cid) { 1032 struct vring *v = &wil->vring_tx[i]; 1033 struct vring_tx_data *txdata = &wil->vring_tx_data[i]; 1034 1035 wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n", 1036 __func__, eth->h_dest, i); 1037 if (v->va && txdata->enabled) { 1038 return v; 1039 } else { 1040 wil_dbg_txrx(wil, "vring[%d] not valid\n", i); 1041 return NULL; 1042 } 1043 } 1044 } 1045 1046 return NULL; 1047 } 1048 1049 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1050 struct sk_buff *skb); 1051 1052 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, 1053 struct sk_buff *skb) 1054 { 1055 struct vring *v; 1056 int i; 1057 u8 cid; 1058 struct vring_tx_data *txdata; 1059 1060 /* In the STA mode, it is expected to have only 1 VRING 1061 * for the AP we connected to. 1062 * find 1-st vring eligible for this skb and use it. 1063 */ 1064 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1065 v = &wil->vring_tx[i]; 1066 txdata = &wil->vring_tx_data[i]; 1067 if (!v->va || !txdata->enabled) 1068 continue; 1069 1070 cid = wil->vring2cid_tid[i][0]; 1071 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1072 continue; 1073 1074 if (!wil->vring_tx_data[i].dot1x_open && 1075 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1076 continue; 1077 1078 wil_dbg_txrx(wil, "Tx -> ring %d\n", i); 1079 1080 return v; 1081 } 1082 1083 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1084 1085 return NULL; 1086 } 1087 1088 /* Use one of 2 strategies: 1089 * 1090 * 1. New (real broadcast): 1091 * use dedicated broadcast vring 1092 * 2. Old (pseudo-DMS): 1093 * Find 1-st vring and return it; 1094 * duplicate skb and send it to other active vrings; 1095 * in all cases override dest address to unicast peer's address 1096 * Use old strategy when new is not supported yet: 1097 * - for PBSS 1098 */ 1099 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, 1100 struct sk_buff *skb) 1101 { 1102 struct vring *v; 1103 struct vring_tx_data *txdata; 1104 int i = wil->bcast_vring; 1105 1106 if (i < 0) 1107 return NULL; 1108 v = &wil->vring_tx[i]; 1109 txdata = &wil->vring_tx_data[i]; 1110 if (!v->va || !txdata->enabled) 1111 return NULL; 1112 if (!wil->vring_tx_data[i].dot1x_open && 1113 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1114 return NULL; 1115 1116 return v; 1117 } 1118 1119 static void wil_set_da_for_vring(struct wil6210_priv *wil, 1120 struct sk_buff *skb, int vring_index) 1121 { 1122 struct ethhdr *eth = (void *)skb->data; 1123 int cid = wil->vring2cid_tid[vring_index][0]; 1124 1125 ether_addr_copy(eth->h_dest, wil->sta[cid].addr); 1126 } 1127 1128 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, 1129 struct sk_buff *skb) 1130 { 1131 struct vring *v, *v2; 1132 struct sk_buff *skb2; 1133 int i; 1134 u8 cid; 1135 struct ethhdr *eth = (void *)skb->data; 1136 char *src = eth->h_source; 1137 struct vring_tx_data *txdata; 1138 1139 /* find 1-st vring eligible for data */ 1140 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1141 v = &wil->vring_tx[i]; 1142 txdata = &wil->vring_tx_data[i]; 1143 if (!v->va || !txdata->enabled) 1144 continue; 1145 1146 cid = wil->vring2cid_tid[i][0]; 1147 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1148 continue; 1149 if (!wil->vring_tx_data[i].dot1x_open && 1150 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1151 continue; 1152 1153 /* don't Tx back to source when re-routing Rx->Tx at the AP */ 1154 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1155 continue; 1156 1157 goto found; 1158 } 1159 1160 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1161 1162 return NULL; 1163 1164 found: 1165 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); 1166 wil_set_da_for_vring(wil, skb, i); 1167 1168 /* find other active vrings and duplicate skb for each */ 1169 for (i++; i < WIL6210_MAX_TX_RINGS; i++) { 1170 v2 = &wil->vring_tx[i]; 1171 if (!v2->va) 1172 continue; 1173 cid = wil->vring2cid_tid[i][0]; 1174 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1175 continue; 1176 if (!wil->vring_tx_data[i].dot1x_open && 1177 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1178 continue; 1179 1180 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1181 continue; 1182 1183 skb2 = skb_copy(skb, GFP_ATOMIC); 1184 if (skb2) { 1185 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); 1186 wil_set_da_for_vring(wil, skb2, i); 1187 wil_tx_vring(wil, v2, skb2); 1188 } else { 1189 wil_err(wil, "skb_copy failed\n"); 1190 } 1191 } 1192 1193 return v; 1194 } 1195 1196 static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil, 1197 struct sk_buff *skb) 1198 { 1199 struct wireless_dev *wdev = wil->wdev; 1200 1201 if (wdev->iftype != NL80211_IFTYPE_AP) 1202 return wil_find_tx_bcast_2(wil, skb); 1203 1204 return wil_find_tx_bcast_1(wil, skb); 1205 } 1206 1207 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, 1208 int vring_index) 1209 { 1210 wil_desc_addr_set(&d->dma.addr, pa); 1211 d->dma.ip_length = 0; 1212 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ 1213 d->dma.b11 = 0/*14 | BIT(7)*/; 1214 d->dma.error = 0; 1215 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 1216 d->dma.length = cpu_to_le16((u16)len); 1217 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); 1218 d->mac.d[0] = 0; 1219 d->mac.d[1] = 0; 1220 d->mac.d[2] = 0; 1221 d->mac.ucode_cmd = 0; 1222 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ 1223 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | 1224 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); 1225 1226 return 0; 1227 } 1228 1229 static inline 1230 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) 1231 { 1232 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); 1233 } 1234 1235 /** 1236 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding 1237 * @skb is used to obtain the protocol and headers length. 1238 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, 1239 * 2 - middle, 3 - last descriptor. 1240 */ 1241 1242 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, 1243 struct sk_buff *skb, 1244 int tso_desc_type, bool is_ipv4, 1245 int tcp_hdr_len, int skb_net_hdr_len) 1246 { 1247 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1248 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; 1249 1250 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1251 /* L4 header len: TCP header length */ 1252 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1253 1254 /* Setup TSO: bit and desc type */ 1255 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | 1256 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); 1257 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); 1258 1259 d->dma.ip_length = skb_net_hdr_len; 1260 /* Enable TCP/UDP checksum */ 1261 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1262 /* Calculate pseudo-header */ 1263 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1264 } 1265 1266 /** 1267 * Sets the descriptor @d up for csum. The corresponding 1268 * @skb is used to obtain the protocol and headers length. 1269 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. 1270 * Note, if d==NULL, the function only returns the protocol result. 1271 * 1272 * It is very similar to previous wil_tx_desc_offload_setup_tso. This 1273 * is "if unrolling" to optimize the critical path. 1274 */ 1275 1276 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, 1277 struct sk_buff *skb){ 1278 int protocol; 1279 1280 if (skb->ip_summed != CHECKSUM_PARTIAL) 1281 return 0; 1282 1283 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1284 1285 switch (skb->protocol) { 1286 case cpu_to_be16(ETH_P_IP): 1287 protocol = ip_hdr(skb)->protocol; 1288 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); 1289 break; 1290 case cpu_to_be16(ETH_P_IPV6): 1291 protocol = ipv6_hdr(skb)->nexthdr; 1292 break; 1293 default: 1294 return -EINVAL; 1295 } 1296 1297 switch (protocol) { 1298 case IPPROTO_TCP: 1299 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1300 /* L4 header len: TCP header length */ 1301 d->dma.d0 |= 1302 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1303 break; 1304 case IPPROTO_UDP: 1305 /* L4 header len: UDP header length */ 1306 d->dma.d0 |= 1307 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1308 break; 1309 default: 1310 return -EINVAL; 1311 } 1312 1313 d->dma.ip_length = skb_network_header_len(skb); 1314 /* Enable TCP/UDP checksum */ 1315 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1316 /* Calculate pseudo-header */ 1317 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1318 1319 return 0; 1320 } 1321 1322 static inline void wil_tx_last_desc(struct vring_tx_desc *d) 1323 { 1324 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | 1325 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | 1326 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1327 } 1328 1329 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) 1330 { 1331 d->dma.d0 |= wil_tso_type_lst << 1332 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; 1333 } 1334 1335 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, 1336 struct sk_buff *skb) 1337 { 1338 struct device *dev = wil_to_dev(wil); 1339 1340 /* point to descriptors in shared memory */ 1341 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, 1342 *_first_desc = NULL; 1343 1344 /* pointers to shadow descriptors */ 1345 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, 1346 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, 1347 *first_desc = &first_desc_mem; 1348 1349 /* pointer to shadow descriptors' context */ 1350 struct wil_ctx *hdr_ctx, *first_ctx = NULL; 1351 1352 int descs_used = 0; /* total number of used descriptors */ 1353 int sg_desc_cnt = 0; /* number of descriptors for current mss*/ 1354 1355 u32 swhead = vring->swhead; 1356 int used, avail = wil_vring_avail_tx(vring); 1357 int nr_frags = skb_shinfo(skb)->nr_frags; 1358 int min_desc_required = nr_frags + 1; 1359 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ 1360 int f, len, hdrlen, headlen; 1361 int vring_index = vring - wil->vring_tx; 1362 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1363 uint i = swhead; 1364 dma_addr_t pa; 1365 const skb_frag_t *frag = NULL; 1366 int rem_data = mss; 1367 int lenmss; 1368 int hdr_compensation_need = true; 1369 int desc_tso_type = wil_tso_type_first; 1370 bool is_ipv4; 1371 int tcp_hdr_len; 1372 int skb_net_hdr_len; 1373 int gso_type; 1374 int rc = -EINVAL; 1375 1376 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1377 __func__, skb->len, vring_index); 1378 1379 if (unlikely(!txdata->enabled)) 1380 return -EINVAL; 1381 1382 /* A typical page 4K is 3-4 payloads, we assume each fragment 1383 * is a full payload, that's how min_desc_required has been 1384 * calculated. In real we might need more or less descriptors, 1385 * this is the initial check only. 1386 */ 1387 if (unlikely(avail < min_desc_required)) { 1388 wil_err_ratelimited(wil, 1389 "TSO: Tx ring[%2d] full. No space for %d fragments\n", 1390 vring_index, min_desc_required); 1391 return -ENOMEM; 1392 } 1393 1394 /* Header Length = MAC header len + IP header len + TCP header len*/ 1395 hdrlen = ETH_HLEN + 1396 (int)skb_network_header_len(skb) + 1397 tcp_hdrlen(skb); 1398 1399 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); 1400 switch (gso_type) { 1401 case SKB_GSO_TCPV4: 1402 /* TCP v4, zero out the IP length and IPv4 checksum fields 1403 * as required by the offloading doc 1404 */ 1405 ip_hdr(skb)->tot_len = 0; 1406 ip_hdr(skb)->check = 0; 1407 is_ipv4 = true; 1408 break; 1409 case SKB_GSO_TCPV6: 1410 /* TCP v6, zero out the payload length */ 1411 ipv6_hdr(skb)->payload_len = 0; 1412 is_ipv4 = false; 1413 break; 1414 default: 1415 /* other than TCPv4 or TCPv6 types are not supported for TSO. 1416 * It is also illegal for both to be set simultaneously 1417 */ 1418 return -EINVAL; 1419 } 1420 1421 if (skb->ip_summed != CHECKSUM_PARTIAL) 1422 return -EINVAL; 1423 1424 /* tcp header length and skb network header length are fixed for all 1425 * packet's descriptors - read then once here 1426 */ 1427 tcp_hdr_len = tcp_hdrlen(skb); 1428 skb_net_hdr_len = skb_network_header_len(skb); 1429 1430 _hdr_desc = &vring->va[i].tx; 1431 1432 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); 1433 if (unlikely(dma_mapping_error(dev, pa))) { 1434 wil_err(wil, "TSO: Skb head DMA map error\n"); 1435 goto err_exit; 1436 } 1437 1438 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); 1439 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, 1440 tcp_hdr_len, skb_net_hdr_len); 1441 wil_tx_last_desc(hdr_desc); 1442 1443 vring->ctx[i].mapped_as = wil_mapped_as_single; 1444 hdr_ctx = &vring->ctx[i]; 1445 1446 descs_used++; 1447 headlen = skb_headlen(skb) - hdrlen; 1448 1449 for (f = headlen ? -1 : 0; f < nr_frags; f++) { 1450 if (headlen) { 1451 len = headlen; 1452 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", 1453 len); 1454 } else { 1455 frag = &skb_shinfo(skb)->frags[f]; 1456 len = frag->size; 1457 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); 1458 } 1459 1460 while (len) { 1461 wil_dbg_txrx(wil, 1462 "TSO: len %d, rem_data %d, descs_used %d\n", 1463 len, rem_data, descs_used); 1464 1465 if (descs_used == avail) { 1466 wil_err_ratelimited(wil, "TSO: ring overflow\n"); 1467 rc = -ENOMEM; 1468 goto mem_error; 1469 } 1470 1471 lenmss = min_t(int, rem_data, len); 1472 i = (swhead + descs_used) % vring->size; 1473 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); 1474 1475 if (!headlen) { 1476 pa = skb_frag_dma_map(dev, frag, 1477 frag->size - len, lenmss, 1478 DMA_TO_DEVICE); 1479 vring->ctx[i].mapped_as = wil_mapped_as_page; 1480 } else { 1481 pa = dma_map_single(dev, 1482 skb->data + 1483 skb_headlen(skb) - headlen, 1484 lenmss, 1485 DMA_TO_DEVICE); 1486 vring->ctx[i].mapped_as = wil_mapped_as_single; 1487 headlen -= lenmss; 1488 } 1489 1490 if (unlikely(dma_mapping_error(dev, pa))) { 1491 wil_err(wil, "TSO: DMA map page error\n"); 1492 goto mem_error; 1493 } 1494 1495 _desc = &vring->va[i].tx; 1496 1497 if (!_first_desc) { 1498 _first_desc = _desc; 1499 first_ctx = &vring->ctx[i]; 1500 d = first_desc; 1501 } else { 1502 d = &desc_mem; 1503 } 1504 1505 wil_tx_desc_map(d, pa, lenmss, vring_index); 1506 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, 1507 is_ipv4, tcp_hdr_len, 1508 skb_net_hdr_len); 1509 1510 /* use tso_type_first only once */ 1511 desc_tso_type = wil_tso_type_mid; 1512 1513 descs_used++; /* desc used so far */ 1514 sg_desc_cnt++; /* desc used for this segment */ 1515 len -= lenmss; 1516 rem_data -= lenmss; 1517 1518 wil_dbg_txrx(wil, 1519 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", 1520 len, rem_data, descs_used, sg_desc_cnt); 1521 1522 /* Close the segment if reached mss size or last frag*/ 1523 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { 1524 if (hdr_compensation_need) { 1525 /* first segment include hdr desc for 1526 * release 1527 */ 1528 hdr_ctx->nr_frags = sg_desc_cnt; 1529 wil_tx_desc_set_nr_frags(first_desc, 1530 sg_desc_cnt + 1531 1); 1532 hdr_compensation_need = false; 1533 } else { 1534 wil_tx_desc_set_nr_frags(first_desc, 1535 sg_desc_cnt); 1536 } 1537 first_ctx->nr_frags = sg_desc_cnt - 1; 1538 1539 wil_tx_last_desc(d); 1540 1541 /* first descriptor may also be the last 1542 * for this mss - make sure not to copy 1543 * it twice 1544 */ 1545 if (first_desc != d) 1546 *_first_desc = *first_desc; 1547 1548 /*last descriptor will be copied at the end 1549 * of this TS processing 1550 */ 1551 if (f < nr_frags - 1 || len > 0) 1552 *_desc = *d; 1553 1554 rem_data = mss; 1555 _first_desc = NULL; 1556 sg_desc_cnt = 0; 1557 } else if (first_desc != d) /* update mid descriptor */ 1558 *_desc = *d; 1559 } 1560 } 1561 1562 /* first descriptor may also be the last. 1563 * in this case d pointer is invalid 1564 */ 1565 if (_first_desc == _desc) 1566 d = first_desc; 1567 1568 /* Last data descriptor */ 1569 wil_set_tx_desc_last_tso(d); 1570 *_desc = *d; 1571 1572 /* Fill the total number of descriptors in first desc (hdr)*/ 1573 wil_tx_desc_set_nr_frags(hdr_desc, descs_used); 1574 *_hdr_desc = *hdr_desc; 1575 1576 /* hold reference to skb 1577 * to prevent skb release before accounting 1578 * in case of immediate "tx done" 1579 */ 1580 vring->ctx[i].skb = skb_get(skb); 1581 1582 /* performance monitoring */ 1583 used = wil_vring_used_tx(vring); 1584 if (wil_val_in_range(vring_idle_trsh, 1585 used, used + descs_used)) { 1586 txdata->idle += get_cycles() - txdata->last_idle; 1587 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1588 vring_index, used, used + descs_used); 1589 } 1590 1591 /* Make sure to advance the head only after descriptor update is done. 1592 * This will prevent a race condition where the completion thread 1593 * will see the DU bit set from previous run and will handle the 1594 * skb before it was completed. 1595 */ 1596 wmb(); 1597 1598 /* advance swhead */ 1599 wil_vring_advance_head(vring, descs_used); 1600 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1601 1602 /* make sure all writes to descriptors (shared memory) are done before 1603 * committing them to HW 1604 */ 1605 wmb(); 1606 1607 wil_w(wil, vring->hwtail, vring->swhead); 1608 return 0; 1609 1610 mem_error: 1611 while (descs_used > 0) { 1612 struct wil_ctx *ctx; 1613 1614 i = (swhead + descs_used - 1) % vring->size; 1615 d = (struct vring_tx_desc *)&vring->va[i].tx; 1616 _desc = &vring->va[i].tx; 1617 *d = *_desc; 1618 _desc->dma.status = TX_DMA_STATUS_DU; 1619 ctx = &vring->ctx[i]; 1620 wil_txdesc_unmap(dev, d, ctx); 1621 memset(ctx, 0, sizeof(*ctx)); 1622 descs_used--; 1623 } 1624 err_exit: 1625 return rc; 1626 } 1627 1628 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1629 struct sk_buff *skb) 1630 { 1631 struct device *dev = wil_to_dev(wil); 1632 struct vring_tx_desc dd, *d = ⅆ 1633 volatile struct vring_tx_desc *_d; 1634 u32 swhead = vring->swhead; 1635 int avail = wil_vring_avail_tx(vring); 1636 int nr_frags = skb_shinfo(skb)->nr_frags; 1637 uint f = 0; 1638 int vring_index = vring - wil->vring_tx; 1639 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1640 uint i = swhead; 1641 dma_addr_t pa; 1642 int used; 1643 bool mcast = (vring_index == wil->bcast_vring); 1644 uint len = skb_headlen(skb); 1645 1646 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1647 __func__, skb->len, vring_index); 1648 1649 if (unlikely(!txdata->enabled)) 1650 return -EINVAL; 1651 1652 if (unlikely(avail < 1 + nr_frags)) { 1653 wil_err_ratelimited(wil, 1654 "Tx ring[%2d] full. No space for %d fragments\n", 1655 vring_index, 1 + nr_frags); 1656 return -ENOMEM; 1657 } 1658 _d = &vring->va[i].tx; 1659 1660 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1661 1662 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, 1663 skb_headlen(skb), skb->data, &pa); 1664 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, 1665 skb->data, skb_headlen(skb), false); 1666 1667 if (unlikely(dma_mapping_error(dev, pa))) 1668 return -EINVAL; 1669 vring->ctx[i].mapped_as = wil_mapped_as_single; 1670 /* 1-st segment */ 1671 wil_tx_desc_map(d, pa, len, vring_index); 1672 if (unlikely(mcast)) { 1673 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ 1674 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ 1675 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); 1676 } 1677 /* Process TCP/UDP checksum offloading */ 1678 if (unlikely(wil_tx_desc_offload_setup(d, skb))) { 1679 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", 1680 vring_index); 1681 goto dma_error; 1682 } 1683 1684 vring->ctx[i].nr_frags = nr_frags; 1685 wil_tx_desc_set_nr_frags(d, nr_frags + 1); 1686 1687 /* middle segments */ 1688 for (; f < nr_frags; f++) { 1689 const struct skb_frag_struct *frag = 1690 &skb_shinfo(skb)->frags[f]; 1691 int len = skb_frag_size(frag); 1692 1693 *_d = *d; 1694 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1695 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1696 (const void *)d, sizeof(*d), false); 1697 i = (swhead + f + 1) % vring->size; 1698 _d = &vring->va[i].tx; 1699 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1700 DMA_TO_DEVICE); 1701 if (unlikely(dma_mapping_error(dev, pa))) { 1702 wil_err(wil, "Tx[%2d] failed to map fragment\n", 1703 vring_index); 1704 goto dma_error; 1705 } 1706 vring->ctx[i].mapped_as = wil_mapped_as_page; 1707 wil_tx_desc_map(d, pa, len, vring_index); 1708 /* no need to check return code - 1709 * if it succeeded for 1-st descriptor, 1710 * it will succeed here too 1711 */ 1712 wil_tx_desc_offload_setup(d, skb); 1713 } 1714 /* for the last seg only */ 1715 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); 1716 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); 1717 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1718 *_d = *d; 1719 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1720 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1721 (const void *)d, sizeof(*d), false); 1722 1723 /* hold reference to skb 1724 * to prevent skb release before accounting 1725 * in case of immediate "tx done" 1726 */ 1727 vring->ctx[i].skb = skb_get(skb); 1728 1729 /* performance monitoring */ 1730 used = wil_vring_used_tx(vring); 1731 if (wil_val_in_range(vring_idle_trsh, 1732 used, used + nr_frags + 1)) { 1733 txdata->idle += get_cycles() - txdata->last_idle; 1734 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1735 vring_index, used, used + nr_frags + 1); 1736 } 1737 1738 /* Make sure to advance the head only after descriptor update is done. 1739 * This will prevent a race condition where the completion thread 1740 * will see the DU bit set from previous run and will handle the 1741 * skb before it was completed. 1742 */ 1743 wmb(); 1744 1745 /* advance swhead */ 1746 wil_vring_advance_head(vring, nr_frags + 1); 1747 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, 1748 vring->swhead); 1749 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); 1750 1751 /* make sure all writes to descriptors (shared memory) are done before 1752 * committing them to HW 1753 */ 1754 wmb(); 1755 1756 wil_w(wil, vring->hwtail, vring->swhead); 1757 1758 return 0; 1759 dma_error: 1760 /* unmap what we have mapped */ 1761 nr_frags = f + 1; /* frags mapped + one for skb head */ 1762 for (f = 0; f < nr_frags; f++) { 1763 struct wil_ctx *ctx; 1764 1765 i = (swhead + f) % vring->size; 1766 ctx = &vring->ctx[i]; 1767 _d = &vring->va[i].tx; 1768 *d = *_d; 1769 _d->dma.status = TX_DMA_STATUS_DU; 1770 wil_txdesc_unmap(dev, d, ctx); 1771 1772 memset(ctx, 0, sizeof(*ctx)); 1773 } 1774 1775 return -EINVAL; 1776 } 1777 1778 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1779 struct sk_buff *skb) 1780 { 1781 int vring_index = vring - wil->vring_tx; 1782 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1783 int rc; 1784 1785 spin_lock(&txdata->lock); 1786 1787 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) 1788 (wil, vring, skb); 1789 1790 spin_unlock(&txdata->lock); 1791 1792 return rc; 1793 } 1794 1795 /** 1796 * Check status of tx vrings and stop/wake net queues if needed 1797 * 1798 * This function does one of two checks: 1799 * In case check_stop is true, will check if net queues need to be stopped. If 1800 * the conditions for stopping are met, netif_tx_stop_all_queues() is called. 1801 * In case check_stop is false, will check if net queues need to be waked. If 1802 * the conditions for waking are met, netif_tx_wake_all_queues() is called. 1803 * vring is the vring which is currently being modified by either adding 1804 * descriptors (tx) into it or removing descriptors (tx complete) from it. Can 1805 * be null when irrelevant (e.g. connect/disconnect events). 1806 * 1807 * The implementation is to stop net queues if modified vring has low 1808 * descriptor availability. Wake if all vrings are not in low descriptor 1809 * availability and modified vring has high descriptor availability. 1810 */ 1811 static inline void __wil_update_net_queues(struct wil6210_priv *wil, 1812 struct vring *vring, 1813 bool check_stop) 1814 { 1815 int i; 1816 1817 if (vring) 1818 wil_dbg_txrx(wil, "vring %d, check_stop=%d, stopped=%d", 1819 (int)(vring - wil->vring_tx), check_stop, 1820 wil->net_queue_stopped); 1821 else 1822 wil_dbg_txrx(wil, "check_stop=%d, stopped=%d", 1823 check_stop, wil->net_queue_stopped); 1824 1825 if (check_stop == wil->net_queue_stopped) 1826 /* net queues already in desired state */ 1827 return; 1828 1829 if (check_stop) { 1830 if (!vring || unlikely(wil_vring_avail_low(vring))) { 1831 /* not enough room in the vring */ 1832 netif_tx_stop_all_queues(wil_to_ndev(wil)); 1833 wil->net_queue_stopped = true; 1834 wil_dbg_txrx(wil, "netif_tx_stop called\n"); 1835 } 1836 return; 1837 } 1838 1839 /* check wake */ 1840 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1841 struct vring *cur_vring = &wil->vring_tx[i]; 1842 struct vring_tx_data *txdata = &wil->vring_tx_data[i]; 1843 1844 if (!cur_vring->va || !txdata->enabled || cur_vring == vring) 1845 continue; 1846 1847 if (wil_vring_avail_low(cur_vring)) { 1848 wil_dbg_txrx(wil, "vring %d full, can't wake\n", 1849 (int)(cur_vring - wil->vring_tx)); 1850 return; 1851 } 1852 } 1853 1854 if (!vring || wil_vring_avail_high(vring)) { 1855 /* enough room in the vring */ 1856 wil_dbg_txrx(wil, "calling netif_tx_wake\n"); 1857 netif_tx_wake_all_queues(wil_to_ndev(wil)); 1858 wil->net_queue_stopped = false; 1859 } 1860 } 1861 1862 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 1863 bool check_stop) 1864 { 1865 spin_lock(&wil->net_queue_lock); 1866 __wil_update_net_queues(wil, vring, check_stop); 1867 spin_unlock(&wil->net_queue_lock); 1868 } 1869 1870 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 1871 bool check_stop) 1872 { 1873 spin_lock_bh(&wil->net_queue_lock); 1874 __wil_update_net_queues(wil, vring, check_stop); 1875 spin_unlock_bh(&wil->net_queue_lock); 1876 } 1877 1878 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) 1879 { 1880 struct wil6210_priv *wil = ndev_to_wil(ndev); 1881 struct ethhdr *eth = (void *)skb->data; 1882 bool bcast = is_multicast_ether_addr(eth->h_dest); 1883 struct vring *vring; 1884 static bool pr_once_fw; 1885 int rc; 1886 1887 wil_dbg_txrx(wil, "%s()\n", __func__); 1888 if (unlikely(!test_bit(wil_status_fwready, wil->status))) { 1889 if (!pr_once_fw) { 1890 wil_err(wil, "FW not ready\n"); 1891 pr_once_fw = true; 1892 } 1893 goto drop; 1894 } 1895 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { 1896 wil_dbg_ratelimited(wil, "FW not connected, packet dropped\n"); 1897 goto drop; 1898 } 1899 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { 1900 wil_err(wil, "Xmit in monitor mode not supported\n"); 1901 goto drop; 1902 } 1903 pr_once_fw = false; 1904 1905 /* find vring */ 1906 if (wil->wdev->iftype == NL80211_IFTYPE_STATION) { 1907 /* in STA mode (ESS), all to same VRING */ 1908 vring = wil_find_tx_vring_sta(wil, skb); 1909 } else { /* direct communication, find matching VRING */ 1910 vring = bcast ? wil_find_tx_bcast(wil, skb) : 1911 wil_find_tx_ucast(wil, skb); 1912 } 1913 if (unlikely(!vring)) { 1914 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); 1915 goto drop; 1916 } 1917 /* set up vring entry */ 1918 rc = wil_tx_vring(wil, vring, skb); 1919 1920 switch (rc) { 1921 case 0: 1922 /* shall we stop net queues? */ 1923 wil_update_net_queues_bh(wil, vring, true); 1924 /* statistics will be updated on the tx_complete */ 1925 dev_kfree_skb_any(skb); 1926 return NETDEV_TX_OK; 1927 case -ENOMEM: 1928 return NETDEV_TX_BUSY; 1929 default: 1930 break; /* goto drop; */ 1931 } 1932 drop: 1933 ndev->stats.tx_dropped++; 1934 dev_kfree_skb_any(skb); 1935 1936 return NET_XMIT_DROP; 1937 } 1938 1939 static inline bool wil_need_txstat(struct sk_buff *skb) 1940 { 1941 struct ethhdr *eth = (void *)skb->data; 1942 1943 return is_unicast_ether_addr(eth->h_dest) && skb->sk && 1944 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 1945 } 1946 1947 static inline void wil_consume_skb(struct sk_buff *skb, bool acked) 1948 { 1949 if (unlikely(wil_need_txstat(skb))) 1950 skb_complete_wifi_ack(skb, acked); 1951 else 1952 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); 1953 } 1954 1955 /** 1956 * Clean up transmitted skb's from the Tx VRING 1957 * 1958 * Return number of descriptors cleared 1959 * 1960 * Safe to call from IRQ 1961 */ 1962 int wil_tx_complete(struct wil6210_priv *wil, int ringid) 1963 { 1964 struct net_device *ndev = wil_to_ndev(wil); 1965 struct device *dev = wil_to_dev(wil); 1966 struct vring *vring = &wil->vring_tx[ringid]; 1967 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; 1968 int done = 0; 1969 int cid = wil->vring2cid_tid[ringid][0]; 1970 struct wil_net_stats *stats = NULL; 1971 volatile struct vring_tx_desc *_d; 1972 int used_before_complete; 1973 int used_new; 1974 1975 if (unlikely(!vring->va)) { 1976 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); 1977 return 0; 1978 } 1979 1980 if (unlikely(!txdata->enabled)) { 1981 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); 1982 return 0; 1983 } 1984 1985 wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid); 1986 1987 used_before_complete = wil_vring_used_tx(vring); 1988 1989 if (cid < WIL6210_MAX_CID) 1990 stats = &wil->sta[cid].stats; 1991 1992 while (!wil_vring_is_empty(vring)) { 1993 int new_swtail; 1994 struct wil_ctx *ctx = &vring->ctx[vring->swtail]; 1995 /** 1996 * For the fragmented skb, HW will set DU bit only for the 1997 * last fragment. look for it. 1998 * In TSO the first DU will include hdr desc 1999 */ 2000 int lf = (vring->swtail + ctx->nr_frags) % vring->size; 2001 /* TODO: check we are not past head */ 2002 2003 _d = &vring->va[lf].tx; 2004 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) 2005 break; 2006 2007 new_swtail = (lf + 1) % vring->size; 2008 while (vring->swtail != new_swtail) { 2009 struct vring_tx_desc dd, *d = ⅆ 2010 u16 dmalen; 2011 struct sk_buff *skb; 2012 2013 ctx = &vring->ctx[vring->swtail]; 2014 skb = ctx->skb; 2015 _d = &vring->va[vring->swtail].tx; 2016 2017 *d = *_d; 2018 2019 dmalen = le16_to_cpu(d->dma.length); 2020 trace_wil6210_tx_done(ringid, vring->swtail, dmalen, 2021 d->dma.error); 2022 wil_dbg_txrx(wil, 2023 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", 2024 ringid, vring->swtail, dmalen, 2025 d->dma.status, d->dma.error); 2026 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, 2027 (const void *)d, sizeof(*d), false); 2028 2029 wil_txdesc_unmap(dev, d, ctx); 2030 2031 if (skb) { 2032 if (likely(d->dma.error == 0)) { 2033 ndev->stats.tx_packets++; 2034 ndev->stats.tx_bytes += skb->len; 2035 if (stats) { 2036 stats->tx_packets++; 2037 stats->tx_bytes += skb->len; 2038 } 2039 } else { 2040 ndev->stats.tx_errors++; 2041 if (stats) 2042 stats->tx_errors++; 2043 } 2044 wil_consume_skb(skb, d->dma.error == 0); 2045 } 2046 memset(ctx, 0, sizeof(*ctx)); 2047 /* Make sure the ctx is zeroed before updating the tail 2048 * to prevent a case where wil_tx_vring will see 2049 * this descriptor as used and handle it before ctx zero 2050 * is completed. 2051 */ 2052 wmb(); 2053 /* There is no need to touch HW descriptor: 2054 * - ststus bit TX_DMA_STATUS_DU is set by design, 2055 * so hardware will not try to process this desc., 2056 * - rest of descriptor will be initialized on Tx. 2057 */ 2058 vring->swtail = wil_vring_next_tail(vring); 2059 done++; 2060 } 2061 } 2062 2063 /* performance monitoring */ 2064 used_new = wil_vring_used_tx(vring); 2065 if (wil_val_in_range(vring_idle_trsh, 2066 used_new, used_before_complete)) { 2067 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", 2068 ringid, used_before_complete, used_new); 2069 txdata->last_idle = get_cycles(); 2070 } 2071 2072 /* shall we wake net queues? */ 2073 if (done) 2074 wil_update_net_queues(wil, vring, false); 2075 2076 return done; 2077 } 2078