1 /* 2 * Copyright (c) 2012-2015 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/etherdevice.h> 18 #include <net/ieee80211_radiotap.h> 19 #include <linux/if_arp.h> 20 #include <linux/moduleparam.h> 21 #include <linux/ip.h> 22 #include <linux/ipv6.h> 23 #include <net/ipv6.h> 24 #include <linux/prefetch.h> 25 26 #include "wil6210.h" 27 #include "wmi.h" 28 #include "txrx.h" 29 #include "trace.h" 30 31 static bool rtap_include_phy_info; 32 module_param(rtap_include_phy_info, bool, S_IRUGO); 33 MODULE_PARM_DESC(rtap_include_phy_info, 34 " Include PHY info in the radiotap header, default - no"); 35 36 bool rx_align_2; 37 module_param(rx_align_2, bool, S_IRUGO); 38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); 39 40 static inline uint wil_rx_snaplen(void) 41 { 42 return rx_align_2 ? 6 : 0; 43 } 44 45 static inline int wil_vring_is_empty(struct vring *vring) 46 { 47 return vring->swhead == vring->swtail; 48 } 49 50 static inline u32 wil_vring_next_tail(struct vring *vring) 51 { 52 return (vring->swtail + 1) % vring->size; 53 } 54 55 static inline void wil_vring_advance_head(struct vring *vring, int n) 56 { 57 vring->swhead = (vring->swhead + n) % vring->size; 58 } 59 60 static inline int wil_vring_is_full(struct vring *vring) 61 { 62 return wil_vring_next_tail(vring) == vring->swhead; 63 } 64 65 /* Used space in Tx Vring */ 66 static inline int wil_vring_used_tx(struct vring *vring) 67 { 68 u32 swhead = vring->swhead; 69 u32 swtail = vring->swtail; 70 return (vring->size + swhead - swtail) % vring->size; 71 } 72 73 /* Available space in Tx Vring */ 74 static inline int wil_vring_avail_tx(struct vring *vring) 75 { 76 return vring->size - wil_vring_used_tx(vring) - 1; 77 } 78 79 /* wil_vring_wmark_low - low watermark for available descriptor space */ 80 static inline int wil_vring_wmark_low(struct vring *vring) 81 { 82 return vring->size/8; 83 } 84 85 /* wil_vring_wmark_high - high watermark for available descriptor space */ 86 static inline int wil_vring_wmark_high(struct vring *vring) 87 { 88 return vring->size/4; 89 } 90 91 /* wil_val_in_range - check if value in [min,max) */ 92 static inline bool wil_val_in_range(int val, int min, int max) 93 { 94 return val >= min && val < max; 95 } 96 97 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) 98 { 99 struct device *dev = wil_to_dev(wil); 100 size_t sz = vring->size * sizeof(vring->va[0]); 101 uint i; 102 103 wil_dbg_misc(wil, "%s()\n", __func__); 104 105 BUILD_BUG_ON(sizeof(vring->va[0]) != 32); 106 107 vring->swhead = 0; 108 vring->swtail = 0; 109 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); 110 if (!vring->ctx) { 111 vring->va = NULL; 112 return -ENOMEM; 113 } 114 /* vring->va should be aligned on its size rounded up to power of 2 115 * This is granted by the dma_alloc_coherent 116 */ 117 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); 118 if (!vring->va) { 119 kfree(vring->ctx); 120 vring->ctx = NULL; 121 return -ENOMEM; 122 } 123 /* initially, all descriptors are SW owned 124 * For Tx and Rx, ownership bit is at the same location, thus 125 * we can use any 126 */ 127 for (i = 0; i < vring->size; i++) { 128 volatile struct vring_tx_desc *_d = &vring->va[i].tx; 129 130 _d->dma.status = TX_DMA_STATUS_DU; 131 } 132 133 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, 134 vring->va, &vring->pa, vring->ctx); 135 136 return 0; 137 } 138 139 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, 140 struct wil_ctx *ctx) 141 { 142 dma_addr_t pa = wil_desc_addr(&d->dma.addr); 143 u16 dmalen = le16_to_cpu(d->dma.length); 144 145 switch (ctx->mapped_as) { 146 case wil_mapped_as_single: 147 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); 148 break; 149 case wil_mapped_as_page: 150 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); 151 break; 152 default: 153 break; 154 } 155 } 156 157 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, 158 int tx) 159 { 160 struct device *dev = wil_to_dev(wil); 161 size_t sz = vring->size * sizeof(vring->va[0]); 162 163 if (tx) { 164 int vring_index = vring - wil->vring_tx; 165 166 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", 167 vring_index, vring->size, vring->va, 168 &vring->pa, vring->ctx); 169 } else { 170 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", 171 vring->size, vring->va, 172 &vring->pa, vring->ctx); 173 } 174 175 while (!wil_vring_is_empty(vring)) { 176 dma_addr_t pa; 177 u16 dmalen; 178 struct wil_ctx *ctx; 179 180 if (tx) { 181 struct vring_tx_desc dd, *d = ⅆ 182 volatile struct vring_tx_desc *_d = 183 &vring->va[vring->swtail].tx; 184 185 ctx = &vring->ctx[vring->swtail]; 186 *d = *_d; 187 wil_txdesc_unmap(dev, d, ctx); 188 if (ctx->skb) 189 dev_kfree_skb_any(ctx->skb); 190 vring->swtail = wil_vring_next_tail(vring); 191 } else { /* rx */ 192 struct vring_rx_desc dd, *d = ⅆ 193 volatile struct vring_rx_desc *_d = 194 &vring->va[vring->swhead].rx; 195 196 ctx = &vring->ctx[vring->swhead]; 197 *d = *_d; 198 pa = wil_desc_addr(&d->dma.addr); 199 dmalen = le16_to_cpu(d->dma.length); 200 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); 201 kfree_skb(ctx->skb); 202 wil_vring_advance_head(vring, 1); 203 } 204 } 205 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); 206 kfree(vring->ctx); 207 vring->pa = 0; 208 vring->va = NULL; 209 vring->ctx = NULL; 210 } 211 212 /** 213 * Allocate one skb for Rx VRING 214 * 215 * Safe to call from IRQ 216 */ 217 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, 218 u32 i, int headroom) 219 { 220 struct device *dev = wil_to_dev(wil); 221 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); 222 struct vring_rx_desc dd, *d = ⅆ 223 volatile struct vring_rx_desc *_d = &vring->va[i].rx; 224 dma_addr_t pa; 225 struct sk_buff *skb = dev_alloc_skb(sz + headroom); 226 227 if (unlikely(!skb)) 228 return -ENOMEM; 229 230 skb_reserve(skb, headroom); 231 skb_put(skb, sz); 232 233 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); 234 if (unlikely(dma_mapping_error(dev, pa))) { 235 kfree_skb(skb); 236 return -ENOMEM; 237 } 238 239 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; 240 wil_desc_addr_set(&d->dma.addr, pa); 241 /* ip_length don't care */ 242 /* b11 don't care */ 243 /* error don't care */ 244 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 245 d->dma.length = cpu_to_le16(sz); 246 *_d = *d; 247 vring->ctx[i].skb = skb; 248 249 return 0; 250 } 251 252 /** 253 * Adds radiotap header 254 * 255 * Any error indicated as "Bad FCS" 256 * 257 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: 258 * - Rx descriptor: 32 bytes 259 * - Phy info 260 */ 261 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, 262 struct sk_buff *skb) 263 { 264 struct wireless_dev *wdev = wil->wdev; 265 struct wil6210_rtap { 266 struct ieee80211_radiotap_header rthdr; 267 /* fields should be in the order of bits in rthdr.it_present */ 268 /* flags */ 269 u8 flags; 270 /* channel */ 271 __le16 chnl_freq __aligned(2); 272 __le16 chnl_flags; 273 /* MCS */ 274 u8 mcs_present; 275 u8 mcs_flags; 276 u8 mcs_index; 277 } __packed; 278 struct wil6210_rtap_vendor { 279 struct wil6210_rtap rtap; 280 /* vendor */ 281 u8 vendor_oui[3] __aligned(2); 282 u8 vendor_ns; 283 __le16 vendor_skip; 284 u8 vendor_data[0]; 285 } __packed; 286 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 287 struct wil6210_rtap_vendor *rtap_vendor; 288 int rtap_len = sizeof(struct wil6210_rtap); 289 int phy_length = 0; /* phy info header size, bytes */ 290 static char phy_data[128]; 291 struct ieee80211_channel *ch = wdev->preset_chandef.chan; 292 293 if (rtap_include_phy_info) { 294 rtap_len = sizeof(*rtap_vendor) + sizeof(*d); 295 /* calculate additional length */ 296 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { 297 /** 298 * PHY info starts from 8-byte boundary 299 * there are 8-byte lines, last line may be partially 300 * written (HW bug), thus FW configures for last line 301 * to be excessive. Driver skips this last line. 302 */ 303 int len = min_t(int, 8 + sizeof(phy_data), 304 wil_rxdesc_phy_length(d)); 305 306 if (len > 8) { 307 void *p = skb_tail_pointer(skb); 308 void *pa = PTR_ALIGN(p, 8); 309 310 if (skb_tailroom(skb) >= len + (pa - p)) { 311 phy_length = len - 8; 312 memcpy(phy_data, pa, phy_length); 313 } 314 } 315 } 316 rtap_len += phy_length; 317 } 318 319 if (skb_headroom(skb) < rtap_len && 320 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { 321 wil_err(wil, "Unable to expand headrom to %d\n", rtap_len); 322 return; 323 } 324 325 rtap_vendor = (void *)skb_push(skb, rtap_len); 326 memset(rtap_vendor, 0, rtap_len); 327 328 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; 329 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); 330 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( 331 (1 << IEEE80211_RADIOTAP_FLAGS) | 332 (1 << IEEE80211_RADIOTAP_CHANNEL) | 333 (1 << IEEE80211_RADIOTAP_MCS)); 334 if (d->dma.status & RX_DMA_STATUS_ERROR) 335 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; 336 337 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); 338 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); 339 340 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; 341 rtap_vendor->rtap.mcs_flags = 0; 342 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); 343 344 if (rtap_include_phy_info) { 345 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << 346 IEEE80211_RADIOTAP_VENDOR_NAMESPACE); 347 /* OUI for Wilocity 04:ce:14 */ 348 rtap_vendor->vendor_oui[0] = 0x04; 349 rtap_vendor->vendor_oui[1] = 0xce; 350 rtap_vendor->vendor_oui[2] = 0x14; 351 rtap_vendor->vendor_ns = 1; 352 /* Rx descriptor + PHY data */ 353 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + 354 phy_length); 355 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); 356 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, 357 phy_length); 358 } 359 } 360 361 /* similar to ieee80211_ version, but FC contain only 1-st byte */ 362 static inline int wil_is_back_req(u8 fc) 363 { 364 return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == 365 (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ); 366 } 367 368 /** 369 * reap 1 frame from @swhead 370 * 371 * Rx descriptor copied to skb->cb 372 * 373 * Safe to call from IRQ 374 */ 375 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, 376 struct vring *vring) 377 { 378 struct device *dev = wil_to_dev(wil); 379 struct net_device *ndev = wil_to_ndev(wil); 380 volatile struct vring_rx_desc *_d; 381 struct vring_rx_desc *d; 382 struct sk_buff *skb; 383 dma_addr_t pa; 384 unsigned int snaplen = wil_rx_snaplen(); 385 unsigned int sz = mtu_max + ETH_HLEN + snaplen; 386 u16 dmalen; 387 u8 ftype; 388 int cid; 389 int i; 390 struct wil_net_stats *stats; 391 392 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); 393 394 again: 395 if (unlikely(wil_vring_is_empty(vring))) 396 return NULL; 397 398 i = (int)vring->swhead; 399 _d = &vring->va[i].rx; 400 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { 401 /* it is not error, we just reached end of Rx done area */ 402 return NULL; 403 } 404 405 skb = vring->ctx[i].skb; 406 vring->ctx[i].skb = NULL; 407 wil_vring_advance_head(vring, 1); 408 if (!skb) { 409 wil_err(wil, "No Rx skb at [%d]\n", i); 410 goto again; 411 } 412 d = wil_skb_rxdesc(skb); 413 *d = *_d; 414 pa = wil_desc_addr(&d->dma.addr); 415 416 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); 417 dmalen = le16_to_cpu(d->dma.length); 418 419 trace_wil6210_rx(i, d); 420 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); 421 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 422 (const void *)d, sizeof(*d), false); 423 424 cid = wil_rxdesc_cid(d); 425 stats = &wil->sta[cid].stats; 426 427 if (unlikely(dmalen > sz)) { 428 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); 429 stats->rx_large_frame++; 430 kfree_skb(skb); 431 goto again; 432 } 433 skb_trim(skb, dmalen); 434 435 prefetch(skb->data); 436 437 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 438 skb->data, skb_headlen(skb), false); 439 440 stats->last_mcs_rx = wil_rxdesc_mcs(d); 441 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) 442 stats->rx_per_mcs[stats->last_mcs_rx]++; 443 444 /* use radiotap header only if required */ 445 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) 446 wil_rx_add_radiotap_header(wil, skb); 447 448 /* no extra checks if in sniffer mode */ 449 if (ndev->type != ARPHRD_ETHER) 450 return skb; 451 /* Non-data frames may be delivered through Rx DMA channel (ex: BAR) 452 * Driver should recognize it by frame type, that is found 453 * in Rx descriptor. If type is not data, it is 802.11 frame as is 454 */ 455 ftype = wil_rxdesc_ftype(d) << 2; 456 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { 457 u8 fc1 = wil_rxdesc_fc1(d); 458 int mid = wil_rxdesc_mid(d); 459 int tid = wil_rxdesc_tid(d); 460 u16 seq = wil_rxdesc_seq(d); 461 462 wil_dbg_txrx(wil, 463 "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 464 fc1, mid, cid, tid, seq); 465 stats->rx_non_data_frame++; 466 if (wil_is_back_req(fc1)) { 467 wil_dbg_txrx(wil, 468 "BAR: MID %d CID %d TID %d Seq 0x%03x\n", 469 mid, cid, tid, seq); 470 wil_rx_bar(wil, cid, tid, seq); 471 } else { 472 /* print again all info. One can enable only this 473 * without overhead for printing every Rx frame 474 */ 475 wil_dbg_txrx(wil, 476 "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 477 fc1, mid, cid, tid, seq); 478 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 479 (const void *)d, sizeof(*d), false); 480 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 481 skb->data, skb_headlen(skb), false); 482 } 483 kfree_skb(skb); 484 goto again; 485 } 486 487 if (unlikely(skb->len < ETH_HLEN + snaplen)) { 488 wil_err(wil, "Short frame, len = %d\n", skb->len); 489 stats->rx_short_frame++; 490 kfree_skb(skb); 491 goto again; 492 } 493 494 /* L4 IDENT is on when HW calculated checksum, check status 495 * and in case of error drop the packet 496 * higher stack layers will handle retransmission (if required) 497 */ 498 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { 499 /* L4 protocol identified, csum calculated */ 500 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) 501 skb->ip_summed = CHECKSUM_UNNECESSARY; 502 /* If HW reports bad checksum, let IP stack re-check it 503 * For example, HW don't understand Microsoft IP stack that 504 * mis-calculates TCP checksum - if it should be 0x0, 505 * it writes 0xffff in violation of RFC 1624 506 */ 507 } 508 509 if (snaplen) { 510 /* Packet layout 511 * +-------+-------+---------+------------+------+ 512 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | 513 * +-------+-------+---------+------------+------+ 514 * Need to remove SNAP, shifting SA and DA forward 515 */ 516 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); 517 skb_pull(skb, snaplen); 518 } 519 520 return skb; 521 } 522 523 /** 524 * allocate and fill up to @count buffers in rx ring 525 * buffers posted at @swtail 526 */ 527 static int wil_rx_refill(struct wil6210_priv *wil, int count) 528 { 529 struct net_device *ndev = wil_to_ndev(wil); 530 struct vring *v = &wil->vring_rx; 531 u32 next_tail; 532 int rc = 0; 533 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? 534 WIL6210_RTAP_SIZE : 0; 535 536 for (; next_tail = wil_vring_next_tail(v), 537 (next_tail != v->swhead) && (count-- > 0); 538 v->swtail = next_tail) { 539 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); 540 if (unlikely(rc)) { 541 wil_err(wil, "Error %d in wil_rx_refill[%d]\n", 542 rc, v->swtail); 543 break; 544 } 545 } 546 wil_w(wil, v->hwtail, v->swtail); 547 548 return rc; 549 } 550 551 /* 552 * Pass Rx packet to the netif. Update statistics. 553 * Called in softirq context (NAPI poll). 554 */ 555 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) 556 { 557 gro_result_t rc = GRO_NORMAL; 558 struct wil6210_priv *wil = ndev_to_wil(ndev); 559 struct wireless_dev *wdev = wil_to_wdev(wil); 560 unsigned int len = skb->len; 561 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 562 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ 563 struct ethhdr *eth = (void *)skb->data; 564 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication 565 * is not suitable, need to look at data 566 */ 567 int mcast = is_multicast_ether_addr(eth->h_dest); 568 struct wil_net_stats *stats = &wil->sta[cid].stats; 569 struct sk_buff *xmit_skb = NULL; 570 static const char * const gro_res_str[] = { 571 [GRO_MERGED] = "GRO_MERGED", 572 [GRO_MERGED_FREE] = "GRO_MERGED_FREE", 573 [GRO_HELD] = "GRO_HELD", 574 [GRO_NORMAL] = "GRO_NORMAL", 575 [GRO_DROP] = "GRO_DROP", 576 }; 577 578 if (ndev->features & NETIF_F_RXHASH) 579 /* fake L4 to ensure it won't be re-calculated later 580 * set hash to any non-zero value to activate rps 581 * mechanism, core will be chosen according 582 * to user-level rps configuration. 583 */ 584 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); 585 586 skb_orphan(skb); 587 588 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { 589 if (mcast) { 590 /* send multicast frames both to higher layers in 591 * local net stack and back to the wireless medium 592 */ 593 xmit_skb = skb_copy(skb, GFP_ATOMIC); 594 } else { 595 int xmit_cid = wil_find_cid(wil, eth->h_dest); 596 597 if (xmit_cid >= 0) { 598 /* The destination station is associated to 599 * this AP (in this VLAN), so send the frame 600 * directly to it and do not pass it to local 601 * net stack. 602 */ 603 xmit_skb = skb; 604 skb = NULL; 605 } 606 } 607 } 608 if (xmit_skb) { 609 /* Send to wireless media and increase priority by 256 to 610 * keep the received priority instead of reclassifying 611 * the frame (see cfg80211_classify8021d). 612 */ 613 xmit_skb->dev = ndev; 614 xmit_skb->priority += 256; 615 xmit_skb->protocol = htons(ETH_P_802_3); 616 skb_reset_network_header(xmit_skb); 617 skb_reset_mac_header(xmit_skb); 618 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); 619 dev_queue_xmit(xmit_skb); 620 } 621 622 if (skb) { /* deliver to local stack */ 623 624 skb->protocol = eth_type_trans(skb, ndev); 625 rc = napi_gro_receive(&wil->napi_rx, skb); 626 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", 627 len, gro_res_str[rc]); 628 } 629 /* statistics. rc set to GRO_NORMAL for AP bridging */ 630 if (unlikely(rc == GRO_DROP)) { 631 ndev->stats.rx_dropped++; 632 stats->rx_dropped++; 633 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); 634 } else { 635 ndev->stats.rx_packets++; 636 stats->rx_packets++; 637 ndev->stats.rx_bytes += len; 638 stats->rx_bytes += len; 639 if (mcast) 640 ndev->stats.multicast++; 641 } 642 } 643 644 /** 645 * Proceed all completed skb's from Rx VRING 646 * 647 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled 648 */ 649 void wil_rx_handle(struct wil6210_priv *wil, int *quota) 650 { 651 struct net_device *ndev = wil_to_ndev(wil); 652 struct vring *v = &wil->vring_rx; 653 struct sk_buff *skb; 654 655 if (unlikely(!v->va)) { 656 wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); 657 return; 658 } 659 wil_dbg_txrx(wil, "%s()\n", __func__); 660 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { 661 (*quota)--; 662 663 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { 664 skb->dev = ndev; 665 skb_reset_mac_header(skb); 666 skb->ip_summed = CHECKSUM_UNNECESSARY; 667 skb->pkt_type = PACKET_OTHERHOST; 668 skb->protocol = htons(ETH_P_802_2); 669 wil_netif_rx_any(skb, ndev); 670 } else { 671 wil_rx_reorder(wil, skb); 672 } 673 } 674 wil_rx_refill(wil, v->size); 675 } 676 677 int wil_rx_init(struct wil6210_priv *wil, u16 size) 678 { 679 struct vring *vring = &wil->vring_rx; 680 int rc; 681 682 wil_dbg_misc(wil, "%s()\n", __func__); 683 684 if (vring->va) { 685 wil_err(wil, "Rx ring already allocated\n"); 686 return -EINVAL; 687 } 688 689 vring->size = size; 690 rc = wil_vring_alloc(wil, vring); 691 if (rc) 692 return rc; 693 694 rc = wmi_rx_chain_add(wil, vring); 695 if (rc) 696 goto err_free; 697 698 rc = wil_rx_refill(wil, vring->size); 699 if (rc) 700 goto err_free; 701 702 return 0; 703 err_free: 704 wil_vring_free(wil, vring, 0); 705 706 return rc; 707 } 708 709 void wil_rx_fini(struct wil6210_priv *wil) 710 { 711 struct vring *vring = &wil->vring_rx; 712 713 wil_dbg_misc(wil, "%s()\n", __func__); 714 715 if (vring->va) 716 wil_vring_free(wil, vring, 0); 717 } 718 719 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 720 int cid, int tid) 721 { 722 int rc; 723 struct wmi_vring_cfg_cmd cmd = { 724 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 725 .vring_cfg = { 726 .tx_sw_ring = { 727 .max_mpdu_size = 728 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 729 .ring_size = cpu_to_le16(size), 730 }, 731 .ringid = id, 732 .cidxtid = mk_cidxtid(cid, tid), 733 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 734 .mac_ctrl = 0, 735 .to_resolution = 0, 736 .agg_max_wsize = 0, 737 .schd_params = { 738 .priority = cpu_to_le16(0), 739 .timeslot_us = cpu_to_le16(0xfff), 740 }, 741 }, 742 }; 743 struct { 744 struct wil6210_mbox_hdr_wmi wmi; 745 struct wmi_vring_cfg_done_event cmd; 746 } __packed reply; 747 struct vring *vring = &wil->vring_tx[id]; 748 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 749 750 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 751 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 752 753 if (vring->va) { 754 wil_err(wil, "Tx ring [%d] already allocated\n", id); 755 rc = -EINVAL; 756 goto out; 757 } 758 759 memset(txdata, 0, sizeof(*txdata)); 760 spin_lock_init(&txdata->lock); 761 vring->size = size; 762 rc = wil_vring_alloc(wil, vring); 763 if (rc) 764 goto out; 765 766 wil->vring2cid_tid[id][0] = cid; 767 wil->vring2cid_tid[id][1] = tid; 768 769 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 770 771 if (!wil->privacy) 772 txdata->dot1x_open = true; 773 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), 774 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 775 if (rc) 776 goto out_free; 777 778 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 779 wil_err(wil, "Tx config failed, status 0x%02x\n", 780 reply.cmd.status); 781 rc = -EINVAL; 782 goto out_free; 783 } 784 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 785 786 txdata->enabled = 1; 787 if (txdata->dot1x_open && (agg_wsize >= 0)) 788 wil_addba_tx_request(wil, id, agg_wsize); 789 790 return 0; 791 out_free: 792 txdata->dot1x_open = false; 793 txdata->enabled = 0; 794 wil_vring_free(wil, vring, 1); 795 out: 796 797 return rc; 798 } 799 800 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) 801 { 802 int rc; 803 struct wmi_bcast_vring_cfg_cmd cmd = { 804 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 805 .vring_cfg = { 806 .tx_sw_ring = { 807 .max_mpdu_size = 808 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 809 .ring_size = cpu_to_le16(size), 810 }, 811 .ringid = id, 812 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 813 }, 814 }; 815 struct { 816 struct wil6210_mbox_hdr_wmi wmi; 817 struct wmi_vring_cfg_done_event cmd; 818 } __packed reply; 819 struct vring *vring = &wil->vring_tx[id]; 820 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 821 822 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 823 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 824 825 if (vring->va) { 826 wil_err(wil, "Tx ring [%d] already allocated\n", id); 827 rc = -EINVAL; 828 goto out; 829 } 830 831 memset(txdata, 0, sizeof(*txdata)); 832 spin_lock_init(&txdata->lock); 833 vring->size = size; 834 rc = wil_vring_alloc(wil, vring); 835 if (rc) 836 goto out; 837 838 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ 839 wil->vring2cid_tid[id][1] = 0; /* TID */ 840 841 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 842 843 if (!wil->privacy) 844 txdata->dot1x_open = true; 845 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), 846 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 847 if (rc) 848 goto out_free; 849 850 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 851 wil_err(wil, "Tx config failed, status 0x%02x\n", 852 reply.cmd.status); 853 rc = -EINVAL; 854 goto out_free; 855 } 856 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 857 858 txdata->enabled = 1; 859 860 return 0; 861 out_free: 862 txdata->enabled = 0; 863 txdata->dot1x_open = false; 864 wil_vring_free(wil, vring, 1); 865 out: 866 867 return rc; 868 } 869 870 void wil_vring_fini_tx(struct wil6210_priv *wil, int id) 871 { 872 struct vring *vring = &wil->vring_tx[id]; 873 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 874 875 WARN_ON(!mutex_is_locked(&wil->mutex)); 876 877 if (!vring->va) 878 return; 879 880 wil_dbg_misc(wil, "%s() id=%d\n", __func__, id); 881 882 spin_lock_bh(&txdata->lock); 883 txdata->dot1x_open = false; 884 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 885 spin_unlock_bh(&txdata->lock); 886 /* make sure NAPI won't touch this vring */ 887 if (test_bit(wil_status_napi_en, wil->status)) 888 napi_synchronize(&wil->napi_tx); 889 890 wil_vring_free(wil, vring, 1); 891 memset(txdata, 0, sizeof(*txdata)); 892 } 893 894 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, 895 struct sk_buff *skb) 896 { 897 int i; 898 struct ethhdr *eth = (void *)skb->data; 899 int cid = wil_find_cid(wil, eth->h_dest); 900 901 if (cid < 0) 902 return NULL; 903 904 /* TODO: fix for multiple TID */ 905 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { 906 if (!wil->vring_tx_data[i].dot1x_open && 907 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 908 continue; 909 if (wil->vring2cid_tid[i][0] == cid) { 910 struct vring *v = &wil->vring_tx[i]; 911 912 wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n", 913 __func__, eth->h_dest, i); 914 if (v->va) { 915 return v; 916 } else { 917 wil_dbg_txrx(wil, "vring[%d] not valid\n", i); 918 return NULL; 919 } 920 } 921 } 922 923 return NULL; 924 } 925 926 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 927 struct sk_buff *skb); 928 929 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, 930 struct sk_buff *skb) 931 { 932 struct vring *v; 933 int i; 934 u8 cid; 935 936 /* In the STA mode, it is expected to have only 1 VRING 937 * for the AP we connected to. 938 * find 1-st vring eligible for this skb and use it. 939 */ 940 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 941 v = &wil->vring_tx[i]; 942 if (!v->va) 943 continue; 944 945 cid = wil->vring2cid_tid[i][0]; 946 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 947 continue; 948 949 if (!wil->vring_tx_data[i].dot1x_open && 950 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 951 continue; 952 953 wil_dbg_txrx(wil, "Tx -> ring %d\n", i); 954 955 return v; 956 } 957 958 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 959 960 return NULL; 961 } 962 963 /* Use one of 2 strategies: 964 * 965 * 1. New (real broadcast): 966 * use dedicated broadcast vring 967 * 2. Old (pseudo-DMS): 968 * Find 1-st vring and return it; 969 * duplicate skb and send it to other active vrings; 970 * in all cases override dest address to unicast peer's address 971 * Use old strategy when new is not supported yet: 972 * - for PBSS 973 */ 974 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, 975 struct sk_buff *skb) 976 { 977 struct vring *v; 978 int i = wil->bcast_vring; 979 980 if (i < 0) 981 return NULL; 982 v = &wil->vring_tx[i]; 983 if (!v->va) 984 return NULL; 985 if (!wil->vring_tx_data[i].dot1x_open && 986 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 987 return NULL; 988 989 return v; 990 } 991 992 static void wil_set_da_for_vring(struct wil6210_priv *wil, 993 struct sk_buff *skb, int vring_index) 994 { 995 struct ethhdr *eth = (void *)skb->data; 996 int cid = wil->vring2cid_tid[vring_index][0]; 997 998 ether_addr_copy(eth->h_dest, wil->sta[cid].addr); 999 } 1000 1001 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, 1002 struct sk_buff *skb) 1003 { 1004 struct vring *v, *v2; 1005 struct sk_buff *skb2; 1006 int i; 1007 u8 cid; 1008 struct ethhdr *eth = (void *)skb->data; 1009 char *src = eth->h_source; 1010 1011 /* find 1-st vring eligible for data */ 1012 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1013 v = &wil->vring_tx[i]; 1014 if (!v->va) 1015 continue; 1016 1017 cid = wil->vring2cid_tid[i][0]; 1018 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1019 continue; 1020 if (!wil->vring_tx_data[i].dot1x_open && 1021 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1022 continue; 1023 1024 /* don't Tx back to source when re-routing Rx->Tx at the AP */ 1025 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1026 continue; 1027 1028 goto found; 1029 } 1030 1031 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1032 1033 return NULL; 1034 1035 found: 1036 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); 1037 wil_set_da_for_vring(wil, skb, i); 1038 1039 /* find other active vrings and duplicate skb for each */ 1040 for (i++; i < WIL6210_MAX_TX_RINGS; i++) { 1041 v2 = &wil->vring_tx[i]; 1042 if (!v2->va) 1043 continue; 1044 cid = wil->vring2cid_tid[i][0]; 1045 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1046 continue; 1047 if (!wil->vring_tx_data[i].dot1x_open && 1048 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1049 continue; 1050 1051 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1052 continue; 1053 1054 skb2 = skb_copy(skb, GFP_ATOMIC); 1055 if (skb2) { 1056 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); 1057 wil_set_da_for_vring(wil, skb2, i); 1058 wil_tx_vring(wil, v2, skb2); 1059 } else { 1060 wil_err(wil, "skb_copy failed\n"); 1061 } 1062 } 1063 1064 return v; 1065 } 1066 1067 static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil, 1068 struct sk_buff *skb) 1069 { 1070 struct wireless_dev *wdev = wil->wdev; 1071 1072 if (wdev->iftype != NL80211_IFTYPE_AP) 1073 return wil_find_tx_bcast_2(wil, skb); 1074 1075 return wil_find_tx_bcast_1(wil, skb); 1076 } 1077 1078 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, 1079 int vring_index) 1080 { 1081 wil_desc_addr_set(&d->dma.addr, pa); 1082 d->dma.ip_length = 0; 1083 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ 1084 d->dma.b11 = 0/*14 | BIT(7)*/; 1085 d->dma.error = 0; 1086 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 1087 d->dma.length = cpu_to_le16((u16)len); 1088 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); 1089 d->mac.d[0] = 0; 1090 d->mac.d[1] = 0; 1091 d->mac.d[2] = 0; 1092 d->mac.ucode_cmd = 0; 1093 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ 1094 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | 1095 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); 1096 1097 return 0; 1098 } 1099 1100 static inline 1101 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) 1102 { 1103 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); 1104 } 1105 1106 /** 1107 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding 1108 * @skb is used to obtain the protocol and headers length. 1109 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, 1110 * 2 - middle, 3 - last descriptor. 1111 */ 1112 1113 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, 1114 struct sk_buff *skb, 1115 int tso_desc_type, bool is_ipv4, 1116 int tcp_hdr_len, int skb_net_hdr_len) 1117 { 1118 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1119 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; 1120 1121 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1122 /* L4 header len: TCP header length */ 1123 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1124 1125 /* Setup TSO: bit and desc type */ 1126 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | 1127 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); 1128 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); 1129 1130 d->dma.ip_length = skb_net_hdr_len; 1131 /* Enable TCP/UDP checksum */ 1132 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1133 /* Calculate pseudo-header */ 1134 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1135 } 1136 1137 /** 1138 * Sets the descriptor @d up for csum. The corresponding 1139 * @skb is used to obtain the protocol and headers length. 1140 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. 1141 * Note, if d==NULL, the function only returns the protocol result. 1142 * 1143 * It is very similar to previous wil_tx_desc_offload_setup_tso. This 1144 * is "if unrolling" to optimize the critical path. 1145 */ 1146 1147 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, 1148 struct sk_buff *skb){ 1149 int protocol; 1150 1151 if (skb->ip_summed != CHECKSUM_PARTIAL) 1152 return 0; 1153 1154 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1155 1156 switch (skb->protocol) { 1157 case cpu_to_be16(ETH_P_IP): 1158 protocol = ip_hdr(skb)->protocol; 1159 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); 1160 break; 1161 case cpu_to_be16(ETH_P_IPV6): 1162 protocol = ipv6_hdr(skb)->nexthdr; 1163 break; 1164 default: 1165 return -EINVAL; 1166 } 1167 1168 switch (protocol) { 1169 case IPPROTO_TCP: 1170 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1171 /* L4 header len: TCP header length */ 1172 d->dma.d0 |= 1173 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1174 break; 1175 case IPPROTO_UDP: 1176 /* L4 header len: UDP header length */ 1177 d->dma.d0 |= 1178 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1179 break; 1180 default: 1181 return -EINVAL; 1182 } 1183 1184 d->dma.ip_length = skb_network_header_len(skb); 1185 /* Enable TCP/UDP checksum */ 1186 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1187 /* Calculate pseudo-header */ 1188 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1189 1190 return 0; 1191 } 1192 1193 static inline void wil_tx_last_desc(struct vring_tx_desc *d) 1194 { 1195 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | 1196 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | 1197 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1198 } 1199 1200 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) 1201 { 1202 d->dma.d0 |= wil_tso_type_lst << 1203 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; 1204 } 1205 1206 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, 1207 struct sk_buff *skb) 1208 { 1209 struct device *dev = wil_to_dev(wil); 1210 1211 /* point to descriptors in shared memory */ 1212 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, 1213 *_first_desc = NULL; 1214 1215 /* pointers to shadow descriptors */ 1216 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, 1217 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, 1218 *first_desc = &first_desc_mem; 1219 1220 /* pointer to shadow descriptors' context */ 1221 struct wil_ctx *hdr_ctx, *first_ctx = NULL; 1222 1223 int descs_used = 0; /* total number of used descriptors */ 1224 int sg_desc_cnt = 0; /* number of descriptors for current mss*/ 1225 1226 u32 swhead = vring->swhead; 1227 int used, avail = wil_vring_avail_tx(vring); 1228 int nr_frags = skb_shinfo(skb)->nr_frags; 1229 int min_desc_required = nr_frags + 1; 1230 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ 1231 int f, len, hdrlen, headlen; 1232 int vring_index = vring - wil->vring_tx; 1233 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1234 uint i = swhead; 1235 dma_addr_t pa; 1236 const skb_frag_t *frag = NULL; 1237 int rem_data = mss; 1238 int lenmss; 1239 int hdr_compensation_need = true; 1240 int desc_tso_type = wil_tso_type_first; 1241 bool is_ipv4; 1242 int tcp_hdr_len; 1243 int skb_net_hdr_len; 1244 int gso_type; 1245 1246 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1247 __func__, skb->len, vring_index); 1248 1249 if (unlikely(!txdata->enabled)) 1250 return -EINVAL; 1251 1252 /* A typical page 4K is 3-4 payloads, we assume each fragment 1253 * is a full payload, that's how min_desc_required has been 1254 * calculated. In real we might need more or less descriptors, 1255 * this is the initial check only. 1256 */ 1257 if (unlikely(avail < min_desc_required)) { 1258 wil_err_ratelimited(wil, 1259 "TSO: Tx ring[%2d] full. No space for %d fragments\n", 1260 vring_index, min_desc_required); 1261 return -ENOMEM; 1262 } 1263 1264 /* Header Length = MAC header len + IP header len + TCP header len*/ 1265 hdrlen = ETH_HLEN + 1266 (int)skb_network_header_len(skb) + 1267 tcp_hdrlen(skb); 1268 1269 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); 1270 switch (gso_type) { 1271 case SKB_GSO_TCPV4: 1272 /* TCP v4, zero out the IP length and IPv4 checksum fields 1273 * as required by the offloading doc 1274 */ 1275 ip_hdr(skb)->tot_len = 0; 1276 ip_hdr(skb)->check = 0; 1277 is_ipv4 = true; 1278 break; 1279 case SKB_GSO_TCPV6: 1280 /* TCP v6, zero out the payload length */ 1281 ipv6_hdr(skb)->payload_len = 0; 1282 is_ipv4 = false; 1283 break; 1284 default: 1285 /* other than TCPv4 or TCPv6 types are not supported for TSO. 1286 * It is also illegal for both to be set simultaneously 1287 */ 1288 return -EINVAL; 1289 } 1290 1291 if (skb->ip_summed != CHECKSUM_PARTIAL) 1292 return -EINVAL; 1293 1294 /* tcp header length and skb network header length are fixed for all 1295 * packet's descriptors - read then once here 1296 */ 1297 tcp_hdr_len = tcp_hdrlen(skb); 1298 skb_net_hdr_len = skb_network_header_len(skb); 1299 1300 _hdr_desc = &vring->va[i].tx; 1301 1302 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); 1303 if (unlikely(dma_mapping_error(dev, pa))) { 1304 wil_err(wil, "TSO: Skb head DMA map error\n"); 1305 goto err_exit; 1306 } 1307 1308 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); 1309 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, 1310 tcp_hdr_len, skb_net_hdr_len); 1311 wil_tx_last_desc(hdr_desc); 1312 1313 vring->ctx[i].mapped_as = wil_mapped_as_single; 1314 hdr_ctx = &vring->ctx[i]; 1315 1316 descs_used++; 1317 headlen = skb_headlen(skb) - hdrlen; 1318 1319 for (f = headlen ? -1 : 0; f < nr_frags; f++) { 1320 if (headlen) { 1321 len = headlen; 1322 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", 1323 len); 1324 } else { 1325 frag = &skb_shinfo(skb)->frags[f]; 1326 len = frag->size; 1327 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); 1328 } 1329 1330 while (len) { 1331 wil_dbg_txrx(wil, 1332 "TSO: len %d, rem_data %d, descs_used %d\n", 1333 len, rem_data, descs_used); 1334 1335 if (descs_used == avail) { 1336 wil_err(wil, "TSO: ring overflow\n"); 1337 goto dma_error; 1338 } 1339 1340 lenmss = min_t(int, rem_data, len); 1341 i = (swhead + descs_used) % vring->size; 1342 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); 1343 1344 if (!headlen) { 1345 pa = skb_frag_dma_map(dev, frag, 1346 frag->size - len, lenmss, 1347 DMA_TO_DEVICE); 1348 vring->ctx[i].mapped_as = wil_mapped_as_page; 1349 } else { 1350 pa = dma_map_single(dev, 1351 skb->data + 1352 skb_headlen(skb) - headlen, 1353 lenmss, 1354 DMA_TO_DEVICE); 1355 vring->ctx[i].mapped_as = wil_mapped_as_single; 1356 headlen -= lenmss; 1357 } 1358 1359 if (unlikely(dma_mapping_error(dev, pa))) 1360 goto dma_error; 1361 1362 _desc = &vring->va[i].tx; 1363 1364 if (!_first_desc) { 1365 _first_desc = _desc; 1366 first_ctx = &vring->ctx[i]; 1367 d = first_desc; 1368 } else { 1369 d = &desc_mem; 1370 } 1371 1372 wil_tx_desc_map(d, pa, lenmss, vring_index); 1373 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, 1374 is_ipv4, tcp_hdr_len, 1375 skb_net_hdr_len); 1376 1377 /* use tso_type_first only once */ 1378 desc_tso_type = wil_tso_type_mid; 1379 1380 descs_used++; /* desc used so far */ 1381 sg_desc_cnt++; /* desc used for this segment */ 1382 len -= lenmss; 1383 rem_data -= lenmss; 1384 1385 wil_dbg_txrx(wil, 1386 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", 1387 len, rem_data, descs_used, sg_desc_cnt); 1388 1389 /* Close the segment if reached mss size or last frag*/ 1390 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { 1391 if (hdr_compensation_need) { 1392 /* first segment include hdr desc for 1393 * release 1394 */ 1395 hdr_ctx->nr_frags = sg_desc_cnt; 1396 wil_tx_desc_set_nr_frags(first_desc, 1397 sg_desc_cnt + 1398 1); 1399 hdr_compensation_need = false; 1400 } else { 1401 wil_tx_desc_set_nr_frags(first_desc, 1402 sg_desc_cnt); 1403 } 1404 first_ctx->nr_frags = sg_desc_cnt - 1; 1405 1406 wil_tx_last_desc(d); 1407 1408 /* first descriptor may also be the last 1409 * for this mss - make sure not to copy 1410 * it twice 1411 */ 1412 if (first_desc != d) 1413 *_first_desc = *first_desc; 1414 1415 /*last descriptor will be copied at the end 1416 * of this TS processing 1417 */ 1418 if (f < nr_frags - 1 || len > 0) 1419 *_desc = *d; 1420 1421 rem_data = mss; 1422 _first_desc = NULL; 1423 sg_desc_cnt = 0; 1424 } else if (first_desc != d) /* update mid descriptor */ 1425 *_desc = *d; 1426 } 1427 } 1428 1429 /* first descriptor may also be the last. 1430 * in this case d pointer is invalid 1431 */ 1432 if (_first_desc == _desc) 1433 d = first_desc; 1434 1435 /* Last data descriptor */ 1436 wil_set_tx_desc_last_tso(d); 1437 *_desc = *d; 1438 1439 /* Fill the total number of descriptors in first desc (hdr)*/ 1440 wil_tx_desc_set_nr_frags(hdr_desc, descs_used); 1441 *_hdr_desc = *hdr_desc; 1442 1443 /* hold reference to skb 1444 * to prevent skb release before accounting 1445 * in case of immediate "tx done" 1446 */ 1447 vring->ctx[i].skb = skb_get(skb); 1448 1449 /* performance monitoring */ 1450 used = wil_vring_used_tx(vring); 1451 if (wil_val_in_range(vring_idle_trsh, 1452 used, used + descs_used)) { 1453 txdata->idle += get_cycles() - txdata->last_idle; 1454 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1455 vring_index, used, used + descs_used); 1456 } 1457 1458 /* advance swhead */ 1459 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1460 wil_vring_advance_head(vring, descs_used); 1461 1462 /* make sure all writes to descriptors (shared memory) are done before 1463 * committing them to HW 1464 */ 1465 wmb(); 1466 1467 wil_w(wil, vring->hwtail, vring->swhead); 1468 return 0; 1469 1470 dma_error: 1471 wil_err(wil, "TSO: DMA map page error\n"); 1472 while (descs_used > 0) { 1473 struct wil_ctx *ctx; 1474 1475 i = (swhead + descs_used) % vring->size; 1476 d = (struct vring_tx_desc *)&vring->va[i].tx; 1477 _desc = &vring->va[i].tx; 1478 *d = *_desc; 1479 _desc->dma.status = TX_DMA_STATUS_DU; 1480 ctx = &vring->ctx[i]; 1481 wil_txdesc_unmap(dev, d, ctx); 1482 if (ctx->skb) 1483 dev_kfree_skb_any(ctx->skb); 1484 memset(ctx, 0, sizeof(*ctx)); 1485 descs_used--; 1486 } 1487 1488 err_exit: 1489 return -EINVAL; 1490 } 1491 1492 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1493 struct sk_buff *skb) 1494 { 1495 struct device *dev = wil_to_dev(wil); 1496 struct vring_tx_desc dd, *d = ⅆ 1497 volatile struct vring_tx_desc *_d; 1498 u32 swhead = vring->swhead; 1499 int avail = wil_vring_avail_tx(vring); 1500 int nr_frags = skb_shinfo(skb)->nr_frags; 1501 uint f = 0; 1502 int vring_index = vring - wil->vring_tx; 1503 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1504 uint i = swhead; 1505 dma_addr_t pa; 1506 int used; 1507 bool mcast = (vring_index == wil->bcast_vring); 1508 uint len = skb_headlen(skb); 1509 1510 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1511 __func__, skb->len, vring_index); 1512 1513 if (unlikely(!txdata->enabled)) 1514 return -EINVAL; 1515 1516 if (unlikely(avail < 1 + nr_frags)) { 1517 wil_err_ratelimited(wil, 1518 "Tx ring[%2d] full. No space for %d fragments\n", 1519 vring_index, 1 + nr_frags); 1520 return -ENOMEM; 1521 } 1522 _d = &vring->va[i].tx; 1523 1524 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1525 1526 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, 1527 skb_headlen(skb), skb->data, &pa); 1528 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, 1529 skb->data, skb_headlen(skb), false); 1530 1531 if (unlikely(dma_mapping_error(dev, pa))) 1532 return -EINVAL; 1533 vring->ctx[i].mapped_as = wil_mapped_as_single; 1534 /* 1-st segment */ 1535 wil_tx_desc_map(d, pa, len, vring_index); 1536 if (unlikely(mcast)) { 1537 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ 1538 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ 1539 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); 1540 } 1541 /* Process TCP/UDP checksum offloading */ 1542 if (unlikely(wil_tx_desc_offload_setup(d, skb))) { 1543 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", 1544 vring_index); 1545 goto dma_error; 1546 } 1547 1548 vring->ctx[i].nr_frags = nr_frags; 1549 wil_tx_desc_set_nr_frags(d, nr_frags + 1); 1550 1551 /* middle segments */ 1552 for (; f < nr_frags; f++) { 1553 const struct skb_frag_struct *frag = 1554 &skb_shinfo(skb)->frags[f]; 1555 int len = skb_frag_size(frag); 1556 1557 *_d = *d; 1558 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1559 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1560 (const void *)d, sizeof(*d), false); 1561 i = (swhead + f + 1) % vring->size; 1562 _d = &vring->va[i].tx; 1563 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1564 DMA_TO_DEVICE); 1565 if (unlikely(dma_mapping_error(dev, pa))) 1566 goto dma_error; 1567 vring->ctx[i].mapped_as = wil_mapped_as_page; 1568 wil_tx_desc_map(d, pa, len, vring_index); 1569 /* no need to check return code - 1570 * if it succeeded for 1-st descriptor, 1571 * it will succeed here too 1572 */ 1573 wil_tx_desc_offload_setup(d, skb); 1574 } 1575 /* for the last seg only */ 1576 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); 1577 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); 1578 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1579 *_d = *d; 1580 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1581 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1582 (const void *)d, sizeof(*d), false); 1583 1584 /* hold reference to skb 1585 * to prevent skb release before accounting 1586 * in case of immediate "tx done" 1587 */ 1588 vring->ctx[i].skb = skb_get(skb); 1589 1590 /* performance monitoring */ 1591 used = wil_vring_used_tx(vring); 1592 if (wil_val_in_range(vring_idle_trsh, 1593 used, used + nr_frags + 1)) { 1594 txdata->idle += get_cycles() - txdata->last_idle; 1595 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1596 vring_index, used, used + nr_frags + 1); 1597 } 1598 1599 /* advance swhead */ 1600 wil_vring_advance_head(vring, nr_frags + 1); 1601 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, 1602 vring->swhead); 1603 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); 1604 1605 /* make sure all writes to descriptors (shared memory) are done before 1606 * committing them to HW 1607 */ 1608 wmb(); 1609 1610 wil_w(wil, vring->hwtail, vring->swhead); 1611 1612 return 0; 1613 dma_error: 1614 /* unmap what we have mapped */ 1615 nr_frags = f + 1; /* frags mapped + one for skb head */ 1616 for (f = 0; f < nr_frags; f++) { 1617 struct wil_ctx *ctx; 1618 1619 i = (swhead + f) % vring->size; 1620 ctx = &vring->ctx[i]; 1621 _d = &vring->va[i].tx; 1622 *d = *_d; 1623 _d->dma.status = TX_DMA_STATUS_DU; 1624 wil_txdesc_unmap(dev, d, ctx); 1625 1626 if (ctx->skb) 1627 dev_kfree_skb_any(ctx->skb); 1628 1629 memset(ctx, 0, sizeof(*ctx)); 1630 } 1631 1632 return -EINVAL; 1633 } 1634 1635 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1636 struct sk_buff *skb) 1637 { 1638 int vring_index = vring - wil->vring_tx; 1639 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1640 int rc; 1641 1642 spin_lock(&txdata->lock); 1643 1644 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) 1645 (wil, vring, skb); 1646 1647 spin_unlock(&txdata->lock); 1648 1649 return rc; 1650 } 1651 1652 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) 1653 { 1654 struct wil6210_priv *wil = ndev_to_wil(ndev); 1655 struct ethhdr *eth = (void *)skb->data; 1656 bool bcast = is_multicast_ether_addr(eth->h_dest); 1657 struct vring *vring; 1658 static bool pr_once_fw; 1659 int rc; 1660 1661 wil_dbg_txrx(wil, "%s()\n", __func__); 1662 if (unlikely(!test_bit(wil_status_fwready, wil->status))) { 1663 if (!pr_once_fw) { 1664 wil_err(wil, "FW not ready\n"); 1665 pr_once_fw = true; 1666 } 1667 goto drop; 1668 } 1669 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { 1670 wil_err(wil, "FW not connected\n"); 1671 goto drop; 1672 } 1673 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { 1674 wil_err(wil, "Xmit in monitor mode not supported\n"); 1675 goto drop; 1676 } 1677 pr_once_fw = false; 1678 1679 /* find vring */ 1680 if (wil->wdev->iftype == NL80211_IFTYPE_STATION) { 1681 /* in STA mode (ESS), all to same VRING */ 1682 vring = wil_find_tx_vring_sta(wil, skb); 1683 } else { /* direct communication, find matching VRING */ 1684 vring = bcast ? wil_find_tx_bcast(wil, skb) : 1685 wil_find_tx_ucast(wil, skb); 1686 } 1687 if (unlikely(!vring)) { 1688 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); 1689 goto drop; 1690 } 1691 /* set up vring entry */ 1692 rc = wil_tx_vring(wil, vring, skb); 1693 1694 /* do we still have enough room in the vring? */ 1695 if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) { 1696 netif_tx_stop_all_queues(wil_to_ndev(wil)); 1697 wil_dbg_txrx(wil, "netif_tx_stop : ring full\n"); 1698 } 1699 1700 switch (rc) { 1701 case 0: 1702 /* statistics will be updated on the tx_complete */ 1703 dev_kfree_skb_any(skb); 1704 return NETDEV_TX_OK; 1705 case -ENOMEM: 1706 return NETDEV_TX_BUSY; 1707 default: 1708 break; /* goto drop; */ 1709 } 1710 drop: 1711 ndev->stats.tx_dropped++; 1712 dev_kfree_skb_any(skb); 1713 1714 return NET_XMIT_DROP; 1715 } 1716 1717 static inline bool wil_need_txstat(struct sk_buff *skb) 1718 { 1719 struct ethhdr *eth = (void *)skb->data; 1720 1721 return is_unicast_ether_addr(eth->h_dest) && skb->sk && 1722 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 1723 } 1724 1725 static inline void wil_consume_skb(struct sk_buff *skb, bool acked) 1726 { 1727 if (unlikely(wil_need_txstat(skb))) 1728 skb_complete_wifi_ack(skb, acked); 1729 else 1730 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); 1731 } 1732 1733 /** 1734 * Clean up transmitted skb's from the Tx VRING 1735 * 1736 * Return number of descriptors cleared 1737 * 1738 * Safe to call from IRQ 1739 */ 1740 int wil_tx_complete(struct wil6210_priv *wil, int ringid) 1741 { 1742 struct net_device *ndev = wil_to_ndev(wil); 1743 struct device *dev = wil_to_dev(wil); 1744 struct vring *vring = &wil->vring_tx[ringid]; 1745 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; 1746 int done = 0; 1747 int cid = wil->vring2cid_tid[ringid][0]; 1748 struct wil_net_stats *stats = NULL; 1749 volatile struct vring_tx_desc *_d; 1750 int used_before_complete; 1751 int used_new; 1752 1753 if (unlikely(!vring->va)) { 1754 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); 1755 return 0; 1756 } 1757 1758 if (unlikely(!txdata->enabled)) { 1759 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); 1760 return 0; 1761 } 1762 1763 wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid); 1764 1765 used_before_complete = wil_vring_used_tx(vring); 1766 1767 if (cid < WIL6210_MAX_CID) 1768 stats = &wil->sta[cid].stats; 1769 1770 while (!wil_vring_is_empty(vring)) { 1771 int new_swtail; 1772 struct wil_ctx *ctx = &vring->ctx[vring->swtail]; 1773 /** 1774 * For the fragmented skb, HW will set DU bit only for the 1775 * last fragment. look for it. 1776 * In TSO the first DU will include hdr desc 1777 */ 1778 int lf = (vring->swtail + ctx->nr_frags) % vring->size; 1779 /* TODO: check we are not past head */ 1780 1781 _d = &vring->va[lf].tx; 1782 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) 1783 break; 1784 1785 new_swtail = (lf + 1) % vring->size; 1786 while (vring->swtail != new_swtail) { 1787 struct vring_tx_desc dd, *d = ⅆ 1788 u16 dmalen; 1789 struct sk_buff *skb; 1790 1791 ctx = &vring->ctx[vring->swtail]; 1792 skb = ctx->skb; 1793 _d = &vring->va[vring->swtail].tx; 1794 1795 *d = *_d; 1796 1797 dmalen = le16_to_cpu(d->dma.length); 1798 trace_wil6210_tx_done(ringid, vring->swtail, dmalen, 1799 d->dma.error); 1800 wil_dbg_txrx(wil, 1801 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", 1802 ringid, vring->swtail, dmalen, 1803 d->dma.status, d->dma.error); 1804 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, 1805 (const void *)d, sizeof(*d), false); 1806 1807 wil_txdesc_unmap(dev, d, ctx); 1808 1809 if (skb) { 1810 if (likely(d->dma.error == 0)) { 1811 ndev->stats.tx_packets++; 1812 ndev->stats.tx_bytes += skb->len; 1813 if (stats) { 1814 stats->tx_packets++; 1815 stats->tx_bytes += skb->len; 1816 } 1817 } else { 1818 ndev->stats.tx_errors++; 1819 if (stats) 1820 stats->tx_errors++; 1821 } 1822 wil_consume_skb(skb, d->dma.error == 0); 1823 } 1824 memset(ctx, 0, sizeof(*ctx)); 1825 /* There is no need to touch HW descriptor: 1826 * - ststus bit TX_DMA_STATUS_DU is set by design, 1827 * so hardware will not try to process this desc., 1828 * - rest of descriptor will be initialized on Tx. 1829 */ 1830 vring->swtail = wil_vring_next_tail(vring); 1831 done++; 1832 } 1833 } 1834 1835 /* performance monitoring */ 1836 used_new = wil_vring_used_tx(vring); 1837 if (wil_val_in_range(vring_idle_trsh, 1838 used_new, used_before_complete)) { 1839 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", 1840 ringid, used_before_complete, used_new); 1841 txdata->last_idle = get_cycles(); 1842 } 1843 1844 if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) { 1845 wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n"); 1846 netif_tx_wake_all_queues(wil_to_ndev(wil)); 1847 } 1848 1849 return done; 1850 } 1851