1 /* 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/etherdevice.h> 18 #include <net/ieee80211_radiotap.h> 19 #include <linux/if_arp.h> 20 #include <linux/moduleparam.h> 21 #include <linux/ip.h> 22 #include <linux/ipv6.h> 23 #include <net/ipv6.h> 24 #include <linux/prefetch.h> 25 26 #include "wil6210.h" 27 #include "wmi.h" 28 #include "txrx.h" 29 #include "trace.h" 30 31 static bool rtap_include_phy_info; 32 module_param(rtap_include_phy_info, bool, S_IRUGO); 33 MODULE_PARM_DESC(rtap_include_phy_info, 34 " Include PHY info in the radiotap header, default - no"); 35 36 bool rx_align_2; 37 module_param(rx_align_2, bool, S_IRUGO); 38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); 39 40 static inline uint wil_rx_snaplen(void) 41 { 42 return rx_align_2 ? 6 : 0; 43 } 44 45 static inline int wil_vring_is_empty(struct vring *vring) 46 { 47 return vring->swhead == vring->swtail; 48 } 49 50 static inline u32 wil_vring_next_tail(struct vring *vring) 51 { 52 return (vring->swtail + 1) % vring->size; 53 } 54 55 static inline void wil_vring_advance_head(struct vring *vring, int n) 56 { 57 vring->swhead = (vring->swhead + n) % vring->size; 58 } 59 60 static inline int wil_vring_is_full(struct vring *vring) 61 { 62 return wil_vring_next_tail(vring) == vring->swhead; 63 } 64 65 /* Used space in Tx Vring */ 66 static inline int wil_vring_used_tx(struct vring *vring) 67 { 68 u32 swhead = vring->swhead; 69 u32 swtail = vring->swtail; 70 return (vring->size + swhead - swtail) % vring->size; 71 } 72 73 /* Available space in Tx Vring */ 74 static inline int wil_vring_avail_tx(struct vring *vring) 75 { 76 return vring->size - wil_vring_used_tx(vring) - 1; 77 } 78 79 /* wil_vring_wmark_low - low watermark for available descriptor space */ 80 static inline int wil_vring_wmark_low(struct vring *vring) 81 { 82 return vring->size/8; 83 } 84 85 /* wil_vring_wmark_high - high watermark for available descriptor space */ 86 static inline int wil_vring_wmark_high(struct vring *vring) 87 { 88 return vring->size/4; 89 } 90 91 /* wil_val_in_range - check if value in [min,max) */ 92 static inline bool wil_val_in_range(int val, int min, int max) 93 { 94 return val >= min && val < max; 95 } 96 97 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) 98 { 99 struct device *dev = wil_to_dev(wil); 100 size_t sz = vring->size * sizeof(vring->va[0]); 101 uint i; 102 103 wil_dbg_misc(wil, "%s()\n", __func__); 104 105 BUILD_BUG_ON(sizeof(vring->va[0]) != 32); 106 107 vring->swhead = 0; 108 vring->swtail = 0; 109 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); 110 if (!vring->ctx) { 111 vring->va = NULL; 112 return -ENOMEM; 113 } 114 /* vring->va should be aligned on its size rounded up to power of 2 115 * This is granted by the dma_alloc_coherent 116 */ 117 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); 118 if (!vring->va) { 119 kfree(vring->ctx); 120 vring->ctx = NULL; 121 return -ENOMEM; 122 } 123 /* initially, all descriptors are SW owned 124 * For Tx and Rx, ownership bit is at the same location, thus 125 * we can use any 126 */ 127 for (i = 0; i < vring->size; i++) { 128 volatile struct vring_tx_desc *_d = &vring->va[i].tx; 129 130 _d->dma.status = TX_DMA_STATUS_DU; 131 } 132 133 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, 134 vring->va, &vring->pa, vring->ctx); 135 136 return 0; 137 } 138 139 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, 140 struct wil_ctx *ctx) 141 { 142 dma_addr_t pa = wil_desc_addr(&d->dma.addr); 143 u16 dmalen = le16_to_cpu(d->dma.length); 144 145 switch (ctx->mapped_as) { 146 case wil_mapped_as_single: 147 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); 148 break; 149 case wil_mapped_as_page: 150 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); 151 break; 152 default: 153 break; 154 } 155 } 156 157 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, 158 int tx) 159 { 160 struct device *dev = wil_to_dev(wil); 161 size_t sz = vring->size * sizeof(vring->va[0]); 162 163 lockdep_assert_held(&wil->mutex); 164 if (tx) { 165 int vring_index = vring - wil->vring_tx; 166 167 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", 168 vring_index, vring->size, vring->va, 169 &vring->pa, vring->ctx); 170 } else { 171 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", 172 vring->size, vring->va, 173 &vring->pa, vring->ctx); 174 } 175 176 while (!wil_vring_is_empty(vring)) { 177 dma_addr_t pa; 178 u16 dmalen; 179 struct wil_ctx *ctx; 180 181 if (tx) { 182 struct vring_tx_desc dd, *d = ⅆ 183 volatile struct vring_tx_desc *_d = 184 &vring->va[vring->swtail].tx; 185 186 ctx = &vring->ctx[vring->swtail]; 187 if (!ctx) { 188 wil_dbg_txrx(wil, 189 "ctx(%d) was already completed\n", 190 vring->swtail); 191 vring->swtail = wil_vring_next_tail(vring); 192 continue; 193 } 194 *d = *_d; 195 wil_txdesc_unmap(dev, d, ctx); 196 if (ctx->skb) 197 dev_kfree_skb_any(ctx->skb); 198 vring->swtail = wil_vring_next_tail(vring); 199 } else { /* rx */ 200 struct vring_rx_desc dd, *d = ⅆ 201 volatile struct vring_rx_desc *_d = 202 &vring->va[vring->swhead].rx; 203 204 ctx = &vring->ctx[vring->swhead]; 205 *d = *_d; 206 pa = wil_desc_addr(&d->dma.addr); 207 dmalen = le16_to_cpu(d->dma.length); 208 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); 209 kfree_skb(ctx->skb); 210 wil_vring_advance_head(vring, 1); 211 } 212 } 213 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); 214 kfree(vring->ctx); 215 vring->pa = 0; 216 vring->va = NULL; 217 vring->ctx = NULL; 218 } 219 220 /** 221 * Allocate one skb for Rx VRING 222 * 223 * Safe to call from IRQ 224 */ 225 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, 226 u32 i, int headroom) 227 { 228 struct device *dev = wil_to_dev(wil); 229 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); 230 struct vring_rx_desc dd, *d = ⅆ 231 volatile struct vring_rx_desc *_d = &vring->va[i].rx; 232 dma_addr_t pa; 233 struct sk_buff *skb = dev_alloc_skb(sz + headroom); 234 235 if (unlikely(!skb)) 236 return -ENOMEM; 237 238 skb_reserve(skb, headroom); 239 skb_put(skb, sz); 240 241 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); 242 if (unlikely(dma_mapping_error(dev, pa))) { 243 kfree_skb(skb); 244 return -ENOMEM; 245 } 246 247 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; 248 wil_desc_addr_set(&d->dma.addr, pa); 249 /* ip_length don't care */ 250 /* b11 don't care */ 251 /* error don't care */ 252 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 253 d->dma.length = cpu_to_le16(sz); 254 *_d = *d; 255 vring->ctx[i].skb = skb; 256 257 return 0; 258 } 259 260 /** 261 * Adds radiotap header 262 * 263 * Any error indicated as "Bad FCS" 264 * 265 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: 266 * - Rx descriptor: 32 bytes 267 * - Phy info 268 */ 269 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, 270 struct sk_buff *skb) 271 { 272 struct wireless_dev *wdev = wil->wdev; 273 struct wil6210_rtap { 274 struct ieee80211_radiotap_header rthdr; 275 /* fields should be in the order of bits in rthdr.it_present */ 276 /* flags */ 277 u8 flags; 278 /* channel */ 279 __le16 chnl_freq __aligned(2); 280 __le16 chnl_flags; 281 /* MCS */ 282 u8 mcs_present; 283 u8 mcs_flags; 284 u8 mcs_index; 285 } __packed; 286 struct wil6210_rtap_vendor { 287 struct wil6210_rtap rtap; 288 /* vendor */ 289 u8 vendor_oui[3] __aligned(2); 290 u8 vendor_ns; 291 __le16 vendor_skip; 292 u8 vendor_data[0]; 293 } __packed; 294 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 295 struct wil6210_rtap_vendor *rtap_vendor; 296 int rtap_len = sizeof(struct wil6210_rtap); 297 int phy_length = 0; /* phy info header size, bytes */ 298 static char phy_data[128]; 299 struct ieee80211_channel *ch = wdev->preset_chandef.chan; 300 301 if (rtap_include_phy_info) { 302 rtap_len = sizeof(*rtap_vendor) + sizeof(*d); 303 /* calculate additional length */ 304 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { 305 /** 306 * PHY info starts from 8-byte boundary 307 * there are 8-byte lines, last line may be partially 308 * written (HW bug), thus FW configures for last line 309 * to be excessive. Driver skips this last line. 310 */ 311 int len = min_t(int, 8 + sizeof(phy_data), 312 wil_rxdesc_phy_length(d)); 313 314 if (len > 8) { 315 void *p = skb_tail_pointer(skb); 316 void *pa = PTR_ALIGN(p, 8); 317 318 if (skb_tailroom(skb) >= len + (pa - p)) { 319 phy_length = len - 8; 320 memcpy(phy_data, pa, phy_length); 321 } 322 } 323 } 324 rtap_len += phy_length; 325 } 326 327 if (skb_headroom(skb) < rtap_len && 328 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { 329 wil_err(wil, "Unable to expand headrom to %d\n", rtap_len); 330 return; 331 } 332 333 rtap_vendor = (void *)skb_push(skb, rtap_len); 334 memset(rtap_vendor, 0, rtap_len); 335 336 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; 337 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); 338 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( 339 (1 << IEEE80211_RADIOTAP_FLAGS) | 340 (1 << IEEE80211_RADIOTAP_CHANNEL) | 341 (1 << IEEE80211_RADIOTAP_MCS)); 342 if (d->dma.status & RX_DMA_STATUS_ERROR) 343 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; 344 345 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); 346 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); 347 348 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; 349 rtap_vendor->rtap.mcs_flags = 0; 350 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); 351 352 if (rtap_include_phy_info) { 353 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << 354 IEEE80211_RADIOTAP_VENDOR_NAMESPACE); 355 /* OUI for Wilocity 04:ce:14 */ 356 rtap_vendor->vendor_oui[0] = 0x04; 357 rtap_vendor->vendor_oui[1] = 0xce; 358 rtap_vendor->vendor_oui[2] = 0x14; 359 rtap_vendor->vendor_ns = 1; 360 /* Rx descriptor + PHY data */ 361 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + 362 phy_length); 363 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); 364 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, 365 phy_length); 366 } 367 } 368 369 /* similar to ieee80211_ version, but FC contain only 1-st byte */ 370 static inline int wil_is_back_req(u8 fc) 371 { 372 return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == 373 (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ); 374 } 375 376 /** 377 * reap 1 frame from @swhead 378 * 379 * Rx descriptor copied to skb->cb 380 * 381 * Safe to call from IRQ 382 */ 383 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, 384 struct vring *vring) 385 { 386 struct device *dev = wil_to_dev(wil); 387 struct net_device *ndev = wil_to_ndev(wil); 388 volatile struct vring_rx_desc *_d; 389 struct vring_rx_desc *d; 390 struct sk_buff *skb; 391 dma_addr_t pa; 392 unsigned int snaplen = wil_rx_snaplen(); 393 unsigned int sz = mtu_max + ETH_HLEN + snaplen; 394 u16 dmalen; 395 u8 ftype; 396 int cid; 397 int i; 398 struct wil_net_stats *stats; 399 400 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); 401 402 again: 403 if (unlikely(wil_vring_is_empty(vring))) 404 return NULL; 405 406 i = (int)vring->swhead; 407 _d = &vring->va[i].rx; 408 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { 409 /* it is not error, we just reached end of Rx done area */ 410 return NULL; 411 } 412 413 skb = vring->ctx[i].skb; 414 vring->ctx[i].skb = NULL; 415 wil_vring_advance_head(vring, 1); 416 if (!skb) { 417 wil_err(wil, "No Rx skb at [%d]\n", i); 418 goto again; 419 } 420 d = wil_skb_rxdesc(skb); 421 *d = *_d; 422 pa = wil_desc_addr(&d->dma.addr); 423 424 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); 425 dmalen = le16_to_cpu(d->dma.length); 426 427 trace_wil6210_rx(i, d); 428 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); 429 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 430 (const void *)d, sizeof(*d), false); 431 432 cid = wil_rxdesc_cid(d); 433 stats = &wil->sta[cid].stats; 434 435 if (unlikely(dmalen > sz)) { 436 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); 437 stats->rx_large_frame++; 438 kfree_skb(skb); 439 goto again; 440 } 441 skb_trim(skb, dmalen); 442 443 prefetch(skb->data); 444 445 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 446 skb->data, skb_headlen(skb), false); 447 448 stats->last_mcs_rx = wil_rxdesc_mcs(d); 449 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) 450 stats->rx_per_mcs[stats->last_mcs_rx]++; 451 452 /* use radiotap header only if required */ 453 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) 454 wil_rx_add_radiotap_header(wil, skb); 455 456 /* no extra checks if in sniffer mode */ 457 if (ndev->type != ARPHRD_ETHER) 458 return skb; 459 /* Non-data frames may be delivered through Rx DMA channel (ex: BAR) 460 * Driver should recognize it by frame type, that is found 461 * in Rx descriptor. If type is not data, it is 802.11 frame as is 462 */ 463 ftype = wil_rxdesc_ftype(d) << 2; 464 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { 465 u8 fc1 = wil_rxdesc_fc1(d); 466 int mid = wil_rxdesc_mid(d); 467 int tid = wil_rxdesc_tid(d); 468 u16 seq = wil_rxdesc_seq(d); 469 470 wil_dbg_txrx(wil, 471 "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 472 fc1, mid, cid, tid, seq); 473 stats->rx_non_data_frame++; 474 if (wil_is_back_req(fc1)) { 475 wil_dbg_txrx(wil, 476 "BAR: MID %d CID %d TID %d Seq 0x%03x\n", 477 mid, cid, tid, seq); 478 wil_rx_bar(wil, cid, tid, seq); 479 } else { 480 /* print again all info. One can enable only this 481 * without overhead for printing every Rx frame 482 */ 483 wil_dbg_txrx(wil, 484 "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 485 fc1, mid, cid, tid, seq); 486 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 487 (const void *)d, sizeof(*d), false); 488 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 489 skb->data, skb_headlen(skb), false); 490 } 491 kfree_skb(skb); 492 goto again; 493 } 494 495 if (unlikely(skb->len < ETH_HLEN + snaplen)) { 496 wil_err(wil, "Short frame, len = %d\n", skb->len); 497 stats->rx_short_frame++; 498 kfree_skb(skb); 499 goto again; 500 } 501 502 /* L4 IDENT is on when HW calculated checksum, check status 503 * and in case of error drop the packet 504 * higher stack layers will handle retransmission (if required) 505 */ 506 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { 507 /* L4 protocol identified, csum calculated */ 508 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) 509 skb->ip_summed = CHECKSUM_UNNECESSARY; 510 /* If HW reports bad checksum, let IP stack re-check it 511 * For example, HW don't understand Microsoft IP stack that 512 * mis-calculates TCP checksum - if it should be 0x0, 513 * it writes 0xffff in violation of RFC 1624 514 */ 515 } 516 517 if (snaplen) { 518 /* Packet layout 519 * +-------+-------+---------+------------+------+ 520 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | 521 * +-------+-------+---------+------------+------+ 522 * Need to remove SNAP, shifting SA and DA forward 523 */ 524 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); 525 skb_pull(skb, snaplen); 526 } 527 528 return skb; 529 } 530 531 /** 532 * allocate and fill up to @count buffers in rx ring 533 * buffers posted at @swtail 534 */ 535 static int wil_rx_refill(struct wil6210_priv *wil, int count) 536 { 537 struct net_device *ndev = wil_to_ndev(wil); 538 struct vring *v = &wil->vring_rx; 539 u32 next_tail; 540 int rc = 0; 541 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? 542 WIL6210_RTAP_SIZE : 0; 543 544 for (; next_tail = wil_vring_next_tail(v), 545 (next_tail != v->swhead) && (count-- > 0); 546 v->swtail = next_tail) { 547 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); 548 if (unlikely(rc)) { 549 wil_err(wil, "Error %d in wil_rx_refill[%d]\n", 550 rc, v->swtail); 551 break; 552 } 553 } 554 555 /* make sure all writes to descriptors (shared memory) are done before 556 * committing them to HW 557 */ 558 wmb(); 559 560 wil_w(wil, v->hwtail, v->swtail); 561 562 return rc; 563 } 564 565 /** 566 * reverse_memcmp - Compare two areas of memory, in reverse order 567 * @cs: One area of memory 568 * @ct: Another area of memory 569 * @count: The size of the area. 570 * 571 * Cut'n'paste from original memcmp (see lib/string.c) 572 * with minimal modifications 573 */ 574 static int reverse_memcmp(const void *cs, const void *ct, size_t count) 575 { 576 const unsigned char *su1, *su2; 577 int res = 0; 578 579 for (su1 = cs + count - 1, su2 = ct + count - 1; count > 0; 580 --su1, --su2, count--) { 581 res = *su1 - *su2; 582 if (res) 583 break; 584 } 585 return res; 586 } 587 588 static int wil_rx_crypto_check(struct wil6210_priv *wil, struct sk_buff *skb) 589 { 590 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 591 int cid = wil_rxdesc_cid(d); 592 int tid = wil_rxdesc_tid(d); 593 int key_id = wil_rxdesc_key_id(d); 594 int mc = wil_rxdesc_mcast(d); 595 struct wil_sta_info *s = &wil->sta[cid]; 596 struct wil_tid_crypto_rx *c = mc ? &s->group_crypto_rx : 597 &s->tid_crypto_rx[tid]; 598 struct wil_tid_crypto_rx_single *cc = &c->key_id[key_id]; 599 const u8 *pn = (u8 *)&d->mac.pn_15_0; 600 601 if (!cc->key_set) { 602 wil_err_ratelimited(wil, 603 "Key missing. CID %d TID %d MCast %d KEY_ID %d\n", 604 cid, tid, mc, key_id); 605 return -EINVAL; 606 } 607 608 if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) { 609 wil_err_ratelimited(wil, 610 "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n", 611 cid, tid, mc, key_id, pn, cc->pn); 612 return -EINVAL; 613 } 614 memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN); 615 616 return 0; 617 } 618 619 /* 620 * Pass Rx packet to the netif. Update statistics. 621 * Called in softirq context (NAPI poll). 622 */ 623 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) 624 { 625 gro_result_t rc = GRO_NORMAL; 626 struct wil6210_priv *wil = ndev_to_wil(ndev); 627 struct wireless_dev *wdev = wil_to_wdev(wil); 628 unsigned int len = skb->len; 629 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 630 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ 631 int security = wil_rxdesc_security(d); 632 struct ethhdr *eth = (void *)skb->data; 633 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication 634 * is not suitable, need to look at data 635 */ 636 int mcast = is_multicast_ether_addr(eth->h_dest); 637 struct wil_net_stats *stats = &wil->sta[cid].stats; 638 struct sk_buff *xmit_skb = NULL; 639 static const char * const gro_res_str[] = { 640 [GRO_MERGED] = "GRO_MERGED", 641 [GRO_MERGED_FREE] = "GRO_MERGED_FREE", 642 [GRO_HELD] = "GRO_HELD", 643 [GRO_NORMAL] = "GRO_NORMAL", 644 [GRO_DROP] = "GRO_DROP", 645 }; 646 647 if (ndev->features & NETIF_F_RXHASH) 648 /* fake L4 to ensure it won't be re-calculated later 649 * set hash to any non-zero value to activate rps 650 * mechanism, core will be chosen according 651 * to user-level rps configuration. 652 */ 653 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); 654 655 skb_orphan(skb); 656 657 if (security && (wil_rx_crypto_check(wil, skb) != 0)) { 658 rc = GRO_DROP; 659 dev_kfree_skb(skb); 660 stats->rx_replay++; 661 goto stats; 662 } 663 664 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { 665 if (mcast) { 666 /* send multicast frames both to higher layers in 667 * local net stack and back to the wireless medium 668 */ 669 xmit_skb = skb_copy(skb, GFP_ATOMIC); 670 } else { 671 int xmit_cid = wil_find_cid(wil, eth->h_dest); 672 673 if (xmit_cid >= 0) { 674 /* The destination station is associated to 675 * this AP (in this VLAN), so send the frame 676 * directly to it and do not pass it to local 677 * net stack. 678 */ 679 xmit_skb = skb; 680 skb = NULL; 681 } 682 } 683 } 684 if (xmit_skb) { 685 /* Send to wireless media and increase priority by 256 to 686 * keep the received priority instead of reclassifying 687 * the frame (see cfg80211_classify8021d). 688 */ 689 xmit_skb->dev = ndev; 690 xmit_skb->priority += 256; 691 xmit_skb->protocol = htons(ETH_P_802_3); 692 skb_reset_network_header(xmit_skb); 693 skb_reset_mac_header(xmit_skb); 694 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); 695 dev_queue_xmit(xmit_skb); 696 } 697 698 if (skb) { /* deliver to local stack */ 699 700 skb->protocol = eth_type_trans(skb, ndev); 701 rc = napi_gro_receive(&wil->napi_rx, skb); 702 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", 703 len, gro_res_str[rc]); 704 } 705 stats: 706 /* statistics. rc set to GRO_NORMAL for AP bridging */ 707 if (unlikely(rc == GRO_DROP)) { 708 ndev->stats.rx_dropped++; 709 stats->rx_dropped++; 710 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); 711 } else { 712 ndev->stats.rx_packets++; 713 stats->rx_packets++; 714 ndev->stats.rx_bytes += len; 715 stats->rx_bytes += len; 716 if (mcast) 717 ndev->stats.multicast++; 718 } 719 } 720 721 /** 722 * Proceed all completed skb's from Rx VRING 723 * 724 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled 725 */ 726 void wil_rx_handle(struct wil6210_priv *wil, int *quota) 727 { 728 struct net_device *ndev = wil_to_ndev(wil); 729 struct vring *v = &wil->vring_rx; 730 struct sk_buff *skb; 731 732 if (unlikely(!v->va)) { 733 wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); 734 return; 735 } 736 wil_dbg_txrx(wil, "%s()\n", __func__); 737 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { 738 (*quota)--; 739 740 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { 741 skb->dev = ndev; 742 skb_reset_mac_header(skb); 743 skb->ip_summed = CHECKSUM_UNNECESSARY; 744 skb->pkt_type = PACKET_OTHERHOST; 745 skb->protocol = htons(ETH_P_802_2); 746 wil_netif_rx_any(skb, ndev); 747 } else { 748 wil_rx_reorder(wil, skb); 749 } 750 } 751 wil_rx_refill(wil, v->size); 752 } 753 754 int wil_rx_init(struct wil6210_priv *wil, u16 size) 755 { 756 struct vring *vring = &wil->vring_rx; 757 int rc; 758 759 wil_dbg_misc(wil, "%s()\n", __func__); 760 761 if (vring->va) { 762 wil_err(wil, "Rx ring already allocated\n"); 763 return -EINVAL; 764 } 765 766 vring->size = size; 767 rc = wil_vring_alloc(wil, vring); 768 if (rc) 769 return rc; 770 771 rc = wmi_rx_chain_add(wil, vring); 772 if (rc) 773 goto err_free; 774 775 rc = wil_rx_refill(wil, vring->size); 776 if (rc) 777 goto err_free; 778 779 return 0; 780 err_free: 781 wil_vring_free(wil, vring, 0); 782 783 return rc; 784 } 785 786 void wil_rx_fini(struct wil6210_priv *wil) 787 { 788 struct vring *vring = &wil->vring_rx; 789 790 wil_dbg_misc(wil, "%s()\n", __func__); 791 792 if (vring->va) 793 wil_vring_free(wil, vring, 0); 794 } 795 796 static inline void wil_tx_data_init(struct vring_tx_data *txdata) 797 { 798 spin_lock_bh(&txdata->lock); 799 txdata->dot1x_open = 0; 800 txdata->enabled = 0; 801 txdata->idle = 0; 802 txdata->last_idle = 0; 803 txdata->begin = 0; 804 txdata->agg_wsize = 0; 805 txdata->agg_timeout = 0; 806 txdata->agg_amsdu = 0; 807 txdata->addba_in_progress = false; 808 spin_unlock_bh(&txdata->lock); 809 } 810 811 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 812 int cid, int tid) 813 { 814 int rc; 815 struct wmi_vring_cfg_cmd cmd = { 816 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 817 .vring_cfg = { 818 .tx_sw_ring = { 819 .max_mpdu_size = 820 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 821 .ring_size = cpu_to_le16(size), 822 }, 823 .ringid = id, 824 .cidxtid = mk_cidxtid(cid, tid), 825 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 826 .mac_ctrl = 0, 827 .to_resolution = 0, 828 .agg_max_wsize = 0, 829 .schd_params = { 830 .priority = cpu_to_le16(0), 831 .timeslot_us = cpu_to_le16(0xfff), 832 }, 833 }, 834 }; 835 struct { 836 struct wmi_cmd_hdr wmi; 837 struct wmi_vring_cfg_done_event cmd; 838 } __packed reply; 839 struct vring *vring = &wil->vring_tx[id]; 840 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 841 842 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 843 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 844 lockdep_assert_held(&wil->mutex); 845 846 if (vring->va) { 847 wil_err(wil, "Tx ring [%d] already allocated\n", id); 848 rc = -EINVAL; 849 goto out; 850 } 851 852 wil_tx_data_init(txdata); 853 vring->size = size; 854 rc = wil_vring_alloc(wil, vring); 855 if (rc) 856 goto out; 857 858 wil->vring2cid_tid[id][0] = cid; 859 wil->vring2cid_tid[id][1] = tid; 860 861 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 862 863 if (!wil->privacy) 864 txdata->dot1x_open = true; 865 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), 866 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 867 if (rc) 868 goto out_free; 869 870 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 871 wil_err(wil, "Tx config failed, status 0x%02x\n", 872 reply.cmd.status); 873 rc = -EINVAL; 874 goto out_free; 875 } 876 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 877 878 txdata->enabled = 1; 879 if (txdata->dot1x_open && (agg_wsize >= 0)) 880 wil_addba_tx_request(wil, id, agg_wsize); 881 882 return 0; 883 out_free: 884 spin_lock_bh(&txdata->lock); 885 txdata->dot1x_open = false; 886 txdata->enabled = 0; 887 spin_unlock_bh(&txdata->lock); 888 wil_vring_free(wil, vring, 1); 889 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; 890 wil->vring2cid_tid[id][1] = 0; 891 892 out: 893 894 return rc; 895 } 896 897 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) 898 { 899 int rc; 900 struct wmi_bcast_vring_cfg_cmd cmd = { 901 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 902 .vring_cfg = { 903 .tx_sw_ring = { 904 .max_mpdu_size = 905 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 906 .ring_size = cpu_to_le16(size), 907 }, 908 .ringid = id, 909 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 910 }, 911 }; 912 struct { 913 struct wmi_cmd_hdr wmi; 914 struct wmi_vring_cfg_done_event cmd; 915 } __packed reply; 916 struct vring *vring = &wil->vring_tx[id]; 917 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 918 919 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__, 920 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 921 lockdep_assert_held(&wil->mutex); 922 923 if (vring->va) { 924 wil_err(wil, "Tx ring [%d] already allocated\n", id); 925 rc = -EINVAL; 926 goto out; 927 } 928 929 wil_tx_data_init(txdata); 930 vring->size = size; 931 rc = wil_vring_alloc(wil, vring); 932 if (rc) 933 goto out; 934 935 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ 936 wil->vring2cid_tid[id][1] = 0; /* TID */ 937 938 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 939 940 if (!wil->privacy) 941 txdata->dot1x_open = true; 942 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), 943 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 944 if (rc) 945 goto out_free; 946 947 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 948 wil_err(wil, "Tx config failed, status 0x%02x\n", 949 reply.cmd.status); 950 rc = -EINVAL; 951 goto out_free; 952 } 953 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 954 955 txdata->enabled = 1; 956 957 return 0; 958 out_free: 959 spin_lock_bh(&txdata->lock); 960 txdata->enabled = 0; 961 txdata->dot1x_open = false; 962 spin_unlock_bh(&txdata->lock); 963 wil_vring_free(wil, vring, 1); 964 out: 965 966 return rc; 967 } 968 969 void wil_vring_fini_tx(struct wil6210_priv *wil, int id) 970 { 971 struct vring *vring = &wil->vring_tx[id]; 972 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 973 974 lockdep_assert_held(&wil->mutex); 975 976 if (!vring->va) 977 return; 978 979 wil_dbg_misc(wil, "%s() id=%d\n", __func__, id); 980 981 spin_lock_bh(&txdata->lock); 982 txdata->dot1x_open = false; 983 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 984 spin_unlock_bh(&txdata->lock); 985 /* napi_synchronize waits for completion of the current NAPI but will 986 * not prevent the next NAPI run. 987 * Add a memory barrier to guarantee that txdata->enabled is zeroed 988 * before napi_synchronize so that the next scheduled NAPI will not 989 * handle this vring 990 */ 991 wmb(); 992 /* make sure NAPI won't touch this vring */ 993 if (test_bit(wil_status_napi_en, wil->status)) 994 napi_synchronize(&wil->napi_tx); 995 996 wil_vring_free(wil, vring, 1); 997 } 998 999 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, 1000 struct sk_buff *skb) 1001 { 1002 int i; 1003 struct ethhdr *eth = (void *)skb->data; 1004 int cid = wil_find_cid(wil, eth->h_dest); 1005 1006 if (cid < 0) 1007 return NULL; 1008 1009 /* TODO: fix for multiple TID */ 1010 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { 1011 if (!wil->vring_tx_data[i].dot1x_open && 1012 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1013 continue; 1014 if (wil->vring2cid_tid[i][0] == cid) { 1015 struct vring *v = &wil->vring_tx[i]; 1016 struct vring_tx_data *txdata = &wil->vring_tx_data[i]; 1017 1018 wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n", 1019 __func__, eth->h_dest, i); 1020 if (v->va && txdata->enabled) { 1021 return v; 1022 } else { 1023 wil_dbg_txrx(wil, "vring[%d] not valid\n", i); 1024 return NULL; 1025 } 1026 } 1027 } 1028 1029 return NULL; 1030 } 1031 1032 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1033 struct sk_buff *skb); 1034 1035 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, 1036 struct sk_buff *skb) 1037 { 1038 struct vring *v; 1039 int i; 1040 u8 cid; 1041 struct vring_tx_data *txdata; 1042 1043 /* In the STA mode, it is expected to have only 1 VRING 1044 * for the AP we connected to. 1045 * find 1-st vring eligible for this skb and use it. 1046 */ 1047 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1048 v = &wil->vring_tx[i]; 1049 txdata = &wil->vring_tx_data[i]; 1050 if (!v->va || !txdata->enabled) 1051 continue; 1052 1053 cid = wil->vring2cid_tid[i][0]; 1054 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1055 continue; 1056 1057 if (!wil->vring_tx_data[i].dot1x_open && 1058 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1059 continue; 1060 1061 wil_dbg_txrx(wil, "Tx -> ring %d\n", i); 1062 1063 return v; 1064 } 1065 1066 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1067 1068 return NULL; 1069 } 1070 1071 /* Use one of 2 strategies: 1072 * 1073 * 1. New (real broadcast): 1074 * use dedicated broadcast vring 1075 * 2. Old (pseudo-DMS): 1076 * Find 1-st vring and return it; 1077 * duplicate skb and send it to other active vrings; 1078 * in all cases override dest address to unicast peer's address 1079 * Use old strategy when new is not supported yet: 1080 * - for PBSS 1081 */ 1082 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, 1083 struct sk_buff *skb) 1084 { 1085 struct vring *v; 1086 struct vring_tx_data *txdata; 1087 int i = wil->bcast_vring; 1088 1089 if (i < 0) 1090 return NULL; 1091 v = &wil->vring_tx[i]; 1092 txdata = &wil->vring_tx_data[i]; 1093 if (!v->va || !txdata->enabled) 1094 return NULL; 1095 if (!wil->vring_tx_data[i].dot1x_open && 1096 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1097 return NULL; 1098 1099 return v; 1100 } 1101 1102 static void wil_set_da_for_vring(struct wil6210_priv *wil, 1103 struct sk_buff *skb, int vring_index) 1104 { 1105 struct ethhdr *eth = (void *)skb->data; 1106 int cid = wil->vring2cid_tid[vring_index][0]; 1107 1108 ether_addr_copy(eth->h_dest, wil->sta[cid].addr); 1109 } 1110 1111 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, 1112 struct sk_buff *skb) 1113 { 1114 struct vring *v, *v2; 1115 struct sk_buff *skb2; 1116 int i; 1117 u8 cid; 1118 struct ethhdr *eth = (void *)skb->data; 1119 char *src = eth->h_source; 1120 struct vring_tx_data *txdata; 1121 1122 /* find 1-st vring eligible for data */ 1123 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1124 v = &wil->vring_tx[i]; 1125 txdata = &wil->vring_tx_data[i]; 1126 if (!v->va || !txdata->enabled) 1127 continue; 1128 1129 cid = wil->vring2cid_tid[i][0]; 1130 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1131 continue; 1132 if (!wil->vring_tx_data[i].dot1x_open && 1133 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1134 continue; 1135 1136 /* don't Tx back to source when re-routing Rx->Tx at the AP */ 1137 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1138 continue; 1139 1140 goto found; 1141 } 1142 1143 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1144 1145 return NULL; 1146 1147 found: 1148 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); 1149 wil_set_da_for_vring(wil, skb, i); 1150 1151 /* find other active vrings and duplicate skb for each */ 1152 for (i++; i < WIL6210_MAX_TX_RINGS; i++) { 1153 v2 = &wil->vring_tx[i]; 1154 if (!v2->va) 1155 continue; 1156 cid = wil->vring2cid_tid[i][0]; 1157 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1158 continue; 1159 if (!wil->vring_tx_data[i].dot1x_open && 1160 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1161 continue; 1162 1163 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1164 continue; 1165 1166 skb2 = skb_copy(skb, GFP_ATOMIC); 1167 if (skb2) { 1168 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); 1169 wil_set_da_for_vring(wil, skb2, i); 1170 wil_tx_vring(wil, v2, skb2); 1171 } else { 1172 wil_err(wil, "skb_copy failed\n"); 1173 } 1174 } 1175 1176 return v; 1177 } 1178 1179 static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil, 1180 struct sk_buff *skb) 1181 { 1182 struct wireless_dev *wdev = wil->wdev; 1183 1184 if (wdev->iftype != NL80211_IFTYPE_AP) 1185 return wil_find_tx_bcast_2(wil, skb); 1186 1187 return wil_find_tx_bcast_1(wil, skb); 1188 } 1189 1190 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, 1191 int vring_index) 1192 { 1193 wil_desc_addr_set(&d->dma.addr, pa); 1194 d->dma.ip_length = 0; 1195 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ 1196 d->dma.b11 = 0/*14 | BIT(7)*/; 1197 d->dma.error = 0; 1198 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 1199 d->dma.length = cpu_to_le16((u16)len); 1200 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); 1201 d->mac.d[0] = 0; 1202 d->mac.d[1] = 0; 1203 d->mac.d[2] = 0; 1204 d->mac.ucode_cmd = 0; 1205 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ 1206 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | 1207 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); 1208 1209 return 0; 1210 } 1211 1212 static inline 1213 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) 1214 { 1215 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); 1216 } 1217 1218 /** 1219 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding 1220 * @skb is used to obtain the protocol and headers length. 1221 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, 1222 * 2 - middle, 3 - last descriptor. 1223 */ 1224 1225 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, 1226 struct sk_buff *skb, 1227 int tso_desc_type, bool is_ipv4, 1228 int tcp_hdr_len, int skb_net_hdr_len) 1229 { 1230 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1231 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; 1232 1233 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1234 /* L4 header len: TCP header length */ 1235 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1236 1237 /* Setup TSO: bit and desc type */ 1238 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | 1239 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); 1240 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); 1241 1242 d->dma.ip_length = skb_net_hdr_len; 1243 /* Enable TCP/UDP checksum */ 1244 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1245 /* Calculate pseudo-header */ 1246 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1247 } 1248 1249 /** 1250 * Sets the descriptor @d up for csum. The corresponding 1251 * @skb is used to obtain the protocol and headers length. 1252 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. 1253 * Note, if d==NULL, the function only returns the protocol result. 1254 * 1255 * It is very similar to previous wil_tx_desc_offload_setup_tso. This 1256 * is "if unrolling" to optimize the critical path. 1257 */ 1258 1259 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, 1260 struct sk_buff *skb){ 1261 int protocol; 1262 1263 if (skb->ip_summed != CHECKSUM_PARTIAL) 1264 return 0; 1265 1266 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1267 1268 switch (skb->protocol) { 1269 case cpu_to_be16(ETH_P_IP): 1270 protocol = ip_hdr(skb)->protocol; 1271 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); 1272 break; 1273 case cpu_to_be16(ETH_P_IPV6): 1274 protocol = ipv6_hdr(skb)->nexthdr; 1275 break; 1276 default: 1277 return -EINVAL; 1278 } 1279 1280 switch (protocol) { 1281 case IPPROTO_TCP: 1282 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1283 /* L4 header len: TCP header length */ 1284 d->dma.d0 |= 1285 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1286 break; 1287 case IPPROTO_UDP: 1288 /* L4 header len: UDP header length */ 1289 d->dma.d0 |= 1290 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1291 break; 1292 default: 1293 return -EINVAL; 1294 } 1295 1296 d->dma.ip_length = skb_network_header_len(skb); 1297 /* Enable TCP/UDP checksum */ 1298 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1299 /* Calculate pseudo-header */ 1300 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1301 1302 return 0; 1303 } 1304 1305 static inline void wil_tx_last_desc(struct vring_tx_desc *d) 1306 { 1307 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | 1308 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | 1309 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1310 } 1311 1312 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) 1313 { 1314 d->dma.d0 |= wil_tso_type_lst << 1315 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; 1316 } 1317 1318 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, 1319 struct sk_buff *skb) 1320 { 1321 struct device *dev = wil_to_dev(wil); 1322 1323 /* point to descriptors in shared memory */ 1324 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, 1325 *_first_desc = NULL; 1326 1327 /* pointers to shadow descriptors */ 1328 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, 1329 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, 1330 *first_desc = &first_desc_mem; 1331 1332 /* pointer to shadow descriptors' context */ 1333 struct wil_ctx *hdr_ctx, *first_ctx = NULL; 1334 1335 int descs_used = 0; /* total number of used descriptors */ 1336 int sg_desc_cnt = 0; /* number of descriptors for current mss*/ 1337 1338 u32 swhead = vring->swhead; 1339 int used, avail = wil_vring_avail_tx(vring); 1340 int nr_frags = skb_shinfo(skb)->nr_frags; 1341 int min_desc_required = nr_frags + 1; 1342 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ 1343 int f, len, hdrlen, headlen; 1344 int vring_index = vring - wil->vring_tx; 1345 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1346 uint i = swhead; 1347 dma_addr_t pa; 1348 const skb_frag_t *frag = NULL; 1349 int rem_data = mss; 1350 int lenmss; 1351 int hdr_compensation_need = true; 1352 int desc_tso_type = wil_tso_type_first; 1353 bool is_ipv4; 1354 int tcp_hdr_len; 1355 int skb_net_hdr_len; 1356 int gso_type; 1357 int rc = -EINVAL; 1358 1359 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1360 __func__, skb->len, vring_index); 1361 1362 if (unlikely(!txdata->enabled)) 1363 return -EINVAL; 1364 1365 /* A typical page 4K is 3-4 payloads, we assume each fragment 1366 * is a full payload, that's how min_desc_required has been 1367 * calculated. In real we might need more or less descriptors, 1368 * this is the initial check only. 1369 */ 1370 if (unlikely(avail < min_desc_required)) { 1371 wil_err_ratelimited(wil, 1372 "TSO: Tx ring[%2d] full. No space for %d fragments\n", 1373 vring_index, min_desc_required); 1374 return -ENOMEM; 1375 } 1376 1377 /* Header Length = MAC header len + IP header len + TCP header len*/ 1378 hdrlen = ETH_HLEN + 1379 (int)skb_network_header_len(skb) + 1380 tcp_hdrlen(skb); 1381 1382 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); 1383 switch (gso_type) { 1384 case SKB_GSO_TCPV4: 1385 /* TCP v4, zero out the IP length and IPv4 checksum fields 1386 * as required by the offloading doc 1387 */ 1388 ip_hdr(skb)->tot_len = 0; 1389 ip_hdr(skb)->check = 0; 1390 is_ipv4 = true; 1391 break; 1392 case SKB_GSO_TCPV6: 1393 /* TCP v6, zero out the payload length */ 1394 ipv6_hdr(skb)->payload_len = 0; 1395 is_ipv4 = false; 1396 break; 1397 default: 1398 /* other than TCPv4 or TCPv6 types are not supported for TSO. 1399 * It is also illegal for both to be set simultaneously 1400 */ 1401 return -EINVAL; 1402 } 1403 1404 if (skb->ip_summed != CHECKSUM_PARTIAL) 1405 return -EINVAL; 1406 1407 /* tcp header length and skb network header length are fixed for all 1408 * packet's descriptors - read then once here 1409 */ 1410 tcp_hdr_len = tcp_hdrlen(skb); 1411 skb_net_hdr_len = skb_network_header_len(skb); 1412 1413 _hdr_desc = &vring->va[i].tx; 1414 1415 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); 1416 if (unlikely(dma_mapping_error(dev, pa))) { 1417 wil_err(wil, "TSO: Skb head DMA map error\n"); 1418 goto err_exit; 1419 } 1420 1421 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); 1422 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, 1423 tcp_hdr_len, skb_net_hdr_len); 1424 wil_tx_last_desc(hdr_desc); 1425 1426 vring->ctx[i].mapped_as = wil_mapped_as_single; 1427 hdr_ctx = &vring->ctx[i]; 1428 1429 descs_used++; 1430 headlen = skb_headlen(skb) - hdrlen; 1431 1432 for (f = headlen ? -1 : 0; f < nr_frags; f++) { 1433 if (headlen) { 1434 len = headlen; 1435 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", 1436 len); 1437 } else { 1438 frag = &skb_shinfo(skb)->frags[f]; 1439 len = frag->size; 1440 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); 1441 } 1442 1443 while (len) { 1444 wil_dbg_txrx(wil, 1445 "TSO: len %d, rem_data %d, descs_used %d\n", 1446 len, rem_data, descs_used); 1447 1448 if (descs_used == avail) { 1449 wil_err_ratelimited(wil, "TSO: ring overflow\n"); 1450 rc = -ENOMEM; 1451 goto mem_error; 1452 } 1453 1454 lenmss = min_t(int, rem_data, len); 1455 i = (swhead + descs_used) % vring->size; 1456 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); 1457 1458 if (!headlen) { 1459 pa = skb_frag_dma_map(dev, frag, 1460 frag->size - len, lenmss, 1461 DMA_TO_DEVICE); 1462 vring->ctx[i].mapped_as = wil_mapped_as_page; 1463 } else { 1464 pa = dma_map_single(dev, 1465 skb->data + 1466 skb_headlen(skb) - headlen, 1467 lenmss, 1468 DMA_TO_DEVICE); 1469 vring->ctx[i].mapped_as = wil_mapped_as_single; 1470 headlen -= lenmss; 1471 } 1472 1473 if (unlikely(dma_mapping_error(dev, pa))) { 1474 wil_err(wil, "TSO: DMA map page error\n"); 1475 goto mem_error; 1476 } 1477 1478 _desc = &vring->va[i].tx; 1479 1480 if (!_first_desc) { 1481 _first_desc = _desc; 1482 first_ctx = &vring->ctx[i]; 1483 d = first_desc; 1484 } else { 1485 d = &desc_mem; 1486 } 1487 1488 wil_tx_desc_map(d, pa, lenmss, vring_index); 1489 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, 1490 is_ipv4, tcp_hdr_len, 1491 skb_net_hdr_len); 1492 1493 /* use tso_type_first only once */ 1494 desc_tso_type = wil_tso_type_mid; 1495 1496 descs_used++; /* desc used so far */ 1497 sg_desc_cnt++; /* desc used for this segment */ 1498 len -= lenmss; 1499 rem_data -= lenmss; 1500 1501 wil_dbg_txrx(wil, 1502 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", 1503 len, rem_data, descs_used, sg_desc_cnt); 1504 1505 /* Close the segment if reached mss size or last frag*/ 1506 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { 1507 if (hdr_compensation_need) { 1508 /* first segment include hdr desc for 1509 * release 1510 */ 1511 hdr_ctx->nr_frags = sg_desc_cnt; 1512 wil_tx_desc_set_nr_frags(first_desc, 1513 sg_desc_cnt + 1514 1); 1515 hdr_compensation_need = false; 1516 } else { 1517 wil_tx_desc_set_nr_frags(first_desc, 1518 sg_desc_cnt); 1519 } 1520 first_ctx->nr_frags = sg_desc_cnt - 1; 1521 1522 wil_tx_last_desc(d); 1523 1524 /* first descriptor may also be the last 1525 * for this mss - make sure not to copy 1526 * it twice 1527 */ 1528 if (first_desc != d) 1529 *_first_desc = *first_desc; 1530 1531 /*last descriptor will be copied at the end 1532 * of this TS processing 1533 */ 1534 if (f < nr_frags - 1 || len > 0) 1535 *_desc = *d; 1536 1537 rem_data = mss; 1538 _first_desc = NULL; 1539 sg_desc_cnt = 0; 1540 } else if (first_desc != d) /* update mid descriptor */ 1541 *_desc = *d; 1542 } 1543 } 1544 1545 /* first descriptor may also be the last. 1546 * in this case d pointer is invalid 1547 */ 1548 if (_first_desc == _desc) 1549 d = first_desc; 1550 1551 /* Last data descriptor */ 1552 wil_set_tx_desc_last_tso(d); 1553 *_desc = *d; 1554 1555 /* Fill the total number of descriptors in first desc (hdr)*/ 1556 wil_tx_desc_set_nr_frags(hdr_desc, descs_used); 1557 *_hdr_desc = *hdr_desc; 1558 1559 /* hold reference to skb 1560 * to prevent skb release before accounting 1561 * in case of immediate "tx done" 1562 */ 1563 vring->ctx[i].skb = skb_get(skb); 1564 1565 /* performance monitoring */ 1566 used = wil_vring_used_tx(vring); 1567 if (wil_val_in_range(vring_idle_trsh, 1568 used, used + descs_used)) { 1569 txdata->idle += get_cycles() - txdata->last_idle; 1570 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1571 vring_index, used, used + descs_used); 1572 } 1573 1574 /* Make sure to advance the head only after descriptor update is done. 1575 * This will prevent a race condition where the completion thread 1576 * will see the DU bit set from previous run and will handle the 1577 * skb before it was completed. 1578 */ 1579 wmb(); 1580 1581 /* advance swhead */ 1582 wil_vring_advance_head(vring, descs_used); 1583 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1584 1585 /* make sure all writes to descriptors (shared memory) are done before 1586 * committing them to HW 1587 */ 1588 wmb(); 1589 1590 wil_w(wil, vring->hwtail, vring->swhead); 1591 return 0; 1592 1593 mem_error: 1594 while (descs_used > 0) { 1595 struct wil_ctx *ctx; 1596 1597 i = (swhead + descs_used - 1) % vring->size; 1598 d = (struct vring_tx_desc *)&vring->va[i].tx; 1599 _desc = &vring->va[i].tx; 1600 *d = *_desc; 1601 _desc->dma.status = TX_DMA_STATUS_DU; 1602 ctx = &vring->ctx[i]; 1603 wil_txdesc_unmap(dev, d, ctx); 1604 memset(ctx, 0, sizeof(*ctx)); 1605 descs_used--; 1606 } 1607 err_exit: 1608 return rc; 1609 } 1610 1611 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1612 struct sk_buff *skb) 1613 { 1614 struct device *dev = wil_to_dev(wil); 1615 struct vring_tx_desc dd, *d = ⅆ 1616 volatile struct vring_tx_desc *_d; 1617 u32 swhead = vring->swhead; 1618 int avail = wil_vring_avail_tx(vring); 1619 int nr_frags = skb_shinfo(skb)->nr_frags; 1620 uint f = 0; 1621 int vring_index = vring - wil->vring_tx; 1622 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1623 uint i = swhead; 1624 dma_addr_t pa; 1625 int used; 1626 bool mcast = (vring_index == wil->bcast_vring); 1627 uint len = skb_headlen(skb); 1628 1629 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n", 1630 __func__, skb->len, vring_index); 1631 1632 if (unlikely(!txdata->enabled)) 1633 return -EINVAL; 1634 1635 if (unlikely(avail < 1 + nr_frags)) { 1636 wil_err_ratelimited(wil, 1637 "Tx ring[%2d] full. No space for %d fragments\n", 1638 vring_index, 1 + nr_frags); 1639 return -ENOMEM; 1640 } 1641 _d = &vring->va[i].tx; 1642 1643 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1644 1645 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, 1646 skb_headlen(skb), skb->data, &pa); 1647 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, 1648 skb->data, skb_headlen(skb), false); 1649 1650 if (unlikely(dma_mapping_error(dev, pa))) 1651 return -EINVAL; 1652 vring->ctx[i].mapped_as = wil_mapped_as_single; 1653 /* 1-st segment */ 1654 wil_tx_desc_map(d, pa, len, vring_index); 1655 if (unlikely(mcast)) { 1656 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ 1657 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ 1658 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); 1659 } 1660 /* Process TCP/UDP checksum offloading */ 1661 if (unlikely(wil_tx_desc_offload_setup(d, skb))) { 1662 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", 1663 vring_index); 1664 goto dma_error; 1665 } 1666 1667 vring->ctx[i].nr_frags = nr_frags; 1668 wil_tx_desc_set_nr_frags(d, nr_frags + 1); 1669 1670 /* middle segments */ 1671 for (; f < nr_frags; f++) { 1672 const struct skb_frag_struct *frag = 1673 &skb_shinfo(skb)->frags[f]; 1674 int len = skb_frag_size(frag); 1675 1676 *_d = *d; 1677 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1678 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1679 (const void *)d, sizeof(*d), false); 1680 i = (swhead + f + 1) % vring->size; 1681 _d = &vring->va[i].tx; 1682 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1683 DMA_TO_DEVICE); 1684 if (unlikely(dma_mapping_error(dev, pa))) { 1685 wil_err(wil, "Tx[%2d] failed to map fragment\n", 1686 vring_index); 1687 goto dma_error; 1688 } 1689 vring->ctx[i].mapped_as = wil_mapped_as_page; 1690 wil_tx_desc_map(d, pa, len, vring_index); 1691 /* no need to check return code - 1692 * if it succeeded for 1-st descriptor, 1693 * it will succeed here too 1694 */ 1695 wil_tx_desc_offload_setup(d, skb); 1696 } 1697 /* for the last seg only */ 1698 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); 1699 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); 1700 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1701 *_d = *d; 1702 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1703 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1704 (const void *)d, sizeof(*d), false); 1705 1706 /* hold reference to skb 1707 * to prevent skb release before accounting 1708 * in case of immediate "tx done" 1709 */ 1710 vring->ctx[i].skb = skb_get(skb); 1711 1712 /* performance monitoring */ 1713 used = wil_vring_used_tx(vring); 1714 if (wil_val_in_range(vring_idle_trsh, 1715 used, used + nr_frags + 1)) { 1716 txdata->idle += get_cycles() - txdata->last_idle; 1717 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1718 vring_index, used, used + nr_frags + 1); 1719 } 1720 1721 /* Make sure to advance the head only after descriptor update is done. 1722 * This will prevent a race condition where the completion thread 1723 * will see the DU bit set from previous run and will handle the 1724 * skb before it was completed. 1725 */ 1726 wmb(); 1727 1728 /* advance swhead */ 1729 wil_vring_advance_head(vring, nr_frags + 1); 1730 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, 1731 vring->swhead); 1732 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); 1733 1734 /* make sure all writes to descriptors (shared memory) are done before 1735 * committing them to HW 1736 */ 1737 wmb(); 1738 1739 wil_w(wil, vring->hwtail, vring->swhead); 1740 1741 return 0; 1742 dma_error: 1743 /* unmap what we have mapped */ 1744 nr_frags = f + 1; /* frags mapped + one for skb head */ 1745 for (f = 0; f < nr_frags; f++) { 1746 struct wil_ctx *ctx; 1747 1748 i = (swhead + f) % vring->size; 1749 ctx = &vring->ctx[i]; 1750 _d = &vring->va[i].tx; 1751 *d = *_d; 1752 _d->dma.status = TX_DMA_STATUS_DU; 1753 wil_txdesc_unmap(dev, d, ctx); 1754 1755 memset(ctx, 0, sizeof(*ctx)); 1756 } 1757 1758 return -EINVAL; 1759 } 1760 1761 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1762 struct sk_buff *skb) 1763 { 1764 int vring_index = vring - wil->vring_tx; 1765 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1766 int rc; 1767 1768 spin_lock(&txdata->lock); 1769 1770 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) 1771 (wil, vring, skb); 1772 1773 spin_unlock(&txdata->lock); 1774 1775 return rc; 1776 } 1777 1778 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) 1779 { 1780 struct wil6210_priv *wil = ndev_to_wil(ndev); 1781 struct ethhdr *eth = (void *)skb->data; 1782 bool bcast = is_multicast_ether_addr(eth->h_dest); 1783 struct vring *vring; 1784 static bool pr_once_fw; 1785 int rc; 1786 1787 wil_dbg_txrx(wil, "%s()\n", __func__); 1788 if (unlikely(!test_bit(wil_status_fwready, wil->status))) { 1789 if (!pr_once_fw) { 1790 wil_err(wil, "FW not ready\n"); 1791 pr_once_fw = true; 1792 } 1793 goto drop; 1794 } 1795 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { 1796 wil_dbg_ratelimited(wil, "FW not connected, packet dropped\n"); 1797 goto drop; 1798 } 1799 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { 1800 wil_err(wil, "Xmit in monitor mode not supported\n"); 1801 goto drop; 1802 } 1803 pr_once_fw = false; 1804 1805 /* find vring */ 1806 if (wil->wdev->iftype == NL80211_IFTYPE_STATION) { 1807 /* in STA mode (ESS), all to same VRING */ 1808 vring = wil_find_tx_vring_sta(wil, skb); 1809 } else { /* direct communication, find matching VRING */ 1810 vring = bcast ? wil_find_tx_bcast(wil, skb) : 1811 wil_find_tx_ucast(wil, skb); 1812 } 1813 if (unlikely(!vring)) { 1814 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); 1815 goto drop; 1816 } 1817 /* set up vring entry */ 1818 rc = wil_tx_vring(wil, vring, skb); 1819 1820 /* do we still have enough room in the vring? */ 1821 if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) { 1822 netif_tx_stop_all_queues(wil_to_ndev(wil)); 1823 wil_dbg_txrx(wil, "netif_tx_stop : ring full\n"); 1824 } 1825 1826 switch (rc) { 1827 case 0: 1828 /* statistics will be updated on the tx_complete */ 1829 dev_kfree_skb_any(skb); 1830 return NETDEV_TX_OK; 1831 case -ENOMEM: 1832 return NETDEV_TX_BUSY; 1833 default: 1834 break; /* goto drop; */ 1835 } 1836 drop: 1837 ndev->stats.tx_dropped++; 1838 dev_kfree_skb_any(skb); 1839 1840 return NET_XMIT_DROP; 1841 } 1842 1843 static inline bool wil_need_txstat(struct sk_buff *skb) 1844 { 1845 struct ethhdr *eth = (void *)skb->data; 1846 1847 return is_unicast_ether_addr(eth->h_dest) && skb->sk && 1848 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 1849 } 1850 1851 static inline void wil_consume_skb(struct sk_buff *skb, bool acked) 1852 { 1853 if (unlikely(wil_need_txstat(skb))) 1854 skb_complete_wifi_ack(skb, acked); 1855 else 1856 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); 1857 } 1858 1859 /** 1860 * Clean up transmitted skb's from the Tx VRING 1861 * 1862 * Return number of descriptors cleared 1863 * 1864 * Safe to call from IRQ 1865 */ 1866 int wil_tx_complete(struct wil6210_priv *wil, int ringid) 1867 { 1868 struct net_device *ndev = wil_to_ndev(wil); 1869 struct device *dev = wil_to_dev(wil); 1870 struct vring *vring = &wil->vring_tx[ringid]; 1871 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; 1872 int done = 0; 1873 int cid = wil->vring2cid_tid[ringid][0]; 1874 struct wil_net_stats *stats = NULL; 1875 volatile struct vring_tx_desc *_d; 1876 int used_before_complete; 1877 int used_new; 1878 1879 if (unlikely(!vring->va)) { 1880 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); 1881 return 0; 1882 } 1883 1884 if (unlikely(!txdata->enabled)) { 1885 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); 1886 return 0; 1887 } 1888 1889 wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid); 1890 1891 used_before_complete = wil_vring_used_tx(vring); 1892 1893 if (cid < WIL6210_MAX_CID) 1894 stats = &wil->sta[cid].stats; 1895 1896 while (!wil_vring_is_empty(vring)) { 1897 int new_swtail; 1898 struct wil_ctx *ctx = &vring->ctx[vring->swtail]; 1899 /** 1900 * For the fragmented skb, HW will set DU bit only for the 1901 * last fragment. look for it. 1902 * In TSO the first DU will include hdr desc 1903 */ 1904 int lf = (vring->swtail + ctx->nr_frags) % vring->size; 1905 /* TODO: check we are not past head */ 1906 1907 _d = &vring->va[lf].tx; 1908 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) 1909 break; 1910 1911 new_swtail = (lf + 1) % vring->size; 1912 while (vring->swtail != new_swtail) { 1913 struct vring_tx_desc dd, *d = ⅆ 1914 u16 dmalen; 1915 struct sk_buff *skb; 1916 1917 ctx = &vring->ctx[vring->swtail]; 1918 skb = ctx->skb; 1919 _d = &vring->va[vring->swtail].tx; 1920 1921 *d = *_d; 1922 1923 dmalen = le16_to_cpu(d->dma.length); 1924 trace_wil6210_tx_done(ringid, vring->swtail, dmalen, 1925 d->dma.error); 1926 wil_dbg_txrx(wil, 1927 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", 1928 ringid, vring->swtail, dmalen, 1929 d->dma.status, d->dma.error); 1930 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, 1931 (const void *)d, sizeof(*d), false); 1932 1933 wil_txdesc_unmap(dev, d, ctx); 1934 1935 if (skb) { 1936 if (likely(d->dma.error == 0)) { 1937 ndev->stats.tx_packets++; 1938 ndev->stats.tx_bytes += skb->len; 1939 if (stats) { 1940 stats->tx_packets++; 1941 stats->tx_bytes += skb->len; 1942 } 1943 } else { 1944 ndev->stats.tx_errors++; 1945 if (stats) 1946 stats->tx_errors++; 1947 } 1948 wil_consume_skb(skb, d->dma.error == 0); 1949 } 1950 memset(ctx, 0, sizeof(*ctx)); 1951 /* Make sure the ctx is zeroed before updating the tail 1952 * to prevent a case where wil_tx_vring will see 1953 * this descriptor as used and handle it before ctx zero 1954 * is completed. 1955 */ 1956 wmb(); 1957 /* There is no need to touch HW descriptor: 1958 * - ststus bit TX_DMA_STATUS_DU is set by design, 1959 * so hardware will not try to process this desc., 1960 * - rest of descriptor will be initialized on Tx. 1961 */ 1962 vring->swtail = wil_vring_next_tail(vring); 1963 done++; 1964 } 1965 } 1966 1967 /* performance monitoring */ 1968 used_new = wil_vring_used_tx(vring); 1969 if (wil_val_in_range(vring_idle_trsh, 1970 used_new, used_before_complete)) { 1971 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", 1972 ringid, used_before_complete, used_new); 1973 txdata->last_idle = get_cycles(); 1974 } 1975 1976 if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) { 1977 wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n"); 1978 netif_tx_wake_all_queues(wil_to_ndev(wil)); 1979 } 1980 1981 return done; 1982 } 1983