1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <linux/etherdevice.h> 18 #include <net/ieee80211_radiotap.h> 19 #include <linux/if_arp.h> 20 #include <linux/moduleparam.h> 21 #include <linux/ip.h> 22 #include <linux/ipv6.h> 23 #include <net/ipv6.h> 24 #include <linux/prefetch.h> 25 26 #include "wil6210.h" 27 #include "wmi.h" 28 #include "txrx.h" 29 #include "trace.h" 30 31 static bool rtap_include_phy_info; 32 module_param(rtap_include_phy_info, bool, 0444); 33 MODULE_PARM_DESC(rtap_include_phy_info, 34 " Include PHY info in the radiotap header, default - no"); 35 36 bool rx_align_2; 37 module_param(rx_align_2, bool, 0444); 38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no"); 39 40 static inline uint wil_rx_snaplen(void) 41 { 42 return rx_align_2 ? 6 : 0; 43 } 44 45 static inline int wil_vring_is_empty(struct vring *vring) 46 { 47 return vring->swhead == vring->swtail; 48 } 49 50 static inline u32 wil_vring_next_tail(struct vring *vring) 51 { 52 return (vring->swtail + 1) % vring->size; 53 } 54 55 static inline void wil_vring_advance_head(struct vring *vring, int n) 56 { 57 vring->swhead = (vring->swhead + n) % vring->size; 58 } 59 60 static inline int wil_vring_is_full(struct vring *vring) 61 { 62 return wil_vring_next_tail(vring) == vring->swhead; 63 } 64 65 /* Used space in Tx Vring */ 66 static inline int wil_vring_used_tx(struct vring *vring) 67 { 68 u32 swhead = vring->swhead; 69 u32 swtail = vring->swtail; 70 return (vring->size + swhead - swtail) % vring->size; 71 } 72 73 /* Available space in Tx Vring */ 74 static inline int wil_vring_avail_tx(struct vring *vring) 75 { 76 return vring->size - wil_vring_used_tx(vring) - 1; 77 } 78 79 /* wil_vring_wmark_low - low watermark for available descriptor space */ 80 static inline int wil_vring_wmark_low(struct vring *vring) 81 { 82 return vring->size/8; 83 } 84 85 /* wil_vring_wmark_high - high watermark for available descriptor space */ 86 static inline int wil_vring_wmark_high(struct vring *vring) 87 { 88 return vring->size/4; 89 } 90 91 /* returns true if num avail descriptors is lower than wmark_low */ 92 static inline int wil_vring_avail_low(struct vring *vring) 93 { 94 return wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring); 95 } 96 97 /* returns true if num avail descriptors is higher than wmark_high */ 98 static inline int wil_vring_avail_high(struct vring *vring) 99 { 100 return wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring); 101 } 102 103 /* wil_val_in_range - check if value in [min,max) */ 104 static inline bool wil_val_in_range(int val, int min, int max) 105 { 106 return val >= min && val < max; 107 } 108 109 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring) 110 { 111 struct device *dev = wil_to_dev(wil); 112 size_t sz = vring->size * sizeof(vring->va[0]); 113 uint i; 114 115 wil_dbg_misc(wil, "vring_alloc:\n"); 116 117 BUILD_BUG_ON(sizeof(vring->va[0]) != 32); 118 119 vring->swhead = 0; 120 vring->swtail = 0; 121 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL); 122 if (!vring->ctx) { 123 vring->va = NULL; 124 return -ENOMEM; 125 } 126 /* vring->va should be aligned on its size rounded up to power of 2 127 * This is granted by the dma_alloc_coherent 128 */ 129 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL); 130 if (!vring->va) { 131 kfree(vring->ctx); 132 vring->ctx = NULL; 133 return -ENOMEM; 134 } 135 /* initially, all descriptors are SW owned 136 * For Tx and Rx, ownership bit is at the same location, thus 137 * we can use any 138 */ 139 for (i = 0; i < vring->size; i++) { 140 volatile struct vring_tx_desc *_d = &vring->va[i].tx; 141 142 _d->dma.status = TX_DMA_STATUS_DU; 143 } 144 145 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size, 146 vring->va, &vring->pa, vring->ctx); 147 148 return 0; 149 } 150 151 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d, 152 struct wil_ctx *ctx) 153 { 154 dma_addr_t pa = wil_desc_addr(&d->dma.addr); 155 u16 dmalen = le16_to_cpu(d->dma.length); 156 157 switch (ctx->mapped_as) { 158 case wil_mapped_as_single: 159 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE); 160 break; 161 case wil_mapped_as_page: 162 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE); 163 break; 164 default: 165 break; 166 } 167 } 168 169 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring, 170 int tx) 171 { 172 struct device *dev = wil_to_dev(wil); 173 size_t sz = vring->size * sizeof(vring->va[0]); 174 175 lockdep_assert_held(&wil->mutex); 176 if (tx) { 177 int vring_index = vring - wil->vring_tx; 178 179 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n", 180 vring_index, vring->size, vring->va, 181 &vring->pa, vring->ctx); 182 } else { 183 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n", 184 vring->size, vring->va, 185 &vring->pa, vring->ctx); 186 } 187 188 while (!wil_vring_is_empty(vring)) { 189 dma_addr_t pa; 190 u16 dmalen; 191 struct wil_ctx *ctx; 192 193 if (tx) { 194 struct vring_tx_desc dd, *d = ⅆ 195 volatile struct vring_tx_desc *_d = 196 &vring->va[vring->swtail].tx; 197 198 ctx = &vring->ctx[vring->swtail]; 199 if (!ctx) { 200 wil_dbg_txrx(wil, 201 "ctx(%d) was already completed\n", 202 vring->swtail); 203 vring->swtail = wil_vring_next_tail(vring); 204 continue; 205 } 206 *d = *_d; 207 wil_txdesc_unmap(dev, d, ctx); 208 if (ctx->skb) 209 dev_kfree_skb_any(ctx->skb); 210 vring->swtail = wil_vring_next_tail(vring); 211 } else { /* rx */ 212 struct vring_rx_desc dd, *d = ⅆ 213 volatile struct vring_rx_desc *_d = 214 &vring->va[vring->swhead].rx; 215 216 ctx = &vring->ctx[vring->swhead]; 217 *d = *_d; 218 pa = wil_desc_addr(&d->dma.addr); 219 dmalen = le16_to_cpu(d->dma.length); 220 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE); 221 kfree_skb(ctx->skb); 222 wil_vring_advance_head(vring, 1); 223 } 224 } 225 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa); 226 kfree(vring->ctx); 227 vring->pa = 0; 228 vring->va = NULL; 229 vring->ctx = NULL; 230 } 231 232 /** 233 * Allocate one skb for Rx VRING 234 * 235 * Safe to call from IRQ 236 */ 237 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring, 238 u32 i, int headroom) 239 { 240 struct device *dev = wil_to_dev(wil); 241 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen(); 242 struct vring_rx_desc dd, *d = ⅆ 243 volatile struct vring_rx_desc *_d = &vring->va[i].rx; 244 dma_addr_t pa; 245 struct sk_buff *skb = dev_alloc_skb(sz + headroom); 246 247 if (unlikely(!skb)) 248 return -ENOMEM; 249 250 skb_reserve(skb, headroom); 251 skb_put(skb, sz); 252 253 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE); 254 if (unlikely(dma_mapping_error(dev, pa))) { 255 kfree_skb(skb); 256 return -ENOMEM; 257 } 258 259 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT; 260 wil_desc_addr_set(&d->dma.addr, pa); 261 /* ip_length don't care */ 262 /* b11 don't care */ 263 /* error don't care */ 264 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 265 d->dma.length = cpu_to_le16(sz); 266 *_d = *d; 267 vring->ctx[i].skb = skb; 268 269 return 0; 270 } 271 272 /** 273 * Adds radiotap header 274 * 275 * Any error indicated as "Bad FCS" 276 * 277 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of: 278 * - Rx descriptor: 32 bytes 279 * - Phy info 280 */ 281 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil, 282 struct sk_buff *skb) 283 { 284 struct wireless_dev *wdev = wil->wdev; 285 struct wil6210_rtap { 286 struct ieee80211_radiotap_header rthdr; 287 /* fields should be in the order of bits in rthdr.it_present */ 288 /* flags */ 289 u8 flags; 290 /* channel */ 291 __le16 chnl_freq __aligned(2); 292 __le16 chnl_flags; 293 /* MCS */ 294 u8 mcs_present; 295 u8 mcs_flags; 296 u8 mcs_index; 297 } __packed; 298 struct wil6210_rtap_vendor { 299 struct wil6210_rtap rtap; 300 /* vendor */ 301 u8 vendor_oui[3] __aligned(2); 302 u8 vendor_ns; 303 __le16 vendor_skip; 304 u8 vendor_data[0]; 305 } __packed; 306 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 307 struct wil6210_rtap_vendor *rtap_vendor; 308 int rtap_len = sizeof(struct wil6210_rtap); 309 int phy_length = 0; /* phy info header size, bytes */ 310 static char phy_data[128]; 311 struct ieee80211_channel *ch = wdev->preset_chandef.chan; 312 313 if (rtap_include_phy_info) { 314 rtap_len = sizeof(*rtap_vendor) + sizeof(*d); 315 /* calculate additional length */ 316 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) { 317 /** 318 * PHY info starts from 8-byte boundary 319 * there are 8-byte lines, last line may be partially 320 * written (HW bug), thus FW configures for last line 321 * to be excessive. Driver skips this last line. 322 */ 323 int len = min_t(int, 8 + sizeof(phy_data), 324 wil_rxdesc_phy_length(d)); 325 326 if (len > 8) { 327 void *p = skb_tail_pointer(skb); 328 void *pa = PTR_ALIGN(p, 8); 329 330 if (skb_tailroom(skb) >= len + (pa - p)) { 331 phy_length = len - 8; 332 memcpy(phy_data, pa, phy_length); 333 } 334 } 335 } 336 rtap_len += phy_length; 337 } 338 339 if (skb_headroom(skb) < rtap_len && 340 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) { 341 wil_err(wil, "Unable to expand headroom to %d\n", rtap_len); 342 return; 343 } 344 345 rtap_vendor = (void *)skb_push(skb, rtap_len); 346 memset(rtap_vendor, 0, rtap_len); 347 348 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION; 349 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len); 350 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32( 351 (1 << IEEE80211_RADIOTAP_FLAGS) | 352 (1 << IEEE80211_RADIOTAP_CHANNEL) | 353 (1 << IEEE80211_RADIOTAP_MCS)); 354 if (d->dma.status & RX_DMA_STATUS_ERROR) 355 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS; 356 357 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320); 358 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0); 359 360 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS; 361 rtap_vendor->rtap.mcs_flags = 0; 362 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d); 363 364 if (rtap_include_phy_info) { 365 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 << 366 IEEE80211_RADIOTAP_VENDOR_NAMESPACE); 367 /* OUI for Wilocity 04:ce:14 */ 368 rtap_vendor->vendor_oui[0] = 0x04; 369 rtap_vendor->vendor_oui[1] = 0xce; 370 rtap_vendor->vendor_oui[2] = 0x14; 371 rtap_vendor->vendor_ns = 1; 372 /* Rx descriptor + PHY data */ 373 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) + 374 phy_length); 375 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d)); 376 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data, 377 phy_length); 378 } 379 } 380 381 /* similar to ieee80211_ version, but FC contain only 1-st byte */ 382 static inline int wil_is_back_req(u8 fc) 383 { 384 return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == 385 (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ); 386 } 387 388 /** 389 * reap 1 frame from @swhead 390 * 391 * Rx descriptor copied to skb->cb 392 * 393 * Safe to call from IRQ 394 */ 395 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil, 396 struct vring *vring) 397 { 398 struct device *dev = wil_to_dev(wil); 399 struct net_device *ndev = wil_to_ndev(wil); 400 volatile struct vring_rx_desc *_d; 401 struct vring_rx_desc *d; 402 struct sk_buff *skb; 403 dma_addr_t pa; 404 unsigned int snaplen = wil_rx_snaplen(); 405 unsigned int sz = mtu_max + ETH_HLEN + snaplen; 406 u16 dmalen; 407 u8 ftype; 408 int cid; 409 int i; 410 struct wil_net_stats *stats; 411 412 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb)); 413 414 again: 415 if (unlikely(wil_vring_is_empty(vring))) 416 return NULL; 417 418 i = (int)vring->swhead; 419 _d = &vring->va[i].rx; 420 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) { 421 /* it is not error, we just reached end of Rx done area */ 422 return NULL; 423 } 424 425 skb = vring->ctx[i].skb; 426 vring->ctx[i].skb = NULL; 427 wil_vring_advance_head(vring, 1); 428 if (!skb) { 429 wil_err(wil, "No Rx skb at [%d]\n", i); 430 goto again; 431 } 432 d = wil_skb_rxdesc(skb); 433 *d = *_d; 434 pa = wil_desc_addr(&d->dma.addr); 435 436 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE); 437 dmalen = le16_to_cpu(d->dma.length); 438 439 trace_wil6210_rx(i, d); 440 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen); 441 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 442 (const void *)d, sizeof(*d), false); 443 444 cid = wil_rxdesc_cid(d); 445 stats = &wil->sta[cid].stats; 446 447 if (unlikely(dmalen > sz)) { 448 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen); 449 stats->rx_large_frame++; 450 kfree_skb(skb); 451 goto again; 452 } 453 skb_trim(skb, dmalen); 454 455 prefetch(skb->data); 456 457 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 458 skb->data, skb_headlen(skb), false); 459 460 stats->last_mcs_rx = wil_rxdesc_mcs(d); 461 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs)) 462 stats->rx_per_mcs[stats->last_mcs_rx]++; 463 464 /* use radiotap header only if required */ 465 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) 466 wil_rx_add_radiotap_header(wil, skb); 467 468 /* no extra checks if in sniffer mode */ 469 if (ndev->type != ARPHRD_ETHER) 470 return skb; 471 /* Non-data frames may be delivered through Rx DMA channel (ex: BAR) 472 * Driver should recognize it by frame type, that is found 473 * in Rx descriptor. If type is not data, it is 802.11 frame as is 474 */ 475 ftype = wil_rxdesc_ftype(d) << 2; 476 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) { 477 u8 fc1 = wil_rxdesc_fc1(d); 478 int mid = wil_rxdesc_mid(d); 479 int tid = wil_rxdesc_tid(d); 480 u16 seq = wil_rxdesc_seq(d); 481 482 wil_dbg_txrx(wil, 483 "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 484 fc1, mid, cid, tid, seq); 485 stats->rx_non_data_frame++; 486 if (wil_is_back_req(fc1)) { 487 wil_dbg_txrx(wil, 488 "BAR: MID %d CID %d TID %d Seq 0x%03x\n", 489 mid, cid, tid, seq); 490 wil_rx_bar(wil, cid, tid, seq); 491 } else { 492 /* print again all info. One can enable only this 493 * without overhead for printing every Rx frame 494 */ 495 wil_dbg_txrx(wil, 496 "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n", 497 fc1, mid, cid, tid, seq); 498 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4, 499 (const void *)d, sizeof(*d), false); 500 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1, 501 skb->data, skb_headlen(skb), false); 502 } 503 kfree_skb(skb); 504 goto again; 505 } 506 507 if (unlikely(skb->len < ETH_HLEN + snaplen)) { 508 wil_err(wil, "Short frame, len = %d\n", skb->len); 509 stats->rx_short_frame++; 510 kfree_skb(skb); 511 goto again; 512 } 513 514 /* L4 IDENT is on when HW calculated checksum, check status 515 * and in case of error drop the packet 516 * higher stack layers will handle retransmission (if required) 517 */ 518 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) { 519 /* L4 protocol identified, csum calculated */ 520 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0)) 521 skb->ip_summed = CHECKSUM_UNNECESSARY; 522 /* If HW reports bad checksum, let IP stack re-check it 523 * For example, HW don't understand Microsoft IP stack that 524 * mis-calculates TCP checksum - if it should be 0x0, 525 * it writes 0xffff in violation of RFC 1624 526 */ 527 } 528 529 if (snaplen) { 530 /* Packet layout 531 * +-------+-------+---------+------------+------+ 532 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA | 533 * +-------+-------+---------+------------+------+ 534 * Need to remove SNAP, shifting SA and DA forward 535 */ 536 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN); 537 skb_pull(skb, snaplen); 538 } 539 540 return skb; 541 } 542 543 /** 544 * allocate and fill up to @count buffers in rx ring 545 * buffers posted at @swtail 546 */ 547 static int wil_rx_refill(struct wil6210_priv *wil, int count) 548 { 549 struct net_device *ndev = wil_to_ndev(wil); 550 struct vring *v = &wil->vring_rx; 551 u32 next_tail; 552 int rc = 0; 553 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ? 554 WIL6210_RTAP_SIZE : 0; 555 556 for (; next_tail = wil_vring_next_tail(v), 557 (next_tail != v->swhead) && (count-- > 0); 558 v->swtail = next_tail) { 559 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom); 560 if (unlikely(rc)) { 561 wil_err(wil, "Error %d in wil_rx_refill[%d]\n", 562 rc, v->swtail); 563 break; 564 } 565 } 566 567 /* make sure all writes to descriptors (shared memory) are done before 568 * committing them to HW 569 */ 570 wmb(); 571 572 wil_w(wil, v->hwtail, v->swtail); 573 574 return rc; 575 } 576 577 /** 578 * reverse_memcmp - Compare two areas of memory, in reverse order 579 * @cs: One area of memory 580 * @ct: Another area of memory 581 * @count: The size of the area. 582 * 583 * Cut'n'paste from original memcmp (see lib/string.c) 584 * with minimal modifications 585 */ 586 static int reverse_memcmp(const void *cs, const void *ct, size_t count) 587 { 588 const unsigned char *su1, *su2; 589 int res = 0; 590 591 for (su1 = cs + count - 1, su2 = ct + count - 1; count > 0; 592 --su1, --su2, count--) { 593 res = *su1 - *su2; 594 if (res) 595 break; 596 } 597 return res; 598 } 599 600 static int wil_rx_crypto_check(struct wil6210_priv *wil, struct sk_buff *skb) 601 { 602 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 603 int cid = wil_rxdesc_cid(d); 604 int tid = wil_rxdesc_tid(d); 605 int key_id = wil_rxdesc_key_id(d); 606 int mc = wil_rxdesc_mcast(d); 607 struct wil_sta_info *s = &wil->sta[cid]; 608 struct wil_tid_crypto_rx *c = mc ? &s->group_crypto_rx : 609 &s->tid_crypto_rx[tid]; 610 struct wil_tid_crypto_rx_single *cc = &c->key_id[key_id]; 611 const u8 *pn = (u8 *)&d->mac.pn_15_0; 612 613 if (!cc->key_set) { 614 wil_err_ratelimited(wil, 615 "Key missing. CID %d TID %d MCast %d KEY_ID %d\n", 616 cid, tid, mc, key_id); 617 return -EINVAL; 618 } 619 620 if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) { 621 wil_err_ratelimited(wil, 622 "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n", 623 cid, tid, mc, key_id, pn, cc->pn); 624 return -EINVAL; 625 } 626 memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN); 627 628 return 0; 629 } 630 631 /* 632 * Pass Rx packet to the netif. Update statistics. 633 * Called in softirq context (NAPI poll). 634 */ 635 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev) 636 { 637 gro_result_t rc = GRO_NORMAL; 638 struct wil6210_priv *wil = ndev_to_wil(ndev); 639 struct wireless_dev *wdev = wil_to_wdev(wil); 640 unsigned int len = skb->len; 641 struct vring_rx_desc *d = wil_skb_rxdesc(skb); 642 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */ 643 int security = wil_rxdesc_security(d); 644 struct ethhdr *eth = (void *)skb->data; 645 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication 646 * is not suitable, need to look at data 647 */ 648 int mcast = is_multicast_ether_addr(eth->h_dest); 649 struct wil_net_stats *stats = &wil->sta[cid].stats; 650 struct sk_buff *xmit_skb = NULL; 651 static const char * const gro_res_str[] = { 652 [GRO_MERGED] = "GRO_MERGED", 653 [GRO_MERGED_FREE] = "GRO_MERGED_FREE", 654 [GRO_HELD] = "GRO_HELD", 655 [GRO_NORMAL] = "GRO_NORMAL", 656 [GRO_DROP] = "GRO_DROP", 657 }; 658 659 if (ndev->features & NETIF_F_RXHASH) 660 /* fake L4 to ensure it won't be re-calculated later 661 * set hash to any non-zero value to activate rps 662 * mechanism, core will be chosen according 663 * to user-level rps configuration. 664 */ 665 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4); 666 667 skb_orphan(skb); 668 669 if (security && (wil_rx_crypto_check(wil, skb) != 0)) { 670 rc = GRO_DROP; 671 dev_kfree_skb(skb); 672 stats->rx_replay++; 673 goto stats; 674 } 675 676 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) { 677 if (mcast) { 678 /* send multicast frames both to higher layers in 679 * local net stack and back to the wireless medium 680 */ 681 xmit_skb = skb_copy(skb, GFP_ATOMIC); 682 } else { 683 int xmit_cid = wil_find_cid(wil, eth->h_dest); 684 685 if (xmit_cid >= 0) { 686 /* The destination station is associated to 687 * this AP (in this VLAN), so send the frame 688 * directly to it and do not pass it to local 689 * net stack. 690 */ 691 xmit_skb = skb; 692 skb = NULL; 693 } 694 } 695 } 696 if (xmit_skb) { 697 /* Send to wireless media and increase priority by 256 to 698 * keep the received priority instead of reclassifying 699 * the frame (see cfg80211_classify8021d). 700 */ 701 xmit_skb->dev = ndev; 702 xmit_skb->priority += 256; 703 xmit_skb->protocol = htons(ETH_P_802_3); 704 skb_reset_network_header(xmit_skb); 705 skb_reset_mac_header(xmit_skb); 706 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len); 707 dev_queue_xmit(xmit_skb); 708 } 709 710 if (skb) { /* deliver to local stack */ 711 712 skb->protocol = eth_type_trans(skb, ndev); 713 rc = napi_gro_receive(&wil->napi_rx, skb); 714 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n", 715 len, gro_res_str[rc]); 716 } 717 stats: 718 /* statistics. rc set to GRO_NORMAL for AP bridging */ 719 if (unlikely(rc == GRO_DROP)) { 720 ndev->stats.rx_dropped++; 721 stats->rx_dropped++; 722 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len); 723 } else { 724 ndev->stats.rx_packets++; 725 stats->rx_packets++; 726 ndev->stats.rx_bytes += len; 727 stats->rx_bytes += len; 728 if (mcast) 729 ndev->stats.multicast++; 730 } 731 } 732 733 /** 734 * Proceed all completed skb's from Rx VRING 735 * 736 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled 737 */ 738 void wil_rx_handle(struct wil6210_priv *wil, int *quota) 739 { 740 struct net_device *ndev = wil_to_ndev(wil); 741 struct vring *v = &wil->vring_rx; 742 struct sk_buff *skb; 743 744 if (unlikely(!v->va)) { 745 wil_err(wil, "Rx IRQ while Rx not yet initialized\n"); 746 return; 747 } 748 wil_dbg_txrx(wil, "rx_handle\n"); 749 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) { 750 (*quota)--; 751 752 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) { 753 skb->dev = ndev; 754 skb_reset_mac_header(skb); 755 skb->ip_summed = CHECKSUM_UNNECESSARY; 756 skb->pkt_type = PACKET_OTHERHOST; 757 skb->protocol = htons(ETH_P_802_2); 758 wil_netif_rx_any(skb, ndev); 759 } else { 760 wil_rx_reorder(wil, skb); 761 } 762 } 763 wil_rx_refill(wil, v->size); 764 } 765 766 int wil_rx_init(struct wil6210_priv *wil, u16 size) 767 { 768 struct vring *vring = &wil->vring_rx; 769 int rc; 770 771 wil_dbg_misc(wil, "rx_init\n"); 772 773 if (vring->va) { 774 wil_err(wil, "Rx ring already allocated\n"); 775 return -EINVAL; 776 } 777 778 vring->size = size; 779 rc = wil_vring_alloc(wil, vring); 780 if (rc) 781 return rc; 782 783 rc = wmi_rx_chain_add(wil, vring); 784 if (rc) 785 goto err_free; 786 787 rc = wil_rx_refill(wil, vring->size); 788 if (rc) 789 goto err_free; 790 791 return 0; 792 err_free: 793 wil_vring_free(wil, vring, 0); 794 795 return rc; 796 } 797 798 void wil_rx_fini(struct wil6210_priv *wil) 799 { 800 struct vring *vring = &wil->vring_rx; 801 802 wil_dbg_misc(wil, "rx_fini\n"); 803 804 if (vring->va) 805 wil_vring_free(wil, vring, 0); 806 } 807 808 static inline void wil_tx_data_init(struct vring_tx_data *txdata) 809 { 810 spin_lock_bh(&txdata->lock); 811 txdata->dot1x_open = 0; 812 txdata->enabled = 0; 813 txdata->idle = 0; 814 txdata->last_idle = 0; 815 txdata->begin = 0; 816 txdata->agg_wsize = 0; 817 txdata->agg_timeout = 0; 818 txdata->agg_amsdu = 0; 819 txdata->addba_in_progress = false; 820 spin_unlock_bh(&txdata->lock); 821 } 822 823 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 824 int cid, int tid) 825 { 826 int rc; 827 struct wmi_vring_cfg_cmd cmd = { 828 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 829 .vring_cfg = { 830 .tx_sw_ring = { 831 .max_mpdu_size = 832 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 833 .ring_size = cpu_to_le16(size), 834 }, 835 .ringid = id, 836 .cidxtid = mk_cidxtid(cid, tid), 837 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 838 .mac_ctrl = 0, 839 .to_resolution = 0, 840 .agg_max_wsize = 0, 841 .schd_params = { 842 .priority = cpu_to_le16(0), 843 .timeslot_us = cpu_to_le16(0xfff), 844 }, 845 }, 846 }; 847 struct { 848 struct wmi_cmd_hdr wmi; 849 struct wmi_vring_cfg_done_event cmd; 850 } __packed reply; 851 struct vring *vring = &wil->vring_tx[id]; 852 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 853 854 wil_dbg_misc(wil, "vring_init_tx: max_mpdu_size %d\n", 855 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 856 lockdep_assert_held(&wil->mutex); 857 858 if (vring->va) { 859 wil_err(wil, "Tx ring [%d] already allocated\n", id); 860 rc = -EINVAL; 861 goto out; 862 } 863 864 wil_tx_data_init(txdata); 865 vring->size = size; 866 rc = wil_vring_alloc(wil, vring); 867 if (rc) 868 goto out; 869 870 wil->vring2cid_tid[id][0] = cid; 871 wil->vring2cid_tid[id][1] = tid; 872 873 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 874 875 if (!wil->privacy) 876 txdata->dot1x_open = true; 877 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd), 878 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 879 if (rc) 880 goto out_free; 881 882 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 883 wil_err(wil, "Tx config failed, status 0x%02x\n", 884 reply.cmd.status); 885 rc = -EINVAL; 886 goto out_free; 887 } 888 889 spin_lock_bh(&txdata->lock); 890 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 891 txdata->enabled = 1; 892 spin_unlock_bh(&txdata->lock); 893 894 if (txdata->dot1x_open && (agg_wsize >= 0)) 895 wil_addba_tx_request(wil, id, agg_wsize); 896 897 return 0; 898 out_free: 899 spin_lock_bh(&txdata->lock); 900 txdata->dot1x_open = false; 901 txdata->enabled = 0; 902 spin_unlock_bh(&txdata->lock); 903 wil_vring_free(wil, vring, 1); 904 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; 905 wil->vring2cid_tid[id][1] = 0; 906 907 out: 908 909 return rc; 910 } 911 912 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size) 913 { 914 int rc; 915 struct wmi_bcast_vring_cfg_cmd cmd = { 916 .action = cpu_to_le32(WMI_VRING_CMD_ADD), 917 .vring_cfg = { 918 .tx_sw_ring = { 919 .max_mpdu_size = 920 cpu_to_le16(wil_mtu2macbuf(mtu_max)), 921 .ring_size = cpu_to_le16(size), 922 }, 923 .ringid = id, 924 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3, 925 }, 926 }; 927 struct { 928 struct wmi_cmd_hdr wmi; 929 struct wmi_vring_cfg_done_event cmd; 930 } __packed reply; 931 struct vring *vring = &wil->vring_tx[id]; 932 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 933 934 wil_dbg_misc(wil, "vring_init_bcast: max_mpdu_size %d\n", 935 cmd.vring_cfg.tx_sw_ring.max_mpdu_size); 936 lockdep_assert_held(&wil->mutex); 937 938 if (vring->va) { 939 wil_err(wil, "Tx ring [%d] already allocated\n", id); 940 rc = -EINVAL; 941 goto out; 942 } 943 944 wil_tx_data_init(txdata); 945 vring->size = size; 946 rc = wil_vring_alloc(wil, vring); 947 if (rc) 948 goto out; 949 950 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */ 951 wil->vring2cid_tid[id][1] = 0; /* TID */ 952 953 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa); 954 955 if (!wil->privacy) 956 txdata->dot1x_open = true; 957 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd), 958 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100); 959 if (rc) 960 goto out_free; 961 962 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) { 963 wil_err(wil, "Tx config failed, status 0x%02x\n", 964 reply.cmd.status); 965 rc = -EINVAL; 966 goto out_free; 967 } 968 969 spin_lock_bh(&txdata->lock); 970 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr); 971 txdata->enabled = 1; 972 spin_unlock_bh(&txdata->lock); 973 974 return 0; 975 out_free: 976 spin_lock_bh(&txdata->lock); 977 txdata->enabled = 0; 978 txdata->dot1x_open = false; 979 spin_unlock_bh(&txdata->lock); 980 wil_vring_free(wil, vring, 1); 981 out: 982 983 return rc; 984 } 985 986 void wil_vring_fini_tx(struct wil6210_priv *wil, int id) 987 { 988 struct vring *vring = &wil->vring_tx[id]; 989 struct vring_tx_data *txdata = &wil->vring_tx_data[id]; 990 991 lockdep_assert_held(&wil->mutex); 992 993 if (!vring->va) 994 return; 995 996 wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id); 997 998 spin_lock_bh(&txdata->lock); 999 txdata->dot1x_open = false; 1000 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 1001 spin_unlock_bh(&txdata->lock); 1002 /* napi_synchronize waits for completion of the current NAPI but will 1003 * not prevent the next NAPI run. 1004 * Add a memory barrier to guarantee that txdata->enabled is zeroed 1005 * before napi_synchronize so that the next scheduled NAPI will not 1006 * handle this vring 1007 */ 1008 wmb(); 1009 /* make sure NAPI won't touch this vring */ 1010 if (test_bit(wil_status_napi_en, wil->status)) 1011 napi_synchronize(&wil->napi_tx); 1012 1013 wil_vring_free(wil, vring, 1); 1014 } 1015 1016 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil, 1017 struct sk_buff *skb) 1018 { 1019 int i; 1020 struct ethhdr *eth = (void *)skb->data; 1021 int cid = wil_find_cid(wil, eth->h_dest); 1022 1023 if (cid < 0) 1024 return NULL; 1025 1026 /* TODO: fix for multiple TID */ 1027 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) { 1028 if (!wil->vring_tx_data[i].dot1x_open && 1029 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1030 continue; 1031 if (wil->vring2cid_tid[i][0] == cid) { 1032 struct vring *v = &wil->vring_tx[i]; 1033 struct vring_tx_data *txdata = &wil->vring_tx_data[i]; 1034 1035 wil_dbg_txrx(wil, "find_tx_ucast: (%pM) -> [%d]\n", 1036 eth->h_dest, i); 1037 if (v->va && txdata->enabled) { 1038 return v; 1039 } else { 1040 wil_dbg_txrx(wil, 1041 "find_tx_ucast: vring[%d] not valid\n", 1042 i); 1043 return NULL; 1044 } 1045 } 1046 } 1047 1048 return NULL; 1049 } 1050 1051 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1052 struct sk_buff *skb); 1053 1054 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil, 1055 struct sk_buff *skb) 1056 { 1057 struct vring *v; 1058 int i; 1059 u8 cid; 1060 struct vring_tx_data *txdata; 1061 1062 /* In the STA mode, it is expected to have only 1 VRING 1063 * for the AP we connected to. 1064 * find 1-st vring eligible for this skb and use it. 1065 */ 1066 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1067 v = &wil->vring_tx[i]; 1068 txdata = &wil->vring_tx_data[i]; 1069 if (!v->va || !txdata->enabled) 1070 continue; 1071 1072 cid = wil->vring2cid_tid[i][0]; 1073 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1074 continue; 1075 1076 if (!wil->vring_tx_data[i].dot1x_open && 1077 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1078 continue; 1079 1080 wil_dbg_txrx(wil, "Tx -> ring %d\n", i); 1081 1082 return v; 1083 } 1084 1085 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1086 1087 return NULL; 1088 } 1089 1090 /* Use one of 2 strategies: 1091 * 1092 * 1. New (real broadcast): 1093 * use dedicated broadcast vring 1094 * 2. Old (pseudo-DMS): 1095 * Find 1-st vring and return it; 1096 * duplicate skb and send it to other active vrings; 1097 * in all cases override dest address to unicast peer's address 1098 * Use old strategy when new is not supported yet: 1099 * - for PBSS 1100 */ 1101 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil, 1102 struct sk_buff *skb) 1103 { 1104 struct vring *v; 1105 struct vring_tx_data *txdata; 1106 int i = wil->bcast_vring; 1107 1108 if (i < 0) 1109 return NULL; 1110 v = &wil->vring_tx[i]; 1111 txdata = &wil->vring_tx_data[i]; 1112 if (!v->va || !txdata->enabled) 1113 return NULL; 1114 if (!wil->vring_tx_data[i].dot1x_open && 1115 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1116 return NULL; 1117 1118 return v; 1119 } 1120 1121 static void wil_set_da_for_vring(struct wil6210_priv *wil, 1122 struct sk_buff *skb, int vring_index) 1123 { 1124 struct ethhdr *eth = (void *)skb->data; 1125 int cid = wil->vring2cid_tid[vring_index][0]; 1126 1127 ether_addr_copy(eth->h_dest, wil->sta[cid].addr); 1128 } 1129 1130 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil, 1131 struct sk_buff *skb) 1132 { 1133 struct vring *v, *v2; 1134 struct sk_buff *skb2; 1135 int i; 1136 u8 cid; 1137 struct ethhdr *eth = (void *)skb->data; 1138 char *src = eth->h_source; 1139 struct vring_tx_data *txdata; 1140 1141 /* find 1-st vring eligible for data */ 1142 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1143 v = &wil->vring_tx[i]; 1144 txdata = &wil->vring_tx_data[i]; 1145 if (!v->va || !txdata->enabled) 1146 continue; 1147 1148 cid = wil->vring2cid_tid[i][0]; 1149 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1150 continue; 1151 if (!wil->vring_tx_data[i].dot1x_open && 1152 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1153 continue; 1154 1155 /* don't Tx back to source when re-routing Rx->Tx at the AP */ 1156 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1157 continue; 1158 1159 goto found; 1160 } 1161 1162 wil_dbg_txrx(wil, "Tx while no vrings active?\n"); 1163 1164 return NULL; 1165 1166 found: 1167 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i); 1168 wil_set_da_for_vring(wil, skb, i); 1169 1170 /* find other active vrings and duplicate skb for each */ 1171 for (i++; i < WIL6210_MAX_TX_RINGS; i++) { 1172 v2 = &wil->vring_tx[i]; 1173 if (!v2->va) 1174 continue; 1175 cid = wil->vring2cid_tid[i][0]; 1176 if (cid >= WIL6210_MAX_CID) /* skip BCAST */ 1177 continue; 1178 if (!wil->vring_tx_data[i].dot1x_open && 1179 (skb->protocol != cpu_to_be16(ETH_P_PAE))) 1180 continue; 1181 1182 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN)) 1183 continue; 1184 1185 skb2 = skb_copy(skb, GFP_ATOMIC); 1186 if (skb2) { 1187 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i); 1188 wil_set_da_for_vring(wil, skb2, i); 1189 wil_tx_vring(wil, v2, skb2); 1190 } else { 1191 wil_err(wil, "skb_copy failed\n"); 1192 } 1193 } 1194 1195 return v; 1196 } 1197 1198 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len, 1199 int vring_index) 1200 { 1201 wil_desc_addr_set(&d->dma.addr, pa); 1202 d->dma.ip_length = 0; 1203 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/ 1204 d->dma.b11 = 0/*14 | BIT(7)*/; 1205 d->dma.error = 0; 1206 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */ 1207 d->dma.length = cpu_to_le16((u16)len); 1208 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS); 1209 d->mac.d[0] = 0; 1210 d->mac.d[1] = 0; 1211 d->mac.d[2] = 0; 1212 d->mac.ucode_cmd = 0; 1213 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */ 1214 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) | 1215 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS); 1216 1217 return 0; 1218 } 1219 1220 static inline 1221 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags) 1222 { 1223 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS); 1224 } 1225 1226 /** 1227 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding 1228 * @skb is used to obtain the protocol and headers length. 1229 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data, 1230 * 2 - middle, 3 - last descriptor. 1231 */ 1232 1233 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d, 1234 struct sk_buff *skb, 1235 int tso_desc_type, bool is_ipv4, 1236 int tcp_hdr_len, int skb_net_hdr_len) 1237 { 1238 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1239 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; 1240 1241 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1242 /* L4 header len: TCP header length */ 1243 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1244 1245 /* Setup TSO: bit and desc type */ 1246 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) | 1247 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS); 1248 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS); 1249 1250 d->dma.ip_length = skb_net_hdr_len; 1251 /* Enable TCP/UDP checksum */ 1252 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1253 /* Calculate pseudo-header */ 1254 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1255 } 1256 1257 /** 1258 * Sets the descriptor @d up for csum. The corresponding 1259 * @skb is used to obtain the protocol and headers length. 1260 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6. 1261 * Note, if d==NULL, the function only returns the protocol result. 1262 * 1263 * It is very similar to previous wil_tx_desc_offload_setup_tso. This 1264 * is "if unrolling" to optimize the critical path. 1265 */ 1266 1267 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d, 1268 struct sk_buff *skb){ 1269 int protocol; 1270 1271 if (skb->ip_summed != CHECKSUM_PARTIAL) 1272 return 0; 1273 1274 d->dma.b11 = ETH_HLEN; /* MAC header length */ 1275 1276 switch (skb->protocol) { 1277 case cpu_to_be16(ETH_P_IP): 1278 protocol = ip_hdr(skb)->protocol; 1279 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); 1280 break; 1281 case cpu_to_be16(ETH_P_IPV6): 1282 protocol = ipv6_hdr(skb)->nexthdr; 1283 break; 1284 default: 1285 return -EINVAL; 1286 } 1287 1288 switch (protocol) { 1289 case IPPROTO_TCP: 1290 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS); 1291 /* L4 header len: TCP header length */ 1292 d->dma.d0 |= 1293 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1294 break; 1295 case IPPROTO_UDP: 1296 /* L4 header len: UDP header length */ 1297 d->dma.d0 |= 1298 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK); 1299 break; 1300 default: 1301 return -EINVAL; 1302 } 1303 1304 d->dma.ip_length = skb_network_header_len(skb); 1305 /* Enable TCP/UDP checksum */ 1306 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS); 1307 /* Calculate pseudo-header */ 1308 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS); 1309 1310 return 0; 1311 } 1312 1313 static inline void wil_tx_last_desc(struct vring_tx_desc *d) 1314 { 1315 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) | 1316 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) | 1317 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1318 } 1319 1320 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d) 1321 { 1322 d->dma.d0 |= wil_tso_type_lst << 1323 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS; 1324 } 1325 1326 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring, 1327 struct sk_buff *skb) 1328 { 1329 struct device *dev = wil_to_dev(wil); 1330 1331 /* point to descriptors in shared memory */ 1332 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc, 1333 *_first_desc = NULL; 1334 1335 /* pointers to shadow descriptors */ 1336 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem, 1337 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem, 1338 *first_desc = &first_desc_mem; 1339 1340 /* pointer to shadow descriptors' context */ 1341 struct wil_ctx *hdr_ctx, *first_ctx = NULL; 1342 1343 int descs_used = 0; /* total number of used descriptors */ 1344 int sg_desc_cnt = 0; /* number of descriptors for current mss*/ 1345 1346 u32 swhead = vring->swhead; 1347 int used, avail = wil_vring_avail_tx(vring); 1348 int nr_frags = skb_shinfo(skb)->nr_frags; 1349 int min_desc_required = nr_frags + 1; 1350 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */ 1351 int f, len, hdrlen, headlen; 1352 int vring_index = vring - wil->vring_tx; 1353 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1354 uint i = swhead; 1355 dma_addr_t pa; 1356 const skb_frag_t *frag = NULL; 1357 int rem_data = mss; 1358 int lenmss; 1359 int hdr_compensation_need = true; 1360 int desc_tso_type = wil_tso_type_first; 1361 bool is_ipv4; 1362 int tcp_hdr_len; 1363 int skb_net_hdr_len; 1364 int gso_type; 1365 int rc = -EINVAL; 1366 1367 wil_dbg_txrx(wil, "tx_vring_tso: %d bytes to vring %d\n", skb->len, 1368 vring_index); 1369 1370 if (unlikely(!txdata->enabled)) 1371 return -EINVAL; 1372 1373 /* A typical page 4K is 3-4 payloads, we assume each fragment 1374 * is a full payload, that's how min_desc_required has been 1375 * calculated. In real we might need more or less descriptors, 1376 * this is the initial check only. 1377 */ 1378 if (unlikely(avail < min_desc_required)) { 1379 wil_err_ratelimited(wil, 1380 "TSO: Tx ring[%2d] full. No space for %d fragments\n", 1381 vring_index, min_desc_required); 1382 return -ENOMEM; 1383 } 1384 1385 /* Header Length = MAC header len + IP header len + TCP header len*/ 1386 hdrlen = ETH_HLEN + 1387 (int)skb_network_header_len(skb) + 1388 tcp_hdrlen(skb); 1389 1390 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4); 1391 switch (gso_type) { 1392 case SKB_GSO_TCPV4: 1393 /* TCP v4, zero out the IP length and IPv4 checksum fields 1394 * as required by the offloading doc 1395 */ 1396 ip_hdr(skb)->tot_len = 0; 1397 ip_hdr(skb)->check = 0; 1398 is_ipv4 = true; 1399 break; 1400 case SKB_GSO_TCPV6: 1401 /* TCP v6, zero out the payload length */ 1402 ipv6_hdr(skb)->payload_len = 0; 1403 is_ipv4 = false; 1404 break; 1405 default: 1406 /* other than TCPv4 or TCPv6 types are not supported for TSO. 1407 * It is also illegal for both to be set simultaneously 1408 */ 1409 return -EINVAL; 1410 } 1411 1412 if (skb->ip_summed != CHECKSUM_PARTIAL) 1413 return -EINVAL; 1414 1415 /* tcp header length and skb network header length are fixed for all 1416 * packet's descriptors - read then once here 1417 */ 1418 tcp_hdr_len = tcp_hdrlen(skb); 1419 skb_net_hdr_len = skb_network_header_len(skb); 1420 1421 _hdr_desc = &vring->va[i].tx; 1422 1423 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE); 1424 if (unlikely(dma_mapping_error(dev, pa))) { 1425 wil_err(wil, "TSO: Skb head DMA map error\n"); 1426 goto err_exit; 1427 } 1428 1429 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index); 1430 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4, 1431 tcp_hdr_len, skb_net_hdr_len); 1432 wil_tx_last_desc(hdr_desc); 1433 1434 vring->ctx[i].mapped_as = wil_mapped_as_single; 1435 hdr_ctx = &vring->ctx[i]; 1436 1437 descs_used++; 1438 headlen = skb_headlen(skb) - hdrlen; 1439 1440 for (f = headlen ? -1 : 0; f < nr_frags; f++) { 1441 if (headlen) { 1442 len = headlen; 1443 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n", 1444 len); 1445 } else { 1446 frag = &skb_shinfo(skb)->frags[f]; 1447 len = frag->size; 1448 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len); 1449 } 1450 1451 while (len) { 1452 wil_dbg_txrx(wil, 1453 "TSO: len %d, rem_data %d, descs_used %d\n", 1454 len, rem_data, descs_used); 1455 1456 if (descs_used == avail) { 1457 wil_err_ratelimited(wil, "TSO: ring overflow\n"); 1458 rc = -ENOMEM; 1459 goto mem_error; 1460 } 1461 1462 lenmss = min_t(int, rem_data, len); 1463 i = (swhead + descs_used) % vring->size; 1464 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i); 1465 1466 if (!headlen) { 1467 pa = skb_frag_dma_map(dev, frag, 1468 frag->size - len, lenmss, 1469 DMA_TO_DEVICE); 1470 vring->ctx[i].mapped_as = wil_mapped_as_page; 1471 } else { 1472 pa = dma_map_single(dev, 1473 skb->data + 1474 skb_headlen(skb) - headlen, 1475 lenmss, 1476 DMA_TO_DEVICE); 1477 vring->ctx[i].mapped_as = wil_mapped_as_single; 1478 headlen -= lenmss; 1479 } 1480 1481 if (unlikely(dma_mapping_error(dev, pa))) { 1482 wil_err(wil, "TSO: DMA map page error\n"); 1483 goto mem_error; 1484 } 1485 1486 _desc = &vring->va[i].tx; 1487 1488 if (!_first_desc) { 1489 _first_desc = _desc; 1490 first_ctx = &vring->ctx[i]; 1491 d = first_desc; 1492 } else { 1493 d = &desc_mem; 1494 } 1495 1496 wil_tx_desc_map(d, pa, lenmss, vring_index); 1497 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type, 1498 is_ipv4, tcp_hdr_len, 1499 skb_net_hdr_len); 1500 1501 /* use tso_type_first only once */ 1502 desc_tso_type = wil_tso_type_mid; 1503 1504 descs_used++; /* desc used so far */ 1505 sg_desc_cnt++; /* desc used for this segment */ 1506 len -= lenmss; 1507 rem_data -= lenmss; 1508 1509 wil_dbg_txrx(wil, 1510 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n", 1511 len, rem_data, descs_used, sg_desc_cnt); 1512 1513 /* Close the segment if reached mss size or last frag*/ 1514 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) { 1515 if (hdr_compensation_need) { 1516 /* first segment include hdr desc for 1517 * release 1518 */ 1519 hdr_ctx->nr_frags = sg_desc_cnt; 1520 wil_tx_desc_set_nr_frags(first_desc, 1521 sg_desc_cnt + 1522 1); 1523 hdr_compensation_need = false; 1524 } else { 1525 wil_tx_desc_set_nr_frags(first_desc, 1526 sg_desc_cnt); 1527 } 1528 first_ctx->nr_frags = sg_desc_cnt - 1; 1529 1530 wil_tx_last_desc(d); 1531 1532 /* first descriptor may also be the last 1533 * for this mss - make sure not to copy 1534 * it twice 1535 */ 1536 if (first_desc != d) 1537 *_first_desc = *first_desc; 1538 1539 /*last descriptor will be copied at the end 1540 * of this TS processing 1541 */ 1542 if (f < nr_frags - 1 || len > 0) 1543 *_desc = *d; 1544 1545 rem_data = mss; 1546 _first_desc = NULL; 1547 sg_desc_cnt = 0; 1548 } else if (first_desc != d) /* update mid descriptor */ 1549 *_desc = *d; 1550 } 1551 } 1552 1553 /* first descriptor may also be the last. 1554 * in this case d pointer is invalid 1555 */ 1556 if (_first_desc == _desc) 1557 d = first_desc; 1558 1559 /* Last data descriptor */ 1560 wil_set_tx_desc_last_tso(d); 1561 *_desc = *d; 1562 1563 /* Fill the total number of descriptors in first desc (hdr)*/ 1564 wil_tx_desc_set_nr_frags(hdr_desc, descs_used); 1565 *_hdr_desc = *hdr_desc; 1566 1567 /* hold reference to skb 1568 * to prevent skb release before accounting 1569 * in case of immediate "tx done" 1570 */ 1571 vring->ctx[i].skb = skb_get(skb); 1572 1573 /* performance monitoring */ 1574 used = wil_vring_used_tx(vring); 1575 if (wil_val_in_range(vring_idle_trsh, 1576 used, used + descs_used)) { 1577 txdata->idle += get_cycles() - txdata->last_idle; 1578 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1579 vring_index, used, used + descs_used); 1580 } 1581 1582 /* Make sure to advance the head only after descriptor update is done. 1583 * This will prevent a race condition where the completion thread 1584 * will see the DU bit set from previous run and will handle the 1585 * skb before it was completed. 1586 */ 1587 wmb(); 1588 1589 /* advance swhead */ 1590 wil_vring_advance_head(vring, descs_used); 1591 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead); 1592 1593 /* make sure all writes to descriptors (shared memory) are done before 1594 * committing them to HW 1595 */ 1596 wmb(); 1597 1598 wil_w(wil, vring->hwtail, vring->swhead); 1599 return 0; 1600 1601 mem_error: 1602 while (descs_used > 0) { 1603 struct wil_ctx *ctx; 1604 1605 i = (swhead + descs_used - 1) % vring->size; 1606 d = (struct vring_tx_desc *)&vring->va[i].tx; 1607 _desc = &vring->va[i].tx; 1608 *d = *_desc; 1609 _desc->dma.status = TX_DMA_STATUS_DU; 1610 ctx = &vring->ctx[i]; 1611 wil_txdesc_unmap(dev, d, ctx); 1612 memset(ctx, 0, sizeof(*ctx)); 1613 descs_used--; 1614 } 1615 err_exit: 1616 return rc; 1617 } 1618 1619 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1620 struct sk_buff *skb) 1621 { 1622 struct device *dev = wil_to_dev(wil); 1623 struct vring_tx_desc dd, *d = ⅆ 1624 volatile struct vring_tx_desc *_d; 1625 u32 swhead = vring->swhead; 1626 int avail = wil_vring_avail_tx(vring); 1627 int nr_frags = skb_shinfo(skb)->nr_frags; 1628 uint f = 0; 1629 int vring_index = vring - wil->vring_tx; 1630 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1631 uint i = swhead; 1632 dma_addr_t pa; 1633 int used; 1634 bool mcast = (vring_index == wil->bcast_vring); 1635 uint len = skb_headlen(skb); 1636 1637 wil_dbg_txrx(wil, "tx_vring: %d bytes to vring %d\n", skb->len, 1638 vring_index); 1639 1640 if (unlikely(!txdata->enabled)) 1641 return -EINVAL; 1642 1643 if (unlikely(avail < 1 + nr_frags)) { 1644 wil_err_ratelimited(wil, 1645 "Tx ring[%2d] full. No space for %d fragments\n", 1646 vring_index, 1 + nr_frags); 1647 return -ENOMEM; 1648 } 1649 _d = &vring->va[i].tx; 1650 1651 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1652 1653 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index, 1654 skb_headlen(skb), skb->data, &pa); 1655 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1, 1656 skb->data, skb_headlen(skb), false); 1657 1658 if (unlikely(dma_mapping_error(dev, pa))) 1659 return -EINVAL; 1660 vring->ctx[i].mapped_as = wil_mapped_as_single; 1661 /* 1-st segment */ 1662 wil_tx_desc_map(d, pa, len, vring_index); 1663 if (unlikely(mcast)) { 1664 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */ 1665 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */ 1666 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS); 1667 } 1668 /* Process TCP/UDP checksum offloading */ 1669 if (unlikely(wil_tx_desc_offload_setup(d, skb))) { 1670 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n", 1671 vring_index); 1672 goto dma_error; 1673 } 1674 1675 vring->ctx[i].nr_frags = nr_frags; 1676 wil_tx_desc_set_nr_frags(d, nr_frags + 1); 1677 1678 /* middle segments */ 1679 for (; f < nr_frags; f++) { 1680 const struct skb_frag_struct *frag = 1681 &skb_shinfo(skb)->frags[f]; 1682 int len = skb_frag_size(frag); 1683 1684 *_d = *d; 1685 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1686 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1687 (const void *)d, sizeof(*d), false); 1688 i = (swhead + f + 1) % vring->size; 1689 _d = &vring->va[i].tx; 1690 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag), 1691 DMA_TO_DEVICE); 1692 if (unlikely(dma_mapping_error(dev, pa))) { 1693 wil_err(wil, "Tx[%2d] failed to map fragment\n", 1694 vring_index); 1695 goto dma_error; 1696 } 1697 vring->ctx[i].mapped_as = wil_mapped_as_page; 1698 wil_tx_desc_map(d, pa, len, vring_index); 1699 /* no need to check return code - 1700 * if it succeeded for 1-st descriptor, 1701 * it will succeed here too 1702 */ 1703 wil_tx_desc_offload_setup(d, skb); 1704 } 1705 /* for the last seg only */ 1706 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS); 1707 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS); 1708 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS); 1709 *_d = *d; 1710 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i); 1711 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4, 1712 (const void *)d, sizeof(*d), false); 1713 1714 /* hold reference to skb 1715 * to prevent skb release before accounting 1716 * in case of immediate "tx done" 1717 */ 1718 vring->ctx[i].skb = skb_get(skb); 1719 1720 /* performance monitoring */ 1721 used = wil_vring_used_tx(vring); 1722 if (wil_val_in_range(vring_idle_trsh, 1723 used, used + nr_frags + 1)) { 1724 txdata->idle += get_cycles() - txdata->last_idle; 1725 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n", 1726 vring_index, used, used + nr_frags + 1); 1727 } 1728 1729 /* Make sure to advance the head only after descriptor update is done. 1730 * This will prevent a race condition where the completion thread 1731 * will see the DU bit set from previous run and will handle the 1732 * skb before it was completed. 1733 */ 1734 wmb(); 1735 1736 /* advance swhead */ 1737 wil_vring_advance_head(vring, nr_frags + 1); 1738 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead, 1739 vring->swhead); 1740 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags); 1741 1742 /* make sure all writes to descriptors (shared memory) are done before 1743 * committing them to HW 1744 */ 1745 wmb(); 1746 1747 wil_w(wil, vring->hwtail, vring->swhead); 1748 1749 return 0; 1750 dma_error: 1751 /* unmap what we have mapped */ 1752 nr_frags = f + 1; /* frags mapped + one for skb head */ 1753 for (f = 0; f < nr_frags; f++) { 1754 struct wil_ctx *ctx; 1755 1756 i = (swhead + f) % vring->size; 1757 ctx = &vring->ctx[i]; 1758 _d = &vring->va[i].tx; 1759 *d = *_d; 1760 _d->dma.status = TX_DMA_STATUS_DU; 1761 wil_txdesc_unmap(dev, d, ctx); 1762 1763 memset(ctx, 0, sizeof(*ctx)); 1764 } 1765 1766 return -EINVAL; 1767 } 1768 1769 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring, 1770 struct sk_buff *skb) 1771 { 1772 int vring_index = vring - wil->vring_tx; 1773 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index]; 1774 int rc; 1775 1776 spin_lock(&txdata->lock); 1777 1778 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring) 1779 (wil, vring, skb); 1780 1781 spin_unlock(&txdata->lock); 1782 1783 return rc; 1784 } 1785 1786 /** 1787 * Check status of tx vrings and stop/wake net queues if needed 1788 * 1789 * This function does one of two checks: 1790 * In case check_stop is true, will check if net queues need to be stopped. If 1791 * the conditions for stopping are met, netif_tx_stop_all_queues() is called. 1792 * In case check_stop is false, will check if net queues need to be waked. If 1793 * the conditions for waking are met, netif_tx_wake_all_queues() is called. 1794 * vring is the vring which is currently being modified by either adding 1795 * descriptors (tx) into it or removing descriptors (tx complete) from it. Can 1796 * be null when irrelevant (e.g. connect/disconnect events). 1797 * 1798 * The implementation is to stop net queues if modified vring has low 1799 * descriptor availability. Wake if all vrings are not in low descriptor 1800 * availability and modified vring has high descriptor availability. 1801 */ 1802 static inline void __wil_update_net_queues(struct wil6210_priv *wil, 1803 struct vring *vring, 1804 bool check_stop) 1805 { 1806 int i; 1807 1808 if (vring) 1809 wil_dbg_txrx(wil, "vring %d, check_stop=%d, stopped=%d", 1810 (int)(vring - wil->vring_tx), check_stop, 1811 wil->net_queue_stopped); 1812 else 1813 wil_dbg_txrx(wil, "check_stop=%d, stopped=%d", 1814 check_stop, wil->net_queue_stopped); 1815 1816 if (check_stop == wil->net_queue_stopped) 1817 /* net queues already in desired state */ 1818 return; 1819 1820 if (check_stop) { 1821 if (!vring || unlikely(wil_vring_avail_low(vring))) { 1822 /* not enough room in the vring */ 1823 netif_tx_stop_all_queues(wil_to_ndev(wil)); 1824 wil->net_queue_stopped = true; 1825 wil_dbg_txrx(wil, "netif_tx_stop called\n"); 1826 } 1827 return; 1828 } 1829 1830 /* check wake */ 1831 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 1832 struct vring *cur_vring = &wil->vring_tx[i]; 1833 struct vring_tx_data *txdata = &wil->vring_tx_data[i]; 1834 1835 if (!cur_vring->va || !txdata->enabled || cur_vring == vring) 1836 continue; 1837 1838 if (wil_vring_avail_low(cur_vring)) { 1839 wil_dbg_txrx(wil, "vring %d full, can't wake\n", 1840 (int)(cur_vring - wil->vring_tx)); 1841 return; 1842 } 1843 } 1844 1845 if (!vring || wil_vring_avail_high(vring)) { 1846 /* enough room in the vring */ 1847 wil_dbg_txrx(wil, "calling netif_tx_wake\n"); 1848 netif_tx_wake_all_queues(wil_to_ndev(wil)); 1849 wil->net_queue_stopped = false; 1850 } 1851 } 1852 1853 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring, 1854 bool check_stop) 1855 { 1856 spin_lock(&wil->net_queue_lock); 1857 __wil_update_net_queues(wil, vring, check_stop); 1858 spin_unlock(&wil->net_queue_lock); 1859 } 1860 1861 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring, 1862 bool check_stop) 1863 { 1864 spin_lock_bh(&wil->net_queue_lock); 1865 __wil_update_net_queues(wil, vring, check_stop); 1866 spin_unlock_bh(&wil->net_queue_lock); 1867 } 1868 1869 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev) 1870 { 1871 struct wil6210_priv *wil = ndev_to_wil(ndev); 1872 struct ethhdr *eth = (void *)skb->data; 1873 bool bcast = is_multicast_ether_addr(eth->h_dest); 1874 struct vring *vring; 1875 static bool pr_once_fw; 1876 int rc; 1877 1878 wil_dbg_txrx(wil, "start_xmit\n"); 1879 if (unlikely(!test_bit(wil_status_fwready, wil->status))) { 1880 if (!pr_once_fw) { 1881 wil_err(wil, "FW not ready\n"); 1882 pr_once_fw = true; 1883 } 1884 goto drop; 1885 } 1886 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) { 1887 wil_dbg_ratelimited(wil, "FW not connected, packet dropped\n"); 1888 goto drop; 1889 } 1890 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) { 1891 wil_err(wil, "Xmit in monitor mode not supported\n"); 1892 goto drop; 1893 } 1894 pr_once_fw = false; 1895 1896 /* find vring */ 1897 if (wil->wdev->iftype == NL80211_IFTYPE_STATION && !wil->pbss) { 1898 /* in STA mode (ESS), all to same VRING (to AP) */ 1899 vring = wil_find_tx_vring_sta(wil, skb); 1900 } else if (bcast) { 1901 if (wil->pbss) 1902 /* in pbss, no bcast VRING - duplicate skb in 1903 * all stations VRINGs 1904 */ 1905 vring = wil_find_tx_bcast_2(wil, skb); 1906 else if (wil->wdev->iftype == NL80211_IFTYPE_AP) 1907 /* AP has a dedicated bcast VRING */ 1908 vring = wil_find_tx_bcast_1(wil, skb); 1909 else 1910 /* unexpected combination, fallback to duplicating 1911 * the skb in all stations VRINGs 1912 */ 1913 vring = wil_find_tx_bcast_2(wil, skb); 1914 } else { 1915 /* unicast, find specific VRING by dest. address */ 1916 vring = wil_find_tx_ucast(wil, skb); 1917 } 1918 if (unlikely(!vring)) { 1919 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest); 1920 goto drop; 1921 } 1922 /* set up vring entry */ 1923 rc = wil_tx_vring(wil, vring, skb); 1924 1925 switch (rc) { 1926 case 0: 1927 /* shall we stop net queues? */ 1928 wil_update_net_queues_bh(wil, vring, true); 1929 /* statistics will be updated on the tx_complete */ 1930 dev_kfree_skb_any(skb); 1931 return NETDEV_TX_OK; 1932 case -ENOMEM: 1933 return NETDEV_TX_BUSY; 1934 default: 1935 break; /* goto drop; */ 1936 } 1937 drop: 1938 ndev->stats.tx_dropped++; 1939 dev_kfree_skb_any(skb); 1940 1941 return NET_XMIT_DROP; 1942 } 1943 1944 static inline bool wil_need_txstat(struct sk_buff *skb) 1945 { 1946 struct ethhdr *eth = (void *)skb->data; 1947 1948 return is_unicast_ether_addr(eth->h_dest) && skb->sk && 1949 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS); 1950 } 1951 1952 static inline void wil_consume_skb(struct sk_buff *skb, bool acked) 1953 { 1954 if (unlikely(wil_need_txstat(skb))) 1955 skb_complete_wifi_ack(skb, acked); 1956 else 1957 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb); 1958 } 1959 1960 /** 1961 * Clean up transmitted skb's from the Tx VRING 1962 * 1963 * Return number of descriptors cleared 1964 * 1965 * Safe to call from IRQ 1966 */ 1967 int wil_tx_complete(struct wil6210_priv *wil, int ringid) 1968 { 1969 struct net_device *ndev = wil_to_ndev(wil); 1970 struct device *dev = wil_to_dev(wil); 1971 struct vring *vring = &wil->vring_tx[ringid]; 1972 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid]; 1973 int done = 0; 1974 int cid = wil->vring2cid_tid[ringid][0]; 1975 struct wil_net_stats *stats = NULL; 1976 volatile struct vring_tx_desc *_d; 1977 int used_before_complete; 1978 int used_new; 1979 1980 if (unlikely(!vring->va)) { 1981 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid); 1982 return 0; 1983 } 1984 1985 if (unlikely(!txdata->enabled)) { 1986 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid); 1987 return 0; 1988 } 1989 1990 wil_dbg_txrx(wil, "tx_complete: (%d)\n", ringid); 1991 1992 used_before_complete = wil_vring_used_tx(vring); 1993 1994 if (cid < WIL6210_MAX_CID) 1995 stats = &wil->sta[cid].stats; 1996 1997 while (!wil_vring_is_empty(vring)) { 1998 int new_swtail; 1999 struct wil_ctx *ctx = &vring->ctx[vring->swtail]; 2000 /** 2001 * For the fragmented skb, HW will set DU bit only for the 2002 * last fragment. look for it. 2003 * In TSO the first DU will include hdr desc 2004 */ 2005 int lf = (vring->swtail + ctx->nr_frags) % vring->size; 2006 /* TODO: check we are not past head */ 2007 2008 _d = &vring->va[lf].tx; 2009 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU))) 2010 break; 2011 2012 new_swtail = (lf + 1) % vring->size; 2013 while (vring->swtail != new_swtail) { 2014 struct vring_tx_desc dd, *d = ⅆ 2015 u16 dmalen; 2016 struct sk_buff *skb; 2017 2018 ctx = &vring->ctx[vring->swtail]; 2019 skb = ctx->skb; 2020 _d = &vring->va[vring->swtail].tx; 2021 2022 *d = *_d; 2023 2024 dmalen = le16_to_cpu(d->dma.length); 2025 trace_wil6210_tx_done(ringid, vring->swtail, dmalen, 2026 d->dma.error); 2027 wil_dbg_txrx(wil, 2028 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n", 2029 ringid, vring->swtail, dmalen, 2030 d->dma.status, d->dma.error); 2031 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4, 2032 (const void *)d, sizeof(*d), false); 2033 2034 wil_txdesc_unmap(dev, d, ctx); 2035 2036 if (skb) { 2037 if (likely(d->dma.error == 0)) { 2038 ndev->stats.tx_packets++; 2039 ndev->stats.tx_bytes += skb->len; 2040 if (stats) { 2041 stats->tx_packets++; 2042 stats->tx_bytes += skb->len; 2043 } 2044 } else { 2045 ndev->stats.tx_errors++; 2046 if (stats) 2047 stats->tx_errors++; 2048 } 2049 wil_consume_skb(skb, d->dma.error == 0); 2050 } 2051 memset(ctx, 0, sizeof(*ctx)); 2052 /* Make sure the ctx is zeroed before updating the tail 2053 * to prevent a case where wil_tx_vring will see 2054 * this descriptor as used and handle it before ctx zero 2055 * is completed. 2056 */ 2057 wmb(); 2058 /* There is no need to touch HW descriptor: 2059 * - ststus bit TX_DMA_STATUS_DU is set by design, 2060 * so hardware will not try to process this desc., 2061 * - rest of descriptor will be initialized on Tx. 2062 */ 2063 vring->swtail = wil_vring_next_tail(vring); 2064 done++; 2065 } 2066 } 2067 2068 /* performance monitoring */ 2069 used_new = wil_vring_used_tx(vring); 2070 if (wil_val_in_range(vring_idle_trsh, 2071 used_new, used_before_complete)) { 2072 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n", 2073 ringid, used_before_complete, used_new); 2074 txdata->last_idle = get_cycles(); 2075 } 2076 2077 /* shall we wake net queues? */ 2078 if (done) 2079 wil_update_net_queues(wil, vring, false); 2080 2081 return done; 2082 } 2083