1 /*
2  * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <linux/moduleparam.h>
19 #include <linux/if_arp.h>
20 #include <linux/etherdevice.h>
21 #include <linux/rtnetlink.h>
22 
23 #include "wil6210.h"
24 #include "txrx.h"
25 #include "txrx_edma.h"
26 #include "wmi.h"
27 #include "boot_loader.h"
28 
29 #define WAIT_FOR_HALP_VOTE_MS 100
30 #define WAIT_FOR_SCAN_ABORT_MS 1000
31 #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
32 #define WIL_BOARD_FILE_MAX_NAMELEN 128
33 
34 bool debug_fw; /* = false; */
35 module_param(debug_fw, bool, 0444);
36 MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
37 
38 static u8 oob_mode;
39 module_param(oob_mode, byte, 0444);
40 MODULE_PARM_DESC(oob_mode,
41 		 " enable out of the box (OOB) mode in FW, for diagnostics and certification");
42 
43 bool no_fw_recovery;
44 module_param(no_fw_recovery, bool, 0644);
45 MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
46 
47 /* if not set via modparam, will be set to default value of 1/8 of
48  * rx ring size during init flow
49  */
50 unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
51 module_param(rx_ring_overflow_thrsh, ushort, 0444);
52 MODULE_PARM_DESC(rx_ring_overflow_thrsh,
53 		 " RX ring overflow threshold in descriptors.");
54 
55 /* We allow allocation of more than 1 page buffers to support large packets.
56  * It is suboptimal behavior performance wise in case MTU above page size.
57  */
58 unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
59 static int mtu_max_set(const char *val, const struct kernel_param *kp)
60 {
61 	int ret;
62 
63 	/* sets mtu_max directly. no need to restore it in case of
64 	 * illegal value since we assume this will fail insmod
65 	 */
66 	ret = param_set_uint(val, kp);
67 	if (ret)
68 		return ret;
69 
70 	if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
71 		ret = -EINVAL;
72 
73 	return ret;
74 }
75 
76 static const struct kernel_param_ops mtu_max_ops = {
77 	.set = mtu_max_set,
78 	.get = param_get_uint,
79 };
80 
81 module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
82 MODULE_PARM_DESC(mtu_max, " Max MTU value.");
83 
84 static uint rx_ring_order;
85 static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
86 static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
87 
88 static int ring_order_set(const char *val, const struct kernel_param *kp)
89 {
90 	int ret;
91 	uint x;
92 
93 	ret = kstrtouint(val, 0, &x);
94 	if (ret)
95 		return ret;
96 
97 	if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
98 		return -EINVAL;
99 
100 	*((uint *)kp->arg) = x;
101 
102 	return 0;
103 }
104 
105 static const struct kernel_param_ops ring_order_ops = {
106 	.set = ring_order_set,
107 	.get = param_get_uint,
108 };
109 
110 module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
111 MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
112 module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
113 MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
114 module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
115 MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
116 
117 enum {
118 	WIL_BOOT_ERR,
119 	WIL_BOOT_VANILLA,
120 	WIL_BOOT_PRODUCTION,
121 	WIL_BOOT_DEVELOPMENT,
122 };
123 
124 enum {
125 	WIL_SIG_STATUS_VANILLA = 0x0,
126 	WIL_SIG_STATUS_DEVELOPMENT = 0x1,
127 	WIL_SIG_STATUS_PRODUCTION = 0x2,
128 	WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
129 };
130 
131 #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
132 #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
133 
134 #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
135 
136 #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
137 /* round up to be above 2 ms total */
138 #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
139 
140 /*
141  * Due to a hardware issue,
142  * one has to read/write to/from NIC in 32-bit chunks;
143  * regular memcpy_fromio and siblings will
144  * not work on 64-bit platform - it uses 64-bit transactions
145  *
146  * Force 32-bit transactions to enable NIC on 64-bit platforms
147  *
148  * To avoid byte swap on big endian host, __raw_{read|write}l
149  * should be used - {read|write}l would swap bytes to provide
150  * little endian on PCI value in host endianness.
151  */
152 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
153 			  size_t count)
154 {
155 	u32 *d = dst;
156 	const volatile u32 __iomem *s = src;
157 
158 	for (; count >= 4; count -= 4)
159 		*d++ = __raw_readl(s++);
160 
161 	if (unlikely(count)) {
162 		/* count can be 1..3 */
163 		u32 tmp = __raw_readl(s);
164 
165 		memcpy(d, &tmp, count);
166 	}
167 }
168 
169 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
170 			size_t count)
171 {
172 	volatile u32 __iomem *d = dst;
173 	const u32 *s = src;
174 
175 	for (; count >= 4; count -= 4)
176 		__raw_writel(*s++, d++);
177 
178 	if (unlikely(count)) {
179 		/* count can be 1..3 */
180 		u32 tmp = 0;
181 
182 		memcpy(&tmp, s, count);
183 		__raw_writel(tmp, d);
184 	}
185 }
186 
187 static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
188 {
189 	struct wil_ring *ring = &wil->ring_tx[id];
190 	struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
191 
192 	lockdep_assert_held(&wil->mutex);
193 
194 	if (!ring->va)
195 		return;
196 
197 	wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
198 
199 	spin_lock_bh(&txdata->lock);
200 	txdata->dot1x_open = false;
201 	txdata->mid = U8_MAX;
202 	txdata->enabled = 0; /* no Tx can be in progress or start anew */
203 	spin_unlock_bh(&txdata->lock);
204 	/* napi_synchronize waits for completion of the current NAPI but will
205 	 * not prevent the next NAPI run.
206 	 * Add a memory barrier to guarantee that txdata->enabled is zeroed
207 	 * before napi_synchronize so that the next scheduled NAPI will not
208 	 * handle this vring
209 	 */
210 	wmb();
211 	/* make sure NAPI won't touch this vring */
212 	if (test_bit(wil_status_napi_en, wil->status))
213 		napi_synchronize(&wil->napi_tx);
214 
215 	wil->txrx_ops.ring_fini_tx(wil, ring);
216 }
217 
218 static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
219 {
220 	int i;
221 
222 	for (i = 0; i < WIL6210_MAX_CID; i++) {
223 		if (wil->sta[i].mid == mid &&
224 		    wil->sta[i].status == wil_sta_connected)
225 			return true;
226 	}
227 
228 	return false;
229 }
230 
231 static void wil_disconnect_cid_complete(struct wil6210_vif *vif, int cid,
232 					u16 reason_code)
233 __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
234 {
235 	uint i;
236 	struct wil6210_priv *wil = vif_to_wil(vif);
237 	struct net_device *ndev = vif_to_ndev(vif);
238 	struct wireless_dev *wdev = vif_to_wdev(vif);
239 	struct wil_sta_info *sta = &wil->sta[cid];
240 	int min_ring_id = wil_get_min_tx_ring_id(wil);
241 
242 	might_sleep();
243 	wil_dbg_misc(wil,
244 		     "disconnect_cid_complete: CID %d, MID %d, status %d\n",
245 		     cid, sta->mid, sta->status);
246 	/* inform upper layers */
247 	if (sta->status != wil_sta_unused) {
248 		if (vif->mid != sta->mid) {
249 			wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
250 				vif->mid);
251 		}
252 
253 		switch (wdev->iftype) {
254 		case NL80211_IFTYPE_AP:
255 		case NL80211_IFTYPE_P2P_GO:
256 			/* AP-like interface */
257 			cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
258 			break;
259 		default:
260 			break;
261 		}
262 		sta->status = wil_sta_unused;
263 		sta->mid = U8_MAX;
264 	}
265 	/* reorder buffers */
266 	for (i = 0; i < WIL_STA_TID_NUM; i++) {
267 		struct wil_tid_ampdu_rx *r;
268 
269 		spin_lock_bh(&sta->tid_rx_lock);
270 
271 		r = sta->tid_rx[i];
272 		sta->tid_rx[i] = NULL;
273 		wil_tid_ampdu_rx_free(wil, r);
274 
275 		spin_unlock_bh(&sta->tid_rx_lock);
276 	}
277 	/* crypto context */
278 	memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
279 	memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
280 	/* release vrings */
281 	for (i = min_ring_id; i < ARRAY_SIZE(wil->ring_tx); i++) {
282 		if (wil->ring2cid_tid[i][0] == cid)
283 			wil_ring_fini_tx(wil, i);
284 	}
285 	/* statistics */
286 	memset(&sta->stats, 0, sizeof(sta->stats));
287 	sta->stats.tx_latency_min_us = U32_MAX;
288 }
289 
290 static void _wil6210_disconnect_complete(struct wil6210_vif *vif,
291 					 const u8 *bssid, u16 reason_code)
292 {
293 	struct wil6210_priv *wil = vif_to_wil(vif);
294 	int cid = -ENOENT;
295 	struct net_device *ndev;
296 	struct wireless_dev *wdev;
297 
298 	ndev = vif_to_ndev(vif);
299 	wdev = vif_to_wdev(vif);
300 
301 	might_sleep();
302 	wil_info(wil, "disconnect_complete: bssid=%pM, reason=%d\n",
303 		 bssid, reason_code);
304 
305 	/* Cases are:
306 	 * - disconnect single STA, still connected
307 	 * - disconnect single STA, already disconnected
308 	 * - disconnect all
309 	 *
310 	 * For "disconnect all", there are 3 options:
311 	 * - bssid == NULL
312 	 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
313 	 * - bssid is our MAC address
314 	 */
315 	if (bssid && !is_broadcast_ether_addr(bssid) &&
316 	    !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
317 		cid = wil_find_cid(wil, vif->mid, bssid);
318 		wil_dbg_misc(wil,
319 			     "Disconnect complete %pM, CID=%d, reason=%d\n",
320 			     bssid, cid, reason_code);
321 		if (cid >= 0) /* disconnect 1 peer */
322 			wil_disconnect_cid_complete(vif, cid, reason_code);
323 	} else { /* all */
324 		wil_dbg_misc(wil, "Disconnect complete all\n");
325 		for (cid = 0; cid < WIL6210_MAX_CID; cid++)
326 			wil_disconnect_cid_complete(vif, cid, reason_code);
327 	}
328 
329 	/* link state */
330 	switch (wdev->iftype) {
331 	case NL80211_IFTYPE_STATION:
332 	case NL80211_IFTYPE_P2P_CLIENT:
333 		wil_bcast_fini(vif);
334 		wil_update_net_queues_bh(wil, vif, NULL, true);
335 		netif_carrier_off(ndev);
336 		if (!wil_has_other_active_ifaces(wil, ndev, false, true))
337 			wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
338 
339 		if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
340 			atomic_dec(&wil->connected_vifs);
341 			cfg80211_disconnected(ndev, reason_code,
342 					      NULL, 0,
343 					      vif->locally_generated_disc,
344 					      GFP_KERNEL);
345 			vif->locally_generated_disc = false;
346 		} else if (test_bit(wil_vif_fwconnecting, vif->status)) {
347 			cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
348 						WLAN_STATUS_UNSPECIFIED_FAILURE,
349 						GFP_KERNEL);
350 			vif->bss = NULL;
351 		}
352 		clear_bit(wil_vif_fwconnecting, vif->status);
353 		clear_bit(wil_vif_ft_roam, vif->status);
354 
355 		break;
356 	case NL80211_IFTYPE_AP:
357 	case NL80211_IFTYPE_P2P_GO:
358 		if (!wil_vif_is_connected(wil, vif->mid)) {
359 			wil_update_net_queues_bh(wil, vif, NULL, true);
360 			if (test_and_clear_bit(wil_vif_fwconnected,
361 					       vif->status))
362 				atomic_dec(&wil->connected_vifs);
363 		} else {
364 			wil_update_net_queues_bh(wil, vif, NULL, false);
365 		}
366 		break;
367 	default:
368 		break;
369 	}
370 }
371 
372 static int wil_disconnect_cid(struct wil6210_vif *vif, int cid,
373 			      u16 reason_code)
374 {
375 	struct wil6210_priv *wil = vif_to_wil(vif);
376 	struct wireless_dev *wdev = vif_to_wdev(vif);
377 	struct wil_sta_info *sta = &wil->sta[cid];
378 	bool del_sta = false;
379 
380 	might_sleep();
381 	wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
382 		     cid, sta->mid, sta->status);
383 
384 	if (sta->status == wil_sta_unused)
385 		return 0;
386 
387 	if (vif->mid != sta->mid) {
388 		wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", vif->mid);
389 		return -EINVAL;
390 	}
391 
392 	/* inform lower layers */
393 	if (wdev->iftype == NL80211_IFTYPE_AP && disable_ap_sme)
394 		del_sta = true;
395 
396 	/* disconnect by sending command disconnect/del_sta and wait
397 	 * synchronously for WMI_DISCONNECT_EVENTID event.
398 	 */
399 	return wmi_disconnect_sta(vif, sta->addr, reason_code, del_sta);
400 }
401 
402 static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
403 				u16 reason_code)
404 {
405 	struct wil6210_priv *wil;
406 	struct net_device *ndev;
407 	struct wireless_dev *wdev;
408 	int cid = -ENOENT;
409 
410 	if (unlikely(!vif))
411 		return;
412 
413 	wil = vif_to_wil(vif);
414 	ndev = vif_to_ndev(vif);
415 	wdev = vif_to_wdev(vif);
416 
417 	might_sleep();
418 	wil_info(wil, "disconnect bssid=%pM, reason=%d\n", bssid, reason_code);
419 
420 	/* Cases are:
421 	 * - disconnect single STA, still connected
422 	 * - disconnect single STA, already disconnected
423 	 * - disconnect all
424 	 *
425 	 * For "disconnect all", there are 3 options:
426 	 * - bssid == NULL
427 	 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
428 	 * - bssid is our MAC address
429 	 */
430 	if (bssid && !is_broadcast_ether_addr(bssid) &&
431 	    !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
432 		cid = wil_find_cid(wil, vif->mid, bssid);
433 		wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
434 			     bssid, cid, reason_code);
435 		if (cid >= 0) /* disconnect 1 peer */
436 			wil_disconnect_cid(vif, cid, reason_code);
437 	} else { /* all */
438 		wil_dbg_misc(wil, "Disconnect all\n");
439 		for (cid = 0; cid < WIL6210_MAX_CID; cid++)
440 			wil_disconnect_cid(vif, cid, reason_code);
441 	}
442 
443 	/* call event handler manually after processing wmi_call,
444 	 * to avoid deadlock - disconnect event handler acquires
445 	 * wil->mutex while it is already held here
446 	 */
447 	_wil6210_disconnect_complete(vif, bssid, reason_code);
448 }
449 
450 void wil_disconnect_worker(struct work_struct *work)
451 {
452 	struct wil6210_vif *vif = container_of(work,
453 			struct wil6210_vif, disconnect_worker);
454 	struct wil6210_priv *wil = vif_to_wil(vif);
455 	struct net_device *ndev = vif_to_ndev(vif);
456 	int rc;
457 	struct {
458 		struct wmi_cmd_hdr wmi;
459 		struct wmi_disconnect_event evt;
460 	} __packed reply;
461 
462 	if (test_bit(wil_vif_fwconnected, vif->status))
463 		/* connect succeeded after all */
464 		return;
465 
466 	if (!test_bit(wil_vif_fwconnecting, vif->status))
467 		/* already disconnected */
468 		return;
469 
470 	memset(&reply, 0, sizeof(reply));
471 
472 	rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
473 		      WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
474 		      WIL6210_DISCONNECT_TO_MS);
475 	if (rc) {
476 		wil_err(wil, "disconnect error %d\n", rc);
477 		return;
478 	}
479 
480 	wil_update_net_queues_bh(wil, vif, NULL, true);
481 	netif_carrier_off(ndev);
482 	cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
483 				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
484 	clear_bit(wil_vif_fwconnecting, vif->status);
485 }
486 
487 static int wil_wait_for_recovery(struct wil6210_priv *wil)
488 {
489 	if (wait_event_interruptible(wil->wq, wil->recovery_state !=
490 				     fw_recovery_pending)) {
491 		wil_err(wil, "Interrupt, canceling recovery\n");
492 		return -ERESTARTSYS;
493 	}
494 	if (wil->recovery_state != fw_recovery_running) {
495 		wil_info(wil, "Recovery cancelled\n");
496 		return -EINTR;
497 	}
498 	wil_info(wil, "Proceed with recovery\n");
499 	return 0;
500 }
501 
502 void wil_set_recovery_state(struct wil6210_priv *wil, int state)
503 {
504 	wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
505 		     wil->recovery_state, state);
506 
507 	wil->recovery_state = state;
508 	wake_up_interruptible(&wil->wq);
509 }
510 
511 bool wil_is_recovery_blocked(struct wil6210_priv *wil)
512 {
513 	return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
514 }
515 
516 static void wil_fw_error_worker(struct work_struct *work)
517 {
518 	struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
519 						fw_error_worker);
520 	struct net_device *ndev = wil->main_ndev;
521 	struct wireless_dev *wdev;
522 
523 	wil_dbg_misc(wil, "fw error worker\n");
524 
525 	if (!ndev || !(ndev->flags & IFF_UP)) {
526 		wil_info(wil, "No recovery - interface is down\n");
527 		return;
528 	}
529 	wdev = ndev->ieee80211_ptr;
530 
531 	/* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
532 	 * passed since last recovery attempt
533 	 */
534 	if (time_is_after_jiffies(wil->last_fw_recovery +
535 				  WIL6210_FW_RECOVERY_TO))
536 		wil->recovery_count++;
537 	else
538 		wil->recovery_count = 1; /* fw was alive for a long time */
539 
540 	if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
541 		wil_err(wil, "too many recovery attempts (%d), giving up\n",
542 			wil->recovery_count);
543 		return;
544 	}
545 
546 	wil->last_fw_recovery = jiffies;
547 
548 	wil_info(wil, "fw error recovery requested (try %d)...\n",
549 		 wil->recovery_count);
550 	if (!no_fw_recovery)
551 		wil->recovery_state = fw_recovery_running;
552 	if (wil_wait_for_recovery(wil) != 0)
553 		return;
554 
555 	rtnl_lock();
556 	mutex_lock(&wil->mutex);
557 	/* Needs adaptation for multiple VIFs
558 	 * need to go over all VIFs and consider the appropriate
559 	 * recovery because each one can have different iftype.
560 	 */
561 	switch (wdev->iftype) {
562 	case NL80211_IFTYPE_STATION:
563 	case NL80211_IFTYPE_P2P_CLIENT:
564 	case NL80211_IFTYPE_MONITOR:
565 		/* silent recovery, upper layers will see disconnect */
566 		__wil_down(wil);
567 		__wil_up(wil);
568 		break;
569 	case NL80211_IFTYPE_AP:
570 	case NL80211_IFTYPE_P2P_GO:
571 		if (no_fw_recovery) /* upper layers do recovery */
572 			break;
573 		/* silent recovery, upper layers will see disconnect */
574 		__wil_down(wil);
575 		__wil_up(wil);
576 		mutex_unlock(&wil->mutex);
577 		wil_cfg80211_ap_recovery(wil);
578 		mutex_lock(&wil->mutex);
579 		wil_info(wil, "... completed\n");
580 		break;
581 	default:
582 		wil_err(wil, "No recovery - unknown interface type %d\n",
583 			wdev->iftype);
584 		break;
585 	}
586 
587 	mutex_unlock(&wil->mutex);
588 	rtnl_unlock();
589 }
590 
591 static int wil_find_free_ring(struct wil6210_priv *wil)
592 {
593 	int i;
594 	int min_ring_id = wil_get_min_tx_ring_id(wil);
595 
596 	for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
597 		if (!wil->ring_tx[i].va)
598 			return i;
599 	}
600 	return -EINVAL;
601 }
602 
603 int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
604 {
605 	struct wil6210_priv *wil = vif_to_wil(vif);
606 	int rc = -EINVAL, ringid;
607 
608 	if (cid < 0) {
609 		wil_err(wil, "No connection pending\n");
610 		goto out;
611 	}
612 	ringid = wil_find_free_ring(wil);
613 	if (ringid < 0) {
614 		wil_err(wil, "No free vring found\n");
615 		goto out;
616 	}
617 
618 	wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
619 		    cid, vif->mid, ringid);
620 
621 	rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
622 					cid, 0);
623 	if (rc)
624 		wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
625 			cid, vif->mid, ringid);
626 
627 out:
628 	return rc;
629 }
630 
631 int wil_bcast_init(struct wil6210_vif *vif)
632 {
633 	struct wil6210_priv *wil = vif_to_wil(vif);
634 	int ri = vif->bcast_ring, rc;
635 
636 	if (ri >= 0 && wil->ring_tx[ri].va)
637 		return 0;
638 
639 	ri = wil_find_free_ring(wil);
640 	if (ri < 0)
641 		return ri;
642 
643 	vif->bcast_ring = ri;
644 	rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
645 	if (rc)
646 		vif->bcast_ring = -1;
647 
648 	return rc;
649 }
650 
651 void wil_bcast_fini(struct wil6210_vif *vif)
652 {
653 	struct wil6210_priv *wil = vif_to_wil(vif);
654 	int ri = vif->bcast_ring;
655 
656 	if (ri < 0)
657 		return;
658 
659 	vif->bcast_ring = -1;
660 	wil_ring_fini_tx(wil, ri);
661 }
662 
663 void wil_bcast_fini_all(struct wil6210_priv *wil)
664 {
665 	int i;
666 	struct wil6210_vif *vif;
667 
668 	for (i = 0; i < wil->max_vifs; i++) {
669 		vif = wil->vifs[i];
670 		if (vif)
671 			wil_bcast_fini(vif);
672 	}
673 }
674 
675 int wil_priv_init(struct wil6210_priv *wil)
676 {
677 	uint i;
678 
679 	wil_dbg_misc(wil, "priv_init\n");
680 
681 	memset(wil->sta, 0, sizeof(wil->sta));
682 	for (i = 0; i < WIL6210_MAX_CID; i++) {
683 		spin_lock_init(&wil->sta[i].tid_rx_lock);
684 		wil->sta[i].mid = U8_MAX;
685 	}
686 
687 	for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
688 		spin_lock_init(&wil->ring_tx_data[i].lock);
689 		wil->ring2cid_tid[i][0] = WIL6210_MAX_CID;
690 	}
691 
692 	mutex_init(&wil->mutex);
693 	mutex_init(&wil->vif_mutex);
694 	mutex_init(&wil->wmi_mutex);
695 	mutex_init(&wil->halp.lock);
696 
697 	init_completion(&wil->wmi_ready);
698 	init_completion(&wil->wmi_call);
699 	init_completion(&wil->halp.comp);
700 
701 	INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
702 	INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
703 
704 	INIT_LIST_HEAD(&wil->pending_wmi_ev);
705 	spin_lock_init(&wil->wmi_ev_lock);
706 	spin_lock_init(&wil->net_queue_lock);
707 	init_waitqueue_head(&wil->wq);
708 
709 	wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
710 	if (!wil->wmi_wq)
711 		return -EAGAIN;
712 
713 	wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
714 	if (!wil->wq_service)
715 		goto out_wmi_wq;
716 
717 	wil->last_fw_recovery = jiffies;
718 	wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
719 	wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
720 	wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
721 	wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
722 
723 	if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
724 		rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
725 
726 	wil->ps_profile =  WMI_PS_PROFILE_TYPE_DEFAULT;
727 
728 	wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
729 			      WMI_WAKEUP_TRIGGER_BCAST;
730 	memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
731 	wil->ring_idle_trsh = 16;
732 
733 	wil->reply_mid = U8_MAX;
734 	wil->max_vifs = 1;
735 
736 	/* edma configuration can be updated via debugfs before allocation */
737 	wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
738 	wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
739 
740 	/* Rx status ring size should be bigger than the number of RX buffers
741 	 * in order to prevent backpressure on the status ring, which may
742 	 * cause HW freeze.
743 	 */
744 	wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
745 	/* Number of RX buffer IDs should be bigger than the RX descriptor
746 	 * ring size as in HW reorder flow, the HW can consume additional
747 	 * buffers before releasing the previous ones.
748 	 */
749 	wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
750 
751 	wil->amsdu_en = 1;
752 
753 	return 0;
754 
755 out_wmi_wq:
756 	destroy_workqueue(wil->wmi_wq);
757 
758 	return -EAGAIN;
759 }
760 
761 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
762 {
763 	if (wil->platform_ops.bus_request) {
764 		wil->bus_request_kbps = kbps;
765 		wil->platform_ops.bus_request(wil->platform_handle, kbps);
766 	}
767 }
768 
769 /**
770  * wil6210_disconnect - disconnect one connection
771  * @vif: virtual interface context
772  * @bssid: peer to disconnect, NULL to disconnect all
773  * @reason_code: Reason code for the Disassociation frame
774  *
775  * Disconnect and release associated resources. Issue WMI
776  * command(s) to trigger MAC disconnect. When command was issued
777  * successfully, call the wil6210_disconnect_complete function
778  * to handle the event synchronously
779  */
780 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
781 			u16 reason_code)
782 {
783 	struct wil6210_priv *wil = vif_to_wil(vif);
784 
785 	wil_dbg_misc(wil, "disconnecting\n");
786 
787 	del_timer_sync(&vif->connect_timer);
788 	_wil6210_disconnect(vif, bssid, reason_code);
789 }
790 
791 /**
792  * wil6210_disconnect_complete - handle disconnect event
793  * @vif: virtual interface context
794  * @bssid: peer to disconnect, NULL to disconnect all
795  * @reason_code: Reason code for the Disassociation frame
796  *
797  * Release associated resources and indicate upper layers the
798  * connection is terminated.
799  */
800 void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid,
801 				 u16 reason_code)
802 {
803 	struct wil6210_priv *wil = vif_to_wil(vif);
804 
805 	wil_dbg_misc(wil, "got disconnect\n");
806 
807 	del_timer_sync(&vif->connect_timer);
808 	_wil6210_disconnect_complete(vif, bssid, reason_code);
809 }
810 
811 void wil_priv_deinit(struct wil6210_priv *wil)
812 {
813 	wil_dbg_misc(wil, "priv_deinit\n");
814 
815 	wil_set_recovery_state(wil, fw_recovery_idle);
816 	cancel_work_sync(&wil->fw_error_worker);
817 	wmi_event_flush(wil);
818 	destroy_workqueue(wil->wq_service);
819 	destroy_workqueue(wil->wmi_wq);
820 }
821 
822 static void wil_shutdown_bl(struct wil6210_priv *wil)
823 {
824 	u32 val;
825 
826 	wil_s(wil, RGF_USER_BL +
827 	      offsetof(struct bl_dedicated_registers_v1,
828 		       bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
829 
830 	usleep_range(100, 150);
831 
832 	val = wil_r(wil, RGF_USER_BL +
833 		    offsetof(struct bl_dedicated_registers_v1,
834 			     bl_shutdown_handshake));
835 	if (val & BL_SHUTDOWN_HS_RTD) {
836 		wil_dbg_misc(wil, "BL is ready for halt\n");
837 		return;
838 	}
839 
840 	wil_err(wil, "BL did not report ready for halt\n");
841 }
842 
843 /* this format is used by ARC embedded CPU for instruction memory */
844 static inline u32 ARC_me_imm32(u32 d)
845 {
846 	return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
847 }
848 
849 /* defines access to interrupt vectors for wil_freeze_bl */
850 #define ARC_IRQ_VECTOR_OFFSET(N)	((N) * 8)
851 /* ARC long jump instruction */
852 #define ARC_JAL_INST			(0x20200f80)
853 
854 static void wil_freeze_bl(struct wil6210_priv *wil)
855 {
856 	u32 jal, upc, saved;
857 	u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
858 
859 	jal = wil_r(wil, wil->iccm_base + ivt3);
860 	if (jal != ARC_me_imm32(ARC_JAL_INST)) {
861 		wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
862 		return;
863 	}
864 
865 	/* prevent the target from entering deep sleep
866 	 * and disabling memory access
867 	 */
868 	saved = wil_r(wil, RGF_USER_USAGE_8);
869 	wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
870 	usleep_range(20, 25); /* let the BL process the bit */
871 
872 	/* redirect to endless loop in the INT_L1 context and let it trap */
873 	wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
874 	usleep_range(20, 25); /* let the BL get into the trap */
875 
876 	/* verify the BL is frozen */
877 	upc = wil_r(wil, RGF_USER_CPU_PC);
878 	if (upc < ivt3 || (upc > (ivt3 + 8)))
879 		wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
880 
881 	wil_w(wil, RGF_USER_USAGE_8, saved);
882 }
883 
884 static void wil_bl_prepare_halt(struct wil6210_priv *wil)
885 {
886 	u32 tmp, ver;
887 
888 	/* before halting device CPU driver must make sure BL is not accessing
889 	 * host memory. This is done differently depending on BL version:
890 	 * 1. For very old BL versions the procedure is skipped
891 	 * (not supported).
892 	 * 2. For old BL version we use a special trick to freeze the BL
893 	 * 3. For new BL versions we shutdown the BL using handshake procedure.
894 	 */
895 	tmp = wil_r(wil, RGF_USER_BL +
896 		    offsetof(struct bl_dedicated_registers_v0,
897 			     boot_loader_struct_version));
898 	if (!tmp) {
899 		wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
900 		return;
901 	}
902 
903 	tmp = wil_r(wil, RGF_USER_BL +
904 		    offsetof(struct bl_dedicated_registers_v1,
905 			     bl_shutdown_handshake));
906 	ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
907 
908 	if (ver > 0)
909 		wil_shutdown_bl(wil);
910 	else
911 		wil_freeze_bl(wil);
912 }
913 
914 static inline void wil_halt_cpu(struct wil6210_priv *wil)
915 {
916 	if (wil->hw_version >= HW_VER_TALYN_MB) {
917 		wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
918 		      BIT_USER_USER_CPU_MAN_RST);
919 		wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
920 		      BIT_USER_MAC_CPU_MAN_RST);
921 	} else {
922 		wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
923 		wil_w(wil, RGF_USER_MAC_CPU_0,  BIT_USER_MAC_CPU_MAN_RST);
924 	}
925 }
926 
927 static inline void wil_release_cpu(struct wil6210_priv *wil)
928 {
929 	/* Start CPU */
930 	if (wil->hw_version >= HW_VER_TALYN_MB)
931 		wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
932 	else
933 		wil_w(wil, RGF_USER_USER_CPU_0, 1);
934 }
935 
936 static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
937 {
938 	wil_info(wil, "oob_mode to %d\n", mode);
939 	switch (mode) {
940 	case 0:
941 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
942 		      BIT_USER_OOB_R2_MODE);
943 		break;
944 	case 1:
945 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
946 		wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
947 		break;
948 	case 2:
949 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
950 		wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
951 		break;
952 	default:
953 		wil_err(wil, "invalid oob_mode: %d\n", mode);
954 	}
955 }
956 
957 static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
958 {
959 	int delay = 0;
960 	u32 x, x1 = 0;
961 
962 	/* wait until device ready. */
963 	if (no_flash) {
964 		msleep(PMU_READY_DELAY_MS);
965 
966 		wil_dbg_misc(wil, "Reset completed\n");
967 	} else {
968 		do {
969 			msleep(RST_DELAY);
970 			x = wil_r(wil, RGF_USER_BL +
971 				  offsetof(struct bl_dedicated_registers_v0,
972 					   boot_loader_ready));
973 			if (x1 != x) {
974 				wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
975 					     x1, x);
976 				x1 = x;
977 			}
978 			if (delay++ > RST_COUNT) {
979 				wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
980 					x);
981 				return -ETIME;
982 			}
983 		} while (x != BL_READY);
984 
985 		wil_dbg_misc(wil, "Reset completed in %d ms\n",
986 			     delay * RST_DELAY);
987 	}
988 
989 	return 0;
990 }
991 
992 static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
993 {
994 	u32 otp_hw;
995 	u8 signature_status;
996 	bool otp_signature_err;
997 	bool hw_section_done;
998 	u32 otp_qc_secured;
999 	int delay = 0;
1000 
1001 	/* Wait for OTP signature test to complete */
1002 	usleep_range(2000, 2200);
1003 
1004 	wil->boot_config = WIL_BOOT_ERR;
1005 
1006 	/* Poll until OTP signature status is valid.
1007 	 * In vanilla and development modes, when signature test is complete
1008 	 * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
1009 	 * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
1010 	 * for signature status change to 2 or 3.
1011 	 */
1012 	do {
1013 		otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
1014 		signature_status = WIL_GET_BITS(otp_hw, 8, 9);
1015 		otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
1016 
1017 		if (otp_signature_err &&
1018 		    signature_status == WIL_SIG_STATUS_VANILLA) {
1019 			wil->boot_config = WIL_BOOT_VANILLA;
1020 			break;
1021 		}
1022 		if (otp_signature_err &&
1023 		    signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
1024 			wil->boot_config = WIL_BOOT_DEVELOPMENT;
1025 			break;
1026 		}
1027 		if (!otp_signature_err &&
1028 		    signature_status == WIL_SIG_STATUS_PRODUCTION) {
1029 			wil->boot_config = WIL_BOOT_PRODUCTION;
1030 			break;
1031 		}
1032 		if  (!otp_signature_err &&
1033 		     signature_status ==
1034 		     WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
1035 			/* Unrecognized OTP signature found. Possibly a
1036 			 * corrupted production signature, access control
1037 			 * is applied as in production mode, therefore
1038 			 * do not fail
1039 			 */
1040 			wil->boot_config = WIL_BOOT_PRODUCTION;
1041 			break;
1042 		}
1043 		if (delay++ > OTP_HW_COUNT)
1044 			break;
1045 
1046 		usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
1047 	} while (!otp_signature_err && signature_status == 0);
1048 
1049 	if (wil->boot_config == WIL_BOOT_ERR) {
1050 		wil_err(wil,
1051 			"invalid boot config, signature_status %d otp_signature_err %d\n",
1052 			signature_status, otp_signature_err);
1053 		return -ETIME;
1054 	}
1055 
1056 	wil_dbg_misc(wil,
1057 		     "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
1058 		     delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
1059 
1060 	if (wil->boot_config == WIL_BOOT_VANILLA)
1061 		/* Assuming not SPI boot (currently not supported) */
1062 		goto out;
1063 
1064 	hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
1065 	delay = 0;
1066 
1067 	while (!hw_section_done) {
1068 		msleep(RST_DELAY);
1069 
1070 		otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
1071 		hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
1072 
1073 		if (delay++ > RST_COUNT) {
1074 			wil_err(wil, "TO waiting for hw_section_done\n");
1075 			return -ETIME;
1076 		}
1077 	}
1078 
1079 	wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
1080 
1081 	otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
1082 	wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
1083 	wil_dbg_misc(wil, "secured boot is %sabled\n",
1084 		     wil->secured_boot ? "en" : "dis");
1085 
1086 out:
1087 	wil_dbg_misc(wil, "Reset completed\n");
1088 
1089 	return 0;
1090 }
1091 
1092 static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
1093 {
1094 	u32 x;
1095 	int rc;
1096 
1097 	wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
1098 
1099 	if (wil->hw_version < HW_VER_TALYN) {
1100 		/* Clear MAC link up */
1101 		wil_s(wil, RGF_HP_CTRL, BIT(15));
1102 		wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0,
1103 		      BIT_HPAL_PERST_FROM_PAD);
1104 		wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
1105 	}
1106 
1107 	wil_halt_cpu(wil);
1108 
1109 	if (!no_flash) {
1110 		/* clear all boot loader "ready" bits */
1111 		wil_w(wil, RGF_USER_BL +
1112 		      offsetof(struct bl_dedicated_registers_v0,
1113 			       boot_loader_ready), 0);
1114 		/* this should be safe to write even with old BLs */
1115 		wil_w(wil, RGF_USER_BL +
1116 		      offsetof(struct bl_dedicated_registers_v1,
1117 			       bl_shutdown_handshake), 0);
1118 	}
1119 	/* Clear Fw Download notification */
1120 	wil_c(wil, RGF_USER_USAGE_6, BIT(0));
1121 
1122 	wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
1123 	/* XTAL stabilization should take about 3ms */
1124 	usleep_range(5000, 7000);
1125 	x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
1126 	if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
1127 		wil_err(wil, "Xtal stabilization timeout\n"
1128 			"RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
1129 		return -ETIME;
1130 	}
1131 	/* switch 10k to XTAL*/
1132 	wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
1133 	/* 40 MHz */
1134 	wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
1135 
1136 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
1137 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
1138 
1139 	if (wil->hw_version >= HW_VER_TALYN_MB) {
1140 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
1141 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1142 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
1143 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1144 	} else {
1145 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
1146 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1147 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
1148 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1149 	}
1150 
1151 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
1152 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
1153 
1154 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
1155 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
1156 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
1157 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1158 
1159 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
1160 	/* reset A2 PCIE AHB */
1161 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
1162 
1163 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1164 
1165 	if (wil->hw_version == HW_VER_TALYN_MB)
1166 		rc = wil_wait_device_ready_talyn_mb(wil);
1167 	else
1168 		rc = wil_wait_device_ready(wil, no_flash);
1169 	if (rc)
1170 		return rc;
1171 
1172 	wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
1173 
1174 	/* enable fix for HW bug related to the SA/DA swap in AP Rx */
1175 	wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
1176 	      BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
1177 
1178 	if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
1179 		/* Reset OTP HW vectors to fit 40MHz */
1180 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
1181 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
1182 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
1183 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
1184 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
1185 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
1186 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
1187 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
1188 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
1189 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
1190 		wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
1191 	}
1192 
1193 	return 0;
1194 }
1195 
1196 static void wil_collect_fw_info(struct wil6210_priv *wil)
1197 {
1198 	struct wiphy *wiphy = wil_to_wiphy(wil);
1199 	u8 retry_short;
1200 	int rc;
1201 
1202 	wil_refresh_fw_capabilities(wil);
1203 
1204 	rc = wmi_get_mgmt_retry(wil, &retry_short);
1205 	if (!rc) {
1206 		wiphy->retry_short = retry_short;
1207 		wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
1208 	}
1209 }
1210 
1211 void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
1212 {
1213 	struct wiphy *wiphy = wil_to_wiphy(wil);
1214 	int features;
1215 
1216 	wil->keep_radio_on_during_sleep =
1217 		test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
1218 			 wil->platform_capa) &&
1219 		test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
1220 
1221 	wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
1222 		 wil->keep_radio_on_during_sleep);
1223 
1224 	if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
1225 		wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
1226 	else
1227 		wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
1228 
1229 	if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
1230 		wiphy->max_sched_scan_reqs = 1;
1231 		wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
1232 		wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
1233 		wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
1234 		wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
1235 	}
1236 
1237 	if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
1238 		wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
1239 
1240 	if (wil->platform_ops.set_features) {
1241 		features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
1242 				     wil->fw_capabilities) &&
1243 			    test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
1244 				     wil->platform_capa)) ?
1245 			BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
1246 
1247 		if (wil->n_msi == 3)
1248 			features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
1249 
1250 		wil->platform_ops.set_features(wil->platform_handle, features);
1251 	}
1252 
1253 	if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
1254 		     wil->fw_capabilities)) {
1255 		wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
1256 		wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
1257 	} else {
1258 		wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
1259 		wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
1260 	}
1261 
1262 	update_supported_bands(wil);
1263 }
1264 
1265 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
1266 {
1267 	le32_to_cpus(&r->base);
1268 	le16_to_cpus(&r->entry_size);
1269 	le16_to_cpus(&r->size);
1270 	le32_to_cpus(&r->tail);
1271 	le32_to_cpus(&r->head);
1272 }
1273 
1274 /* construct actual board file name to use */
1275 void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
1276 {
1277 	const char *board_file;
1278 	const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
1279 			      WIL_FW_NAME_TALYN;
1280 
1281 	if (wil->board_file) {
1282 		board_file = wil->board_file;
1283 	} else {
1284 		/* If specific FW file is used for Talyn,
1285 		 * use specific board file
1286 		 */
1287 		if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
1288 			board_file = WIL_BRD_NAME_TALYN;
1289 		else
1290 			board_file = WIL_BOARD_FILE_NAME;
1291 	}
1292 
1293 	strlcpy(buf, board_file, len);
1294 }
1295 
1296 static int wil_get_bl_info(struct wil6210_priv *wil)
1297 {
1298 	struct net_device *ndev = wil->main_ndev;
1299 	struct wiphy *wiphy = wil_to_wiphy(wil);
1300 	union {
1301 		struct bl_dedicated_registers_v0 bl0;
1302 		struct bl_dedicated_registers_v1 bl1;
1303 	} bl;
1304 	u32 bl_ver;
1305 	u8 *mac;
1306 	u16 rf_status;
1307 
1308 	wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
1309 			     sizeof(bl));
1310 	bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
1311 	mac = bl.bl0.mac_address;
1312 
1313 	if (bl_ver == 0) {
1314 		le32_to_cpus(&bl.bl0.rf_type);
1315 		le32_to_cpus(&bl.bl0.baseband_type);
1316 		rf_status = 0; /* actually, unknown */
1317 		wil_info(wil,
1318 			 "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
1319 			 bl_ver, mac,
1320 			 bl.bl0.rf_type, bl.bl0.baseband_type);
1321 		wil_info(wil, "Boot Loader build unknown for struct v0\n");
1322 	} else {
1323 		le16_to_cpus(&bl.bl1.rf_type);
1324 		rf_status = le16_to_cpu(bl.bl1.rf_status);
1325 		le32_to_cpus(&bl.bl1.baseband_type);
1326 		le16_to_cpus(&bl.bl1.bl_version_subminor);
1327 		le16_to_cpus(&bl.bl1.bl_version_build);
1328 		wil_info(wil,
1329 			 "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
1330 			 bl_ver, mac,
1331 			 bl.bl1.rf_type, rf_status,
1332 			 bl.bl1.baseband_type);
1333 		wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
1334 			 bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
1335 			 bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
1336 	}
1337 
1338 	if (!is_valid_ether_addr(mac)) {
1339 		wil_err(wil, "BL: Invalid MAC %pM\n", mac);
1340 		return -EINVAL;
1341 	}
1342 
1343 	ether_addr_copy(ndev->perm_addr, mac);
1344 	ether_addr_copy(wiphy->perm_addr, mac);
1345 	if (!is_valid_ether_addr(ndev->dev_addr))
1346 		ether_addr_copy(ndev->dev_addr, mac);
1347 
1348 	if (rf_status) {/* bad RF cable? */
1349 		wil_err(wil, "RF communication error 0x%04x",
1350 			rf_status);
1351 		return -EAGAIN;
1352 	}
1353 
1354 	return 0;
1355 }
1356 
1357 static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
1358 {
1359 	u32 bl_assert_code, bl_assert_blink, bl_magic_number;
1360 	u32 bl_ver = wil_r(wil, RGF_USER_BL +
1361 			   offsetof(struct bl_dedicated_registers_v0,
1362 				    boot_loader_struct_version));
1363 
1364 	if (bl_ver < 2)
1365 		return;
1366 
1367 	bl_assert_code = wil_r(wil, RGF_USER_BL +
1368 			       offsetof(struct bl_dedicated_registers_v1,
1369 					bl_assert_code));
1370 	bl_assert_blink = wil_r(wil, RGF_USER_BL +
1371 				offsetof(struct bl_dedicated_registers_v1,
1372 					 bl_assert_blink));
1373 	bl_magic_number = wil_r(wil, RGF_USER_BL +
1374 				offsetof(struct bl_dedicated_registers_v1,
1375 					 bl_magic_number));
1376 
1377 	if (is_err) {
1378 		wil_err(wil,
1379 			"BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1380 			bl_assert_code, bl_assert_blink, bl_magic_number);
1381 	} else {
1382 		wil_dbg_misc(wil,
1383 			     "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1384 			     bl_assert_code, bl_assert_blink, bl_magic_number);
1385 	}
1386 }
1387 
1388 static int wil_get_otp_info(struct wil6210_priv *wil)
1389 {
1390 	struct net_device *ndev = wil->main_ndev;
1391 	struct wiphy *wiphy = wil_to_wiphy(wil);
1392 	u8 mac[8];
1393 	int mac_addr;
1394 
1395 	if (wil->hw_version >= HW_VER_TALYN_MB)
1396 		mac_addr = RGF_OTP_MAC_TALYN_MB;
1397 	else
1398 		mac_addr = RGF_OTP_MAC;
1399 
1400 	wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
1401 			     sizeof(mac));
1402 	if (!is_valid_ether_addr(mac)) {
1403 		wil_err(wil, "Invalid MAC %pM\n", mac);
1404 		return -EINVAL;
1405 	}
1406 
1407 	ether_addr_copy(ndev->perm_addr, mac);
1408 	ether_addr_copy(wiphy->perm_addr, mac);
1409 	if (!is_valid_ether_addr(ndev->dev_addr))
1410 		ether_addr_copy(ndev->dev_addr, mac);
1411 
1412 	return 0;
1413 }
1414 
1415 static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
1416 {
1417 	ulong to = msecs_to_jiffies(2000);
1418 	ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
1419 
1420 	if (0 == left) {
1421 		wil_err(wil, "Firmware not ready\n");
1422 		return -ETIME;
1423 	} else {
1424 		wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
1425 			 jiffies_to_msecs(to-left), wil->hw_version);
1426 	}
1427 	return 0;
1428 }
1429 
1430 void wil_abort_scan(struct wil6210_vif *vif, bool sync)
1431 {
1432 	struct wil6210_priv *wil = vif_to_wil(vif);
1433 	int rc;
1434 	struct cfg80211_scan_info info = {
1435 		.aborted = true,
1436 	};
1437 
1438 	lockdep_assert_held(&wil->vif_mutex);
1439 
1440 	if (!vif->scan_request)
1441 		return;
1442 
1443 	wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
1444 	del_timer_sync(&vif->scan_timer);
1445 	mutex_unlock(&wil->vif_mutex);
1446 	rc = wmi_abort_scan(vif);
1447 	if (!rc && sync)
1448 		wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
1449 						 msecs_to_jiffies(
1450 						 WAIT_FOR_SCAN_ABORT_MS));
1451 
1452 	mutex_lock(&wil->vif_mutex);
1453 	if (vif->scan_request) {
1454 		cfg80211_scan_done(vif->scan_request, &info);
1455 		vif->scan_request = NULL;
1456 	}
1457 }
1458 
1459 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
1460 {
1461 	int i;
1462 
1463 	lockdep_assert_held(&wil->vif_mutex);
1464 
1465 	for (i = 0; i < wil->max_vifs; i++) {
1466 		struct wil6210_vif *vif = wil->vifs[i];
1467 
1468 		if (vif)
1469 			wil_abort_scan(vif, sync);
1470 	}
1471 }
1472 
1473 int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
1474 {
1475 	int rc;
1476 
1477 	if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
1478 		wil_err(wil, "set_power_mgmt not supported\n");
1479 		return -EOPNOTSUPP;
1480 	}
1481 
1482 	rc  = wmi_ps_dev_profile_cfg(wil, ps_profile);
1483 	if (rc)
1484 		wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
1485 	else
1486 		wil->ps_profile = ps_profile;
1487 
1488 	return rc;
1489 }
1490 
1491 static void wil_pre_fw_config(struct wil6210_priv *wil)
1492 {
1493 	/* Mark FW as loaded from host */
1494 	wil_s(wil, RGF_USER_USAGE_6, 1);
1495 
1496 	/* clear any interrupts which on-card-firmware
1497 	 * may have set
1498 	 */
1499 	wil6210_clear_irq(wil);
1500 	/* CAF_ICR - clear and mask */
1501 	/* it is W1C, clear by writing back same value */
1502 	wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
1503 	wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
1504 	/* clear PAL_UNIT_ICR (potential D0->D3 leftover)
1505 	 * In Talyn-MB host cannot access this register due to
1506 	 * access control, hence PAL_UNIT_ICR is cleared by the FW
1507 	 */
1508 	if (wil->hw_version < HW_VER_TALYN_MB)
1509 		wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
1510 		      0);
1511 
1512 	if (wil->fw_calib_result > 0) {
1513 		__le32 val = cpu_to_le32(wil->fw_calib_result |
1514 						(CALIB_RESULT_SIGNATURE << 8));
1515 		wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
1516 	}
1517 }
1518 
1519 static int wil_restore_vifs(struct wil6210_priv *wil)
1520 {
1521 	struct wil6210_vif *vif;
1522 	struct net_device *ndev;
1523 	struct wireless_dev *wdev;
1524 	int i, rc;
1525 
1526 	for (i = 0; i < wil->max_vifs; i++) {
1527 		vif = wil->vifs[i];
1528 		if (!vif)
1529 			continue;
1530 		vif->ap_isolate = 0;
1531 		if (vif->mid) {
1532 			ndev = vif_to_ndev(vif);
1533 			wdev = vif_to_wdev(vif);
1534 			rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
1535 					       wdev->iftype);
1536 			if (rc) {
1537 				wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
1538 					i, wdev->iftype, rc);
1539 				return rc;
1540 			}
1541 		}
1542 	}
1543 
1544 	return 0;
1545 }
1546 
1547 /*
1548  * We reset all the structures, and we reset the UMAC.
1549  * After calling this routine, you're expected to reload
1550  * the firmware.
1551  */
1552 int wil_reset(struct wil6210_priv *wil, bool load_fw)
1553 {
1554 	int rc, i;
1555 	unsigned long status_flags = BIT(wil_status_resetting);
1556 	int no_flash;
1557 	struct wil6210_vif *vif;
1558 
1559 	wil_dbg_misc(wil, "reset\n");
1560 
1561 	WARN_ON(!mutex_is_locked(&wil->mutex));
1562 	WARN_ON(test_bit(wil_status_napi_en, wil->status));
1563 
1564 	if (debug_fw) {
1565 		static const u8 mac[ETH_ALEN] = {
1566 			0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
1567 		};
1568 		struct net_device *ndev = wil->main_ndev;
1569 
1570 		ether_addr_copy(ndev->perm_addr, mac);
1571 		ether_addr_copy(ndev->dev_addr, ndev->perm_addr);
1572 		return 0;
1573 	}
1574 
1575 	if (wil->hw_version == HW_VER_UNKNOWN)
1576 		return -ENODEV;
1577 
1578 	if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa)) {
1579 		wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
1580 		wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
1581 	}
1582 
1583 	if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
1584 		wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
1585 		wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
1586 	}
1587 
1588 	if (wil->platform_ops.notify) {
1589 		rc = wil->platform_ops.notify(wil->platform_handle,
1590 					      WIL_PLATFORM_EVT_PRE_RESET);
1591 		if (rc)
1592 			wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
1593 				rc);
1594 	}
1595 
1596 	set_bit(wil_status_resetting, wil->status);
1597 	if (test_bit(wil_status_collecting_dumps, wil->status)) {
1598 		/* Device collects crash dump, cancel the reset.
1599 		 * following crash dump collection, reset would take place.
1600 		 */
1601 		wil_dbg_misc(wil, "reject reset while collecting crash dump\n");
1602 		rc = -EBUSY;
1603 		goto out;
1604 	}
1605 
1606 	mutex_lock(&wil->vif_mutex);
1607 	wil_abort_scan_all_vifs(wil, false);
1608 	mutex_unlock(&wil->vif_mutex);
1609 
1610 	for (i = 0; i < wil->max_vifs; i++) {
1611 		vif = wil->vifs[i];
1612 		if (vif) {
1613 			cancel_work_sync(&vif->disconnect_worker);
1614 			wil6210_disconnect(vif, NULL,
1615 					   WLAN_REASON_DEAUTH_LEAVING);
1616 		}
1617 	}
1618 	wil_bcast_fini_all(wil);
1619 
1620 	/* Disable device led before reset*/
1621 	wmi_led_cfg(wil, false);
1622 
1623 	/* prevent NAPI from being scheduled and prevent wmi commands */
1624 	mutex_lock(&wil->wmi_mutex);
1625 	if (test_bit(wil_status_suspending, wil->status))
1626 		status_flags |= BIT(wil_status_suspending);
1627 	bitmap_and(wil->status, wil->status, &status_flags,
1628 		   wil_status_last);
1629 	wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
1630 	mutex_unlock(&wil->wmi_mutex);
1631 
1632 	wil_mask_irq(wil);
1633 
1634 	wmi_event_flush(wil);
1635 
1636 	flush_workqueue(wil->wq_service);
1637 	flush_workqueue(wil->wmi_wq);
1638 
1639 	no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
1640 	if (!no_flash)
1641 		wil_bl_crash_info(wil, false);
1642 	wil_disable_irq(wil);
1643 	rc = wil_target_reset(wil, no_flash);
1644 	wil6210_clear_irq(wil);
1645 	wil_enable_irq(wil);
1646 	wil->txrx_ops.rx_fini(wil);
1647 	wil->txrx_ops.tx_fini(wil);
1648 	if (rc) {
1649 		if (!no_flash)
1650 			wil_bl_crash_info(wil, true);
1651 		goto out;
1652 	}
1653 
1654 	if (no_flash) {
1655 		rc = wil_get_otp_info(wil);
1656 	} else {
1657 		rc = wil_get_bl_info(wil);
1658 		if (rc == -EAGAIN && !load_fw)
1659 			/* ignore RF error if not going up */
1660 			rc = 0;
1661 	}
1662 	if (rc)
1663 		goto out;
1664 
1665 	wil_set_oob_mode(wil, oob_mode);
1666 	if (load_fw) {
1667 		char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
1668 
1669 		if  (wil->secured_boot) {
1670 			wil_err(wil, "secured boot is not supported\n");
1671 			return -ENOTSUPP;
1672 		}
1673 
1674 		board_file[0] = '\0';
1675 		wil_get_board_file(wil, board_file, sizeof(board_file));
1676 		wil_info(wil, "Use firmware <%s> + board <%s>\n",
1677 			 wil->wil_fw_name, board_file);
1678 
1679 		if (!no_flash)
1680 			wil_bl_prepare_halt(wil);
1681 
1682 		wil_halt_cpu(wil);
1683 		memset(wil->fw_version, 0, sizeof(wil->fw_version));
1684 		/* Loading f/w from the file */
1685 		rc = wil_request_firmware(wil, wil->wil_fw_name, true);
1686 		if (rc)
1687 			goto out;
1688 		if (wil->brd_file_addr)
1689 			rc = wil_request_board(wil, board_file);
1690 		else
1691 			rc = wil_request_firmware(wil, board_file, true);
1692 		if (rc)
1693 			goto out;
1694 
1695 		wil_pre_fw_config(wil);
1696 		wil_release_cpu(wil);
1697 	}
1698 
1699 	/* init after reset */
1700 	reinit_completion(&wil->wmi_ready);
1701 	reinit_completion(&wil->wmi_call);
1702 	reinit_completion(&wil->halp.comp);
1703 
1704 	clear_bit(wil_status_resetting, wil->status);
1705 
1706 	if (load_fw) {
1707 		wil_unmask_irq(wil);
1708 
1709 		/* we just started MAC, wait for FW ready */
1710 		rc = wil_wait_for_fw_ready(wil);
1711 		if (rc)
1712 			return rc;
1713 
1714 		/* check FW is responsive */
1715 		rc = wmi_echo(wil);
1716 		if (rc) {
1717 			wil_err(wil, "wmi_echo failed, rc %d\n", rc);
1718 			return rc;
1719 		}
1720 
1721 		wil->txrx_ops.configure_interrupt_moderation(wil);
1722 
1723 		/* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
1724 		 * while there is back-pressure from Host during RX
1725 		 */
1726 		if (wil->hw_version >= HW_VER_TALYN_MB)
1727 			wil_s(wil, RGF_DMA_MISC_CTL,
1728 			      BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
1729 
1730 		rc = wil_restore_vifs(wil);
1731 		if (rc) {
1732 			wil_err(wil, "failed to restore vifs, rc %d\n", rc);
1733 			return rc;
1734 		}
1735 
1736 		wil_collect_fw_info(wil);
1737 
1738 		if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
1739 			wil_ps_update(wil, wil->ps_profile);
1740 
1741 		if (wil->platform_ops.notify) {
1742 			rc = wil->platform_ops.notify(wil->platform_handle,
1743 						      WIL_PLATFORM_EVT_FW_RDY);
1744 			if (rc) {
1745 				wil_err(wil, "FW_RDY notify failed, rc %d\n",
1746 					rc);
1747 				rc = 0;
1748 			}
1749 		}
1750 	}
1751 
1752 	return rc;
1753 
1754 out:
1755 	clear_bit(wil_status_resetting, wil->status);
1756 	return rc;
1757 }
1758 
1759 void wil_fw_error_recovery(struct wil6210_priv *wil)
1760 {
1761 	wil_dbg_misc(wil, "starting fw error recovery\n");
1762 
1763 	if (test_bit(wil_status_resetting, wil->status)) {
1764 		wil_info(wil, "Reset already in progress\n");
1765 		return;
1766 	}
1767 
1768 	wil->recovery_state = fw_recovery_pending;
1769 	schedule_work(&wil->fw_error_worker);
1770 }
1771 
1772 int __wil_up(struct wil6210_priv *wil)
1773 {
1774 	struct net_device *ndev = wil->main_ndev;
1775 	struct wireless_dev *wdev = ndev->ieee80211_ptr;
1776 	int rc;
1777 
1778 	WARN_ON(!mutex_is_locked(&wil->mutex));
1779 
1780 	rc = wil_reset(wil, true);
1781 	if (rc)
1782 		return rc;
1783 
1784 	/* Rx RING. After MAC and beacon */
1785 	if (rx_ring_order == 0)
1786 		rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ?
1787 			WIL_RX_RING_SIZE_ORDER_DEFAULT :
1788 			WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT;
1789 
1790 	rc = wil->txrx_ops.rx_init(wil, rx_ring_order);
1791 	if (rc)
1792 		return rc;
1793 
1794 	rc = wil->txrx_ops.tx_init(wil);
1795 	if (rc)
1796 		return rc;
1797 
1798 	switch (wdev->iftype) {
1799 	case NL80211_IFTYPE_STATION:
1800 		wil_dbg_misc(wil, "type: STATION\n");
1801 		ndev->type = ARPHRD_ETHER;
1802 		break;
1803 	case NL80211_IFTYPE_AP:
1804 		wil_dbg_misc(wil, "type: AP\n");
1805 		ndev->type = ARPHRD_ETHER;
1806 		break;
1807 	case NL80211_IFTYPE_P2P_CLIENT:
1808 		wil_dbg_misc(wil, "type: P2P_CLIENT\n");
1809 		ndev->type = ARPHRD_ETHER;
1810 		break;
1811 	case NL80211_IFTYPE_P2P_GO:
1812 		wil_dbg_misc(wil, "type: P2P_GO\n");
1813 		ndev->type = ARPHRD_ETHER;
1814 		break;
1815 	case NL80211_IFTYPE_MONITOR:
1816 		wil_dbg_misc(wil, "type: Monitor\n");
1817 		ndev->type = ARPHRD_IEEE80211_RADIOTAP;
1818 		/* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
1819 		break;
1820 	default:
1821 		return -EOPNOTSUPP;
1822 	}
1823 
1824 	/* MAC address - pre-requisite for other commands */
1825 	wmi_set_mac_address(wil, ndev->dev_addr);
1826 
1827 	wil_dbg_misc(wil, "NAPI enable\n");
1828 	napi_enable(&wil->napi_rx);
1829 	napi_enable(&wil->napi_tx);
1830 	set_bit(wil_status_napi_en, wil->status);
1831 
1832 	wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
1833 
1834 	return 0;
1835 }
1836 
1837 int wil_up(struct wil6210_priv *wil)
1838 {
1839 	int rc;
1840 
1841 	wil_dbg_misc(wil, "up\n");
1842 
1843 	mutex_lock(&wil->mutex);
1844 	rc = __wil_up(wil);
1845 	mutex_unlock(&wil->mutex);
1846 
1847 	return rc;
1848 }
1849 
1850 int __wil_down(struct wil6210_priv *wil)
1851 {
1852 	WARN_ON(!mutex_is_locked(&wil->mutex));
1853 
1854 	set_bit(wil_status_resetting, wil->status);
1855 
1856 	wil6210_bus_request(wil, 0);
1857 
1858 	wil_disable_irq(wil);
1859 	if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
1860 		napi_disable(&wil->napi_rx);
1861 		napi_disable(&wil->napi_tx);
1862 		wil_dbg_misc(wil, "NAPI disable\n");
1863 	}
1864 	wil_enable_irq(wil);
1865 
1866 	mutex_lock(&wil->vif_mutex);
1867 	wil_p2p_stop_radio_operations(wil);
1868 	wil_abort_scan_all_vifs(wil, false);
1869 	mutex_unlock(&wil->vif_mutex);
1870 
1871 	return wil_reset(wil, false);
1872 }
1873 
1874 int wil_down(struct wil6210_priv *wil)
1875 {
1876 	int rc;
1877 
1878 	wil_dbg_misc(wil, "down\n");
1879 
1880 	wil_set_recovery_state(wil, fw_recovery_idle);
1881 	mutex_lock(&wil->mutex);
1882 	rc = __wil_down(wil);
1883 	mutex_unlock(&wil->mutex);
1884 
1885 	return rc;
1886 }
1887 
1888 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
1889 {
1890 	int i;
1891 	int rc = -ENOENT;
1892 
1893 	for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
1894 		if (wil->sta[i].mid == mid &&
1895 		    wil->sta[i].status != wil_sta_unused &&
1896 		    ether_addr_equal(wil->sta[i].addr, mac)) {
1897 			rc = i;
1898 			break;
1899 		}
1900 	}
1901 
1902 	return rc;
1903 }
1904 
1905 void wil_halp_vote(struct wil6210_priv *wil)
1906 {
1907 	unsigned long rc;
1908 	unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
1909 
1910 	mutex_lock(&wil->halp.lock);
1911 
1912 	wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
1913 		    wil->halp.ref_cnt);
1914 
1915 	if (++wil->halp.ref_cnt == 1) {
1916 		reinit_completion(&wil->halp.comp);
1917 		wil6210_set_halp(wil);
1918 		rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
1919 		if (!rc) {
1920 			wil_err(wil, "HALP vote timed out\n");
1921 			/* Mask HALP as done in case the interrupt is raised */
1922 			wil6210_mask_halp(wil);
1923 		} else {
1924 			wil_dbg_irq(wil,
1925 				    "halp_vote: HALP vote completed after %d ms\n",
1926 				    jiffies_to_msecs(to_jiffies - rc));
1927 		}
1928 	}
1929 
1930 	wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
1931 		    wil->halp.ref_cnt);
1932 
1933 	mutex_unlock(&wil->halp.lock);
1934 }
1935 
1936 void wil_halp_unvote(struct wil6210_priv *wil)
1937 {
1938 	WARN_ON(wil->halp.ref_cnt == 0);
1939 
1940 	mutex_lock(&wil->halp.lock);
1941 
1942 	wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
1943 		    wil->halp.ref_cnt);
1944 
1945 	if (--wil->halp.ref_cnt == 0) {
1946 		wil6210_clear_halp(wil);
1947 		wil_dbg_irq(wil, "HALP unvote\n");
1948 	}
1949 
1950 	wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
1951 		    wil->halp.ref_cnt);
1952 
1953 	mutex_unlock(&wil->halp.lock);
1954 }
1955 
1956 void wil_init_txrx_ops(struct wil6210_priv *wil)
1957 {
1958 	if (wil->use_enhanced_dma_hw)
1959 		wil_init_txrx_ops_edma(wil);
1960 	else
1961 		wil_init_txrx_ops_legacy_dma(wil);
1962 }
1963