1 /* 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <linux/if_arp.h> 20 #include <linux/etherdevice.h> 21 #include <linux/rtnetlink.h> 22 23 #include "wil6210.h" 24 #include "txrx.h" 25 #include "txrx_edma.h" 26 #include "wmi.h" 27 #include "boot_loader.h" 28 29 #define WAIT_FOR_HALP_VOTE_MS 100 30 #define WAIT_FOR_SCAN_ABORT_MS 1000 31 #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1 32 #define WIL_BOARD_FILE_MAX_NAMELEN 128 33 34 bool debug_fw; /* = false; */ 35 module_param(debug_fw, bool, 0444); 36 MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug"); 37 38 static u8 oob_mode; 39 module_param(oob_mode, byte, 0444); 40 MODULE_PARM_DESC(oob_mode, 41 " enable out of the box (OOB) mode in FW, for diagnostics and certification"); 42 43 bool no_fw_recovery; 44 module_param(no_fw_recovery, bool, 0644); 45 MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery"); 46 47 /* if not set via modparam, will be set to default value of 1/8 of 48 * rx ring size during init flow 49 */ 50 unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT; 51 module_param(rx_ring_overflow_thrsh, ushort, 0444); 52 MODULE_PARM_DESC(rx_ring_overflow_thrsh, 53 " RX ring overflow threshold in descriptors."); 54 55 /* We allow allocation of more than 1 page buffers to support large packets. 56 * It is suboptimal behavior performance wise in case MTU above page size. 57 */ 58 unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD; 59 static int mtu_max_set(const char *val, const struct kernel_param *kp) 60 { 61 int ret; 62 63 /* sets mtu_max directly. no need to restore it in case of 64 * illegal value since we assume this will fail insmod 65 */ 66 ret = param_set_uint(val, kp); 67 if (ret) 68 return ret; 69 70 if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU) 71 ret = -EINVAL; 72 73 return ret; 74 } 75 76 static const struct kernel_param_ops mtu_max_ops = { 77 .set = mtu_max_set, 78 .get = param_get_uint, 79 }; 80 81 module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444); 82 MODULE_PARM_DESC(mtu_max, " Max MTU value."); 83 84 static uint rx_ring_order; 85 static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT; 86 static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT; 87 88 static int ring_order_set(const char *val, const struct kernel_param *kp) 89 { 90 int ret; 91 uint x; 92 93 ret = kstrtouint(val, 0, &x); 94 if (ret) 95 return ret; 96 97 if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX)) 98 return -EINVAL; 99 100 *((uint *)kp->arg) = x; 101 102 return 0; 103 } 104 105 static const struct kernel_param_ops ring_order_ops = { 106 .set = ring_order_set, 107 .get = param_get_uint, 108 }; 109 110 module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444); 111 MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order"); 112 module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444); 113 MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order"); 114 module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444); 115 MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order"); 116 117 enum { 118 WIL_BOOT_ERR, 119 WIL_BOOT_VANILLA, 120 WIL_BOOT_PRODUCTION, 121 WIL_BOOT_DEVELOPMENT, 122 }; 123 124 enum { 125 WIL_SIG_STATUS_VANILLA = 0x0, 126 WIL_SIG_STATUS_DEVELOPMENT = 0x1, 127 WIL_SIG_STATUS_PRODUCTION = 0x2, 128 WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3, 129 }; 130 131 #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */ 132 #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */ 133 134 #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */ 135 136 #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */ 137 /* round up to be above 2 ms total */ 138 #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY) 139 140 /* 141 * Due to a hardware issue, 142 * one has to read/write to/from NIC in 32-bit chunks; 143 * regular memcpy_fromio and siblings will 144 * not work on 64-bit platform - it uses 64-bit transactions 145 * 146 * Force 32-bit transactions to enable NIC on 64-bit platforms 147 * 148 * To avoid byte swap on big endian host, __raw_{read|write}l 149 * should be used - {read|write}l would swap bytes to provide 150 * little endian on PCI value in host endianness. 151 */ 152 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 153 size_t count) 154 { 155 u32 *d = dst; 156 const volatile u32 __iomem *s = src; 157 158 for (; count >= 4; count -= 4) 159 *d++ = __raw_readl(s++); 160 161 if (unlikely(count)) { 162 /* count can be 1..3 */ 163 u32 tmp = __raw_readl(s); 164 165 memcpy(d, &tmp, count); 166 } 167 } 168 169 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 170 size_t count) 171 { 172 volatile u32 __iomem *d = dst; 173 const u32 *s = src; 174 175 for (; count >= 4; count -= 4) 176 __raw_writel(*s++, d++); 177 178 if (unlikely(count)) { 179 /* count can be 1..3 */ 180 u32 tmp = 0; 181 182 memcpy(&tmp, s, count); 183 __raw_writel(tmp, d); 184 } 185 } 186 187 /* Device memory access is prohibited while reset or suspend. 188 * wil_mem_access_lock protects accessing device memory in these cases 189 */ 190 int wil_mem_access_lock(struct wil6210_priv *wil) 191 { 192 if (!down_read_trylock(&wil->mem_lock)) 193 return -EBUSY; 194 195 if (test_bit(wil_status_suspending, wil->status) || 196 test_bit(wil_status_suspended, wil->status)) { 197 up_read(&wil->mem_lock); 198 return -EBUSY; 199 } 200 201 return 0; 202 } 203 204 void wil_mem_access_unlock(struct wil6210_priv *wil) 205 { 206 up_read(&wil->mem_lock); 207 } 208 209 static void wil_ring_fini_tx(struct wil6210_priv *wil, int id) 210 { 211 struct wil_ring *ring = &wil->ring_tx[id]; 212 struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id]; 213 214 lockdep_assert_held(&wil->mutex); 215 216 if (!ring->va) 217 return; 218 219 wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id); 220 221 spin_lock_bh(&txdata->lock); 222 txdata->dot1x_open = false; 223 txdata->mid = U8_MAX; 224 txdata->enabled = 0; /* no Tx can be in progress or start anew */ 225 spin_unlock_bh(&txdata->lock); 226 /* napi_synchronize waits for completion of the current NAPI but will 227 * not prevent the next NAPI run. 228 * Add a memory barrier to guarantee that txdata->enabled is zeroed 229 * before napi_synchronize so that the next scheduled NAPI will not 230 * handle this vring 231 */ 232 wmb(); 233 /* make sure NAPI won't touch this vring */ 234 if (test_bit(wil_status_napi_en, wil->status)) 235 napi_synchronize(&wil->napi_tx); 236 237 wil->txrx_ops.ring_fini_tx(wil, ring); 238 } 239 240 static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid) 241 { 242 int i; 243 244 for (i = 0; i < max_assoc_sta; i++) { 245 if (wil->sta[i].mid == mid && 246 wil->sta[i].status == wil_sta_connected) 247 return true; 248 } 249 250 return false; 251 } 252 253 static void wil_disconnect_cid_complete(struct wil6210_vif *vif, int cid, 254 u16 reason_code) 255 __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock) 256 { 257 uint i; 258 struct wil6210_priv *wil = vif_to_wil(vif); 259 struct net_device *ndev = vif_to_ndev(vif); 260 struct wireless_dev *wdev = vif_to_wdev(vif); 261 struct wil_sta_info *sta = &wil->sta[cid]; 262 int min_ring_id = wil_get_min_tx_ring_id(wil); 263 264 might_sleep(); 265 wil_dbg_misc(wil, 266 "disconnect_cid_complete: CID %d, MID %d, status %d\n", 267 cid, sta->mid, sta->status); 268 /* inform upper layers */ 269 if (sta->status != wil_sta_unused) { 270 if (vif->mid != sta->mid) { 271 wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", 272 vif->mid); 273 } 274 275 switch (wdev->iftype) { 276 case NL80211_IFTYPE_AP: 277 case NL80211_IFTYPE_P2P_GO: 278 /* AP-like interface */ 279 cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL); 280 break; 281 default: 282 break; 283 } 284 sta->status = wil_sta_unused; 285 sta->mid = U8_MAX; 286 } 287 /* reorder buffers */ 288 for (i = 0; i < WIL_STA_TID_NUM; i++) { 289 struct wil_tid_ampdu_rx *r; 290 291 spin_lock_bh(&sta->tid_rx_lock); 292 293 r = sta->tid_rx[i]; 294 sta->tid_rx[i] = NULL; 295 wil_tid_ampdu_rx_free(wil, r); 296 297 spin_unlock_bh(&sta->tid_rx_lock); 298 } 299 /* crypto context */ 300 memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx)); 301 memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx)); 302 /* release vrings */ 303 for (i = min_ring_id; i < ARRAY_SIZE(wil->ring_tx); i++) { 304 if (wil->ring2cid_tid[i][0] == cid) 305 wil_ring_fini_tx(wil, i); 306 } 307 /* statistics */ 308 memset(&sta->stats, 0, sizeof(sta->stats)); 309 sta->stats.tx_latency_min_us = U32_MAX; 310 } 311 312 static void _wil6210_disconnect_complete(struct wil6210_vif *vif, 313 const u8 *bssid, u16 reason_code) 314 { 315 struct wil6210_priv *wil = vif_to_wil(vif); 316 int cid = -ENOENT; 317 struct net_device *ndev; 318 struct wireless_dev *wdev; 319 320 ndev = vif_to_ndev(vif); 321 wdev = vif_to_wdev(vif); 322 323 might_sleep(); 324 wil_info(wil, "disconnect_complete: bssid=%pM, reason=%d\n", 325 bssid, reason_code); 326 327 /* Cases are: 328 * - disconnect single STA, still connected 329 * - disconnect single STA, already disconnected 330 * - disconnect all 331 * 332 * For "disconnect all", there are 3 options: 333 * - bssid == NULL 334 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff) 335 * - bssid is our MAC address 336 */ 337 if (bssid && !is_broadcast_ether_addr(bssid) && 338 !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) { 339 cid = wil_find_cid(wil, vif->mid, bssid); 340 wil_dbg_misc(wil, 341 "Disconnect complete %pM, CID=%d, reason=%d\n", 342 bssid, cid, reason_code); 343 if (cid >= 0) /* disconnect 1 peer */ 344 wil_disconnect_cid_complete(vif, cid, reason_code); 345 } else { /* all */ 346 wil_dbg_misc(wil, "Disconnect complete all\n"); 347 for (cid = 0; cid < max_assoc_sta; cid++) 348 wil_disconnect_cid_complete(vif, cid, reason_code); 349 } 350 351 /* link state */ 352 switch (wdev->iftype) { 353 case NL80211_IFTYPE_STATION: 354 case NL80211_IFTYPE_P2P_CLIENT: 355 wil_bcast_fini(vif); 356 wil_update_net_queues_bh(wil, vif, NULL, true); 357 netif_carrier_off(ndev); 358 if (!wil_has_other_active_ifaces(wil, ndev, false, true)) 359 wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS); 360 361 if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) { 362 atomic_dec(&wil->connected_vifs); 363 cfg80211_disconnected(ndev, reason_code, 364 NULL, 0, 365 vif->locally_generated_disc, 366 GFP_KERNEL); 367 vif->locally_generated_disc = false; 368 } else if (test_bit(wil_vif_fwconnecting, vif->status)) { 369 cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0, 370 WLAN_STATUS_UNSPECIFIED_FAILURE, 371 GFP_KERNEL); 372 vif->bss = NULL; 373 } 374 clear_bit(wil_vif_fwconnecting, vif->status); 375 clear_bit(wil_vif_ft_roam, vif->status); 376 377 break; 378 case NL80211_IFTYPE_AP: 379 case NL80211_IFTYPE_P2P_GO: 380 if (!wil_vif_is_connected(wil, vif->mid)) { 381 wil_update_net_queues_bh(wil, vif, NULL, true); 382 if (test_and_clear_bit(wil_vif_fwconnected, 383 vif->status)) 384 atomic_dec(&wil->connected_vifs); 385 } else { 386 wil_update_net_queues_bh(wil, vif, NULL, false); 387 } 388 break; 389 default: 390 break; 391 } 392 } 393 394 static int wil_disconnect_cid(struct wil6210_vif *vif, int cid, 395 u16 reason_code) 396 { 397 struct wil6210_priv *wil = vif_to_wil(vif); 398 struct wireless_dev *wdev = vif_to_wdev(vif); 399 struct wil_sta_info *sta = &wil->sta[cid]; 400 bool del_sta = false; 401 402 might_sleep(); 403 wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n", 404 cid, sta->mid, sta->status); 405 406 if (sta->status == wil_sta_unused) 407 return 0; 408 409 if (vif->mid != sta->mid) { 410 wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", vif->mid); 411 return -EINVAL; 412 } 413 414 /* inform lower layers */ 415 if (wdev->iftype == NL80211_IFTYPE_AP && disable_ap_sme) 416 del_sta = true; 417 418 /* disconnect by sending command disconnect/del_sta and wait 419 * synchronously for WMI_DISCONNECT_EVENTID event. 420 */ 421 return wmi_disconnect_sta(vif, sta->addr, reason_code, del_sta); 422 } 423 424 static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid, 425 u16 reason_code) 426 { 427 struct wil6210_priv *wil; 428 struct net_device *ndev; 429 int cid = -ENOENT; 430 431 if (unlikely(!vif)) 432 return; 433 434 wil = vif_to_wil(vif); 435 ndev = vif_to_ndev(vif); 436 437 might_sleep(); 438 wil_info(wil, "disconnect bssid=%pM, reason=%d\n", bssid, reason_code); 439 440 /* Cases are: 441 * - disconnect single STA, still connected 442 * - disconnect single STA, already disconnected 443 * - disconnect all 444 * 445 * For "disconnect all", there are 3 options: 446 * - bssid == NULL 447 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff) 448 * - bssid is our MAC address 449 */ 450 if (bssid && !is_broadcast_ether_addr(bssid) && 451 !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) { 452 cid = wil_find_cid(wil, vif->mid, bssid); 453 wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n", 454 bssid, cid, reason_code); 455 if (cid >= 0) /* disconnect 1 peer */ 456 wil_disconnect_cid(vif, cid, reason_code); 457 } else { /* all */ 458 wil_dbg_misc(wil, "Disconnect all\n"); 459 for (cid = 0; cid < max_assoc_sta; cid++) 460 wil_disconnect_cid(vif, cid, reason_code); 461 } 462 463 /* call event handler manually after processing wmi_call, 464 * to avoid deadlock - disconnect event handler acquires 465 * wil->mutex while it is already held here 466 */ 467 _wil6210_disconnect_complete(vif, bssid, reason_code); 468 } 469 470 void wil_disconnect_worker(struct work_struct *work) 471 { 472 struct wil6210_vif *vif = container_of(work, 473 struct wil6210_vif, disconnect_worker); 474 struct wil6210_priv *wil = vif_to_wil(vif); 475 struct net_device *ndev = vif_to_ndev(vif); 476 int rc; 477 struct { 478 struct wmi_cmd_hdr wmi; 479 struct wmi_disconnect_event evt; 480 } __packed reply; 481 482 if (test_bit(wil_vif_fwconnected, vif->status)) 483 /* connect succeeded after all */ 484 return; 485 486 if (!test_bit(wil_vif_fwconnecting, vif->status)) 487 /* already disconnected */ 488 return; 489 490 memset(&reply, 0, sizeof(reply)); 491 492 rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0, 493 WMI_DISCONNECT_EVENTID, &reply, sizeof(reply), 494 WIL6210_DISCONNECT_TO_MS); 495 if (rc) { 496 wil_err(wil, "disconnect error %d\n", rc); 497 return; 498 } 499 500 wil_update_net_queues_bh(wil, vif, NULL, true); 501 netif_carrier_off(ndev); 502 cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0, 503 WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL); 504 clear_bit(wil_vif_fwconnecting, vif->status); 505 } 506 507 static int wil_wait_for_recovery(struct wil6210_priv *wil) 508 { 509 if (wait_event_interruptible(wil->wq, wil->recovery_state != 510 fw_recovery_pending)) { 511 wil_err(wil, "Interrupt, canceling recovery\n"); 512 return -ERESTARTSYS; 513 } 514 if (wil->recovery_state != fw_recovery_running) { 515 wil_info(wil, "Recovery cancelled\n"); 516 return -EINTR; 517 } 518 wil_info(wil, "Proceed with recovery\n"); 519 return 0; 520 } 521 522 void wil_set_recovery_state(struct wil6210_priv *wil, int state) 523 { 524 wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n", 525 wil->recovery_state, state); 526 527 wil->recovery_state = state; 528 wake_up_interruptible(&wil->wq); 529 } 530 531 bool wil_is_recovery_blocked(struct wil6210_priv *wil) 532 { 533 return no_fw_recovery && (wil->recovery_state == fw_recovery_pending); 534 } 535 536 static void wil_fw_error_worker(struct work_struct *work) 537 { 538 struct wil6210_priv *wil = container_of(work, struct wil6210_priv, 539 fw_error_worker); 540 struct net_device *ndev = wil->main_ndev; 541 struct wireless_dev *wdev; 542 543 wil_dbg_misc(wil, "fw error worker\n"); 544 545 if (!ndev || !(ndev->flags & IFF_UP)) { 546 wil_info(wil, "No recovery - interface is down\n"); 547 return; 548 } 549 wdev = ndev->ieee80211_ptr; 550 551 /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO 552 * passed since last recovery attempt 553 */ 554 if (time_is_after_jiffies(wil->last_fw_recovery + 555 WIL6210_FW_RECOVERY_TO)) 556 wil->recovery_count++; 557 else 558 wil->recovery_count = 1; /* fw was alive for a long time */ 559 560 if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) { 561 wil_err(wil, "too many recovery attempts (%d), giving up\n", 562 wil->recovery_count); 563 return; 564 } 565 566 wil->last_fw_recovery = jiffies; 567 568 wil_info(wil, "fw error recovery requested (try %d)...\n", 569 wil->recovery_count); 570 if (!no_fw_recovery) 571 wil->recovery_state = fw_recovery_running; 572 if (wil_wait_for_recovery(wil) != 0) 573 return; 574 575 rtnl_lock(); 576 mutex_lock(&wil->mutex); 577 /* Needs adaptation for multiple VIFs 578 * need to go over all VIFs and consider the appropriate 579 * recovery because each one can have different iftype. 580 */ 581 switch (wdev->iftype) { 582 case NL80211_IFTYPE_STATION: 583 case NL80211_IFTYPE_P2P_CLIENT: 584 case NL80211_IFTYPE_MONITOR: 585 /* silent recovery, upper layers will see disconnect */ 586 __wil_down(wil); 587 __wil_up(wil); 588 break; 589 case NL80211_IFTYPE_AP: 590 case NL80211_IFTYPE_P2P_GO: 591 if (no_fw_recovery) /* upper layers do recovery */ 592 break; 593 /* silent recovery, upper layers will see disconnect */ 594 __wil_down(wil); 595 __wil_up(wil); 596 mutex_unlock(&wil->mutex); 597 wil_cfg80211_ap_recovery(wil); 598 mutex_lock(&wil->mutex); 599 wil_info(wil, "... completed\n"); 600 break; 601 default: 602 wil_err(wil, "No recovery - unknown interface type %d\n", 603 wdev->iftype); 604 break; 605 } 606 607 mutex_unlock(&wil->mutex); 608 rtnl_unlock(); 609 } 610 611 static int wil_find_free_ring(struct wil6210_priv *wil) 612 { 613 int i; 614 int min_ring_id = wil_get_min_tx_ring_id(wil); 615 616 for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) { 617 if (!wil->ring_tx[i].va) 618 return i; 619 } 620 return -EINVAL; 621 } 622 623 int wil_ring_init_tx(struct wil6210_vif *vif, int cid) 624 { 625 struct wil6210_priv *wil = vif_to_wil(vif); 626 int rc = -EINVAL, ringid; 627 628 if (cid < 0) { 629 wil_err(wil, "No connection pending\n"); 630 goto out; 631 } 632 ringid = wil_find_free_ring(wil); 633 if (ringid < 0) { 634 wil_err(wil, "No free vring found\n"); 635 goto out; 636 } 637 638 wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n", 639 cid, vif->mid, ringid); 640 641 rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order, 642 cid, 0); 643 if (rc) 644 wil_err(wil, "init TX for CID %d MID %d vring %d failed\n", 645 cid, vif->mid, ringid); 646 647 out: 648 return rc; 649 } 650 651 int wil_bcast_init(struct wil6210_vif *vif) 652 { 653 struct wil6210_priv *wil = vif_to_wil(vif); 654 int ri = vif->bcast_ring, rc; 655 656 if (ri >= 0 && wil->ring_tx[ri].va) 657 return 0; 658 659 ri = wil_find_free_ring(wil); 660 if (ri < 0) 661 return ri; 662 663 vif->bcast_ring = ri; 664 rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order); 665 if (rc) 666 vif->bcast_ring = -1; 667 668 return rc; 669 } 670 671 void wil_bcast_fini(struct wil6210_vif *vif) 672 { 673 struct wil6210_priv *wil = vif_to_wil(vif); 674 int ri = vif->bcast_ring; 675 676 if (ri < 0) 677 return; 678 679 vif->bcast_ring = -1; 680 wil_ring_fini_tx(wil, ri); 681 } 682 683 void wil_bcast_fini_all(struct wil6210_priv *wil) 684 { 685 int i; 686 struct wil6210_vif *vif; 687 688 for (i = 0; i < GET_MAX_VIFS(wil); i++) { 689 vif = wil->vifs[i]; 690 if (vif) 691 wil_bcast_fini(vif); 692 } 693 } 694 695 int wil_priv_init(struct wil6210_priv *wil) 696 { 697 uint i; 698 699 wil_dbg_misc(wil, "priv_init\n"); 700 701 memset(wil->sta, 0, sizeof(wil->sta)); 702 for (i = 0; i < WIL6210_MAX_CID; i++) { 703 spin_lock_init(&wil->sta[i].tid_rx_lock); 704 wil->sta[i].mid = U8_MAX; 705 } 706 707 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) { 708 spin_lock_init(&wil->ring_tx_data[i].lock); 709 wil->ring2cid_tid[i][0] = WIL6210_MAX_CID; 710 } 711 712 mutex_init(&wil->mutex); 713 mutex_init(&wil->vif_mutex); 714 mutex_init(&wil->wmi_mutex); 715 mutex_init(&wil->halp.lock); 716 717 init_completion(&wil->wmi_ready); 718 init_completion(&wil->wmi_call); 719 init_completion(&wil->halp.comp); 720 721 INIT_WORK(&wil->wmi_event_worker, wmi_event_worker); 722 INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker); 723 724 INIT_LIST_HEAD(&wil->pending_wmi_ev); 725 spin_lock_init(&wil->wmi_ev_lock); 726 spin_lock_init(&wil->net_queue_lock); 727 init_waitqueue_head(&wil->wq); 728 init_rwsem(&wil->mem_lock); 729 730 wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi"); 731 if (!wil->wmi_wq) 732 return -EAGAIN; 733 734 wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service"); 735 if (!wil->wq_service) 736 goto out_wmi_wq; 737 738 wil->last_fw_recovery = jiffies; 739 wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT; 740 wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT; 741 wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT; 742 wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT; 743 744 if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT) 745 rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT; 746 747 wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT; 748 749 wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST | 750 WMI_WAKEUP_TRIGGER_BCAST; 751 memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats)); 752 wil->ring_idle_trsh = 16; 753 754 wil->reply_mid = U8_MAX; 755 wil->max_vifs = 1; 756 757 /* edma configuration can be updated via debugfs before allocation */ 758 wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS; 759 wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT; 760 761 /* Rx status ring size should be bigger than the number of RX buffers 762 * in order to prevent backpressure on the status ring, which may 763 * cause HW freeze. 764 */ 765 wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT; 766 /* Number of RX buffer IDs should be bigger than the RX descriptor 767 * ring size as in HW reorder flow, the HW can consume additional 768 * buffers before releasing the previous ones. 769 */ 770 wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT; 771 772 wil->amsdu_en = 1; 773 774 return 0; 775 776 out_wmi_wq: 777 destroy_workqueue(wil->wmi_wq); 778 779 return -EAGAIN; 780 } 781 782 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps) 783 { 784 if (wil->platform_ops.bus_request) { 785 wil->bus_request_kbps = kbps; 786 wil->platform_ops.bus_request(wil->platform_handle, kbps); 787 } 788 } 789 790 /** 791 * wil6210_disconnect - disconnect one connection 792 * @vif: virtual interface context 793 * @bssid: peer to disconnect, NULL to disconnect all 794 * @reason_code: Reason code for the Disassociation frame 795 * 796 * Disconnect and release associated resources. Issue WMI 797 * command(s) to trigger MAC disconnect. When command was issued 798 * successfully, call the wil6210_disconnect_complete function 799 * to handle the event synchronously 800 */ 801 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid, 802 u16 reason_code) 803 { 804 struct wil6210_priv *wil = vif_to_wil(vif); 805 806 wil_dbg_misc(wil, "disconnecting\n"); 807 808 del_timer_sync(&vif->connect_timer); 809 _wil6210_disconnect(vif, bssid, reason_code); 810 } 811 812 /** 813 * wil6210_disconnect_complete - handle disconnect event 814 * @vif: virtual interface context 815 * @bssid: peer to disconnect, NULL to disconnect all 816 * @reason_code: Reason code for the Disassociation frame 817 * 818 * Release associated resources and indicate upper layers the 819 * connection is terminated. 820 */ 821 void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid, 822 u16 reason_code) 823 { 824 struct wil6210_priv *wil = vif_to_wil(vif); 825 826 wil_dbg_misc(wil, "got disconnect\n"); 827 828 del_timer_sync(&vif->connect_timer); 829 _wil6210_disconnect_complete(vif, bssid, reason_code); 830 } 831 832 void wil_priv_deinit(struct wil6210_priv *wil) 833 { 834 wil_dbg_misc(wil, "priv_deinit\n"); 835 836 wil_set_recovery_state(wil, fw_recovery_idle); 837 cancel_work_sync(&wil->fw_error_worker); 838 wmi_event_flush(wil); 839 destroy_workqueue(wil->wq_service); 840 destroy_workqueue(wil->wmi_wq); 841 } 842 843 static void wil_shutdown_bl(struct wil6210_priv *wil) 844 { 845 u32 val; 846 847 wil_s(wil, RGF_USER_BL + 848 offsetof(struct bl_dedicated_registers_v1, 849 bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD); 850 851 usleep_range(100, 150); 852 853 val = wil_r(wil, RGF_USER_BL + 854 offsetof(struct bl_dedicated_registers_v1, 855 bl_shutdown_handshake)); 856 if (val & BL_SHUTDOWN_HS_RTD) { 857 wil_dbg_misc(wil, "BL is ready for halt\n"); 858 return; 859 } 860 861 wil_err(wil, "BL did not report ready for halt\n"); 862 } 863 864 /* this format is used by ARC embedded CPU for instruction memory */ 865 static inline u32 ARC_me_imm32(u32 d) 866 { 867 return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16); 868 } 869 870 /* defines access to interrupt vectors for wil_freeze_bl */ 871 #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8) 872 /* ARC long jump instruction */ 873 #define ARC_JAL_INST (0x20200f80) 874 875 static void wil_freeze_bl(struct wil6210_priv *wil) 876 { 877 u32 jal, upc, saved; 878 u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3); 879 880 jal = wil_r(wil, wil->iccm_base + ivt3); 881 if (jal != ARC_me_imm32(ARC_JAL_INST)) { 882 wil_dbg_misc(wil, "invalid IVT entry found, skipping\n"); 883 return; 884 } 885 886 /* prevent the target from entering deep sleep 887 * and disabling memory access 888 */ 889 saved = wil_r(wil, RGF_USER_USAGE_8); 890 wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP); 891 usleep_range(20, 25); /* let the BL process the bit */ 892 893 /* redirect to endless loop in the INT_L1 context and let it trap */ 894 wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3)); 895 usleep_range(20, 25); /* let the BL get into the trap */ 896 897 /* verify the BL is frozen */ 898 upc = wil_r(wil, RGF_USER_CPU_PC); 899 if (upc < ivt3 || (upc > (ivt3 + 8))) 900 wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc); 901 902 wil_w(wil, RGF_USER_USAGE_8, saved); 903 } 904 905 static void wil_bl_prepare_halt(struct wil6210_priv *wil) 906 { 907 u32 tmp, ver; 908 909 /* before halting device CPU driver must make sure BL is not accessing 910 * host memory. This is done differently depending on BL version: 911 * 1. For very old BL versions the procedure is skipped 912 * (not supported). 913 * 2. For old BL version we use a special trick to freeze the BL 914 * 3. For new BL versions we shutdown the BL using handshake procedure. 915 */ 916 tmp = wil_r(wil, RGF_USER_BL + 917 offsetof(struct bl_dedicated_registers_v0, 918 boot_loader_struct_version)); 919 if (!tmp) { 920 wil_dbg_misc(wil, "old BL, skipping halt preparation\n"); 921 return; 922 } 923 924 tmp = wil_r(wil, RGF_USER_BL + 925 offsetof(struct bl_dedicated_registers_v1, 926 bl_shutdown_handshake)); 927 ver = BL_SHUTDOWN_HS_PROT_VER(tmp); 928 929 if (ver > 0) 930 wil_shutdown_bl(wil); 931 else 932 wil_freeze_bl(wil); 933 } 934 935 static inline void wil_halt_cpu(struct wil6210_priv *wil) 936 { 937 if (wil->hw_version >= HW_VER_TALYN_MB) { 938 wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 939 BIT_USER_USER_CPU_MAN_RST); 940 wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB, 941 BIT_USER_MAC_CPU_MAN_RST); 942 } else { 943 wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST); 944 wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST); 945 } 946 } 947 948 static inline void wil_release_cpu(struct wil6210_priv *wil) 949 { 950 /* Start CPU */ 951 if (wil->hw_version >= HW_VER_TALYN_MB) 952 wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1); 953 else 954 wil_w(wil, RGF_USER_USER_CPU_0, 1); 955 } 956 957 static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode) 958 { 959 wil_info(wil, "oob_mode to %d\n", mode); 960 switch (mode) { 961 case 0: 962 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE | 963 BIT_USER_OOB_R2_MODE); 964 break; 965 case 1: 966 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE); 967 wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE); 968 break; 969 case 2: 970 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE); 971 wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE); 972 break; 973 default: 974 wil_err(wil, "invalid oob_mode: %d\n", mode); 975 } 976 } 977 978 static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash) 979 { 980 int delay = 0; 981 u32 x, x1 = 0; 982 983 /* wait until device ready. */ 984 if (no_flash) { 985 msleep(PMU_READY_DELAY_MS); 986 987 wil_dbg_misc(wil, "Reset completed\n"); 988 } else { 989 do { 990 msleep(RST_DELAY); 991 x = wil_r(wil, RGF_USER_BL + 992 offsetof(struct bl_dedicated_registers_v0, 993 boot_loader_ready)); 994 if (x1 != x) { 995 wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n", 996 x1, x); 997 x1 = x; 998 } 999 if (delay++ > RST_COUNT) { 1000 wil_err(wil, "Reset not completed, bl.ready 0x%08x\n", 1001 x); 1002 return -ETIME; 1003 } 1004 } while (x != BL_READY); 1005 1006 wil_dbg_misc(wil, "Reset completed in %d ms\n", 1007 delay * RST_DELAY); 1008 } 1009 1010 return 0; 1011 } 1012 1013 static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil) 1014 { 1015 u32 otp_hw; 1016 u8 signature_status; 1017 bool otp_signature_err; 1018 bool hw_section_done; 1019 u32 otp_qc_secured; 1020 int delay = 0; 1021 1022 /* Wait for OTP signature test to complete */ 1023 usleep_range(2000, 2200); 1024 1025 wil->boot_config = WIL_BOOT_ERR; 1026 1027 /* Poll until OTP signature status is valid. 1028 * In vanilla and development modes, when signature test is complete 1029 * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB. 1030 * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll 1031 * for signature status change to 2 or 3. 1032 */ 1033 do { 1034 otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1); 1035 signature_status = WIL_GET_BITS(otp_hw, 8, 9); 1036 otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB; 1037 1038 if (otp_signature_err && 1039 signature_status == WIL_SIG_STATUS_VANILLA) { 1040 wil->boot_config = WIL_BOOT_VANILLA; 1041 break; 1042 } 1043 if (otp_signature_err && 1044 signature_status == WIL_SIG_STATUS_DEVELOPMENT) { 1045 wil->boot_config = WIL_BOOT_DEVELOPMENT; 1046 break; 1047 } 1048 if (!otp_signature_err && 1049 signature_status == WIL_SIG_STATUS_PRODUCTION) { 1050 wil->boot_config = WIL_BOOT_PRODUCTION; 1051 break; 1052 } 1053 if (!otp_signature_err && 1054 signature_status == 1055 WIL_SIG_STATUS_CORRUPTED_PRODUCTION) { 1056 /* Unrecognized OTP signature found. Possibly a 1057 * corrupted production signature, access control 1058 * is applied as in production mode, therefore 1059 * do not fail 1060 */ 1061 wil->boot_config = WIL_BOOT_PRODUCTION; 1062 break; 1063 } 1064 if (delay++ > OTP_HW_COUNT) 1065 break; 1066 1067 usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10); 1068 } while (!otp_signature_err && signature_status == 0); 1069 1070 if (wil->boot_config == WIL_BOOT_ERR) { 1071 wil_err(wil, 1072 "invalid boot config, signature_status %d otp_signature_err %d\n", 1073 signature_status, otp_signature_err); 1074 return -ETIME; 1075 } 1076 1077 wil_dbg_misc(wil, 1078 "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n", 1079 delay * OTP_HW_DELAY, otp_hw, wil->boot_config); 1080 1081 if (wil->boot_config == WIL_BOOT_VANILLA) 1082 /* Assuming not SPI boot (currently not supported) */ 1083 goto out; 1084 1085 hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB; 1086 delay = 0; 1087 1088 while (!hw_section_done) { 1089 msleep(RST_DELAY); 1090 1091 otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1); 1092 hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB; 1093 1094 if (delay++ > RST_COUNT) { 1095 wil_err(wil, "TO waiting for hw_section_done\n"); 1096 return -ETIME; 1097 } 1098 } 1099 1100 wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY); 1101 1102 otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED); 1103 wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0; 1104 wil_dbg_misc(wil, "secured boot is %sabled\n", 1105 wil->secured_boot ? "en" : "dis"); 1106 1107 out: 1108 wil_dbg_misc(wil, "Reset completed\n"); 1109 1110 return 0; 1111 } 1112 1113 static int wil_target_reset(struct wil6210_priv *wil, int no_flash) 1114 { 1115 u32 x; 1116 int rc; 1117 1118 wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name); 1119 1120 if (wil->hw_version < HW_VER_TALYN) { 1121 /* Clear MAC link up */ 1122 wil_s(wil, RGF_HP_CTRL, BIT(15)); 1123 wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, 1124 BIT_HPAL_PERST_FROM_PAD); 1125 wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST); 1126 } 1127 1128 wil_halt_cpu(wil); 1129 1130 if (!no_flash) { 1131 /* clear all boot loader "ready" bits */ 1132 wil_w(wil, RGF_USER_BL + 1133 offsetof(struct bl_dedicated_registers_v0, 1134 boot_loader_ready), 0); 1135 /* this should be safe to write even with old BLs */ 1136 wil_w(wil, RGF_USER_BL + 1137 offsetof(struct bl_dedicated_registers_v1, 1138 bl_shutdown_handshake), 0); 1139 } 1140 /* Clear Fw Download notification */ 1141 wil_c(wil, RGF_USER_USAGE_6, BIT(0)); 1142 1143 wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN); 1144 /* XTAL stabilization should take about 3ms */ 1145 usleep_range(5000, 7000); 1146 x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS); 1147 if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) { 1148 wil_err(wil, "Xtal stabilization timeout\n" 1149 "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x); 1150 return -ETIME; 1151 } 1152 /* switch 10k to XTAL*/ 1153 wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF); 1154 /* 40 MHz */ 1155 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL); 1156 1157 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f); 1158 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf); 1159 1160 if (wil->hw_version >= HW_VER_TALYN_MB) { 1161 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000); 1162 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f); 1163 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0); 1164 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00); 1165 } else { 1166 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000); 1167 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f); 1168 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0); 1169 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00); 1170 } 1171 1172 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0); 1173 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0); 1174 1175 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0); 1176 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0); 1177 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0); 1178 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0); 1179 1180 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003); 1181 /* reset A2 PCIE AHB */ 1182 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000); 1183 1184 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0); 1185 1186 if (wil->hw_version == HW_VER_TALYN_MB) 1187 rc = wil_wait_device_ready_talyn_mb(wil); 1188 else 1189 rc = wil_wait_device_ready(wil, no_flash); 1190 if (rc) 1191 return rc; 1192 1193 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD); 1194 1195 /* enable fix for HW bug related to the SA/DA swap in AP Rx */ 1196 wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN | 1197 BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC); 1198 1199 if (wil->hw_version < HW_VER_TALYN_MB && no_flash) { 1200 /* Reset OTP HW vectors to fit 40MHz */ 1201 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001); 1202 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027); 1203 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1); 1204 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027); 1205 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003); 1206 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002); 1207 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001); 1208 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001); 1209 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001); 1210 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001); 1211 wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57); 1212 } 1213 1214 return 0; 1215 } 1216 1217 static void wil_collect_fw_info(struct wil6210_priv *wil) 1218 { 1219 struct wiphy *wiphy = wil_to_wiphy(wil); 1220 u8 retry_short; 1221 int rc; 1222 1223 wil_refresh_fw_capabilities(wil); 1224 1225 rc = wmi_get_mgmt_retry(wil, &retry_short); 1226 if (!rc) { 1227 wiphy->retry_short = retry_short; 1228 wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short); 1229 } 1230 } 1231 1232 void wil_refresh_fw_capabilities(struct wil6210_priv *wil) 1233 { 1234 struct wiphy *wiphy = wil_to_wiphy(wil); 1235 int features; 1236 1237 wil->keep_radio_on_during_sleep = 1238 test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND, 1239 wil->platform_capa) && 1240 test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities); 1241 1242 wil_info(wil, "keep_radio_on_during_sleep (%d)\n", 1243 wil->keep_radio_on_during_sleep); 1244 1245 if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities)) 1246 wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; 1247 else 1248 wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC; 1249 1250 if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) { 1251 wiphy->max_sched_scan_reqs = 1; 1252 wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM; 1253 wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM; 1254 wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN; 1255 wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM; 1256 } 1257 1258 if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities)) 1259 wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX; 1260 1261 if (wil->platform_ops.set_features) { 1262 features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL, 1263 wil->fw_capabilities) && 1264 test_bit(WIL_PLATFORM_CAPA_EXT_CLK, 1265 wil->platform_capa)) ? 1266 BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0; 1267 1268 if (wil->n_msi == 3) 1269 features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI); 1270 1271 wil->platform_ops.set_features(wil->platform_handle, features); 1272 } 1273 1274 if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64, 1275 wil->fw_capabilities)) { 1276 wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64; 1277 wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128; 1278 } else { 1279 wil->max_agg_wsize = WIL_MAX_AGG_WSIZE; 1280 wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE; 1281 } 1282 1283 update_supported_bands(wil); 1284 } 1285 1286 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r) 1287 { 1288 le32_to_cpus(&r->base); 1289 le16_to_cpus(&r->entry_size); 1290 le16_to_cpus(&r->size); 1291 le32_to_cpus(&r->tail); 1292 le32_to_cpus(&r->head); 1293 } 1294 1295 /* construct actual board file name to use */ 1296 void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len) 1297 { 1298 const char *board_file; 1299 const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN : 1300 WIL_FW_NAME_TALYN; 1301 1302 if (wil->board_file) { 1303 board_file = wil->board_file; 1304 } else { 1305 /* If specific FW file is used for Talyn, 1306 * use specific board file 1307 */ 1308 if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0) 1309 board_file = WIL_BRD_NAME_TALYN; 1310 else 1311 board_file = WIL_BOARD_FILE_NAME; 1312 } 1313 1314 strlcpy(buf, board_file, len); 1315 } 1316 1317 static int wil_get_bl_info(struct wil6210_priv *wil) 1318 { 1319 struct net_device *ndev = wil->main_ndev; 1320 struct wiphy *wiphy = wil_to_wiphy(wil); 1321 union { 1322 struct bl_dedicated_registers_v0 bl0; 1323 struct bl_dedicated_registers_v1 bl1; 1324 } bl; 1325 u32 bl_ver; 1326 u8 *mac; 1327 u16 rf_status; 1328 1329 wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL), 1330 sizeof(bl)); 1331 bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version); 1332 mac = bl.bl0.mac_address; 1333 1334 if (bl_ver == 0) { 1335 le32_to_cpus(&bl.bl0.rf_type); 1336 le32_to_cpus(&bl.bl0.baseband_type); 1337 rf_status = 0; /* actually, unknown */ 1338 wil_info(wil, 1339 "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n", 1340 bl_ver, mac, 1341 bl.bl0.rf_type, bl.bl0.baseband_type); 1342 wil_info(wil, "Boot Loader build unknown for struct v0\n"); 1343 } else { 1344 le16_to_cpus(&bl.bl1.rf_type); 1345 rf_status = le16_to_cpu(bl.bl1.rf_status); 1346 le32_to_cpus(&bl.bl1.baseband_type); 1347 le16_to_cpus(&bl.bl1.bl_version_subminor); 1348 le16_to_cpus(&bl.bl1.bl_version_build); 1349 wil_info(wil, 1350 "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n", 1351 bl_ver, mac, 1352 bl.bl1.rf_type, rf_status, 1353 bl.bl1.baseband_type); 1354 wil_info(wil, "Boot Loader build %d.%d.%d.%d\n", 1355 bl.bl1.bl_version_major, bl.bl1.bl_version_minor, 1356 bl.bl1.bl_version_subminor, bl.bl1.bl_version_build); 1357 } 1358 1359 if (!is_valid_ether_addr(mac)) { 1360 wil_err(wil, "BL: Invalid MAC %pM\n", mac); 1361 return -EINVAL; 1362 } 1363 1364 ether_addr_copy(ndev->perm_addr, mac); 1365 ether_addr_copy(wiphy->perm_addr, mac); 1366 if (!is_valid_ether_addr(ndev->dev_addr)) 1367 ether_addr_copy(ndev->dev_addr, mac); 1368 1369 if (rf_status) {/* bad RF cable? */ 1370 wil_err(wil, "RF communication error 0x%04x", 1371 rf_status); 1372 return -EAGAIN; 1373 } 1374 1375 return 0; 1376 } 1377 1378 static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err) 1379 { 1380 u32 bl_assert_code, bl_assert_blink, bl_magic_number; 1381 u32 bl_ver = wil_r(wil, RGF_USER_BL + 1382 offsetof(struct bl_dedicated_registers_v0, 1383 boot_loader_struct_version)); 1384 1385 if (bl_ver < 2) 1386 return; 1387 1388 bl_assert_code = wil_r(wil, RGF_USER_BL + 1389 offsetof(struct bl_dedicated_registers_v1, 1390 bl_assert_code)); 1391 bl_assert_blink = wil_r(wil, RGF_USER_BL + 1392 offsetof(struct bl_dedicated_registers_v1, 1393 bl_assert_blink)); 1394 bl_magic_number = wil_r(wil, RGF_USER_BL + 1395 offsetof(struct bl_dedicated_registers_v1, 1396 bl_magic_number)); 1397 1398 if (is_err) { 1399 wil_err(wil, 1400 "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n", 1401 bl_assert_code, bl_assert_blink, bl_magic_number); 1402 } else { 1403 wil_dbg_misc(wil, 1404 "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n", 1405 bl_assert_code, bl_assert_blink, bl_magic_number); 1406 } 1407 } 1408 1409 static int wil_get_otp_info(struct wil6210_priv *wil) 1410 { 1411 struct net_device *ndev = wil->main_ndev; 1412 struct wiphy *wiphy = wil_to_wiphy(wil); 1413 u8 mac[8]; 1414 int mac_addr; 1415 1416 /* OEM MAC has precedence */ 1417 mac_addr = RGF_OTP_OEM_MAC; 1418 wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), sizeof(mac)); 1419 1420 if (is_valid_ether_addr(mac)) { 1421 wil_info(wil, "using OEM MAC %pM\n", mac); 1422 } else { 1423 if (wil->hw_version >= HW_VER_TALYN_MB) 1424 mac_addr = RGF_OTP_MAC_TALYN_MB; 1425 else 1426 mac_addr = RGF_OTP_MAC; 1427 1428 wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), 1429 sizeof(mac)); 1430 } 1431 1432 if (!is_valid_ether_addr(mac)) { 1433 wil_err(wil, "Invalid MAC %pM\n", mac); 1434 return -EINVAL; 1435 } 1436 1437 ether_addr_copy(ndev->perm_addr, mac); 1438 ether_addr_copy(wiphy->perm_addr, mac); 1439 if (!is_valid_ether_addr(ndev->dev_addr)) 1440 ether_addr_copy(ndev->dev_addr, mac); 1441 1442 return 0; 1443 } 1444 1445 static int wil_wait_for_fw_ready(struct wil6210_priv *wil) 1446 { 1447 ulong to = msecs_to_jiffies(2000); 1448 ulong left = wait_for_completion_timeout(&wil->wmi_ready, to); 1449 1450 if (0 == left) { 1451 wil_err(wil, "Firmware not ready\n"); 1452 return -ETIME; 1453 } else { 1454 wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n", 1455 jiffies_to_msecs(to-left), wil->hw_version); 1456 } 1457 return 0; 1458 } 1459 1460 void wil_abort_scan(struct wil6210_vif *vif, bool sync) 1461 { 1462 struct wil6210_priv *wil = vif_to_wil(vif); 1463 int rc; 1464 struct cfg80211_scan_info info = { 1465 .aborted = true, 1466 }; 1467 1468 lockdep_assert_held(&wil->vif_mutex); 1469 1470 if (!vif->scan_request) 1471 return; 1472 1473 wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request); 1474 del_timer_sync(&vif->scan_timer); 1475 mutex_unlock(&wil->vif_mutex); 1476 rc = wmi_abort_scan(vif); 1477 if (!rc && sync) 1478 wait_event_interruptible_timeout(wil->wq, !vif->scan_request, 1479 msecs_to_jiffies( 1480 WAIT_FOR_SCAN_ABORT_MS)); 1481 1482 mutex_lock(&wil->vif_mutex); 1483 if (vif->scan_request) { 1484 cfg80211_scan_done(vif->scan_request, &info); 1485 vif->scan_request = NULL; 1486 } 1487 } 1488 1489 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync) 1490 { 1491 int i; 1492 1493 lockdep_assert_held(&wil->vif_mutex); 1494 1495 for (i = 0; i < GET_MAX_VIFS(wil); i++) { 1496 struct wil6210_vif *vif = wil->vifs[i]; 1497 1498 if (vif) 1499 wil_abort_scan(vif, sync); 1500 } 1501 } 1502 1503 int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile) 1504 { 1505 int rc; 1506 1507 if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) { 1508 wil_err(wil, "set_power_mgmt not supported\n"); 1509 return -EOPNOTSUPP; 1510 } 1511 1512 rc = wmi_ps_dev_profile_cfg(wil, ps_profile); 1513 if (rc) 1514 wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc); 1515 else 1516 wil->ps_profile = ps_profile; 1517 1518 return rc; 1519 } 1520 1521 static void wil_pre_fw_config(struct wil6210_priv *wil) 1522 { 1523 /* Mark FW as loaded from host */ 1524 wil_s(wil, RGF_USER_USAGE_6, 1); 1525 1526 /* clear any interrupts which on-card-firmware 1527 * may have set 1528 */ 1529 wil6210_clear_irq(wil); 1530 /* CAF_ICR - clear and mask */ 1531 /* it is W1C, clear by writing back same value */ 1532 if (wil->hw_version < HW_VER_TALYN_MB) { 1533 wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0); 1534 wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0); 1535 } 1536 /* clear PAL_UNIT_ICR (potential D0->D3 leftover) 1537 * In Talyn-MB host cannot access this register due to 1538 * access control, hence PAL_UNIT_ICR is cleared by the FW 1539 */ 1540 if (wil->hw_version < HW_VER_TALYN_MB) 1541 wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR), 1542 0); 1543 1544 if (wil->fw_calib_result > 0) { 1545 __le32 val = cpu_to_le32(wil->fw_calib_result | 1546 (CALIB_RESULT_SIGNATURE << 8)); 1547 wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val); 1548 } 1549 } 1550 1551 static int wil_restore_vifs(struct wil6210_priv *wil) 1552 { 1553 struct wil6210_vif *vif; 1554 struct net_device *ndev; 1555 struct wireless_dev *wdev; 1556 int i, rc; 1557 1558 for (i = 0; i < GET_MAX_VIFS(wil); i++) { 1559 vif = wil->vifs[i]; 1560 if (!vif) 1561 continue; 1562 vif->ap_isolate = 0; 1563 if (vif->mid) { 1564 ndev = vif_to_ndev(vif); 1565 wdev = vif_to_wdev(vif); 1566 rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr, 1567 wdev->iftype); 1568 if (rc) { 1569 wil_err(wil, "fail to restore VIF %d type %d, rc %d\n", 1570 i, wdev->iftype, rc); 1571 return rc; 1572 } 1573 } 1574 } 1575 1576 return 0; 1577 } 1578 1579 /* 1580 * We reset all the structures, and we reset the UMAC. 1581 * After calling this routine, you're expected to reload 1582 * the firmware. 1583 */ 1584 int wil_reset(struct wil6210_priv *wil, bool load_fw) 1585 { 1586 int rc, i; 1587 unsigned long status_flags = BIT(wil_status_resetting); 1588 int no_flash; 1589 struct wil6210_vif *vif; 1590 1591 wil_dbg_misc(wil, "reset\n"); 1592 1593 WARN_ON(!mutex_is_locked(&wil->mutex)); 1594 WARN_ON(test_bit(wil_status_napi_en, wil->status)); 1595 1596 if (debug_fw) { 1597 static const u8 mac[ETH_ALEN] = { 1598 0x00, 0xde, 0xad, 0x12, 0x34, 0x56, 1599 }; 1600 struct net_device *ndev = wil->main_ndev; 1601 1602 ether_addr_copy(ndev->perm_addr, mac); 1603 ether_addr_copy(ndev->dev_addr, ndev->perm_addr); 1604 return 0; 1605 } 1606 1607 if (wil->hw_version == HW_VER_UNKNOWN) 1608 return -ENODEV; 1609 1610 if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa) && 1611 wil->hw_version < HW_VER_TALYN_MB) { 1612 wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n"); 1613 wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0); 1614 } 1615 1616 if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) { 1617 wil_dbg_misc(wil, "Notify FW on ext clock configuration\n"); 1618 wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK); 1619 } 1620 1621 if (wil->platform_ops.notify) { 1622 rc = wil->platform_ops.notify(wil->platform_handle, 1623 WIL_PLATFORM_EVT_PRE_RESET); 1624 if (rc) 1625 wil_err(wil, "PRE_RESET platform notify failed, rc %d\n", 1626 rc); 1627 } 1628 1629 set_bit(wil_status_resetting, wil->status); 1630 mutex_lock(&wil->vif_mutex); 1631 wil_abort_scan_all_vifs(wil, false); 1632 mutex_unlock(&wil->vif_mutex); 1633 1634 for (i = 0; i < GET_MAX_VIFS(wil); i++) { 1635 vif = wil->vifs[i]; 1636 if (vif) { 1637 cancel_work_sync(&vif->disconnect_worker); 1638 wil6210_disconnect(vif, NULL, 1639 WLAN_REASON_DEAUTH_LEAVING); 1640 } 1641 } 1642 wil_bcast_fini_all(wil); 1643 1644 /* Disable device led before reset*/ 1645 wmi_led_cfg(wil, false); 1646 1647 /* prevent NAPI from being scheduled and prevent wmi commands */ 1648 mutex_lock(&wil->wmi_mutex); 1649 if (test_bit(wil_status_suspending, wil->status)) 1650 status_flags |= BIT(wil_status_suspending); 1651 bitmap_and(wil->status, wil->status, &status_flags, 1652 wil_status_last); 1653 wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status); 1654 mutex_unlock(&wil->wmi_mutex); 1655 1656 wil_mask_irq(wil); 1657 1658 wmi_event_flush(wil); 1659 1660 flush_workqueue(wil->wq_service); 1661 flush_workqueue(wil->wmi_wq); 1662 1663 no_flash = test_bit(hw_capa_no_flash, wil->hw_capa); 1664 if (!no_flash) 1665 wil_bl_crash_info(wil, false); 1666 wil_disable_irq(wil); 1667 rc = wil_target_reset(wil, no_flash); 1668 wil6210_clear_irq(wil); 1669 wil_enable_irq(wil); 1670 wil->txrx_ops.rx_fini(wil); 1671 wil->txrx_ops.tx_fini(wil); 1672 if (rc) { 1673 if (!no_flash) 1674 wil_bl_crash_info(wil, true); 1675 goto out; 1676 } 1677 1678 if (no_flash) { 1679 rc = wil_get_otp_info(wil); 1680 } else { 1681 rc = wil_get_bl_info(wil); 1682 if (rc == -EAGAIN && !load_fw) 1683 /* ignore RF error if not going up */ 1684 rc = 0; 1685 } 1686 if (rc) 1687 goto out; 1688 1689 wil_set_oob_mode(wil, oob_mode); 1690 if (load_fw) { 1691 char board_file[WIL_BOARD_FILE_MAX_NAMELEN]; 1692 1693 if (wil->secured_boot) { 1694 wil_err(wil, "secured boot is not supported\n"); 1695 return -ENOTSUPP; 1696 } 1697 1698 board_file[0] = '\0'; 1699 wil_get_board_file(wil, board_file, sizeof(board_file)); 1700 wil_info(wil, "Use firmware <%s> + board <%s>\n", 1701 wil->wil_fw_name, board_file); 1702 1703 if (!no_flash) 1704 wil_bl_prepare_halt(wil); 1705 1706 wil_halt_cpu(wil); 1707 memset(wil->fw_version, 0, sizeof(wil->fw_version)); 1708 /* Loading f/w from the file */ 1709 rc = wil_request_firmware(wil, wil->wil_fw_name, true); 1710 if (rc) 1711 goto out; 1712 if (wil->brd_file_addr) 1713 rc = wil_request_board(wil, board_file); 1714 else 1715 rc = wil_request_firmware(wil, board_file, true); 1716 if (rc) 1717 goto out; 1718 1719 wil_pre_fw_config(wil); 1720 wil_release_cpu(wil); 1721 } 1722 1723 /* init after reset */ 1724 reinit_completion(&wil->wmi_ready); 1725 reinit_completion(&wil->wmi_call); 1726 reinit_completion(&wil->halp.comp); 1727 1728 clear_bit(wil_status_resetting, wil->status); 1729 1730 if (load_fw) { 1731 wil_unmask_irq(wil); 1732 1733 /* we just started MAC, wait for FW ready */ 1734 rc = wil_wait_for_fw_ready(wil); 1735 if (rc) 1736 return rc; 1737 1738 /* check FW is responsive */ 1739 rc = wmi_echo(wil); 1740 if (rc) { 1741 wil_err(wil, "wmi_echo failed, rc %d\n", rc); 1742 return rc; 1743 } 1744 1745 wil->txrx_ops.configure_interrupt_moderation(wil); 1746 1747 /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx 1748 * while there is back-pressure from Host during RX 1749 */ 1750 if (wil->hw_version >= HW_VER_TALYN_MB) 1751 wil_s(wil, RGF_DMA_MISC_CTL, 1752 BIT_OFUL34_RDY_VALID_BUG_FIX_EN); 1753 1754 rc = wil_restore_vifs(wil); 1755 if (rc) { 1756 wil_err(wil, "failed to restore vifs, rc %d\n", rc); 1757 return rc; 1758 } 1759 1760 wil_collect_fw_info(wil); 1761 1762 if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT) 1763 wil_ps_update(wil, wil->ps_profile); 1764 1765 if (wil->platform_ops.notify) { 1766 rc = wil->platform_ops.notify(wil->platform_handle, 1767 WIL_PLATFORM_EVT_FW_RDY); 1768 if (rc) { 1769 wil_err(wil, "FW_RDY notify failed, rc %d\n", 1770 rc); 1771 rc = 0; 1772 } 1773 } 1774 } 1775 1776 return rc; 1777 1778 out: 1779 clear_bit(wil_status_resetting, wil->status); 1780 return rc; 1781 } 1782 1783 void wil_fw_error_recovery(struct wil6210_priv *wil) 1784 { 1785 wil_dbg_misc(wil, "starting fw error recovery\n"); 1786 1787 if (test_bit(wil_status_resetting, wil->status)) { 1788 wil_info(wil, "Reset already in progress\n"); 1789 return; 1790 } 1791 1792 wil->recovery_state = fw_recovery_pending; 1793 schedule_work(&wil->fw_error_worker); 1794 } 1795 1796 int __wil_up(struct wil6210_priv *wil) 1797 { 1798 struct net_device *ndev = wil->main_ndev; 1799 struct wireless_dev *wdev = ndev->ieee80211_ptr; 1800 int rc; 1801 1802 WARN_ON(!mutex_is_locked(&wil->mutex)); 1803 1804 down_write(&wil->mem_lock); 1805 rc = wil_reset(wil, true); 1806 up_write(&wil->mem_lock); 1807 if (rc) 1808 return rc; 1809 1810 /* Rx RING. After MAC and beacon */ 1811 if (rx_ring_order == 0) 1812 rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ? 1813 WIL_RX_RING_SIZE_ORDER_DEFAULT : 1814 WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT; 1815 1816 rc = wil->txrx_ops.rx_init(wil, rx_ring_order); 1817 if (rc) 1818 return rc; 1819 1820 rc = wil->txrx_ops.tx_init(wil); 1821 if (rc) 1822 return rc; 1823 1824 switch (wdev->iftype) { 1825 case NL80211_IFTYPE_STATION: 1826 wil_dbg_misc(wil, "type: STATION\n"); 1827 ndev->type = ARPHRD_ETHER; 1828 break; 1829 case NL80211_IFTYPE_AP: 1830 wil_dbg_misc(wil, "type: AP\n"); 1831 ndev->type = ARPHRD_ETHER; 1832 break; 1833 case NL80211_IFTYPE_P2P_CLIENT: 1834 wil_dbg_misc(wil, "type: P2P_CLIENT\n"); 1835 ndev->type = ARPHRD_ETHER; 1836 break; 1837 case NL80211_IFTYPE_P2P_GO: 1838 wil_dbg_misc(wil, "type: P2P_GO\n"); 1839 ndev->type = ARPHRD_ETHER; 1840 break; 1841 case NL80211_IFTYPE_MONITOR: 1842 wil_dbg_misc(wil, "type: Monitor\n"); 1843 ndev->type = ARPHRD_IEEE80211_RADIOTAP; 1844 /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */ 1845 break; 1846 default: 1847 return -EOPNOTSUPP; 1848 } 1849 1850 /* MAC address - pre-requisite for other commands */ 1851 wmi_set_mac_address(wil, ndev->dev_addr); 1852 1853 wil_dbg_misc(wil, "NAPI enable\n"); 1854 napi_enable(&wil->napi_rx); 1855 napi_enable(&wil->napi_tx); 1856 set_bit(wil_status_napi_en, wil->status); 1857 1858 wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS); 1859 1860 return 0; 1861 } 1862 1863 int wil_up(struct wil6210_priv *wil) 1864 { 1865 int rc; 1866 1867 wil_dbg_misc(wil, "up\n"); 1868 1869 mutex_lock(&wil->mutex); 1870 rc = __wil_up(wil); 1871 mutex_unlock(&wil->mutex); 1872 1873 return rc; 1874 } 1875 1876 int __wil_down(struct wil6210_priv *wil) 1877 { 1878 int rc; 1879 WARN_ON(!mutex_is_locked(&wil->mutex)); 1880 1881 set_bit(wil_status_resetting, wil->status); 1882 1883 wil6210_bus_request(wil, 0); 1884 1885 wil_disable_irq(wil); 1886 if (test_and_clear_bit(wil_status_napi_en, wil->status)) { 1887 napi_disable(&wil->napi_rx); 1888 napi_disable(&wil->napi_tx); 1889 wil_dbg_misc(wil, "NAPI disable\n"); 1890 } 1891 wil_enable_irq(wil); 1892 1893 mutex_lock(&wil->vif_mutex); 1894 wil_p2p_stop_radio_operations(wil); 1895 wil_abort_scan_all_vifs(wil, false); 1896 mutex_unlock(&wil->vif_mutex); 1897 1898 down_write(&wil->mem_lock); 1899 rc = wil_reset(wil, false); 1900 up_write(&wil->mem_lock); 1901 1902 return rc; 1903 } 1904 1905 int wil_down(struct wil6210_priv *wil) 1906 { 1907 int rc; 1908 1909 wil_dbg_misc(wil, "down\n"); 1910 1911 wil_set_recovery_state(wil, fw_recovery_idle); 1912 mutex_lock(&wil->mutex); 1913 rc = __wil_down(wil); 1914 mutex_unlock(&wil->mutex); 1915 1916 return rc; 1917 } 1918 1919 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac) 1920 { 1921 int i; 1922 int rc = -ENOENT; 1923 1924 for (i = 0; i < max_assoc_sta; i++) { 1925 if (wil->sta[i].mid == mid && 1926 wil->sta[i].status != wil_sta_unused && 1927 ether_addr_equal(wil->sta[i].addr, mac)) { 1928 rc = i; 1929 break; 1930 } 1931 } 1932 1933 return rc; 1934 } 1935 1936 void wil_halp_vote(struct wil6210_priv *wil) 1937 { 1938 unsigned long rc; 1939 unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS); 1940 1941 mutex_lock(&wil->halp.lock); 1942 1943 wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n", 1944 wil->halp.ref_cnt); 1945 1946 if (++wil->halp.ref_cnt == 1) { 1947 reinit_completion(&wil->halp.comp); 1948 /* mark to IRQ context to handle HALP ICR */ 1949 wil->halp.handle_icr = true; 1950 wil6210_set_halp(wil); 1951 rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies); 1952 if (!rc) { 1953 wil_err(wil, "HALP vote timed out\n"); 1954 /* Mask HALP as done in case the interrupt is raised */ 1955 wil->halp.handle_icr = false; 1956 wil6210_mask_halp(wil); 1957 } else { 1958 wil_dbg_irq(wil, 1959 "halp_vote: HALP vote completed after %d ms\n", 1960 jiffies_to_msecs(to_jiffies - rc)); 1961 } 1962 } 1963 1964 wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n", 1965 wil->halp.ref_cnt); 1966 1967 mutex_unlock(&wil->halp.lock); 1968 } 1969 1970 void wil_halp_unvote(struct wil6210_priv *wil) 1971 { 1972 WARN_ON(wil->halp.ref_cnt == 0); 1973 1974 mutex_lock(&wil->halp.lock); 1975 1976 wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n", 1977 wil->halp.ref_cnt); 1978 1979 if (--wil->halp.ref_cnt == 0) { 1980 wil6210_clear_halp(wil); 1981 wil_dbg_irq(wil, "HALP unvote\n"); 1982 } 1983 1984 wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n", 1985 wil->halp.ref_cnt); 1986 1987 mutex_unlock(&wil->halp.lock); 1988 } 1989 1990 void wil_init_txrx_ops(struct wil6210_priv *wil) 1991 { 1992 if (wil->use_enhanced_dma_hw) 1993 wil_init_txrx_ops_edma(wil); 1994 else 1995 wil_init_txrx_ops_legacy_dma(wil); 1996 } 1997