1 /*
2  * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <linux/moduleparam.h>
19 #include <linux/if_arp.h>
20 #include <linux/etherdevice.h>
21 #include <linux/rtnetlink.h>
22 
23 #include "wil6210.h"
24 #include "txrx.h"
25 #include "txrx_edma.h"
26 #include "wmi.h"
27 #include "boot_loader.h"
28 
29 #define WAIT_FOR_HALP_VOTE_MS 100
30 #define WAIT_FOR_SCAN_ABORT_MS 1000
31 #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
32 #define WIL_BOARD_FILE_MAX_NAMELEN 128
33 
34 bool debug_fw; /* = false; */
35 module_param(debug_fw, bool, 0444);
36 MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
37 
38 static u8 oob_mode;
39 module_param(oob_mode, byte, 0444);
40 MODULE_PARM_DESC(oob_mode,
41 		 " enable out of the box (OOB) mode in FW, for diagnostics and certification");
42 
43 bool no_fw_recovery;
44 module_param(no_fw_recovery, bool, 0644);
45 MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
46 
47 /* if not set via modparam, will be set to default value of 1/8 of
48  * rx ring size during init flow
49  */
50 unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
51 module_param(rx_ring_overflow_thrsh, ushort, 0444);
52 MODULE_PARM_DESC(rx_ring_overflow_thrsh,
53 		 " RX ring overflow threshold in descriptors.");
54 
55 /* We allow allocation of more than 1 page buffers to support large packets.
56  * It is suboptimal behavior performance wise in case MTU above page size.
57  */
58 unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
59 static int mtu_max_set(const char *val, const struct kernel_param *kp)
60 {
61 	int ret;
62 
63 	/* sets mtu_max directly. no need to restore it in case of
64 	 * illegal value since we assume this will fail insmod
65 	 */
66 	ret = param_set_uint(val, kp);
67 	if (ret)
68 		return ret;
69 
70 	if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
71 		ret = -EINVAL;
72 
73 	return ret;
74 }
75 
76 static const struct kernel_param_ops mtu_max_ops = {
77 	.set = mtu_max_set,
78 	.get = param_get_uint,
79 };
80 
81 module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
82 MODULE_PARM_DESC(mtu_max, " Max MTU value.");
83 
84 static uint rx_ring_order;
85 static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
86 static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
87 
88 static int ring_order_set(const char *val, const struct kernel_param *kp)
89 {
90 	int ret;
91 	uint x;
92 
93 	ret = kstrtouint(val, 0, &x);
94 	if (ret)
95 		return ret;
96 
97 	if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
98 		return -EINVAL;
99 
100 	*((uint *)kp->arg) = x;
101 
102 	return 0;
103 }
104 
105 static const struct kernel_param_ops ring_order_ops = {
106 	.set = ring_order_set,
107 	.get = param_get_uint,
108 };
109 
110 module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
111 MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
112 module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
113 MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
114 module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
115 MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
116 
117 enum {
118 	WIL_BOOT_ERR,
119 	WIL_BOOT_VANILLA,
120 	WIL_BOOT_PRODUCTION,
121 	WIL_BOOT_DEVELOPMENT,
122 };
123 
124 enum {
125 	WIL_SIG_STATUS_VANILLA = 0x0,
126 	WIL_SIG_STATUS_DEVELOPMENT = 0x1,
127 	WIL_SIG_STATUS_PRODUCTION = 0x2,
128 	WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
129 };
130 
131 #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
132 #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
133 
134 #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
135 
136 #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
137 /* round up to be above 2 ms total */
138 #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
139 
140 /*
141  * Due to a hardware issue,
142  * one has to read/write to/from NIC in 32-bit chunks;
143  * regular memcpy_fromio and siblings will
144  * not work on 64-bit platform - it uses 64-bit transactions
145  *
146  * Force 32-bit transactions to enable NIC on 64-bit platforms
147  *
148  * To avoid byte swap on big endian host, __raw_{read|write}l
149  * should be used - {read|write}l would swap bytes to provide
150  * little endian on PCI value in host endianness.
151  */
152 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
153 			  size_t count)
154 {
155 	u32 *d = dst;
156 	const volatile u32 __iomem *s = src;
157 
158 	for (; count >= 4; count -= 4)
159 		*d++ = __raw_readl(s++);
160 
161 	if (unlikely(count)) {
162 		/* count can be 1..3 */
163 		u32 tmp = __raw_readl(s);
164 
165 		memcpy(d, &tmp, count);
166 	}
167 }
168 
169 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
170 			size_t count)
171 {
172 	volatile u32 __iomem *d = dst;
173 	const u32 *s = src;
174 
175 	for (; count >= 4; count -= 4)
176 		__raw_writel(*s++, d++);
177 
178 	if (unlikely(count)) {
179 		/* count can be 1..3 */
180 		u32 tmp = 0;
181 
182 		memcpy(&tmp, s, count);
183 		__raw_writel(tmp, d);
184 	}
185 }
186 
187 /* Device memory access is prohibited while reset or suspend.
188  * wil_mem_access_lock protects accessing device memory in these cases
189  */
190 int wil_mem_access_lock(struct wil6210_priv *wil)
191 {
192 	if (!down_read_trylock(&wil->mem_lock))
193 		return -EBUSY;
194 
195 	if (test_bit(wil_status_suspending, wil->status) ||
196 	    test_bit(wil_status_suspended, wil->status)) {
197 		up_read(&wil->mem_lock);
198 		return -EBUSY;
199 	}
200 
201 	return 0;
202 }
203 
204 void wil_mem_access_unlock(struct wil6210_priv *wil)
205 {
206 	up_read(&wil->mem_lock);
207 }
208 
209 static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
210 {
211 	struct wil_ring *ring = &wil->ring_tx[id];
212 	struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
213 
214 	lockdep_assert_held(&wil->mutex);
215 
216 	if (!ring->va)
217 		return;
218 
219 	wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
220 
221 	spin_lock_bh(&txdata->lock);
222 	txdata->dot1x_open = false;
223 	txdata->mid = U8_MAX;
224 	txdata->enabled = 0; /* no Tx can be in progress or start anew */
225 	spin_unlock_bh(&txdata->lock);
226 	/* napi_synchronize waits for completion of the current NAPI but will
227 	 * not prevent the next NAPI run.
228 	 * Add a memory barrier to guarantee that txdata->enabled is zeroed
229 	 * before napi_synchronize so that the next scheduled NAPI will not
230 	 * handle this vring
231 	 */
232 	wmb();
233 	/* make sure NAPI won't touch this vring */
234 	if (test_bit(wil_status_napi_en, wil->status))
235 		napi_synchronize(&wil->napi_tx);
236 
237 	wil->txrx_ops.ring_fini_tx(wil, ring);
238 }
239 
240 static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
241 {
242 	int i;
243 
244 	for (i = 0; i < wil->max_assoc_sta; i++) {
245 		if (wil->sta[i].mid == mid &&
246 		    wil->sta[i].status == wil_sta_connected)
247 			return true;
248 	}
249 
250 	return false;
251 }
252 
253 static void wil_disconnect_cid_complete(struct wil6210_vif *vif, int cid,
254 					u16 reason_code)
255 __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
256 {
257 	uint i;
258 	struct wil6210_priv *wil = vif_to_wil(vif);
259 	struct net_device *ndev = vif_to_ndev(vif);
260 	struct wireless_dev *wdev = vif_to_wdev(vif);
261 	struct wil_sta_info *sta = &wil->sta[cid];
262 	int min_ring_id = wil_get_min_tx_ring_id(wil);
263 
264 	might_sleep();
265 	wil_dbg_misc(wil,
266 		     "disconnect_cid_complete: CID %d, MID %d, status %d\n",
267 		     cid, sta->mid, sta->status);
268 	/* inform upper layers */
269 	if (sta->status != wil_sta_unused) {
270 		if (vif->mid != sta->mid) {
271 			wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
272 				vif->mid);
273 		}
274 
275 		switch (wdev->iftype) {
276 		case NL80211_IFTYPE_AP:
277 		case NL80211_IFTYPE_P2P_GO:
278 			/* AP-like interface */
279 			cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
280 			break;
281 		default:
282 			break;
283 		}
284 		sta->status = wil_sta_unused;
285 		sta->mid = U8_MAX;
286 	}
287 	/* reorder buffers */
288 	for (i = 0; i < WIL_STA_TID_NUM; i++) {
289 		struct wil_tid_ampdu_rx *r;
290 
291 		spin_lock_bh(&sta->tid_rx_lock);
292 
293 		r = sta->tid_rx[i];
294 		sta->tid_rx[i] = NULL;
295 		wil_tid_ampdu_rx_free(wil, r);
296 
297 		spin_unlock_bh(&sta->tid_rx_lock);
298 	}
299 	/* crypto context */
300 	memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
301 	memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
302 	/* release vrings */
303 	for (i = min_ring_id; i < ARRAY_SIZE(wil->ring_tx); i++) {
304 		if (wil->ring2cid_tid[i][0] == cid)
305 			wil_ring_fini_tx(wil, i);
306 	}
307 	/* statistics */
308 	memset(&sta->stats, 0, sizeof(sta->stats));
309 	sta->stats.tx_latency_min_us = U32_MAX;
310 }
311 
312 static void _wil6210_disconnect_complete(struct wil6210_vif *vif,
313 					 const u8 *bssid, u16 reason_code)
314 {
315 	struct wil6210_priv *wil = vif_to_wil(vif);
316 	int cid = -ENOENT;
317 	struct net_device *ndev;
318 	struct wireless_dev *wdev;
319 
320 	ndev = vif_to_ndev(vif);
321 	wdev = vif_to_wdev(vif);
322 
323 	might_sleep();
324 	wil_info(wil, "disconnect_complete: bssid=%pM, reason=%d\n",
325 		 bssid, reason_code);
326 
327 	/* Cases are:
328 	 * - disconnect single STA, still connected
329 	 * - disconnect single STA, already disconnected
330 	 * - disconnect all
331 	 *
332 	 * For "disconnect all", there are 3 options:
333 	 * - bssid == NULL
334 	 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
335 	 * - bssid is our MAC address
336 	 */
337 	if (bssid && !is_broadcast_ether_addr(bssid) &&
338 	    !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
339 		cid = wil_find_cid(wil, vif->mid, bssid);
340 		wil_dbg_misc(wil,
341 			     "Disconnect complete %pM, CID=%d, reason=%d\n",
342 			     bssid, cid, reason_code);
343 		if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
344 			wil_disconnect_cid_complete(vif, cid, reason_code);
345 	} else { /* all */
346 		wil_dbg_misc(wil, "Disconnect complete all\n");
347 		for (cid = 0; cid < wil->max_assoc_sta; cid++)
348 			wil_disconnect_cid_complete(vif, cid, reason_code);
349 	}
350 
351 	/* link state */
352 	switch (wdev->iftype) {
353 	case NL80211_IFTYPE_STATION:
354 	case NL80211_IFTYPE_P2P_CLIENT:
355 		wil_bcast_fini(vif);
356 		wil_update_net_queues_bh(wil, vif, NULL, true);
357 		netif_carrier_off(ndev);
358 		if (!wil_has_other_active_ifaces(wil, ndev, false, true))
359 			wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
360 
361 		if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
362 			atomic_dec(&wil->connected_vifs);
363 			cfg80211_disconnected(ndev, reason_code,
364 					      NULL, 0,
365 					      vif->locally_generated_disc,
366 					      GFP_KERNEL);
367 			vif->locally_generated_disc = false;
368 		} else if (test_bit(wil_vif_fwconnecting, vif->status)) {
369 			cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
370 						WLAN_STATUS_UNSPECIFIED_FAILURE,
371 						GFP_KERNEL);
372 			vif->bss = NULL;
373 		}
374 		clear_bit(wil_vif_fwconnecting, vif->status);
375 		clear_bit(wil_vif_ft_roam, vif->status);
376 
377 		break;
378 	case NL80211_IFTYPE_AP:
379 	case NL80211_IFTYPE_P2P_GO:
380 		if (!wil_vif_is_connected(wil, vif->mid)) {
381 			wil_update_net_queues_bh(wil, vif, NULL, true);
382 			if (test_and_clear_bit(wil_vif_fwconnected,
383 					       vif->status))
384 				atomic_dec(&wil->connected_vifs);
385 		} else {
386 			wil_update_net_queues_bh(wil, vif, NULL, false);
387 		}
388 		break;
389 	default:
390 		break;
391 	}
392 }
393 
394 static int wil_disconnect_cid(struct wil6210_vif *vif, int cid,
395 			      u16 reason_code)
396 {
397 	struct wil6210_priv *wil = vif_to_wil(vif);
398 	struct wireless_dev *wdev = vif_to_wdev(vif);
399 	struct wil_sta_info *sta = &wil->sta[cid];
400 	bool del_sta = false;
401 
402 	might_sleep();
403 	wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
404 		     cid, sta->mid, sta->status);
405 
406 	if (sta->status == wil_sta_unused)
407 		return 0;
408 
409 	if (vif->mid != sta->mid) {
410 		wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", vif->mid);
411 		return -EINVAL;
412 	}
413 
414 	/* inform lower layers */
415 	if (wdev->iftype == NL80211_IFTYPE_AP && disable_ap_sme)
416 		del_sta = true;
417 
418 	/* disconnect by sending command disconnect/del_sta and wait
419 	 * synchronously for WMI_DISCONNECT_EVENTID event.
420 	 */
421 	return wmi_disconnect_sta(vif, sta->addr, reason_code, del_sta);
422 }
423 
424 static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
425 				u16 reason_code)
426 {
427 	struct wil6210_priv *wil;
428 	struct net_device *ndev;
429 	int cid = -ENOENT;
430 
431 	if (unlikely(!vif))
432 		return;
433 
434 	wil = vif_to_wil(vif);
435 	ndev = vif_to_ndev(vif);
436 
437 	might_sleep();
438 	wil_info(wil, "disconnect bssid=%pM, reason=%d\n", bssid, reason_code);
439 
440 	/* Cases are:
441 	 * - disconnect single STA, still connected
442 	 * - disconnect single STA, already disconnected
443 	 * - disconnect all
444 	 *
445 	 * For "disconnect all", there are 3 options:
446 	 * - bssid == NULL
447 	 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
448 	 * - bssid is our MAC address
449 	 */
450 	if (bssid && !is_broadcast_ether_addr(bssid) &&
451 	    !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
452 		cid = wil_find_cid(wil, vif->mid, bssid);
453 		wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
454 			     bssid, cid, reason_code);
455 		if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
456 			wil_disconnect_cid(vif, cid, reason_code);
457 	} else { /* all */
458 		wil_dbg_misc(wil, "Disconnect all\n");
459 		for (cid = 0; cid < wil->max_assoc_sta; cid++)
460 			wil_disconnect_cid(vif, cid, reason_code);
461 	}
462 
463 	/* call event handler manually after processing wmi_call,
464 	 * to avoid deadlock - disconnect event handler acquires
465 	 * wil->mutex while it is already held here
466 	 */
467 	_wil6210_disconnect_complete(vif, bssid, reason_code);
468 }
469 
470 void wil_disconnect_worker(struct work_struct *work)
471 {
472 	struct wil6210_vif *vif = container_of(work,
473 			struct wil6210_vif, disconnect_worker);
474 	struct wil6210_priv *wil = vif_to_wil(vif);
475 	struct net_device *ndev = vif_to_ndev(vif);
476 	int rc;
477 	struct {
478 		struct wmi_cmd_hdr wmi;
479 		struct wmi_disconnect_event evt;
480 	} __packed reply;
481 
482 	if (test_bit(wil_vif_fwconnected, vif->status))
483 		/* connect succeeded after all */
484 		return;
485 
486 	if (!test_bit(wil_vif_fwconnecting, vif->status))
487 		/* already disconnected */
488 		return;
489 
490 	memset(&reply, 0, sizeof(reply));
491 
492 	rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
493 		      WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
494 		      WIL6210_DISCONNECT_TO_MS);
495 	if (rc) {
496 		wil_err(wil, "disconnect error %d\n", rc);
497 		return;
498 	}
499 
500 	wil_update_net_queues_bh(wil, vif, NULL, true);
501 	netif_carrier_off(ndev);
502 	cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
503 				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
504 	clear_bit(wil_vif_fwconnecting, vif->status);
505 }
506 
507 static int wil_wait_for_recovery(struct wil6210_priv *wil)
508 {
509 	if (wait_event_interruptible(wil->wq, wil->recovery_state !=
510 				     fw_recovery_pending)) {
511 		wil_err(wil, "Interrupt, canceling recovery\n");
512 		return -ERESTARTSYS;
513 	}
514 	if (wil->recovery_state != fw_recovery_running) {
515 		wil_info(wil, "Recovery cancelled\n");
516 		return -EINTR;
517 	}
518 	wil_info(wil, "Proceed with recovery\n");
519 	return 0;
520 }
521 
522 void wil_set_recovery_state(struct wil6210_priv *wil, int state)
523 {
524 	wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
525 		     wil->recovery_state, state);
526 
527 	wil->recovery_state = state;
528 	wake_up_interruptible(&wil->wq);
529 }
530 
531 bool wil_is_recovery_blocked(struct wil6210_priv *wil)
532 {
533 	return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
534 }
535 
536 static void wil_fw_error_worker(struct work_struct *work)
537 {
538 	struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
539 						fw_error_worker);
540 	struct net_device *ndev = wil->main_ndev;
541 	struct wireless_dev *wdev;
542 
543 	wil_dbg_misc(wil, "fw error worker\n");
544 
545 	if (!ndev || !(ndev->flags & IFF_UP)) {
546 		wil_info(wil, "No recovery - interface is down\n");
547 		return;
548 	}
549 	wdev = ndev->ieee80211_ptr;
550 
551 	/* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
552 	 * passed since last recovery attempt
553 	 */
554 	if (time_is_after_jiffies(wil->last_fw_recovery +
555 				  WIL6210_FW_RECOVERY_TO))
556 		wil->recovery_count++;
557 	else
558 		wil->recovery_count = 1; /* fw was alive for a long time */
559 
560 	if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
561 		wil_err(wil, "too many recovery attempts (%d), giving up\n",
562 			wil->recovery_count);
563 		return;
564 	}
565 
566 	wil->last_fw_recovery = jiffies;
567 
568 	wil_info(wil, "fw error recovery requested (try %d)...\n",
569 		 wil->recovery_count);
570 	if (!no_fw_recovery)
571 		wil->recovery_state = fw_recovery_running;
572 	if (wil_wait_for_recovery(wil) != 0)
573 		return;
574 
575 	rtnl_lock();
576 	mutex_lock(&wil->mutex);
577 	/* Needs adaptation for multiple VIFs
578 	 * need to go over all VIFs and consider the appropriate
579 	 * recovery because each one can have different iftype.
580 	 */
581 	switch (wdev->iftype) {
582 	case NL80211_IFTYPE_STATION:
583 	case NL80211_IFTYPE_P2P_CLIENT:
584 	case NL80211_IFTYPE_MONITOR:
585 		/* silent recovery, upper layers will see disconnect */
586 		__wil_down(wil);
587 		__wil_up(wil);
588 		break;
589 	case NL80211_IFTYPE_AP:
590 	case NL80211_IFTYPE_P2P_GO:
591 		if (no_fw_recovery) /* upper layers do recovery */
592 			break;
593 		/* silent recovery, upper layers will see disconnect */
594 		__wil_down(wil);
595 		__wil_up(wil);
596 		mutex_unlock(&wil->mutex);
597 		wil_cfg80211_ap_recovery(wil);
598 		mutex_lock(&wil->mutex);
599 		wil_info(wil, "... completed\n");
600 		break;
601 	default:
602 		wil_err(wil, "No recovery - unknown interface type %d\n",
603 			wdev->iftype);
604 		break;
605 	}
606 
607 	mutex_unlock(&wil->mutex);
608 	rtnl_unlock();
609 }
610 
611 static int wil_find_free_ring(struct wil6210_priv *wil)
612 {
613 	int i;
614 	int min_ring_id = wil_get_min_tx_ring_id(wil);
615 
616 	for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
617 		if (!wil->ring_tx[i].va)
618 			return i;
619 	}
620 	return -EINVAL;
621 }
622 
623 int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
624 {
625 	struct wil6210_priv *wil = vif_to_wil(vif);
626 	int rc = -EINVAL, ringid;
627 
628 	if (cid < 0) {
629 		wil_err(wil, "No connection pending\n");
630 		goto out;
631 	}
632 	ringid = wil_find_free_ring(wil);
633 	if (ringid < 0) {
634 		wil_err(wil, "No free vring found\n");
635 		goto out;
636 	}
637 
638 	wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
639 		    cid, vif->mid, ringid);
640 
641 	rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
642 					cid, 0);
643 	if (rc)
644 		wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
645 			cid, vif->mid, ringid);
646 
647 out:
648 	return rc;
649 }
650 
651 int wil_bcast_init(struct wil6210_vif *vif)
652 {
653 	struct wil6210_priv *wil = vif_to_wil(vif);
654 	int ri = vif->bcast_ring, rc;
655 
656 	if (ri >= 0 && wil->ring_tx[ri].va)
657 		return 0;
658 
659 	ri = wil_find_free_ring(wil);
660 	if (ri < 0)
661 		return ri;
662 
663 	vif->bcast_ring = ri;
664 	rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
665 	if (rc)
666 		vif->bcast_ring = -1;
667 
668 	return rc;
669 }
670 
671 void wil_bcast_fini(struct wil6210_vif *vif)
672 {
673 	struct wil6210_priv *wil = vif_to_wil(vif);
674 	int ri = vif->bcast_ring;
675 
676 	if (ri < 0)
677 		return;
678 
679 	vif->bcast_ring = -1;
680 	wil_ring_fini_tx(wil, ri);
681 }
682 
683 void wil_bcast_fini_all(struct wil6210_priv *wil)
684 {
685 	int i;
686 	struct wil6210_vif *vif;
687 
688 	for (i = 0; i < GET_MAX_VIFS(wil); i++) {
689 		vif = wil->vifs[i];
690 		if (vif)
691 			wil_bcast_fini(vif);
692 	}
693 }
694 
695 int wil_priv_init(struct wil6210_priv *wil)
696 {
697 	uint i;
698 
699 	wil_dbg_misc(wil, "priv_init\n");
700 
701 	memset(wil->sta, 0, sizeof(wil->sta));
702 	for (i = 0; i < WIL6210_MAX_CID; i++) {
703 		spin_lock_init(&wil->sta[i].tid_rx_lock);
704 		wil->sta[i].mid = U8_MAX;
705 	}
706 
707 	for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
708 		spin_lock_init(&wil->ring_tx_data[i].lock);
709 		wil->ring2cid_tid[i][0] = WIL6210_MAX_CID;
710 	}
711 
712 	mutex_init(&wil->mutex);
713 	mutex_init(&wil->vif_mutex);
714 	mutex_init(&wil->wmi_mutex);
715 	mutex_init(&wil->halp.lock);
716 
717 	init_completion(&wil->wmi_ready);
718 	init_completion(&wil->wmi_call);
719 	init_completion(&wil->halp.comp);
720 
721 	INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
722 	INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
723 
724 	INIT_LIST_HEAD(&wil->pending_wmi_ev);
725 	spin_lock_init(&wil->wmi_ev_lock);
726 	spin_lock_init(&wil->net_queue_lock);
727 	init_waitqueue_head(&wil->wq);
728 	init_rwsem(&wil->mem_lock);
729 
730 	wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
731 	if (!wil->wmi_wq)
732 		return -EAGAIN;
733 
734 	wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
735 	if (!wil->wq_service)
736 		goto out_wmi_wq;
737 
738 	wil->last_fw_recovery = jiffies;
739 	wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
740 	wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
741 	wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
742 	wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
743 
744 	if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
745 		rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
746 
747 	wil->ps_profile =  WMI_PS_PROFILE_TYPE_DEFAULT;
748 
749 	wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
750 			      WMI_WAKEUP_TRIGGER_BCAST;
751 	memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
752 	wil->ring_idle_trsh = 16;
753 
754 	wil->reply_mid = U8_MAX;
755 	wil->max_vifs = 1;
756 	wil->max_assoc_sta = max_assoc_sta;
757 
758 	/* edma configuration can be updated via debugfs before allocation */
759 	wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
760 	wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
761 
762 	/* Rx status ring size should be bigger than the number of RX buffers
763 	 * in order to prevent backpressure on the status ring, which may
764 	 * cause HW freeze.
765 	 */
766 	wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
767 	/* Number of RX buffer IDs should be bigger than the RX descriptor
768 	 * ring size as in HW reorder flow, the HW can consume additional
769 	 * buffers before releasing the previous ones.
770 	 */
771 	wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
772 
773 	wil->amsdu_en = 1;
774 
775 	return 0;
776 
777 out_wmi_wq:
778 	destroy_workqueue(wil->wmi_wq);
779 
780 	return -EAGAIN;
781 }
782 
783 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
784 {
785 	if (wil->platform_ops.bus_request) {
786 		wil->bus_request_kbps = kbps;
787 		wil->platform_ops.bus_request(wil->platform_handle, kbps);
788 	}
789 }
790 
791 /**
792  * wil6210_disconnect - disconnect one connection
793  * @vif: virtual interface context
794  * @bssid: peer to disconnect, NULL to disconnect all
795  * @reason_code: Reason code for the Disassociation frame
796  *
797  * Disconnect and release associated resources. Issue WMI
798  * command(s) to trigger MAC disconnect. When command was issued
799  * successfully, call the wil6210_disconnect_complete function
800  * to handle the event synchronously
801  */
802 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
803 			u16 reason_code)
804 {
805 	struct wil6210_priv *wil = vif_to_wil(vif);
806 
807 	wil_dbg_misc(wil, "disconnecting\n");
808 
809 	del_timer_sync(&vif->connect_timer);
810 	_wil6210_disconnect(vif, bssid, reason_code);
811 }
812 
813 /**
814  * wil6210_disconnect_complete - handle disconnect event
815  * @vif: virtual interface context
816  * @bssid: peer to disconnect, NULL to disconnect all
817  * @reason_code: Reason code for the Disassociation frame
818  *
819  * Release associated resources and indicate upper layers the
820  * connection is terminated.
821  */
822 void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid,
823 				 u16 reason_code)
824 {
825 	struct wil6210_priv *wil = vif_to_wil(vif);
826 
827 	wil_dbg_misc(wil, "got disconnect\n");
828 
829 	del_timer_sync(&vif->connect_timer);
830 	_wil6210_disconnect_complete(vif, bssid, reason_code);
831 }
832 
833 void wil_priv_deinit(struct wil6210_priv *wil)
834 {
835 	wil_dbg_misc(wil, "priv_deinit\n");
836 
837 	wil_set_recovery_state(wil, fw_recovery_idle);
838 	cancel_work_sync(&wil->fw_error_worker);
839 	wmi_event_flush(wil);
840 	destroy_workqueue(wil->wq_service);
841 	destroy_workqueue(wil->wmi_wq);
842 	kfree(wil->brd_info);
843 }
844 
845 static void wil_shutdown_bl(struct wil6210_priv *wil)
846 {
847 	u32 val;
848 
849 	wil_s(wil, RGF_USER_BL +
850 	      offsetof(struct bl_dedicated_registers_v1,
851 		       bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
852 
853 	usleep_range(100, 150);
854 
855 	val = wil_r(wil, RGF_USER_BL +
856 		    offsetof(struct bl_dedicated_registers_v1,
857 			     bl_shutdown_handshake));
858 	if (val & BL_SHUTDOWN_HS_RTD) {
859 		wil_dbg_misc(wil, "BL is ready for halt\n");
860 		return;
861 	}
862 
863 	wil_err(wil, "BL did not report ready for halt\n");
864 }
865 
866 /* this format is used by ARC embedded CPU for instruction memory */
867 static inline u32 ARC_me_imm32(u32 d)
868 {
869 	return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
870 }
871 
872 /* defines access to interrupt vectors for wil_freeze_bl */
873 #define ARC_IRQ_VECTOR_OFFSET(N)	((N) * 8)
874 /* ARC long jump instruction */
875 #define ARC_JAL_INST			(0x20200f80)
876 
877 static void wil_freeze_bl(struct wil6210_priv *wil)
878 {
879 	u32 jal, upc, saved;
880 	u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
881 
882 	jal = wil_r(wil, wil->iccm_base + ivt3);
883 	if (jal != ARC_me_imm32(ARC_JAL_INST)) {
884 		wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
885 		return;
886 	}
887 
888 	/* prevent the target from entering deep sleep
889 	 * and disabling memory access
890 	 */
891 	saved = wil_r(wil, RGF_USER_USAGE_8);
892 	wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
893 	usleep_range(20, 25); /* let the BL process the bit */
894 
895 	/* redirect to endless loop in the INT_L1 context and let it trap */
896 	wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
897 	usleep_range(20, 25); /* let the BL get into the trap */
898 
899 	/* verify the BL is frozen */
900 	upc = wil_r(wil, RGF_USER_CPU_PC);
901 	if (upc < ivt3 || (upc > (ivt3 + 8)))
902 		wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
903 
904 	wil_w(wil, RGF_USER_USAGE_8, saved);
905 }
906 
907 static void wil_bl_prepare_halt(struct wil6210_priv *wil)
908 {
909 	u32 tmp, ver;
910 
911 	/* before halting device CPU driver must make sure BL is not accessing
912 	 * host memory. This is done differently depending on BL version:
913 	 * 1. For very old BL versions the procedure is skipped
914 	 * (not supported).
915 	 * 2. For old BL version we use a special trick to freeze the BL
916 	 * 3. For new BL versions we shutdown the BL using handshake procedure.
917 	 */
918 	tmp = wil_r(wil, RGF_USER_BL +
919 		    offsetof(struct bl_dedicated_registers_v0,
920 			     boot_loader_struct_version));
921 	if (!tmp) {
922 		wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
923 		return;
924 	}
925 
926 	tmp = wil_r(wil, RGF_USER_BL +
927 		    offsetof(struct bl_dedicated_registers_v1,
928 			     bl_shutdown_handshake));
929 	ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
930 
931 	if (ver > 0)
932 		wil_shutdown_bl(wil);
933 	else
934 		wil_freeze_bl(wil);
935 }
936 
937 static inline void wil_halt_cpu(struct wil6210_priv *wil)
938 {
939 	if (wil->hw_version >= HW_VER_TALYN_MB) {
940 		wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
941 		      BIT_USER_USER_CPU_MAN_RST);
942 		wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
943 		      BIT_USER_MAC_CPU_MAN_RST);
944 	} else {
945 		wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
946 		wil_w(wil, RGF_USER_MAC_CPU_0,  BIT_USER_MAC_CPU_MAN_RST);
947 	}
948 }
949 
950 static inline void wil_release_cpu(struct wil6210_priv *wil)
951 {
952 	/* Start CPU */
953 	if (wil->hw_version >= HW_VER_TALYN_MB)
954 		wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
955 	else
956 		wil_w(wil, RGF_USER_USER_CPU_0, 1);
957 }
958 
959 static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
960 {
961 	wil_info(wil, "oob_mode to %d\n", mode);
962 	switch (mode) {
963 	case 0:
964 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
965 		      BIT_USER_OOB_R2_MODE);
966 		break;
967 	case 1:
968 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
969 		wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
970 		break;
971 	case 2:
972 		wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
973 		wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
974 		break;
975 	default:
976 		wil_err(wil, "invalid oob_mode: %d\n", mode);
977 	}
978 }
979 
980 static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
981 {
982 	int delay = 0;
983 	u32 x, x1 = 0;
984 
985 	/* wait until device ready. */
986 	if (no_flash) {
987 		msleep(PMU_READY_DELAY_MS);
988 
989 		wil_dbg_misc(wil, "Reset completed\n");
990 	} else {
991 		do {
992 			msleep(RST_DELAY);
993 			x = wil_r(wil, RGF_USER_BL +
994 				  offsetof(struct bl_dedicated_registers_v0,
995 					   boot_loader_ready));
996 			if (x1 != x) {
997 				wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
998 					     x1, x);
999 				x1 = x;
1000 			}
1001 			if (delay++ > RST_COUNT) {
1002 				wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
1003 					x);
1004 				return -ETIME;
1005 			}
1006 		} while (x != BL_READY);
1007 
1008 		wil_dbg_misc(wil, "Reset completed in %d ms\n",
1009 			     delay * RST_DELAY);
1010 	}
1011 
1012 	return 0;
1013 }
1014 
1015 static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
1016 {
1017 	u32 otp_hw;
1018 	u8 signature_status;
1019 	bool otp_signature_err;
1020 	bool hw_section_done;
1021 	u32 otp_qc_secured;
1022 	int delay = 0;
1023 
1024 	/* Wait for OTP signature test to complete */
1025 	usleep_range(2000, 2200);
1026 
1027 	wil->boot_config = WIL_BOOT_ERR;
1028 
1029 	/* Poll until OTP signature status is valid.
1030 	 * In vanilla and development modes, when signature test is complete
1031 	 * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
1032 	 * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
1033 	 * for signature status change to 2 or 3.
1034 	 */
1035 	do {
1036 		otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
1037 		signature_status = WIL_GET_BITS(otp_hw, 8, 9);
1038 		otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
1039 
1040 		if (otp_signature_err &&
1041 		    signature_status == WIL_SIG_STATUS_VANILLA) {
1042 			wil->boot_config = WIL_BOOT_VANILLA;
1043 			break;
1044 		}
1045 		if (otp_signature_err &&
1046 		    signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
1047 			wil->boot_config = WIL_BOOT_DEVELOPMENT;
1048 			break;
1049 		}
1050 		if (!otp_signature_err &&
1051 		    signature_status == WIL_SIG_STATUS_PRODUCTION) {
1052 			wil->boot_config = WIL_BOOT_PRODUCTION;
1053 			break;
1054 		}
1055 		if  (!otp_signature_err &&
1056 		     signature_status ==
1057 		     WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
1058 			/* Unrecognized OTP signature found. Possibly a
1059 			 * corrupted production signature, access control
1060 			 * is applied as in production mode, therefore
1061 			 * do not fail
1062 			 */
1063 			wil->boot_config = WIL_BOOT_PRODUCTION;
1064 			break;
1065 		}
1066 		if (delay++ > OTP_HW_COUNT)
1067 			break;
1068 
1069 		usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
1070 	} while (!otp_signature_err && signature_status == 0);
1071 
1072 	if (wil->boot_config == WIL_BOOT_ERR) {
1073 		wil_err(wil,
1074 			"invalid boot config, signature_status %d otp_signature_err %d\n",
1075 			signature_status, otp_signature_err);
1076 		return -ETIME;
1077 	}
1078 
1079 	wil_dbg_misc(wil,
1080 		     "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
1081 		     delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
1082 
1083 	if (wil->boot_config == WIL_BOOT_VANILLA)
1084 		/* Assuming not SPI boot (currently not supported) */
1085 		goto out;
1086 
1087 	hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
1088 	delay = 0;
1089 
1090 	while (!hw_section_done) {
1091 		msleep(RST_DELAY);
1092 
1093 		otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
1094 		hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
1095 
1096 		if (delay++ > RST_COUNT) {
1097 			wil_err(wil, "TO waiting for hw_section_done\n");
1098 			return -ETIME;
1099 		}
1100 	}
1101 
1102 	wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
1103 
1104 	otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
1105 	wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
1106 	wil_dbg_misc(wil, "secured boot is %sabled\n",
1107 		     wil->secured_boot ? "en" : "dis");
1108 
1109 out:
1110 	wil_dbg_misc(wil, "Reset completed\n");
1111 
1112 	return 0;
1113 }
1114 
1115 static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
1116 {
1117 	u32 x;
1118 	int rc;
1119 
1120 	wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
1121 
1122 	if (wil->hw_version < HW_VER_TALYN) {
1123 		/* Clear MAC link up */
1124 		wil_s(wil, RGF_HP_CTRL, BIT(15));
1125 		wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0,
1126 		      BIT_HPAL_PERST_FROM_PAD);
1127 		wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
1128 	}
1129 
1130 	wil_halt_cpu(wil);
1131 
1132 	if (!no_flash) {
1133 		/* clear all boot loader "ready" bits */
1134 		wil_w(wil, RGF_USER_BL +
1135 		      offsetof(struct bl_dedicated_registers_v0,
1136 			       boot_loader_ready), 0);
1137 		/* this should be safe to write even with old BLs */
1138 		wil_w(wil, RGF_USER_BL +
1139 		      offsetof(struct bl_dedicated_registers_v1,
1140 			       bl_shutdown_handshake), 0);
1141 	}
1142 	/* Clear Fw Download notification */
1143 	wil_c(wil, RGF_USER_USAGE_6, BIT(0));
1144 
1145 	wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
1146 	/* XTAL stabilization should take about 3ms */
1147 	usleep_range(5000, 7000);
1148 	x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
1149 	if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
1150 		wil_err(wil, "Xtal stabilization timeout\n"
1151 			"RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
1152 		return -ETIME;
1153 	}
1154 	/* switch 10k to XTAL*/
1155 	wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
1156 	/* 40 MHz */
1157 	wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
1158 
1159 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
1160 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
1161 
1162 	if (wil->hw_version >= HW_VER_TALYN_MB) {
1163 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
1164 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1165 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
1166 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1167 	} else {
1168 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
1169 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1170 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
1171 		wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1172 	}
1173 
1174 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
1175 	wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
1176 
1177 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
1178 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
1179 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
1180 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1181 
1182 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
1183 	/* reset A2 PCIE AHB */
1184 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
1185 
1186 	wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1187 
1188 	if (wil->hw_version == HW_VER_TALYN_MB)
1189 		rc = wil_wait_device_ready_talyn_mb(wil);
1190 	else
1191 		rc = wil_wait_device_ready(wil, no_flash);
1192 	if (rc)
1193 		return rc;
1194 
1195 	wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
1196 
1197 	/* enable fix for HW bug related to the SA/DA swap in AP Rx */
1198 	wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
1199 	      BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
1200 
1201 	if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
1202 		/* Reset OTP HW vectors to fit 40MHz */
1203 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
1204 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
1205 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
1206 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
1207 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
1208 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
1209 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
1210 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
1211 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
1212 		wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
1213 		wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
1214 	}
1215 
1216 	return 0;
1217 }
1218 
1219 static void wil_collect_fw_info(struct wil6210_priv *wil)
1220 {
1221 	struct wiphy *wiphy = wil_to_wiphy(wil);
1222 	u8 retry_short;
1223 	int rc;
1224 
1225 	wil_refresh_fw_capabilities(wil);
1226 
1227 	rc = wmi_get_mgmt_retry(wil, &retry_short);
1228 	if (!rc) {
1229 		wiphy->retry_short = retry_short;
1230 		wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
1231 	}
1232 }
1233 
1234 void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
1235 {
1236 	struct wiphy *wiphy = wil_to_wiphy(wil);
1237 	int features;
1238 
1239 	wil->keep_radio_on_during_sleep =
1240 		test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
1241 			 wil->platform_capa) &&
1242 		test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
1243 
1244 	wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
1245 		 wil->keep_radio_on_during_sleep);
1246 
1247 	if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
1248 		wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
1249 	else
1250 		wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
1251 
1252 	if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
1253 		wiphy->max_sched_scan_reqs = 1;
1254 		wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
1255 		wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
1256 		wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
1257 		wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
1258 	}
1259 
1260 	if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
1261 		wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
1262 
1263 	if (wil->platform_ops.set_features) {
1264 		features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
1265 				     wil->fw_capabilities) &&
1266 			    test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
1267 				     wil->platform_capa)) ?
1268 			BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
1269 
1270 		if (wil->n_msi == 3)
1271 			features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
1272 
1273 		wil->platform_ops.set_features(wil->platform_handle, features);
1274 	}
1275 
1276 	if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
1277 		     wil->fw_capabilities)) {
1278 		wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
1279 		wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
1280 	} else {
1281 		wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
1282 		wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
1283 	}
1284 
1285 	update_supported_bands(wil);
1286 }
1287 
1288 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
1289 {
1290 	le32_to_cpus(&r->base);
1291 	le16_to_cpus(&r->entry_size);
1292 	le16_to_cpus(&r->size);
1293 	le32_to_cpus(&r->tail);
1294 	le32_to_cpus(&r->head);
1295 }
1296 
1297 /* construct actual board file name to use */
1298 void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
1299 {
1300 	const char *board_file;
1301 	const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
1302 			      WIL_FW_NAME_TALYN;
1303 
1304 	if (wil->board_file) {
1305 		board_file = wil->board_file;
1306 	} else {
1307 		/* If specific FW file is used for Talyn,
1308 		 * use specific board file
1309 		 */
1310 		if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
1311 			board_file = WIL_BRD_NAME_TALYN;
1312 		else
1313 			board_file = WIL_BOARD_FILE_NAME;
1314 	}
1315 
1316 	strlcpy(buf, board_file, len);
1317 }
1318 
1319 static int wil_get_bl_info(struct wil6210_priv *wil)
1320 {
1321 	struct net_device *ndev = wil->main_ndev;
1322 	struct wiphy *wiphy = wil_to_wiphy(wil);
1323 	union {
1324 		struct bl_dedicated_registers_v0 bl0;
1325 		struct bl_dedicated_registers_v1 bl1;
1326 	} bl;
1327 	u32 bl_ver;
1328 	u8 *mac;
1329 	u16 rf_status;
1330 
1331 	wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
1332 			     sizeof(bl));
1333 	bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
1334 	mac = bl.bl0.mac_address;
1335 
1336 	if (bl_ver == 0) {
1337 		le32_to_cpus(&bl.bl0.rf_type);
1338 		le32_to_cpus(&bl.bl0.baseband_type);
1339 		rf_status = 0; /* actually, unknown */
1340 		wil_info(wil,
1341 			 "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
1342 			 bl_ver, mac,
1343 			 bl.bl0.rf_type, bl.bl0.baseband_type);
1344 		wil_info(wil, "Boot Loader build unknown for struct v0\n");
1345 	} else {
1346 		le16_to_cpus(&bl.bl1.rf_type);
1347 		rf_status = le16_to_cpu(bl.bl1.rf_status);
1348 		le32_to_cpus(&bl.bl1.baseband_type);
1349 		le16_to_cpus(&bl.bl1.bl_version_subminor);
1350 		le16_to_cpus(&bl.bl1.bl_version_build);
1351 		wil_info(wil,
1352 			 "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
1353 			 bl_ver, mac,
1354 			 bl.bl1.rf_type, rf_status,
1355 			 bl.bl1.baseband_type);
1356 		wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
1357 			 bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
1358 			 bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
1359 	}
1360 
1361 	if (!is_valid_ether_addr(mac)) {
1362 		wil_err(wil, "BL: Invalid MAC %pM\n", mac);
1363 		return -EINVAL;
1364 	}
1365 
1366 	ether_addr_copy(ndev->perm_addr, mac);
1367 	ether_addr_copy(wiphy->perm_addr, mac);
1368 	if (!is_valid_ether_addr(ndev->dev_addr))
1369 		ether_addr_copy(ndev->dev_addr, mac);
1370 
1371 	if (rf_status) {/* bad RF cable? */
1372 		wil_err(wil, "RF communication error 0x%04x",
1373 			rf_status);
1374 		return -EAGAIN;
1375 	}
1376 
1377 	return 0;
1378 }
1379 
1380 static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
1381 {
1382 	u32 bl_assert_code, bl_assert_blink, bl_magic_number;
1383 	u32 bl_ver = wil_r(wil, RGF_USER_BL +
1384 			   offsetof(struct bl_dedicated_registers_v0,
1385 				    boot_loader_struct_version));
1386 
1387 	if (bl_ver < 2)
1388 		return;
1389 
1390 	bl_assert_code = wil_r(wil, RGF_USER_BL +
1391 			       offsetof(struct bl_dedicated_registers_v1,
1392 					bl_assert_code));
1393 	bl_assert_blink = wil_r(wil, RGF_USER_BL +
1394 				offsetof(struct bl_dedicated_registers_v1,
1395 					 bl_assert_blink));
1396 	bl_magic_number = wil_r(wil, RGF_USER_BL +
1397 				offsetof(struct bl_dedicated_registers_v1,
1398 					 bl_magic_number));
1399 
1400 	if (is_err) {
1401 		wil_err(wil,
1402 			"BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1403 			bl_assert_code, bl_assert_blink, bl_magic_number);
1404 	} else {
1405 		wil_dbg_misc(wil,
1406 			     "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1407 			     bl_assert_code, bl_assert_blink, bl_magic_number);
1408 	}
1409 }
1410 
1411 static int wil_get_otp_info(struct wil6210_priv *wil)
1412 {
1413 	struct net_device *ndev = wil->main_ndev;
1414 	struct wiphy *wiphy = wil_to_wiphy(wil);
1415 	u8 mac[8];
1416 	int mac_addr;
1417 
1418 	/* OEM MAC has precedence */
1419 	mac_addr = RGF_OTP_OEM_MAC;
1420 	wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), sizeof(mac));
1421 
1422 	if (is_valid_ether_addr(mac)) {
1423 		wil_info(wil, "using OEM MAC %pM\n", mac);
1424 	} else {
1425 		if (wil->hw_version >= HW_VER_TALYN_MB)
1426 			mac_addr = RGF_OTP_MAC_TALYN_MB;
1427 		else
1428 			mac_addr = RGF_OTP_MAC;
1429 
1430 		wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
1431 				     sizeof(mac));
1432 	}
1433 
1434 	if (!is_valid_ether_addr(mac)) {
1435 		wil_err(wil, "Invalid MAC %pM\n", mac);
1436 		return -EINVAL;
1437 	}
1438 
1439 	ether_addr_copy(ndev->perm_addr, mac);
1440 	ether_addr_copy(wiphy->perm_addr, mac);
1441 	if (!is_valid_ether_addr(ndev->dev_addr))
1442 		ether_addr_copy(ndev->dev_addr, mac);
1443 
1444 	return 0;
1445 }
1446 
1447 static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
1448 {
1449 	ulong to = msecs_to_jiffies(2000);
1450 	ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
1451 
1452 	if (0 == left) {
1453 		wil_err(wil, "Firmware not ready\n");
1454 		return -ETIME;
1455 	} else {
1456 		wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
1457 			 jiffies_to_msecs(to-left), wil->hw_version);
1458 	}
1459 	return 0;
1460 }
1461 
1462 void wil_abort_scan(struct wil6210_vif *vif, bool sync)
1463 {
1464 	struct wil6210_priv *wil = vif_to_wil(vif);
1465 	int rc;
1466 	struct cfg80211_scan_info info = {
1467 		.aborted = true,
1468 	};
1469 
1470 	lockdep_assert_held(&wil->vif_mutex);
1471 
1472 	if (!vif->scan_request)
1473 		return;
1474 
1475 	wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
1476 	del_timer_sync(&vif->scan_timer);
1477 	mutex_unlock(&wil->vif_mutex);
1478 	rc = wmi_abort_scan(vif);
1479 	if (!rc && sync)
1480 		wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
1481 						 msecs_to_jiffies(
1482 						 WAIT_FOR_SCAN_ABORT_MS));
1483 
1484 	mutex_lock(&wil->vif_mutex);
1485 	if (vif->scan_request) {
1486 		cfg80211_scan_done(vif->scan_request, &info);
1487 		vif->scan_request = NULL;
1488 	}
1489 }
1490 
1491 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
1492 {
1493 	int i;
1494 
1495 	lockdep_assert_held(&wil->vif_mutex);
1496 
1497 	for (i = 0; i < GET_MAX_VIFS(wil); i++) {
1498 		struct wil6210_vif *vif = wil->vifs[i];
1499 
1500 		if (vif)
1501 			wil_abort_scan(vif, sync);
1502 	}
1503 }
1504 
1505 int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
1506 {
1507 	int rc;
1508 
1509 	if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
1510 		wil_err(wil, "set_power_mgmt not supported\n");
1511 		return -EOPNOTSUPP;
1512 	}
1513 
1514 	rc  = wmi_ps_dev_profile_cfg(wil, ps_profile);
1515 	if (rc)
1516 		wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
1517 	else
1518 		wil->ps_profile = ps_profile;
1519 
1520 	return rc;
1521 }
1522 
1523 static void wil_pre_fw_config(struct wil6210_priv *wil)
1524 {
1525 	wil_clear_fw_log_addr(wil);
1526 	/* Mark FW as loaded from host */
1527 	wil_s(wil, RGF_USER_USAGE_6, 1);
1528 
1529 	/* clear any interrupts which on-card-firmware
1530 	 * may have set
1531 	 */
1532 	wil6210_clear_irq(wil);
1533 	/* CAF_ICR - clear and mask */
1534 	/* it is W1C, clear by writing back same value */
1535 	if (wil->hw_version < HW_VER_TALYN_MB) {
1536 		wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
1537 		wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
1538 	}
1539 	/* clear PAL_UNIT_ICR (potential D0->D3 leftover)
1540 	 * In Talyn-MB host cannot access this register due to
1541 	 * access control, hence PAL_UNIT_ICR is cleared by the FW
1542 	 */
1543 	if (wil->hw_version < HW_VER_TALYN_MB)
1544 		wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
1545 		      0);
1546 
1547 	if (wil->fw_calib_result > 0) {
1548 		__le32 val = cpu_to_le32(wil->fw_calib_result |
1549 						(CALIB_RESULT_SIGNATURE << 8));
1550 		wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
1551 	}
1552 }
1553 
1554 static int wil_restore_vifs(struct wil6210_priv *wil)
1555 {
1556 	struct wil6210_vif *vif;
1557 	struct net_device *ndev;
1558 	struct wireless_dev *wdev;
1559 	int i, rc;
1560 
1561 	for (i = 0; i < GET_MAX_VIFS(wil); i++) {
1562 		vif = wil->vifs[i];
1563 		if (!vif)
1564 			continue;
1565 		vif->ap_isolate = 0;
1566 		if (vif->mid) {
1567 			ndev = vif_to_ndev(vif);
1568 			wdev = vif_to_wdev(vif);
1569 			rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
1570 					       wdev->iftype);
1571 			if (rc) {
1572 				wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
1573 					i, wdev->iftype, rc);
1574 				return rc;
1575 			}
1576 		}
1577 	}
1578 
1579 	return 0;
1580 }
1581 
1582 /*
1583  * Clear FW and ucode log start addr to indicate FW log is not ready. The host
1584  * driver clears the addresses before FW starts and FW initializes the address
1585  * when it is ready to send logs.
1586  */
1587 void wil_clear_fw_log_addr(struct wil6210_priv *wil)
1588 {
1589 	/* FW log addr */
1590 	wil_w(wil, RGF_USER_USAGE_1, 0);
1591 	/* ucode log addr */
1592 	wil_w(wil, RGF_USER_USAGE_2, 0);
1593 	wil_dbg_misc(wil, "Cleared FW and ucode log address");
1594 }
1595 
1596 /*
1597  * We reset all the structures, and we reset the UMAC.
1598  * After calling this routine, you're expected to reload
1599  * the firmware.
1600  */
1601 int wil_reset(struct wil6210_priv *wil, bool load_fw)
1602 {
1603 	int rc, i;
1604 	unsigned long status_flags = BIT(wil_status_resetting);
1605 	int no_flash;
1606 	struct wil6210_vif *vif;
1607 
1608 	wil_dbg_misc(wil, "reset\n");
1609 
1610 	WARN_ON(!mutex_is_locked(&wil->mutex));
1611 	WARN_ON(test_bit(wil_status_napi_en, wil->status));
1612 
1613 	if (debug_fw) {
1614 		static const u8 mac[ETH_ALEN] = {
1615 			0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
1616 		};
1617 		struct net_device *ndev = wil->main_ndev;
1618 
1619 		ether_addr_copy(ndev->perm_addr, mac);
1620 		ether_addr_copy(ndev->dev_addr, ndev->perm_addr);
1621 		return 0;
1622 	}
1623 
1624 	if (wil->hw_version == HW_VER_UNKNOWN)
1625 		return -ENODEV;
1626 
1627 	if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa) &&
1628 	    wil->hw_version < HW_VER_TALYN_MB) {
1629 		wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
1630 		wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
1631 	}
1632 
1633 	if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
1634 		wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
1635 		wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
1636 	}
1637 
1638 	if (wil->platform_ops.notify) {
1639 		rc = wil->platform_ops.notify(wil->platform_handle,
1640 					      WIL_PLATFORM_EVT_PRE_RESET);
1641 		if (rc)
1642 			wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
1643 				rc);
1644 	}
1645 
1646 	set_bit(wil_status_resetting, wil->status);
1647 	mutex_lock(&wil->vif_mutex);
1648 	wil_abort_scan_all_vifs(wil, false);
1649 	mutex_unlock(&wil->vif_mutex);
1650 
1651 	for (i = 0; i < GET_MAX_VIFS(wil); i++) {
1652 		vif = wil->vifs[i];
1653 		if (vif) {
1654 			cancel_work_sync(&vif->disconnect_worker);
1655 			wil6210_disconnect(vif, NULL,
1656 					   WLAN_REASON_DEAUTH_LEAVING);
1657 		}
1658 	}
1659 	wil_bcast_fini_all(wil);
1660 
1661 	/* Disable device led before reset*/
1662 	wmi_led_cfg(wil, false);
1663 
1664 	/* prevent NAPI from being scheduled and prevent wmi commands */
1665 	mutex_lock(&wil->wmi_mutex);
1666 	if (test_bit(wil_status_suspending, wil->status))
1667 		status_flags |= BIT(wil_status_suspending);
1668 	bitmap_and(wil->status, wil->status, &status_flags,
1669 		   wil_status_last);
1670 	wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
1671 	mutex_unlock(&wil->wmi_mutex);
1672 
1673 	wil_mask_irq(wil);
1674 
1675 	wmi_event_flush(wil);
1676 
1677 	flush_workqueue(wil->wq_service);
1678 	flush_workqueue(wil->wmi_wq);
1679 
1680 	no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
1681 	if (!no_flash)
1682 		wil_bl_crash_info(wil, false);
1683 	wil_disable_irq(wil);
1684 	rc = wil_target_reset(wil, no_flash);
1685 	wil6210_clear_irq(wil);
1686 	wil_enable_irq(wil);
1687 	wil->txrx_ops.rx_fini(wil);
1688 	wil->txrx_ops.tx_fini(wil);
1689 	if (rc) {
1690 		if (!no_flash)
1691 			wil_bl_crash_info(wil, true);
1692 		goto out;
1693 	}
1694 
1695 	if (no_flash) {
1696 		rc = wil_get_otp_info(wil);
1697 	} else {
1698 		rc = wil_get_bl_info(wil);
1699 		if (rc == -EAGAIN && !load_fw)
1700 			/* ignore RF error if not going up */
1701 			rc = 0;
1702 	}
1703 	if (rc)
1704 		goto out;
1705 
1706 	wil_set_oob_mode(wil, oob_mode);
1707 	if (load_fw) {
1708 		char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
1709 
1710 		if  (wil->secured_boot) {
1711 			wil_err(wil, "secured boot is not supported\n");
1712 			return -ENOTSUPP;
1713 		}
1714 
1715 		board_file[0] = '\0';
1716 		wil_get_board_file(wil, board_file, sizeof(board_file));
1717 		wil_info(wil, "Use firmware <%s> + board <%s>\n",
1718 			 wil->wil_fw_name, board_file);
1719 
1720 		if (!no_flash)
1721 			wil_bl_prepare_halt(wil);
1722 
1723 		wil_halt_cpu(wil);
1724 		memset(wil->fw_version, 0, sizeof(wil->fw_version));
1725 		/* Loading f/w from the file */
1726 		rc = wil_request_firmware(wil, wil->wil_fw_name, true);
1727 		if (rc)
1728 			goto out;
1729 		if (wil->num_of_brd_entries)
1730 			rc = wil_request_board(wil, board_file);
1731 		else
1732 			rc = wil_request_firmware(wil, board_file, true);
1733 		if (rc)
1734 			goto out;
1735 
1736 		wil_pre_fw_config(wil);
1737 		wil_release_cpu(wil);
1738 	}
1739 
1740 	/* init after reset */
1741 	reinit_completion(&wil->wmi_ready);
1742 	reinit_completion(&wil->wmi_call);
1743 	reinit_completion(&wil->halp.comp);
1744 
1745 	clear_bit(wil_status_resetting, wil->status);
1746 
1747 	if (load_fw) {
1748 		wil_unmask_irq(wil);
1749 
1750 		/* we just started MAC, wait for FW ready */
1751 		rc = wil_wait_for_fw_ready(wil);
1752 		if (rc)
1753 			return rc;
1754 
1755 		/* check FW is responsive */
1756 		rc = wmi_echo(wil);
1757 		if (rc) {
1758 			wil_err(wil, "wmi_echo failed, rc %d\n", rc);
1759 			return rc;
1760 		}
1761 
1762 		wil->txrx_ops.configure_interrupt_moderation(wil);
1763 
1764 		/* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
1765 		 * while there is back-pressure from Host during RX
1766 		 */
1767 		if (wil->hw_version >= HW_VER_TALYN_MB)
1768 			wil_s(wil, RGF_DMA_MISC_CTL,
1769 			      BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
1770 
1771 		rc = wil_restore_vifs(wil);
1772 		if (rc) {
1773 			wil_err(wil, "failed to restore vifs, rc %d\n", rc);
1774 			return rc;
1775 		}
1776 
1777 		wil_collect_fw_info(wil);
1778 
1779 		if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
1780 			wil_ps_update(wil, wil->ps_profile);
1781 
1782 		if (wil->platform_ops.notify) {
1783 			rc = wil->platform_ops.notify(wil->platform_handle,
1784 						      WIL_PLATFORM_EVT_FW_RDY);
1785 			if (rc) {
1786 				wil_err(wil, "FW_RDY notify failed, rc %d\n",
1787 					rc);
1788 				rc = 0;
1789 			}
1790 		}
1791 	}
1792 
1793 	return rc;
1794 
1795 out:
1796 	clear_bit(wil_status_resetting, wil->status);
1797 	return rc;
1798 }
1799 
1800 void wil_fw_error_recovery(struct wil6210_priv *wil)
1801 {
1802 	wil_dbg_misc(wil, "starting fw error recovery\n");
1803 
1804 	if (test_bit(wil_status_resetting, wil->status)) {
1805 		wil_info(wil, "Reset already in progress\n");
1806 		return;
1807 	}
1808 
1809 	wil->recovery_state = fw_recovery_pending;
1810 	schedule_work(&wil->fw_error_worker);
1811 }
1812 
1813 int __wil_up(struct wil6210_priv *wil)
1814 {
1815 	struct net_device *ndev = wil->main_ndev;
1816 	struct wireless_dev *wdev = ndev->ieee80211_ptr;
1817 	int rc;
1818 
1819 	WARN_ON(!mutex_is_locked(&wil->mutex));
1820 
1821 	down_write(&wil->mem_lock);
1822 	rc = wil_reset(wil, true);
1823 	up_write(&wil->mem_lock);
1824 	if (rc)
1825 		return rc;
1826 
1827 	/* Rx RING. After MAC and beacon */
1828 	if (rx_ring_order == 0)
1829 		rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ?
1830 			WIL_RX_RING_SIZE_ORDER_DEFAULT :
1831 			WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT;
1832 
1833 	rc = wil->txrx_ops.rx_init(wil, rx_ring_order);
1834 	if (rc)
1835 		return rc;
1836 
1837 	rc = wil->txrx_ops.tx_init(wil);
1838 	if (rc)
1839 		return rc;
1840 
1841 	switch (wdev->iftype) {
1842 	case NL80211_IFTYPE_STATION:
1843 		wil_dbg_misc(wil, "type: STATION\n");
1844 		ndev->type = ARPHRD_ETHER;
1845 		break;
1846 	case NL80211_IFTYPE_AP:
1847 		wil_dbg_misc(wil, "type: AP\n");
1848 		ndev->type = ARPHRD_ETHER;
1849 		break;
1850 	case NL80211_IFTYPE_P2P_CLIENT:
1851 		wil_dbg_misc(wil, "type: P2P_CLIENT\n");
1852 		ndev->type = ARPHRD_ETHER;
1853 		break;
1854 	case NL80211_IFTYPE_P2P_GO:
1855 		wil_dbg_misc(wil, "type: P2P_GO\n");
1856 		ndev->type = ARPHRD_ETHER;
1857 		break;
1858 	case NL80211_IFTYPE_MONITOR:
1859 		wil_dbg_misc(wil, "type: Monitor\n");
1860 		ndev->type = ARPHRD_IEEE80211_RADIOTAP;
1861 		/* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
1862 		break;
1863 	default:
1864 		return -EOPNOTSUPP;
1865 	}
1866 
1867 	/* MAC address - pre-requisite for other commands */
1868 	wmi_set_mac_address(wil, ndev->dev_addr);
1869 
1870 	wil_dbg_misc(wil, "NAPI enable\n");
1871 	napi_enable(&wil->napi_rx);
1872 	napi_enable(&wil->napi_tx);
1873 	set_bit(wil_status_napi_en, wil->status);
1874 
1875 	wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
1876 
1877 	return 0;
1878 }
1879 
1880 int wil_up(struct wil6210_priv *wil)
1881 {
1882 	int rc;
1883 
1884 	wil_dbg_misc(wil, "up\n");
1885 
1886 	mutex_lock(&wil->mutex);
1887 	rc = __wil_up(wil);
1888 	mutex_unlock(&wil->mutex);
1889 
1890 	return rc;
1891 }
1892 
1893 int __wil_down(struct wil6210_priv *wil)
1894 {
1895 	int rc;
1896 	WARN_ON(!mutex_is_locked(&wil->mutex));
1897 
1898 	set_bit(wil_status_resetting, wil->status);
1899 
1900 	wil6210_bus_request(wil, 0);
1901 
1902 	wil_disable_irq(wil);
1903 	if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
1904 		napi_disable(&wil->napi_rx);
1905 		napi_disable(&wil->napi_tx);
1906 		wil_dbg_misc(wil, "NAPI disable\n");
1907 	}
1908 	wil_enable_irq(wil);
1909 
1910 	mutex_lock(&wil->vif_mutex);
1911 	wil_p2p_stop_radio_operations(wil);
1912 	wil_abort_scan_all_vifs(wil, false);
1913 	mutex_unlock(&wil->vif_mutex);
1914 
1915 	down_write(&wil->mem_lock);
1916 	rc = wil_reset(wil, false);
1917 	up_write(&wil->mem_lock);
1918 
1919 	return rc;
1920 }
1921 
1922 int wil_down(struct wil6210_priv *wil)
1923 {
1924 	int rc;
1925 
1926 	wil_dbg_misc(wil, "down\n");
1927 
1928 	wil_set_recovery_state(wil, fw_recovery_idle);
1929 	mutex_lock(&wil->mutex);
1930 	rc = __wil_down(wil);
1931 	mutex_unlock(&wil->mutex);
1932 
1933 	return rc;
1934 }
1935 
1936 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
1937 {
1938 	int i;
1939 	int rc = -ENOENT;
1940 
1941 	for (i = 0; i < wil->max_assoc_sta; i++) {
1942 		if (wil->sta[i].mid == mid &&
1943 		    wil->sta[i].status != wil_sta_unused &&
1944 		    ether_addr_equal(wil->sta[i].addr, mac)) {
1945 			rc = i;
1946 			break;
1947 		}
1948 	}
1949 
1950 	return rc;
1951 }
1952 
1953 void wil_halp_vote(struct wil6210_priv *wil)
1954 {
1955 	unsigned long rc;
1956 	unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
1957 
1958 	if (wil->hw_version >= HW_VER_TALYN_MB)
1959 		return;
1960 
1961 	mutex_lock(&wil->halp.lock);
1962 
1963 	wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
1964 		    wil->halp.ref_cnt);
1965 
1966 	if (++wil->halp.ref_cnt == 1) {
1967 		reinit_completion(&wil->halp.comp);
1968 		/* mark to IRQ context to handle HALP ICR */
1969 		wil->halp.handle_icr = true;
1970 		wil6210_set_halp(wil);
1971 		rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
1972 		if (!rc) {
1973 			wil_err(wil, "HALP vote timed out\n");
1974 			/* Mask HALP as done in case the interrupt is raised */
1975 			wil->halp.handle_icr = false;
1976 			wil6210_mask_halp(wil);
1977 		} else {
1978 			wil_dbg_irq(wil,
1979 				    "halp_vote: HALP vote completed after %d ms\n",
1980 				    jiffies_to_msecs(to_jiffies - rc));
1981 		}
1982 	}
1983 
1984 	wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
1985 		    wil->halp.ref_cnt);
1986 
1987 	mutex_unlock(&wil->halp.lock);
1988 }
1989 
1990 void wil_halp_unvote(struct wil6210_priv *wil)
1991 {
1992 	if (wil->hw_version >= HW_VER_TALYN_MB)
1993 		return;
1994 
1995 	WARN_ON(wil->halp.ref_cnt == 0);
1996 
1997 	mutex_lock(&wil->halp.lock);
1998 
1999 	wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
2000 		    wil->halp.ref_cnt);
2001 
2002 	if (--wil->halp.ref_cnt == 0) {
2003 		wil6210_clear_halp(wil);
2004 		wil_dbg_irq(wil, "HALP unvote\n");
2005 	}
2006 
2007 	wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
2008 		    wil->halp.ref_cnt);
2009 
2010 	mutex_unlock(&wil->halp.lock);
2011 }
2012 
2013 void wil_init_txrx_ops(struct wil6210_priv *wil)
2014 {
2015 	if (wil->use_enhanced_dma_hw)
2016 		wil_init_txrx_ops_edma(wil);
2017 	else
2018 		wil_init_txrx_ops_legacy_dma(wil);
2019 }
2020