1 /*
2  * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _WCN36XX_H_
18 #define _WCN36XX_H_
19 
20 #include <linux/completion.h>
21 #include <linux/in6.h>
22 #include <linux/printk.h>
23 #include <linux/spinlock.h>
24 #include <net/mac80211.h>
25 
26 #include "hal.h"
27 #include "smd.h"
28 #include "txrx.h"
29 #include "dxe.h"
30 #include "pmc.h"
31 #include "debug.h"
32 
33 #define WLAN_NV_FILE               "wlan/prima/WCNSS_qcom_wlan_nv.bin"
34 #define WCN36XX_AGGR_BUFFER_SIZE 64
35 
36 extern unsigned int wcn36xx_dbg_mask;
37 
38 enum wcn36xx_debug_mask {
39 	WCN36XX_DBG_DXE		= 0x00000001,
40 	WCN36XX_DBG_DXE_DUMP	= 0x00000002,
41 	WCN36XX_DBG_SMD		= 0x00000004,
42 	WCN36XX_DBG_SMD_DUMP	= 0x00000008,
43 	WCN36XX_DBG_RX		= 0x00000010,
44 	WCN36XX_DBG_RX_DUMP	= 0x00000020,
45 	WCN36XX_DBG_TX		= 0x00000040,
46 	WCN36XX_DBG_TX_DUMP	= 0x00000080,
47 	WCN36XX_DBG_HAL		= 0x00000100,
48 	WCN36XX_DBG_HAL_DUMP	= 0x00000200,
49 	WCN36XX_DBG_MAC		= 0x00000400,
50 	WCN36XX_DBG_BEACON	= 0x00000800,
51 	WCN36XX_DBG_BEACON_DUMP	= 0x00001000,
52 	WCN36XX_DBG_PMC		= 0x00002000,
53 	WCN36XX_DBG_PMC_DUMP	= 0x00004000,
54 	WCN36XX_DBG_TESTMODE		= 0x00008000,
55 	WCN36XX_DBG_TESTMODE_DUMP	= 0x00010000,
56 	WCN36XX_DBG_ANY		= 0xffffffff,
57 };
58 
59 #define wcn36xx_err(fmt, arg...)				\
60 	printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg)
61 
62 #define wcn36xx_warn(fmt, arg...)				\
63 	printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
64 
65 #define wcn36xx_info(fmt, arg...)		\
66 	printk(KERN_INFO pr_fmt(fmt), ##arg)
67 
68 #define wcn36xx_dbg(mask, fmt, arg...) do {			\
69 	if (wcn36xx_dbg_mask & mask)					\
70 		printk(KERN_DEBUG pr_fmt(fmt), ##arg);	\
71 } while (0)
72 
73 #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do {	\
74 	if (wcn36xx_dbg_mask & mask)					\
75 		print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str),	\
76 			       DUMP_PREFIX_OFFSET, 32, 1,	\
77 			       buf, len, false);		\
78 } while (0)
79 
80 enum wcn36xx_ampdu_state {
81 	WCN36XX_AMPDU_NONE,
82 	WCN36XX_AMPDU_INIT,
83 	WCN36XX_AMPDU_START,
84 	WCN36XX_AMPDU_OPERATIONAL,
85 };
86 
87 #define HW_VALUE_PHY_SHIFT 8
88 #define HW_VALUE_PHY(hw_value) ((hw_value) >> HW_VALUE_PHY_SHIFT)
89 #define HW_VALUE_CHANNEL(hw_value) ((hw_value) & 0xFF)
90 #define WCN36XX_HW_CHANNEL(__wcn)\
91 	HW_VALUE_CHANNEL(__wcn->hw->conf.chandef.chan->hw_value)
92 #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
93 #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
94 #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
95 #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
96 #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
97 
98 #define RF_UNKNOWN	0x0000
99 #define RF_IRIS_WCN3620	0x3620
100 #define RF_IRIS_WCN3680	0x3680
101 
102 static inline void buff_to_be(u32 *buf, size_t len)
103 {
104 	int i;
105 	for (i = 0; i < len; i++)
106 		buf[i] = cpu_to_be32(buf[i]);
107 }
108 
109 struct nv_data {
110 	int	is_valid;
111 	u8	table;
112 };
113 
114 /**
115  * struct wcn36xx_vif - holds VIF related fields
116  *
117  * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
118  * HW after first config_bss call and must be used in delete_bss and
119  * enter/exit_bmps.
120  */
121 struct wcn36xx_vif {
122 	struct list_head list;
123 	u8 dtim_period;
124 	enum ani_ed_type encrypt_type;
125 	bool is_joining;
126 	bool sta_assoc;
127 	struct wcn36xx_hal_mac_ssid ssid;
128 	enum wcn36xx_hal_bss_type bss_type;
129 
130 	/* Power management */
131 	enum wcn36xx_power_state pw_state;
132 
133 	u8 bss_index;
134 	/* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
135 	u8 self_sta_index;
136 	u8 self_dpu_desc_index;
137 	u8 self_ucast_dpu_sign;
138 
139 #if IS_ENABLED(CONFIG_IPV6)
140 	/* IPv6 addresses for WoWLAN */
141 	struct in6_addr target_ipv6_addrs[WCN36XX_HAL_IPV6_OFFLOAD_ADDR_MAX];
142 	unsigned long tentative_addrs[BITS_TO_LONGS(WCN36XX_HAL_IPV6_OFFLOAD_ADDR_MAX)];
143 	int num_target_ipv6_addrs;
144 #endif
145 	/* WoWLAN GTK rekey data */
146 	struct {
147 		u8 kck[NL80211_KCK_LEN], kek[NL80211_KEK_LEN];
148 		__le64 replay_ctr;
149 		bool valid;
150 	} rekey_data;
151 
152 	struct list_head sta_list;
153 
154 	int bmps_fail_ct;
155 };
156 
157 /**
158  * struct wcn36xx_sta - holds STA related fields
159  *
160  * @tid: traffic ID that is used during AMPDU and in TX BD.
161  * @sta_index: STA index is returned from HW after config_sta call and is
162  * used in both SMD channel and TX BD.
163  * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
164  * call and is used in TX BD.
165  * @bss_sta_index: STA index is returned from HW after config_bss call and is
166  * used in both SMD channel and TX BD. See table bellow when it is used.
167  * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
168  * config_bss call and is used in TX BD.
169  * ______________________________________________
170  * |		  |	STA	|	AP	|
171  * |______________|_____________|_______________|
172  * |    TX BD     |bss_sta_index|   sta_index   |
173  * |______________|_____________|_______________|
174  * |all SMD calls |bss_sta_index|   sta_index	|
175  * |______________|_____________|_______________|
176  * |smd_delete_sta|  sta_index  |   sta_index	|
177  * |______________|_____________|_______________|
178  */
179 struct wcn36xx_sta {
180 	struct list_head list;
181 	struct wcn36xx_vif *vif;
182 	u16 aid;
183 	u16 tid;
184 	u8 sta_index;
185 	u8 dpu_desc_index;
186 	u8 ucast_dpu_sign;
187 	u8 bss_sta_index;
188 	u8 bss_dpu_desc_index;
189 	bool is_data_encrypted;
190 	/* Rates */
191 	struct wcn36xx_hal_supported_rates_v1 supported_rates;
192 
193 	spinlock_t ampdu_lock;		/* protects next two fields */
194 	enum wcn36xx_ampdu_state ampdu_state[16];
195 	int non_agg_frame_ct;
196 };
197 struct wcn36xx_dxe_ch;
198 struct wcn36xx {
199 	struct ieee80211_hw	*hw;
200 	struct device		*dev;
201 	struct list_head	vif_list;
202 
203 	const char		*nv_file;
204 	const struct firmware	*nv;
205 
206 	u8			fw_revision;
207 	u8			fw_version;
208 	u8			fw_minor;
209 	u8			fw_major;
210 	u32			fw_feat_caps[WCN36XX_HAL_CAPS_SIZE];
211 	bool			is_pronto;
212 
213 	/* extra byte for the NULL termination */
214 	u8			crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
215 	u8			wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
216 
217 	bool		first_boot;
218 
219 	/* IRQs */
220 	int			tx_irq;
221 	int			rx_irq;
222 	void __iomem		*ccu_base;
223 	void __iomem		*dxe_base;
224 
225 	struct rpmsg_endpoint	*smd_channel;
226 
227 	struct qcom_smem_state  *tx_enable_state;
228 	unsigned		tx_enable_state_bit;
229 	struct qcom_smem_state	*tx_rings_empty_state;
230 	unsigned		tx_rings_empty_state_bit;
231 
232 	/* prevents concurrent FW reconfiguration */
233 	struct mutex		conf_mutex;
234 
235 	/*
236 	 * smd_buf must be protected with smd_mutex to garantee
237 	 * that all messages are sent one after another
238 	 */
239 	u8			*hal_buf;
240 	size_t			hal_rsp_len;
241 	struct mutex		hal_mutex;
242 	struct completion	hal_rsp_compl;
243 	struct workqueue_struct	*hal_ind_wq;
244 	struct work_struct	hal_ind_work;
245 	spinlock_t		hal_ind_lock;
246 	struct list_head	hal_ind_queue;
247 
248 	struct cfg80211_scan_request *scan_req;
249 	bool			sw_scan;
250 	u8			sw_scan_opchannel;
251 	u8			sw_scan_channel;
252 	struct ieee80211_vif	*sw_scan_vif;
253 	struct mutex		scan_lock;
254 	bool			scan_aborted;
255 
256 	/* DXE channels */
257 	struct wcn36xx_dxe_ch	dxe_tx_l_ch;	/* TX low */
258 	struct wcn36xx_dxe_ch	dxe_tx_h_ch;	/* TX high */
259 	struct wcn36xx_dxe_ch	dxe_rx_l_ch;	/* RX low */
260 	struct wcn36xx_dxe_ch	dxe_rx_h_ch;	/* RX high */
261 
262 	/* For synchronization of DXE resources from BH, IRQ and WQ contexts */
263 	spinlock_t	dxe_lock;
264 	bool                    queues_stopped;
265 
266 	/* Memory pools */
267 	struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
268 	struct wcn36xx_dxe_mem_pool data_mem_pool;
269 
270 	struct sk_buff		*tx_ack_skb;
271 	struct timer_list	tx_ack_timer;
272 
273 	/* For A-MSDU re-aggregation */
274 	struct sk_buff_head amsdu;
275 
276 	/* RF module */
277 	unsigned		rf_id;
278 
279 #ifdef CONFIG_WCN36XX_DEBUGFS
280 	/* Debug file system entry */
281 	struct wcn36xx_dfs_entry    dfs;
282 #endif /* CONFIG_WCN36XX_DEBUGFS */
283 };
284 
285 static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
286 					 u8 major,
287 					 u8 minor,
288 					 u8 version,
289 					 u8 revision)
290 {
291 	return (wcn->fw_major == major &&
292 		wcn->fw_minor == minor &&
293 		wcn->fw_version == version &&
294 		wcn->fw_revision == revision);
295 }
296 void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
297 void wcn36xx_set_default_rates_v1(struct wcn36xx_hal_supported_rates_v1 *rates);
298 
299 static inline
300 struct ieee80211_sta *wcn36xx_priv_to_sta(struct wcn36xx_sta *sta_priv)
301 {
302 	return container_of((void *)sta_priv, struct ieee80211_sta, drv_priv);
303 }
304 
305 static inline
306 struct wcn36xx_vif *wcn36xx_vif_to_priv(struct ieee80211_vif *vif)
307 {
308 	return (struct wcn36xx_vif *) vif->drv_priv;
309 }
310 
311 static inline
312 struct ieee80211_vif *wcn36xx_priv_to_vif(struct wcn36xx_vif *vif_priv)
313 {
314 	return container_of((void *) vif_priv, struct ieee80211_vif, drv_priv);
315 }
316 
317 static inline
318 struct wcn36xx_sta *wcn36xx_sta_to_priv(struct ieee80211_sta *sta)
319 {
320 	return (struct wcn36xx_sta *)sta->drv_priv;
321 }
322 
323 #endif	/* _WCN36XX_H_ */
324