1 /* 2 * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "txrx.h" 20 21 static inline int get_rssi0(struct wcn36xx_rx_bd *bd) 22 { 23 return 100 - ((bd->phy_stat0 >> 24) & 0xff); 24 } 25 26 struct wcn36xx_rate { 27 u16 bitrate; 28 u16 mcs_or_legacy_index; 29 enum mac80211_rx_encoding encoding; 30 enum mac80211_rx_encoding_flags encoding_flags; 31 enum rate_info_bw bw; 32 }; 33 34 /* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used 35 * for 11A Channels. 36 */ 37 static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 38 108, 112, 116, 120, 124, 128, 132, 136, 140, 39 149, 153, 157, 161, 165, 144 }; 40 41 static const struct wcn36xx_rate wcn36xx_rate_table[] = { 42 /* 11b rates */ 43 { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 44 { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 45 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 46 { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 47 48 /* 11b SP (short preamble) */ 49 { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 50 { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 51 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 52 { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 53 54 /* 11ag */ 55 { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 56 { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 57 { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 58 { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 59 { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 60 { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 61 { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 62 { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 63 64 /* 11n */ 65 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 66 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 67 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 68 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 69 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 70 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 71 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 72 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 73 74 /* 11n SGI */ 75 { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 76 { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 77 { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 78 { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 79 { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 80 { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 81 { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 82 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 83 84 /* 11n GF (greenfield) */ 85 { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 86 { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 87 { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 88 { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 89 { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 90 { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 91 { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 92 { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 93 94 /* 11n CB (channel bonding) */ 95 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 96 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 97 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 98 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 99 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 100 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 101 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 102 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 103 104 /* 11n CB + SGI */ 105 { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 106 { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 107 { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 108 { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 109 { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 110 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 111 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 112 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 113 114 /* 11n GF + CB */ 115 { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 116 { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 117 { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 118 { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 119 { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 120 { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 121 { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 122 { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 123 124 /* 11ac reserved indices */ 125 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 126 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 127 128 /* 11ac 20 MHz 800ns GI MCS 0-8 */ 129 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 130 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 131 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 132 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 133 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 134 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 135 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 136 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 137 { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 138 139 /* 11ac reserved indices */ 140 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 141 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 142 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 143 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 144 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 145 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 146 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 147 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 148 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 149 150 /* 11ac 20 MHz 400ns SGI MCS 6-8 */ 151 { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 152 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 153 { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 154 155 /* 11ac reserved indices */ 156 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 157 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 158 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 159 160 /* 11ac 40 MHz 800ns GI MCS 0-9 */ 161 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 162 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 163 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 164 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 165 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 166 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 167 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 168 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 169 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 170 { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 171 { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 172 173 /* 11ac reserved indices */ 174 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 175 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 176 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 177 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 178 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 179 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 180 181 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 182 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 183 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 184 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 185 186 /* 11ac reserved index */ 187 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 188 189 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 190 { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 191 { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 192 193 /* 11ac reserved index */ 194 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 195 196 /* 11ac 80 MHz 800ns GI MCS 0-7 */ 197 { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80}, 198 { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80}, 199 { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80}, 200 { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80}, 201 { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80}, 202 { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80}, 203 { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80}, 204 { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80}, 205 206 /* 11 ac reserved index */ 207 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 208 209 /* 11ac 80 MHz 800 ns GI MCS 8-9 */ 210 { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80}, 211 { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80}, 212 213 /* 11 ac reserved indices */ 214 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 215 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 216 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 217 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 218 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 219 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 220 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 221 222 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */ 223 { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 224 { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 225 226 /* 11ac reserved index */ 227 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 228 229 /* 11ac 80 MHz 400ns SGI MCS 8-9 */ 230 { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 231 { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 232 }; 233 234 static struct sk_buff *wcn36xx_unchain_msdu(struct sk_buff_head *amsdu) 235 { 236 struct sk_buff *skb, *first; 237 int total_len = 0; 238 int space; 239 240 first = __skb_dequeue(amsdu); 241 242 skb_queue_walk(amsdu, skb) 243 total_len += skb->len; 244 245 space = total_len - skb_tailroom(first); 246 if (space > 0 && pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0) { 247 __skb_queue_head(amsdu, first); 248 return NULL; 249 } 250 251 /* Walk list again, copying contents into msdu_head */ 252 while ((skb = __skb_dequeue(amsdu))) { 253 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 254 skb->len); 255 dev_kfree_skb_irq(skb); 256 } 257 258 return first; 259 } 260 261 static void __skb_queue_purge_irq(struct sk_buff_head *list) 262 { 263 struct sk_buff *skb; 264 265 while ((skb = __skb_dequeue(list)) != NULL) 266 dev_kfree_skb_irq(skb); 267 } 268 269 int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb) 270 { 271 struct ieee80211_rx_status status; 272 const struct wcn36xx_rate *rate; 273 struct ieee80211_hdr *hdr; 274 struct wcn36xx_rx_bd *bd; 275 struct ieee80211_supported_band *sband; 276 u16 fc, sn; 277 278 /* 279 * All fields must be 0, otherwise it can lead to 280 * unexpected consequences. 281 */ 282 memset(&status, 0, sizeof(status)); 283 284 bd = (struct wcn36xx_rx_bd *)skb->data; 285 buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32)); 286 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, 287 "BD <<< ", (char *)bd, 288 sizeof(struct wcn36xx_rx_bd)); 289 290 if (bd->pdu.mpdu_data_off <= bd->pdu.mpdu_header_off || 291 bd->pdu.mpdu_len < bd->pdu.mpdu_header_len) 292 goto drop; 293 294 if (bd->asf && !bd->esf) { /* chained A-MSDU chunks */ 295 /* Sanity check */ 296 if (bd->pdu.mpdu_data_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE) 297 goto drop; 298 299 skb_put(skb, bd->pdu.mpdu_data_off + bd->pdu.mpdu_len); 300 skb_pull(skb, bd->pdu.mpdu_data_off); 301 302 /* Only set status for first chained BD (with mac header) */ 303 goto done; 304 } 305 306 if (bd->pdu.mpdu_header_off < sizeof(*bd) || 307 bd->pdu.mpdu_header_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE) 308 goto drop; 309 310 skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len); 311 skb_pull(skb, bd->pdu.mpdu_header_off); 312 313 hdr = (struct ieee80211_hdr *) skb->data; 314 fc = __le16_to_cpu(hdr->frame_control); 315 sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)); 316 317 status.mactime = 10; 318 status.signal = -get_rssi0(bd); 319 status.antenna = 1; 320 status.flag = 0; 321 status.rx_flags = 0; 322 status.flag |= RX_FLAG_IV_STRIPPED | 323 RX_FLAG_MMIC_STRIPPED | 324 RX_FLAG_DECRYPTED; 325 326 wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag); 327 328 if (bd->scan_learn) { 329 /* If packet originate from hardware scanning, extract the 330 * band/channel from bd descriptor. 331 */ 332 u8 hwch = (bd->reserved0 << 4) + bd->rx_ch; 333 334 if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) { 335 status.band = NL80211_BAND_5GHZ; 336 status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1], 337 status.band); 338 } else { 339 status.band = NL80211_BAND_2GHZ; 340 status.freq = ieee80211_channel_to_frequency(hwch, status.band); 341 } 342 } else { 343 status.band = WCN36XX_BAND(wcn); 344 status.freq = WCN36XX_CENTER_FREQ(wcn); 345 } 346 347 if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) { 348 rate = &wcn36xx_rate_table[bd->rate_id]; 349 status.encoding = rate->encoding; 350 status.enc_flags = rate->encoding_flags; 351 status.bw = rate->bw; 352 status.rate_idx = rate->mcs_or_legacy_index; 353 sband = wcn->hw->wiphy->bands[status.band]; 354 status.nss = 1; 355 356 if (status.band == NL80211_BAND_5GHZ && 357 status.encoding == RX_ENC_LEGACY && 358 status.rate_idx >= sband->n_bitrates) { 359 /* no dsss rates in 5Ghz rates table */ 360 status.rate_idx -= 4; 361 } 362 } else { 363 status.encoding = 0; 364 status.bw = 0; 365 status.enc_flags = 0; 366 status.rate_idx = 0; 367 } 368 369 if (ieee80211_is_beacon(hdr->frame_control) || 370 ieee80211_is_probe_resp(hdr->frame_control)) 371 status.boottime_ns = ktime_get_boottime_ns(); 372 373 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 374 375 if (ieee80211_is_beacon(hdr->frame_control)) { 376 wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n", 377 skb, skb->len, fc, sn); 378 wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ", 379 (char *)skb->data, skb->len); 380 } else { 381 wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n", 382 skb, skb->len, fc, sn); 383 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ", 384 (char *)skb->data, skb->len); 385 } 386 387 done: 388 /* Chained AMSDU ? slow path */ 389 if (unlikely(bd->asf && !(bd->lsf && bd->esf))) { 390 if (bd->esf && !skb_queue_empty(&wcn->amsdu)) { 391 wcn36xx_err("Discarding non complete chain"); 392 __skb_queue_purge_irq(&wcn->amsdu); 393 } 394 395 __skb_queue_tail(&wcn->amsdu, skb); 396 397 if (!bd->lsf) 398 return 0; /* Not the last AMSDU, wait for more */ 399 400 skb = wcn36xx_unchain_msdu(&wcn->amsdu); 401 if (!skb) 402 goto drop; 403 } 404 405 ieee80211_rx_irqsafe(wcn->hw, skb); 406 407 return 0; 408 409 drop: /* drop everything */ 410 wcn36xx_err("Drop frame! skb:%p len:%u hoff:%u doff:%u asf=%u esf=%u lsf=%u\n", 411 skb, bd->pdu.mpdu_len, bd->pdu.mpdu_header_off, 412 bd->pdu.mpdu_data_off, bd->asf, bd->esf, bd->lsf); 413 414 dev_kfree_skb_irq(skb); 415 __skb_queue_purge_irq(&wcn->amsdu); 416 417 return -EINVAL; 418 } 419 420 static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd, 421 u32 mpdu_header_len, 422 u32 len, 423 u16 tid) 424 { 425 bd->pdu.mpdu_header_len = mpdu_header_len; 426 bd->pdu.mpdu_header_off = sizeof(*bd); 427 bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len + 428 bd->pdu.mpdu_header_off; 429 bd->pdu.mpdu_len = len; 430 bd->pdu.tid = tid; 431 } 432 433 static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn, 434 u8 *addr) 435 { 436 struct wcn36xx_vif *vif_priv = NULL; 437 struct ieee80211_vif *vif = NULL; 438 list_for_each_entry(vif_priv, &wcn->vif_list, list) { 439 vif = wcn36xx_priv_to_vif(vif_priv); 440 if (memcmp(vif->addr, addr, ETH_ALEN) == 0) 441 return vif_priv; 442 } 443 wcn36xx_warn("vif %pM not found\n", addr); 444 return NULL; 445 } 446 447 static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn, 448 struct wcn36xx_sta *sta_priv, 449 struct sk_buff *skb) 450 { 451 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 452 struct ieee80211_sta *sta; 453 u8 *qc, tid; 454 455 if (!conf_is_ht(&wcn->hw->conf)) 456 return; 457 458 sta = wcn36xx_priv_to_sta(sta_priv); 459 460 if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control))) 461 return; 462 463 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO) 464 return; 465 466 qc = ieee80211_get_qos_ctl(hdr); 467 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 468 469 spin_lock(&sta_priv->ampdu_lock); 470 if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE) 471 goto out_unlock; 472 473 if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) { 474 sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START; 475 sta_priv->non_agg_frame_ct = 0; 476 ieee80211_start_tx_ba_session(sta, tid, 0); 477 } 478 out_unlock: 479 spin_unlock(&sta_priv->ampdu_lock); 480 } 481 482 static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd, 483 struct wcn36xx *wcn, 484 struct wcn36xx_vif **vif_priv, 485 struct wcn36xx_sta *sta_priv, 486 struct sk_buff *skb, 487 bool bcast) 488 { 489 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 490 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 491 struct ieee80211_vif *vif = NULL; 492 struct wcn36xx_vif *__vif_priv = NULL; 493 bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control); 494 u16 tid = 0; 495 496 bd->bd_rate = WCN36XX_BD_RATE_DATA; 497 498 /* 499 * For not unicast frames mac80211 will not set sta pointer so use 500 * self_sta_index instead. 501 */ 502 if (sta_priv) { 503 __vif_priv = sta_priv->vif; 504 vif = wcn36xx_priv_to_vif(__vif_priv); 505 506 bd->dpu_sign = sta_priv->ucast_dpu_sign; 507 if (vif->type == NL80211_IFTYPE_STATION) { 508 bd->sta_index = sta_priv->bss_sta_index; 509 bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index; 510 } else if (vif->type == NL80211_IFTYPE_AP || 511 vif->type == NL80211_IFTYPE_ADHOC || 512 vif->type == NL80211_IFTYPE_MESH_POINT) { 513 bd->sta_index = sta_priv->sta_index; 514 bd->dpu_desc_idx = sta_priv->dpu_desc_index; 515 } 516 } else { 517 __vif_priv = get_vif_by_addr(wcn, hdr->addr2); 518 bd->sta_index = __vif_priv->self_sta_index; 519 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 520 bd->dpu_sign = __vif_priv->self_ucast_dpu_sign; 521 } 522 523 if (is_data_qos) { 524 tid = ieee80211_get_tid(hdr); 525 /* TID->QID is one-to-one mapping */ 526 bd->queue_id = tid; 527 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_QOS; 528 } else { 529 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS; 530 } 531 532 if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT || 533 (sta_priv && !sta_priv->is_data_encrypted)) { 534 bd->dpu_ne = 1; 535 } 536 537 if (ieee80211_is_any_nullfunc(hdr->frame_control)) { 538 /* Don't use a regular queue for null packet (no ampdu) */ 539 bd->queue_id = WCN36XX_TX_U_WQ_ID; 540 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 541 if (ieee80211_is_qos_nullfunc(hdr->frame_control)) 542 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST; 543 } 544 545 if (bcast) { 546 bd->ub = 1; 547 bd->ack_policy = 1; 548 } 549 *vif_priv = __vif_priv; 550 551 wcn36xx_set_tx_pdu(bd, 552 is_data_qos ? 553 sizeof(struct ieee80211_qos_hdr) : 554 sizeof(struct ieee80211_hdr_3addr), 555 skb->len, tid); 556 557 if (sta_priv && is_data_qos) 558 wcn36xx_tx_start_ampdu(wcn, sta_priv, skb); 559 } 560 561 static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd, 562 struct wcn36xx *wcn, 563 struct wcn36xx_vif **vif_priv, 564 struct sk_buff *skb, 565 bool bcast) 566 { 567 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 568 struct wcn36xx_vif *__vif_priv = 569 get_vif_by_addr(wcn, hdr->addr2); 570 bd->sta_index = __vif_priv->self_sta_index; 571 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 572 bd->dpu_ne = 1; 573 574 /* default rate for unicast */ 575 if (ieee80211_is_mgmt(hdr->frame_control)) 576 bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ? 577 WCN36XX_BD_RATE_CTRL : 578 WCN36XX_BD_RATE_MGMT; 579 else if (ieee80211_is_ctl(hdr->frame_control)) 580 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 581 else 582 wcn36xx_warn("frame control type unknown\n"); 583 584 /* 585 * In joining state trick hardware that probe is sent as 586 * unicast even if address is broadcast. 587 */ 588 if (__vif_priv->is_joining && 589 ieee80211_is_probe_req(hdr->frame_control)) 590 bcast = false; 591 592 if (bcast) { 593 /* broadcast */ 594 bd->ub = 1; 595 /* No ack needed not unicast */ 596 bd->ack_policy = 1; 597 bd->queue_id = WCN36XX_TX_B_WQ_ID; 598 } else 599 bd->queue_id = WCN36XX_TX_U_WQ_ID; 600 *vif_priv = __vif_priv; 601 602 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS; 603 604 wcn36xx_set_tx_pdu(bd, 605 ieee80211_is_data_qos(hdr->frame_control) ? 606 sizeof(struct ieee80211_qos_hdr) : 607 sizeof(struct ieee80211_hdr_3addr), 608 skb->len, WCN36XX_TID); 609 } 610 611 int wcn36xx_start_tx(struct wcn36xx *wcn, 612 struct wcn36xx_sta *sta_priv, 613 struct sk_buff *skb) 614 { 615 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 616 struct wcn36xx_vif *vif_priv = NULL; 617 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 618 bool is_low = ieee80211_is_data(hdr->frame_control); 619 bool bcast = is_broadcast_ether_addr(hdr->addr1) || 620 is_multicast_ether_addr(hdr->addr1); 621 bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) && 622 !(info->flags & IEEE80211_TX_CTL_NO_ACK); 623 struct wcn36xx_tx_bd bd; 624 int ret; 625 626 memset(&bd, 0, sizeof(bd)); 627 628 wcn36xx_dbg(WCN36XX_DBG_TX, 629 "tx skb %p len %d fc %04x sn %d %s %s\n", 630 skb, skb->len, __le16_to_cpu(hdr->frame_control), 631 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)), 632 is_low ? "low" : "high", bcast ? "bcast" : "ucast"); 633 634 wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len); 635 636 bd.dpu_rf = WCN36XX_BMU_WQ_TX; 637 638 if (unlikely(ack_ind)) { 639 wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n"); 640 641 /* Only one at a time is supported by fw. Stop the TX queues 642 * until the ack status gets back. 643 */ 644 ieee80211_stop_queues(wcn->hw); 645 646 /* Request ack indication from the firmware */ 647 bd.tx_comp = 1; 648 } 649 650 /* Data frames served first*/ 651 if (is_low) 652 wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast); 653 else 654 /* MGMT and CTRL frames are handeld here*/ 655 wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast); 656 657 buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32)); 658 bd.tx_bd_sign = 0xbdbdbdbd; 659 660 ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low); 661 if (unlikely(ret && ack_ind)) { 662 /* If the skb has not been transmitted, resume TX queue */ 663 ieee80211_wake_queues(wcn->hw); 664 } 665 666 return ret; 667 } 668