1 /* 2 * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "txrx.h" 20 21 static inline int get_rssi0(struct wcn36xx_rx_bd *bd) 22 { 23 return 100 - ((bd->phy_stat0 >> 24) & 0xff); 24 } 25 26 struct wcn36xx_rate { 27 u16 bitrate; 28 u16 mcs_or_legacy_index; 29 enum mac80211_rx_encoding encoding; 30 enum mac80211_rx_encoding_flags encoding_flags; 31 enum rate_info_bw bw; 32 }; 33 34 static const struct wcn36xx_rate wcn36xx_rate_table[] = { 35 /* 11b rates */ 36 { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 37 { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 38 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 39 { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 40 41 /* 11b SP (short preamble) */ 42 { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 43 { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 44 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 45 { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 46 47 /* 11ag */ 48 { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 49 { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 50 { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 51 { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 52 { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 53 { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 54 { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 55 { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 56 57 /* 11n */ 58 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 59 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 60 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 61 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 62 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 63 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 64 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 65 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 66 67 /* 11n SGI */ 68 { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 69 { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 70 { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 71 { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 72 { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 73 { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 74 { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 75 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 76 77 /* 11n GF (greenfield) */ 78 { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 79 { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 80 { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 81 { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 82 { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 83 { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 84 { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 85 { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 86 87 /* 11n CB (channel bonding) */ 88 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 89 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 90 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 91 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 92 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 93 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 94 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 95 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 96 97 /* 11n CB + SGI */ 98 { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 99 { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 100 { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 101 { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 102 { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 103 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 104 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 105 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 106 107 /* 11n GF + CB */ 108 { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 109 { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 110 { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 111 { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 112 { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 113 { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 114 { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 115 { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 116 117 /* 11ac reserved indices */ 118 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 119 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 120 121 /* 11ac 20 MHz 800ns GI MCS 0-8 */ 122 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 123 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 124 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 125 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 126 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 127 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 128 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 129 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 130 { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 131 132 /* 11ac reserved indices */ 133 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 134 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 135 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 136 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 137 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 138 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 139 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 140 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 141 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 142 143 /* 11ac 20 MHz 400ns SGI MCS 6-8 */ 144 { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 145 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 146 { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 147 148 /* 11ac reserved indices */ 149 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 150 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 151 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 152 153 /* 11ac 40 MHz 800ns GI MCS 0-9 */ 154 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 155 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 156 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 157 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 158 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 159 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 160 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 161 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 162 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 163 { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 164 { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 165 166 /* 11ac reserved indices */ 167 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 168 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 169 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 170 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 171 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 172 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 173 174 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 175 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 176 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 177 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 178 179 /* 11ac reserved index */ 180 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 181 182 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 183 { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 184 { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 185 186 /* 11ac reserved index */ 187 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 188 189 /* 11ac 80 MHz 800ns GI MCS 0-7 */ 190 { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80}, 191 { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80}, 192 { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80}, 193 { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80}, 194 { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80}, 195 { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80}, 196 { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80}, 197 { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80}, 198 199 /* 11 ac reserved index */ 200 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 201 202 /* 11ac 80 MHz 800 ns GI MCS 8-9 */ 203 { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80}, 204 { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80}, 205 206 /* 11 ac reserved indices */ 207 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 208 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 209 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 210 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 211 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 212 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 213 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 214 215 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */ 216 { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 217 { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 218 219 /* 11ac reserved index */ 220 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 221 222 /* 11ac 80 MHz 400ns SGI MCS 8-9 */ 223 { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 224 { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 225 }; 226 227 int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb) 228 { 229 struct ieee80211_rx_status status; 230 const struct wcn36xx_rate *rate; 231 struct ieee80211_hdr *hdr; 232 struct wcn36xx_rx_bd *bd; 233 struct ieee80211_supported_band *sband; 234 u16 fc, sn; 235 236 /* 237 * All fields must be 0, otherwise it can lead to 238 * unexpected consequences. 239 */ 240 memset(&status, 0, sizeof(status)); 241 242 bd = (struct wcn36xx_rx_bd *)skb->data; 243 buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32)); 244 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, 245 "BD <<< ", (char *)bd, 246 sizeof(struct wcn36xx_rx_bd)); 247 248 skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len); 249 skb_pull(skb, bd->pdu.mpdu_header_off); 250 251 hdr = (struct ieee80211_hdr *) skb->data; 252 fc = __le16_to_cpu(hdr->frame_control); 253 sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)); 254 255 status.freq = WCN36XX_CENTER_FREQ(wcn); 256 status.band = WCN36XX_BAND(wcn); 257 status.mactime = 10; 258 status.signal = -get_rssi0(bd); 259 status.antenna = 1; 260 status.flag = 0; 261 status.rx_flags = 0; 262 status.flag |= RX_FLAG_IV_STRIPPED | 263 RX_FLAG_MMIC_STRIPPED | 264 RX_FLAG_DECRYPTED; 265 266 wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag); 267 268 if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) { 269 rate = &wcn36xx_rate_table[bd->rate_id]; 270 status.encoding = rate->encoding; 271 status.enc_flags = rate->encoding_flags; 272 status.bw = rate->bw; 273 status.rate_idx = rate->mcs_or_legacy_index; 274 sband = wcn->hw->wiphy->bands[status.band]; 275 status.nss = 1; 276 277 if (status.band == NL80211_BAND_5GHZ && 278 status.encoding == RX_ENC_LEGACY && 279 status.rate_idx >= sband->n_bitrates) { 280 /* no dsss rates in 5Ghz rates table */ 281 status.rate_idx -= 4; 282 } 283 } else { 284 status.encoding = 0; 285 status.bw = 0; 286 status.enc_flags = 0; 287 status.rate_idx = 0; 288 } 289 290 if (ieee80211_is_beacon(hdr->frame_control) || 291 ieee80211_is_probe_resp(hdr->frame_control)) 292 status.boottime_ns = ktime_get_boottime_ns(); 293 294 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 295 296 if (ieee80211_is_beacon(hdr->frame_control)) { 297 wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n", 298 skb, skb->len, fc, sn); 299 wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ", 300 (char *)skb->data, skb->len); 301 } else { 302 wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n", 303 skb, skb->len, fc, sn); 304 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ", 305 (char *)skb->data, skb->len); 306 } 307 308 ieee80211_rx_irqsafe(wcn->hw, skb); 309 310 return 0; 311 } 312 313 static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd, 314 u32 mpdu_header_len, 315 u32 len, 316 u16 tid) 317 { 318 bd->pdu.mpdu_header_len = mpdu_header_len; 319 bd->pdu.mpdu_header_off = sizeof(*bd); 320 bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len + 321 bd->pdu.mpdu_header_off; 322 bd->pdu.mpdu_len = len; 323 bd->pdu.tid = tid; 324 /* Use seq number generated by mac80211 */ 325 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST; 326 } 327 328 static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn, 329 u8 *addr) 330 { 331 struct wcn36xx_vif *vif_priv = NULL; 332 struct ieee80211_vif *vif = NULL; 333 list_for_each_entry(vif_priv, &wcn->vif_list, list) { 334 vif = wcn36xx_priv_to_vif(vif_priv); 335 if (memcmp(vif->addr, addr, ETH_ALEN) == 0) 336 return vif_priv; 337 } 338 wcn36xx_warn("vif %pM not found\n", addr); 339 return NULL; 340 } 341 342 static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn, 343 struct wcn36xx_sta *sta_priv, 344 struct sk_buff *skb) 345 { 346 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 347 struct ieee80211_sta *sta; 348 u8 *qc, tid; 349 350 if (!conf_is_ht(&wcn->hw->conf)) 351 return; 352 353 sta = wcn36xx_priv_to_sta(sta_priv); 354 355 if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control))) 356 return; 357 358 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO) 359 return; 360 361 qc = ieee80211_get_qos_ctl(hdr); 362 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 363 364 spin_lock(&sta_priv->ampdu_lock); 365 if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE) 366 goto out_unlock; 367 368 if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) { 369 sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START; 370 sta_priv->non_agg_frame_ct = 0; 371 ieee80211_start_tx_ba_session(sta, tid, 0); 372 } 373 out_unlock: 374 spin_unlock(&sta_priv->ampdu_lock); 375 } 376 377 static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd, 378 struct wcn36xx *wcn, 379 struct wcn36xx_vif **vif_priv, 380 struct wcn36xx_sta *sta_priv, 381 struct sk_buff *skb, 382 bool bcast) 383 { 384 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 385 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 386 struct ieee80211_vif *vif = NULL; 387 struct wcn36xx_vif *__vif_priv = NULL; 388 bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control); 389 u16 tid = 0; 390 391 bd->bd_rate = WCN36XX_BD_RATE_DATA; 392 393 /* 394 * For not unicast frames mac80211 will not set sta pointer so use 395 * self_sta_index instead. 396 */ 397 if (sta_priv) { 398 __vif_priv = sta_priv->vif; 399 vif = wcn36xx_priv_to_vif(__vif_priv); 400 401 bd->dpu_sign = sta_priv->ucast_dpu_sign; 402 if (vif->type == NL80211_IFTYPE_STATION) { 403 bd->sta_index = sta_priv->bss_sta_index; 404 bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index; 405 } else if (vif->type == NL80211_IFTYPE_AP || 406 vif->type == NL80211_IFTYPE_ADHOC || 407 vif->type == NL80211_IFTYPE_MESH_POINT) { 408 bd->sta_index = sta_priv->sta_index; 409 bd->dpu_desc_idx = sta_priv->dpu_desc_index; 410 } 411 } else { 412 __vif_priv = get_vif_by_addr(wcn, hdr->addr2); 413 bd->sta_index = __vif_priv->self_sta_index; 414 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 415 bd->dpu_sign = __vif_priv->self_ucast_dpu_sign; 416 } 417 418 if (is_data_qos) { 419 tid = ieee80211_get_tid(hdr); 420 /* TID->QID is one-to-one mapping */ 421 bd->queue_id = tid; 422 } 423 424 if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT || 425 (sta_priv && !sta_priv->is_data_encrypted)) { 426 bd->dpu_ne = 1; 427 } 428 429 if (ieee80211_is_any_nullfunc(hdr->frame_control)) { 430 /* Don't use a regular queue for null packet (no ampdu) */ 431 bd->queue_id = WCN36XX_TX_U_WQ_ID; 432 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 433 } 434 435 if (bcast) { 436 bd->ub = 1; 437 bd->ack_policy = 1; 438 } 439 *vif_priv = __vif_priv; 440 441 wcn36xx_set_tx_pdu(bd, 442 is_data_qos ? 443 sizeof(struct ieee80211_qos_hdr) : 444 sizeof(struct ieee80211_hdr_3addr), 445 skb->len, tid); 446 447 if (sta_priv && is_data_qos) 448 wcn36xx_tx_start_ampdu(wcn, sta_priv, skb); 449 } 450 451 static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd, 452 struct wcn36xx *wcn, 453 struct wcn36xx_vif **vif_priv, 454 struct sk_buff *skb, 455 bool bcast) 456 { 457 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 458 struct wcn36xx_vif *__vif_priv = 459 get_vif_by_addr(wcn, hdr->addr2); 460 bd->sta_index = __vif_priv->self_sta_index; 461 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 462 bd->dpu_ne = 1; 463 464 /* default rate for unicast */ 465 if (ieee80211_is_mgmt(hdr->frame_control)) 466 bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ? 467 WCN36XX_BD_RATE_CTRL : 468 WCN36XX_BD_RATE_MGMT; 469 else if (ieee80211_is_ctl(hdr->frame_control)) 470 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 471 else 472 wcn36xx_warn("frame control type unknown\n"); 473 474 /* 475 * In joining state trick hardware that probe is sent as 476 * unicast even if address is broadcast. 477 */ 478 if (__vif_priv->is_joining && 479 ieee80211_is_probe_req(hdr->frame_control)) 480 bcast = false; 481 482 if (bcast) { 483 /* broadcast */ 484 bd->ub = 1; 485 /* No ack needed not unicast */ 486 bd->ack_policy = 1; 487 bd->queue_id = WCN36XX_TX_B_WQ_ID; 488 } else 489 bd->queue_id = WCN36XX_TX_U_WQ_ID; 490 *vif_priv = __vif_priv; 491 492 wcn36xx_set_tx_pdu(bd, 493 ieee80211_is_data_qos(hdr->frame_control) ? 494 sizeof(struct ieee80211_qos_hdr) : 495 sizeof(struct ieee80211_hdr_3addr), 496 skb->len, WCN36XX_TID); 497 } 498 499 int wcn36xx_start_tx(struct wcn36xx *wcn, 500 struct wcn36xx_sta *sta_priv, 501 struct sk_buff *skb) 502 { 503 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 504 struct wcn36xx_vif *vif_priv = NULL; 505 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 506 bool is_low = ieee80211_is_data(hdr->frame_control); 507 bool bcast = is_broadcast_ether_addr(hdr->addr1) || 508 is_multicast_ether_addr(hdr->addr1); 509 bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) && 510 !(info->flags & IEEE80211_TX_CTL_NO_ACK); 511 struct wcn36xx_tx_bd bd; 512 int ret; 513 514 memset(&bd, 0, sizeof(bd)); 515 516 wcn36xx_dbg(WCN36XX_DBG_TX, 517 "tx skb %p len %d fc %04x sn %d %s %s\n", 518 skb, skb->len, __le16_to_cpu(hdr->frame_control), 519 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)), 520 is_low ? "low" : "high", bcast ? "bcast" : "ucast"); 521 522 wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len); 523 524 bd.dpu_rf = WCN36XX_BMU_WQ_TX; 525 526 if (unlikely(ack_ind)) { 527 wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n"); 528 529 /* Only one at a time is supported by fw. Stop the TX queues 530 * until the ack status gets back. 531 */ 532 ieee80211_stop_queues(wcn->hw); 533 534 /* Request ack indication from the firmware */ 535 bd.tx_comp = 1; 536 } 537 538 /* Data frames served first*/ 539 if (is_low) 540 wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast); 541 else 542 /* MGMT and CTRL frames are handeld here*/ 543 wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast); 544 545 buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32)); 546 bd.tx_bd_sign = 0xbdbdbdbd; 547 548 ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low); 549 if (unlikely(ret && ack_ind)) { 550 /* If the skb has not been transmitted, resume TX queue */ 551 ieee80211_wake_queues(wcn->hw); 552 } 553 554 return ret; 555 } 556