1 /* 2 * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "txrx.h" 20 21 static inline int get_rssi0(struct wcn36xx_rx_bd *bd) 22 { 23 return 100 - ((bd->phy_stat0 >> 24) & 0xff); 24 } 25 26 struct wcn36xx_rate { 27 u16 bitrate; 28 u16 mcs_or_legacy_index; 29 enum mac80211_rx_encoding encoding; 30 enum mac80211_rx_encoding_flags encoding_flags; 31 enum rate_info_bw bw; 32 }; 33 34 /* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used 35 * for 11A Channels. 36 */ 37 static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 38 108, 112, 116, 120, 124, 128, 132, 136, 140, 39 149, 153, 157, 161, 165, 144 }; 40 41 static const struct wcn36xx_rate wcn36xx_rate_table[] = { 42 /* 11b rates */ 43 { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 44 { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 45 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 46 { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 47 48 /* 11b SP (short preamble) */ 49 { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 50 { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 51 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 52 { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 }, 53 54 /* 11ag */ 55 { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 56 { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 57 { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 58 { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 59 { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 60 { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 61 { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 62 { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 }, 63 64 /* 11n */ 65 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 66 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 67 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 68 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 69 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 70 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 71 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 72 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 73 74 /* 11n SGI */ 75 { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 76 { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 77 { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 78 { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 79 { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 80 { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 81 { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 82 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 83 84 /* 11n GF (greenfield) */ 85 { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 86 { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 87 { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 88 { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 89 { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 90 { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 91 { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 92 { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 }, 93 94 /* 11n CB (channel bonding) */ 95 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 96 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 97 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 98 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 99 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 100 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 101 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 102 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 103 104 /* 11n CB + SGI */ 105 { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 106 { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 107 { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 108 { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 109 { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 110 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 111 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 112 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 113 114 /* 11n GF + CB */ 115 { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 116 { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 117 { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 118 { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 119 { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 120 { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 121 { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 122 { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 }, 123 124 /* 11ac reserved indices */ 125 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 126 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 127 128 /* 11ac 20 MHz 800ns GI MCS 0-8 */ 129 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 130 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 131 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 132 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 133 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 134 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 135 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 136 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 137 { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 }, 138 139 /* 11ac reserved indices */ 140 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 141 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 142 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 143 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 144 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 145 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 146 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 147 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 148 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 149 150 /* 11ac 20 MHz 400ns SGI MCS 6-8 */ 151 { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 152 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 153 { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 }, 154 155 /* 11ac reserved indices */ 156 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 157 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 158 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 159 160 /* 11ac 40 MHz 800ns GI MCS 0-9 */ 161 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 162 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 163 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 164 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 165 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 166 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 167 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 168 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 169 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 170 { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 171 { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 }, 172 173 /* 11ac reserved indices */ 174 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 175 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 176 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 177 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 178 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 179 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 180 181 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 182 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 183 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 184 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 185 186 /* 11ac reserved index */ 187 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 188 189 /* 11ac 40 MHz 400ns SGI MCS 5-7 */ 190 { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 191 { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 192 193 /* 11ac reserved index */ 194 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 195 196 /* 11ac 80 MHz 800ns GI MCS 0-7 */ 197 { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80}, 198 { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80}, 199 { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80}, 200 { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80}, 201 { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80}, 202 { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80}, 203 { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80}, 204 { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80}, 205 206 /* 11 ac reserved index */ 207 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 208 209 /* 11ac 80 MHz 800 ns GI MCS 8-9 */ 210 { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80}, 211 { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80}, 212 213 /* 11 ac reserved indices */ 214 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 215 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 216 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 217 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 218 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 219 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 220 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 221 222 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */ 223 { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 224 { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 225 226 /* 11ac reserved index */ 227 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 }, 228 229 /* 11ac 80 MHz 400ns SGI MCS 8-9 */ 230 { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 231 { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 }, 232 }; 233 234 static struct sk_buff *wcn36xx_unchain_msdu(struct sk_buff_head *amsdu) 235 { 236 struct sk_buff *skb, *first; 237 int total_len = 0; 238 int space; 239 240 first = __skb_dequeue(amsdu); 241 242 skb_queue_walk(amsdu, skb) 243 total_len += skb->len; 244 245 space = total_len - skb_tailroom(first); 246 if (space > 0 && pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0) { 247 __skb_queue_head(amsdu, first); 248 return NULL; 249 } 250 251 /* Walk list again, copying contents into msdu_head */ 252 while ((skb = __skb_dequeue(amsdu))) { 253 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 254 skb->len); 255 dev_kfree_skb_irq(skb); 256 } 257 258 return first; 259 } 260 261 static void __skb_queue_purge_irq(struct sk_buff_head *list) 262 { 263 struct sk_buff *skb; 264 265 while ((skb = __skb_dequeue(list)) != NULL) 266 dev_kfree_skb_irq(skb); 267 } 268 269 int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb) 270 { 271 struct ieee80211_rx_status status; 272 const struct wcn36xx_rate *rate; 273 struct ieee80211_hdr *hdr; 274 struct wcn36xx_rx_bd *bd; 275 u16 fc, sn; 276 277 /* 278 * All fields must be 0, otherwise it can lead to 279 * unexpected consequences. 280 */ 281 memset(&status, 0, sizeof(status)); 282 283 bd = (struct wcn36xx_rx_bd *)skb->data; 284 buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32)); 285 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, 286 "BD <<< ", (char *)bd, 287 sizeof(struct wcn36xx_rx_bd)); 288 289 if (bd->pdu.mpdu_data_off <= bd->pdu.mpdu_header_off || 290 bd->pdu.mpdu_len < bd->pdu.mpdu_header_len) 291 goto drop; 292 293 if (bd->asf && !bd->esf) { /* chained A-MSDU chunks */ 294 /* Sanity check */ 295 if (bd->pdu.mpdu_data_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE) 296 goto drop; 297 298 skb_put(skb, bd->pdu.mpdu_data_off + bd->pdu.mpdu_len); 299 skb_pull(skb, bd->pdu.mpdu_data_off); 300 301 /* Only set status for first chained BD (with mac header) */ 302 goto done; 303 } 304 305 if (bd->pdu.mpdu_header_off < sizeof(*bd) || 306 bd->pdu.mpdu_header_off + bd->pdu.mpdu_len > WCN36XX_PKT_SIZE) 307 goto drop; 308 309 skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len); 310 skb_pull(skb, bd->pdu.mpdu_header_off); 311 312 hdr = (struct ieee80211_hdr *) skb->data; 313 fc = __le16_to_cpu(hdr->frame_control); 314 sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)); 315 316 status.mactime = 10; 317 status.signal = -get_rssi0(bd); 318 status.antenna = 1; 319 status.flag = 0; 320 status.rx_flags = 0; 321 status.flag |= RX_FLAG_IV_STRIPPED | 322 RX_FLAG_MMIC_STRIPPED | 323 RX_FLAG_DECRYPTED; 324 325 wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag); 326 327 if (bd->scan_learn) { 328 /* If packet originate from hardware scanning, extract the 329 * band/channel from bd descriptor. 330 */ 331 u8 hwch = (bd->reserved0 << 4) + bd->rx_ch; 332 333 if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) { 334 status.band = NL80211_BAND_5GHZ; 335 status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1], 336 status.band); 337 } else { 338 status.band = NL80211_BAND_2GHZ; 339 status.freq = ieee80211_channel_to_frequency(hwch, status.band); 340 } 341 } else { 342 status.band = WCN36XX_BAND(wcn); 343 status.freq = WCN36XX_CENTER_FREQ(wcn); 344 } 345 346 if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) { 347 rate = &wcn36xx_rate_table[bd->rate_id]; 348 status.encoding = rate->encoding; 349 status.enc_flags = rate->encoding_flags; 350 status.bw = rate->bw; 351 status.rate_idx = rate->mcs_or_legacy_index; 352 status.nss = 1; 353 354 if (status.band == NL80211_BAND_5GHZ && 355 status.encoding == RX_ENC_LEGACY && 356 status.rate_idx >= 4) { 357 /* no dsss rates in 5Ghz rates table */ 358 status.rate_idx -= 4; 359 } 360 } else { 361 status.encoding = 0; 362 status.bw = 0; 363 status.enc_flags = 0; 364 status.rate_idx = 0; 365 } 366 367 if (ieee80211_is_beacon(hdr->frame_control) || 368 ieee80211_is_probe_resp(hdr->frame_control)) 369 status.boottime_ns = ktime_get_boottime_ns(); 370 371 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 372 373 if (ieee80211_is_beacon(hdr->frame_control)) { 374 wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n", 375 skb, skb->len, fc, sn); 376 wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ", 377 (char *)skb->data, skb->len); 378 } else { 379 wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n", 380 skb, skb->len, fc, sn); 381 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ", 382 (char *)skb->data, skb->len); 383 } 384 385 done: 386 /* Chained AMSDU ? slow path */ 387 if (unlikely(bd->asf && !(bd->lsf && bd->esf))) { 388 if (bd->esf && !skb_queue_empty(&wcn->amsdu)) { 389 wcn36xx_err("Discarding non complete chain"); 390 __skb_queue_purge_irq(&wcn->amsdu); 391 } 392 393 __skb_queue_tail(&wcn->amsdu, skb); 394 395 if (!bd->lsf) 396 return 0; /* Not the last AMSDU, wait for more */ 397 398 skb = wcn36xx_unchain_msdu(&wcn->amsdu); 399 if (!skb) 400 goto drop; 401 } 402 403 ieee80211_rx_irqsafe(wcn->hw, skb); 404 405 return 0; 406 407 drop: /* drop everything */ 408 wcn36xx_err("Drop frame! skb:%p len:%u hoff:%u doff:%u asf=%u esf=%u lsf=%u\n", 409 skb, bd->pdu.mpdu_len, bd->pdu.mpdu_header_off, 410 bd->pdu.mpdu_data_off, bd->asf, bd->esf, bd->lsf); 411 412 dev_kfree_skb_irq(skb); 413 __skb_queue_purge_irq(&wcn->amsdu); 414 415 return -EINVAL; 416 } 417 418 static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd, 419 u32 mpdu_header_len, 420 u32 len, 421 u16 tid) 422 { 423 bd->pdu.mpdu_header_len = mpdu_header_len; 424 bd->pdu.mpdu_header_off = sizeof(*bd); 425 bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len + 426 bd->pdu.mpdu_header_off; 427 bd->pdu.mpdu_len = len; 428 bd->pdu.tid = tid; 429 } 430 431 static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn, 432 u8 *addr) 433 { 434 struct wcn36xx_vif *vif_priv = NULL; 435 struct ieee80211_vif *vif = NULL; 436 list_for_each_entry(vif_priv, &wcn->vif_list, list) { 437 vif = wcn36xx_priv_to_vif(vif_priv); 438 if (memcmp(vif->addr, addr, ETH_ALEN) == 0) 439 return vif_priv; 440 } 441 wcn36xx_warn("vif %pM not found\n", addr); 442 return NULL; 443 } 444 445 static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn, 446 struct wcn36xx_sta *sta_priv, 447 struct sk_buff *skb) 448 { 449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 450 struct ieee80211_sta *sta; 451 u8 *qc, tid; 452 453 if (!conf_is_ht(&wcn->hw->conf)) 454 return; 455 456 sta = wcn36xx_priv_to_sta(sta_priv); 457 458 if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control))) 459 return; 460 461 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO) 462 return; 463 464 qc = ieee80211_get_qos_ctl(hdr); 465 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 466 467 spin_lock(&sta_priv->ampdu_lock); 468 if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE) 469 goto out_unlock; 470 471 if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) { 472 sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START; 473 sta_priv->non_agg_frame_ct = 0; 474 ieee80211_start_tx_ba_session(sta, tid, 0); 475 } 476 out_unlock: 477 spin_unlock(&sta_priv->ampdu_lock); 478 } 479 480 static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd, 481 struct wcn36xx *wcn, 482 struct wcn36xx_vif **vif_priv, 483 struct wcn36xx_sta *sta_priv, 484 struct sk_buff *skb, 485 bool bcast) 486 { 487 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 488 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 489 struct ieee80211_vif *vif = NULL; 490 struct wcn36xx_vif *__vif_priv = NULL; 491 bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control); 492 u16 tid = 0; 493 494 bd->bd_rate = WCN36XX_BD_RATE_DATA; 495 496 /* 497 * For not unicast frames mac80211 will not set sta pointer so use 498 * self_sta_index instead. 499 */ 500 if (sta_priv) { 501 __vif_priv = sta_priv->vif; 502 vif = wcn36xx_priv_to_vif(__vif_priv); 503 504 bd->dpu_sign = sta_priv->ucast_dpu_sign; 505 if (vif->type == NL80211_IFTYPE_STATION) { 506 bd->sta_index = sta_priv->bss_sta_index; 507 bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index; 508 } else if (vif->type == NL80211_IFTYPE_AP || 509 vif->type == NL80211_IFTYPE_ADHOC || 510 vif->type == NL80211_IFTYPE_MESH_POINT) { 511 bd->sta_index = sta_priv->sta_index; 512 bd->dpu_desc_idx = sta_priv->dpu_desc_index; 513 } 514 } else { 515 __vif_priv = get_vif_by_addr(wcn, hdr->addr2); 516 bd->sta_index = __vif_priv->self_sta_index; 517 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 518 bd->dpu_sign = __vif_priv->self_ucast_dpu_sign; 519 } 520 521 if (is_data_qos) { 522 tid = ieee80211_get_tid(hdr); 523 /* TID->QID is one-to-one mapping */ 524 bd->queue_id = tid; 525 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_QOS; 526 } else { 527 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS; 528 } 529 530 if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT || 531 (sta_priv && !sta_priv->is_data_encrypted)) { 532 bd->dpu_ne = 1; 533 } 534 535 if (ieee80211_is_any_nullfunc(hdr->frame_control)) { 536 /* Don't use a regular queue for null packet (no ampdu) */ 537 bd->queue_id = WCN36XX_TX_U_WQ_ID; 538 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 539 if (ieee80211_is_qos_nullfunc(hdr->frame_control)) 540 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST; 541 } 542 543 if (bcast) { 544 bd->ub = 1; 545 bd->ack_policy = 1; 546 } 547 *vif_priv = __vif_priv; 548 549 wcn36xx_set_tx_pdu(bd, 550 is_data_qos ? 551 sizeof(struct ieee80211_qos_hdr) : 552 sizeof(struct ieee80211_hdr_3addr), 553 skb->len, tid); 554 555 if (sta_priv && is_data_qos) 556 wcn36xx_tx_start_ampdu(wcn, sta_priv, skb); 557 } 558 559 static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd, 560 struct wcn36xx *wcn, 561 struct wcn36xx_vif **vif_priv, 562 struct sk_buff *skb, 563 bool bcast) 564 { 565 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 566 struct wcn36xx_vif *__vif_priv = 567 get_vif_by_addr(wcn, hdr->addr2); 568 bd->sta_index = __vif_priv->self_sta_index; 569 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index; 570 bd->dpu_ne = 1; 571 572 /* default rate for unicast */ 573 if (ieee80211_is_mgmt(hdr->frame_control)) 574 bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ? 575 WCN36XX_BD_RATE_CTRL : 576 WCN36XX_BD_RATE_MGMT; 577 else if (ieee80211_is_ctl(hdr->frame_control)) 578 bd->bd_rate = WCN36XX_BD_RATE_CTRL; 579 else 580 wcn36xx_warn("frame control type unknown\n"); 581 582 /* 583 * In joining state trick hardware that probe is sent as 584 * unicast even if address is broadcast. 585 */ 586 if (__vif_priv->is_joining && 587 ieee80211_is_probe_req(hdr->frame_control)) 588 bcast = false; 589 590 if (bcast) { 591 /* broadcast */ 592 bd->ub = 1; 593 /* No ack needed not unicast */ 594 bd->ack_policy = 1; 595 bd->queue_id = WCN36XX_TX_B_WQ_ID; 596 } else 597 bd->queue_id = WCN36XX_TX_U_WQ_ID; 598 *vif_priv = __vif_priv; 599 600 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS; 601 602 wcn36xx_set_tx_pdu(bd, 603 ieee80211_is_data_qos(hdr->frame_control) ? 604 sizeof(struct ieee80211_qos_hdr) : 605 sizeof(struct ieee80211_hdr_3addr), 606 skb->len, WCN36XX_TID); 607 } 608 609 int wcn36xx_start_tx(struct wcn36xx *wcn, 610 struct wcn36xx_sta *sta_priv, 611 struct sk_buff *skb) 612 { 613 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 614 struct wcn36xx_vif *vif_priv = NULL; 615 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 616 bool is_low = ieee80211_is_data(hdr->frame_control); 617 bool bcast = is_broadcast_ether_addr(hdr->addr1) || 618 is_multicast_ether_addr(hdr->addr1); 619 bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) && 620 !(info->flags & IEEE80211_TX_CTL_NO_ACK); 621 struct wcn36xx_tx_bd bd; 622 int ret; 623 624 memset(&bd, 0, sizeof(bd)); 625 626 wcn36xx_dbg(WCN36XX_DBG_TX, 627 "tx skb %p len %d fc %04x sn %d %s %s\n", 628 skb, skb->len, __le16_to_cpu(hdr->frame_control), 629 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)), 630 is_low ? "low" : "high", bcast ? "bcast" : "ucast"); 631 632 wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len); 633 634 bd.dpu_rf = WCN36XX_BMU_WQ_TX; 635 636 if (unlikely(ack_ind)) { 637 wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n"); 638 639 /* Only one at a time is supported by fw. Stop the TX queues 640 * until the ack status gets back. 641 */ 642 ieee80211_stop_queues(wcn->hw); 643 644 /* Request ack indication from the firmware */ 645 bd.tx_comp = 1; 646 } 647 648 /* Data frames served first*/ 649 if (is_low) 650 wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast); 651 else 652 /* MGMT and CTRL frames are handeld here*/ 653 wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast); 654 655 buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32)); 656 bd.tx_bd_sign = 0xbdbdbdbd; 657 658 ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low); 659 if (unlikely(ret && ack_ind)) { 660 /* If the skb has not been transmitted, resume TX queue */ 661 ieee80211_wake_queues(wcn->hw); 662 } 663 664 return ret; 665 } 666